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-rw-r--r--arch/arm/boot/dts/meson8b.dtsi35
1 files changed, 33 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 4c1ac3a44357..1a7c16640ea5 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -185,6 +185,27 @@
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_cbus 0 0 130>;
};
+
+ eth_rgmii_pins: eth-rgmii {
+ mux {
+ groups = "eth_tx_clk",
+ "eth_tx_en",
+ "eth_txd1_0",
+ "eth_txd1_1",
+ "eth_txd0_0",
+ "eth_txd0_1",
+ "eth_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd1",
+ "eth_rxd0",
+ "eth_mdio_en",
+ "eth_mdc",
+ "eth_ref_clk",
+ "eth_txd2",
+ "eth_txd3";
+ function = "ethernet";
+ };
+ };
};
};
@@ -203,8 +224,18 @@
};
&ethmac {
- clocks = <&clkc CLKID_ETH>;
- clock-names = "stmmaceth";
+ compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
+
+ reg = <0xc9410000 0x10000
+ 0xc1108140 0x4>;
+
+ clocks = <&clkc CLKID_ETH>,
+ <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL2>;
+ clock-names = "stmmaceth", "clkin0", "clkin1";
+
+ resets = <&reset RESET_ETHERNET>;
+ reset-names = "stmmaceth";
};
&gpio_intc {