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-rw-r--r--drivers/gpu/drm/imx/dpu/dpu-crtc.c9
-rw-r--r--drivers/gpu/drm/imx/dpu/dpu-crtc.h2
-rw-r--r--drivers/gpu/imx/dpu/dpu-common.c10
-rw-r--r--drivers/gpu/imx/dpu/dpu-extdst.c4
-rw-r--r--drivers/gpu/imx/dpu/dpu-framegen.c6
-rw-r--r--drivers/gpu/imx/dpu/dpu-prv.h1
-rw-r--r--drivers/gpu/imx/dpu/dpu-tcon.c6
-rw-r--r--include/video/dpu.h1
8 files changed, 31 insertions, 8 deletions
diff --git a/drivers/gpu/drm/imx/dpu/dpu-crtc.c b/drivers/gpu/drm/imx/dpu/dpu-crtc.c
index 236eee724288..e15878f556e9 100644
--- a/drivers/gpu/drm/imx/dpu/dpu-crtc.c
+++ b/drivers/gpu/drm/imx/dpu/dpu-crtc.c
@@ -129,7 +129,7 @@ static void dpu_crtc_atomic_enable(struct drm_crtc *crtc,
framegen_enable(dpu_crtc->s_fg);
framegen_enable(dpu_crtc->m_fg);
- if (dpu_crtc->stream_id) {
+ if (dpu_crtc->aux_is_master) {
m_safety_shdld_done = &aux_dpu_crtc->safety_shdld_done;
m_content_shdld_done = &aux_dpu_crtc->content_shdld_done;
m_dec_shdld_done = &aux_dpu_crtc->dec_shdld_done;
@@ -600,7 +600,7 @@ static void dpu_crtc_atomic_flush(struct drm_crtc *crtc,
if (dcstate->use_pc) {
aux_dpu_crtc = dpu_crtc_get_aux_dpu_crtc(dpu_crtc);
- if (dpu_crtc->stream_id) {
+ if (dpu_crtc->aux_is_master) {
m_content_shdld_done = &aux_dpu_crtc->content_shdld_done;
s_content_shdld_done = &dpu_crtc->content_shdld_done;
} else {
@@ -897,7 +897,7 @@ static int dpu_crtc_get_resources(struct dpu_crtc *dpu_crtc)
}
dpu_crtc->aux_tcon = dpu_aux_tcon_peek(dpu_crtc->tcon);
- if (stream_id) {
+ if (dpu_crtc->aux_is_master) {
dpu_crtc->m_cf = dpu_crtc->aux_cf;
dpu_crtc->m_dec = dpu_crtc->aux_dec;
dpu_crtc->m_ed = dpu_crtc->aux_ed;
@@ -950,6 +950,9 @@ static int dpu_crtc_init(struct dpu_crtc *dpu_crtc,
dpu_crtc->has_pc = dpu_has_pc(dpu);
dpu_crtc->syncmode_min_prate = dpu_get_syncmode_min_prate(dpu);
dpu_crtc->singlemode_max_width = dpu_get_singlemode_max_width(dpu);
+ dpu_crtc->master_stream_id = dpu_get_master_stream_id(dpu);
+ dpu_crtc->aux_is_master = dpu_crtc->has_pc ?
+ !(dpu_crtc->master_stream_id == stream_id) : false;
dpu_crtc->st = pdata->st9;
dpu_crtc->plane = devm_kcalloc(dev, dpu_crtc->hw_plane_num,
diff --git a/drivers/gpu/drm/imx/dpu/dpu-crtc.h b/drivers/gpu/drm/imx/dpu/dpu-crtc.h
index 235f23934080..d2014c90cf65 100644
--- a/drivers/gpu/drm/imx/dpu/dpu-crtc.h
+++ b/drivers/gpu/drm/imx/dpu/dpu-crtc.h
@@ -52,12 +52,14 @@ struct dpu_crtc {
unsigned int crtc_grp_id;
unsigned int syncmode_min_prate;
unsigned int singlemode_max_width;
+ unsigned int master_stream_id;
int vbl_irq;
int safety_shdld_irq;
int content_shdld_irq;
int dec_shdld_irq;
bool has_pc;
+ bool aux_is_master;
struct completion safety_shdld_done;
struct completion content_shdld_done;
diff --git a/drivers/gpu/imx/dpu/dpu-common.c b/drivers/gpu/imx/dpu/dpu-common.c
index cb1c858b324e..eec5a220602b 100644
--- a/drivers/gpu/imx/dpu/dpu-common.c
+++ b/drivers/gpu/imx/dpu/dpu-common.c
@@ -605,6 +605,7 @@ static const struct dpu_devtype dpu_type_v2_qm = {
.has_syncmode_fixup = true,
.syncmode_min_prate = 300000,
.singlemode_max_width = 1920,
+ .master_stream_id = 0,
.pixel_link_quirks = true,
.pixel_link_nhvsync = true,
.version = DPU_V2,
@@ -682,6 +683,15 @@ unsigned int dpu_get_singlemode_max_width(struct dpu_soc *dpu)
}
EXPORT_SYMBOL_GPL(dpu_get_singlemode_max_width);
+unsigned int dpu_get_master_stream_id(struct dpu_soc *dpu)
+{
+ if (dpu->devtype->has_pc)
+ return dpu->devtype->master_stream_id;
+ else
+ return UINT_MAX;
+}
+EXPORT_SYMBOL_GPL(dpu_get_master_stream_id);
+
bool dpu_vproc_has_fetcheco_cap(u32 cap_mask)
{
return !!(cap_mask & DPU_VPROC_CAP_FETCHECO);
diff --git a/drivers/gpu/imx/dpu/dpu-extdst.c b/drivers/gpu/imx/dpu/dpu-extdst.c
index 23a1b8a1c7d6..a2787237d1f4 100644
--- a/drivers/gpu/imx/dpu/dpu-extdst.c
+++ b/drivers/gpu/imx/dpu/dpu-extdst.c
@@ -422,7 +422,9 @@ EXPORT_SYMBOL_GPL(extdst_perfresult);
bool extdst_is_master(struct dpu_extdst *ed)
{
- return ed->id == 0;
+ const struct dpu_devtype *devtype = ed->dpu->devtype;
+
+ return ed->id == devtype->master_stream_id;
}
EXPORT_SYMBOL_GPL(extdst_is_master);
diff --git a/drivers/gpu/imx/dpu/dpu-framegen.c b/drivers/gpu/imx/dpu/dpu-framegen.c
index 55a956e75d8d..42f33ee8991f 100644
--- a/drivers/gpu/imx/dpu/dpu-framegen.c
+++ b/drivers/gpu/imx/dpu/dpu-framegen.c
@@ -630,13 +630,15 @@ EXPORT_SYMBOL_GPL(framegen_disable_clock);
bool framegen_is_master(struct dpu_framegen *fg)
{
- return fg->id == 0;
+ const struct dpu_devtype *devtype = fg->dpu->devtype;
+
+ return fg->id == devtype->master_stream_id;
}
EXPORT_SYMBOL_GPL(framegen_is_master);
bool framegen_is_slave(struct dpu_framegen *fg)
{
- return fg->id == 1;
+ return !framegen_is_master(fg);
}
EXPORT_SYMBOL_GPL(framegen_is_slave);
diff --git a/drivers/gpu/imx/dpu/dpu-prv.h b/drivers/gpu/imx/dpu/dpu-prv.h
index ed3147cae63e..a7da1ed8f843 100644
--- a/drivers/gpu/imx/dpu/dpu-prv.h
+++ b/drivers/gpu/imx/dpu/dpu-prv.h
@@ -204,6 +204,7 @@ struct dpu_devtype {
unsigned int syncmode_min_prate; /* need pixel combiner, KHz */
unsigned int singlemode_max_width;
+ unsigned int master_stream_id;
/*
* index: 0 1 2 3 4 5 6
diff --git a/drivers/gpu/imx/dpu/dpu-tcon.c b/drivers/gpu/imx/dpu/dpu-tcon.c
index 0bb8f62bbadf..1e0acefb08ca 100644
--- a/drivers/gpu/imx/dpu/dpu-tcon.c
+++ b/drivers/gpu/imx/dpu/dpu-tcon.c
@@ -216,13 +216,15 @@ EXPORT_SYMBOL_GPL(tcon_cfg_videomode);
bool tcon_is_master(struct dpu_tcon *tcon)
{
- return tcon->id == 0;
+ const struct dpu_devtype *devtype = tcon->dpu->devtype;
+
+ return tcon->id == devtype->master_stream_id;
}
EXPORT_SYMBOL_GPL(tcon_is_master);
bool tcon_is_slave(struct dpu_tcon *tcon)
{
- return tcon->id == 1;
+ return !tcon_is_master(tcon);
}
EXPORT_SYMBOL_GPL(tcon_is_slave);
diff --git a/include/video/dpu.h b/include/video/dpu.h
index ad8703772580..42a9ff53c0af 100644
--- a/include/video/dpu.h
+++ b/include/video/dpu.h
@@ -722,6 +722,7 @@ struct dpu_vscaler *fetchdecode_get_vscaler(struct dpu_fetchunit *fu);
bool dpu_has_pc(struct dpu_soc *dpu);
unsigned int dpu_get_syncmode_min_prate(struct dpu_soc *dpu);
unsigned int dpu_get_singlemode_max_width(struct dpu_soc *dpu);
+unsigned int dpu_get_master_stream_id(struct dpu_soc *dpu);
bool dpu_vproc_has_fetcheco_cap(u32 cap_mask);
bool dpu_vproc_has_hscale_cap(u32 cap_mask);