diff options
| -rw-r--r-- | arch/arm/mach-imx/mach-imx6q.c | 18 | ||||
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 |
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 1bdeb4d283f8..a5d0861e0647 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -209,6 +209,10 @@ static int ar8031_phy_fixup(struct phy_device *dev) { u16 val; + /* Set RGMII IO voltage to 1.8V */ + phy_write(dev, 0x1d, 0x1f); + phy_write(dev, 0x1e, 0x8); + /* disable phy AR8031 SmartEEE function. */ phy_write(dev, 0xd, 0x3); phy_write(dev, 0xe, 0x805d); @@ -350,6 +354,18 @@ static void __init imx6q_csi_mux_init(void) } } +static void __init imx6q_enet_clk_sel(void) +{ + struct regmap *gpr; + + gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); + if (!IS_ERR(gpr)) + regmap_update_bits(gpr, IOMUXC_GPR5, + IMX6Q_GPR5_ENET_TX_CLK_SEL, IMX6Q_GPR5_ENET_TX_CLK_SEL); + else + pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n"); +} + #define OCOTP_MACn(n) (0x00000620 + (n) * 0x10) void __init imx6_enet_mac_init(const char *compatible) { @@ -433,6 +449,8 @@ static inline void imx6q_enet_init(void) imx6_enet_mac_init("fsl,imx6q-fec"); imx6q_enet_phy_init(); imx6q_1588_init(); + if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0) + imx6q_enet_clk_sel(); imx6q_enet_plt_init(); } diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index f6515b5dd369..7f1b362c0faa 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -243,6 +243,7 @@ #define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0) #define IMX6Q_GPR5_L2_CLK_STOP BIT(8) +#define IMX6Q_GPR5_ENET_TX_CLK_SEL BIT(9) #define IMX6Q_GPR8_TX_SWING_LOW (0x7f << 25) #define IMX6Q_GPR8_TX_SWING_FULL (0x7f << 18) |