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Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers/synopsys.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/memory-controllers/synopsys.txt | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt index 9d32762c47e1..88d701dea7c1 100644 --- a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt +++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt @@ -1,21 +1,22 @@ Binding for Synopsys IntelliDDR Multi Protocol Memory Controller -The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and 32-bit -bus width configurations. +The ZynqMP and i.MX8MP DDR ECC controller has an optional ECC support in 64-bit +and 32-bit bus width configurations. The Zynq DDR ECC controller has an optional ECC support in half-bus width (16-bit) configuration. -These both ECC controllers correct single bit ECC errors and detect double bit +These all ECC controllers correct single bit ECC errors and detect double bit ECC errors. Required properties: - compatible: One of: - 'xlnx,zynq-ddrc-a05' : Zynq DDR ECC controller - 'xlnx,zynqmp-ddrc-2.40a' : ZynqMP DDR ECC controller + - 'fsl,imx8mp-ddrc' : i.MX8MP DDR ECC controller - reg: Should contain DDR controller registers location and length. -Required properties for "xlnx,zynqmp-ddrc-2.40a": +Required properties for "xlnx,zynqmp-ddrc-2.40a" and "fsl,imx8mp-ddrc": - interrupts: Property with a value describing the interrupt number. Example: |