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-rw-r--r--Documentation/devicetree/bindings/usb/dwc3.txt20
1 files changed, 19 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index c977a3ba2f35..70876c55a11c 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -4,7 +4,21 @@ DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
as described in 'usb/generic.txt'
Required properties:
- - compatible: must be "snps,dwc3"
+ - compatible: must be "snps,dwc3" and (if applicable) may contain a
+ chip-specific compatible string in front of it to allow dwc3 driver be
+ able to update cache type configuration accordingly, otherwise
+ Layerscape SoC will encounter USB init failure when adding property
+ dma-coherent on device tree.
+ Example:
+ * "fsl,ls1012a-dwc3", "snps,dwc3"
+ * "fsl,ls1021a-dwc3", "snps,dwc3"
+ * "fsl,ls1028a-dwc3", "snps,dwc3"
+ * "fsl,ls1043a-dwc3", "snps,dwc3"
+ * "fsl,ls1046a-dwc3", "snps,dwc3"
+ * "fsl,ls1088a-dwc3", "snps,dwc3"
+ * "fsl,ls2088a-dwc3", "snps,dwc3"
+ * "fsl,lx2160a-dwc3", "snps,dwc3"
+
- reg : Address and length of the register set for the device
- interrupts: Interrupts used by the dwc3 controller.
- clock-names: should contain "ref", "bus_early", "suspend"
@@ -111,6 +125,10 @@ Optional properties:
more than one value, which means undefined length INCR burst type
enabled. The values can be 1, 4, 8, 16, 32, 64, 128 and 256.
+ - snps,host-vbus-glitches: Power off all Root Hub ports immediately after
+ setting host mode to avoid vbus (negative) glitch happen in later
+ xhci reset. And the vbus will back to 5V automatically when reset done.
+
- in addition all properties from usb-xhci.txt from the current directory are
supported as well