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diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
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+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
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+/*
+ * Copyright 2014-2015 Toradex AG
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6dl.dtsi"
+#include "imx6qdl-colibri.dtsi"
+
+/* Add the following define if you connect a Fusion display with a capacitive
+ touch controller */
+/* #define PCAP */
+
+/ {
+ model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3";
+ compatible = "toradex,colibri_imx6dl-eval", "toradex,colibri_imx6dl", "fsl,imx6dl";
+
+ aliases {
+ i2c0 = &i2cddc;
+ i2c1 = &i2c2;
+ i2c2 = &i2c3;
+ };
+
+ aliases {
+ rtc0 = &rtc_i2c;
+ rtc1 = "/soc/aips-bus@02000000/snvs@020cc000/snvs-rtc-lp@34";
+ };
+
+ aliases {
+ /* the following, together with kernel patches, forces a fixed assignment
+ between device id and usdhc controller */
+ /* i.e. the eMMC on usdhc3 will be /dev/mmcblk0 */
+ mmc0 = &usdhc3; /* eMMC */
+ mmc1 = &usdhc1; /* MMC 4bit slot */
+ };
+
+ extcon_usbc_det: usbc_det {
+ compatible = "linux,extcon-usb-gpio";
+ debounce = <25>;
+ id-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbc_det_1>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ wakeup {
+ label = "Wake-Up";
+ gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_WAKEUP>;
+ debounce-interval = <10>;
+ gpio-key,wakeup;
+ };
+ };
+
+ regulators {
+ reg_usb_host_vbus: usb_host_vbus {
+ status = "okay";
+ };
+ };
+};
+
+&backlight {
+#if 0 /* PWM polarity: if 1 is brightest */
+ pwms = <&pwm3 0 5000000 0>;
+#if 0 /* Fusion 7 needs 10kHz PWM frequency */
+ pwms = <&pwm3 0 100000 0>;
+#endif
+#else /* PWM polarity: if 0 is brightest */
+ pwms = <&pwm3 0 5000000 1>;
+#endif
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ status = "okay";
+};
+
+/ {
+ clocks {
+ /* fixed crystal dedicated to mpc258x */
+ clk16m: clk@1 {
+ compatible = "fixed-clock";
+ reg=<1>;
+ #clock-cells = <0>;
+ clock-frequency = <16000000>;
+ clock-output-names = "clk16m";
+ };
+ };
+};
+
+/* Colibri SPI */
+&ecspi4 {
+ status = "okay";
+
+ mcp258x0: mcp258x@1 {
+ compatible = "microchip,mcp2515";
+ reg = <0>;
+ clocks = <&clk16m>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 0x2>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+ spidev0: spidev@1 {
+ compatible = "toradex,evalspi";
+ reg = <0>;
+ spi-max-frequency = <23000000>;
+ status = "disabled";
+ };
+};
+
+&hdmi_audio {
+ status = "okay";
+};
+
+&hdmi_core {
+ status = "okay";
+};
+
+&hdmi_video {
+ status = "okay";
+};
+
+/*
+ * I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier
+ * board)
+ */
+&i2c3 {
+ status = "okay";
+
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mxt_ts>;
+ reg = <0x4a>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
+ /*
+ * Note: When the status is set to okay, to avoid pinmux
+ * conflict, one should remove the pinctrl_weim_cs1 and
+ * pinctrl_weim_cs2 pingroup from the weim pinctrl-0
+ * property or disable weim node.
+ */
+ status = "disabled";
+ };
+
+#ifdef PCAP /* not standard pinout, disable PWM<B>, PWM<C> */
+ pcap@10 {
+ /* TouchRevolution Fusion 7 and 10 multi-touch controller */
+ compatible = "touchrevolution,fusion-f0710a";
+ reg = <0x10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcap_1>;
+ gpios = <&gpio1 9 0 /* SODIMM 28, Pen down interrupt */
+ &gpio2 10 0 /* SODIMM 30, Reset */
+ >;
+ };
+#endif
+ /* M41T0M6 real time clock on carrier board */
+ rtc_i2c: rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+};
+
+/*
+ * DDC_I2C: I2C2_SDA/SCL on extension connector pin 15/16
+ */
+&i2cddc {
+ status = "okay";
+
+ hdmi_ddc: edid@50 {
+ compatible = "fsl,imx6-hdmi-i2c";
+ reg = <0x50>;
+ };
+};
+
+&iomuxc {
+ /*
+ * Mux all pins which are unused to be GPIOs
+ * so they are ready for export to user space
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
+ &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
+ &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
+ &pinctrl_csi_gpio_1
+ &pinctrl_gpio_1
+ &pinctrl_gpio_2
+ &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>;
+
+ gpio {
+ pinctrl_pcap_1: pcap-1 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 PAD_CTRL_HYS_PD /* SODIMM 28 */
+ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 PAD_CTRL_HYS_PD /* SODIMM 30 */
+ >;
+ };
+
+ pinctrl_mxt_ts: mxt-ts {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 PAD_CTRL_HYS_PD /* SODIMM 107 */
+ MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 PAD_CTRL_HYS_PD /* SODIMM 106 */
+ >;
+ };
+ };
+};
+
+&lcd {
+ status = "okay";
+};
+
+&mxcfb1 {
+ status = "okay";
+};
+
+&mxcfb2 {
+ status = "okay";
+};
+
+#ifndef PCAP
+&pwm1 {
+ status = "okay";
+};
+#endif
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+#ifndef PCAP
+&pwm4 {
+ status = "okay";
+};
+#endif
+
+&sound_hdmi {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+#if 0
+ linux,rs485-enabled-at-boot-time;
+#endif
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&usbh1 {
+ status = "okay";
+};
+
+&usbotg {
+ status = "okay";
+ extcon = <&extcon_usbc_det>;
+};
+
+/* MMC */
+&usdhc1 {
+ status = "okay";
+};
+
+&weim {
+ status = "okay";
+ fsl,weim-cs-gpr = <&gpr>;
+ /* weim memory map: 32MB on CS0, 32MB on CS1, 32MB on CS2, 32MB on CS3 */
+ ranges = <0 0 0x08000000 0x02000000
+ 1 0 0x0a000000 0x02000000
+ 2 0 0x0c000000 0x02000000
+ 3 0 0x0e000000 0x02000000>;
+ /* SRAM on CS0 */
+ sram@0,0 {
+ compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram";
+ reg = <0 0 0x00010000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
+ 0x00000000 0x04000040 0x00000000>;
+ };
+ /* SRAM on CS1 */
+ sram@1,0 {
+ compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram";
+ reg = <1 0 0x00010000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
+ 0x00000000 0x04000040 0x00000000>;
+ };
+};