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Diffstat (limited to 'arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-usb.dts')
-rw-r--r--arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-usb.dts60
1 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-usb.dts b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-usb.dts
new file mode 100644
index 000000000000..619c28b89d46
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-usb.dts
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* DTS file for validate USB at i.mx6ull ddr3 arm2 board */
+
+#include "imx6ull-14x14-ddr3-arm2.dts"
+
+/ {
+ regulators {
+ reg_usb_otg2_vbus: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "usb_otg2_vbus";
+ pinctrl-0 = <&pinctrl_usb_otg2>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+ };
+};
+
+&iomuxc {
+ usbotg2 {
+ pinctrl_usb_otg2_id: usbotg2idgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO05__ANATOP_OTG2_ID 0x17059
+ >;
+ };
+
+ pinctrl_usb_otg2: usbotg2grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x10b0
+ >;
+ };
+ };
+};
+
+&usbotg2 {
+ vbus-supply = <&reg_usb_otg2_vbus>; /* hardware rework is needed */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_otg2_id>;
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ status = "okay";
+};
+
+&usdhc1 {
+ no-1-8-v;
+ vmmc-supply = <>;
+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_cd_wp>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_cd_wp>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_cd_wp>;
+};