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-rw-r--r--arch/arm/boot/dts/Makefile4
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts2
-rw-r--r--arch/arm/boot/dts/bcm63138.dtsi2
-rw-r--r--arch/arm/boot/dts/bcm7445-bcm97445svmb.dts4
-rw-r--r--arch/arm/boot/dts/bcm7445.dtsi2
-rw-r--r--arch/arm/boot/dts/bcm963138dvt.dts4
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu4.dts2
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi5
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi2
-rw-r--r--arch/arm/boot/dts/spear3xx.dtsi2
-rw-r--r--arch/arm/boot/dts/tegra20-tamonten.dtsi14
-rw-r--r--arch/arm/boot/dts/versatile-ab.dts5
-rw-r--r--arch/arm/boot/dts/versatile-pb.dts2
-rw-r--r--arch/arm/boot/dts/vf-colibri-aster.dtsi199
-rw-r--r--arch/arm/boot/dts/vf-colibri-dual-eth.dtsi93
-rw-r--r--arch/arm/boot/dts/vf-colibri-eval-v3.dtsi157
-rw-r--r--arch/arm/boot/dts/vf-colibri.dtsi201
-rw-r--r--arch/arm/boot/dts/vf500-colibri-aster.dts22
-rw-r--r--arch/arm/boot/dts/vf500-colibri-dual-eth.dts17
-rw-r--r--arch/arm/boot/dts/vf500-colibri.dtsi5
-rw-r--r--arch/arm/boot/dts/vf500.dtsi10
-rw-r--r--arch/arm/boot/dts/vf610-colibri-aster.dts17
-rw-r--r--arch/arm/boot/dts/vf610-colibri-dual-eth.dts17
-rw-r--r--arch/arm/boot/dts/vf610-colibri.dtsi111
-rw-r--r--arch/arm/boot/dts/vf610-twr.dts4
-rw-r--r--arch/arm/boot/dts/vf610.dtsi27
-rw-r--r--arch/arm/boot/dts/vfxxx.dtsi254
27 files changed, 1114 insertions, 70 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 25b80021a1a3..fafb6f91c23a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -358,7 +358,11 @@ dtb-$(CONFIG_SOC_LS1021A) += \
dtb-$(CONFIG_SOC_VF610) += \
vf500-colibri-eval-v3.dtb \
vf610-colibri-eval-v3.dtb \
+ vf500-colibri-aster.dtb \
+ vf610-colibri-aster.dtb \
vf610m4-colibri.dtb \
+ vf500-colibri-dual-eth.dtb \
+ vf610-colibri-dual-eth.dtb \
vf610-cosmic.dtb \
vf610-twr.dtb
dtb-$(CONFIG_ARCH_MXS) += \
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index a74b09f17a1a..e7cd99793bc6 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -411,7 +411,7 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
- clock-frequency = <400000>;
+ clock-frequency = <100000>;
tps65218: tps65218@24 {
reg = <0x24>;
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index 34cd64051250..84efc3d16f58 100644
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -152,7 +152,7 @@
status = "disabled";
};
- nand: nand@2000 {
+ nand_controller: nand-controller@2000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
index 0bb8d17e4c2d..e51c9b079432 100644
--- a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
+++ b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
@@ -13,10 +13,10 @@
};
};
-&nand {
+&nand_controller {
status = "okay";
- nandcs@1 {
+ nand@1 {
compatible = "brcm,nandcs";
reg = <1>;
nand-ecc-step-size = <512>;
diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi
index 4791321969b3..3f002f2047f1 100644
--- a/arch/arm/boot/dts/bcm7445.dtsi
+++ b/arch/arm/boot/dts/bcm7445.dtsi
@@ -149,7 +149,7 @@
reg-names = "aon-ctrl", "aon-sram";
};
- nand: nand@3e2800 {
+ nand_controller: nand-controller@3e2800 {
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts
index 370aa2cfddf2..439cff69e948 100644
--- a/arch/arm/boot/dts/bcm963138dvt.dts
+++ b/arch/arm/boot/dts/bcm963138dvt.dts
@@ -29,10 +29,10 @@
status = "okay";
};
-&nand {
+&nand_controller {
status = "okay";
- nandcs@0 {
+ nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-strength = <4>;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index 2faf88627a48..b45e2a0c3908 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -26,7 +26,7 @@
label = "blue:heartbeat";
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
- max_brightness = <255>;
+ max-brightness = <255>;
linux,default-trigger = "heartbeat";
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index cae04e806036..e3e3a7a08d08 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -307,8 +307,8 @@
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
- MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1
- MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
>;
};
@@ -383,6 +383,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
+ uart-has-rtscts;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index fb0d1b252dc8..92df0fcf2bf4 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1363,7 +1363,7 @@
0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
- 0x0003ff00 0x8002a800 0x00000000 /* pioD */
+ 0xb003ff00 0x8002a800 0x00000000 /* pioD */
0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
>;
diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi
index 118135d75899..4e4166d96b26 100644
--- a/arch/arm/boot/dts/spear3xx.dtsi
+++ b/arch/arm/boot/dts/spear3xx.dtsi
@@ -53,7 +53,7 @@
};
gmac: eth@e0800000 {
- compatible = "st,spear600-gmac";
+ compatible = "snps,dwmac-3.40a";
reg = <0xe0800000 0x8000>;
interrupts = <23 22>;
interrupt-names = "macirq", "eth_wake_irq";
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 13d4e6185275..c70d1ec02957 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -180,8 +180,9 @@
nvidia,pins = "ata", "atb", "atc", "atd", "ate",
"cdev1", "cdev2", "dap1", "dtb", "gma",
"gmb", "gmc", "gmd", "gme", "gpu7",
- "gpv", "i2cp", "pta", "rm", "slxa",
- "slxk", "spia", "spib", "uac";
+ "gpv", "i2cp", "irrx", "irtx", "pta",
+ "rm", "slxa", "slxk", "spia", "spib",
+ "uac";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
@@ -206,7 +207,7 @@
conf_ddc {
nvidia,pins = "ddc", "dta", "dtd", "kbca",
"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
- "sdc";
+ "sdc", "uad", "uca";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
@@ -216,10 +217,9 @@
"lvp0", "owc", "sdb";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- conf_irrx {
- nvidia,pins = "irrx", "irtx", "sdd", "spic",
- "spie", "spih", "uaa", "uab", "uad",
- "uca", "ucb";
+ conf_sdd {
+ nvidia,pins = "sdd", "spic", "spie", "spih",
+ "uaa", "uab", "ucb";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index 3279bf1a17a1..9bedd2478787 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -93,16 +93,15 @@
#size-cells = <1>;
ranges;
- vic: intc@10140000 {
+ vic: interrupt-controller@10140000 {
compatible = "arm,versatile-vic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x10140000 0x1000>;
- clear-mask = <0xffffffff>;
valid-mask = <0xffffffff>;
};
- sic: intc@10003000 {
+ sic: interrupt-controller@10003000 {
compatible = "arm,versatile-sic";
interrupt-controller;
#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 33a8eb28374e..3a23164c2c2d 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -6,7 +6,7 @@
amba {
/* The Versatile PB is using more SIC IRQ lines than the AB */
- sic: intc@10003000 {
+ sic: interrupt-controller@10003000 {
clear-mask = <0xffffffff>;
/*
* Valid interrupt lines mask according to
diff --git a/arch/arm/boot/dts/vf-colibri-aster.dtsi b/arch/arm/boot/dts/vf-colibri-aster.dtsi
new file mode 100644
index 000000000000..0e93826d5fd8
--- /dev/null
+++ b/arch/arm/boot/dts/vf-colibri-aster.dtsi
@@ -0,0 +1,199 @@
+/*
+ * Copyright 2018 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ ethernet0 = &fec1;
+ ethernet1 = &fec0;
+ };
+
+ panel: panel {
+ compatible = "edt,et057090dhu";
+ backlight = <&bl>;
+ power-supply = <&reg_3v3>;
+ };
+
+ extcon_usbc_det: usbc_det {
+ compatible = "linux,extcon-usb-gpio";
+ debounce = <25>;
+ id-gpio = <&gpio3 6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbc_det>;
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_usbh_vbus: regulator-usbh-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1_reg>;
+ regulator-name = "VCC_USB[1-4]";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_LOW>; /* USBH_PEN resp. USBH_P_EN */
+ vin-supply = <&reg_5v0>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiokeys>;
+
+ power {
+ label = "Wake-Up";
+ gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_WAKEUP>;
+ debounce-interval = <10>;
+ gpio-key,wakeup;
+ };
+ };
+};
+
+&bl {
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ power-supply = <&reg_3v3>;
+ status = "okay";
+};
+
+&dcu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dcu0_1>;
+ fsl,panel = <&panel>;
+ status = "okay";
+};
+
+&dspi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_aster_dspi1 &pinctrl_aster_spi_gpio>;
+ status = "okay";
+
+ spidev0: spidev@0 {
+ compatible = "toradex,evalspi";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ };
+};
+
+&esdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_esdhc1>;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&fec1 {
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ reg = <0x4a>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
+ };
+
+ /* M41T0M6 real time clock on carrier board */
+ rtc: m41t0m6@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&reg_module_3v3 {
+ vin-supply = <&reg_3v3>;
+};
+
+&tcon0 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usbdev0 {
+ extcon = <&extcon_usbc_det>, <&extcon_usbc_det>;
+};
+
+&usbh1 {
+ vbus-supply = <&reg_usbh_vbus>;
+};
+
+&iomuxc {
+ vf610-colibri {
+ pinctrl_gpiokeys: gpiokeys {
+ fsl,pins = <
+ VF610_PAD_PTB19__GPIO_41 0x218d
+ >;
+ };
+
+ pinctrl_aster_dspi1: dspi1grp {
+ fsl,pins = <
+ VF610_PAD_PTD6__DSPI1_SIN 0x33e1
+ VF610_PAD_PTD7__DSPI1_SOUT 0x33e2
+ VF610_PAD_PTD8__DSPI1_SCK 0x33e2
+ >;
+ };
+
+ pinctrl_aster_spi_gpio: spigpios {
+ fsl,pins = <
+ /* CS0 */
+ VF610_PAD_PTD5__GPIO_84 0x22ed
+ /* CS1 */
+ VF610_PAD_PTB18__GPIO_40 0x22ed
+ >;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/vf-colibri-dual-eth.dtsi b/arch/arm/boot/dts/vf-colibri-dual-eth.dtsi
new file mode 100644
index 000000000000..dfa19d6fb2ab
--- /dev/null
+++ b/arch/arm/boot/dts/vf-colibri-dual-eth.dtsi
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2014 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+ chosen {
+ bootargs = "console=ttyLP0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ ethernet0 = &fec0;
+ ethernet1 = &fec1;
+ };
+};
+
+&fec0 {
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec0>;
+ status = "okay";
+};
+
+&fec1 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-0 = <&pinctrl_hog_1>;
+
+ vf610-colibri {
+ pinctrl_fec0: fec0grp {
+ fsl,pins = <
+ VF610_PAD_PTA9__RMII_CLKOUT 0x30d2
+ VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d2
+ VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3
+ VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
+ VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
+ VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
+ VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
+ VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
+ VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
+ VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
+ /* Disable pads multiplexed with PTC7/PTC6 */
+ VF610_PAD_PTB0__GPIO_22 0x0000
+ VF610_PAD_PTB9__GPIO_31 0x0000
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ VF610_PAD_PTA20__UART3_TX 0x21a2
+ VF610_PAD_PTA21__UART3_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ VF610_PAD_PTA28__UART4_TX 0x21a2
+ VF610_PAD_PTA29__UART4_RX 0x21a1
+ >;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
index ed65e0f7dfc0..356ad251e2ed 100644
--- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright 2014 Toradex AG
+ * Copyright 2018 Toradex AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -7,42 +7,76 @@
* (at your option) any later version.
*/
+#include <dt-bindings/input/input.h>
+
/ {
chosen {
stdout-path = "serial0:115200n8";
};
+ aliases {
+ ethernet0 = &fec1;
+ ethernet1 = &fec0;
+ };
+
clk16m: clk16m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
};
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- sys_5v0_reg: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "5v0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
+ panel: panel {
+ compatible = "edt,et057090dhu";
+ backlight = <&bl>;
+ power-supply = <&reg_3v3>;
+ };
+
+ extcon_usbc_det: usbc_det {
+ compatible = "linux,extcon-usb-gpio";
+ debounce = <25>;
+ id-gpio = <&gpio3 6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbc_det>;
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_usbh_vbus: regulator-usbh-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1_reg>;
+ regulator-name = "VCC_USB[1-4]";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_LOW>; /* USBH_PEN resp. USBH_P_EN */
+ vin-supply = <&reg_5v0>;
+ };
- /* USBH_PEN */
- usbh_vbus_reg: regulator@1 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh1_reg>;
- reg = <1>;
- regulator-name = "usbh_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio2 19 GPIO_ACTIVE_LOW>;
- vin-supply = <&sys_5v0_reg>;
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiokeys>;
+
+ power {
+ label = "Wake-Up";
+ gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_WAKEUP>;
+ debounce-interval = <10>;
+ gpio-key,wakeup;
};
};
};
@@ -50,21 +84,37 @@
&bl {
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
+ power-supply = <&reg_3v3>;
status = "okay";
};
+&dcu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dcu0_1>;
+ fsl,panel = <&panel>;
+ status = "okay";
+};
+
+/* Colibri SPI */
&dspi1 {
status = "okay";
mcp2515can: can@0 {
compatible = "microchip,mcp2515";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_can_int>;
reg = <0>;
clocks = <&clk16m>;
- spi-max-frequency = <10000000>;
+ /* pinctrl is set in iomuxc from hoggrp-0 */
interrupt-parent = <&gpio1>;
interrupts = <11 GPIO_ACTIVE_LOW>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+
+ spidev0: spidev@0 {
+ compatible = "toradex,evalspi";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ status = "disabled";
};
};
@@ -85,9 +135,33 @@
&i2c0 {
status = "okay";
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiotouch>;
+ reg = <0x4a>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
+ };
+
+ /* TouchRevolution Fusion 7 and 10 multi-touch controller */
+ touch: touchrevf0710a@10 {
+ compatible = "touchrevolution,fusion-f0710a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiotouch>;
+ reg = <0x10>;
+ gpios = <&gpio0 30 GPIO_ACTIVE_HIGH /* SO-DIMM 28, Pen down interrupt */
+ &gpio0 23 GPIO_ACTIVE_LOW /* SO-DIMM 30, Reset interrupt */
+ >;
+ status = "disabled";
+ };
+
/* M41T0M6 real time clock on carrier board */
rtc: m41t0m6@68 {
- compatible = "st,m41t00";
+ compatible = "st,m41t0";
reg = <0x68>;
};
};
@@ -100,6 +174,14 @@
status = "okay";
};
+&reg_module_3v3 {
+ vin-supply = <&reg_3v3>;
+};
+
+&tcon0 {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
@@ -112,15 +194,26 @@
status = "okay";
};
+&usbdev0 {
+ extcon = <&extcon_usbc_det>, <&extcon_usbc_det>;
+};
+
&usbh1 {
- vbus-supply = <&usbh_vbus_reg>;
+ vbus-supply = <&reg_usbh_vbus>;
};
&iomuxc {
vf610-colibri {
- pinctrl_can_int: can_int {
+ pinctrl_gpiokeys: gpiokeys {
+ fsl,pins = <
+ VF610_PAD_PTB19__GPIO_41 0x218d
+ >;
+ };
+
+ pinctrl_gpiotouch: touchgpios {
fsl,pins = <
- VF610_PAD_PTB21__GPIO_43 0x22ed
+ VF610_PAD_PTB8__GPIO_30 0x6d
+ VF610_PAD_PTB1__GPIO_23 0x4d
>;
};
};
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi
index e5949b934945..cca8f38facb7 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -10,17 +10,61 @@
/ {
bl: backlight {
compatible = "pwm-backlight";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_bl_on>;
pwms = <&pwm0 0 5000000 0>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
+
+ reg_module_3v3: regulator-module-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_module_3v3_avdd: regulator-module-3v3-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3_AVDD_AUDIO";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ soc {
+ fsl,use-lpm-poweroff;
+ };
};
&adc0 {
status = "okay";
+ vref-supply = <&reg_module_3v3_avdd>;
};
&adc1 {
status = "okay";
+ vref-supply = <&reg_module_3v3_avdd>;
+};
+
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan0>;
+ status = "disabled";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ status = "disabled";
+};
+
+&clks {
+ assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
+ <&clks VF610_CLK_ENET_TS_SEL>;
+ assigned-clock-parents = <&clks VF610_CLK_ENET_50M>,
+ <&clks VF610_CLK_ENET_50M>;
};
&dspi1 {
@@ -33,17 +77,34 @@
status = "okay";
};
+&edma1 {
+ status = "okay";
+};
+
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
bus-width = <4>;
cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+ disable-wp;
};
&fec1 {
phy-mode = "rmii";
+ phy-handle = <&ethphy>;
+ phy-supply = <&reg_module_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy: ethernet-phy@0 {
+ reg = <0>;
+ micrel,led-mode = <0>;
+ };
+ };
};
&i2c0 {
@@ -53,8 +114,6 @@
};
&nfc {
- assigned-clocks = <&clks VF610_CLK_NFC>;
- assigned-clock-rates = <33000000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nfc>;
status = "okay";
@@ -74,12 +133,12 @@
&pwm0 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm0>;
+ pinctrl-0 = <&pinctrl_pwm0_a &pinctrl_pwm0_c>;
};
&pwm1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm1>;
+ pinctrl-0 = <&pinctrl_pwm1_b &pinctrl_pwm1_d>;
};
&uart0 {
@@ -99,6 +158,7 @@
&usbdev0 {
disable-over-current;
+ dr_mode = "otg";
status = "okay";
};
@@ -124,12 +184,54 @@
};
&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog_0 &pinctrl_hog_1>;
+
vf610-colibri {
- pinctrl_gpio_ext: gpio_ext {
+ pinctrl_flexcan0: can0grp {
+ fsl,pins = <
+ VF610_PAD_PTB14__CAN0_RX 0x31F1
+ VF610_PAD_PTB15__CAN0_TX 0x31F2
+ >;
+ };
+
+ pinctrl_flexcan1: can1grp {
+ fsl,pins = <
+ VF610_PAD_PTB16__CAN1_RX 0x31F1
+ VF610_PAD_PTB17__CAN1_TX 0x31F2
+ >;
+ };
+
+ pinctrl_dcu0_1: dcu0grp_1 {
fsl,pins = <
- VF610_PAD_PTD10__GPIO_89 0x22ed /* EXT_IO_0 */
- VF610_PAD_PTD9__GPIO_88 0x22ed /* EXT_IO_1 */
- VF610_PAD_PTD26__GPIO_68 0x22ed /* EXT_IO_2 */
+ VF610_PAD_PTE0__DCU0_HSYNC 0x1902
+ VF610_PAD_PTE1__DCU0_VSYNC 0x1902
+ VF610_PAD_PTE2__DCU0_PCLK 0x1902
+ VF610_PAD_PTE4__DCU0_DE 0x1902
+ VF610_PAD_PTE5__DCU0_R0 0x1902
+ VF610_PAD_PTE6__DCU0_R1 0x1902
+ VF610_PAD_PTE7__DCU0_R2 0x1902
+ VF610_PAD_PTE8__DCU0_R3 0x1902
+ VF610_PAD_PTE9__DCU0_R4 0x1902
+ VF610_PAD_PTE10__DCU0_R5 0x1902
+ VF610_PAD_PTE11__DCU0_R6 0x1902
+ VF610_PAD_PTE12__DCU0_R7 0x1902
+ VF610_PAD_PTE13__DCU0_G0 0x1902
+ VF610_PAD_PTE14__DCU0_G1 0x1902
+ VF610_PAD_PTE15__DCU0_G2 0x1902
+ VF610_PAD_PTE16__DCU0_G3 0x1902
+ VF610_PAD_PTE17__DCU0_G4 0x1902
+ VF610_PAD_PTE18__DCU0_G5 0x1902
+ VF610_PAD_PTE19__DCU0_G6 0x1902
+ VF610_PAD_PTE20__DCU0_G7 0x1902
+ VF610_PAD_PTE21__DCU0_B0 0x1902
+ VF610_PAD_PTE22__DCU0_B1 0x1902
+ VF610_PAD_PTE23__DCU0_B2 0x1902
+ VF610_PAD_PTE24__DCU0_B3 0x1902
+ VF610_PAD_PTE25__DCU0_B4 0x1902
+ VF610_PAD_PTE26__DCU0_B5 0x1902
+ VF610_PAD_PTE27__DCU0_B6 0x1902
+ VF610_PAD_PTE28__DCU0_B7 0x1902
>;
};
@@ -169,6 +271,67 @@
>;
};
+ pinctrl_gpio_bl_on: gpio_bl_on {
+ fsl,pins = <
+ VF610_PAD_PTC0__GPIO_45 0x22ef
+ >;
+ };
+
+ pinctrl_hog_0: hoggrp-0 {
+ fsl,pins = <
+ VF610_PAD_PTA12__GPIO_5 0x22ed
+ VF610_PAD_PTA17__GPIO_7 0x22ed
+ VF610_PAD_PTA20__GPIO_10 0x22ed
+ VF610_PAD_PTA21__GPIO_11 0x22ed
+ VF610_PAD_PTA30__GPIO_20 0x22ed
+ VF610_PAD_PTA31__GPIO_21 0x22ed
+ VF610_PAD_PTB6__GPIO_28 0x22ed
+ VF610_PAD_PTB7__GPIO_29 0x22ed
+ VF610_PAD_PTB16__GPIO_38 0x22ed
+ VF610_PAD_PTB17__GPIO_39 0x22ed
+ VF610_PAD_PTB18__GPIO_40 0x22ed
+ VF610_PAD_PTB21__GPIO_43 0x22ed
+ VF610_PAD_PTB22__GPIO_44 0x22ed
+ VF610_PAD_PTC1__GPIO_46 0x22ed
+ VF610_PAD_PTC2__GPIO_47 0x22ed
+ VF610_PAD_PTC3__GPIO_48 0x22ed
+ VF610_PAD_PTC4__GPIO_49 0x22ed
+ VF610_PAD_PTC5__GPIO_50 0x22ed
+ VF610_PAD_PTC6__GPIO_51 0x22ed
+ VF610_PAD_PTC7__GPIO_52 0x22ed
+ VF610_PAD_PTC8__GPIO_53 0x22ed
+ VF610_PAD_PTD30__GPIO_64 0x22ed
+ VF610_PAD_PTD29__GPIO_65 0x22ed
+ VF610_PAD_PTD28__GPIO_66 0x22ed
+ VF610_PAD_PTD26__GPIO_68 0x22ed
+ VF610_PAD_PTD25__GPIO_69 0x22ed
+ VF610_PAD_PTD24__GPIO_70 0x22ed
+ VF610_PAD_PTD9__GPIO_88 0x22ed
+ VF610_PAD_PTD10__GPIO_89 0x22ed
+ VF610_PAD_PTD11__GPIO_90 0x22ed
+ VF610_PAD_PTD12__GPIO_91 0x22ed
+ VF610_PAD_PTD13__GPIO_92 0x22ed
+ VF610_PAD_PTB26__GPIO_96 0x22ed
+ VF610_PAD_PTB28__GPIO_98 0x22ed
+ VF610_PAD_PTC30__GPIO_103 0x22ed
+ VF610_PAD_PTA7__GPIO_134 0x22ed
+ >;
+ };
+
+ pinctrl_hog_1: hoggrp-1 { /* ATMEL MXT TOUCH */
+ fsl,pins = <
+ VF610_PAD_PTD27__GPIO_67 0x22ed
+ VF610_PAD_PTD31__GPIO_63 0x22ed
+ >;
+ };
+
+ pinctrl_hog_2: hoggrp-2 {
+ fsl,pins = <
+ VF610_PAD_PTB12__GPIO_34 0x22ed
+ VF610_PAD_PTB13__GPIO_35 0x22ed
+ >;
+ };
+
pinctrl_i2c0: i2c0grp {
fsl,pins = <
VF610_PAD_PTB14__I2C0_SCL 0x37ff
@@ -195,16 +358,26 @@
>;
};
- pinctrl_pwm0: pwm0grp {
+ pinctrl_pwm0_a: pwm0agrp {
fsl,pins = <
VF610_PAD_PTB0__FTM0_CH0 0x1182
+ >;
+ };
+
+ pinctrl_pwm0_c: pwm0cgrp {
+ fsl,pins = <
VF610_PAD_PTB1__FTM0_CH1 0x1182
>;
};
- pinctrl_pwm1: pwm1grp {
+ pinctrl_pwm1_b: pwm1bgrp {
fsl,pins = <
VF610_PAD_PTB8__FTM1_CH0 0x1182
+ >;
+ };
+
+ pinctrl_pwm1_d: pwm1dgrp {
+ fsl,pins = <
VF610_PAD_PTB9__FTM1_CH1 0x1182
>;
};
@@ -213,6 +386,8 @@
fsl,pins = <
VF610_PAD_PTB10__UART0_TX 0x21a2
VF610_PAD_PTB11__UART0_RX 0x21a1
+ VF610_PAD_PTB12__UART0_RTS 0x21a2
+ VF610_PAD_PTB13__UART0_CTS 0x21a1
>;
};
@@ -232,6 +407,12 @@
>;
};
+ pinctrl_usbc_det: gpio_usbc_det {
+ fsl,pins = <
+ VF610_PAD_PTC29__GPIO_102 0x22cd
+ >;
+ };
+
pinctrl_usbh1_reg: gpio_usb_vbus {
fsl,pins = <
VF610_PAD_PTD4__GPIO_83 0x22ed
diff --git a/arch/arm/boot/dts/vf500-colibri-aster.dts b/arch/arm/boot/dts/vf500-colibri-aster.dts
new file mode 100644
index 000000000000..e314a7ab67ae
--- /dev/null
+++ b/arch/arm/boot/dts/vf500-colibri-aster.dts
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2017 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf500-colibri.dtsi"
+#include "vf-colibri-aster.dtsi"
+
+/ {
+ model = "Toradex Colibri VF50 on Colibri Aster Board";
+ compatible = "toradex,vf500-colibri_vf50-on-aster", "toradex,vf500-colibri_vf50", "fsl,vf500";
+};
+
+&touchscreen {
+ vf50-ts-min-pressure = <200>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/vf500-colibri-dual-eth.dts b/arch/arm/boot/dts/vf500-colibri-dual-eth.dts
new file mode 100644
index 000000000000..24990e241e0e
--- /dev/null
+++ b/arch/arm/boot/dts/vf500-colibri-dual-eth.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2014 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf500-colibri.dtsi"
+#include "vf-colibri-dual-eth.dtsi"
+
+/ {
+ model = "Toradex Colibri VF50 on Dual Ethernet Board";
+ compatible = "toradex,vf500-colibri_vf50-on-dual-eth-board", "toradex,vf500-colibri_vf50", "fsl,vf500";
+};
diff --git a/arch/arm/boot/dts/vf500-colibri.dtsi b/arch/arm/boot/dts/vf500-colibri.dtsi
index 84f091d1fcf2..731ff0091c9d 100644
--- a/arch/arm/boot/dts/vf500-colibri.dtsi
+++ b/arch/arm/boot/dts/vf500-colibri.dtsi
@@ -37,6 +37,11 @@
};
};
+&nfc {
+ assigned-clocks = <&clks VF610_CLK_NFC>;
+ assigned-clock-rates = <33000000>;
+};
+
&iomuxc {
vf610-colibri {
pinctrl_touchctrl_idle: touchctrl_idle {
diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi
index e976d2fa1527..f2be079aae51 100644
--- a/arch/arm/boot/dts/vf500.dtsi
+++ b/arch/arm/boot/dts/vf500.dtsi
@@ -43,6 +43,16 @@
clocks = <&clks VF610_CLK_PLATFORM_BUS>;
};
};
+
+ aips-bus@40080000 {
+
+ pmu@40089000 {
+ compatible = "arm,cortex-a5-pmu";
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a5_cpu>;
+ };
+ };
+
};
};
diff --git a/arch/arm/boot/dts/vf610-colibri-aster.dts b/arch/arm/boot/dts/vf610-colibri-aster.dts
new file mode 100644
index 000000000000..55efc161001e
--- /dev/null
+++ b/arch/arm/boot/dts/vf610-colibri-aster.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2017 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf610-colibri.dtsi"
+#include "vf-colibri-aster.dtsi"
+
+/ {
+ model = "Toradex Colibri VF61 on Colibri Aster Board";
+ compatible = "toradex,vf610-colibri_vf61-on-aster", "toradex,vf610-colibri_vf61", "fsl,vf610";
+};
diff --git a/arch/arm/boot/dts/vf610-colibri-dual-eth.dts b/arch/arm/boot/dts/vf610-colibri-dual-eth.dts
new file mode 100644
index 000000000000..a2eff553956c
--- /dev/null
+++ b/arch/arm/boot/dts/vf610-colibri-dual-eth.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2014 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf610-colibri.dtsi"
+#include "vf-colibri-dual-eth.dtsi"
+
+/ {
+ model = "Toradex Colibri VF61 on Dual Ethernet Board";
+ compatible = "toradex,vf610-colibri_vf61-on-dual-eth-board", "toradex,vf610-colibri_vf61", "fsl,vf610";
+};
diff --git a/arch/arm/boot/dts/vf610-colibri.dtsi b/arch/arm/boot/dts/vf610-colibri.dtsi
index 2d7eab755210..a8d59f7bef06 100644
--- a/arch/arm/boot/dts/vf610-colibri.dtsi
+++ b/arch/arm/boot/dts/vf610-colibri.dtsi
@@ -17,4 +17,115 @@
memory {
reg = <0x80000000 0x10000000>;
};
+
+ sound {
+ compatible = "fsl,fsl-sai-audio-wm9712";
+ fsl,ac97-controller = <&sai2>;
+
+ fsl,model = "Colibri VF61 AC97 Audio";
+
+ fsl,audio-routing =
+ "Headphone", "HPOUTL",
+ "Headphone", "HPOUTR",
+ "LINEINL", "LineIn",
+ "LINEINR", "LineIn",
+ "MIC1", "Mic";
+ };
+};
+
+&nfc {
+ assigned-clocks = <&clks VF610_CLK_NFC>;
+ assigned-clock-rates = <50000000>;
+};
+
+&sai0 {
+ compatible = "fsl,vf610-sai-clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai0>;
+ status = "okay";
+};
+
+&sai2 {
+ compatible = "fsl,vf610-sai-ac97";
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default", "sleep", "ac97-running", "ac97-reset",
+ "ac97-warm-reset";
+ pinctrl-0 = <&pinctrl_sai2_ac97_default>;
+ pinctrl-1 = <&pinctrl_sai2_ac97_sleep>;
+ pinctrl-2 = <&pinctrl_sai2_ac97_running>;
+ pinctrl-3 = <&pinctrl_sai2_ac97_reset>;
+ pinctrl-4 = <&pinctrl_sai2_ac97_warm_reset>;
+ ac97-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH &gpio0 8 GPIO_ACTIVE_HIGH
+ &gpio0 13 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&iomuxc {
+ vf610-colibri {
+ pinctrl_sai0: sai0grp_1 {
+ fsl,pins = <
+ VF610_PAD_PTB23__SAI0_TX_BCLK 0x31C3
+ >;
+ };
+
+ pinctrl_sai2_ac97_default: sai2grp_1 {
+ fsl,pins = <
+ /* Pen-down */
+ VF610_PAD_PTA11__GPIO_4 0x22ed
+
+ /* GenIRQ */
+ VF610_PAD_PTB2__GPIO_24 0x22e1
+ >;
+ };
+
+ pinctrl_sai2_ac97_sleep: sai2grp_2 {
+ fsl,pins = <
+ /* AC97 Reset (cold reset) floating */
+ VF610_PAD_PTA23__GPIO_13 0x22c1
+ >;
+ };
+
+ pinctrl_sai2_ac97_running: sai2grp_3 {
+ fsl,pins = <
+ /* AC97 Bit clock */
+ VF610_PAD_PTA16__SAI2_TX_BCLK 0x31C3
+
+ /* AC97 SData Out */
+ VF610_PAD_PTA18__SAI2_TX_DATA 0x31C2
+
+ /* AC97 Sync */
+ VF610_PAD_PTA19__SAI2_TX_SYNC 0x31C3
+
+ /* AC97 SData In */
+ VF610_PAD_PTA22__SAI2_RX_DATA 0x0041
+ >;
+ };
+
+ pinctrl_sai2_ac97_reset: sai2grp_4 {
+ fsl,pins = <
+ VF610_PAD_PTA16__SAI2_TX_BCLK 0x31C1
+
+ /* AC97 SData Out (test mode selection) */
+ VF610_PAD_PTA18__GPIO_8 0x22c1
+
+ /* AC97 Sync (warm reset) */
+ VF610_PAD_PTA19__GPIO_9 0x22c1
+
+ /* AC97 Reset (cold reset) */
+ VF610_PAD_PTA23__GPIO_13 0x22c1
+ >;
+ };
+
+ pinctrl_sai2_ac97_warm_reset: sai2grp_5 {
+ fsl,pins = <
+ /* AC97 SData Out (test mode selection) */
+ VF610_PAD_PTA18__GPIO_8 0x22c1
+
+ /* AC97 Sync (warm reset) */
+ VF610_PAD_PTA19__GPIO_9 0x22c1
+ >;
+ };
+
+
+ };
};
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 5438ee4be2ec..8419c0607f9b 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -96,6 +96,10 @@
&clks {
clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
+ assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
+ <&clks VF610_CLK_ENET_TS_SEL>;
+ assigned-clock-parents = <&clks VF610_CLK_ENET_EXT>,
+ <&clks VF610_CLK_ENET_EXT>;
};
&dspi0 {
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 58bc6e448be5..f731b598e2c5 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -22,4 +22,31 @@
arm,data-latency = <3 3 3>;
arm,tag-latency = <2 2 2>;
};
+
+ sema4: sema4@4001D000 {
+ compatible = "fsl,vf610-sema4";
+ reg = <0x4001D000 0x1000>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ CM4: cortexm4 {
+ compatible = "simple-bus";
+ ranges = <0x1f000000 0x3f000000 0x80000
+ 0x3f000000 0x3f000000 0x80000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cortexm4core {
+ compatible = "fsl,vf610-m4";
+ reg = <0x1f000000 0x80000>,
+ <0x3f000000 0x80000>;
+ reg-names = "pc_ocram", "ps_ocram";
+ fsl,firmware = "freertos-rpmsg.elf";
+ };
+ };
+
+ rpmsg: rpmsg {
+ compatible = "fsl,vf610-rpmsg";
+ status = "okay";
+ };
};
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 3cd1b27f2697..bf4e8048fac8 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -16,6 +16,8 @@
aliases {
can0 = &can0;
can1 = &can1;
+ ethernet0 = &fec0;
+ ethernet1 = &fec1;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -53,9 +55,56 @@
soc {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&mscm_ir>;
+ compatible = "fsl,vf610-soc-bus", "simple-bus";
+ interrupt-parent = <&gpc>;
ranges;
+ fsl,rom-revision = <&ocrom 0x80>;
+ fsl,cpu-count = <&mscm_cpucfg 0x2C>;
+ fsl,l2-size = <&mscm_cpucfg 0x14>;
+ nvmem-cells = <&ocotp_cfg0>, <&ocotp_cfg1>;
+ nvmem-cell-names = "cfg0", "cfg1";
+
+ ocrom: ocrom@00000000 {
+ compatible = "fsl,vf610-ocrom", "syscon";
+ reg = <0x00000000 0x18000>;
+ };
+
+ ocram0: sram@3f000000 {
+ compatible = "mmio-sram";
+ reg = <0x3f000000 0x40000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x3f000000 0x40000>;
+
+ stbyram1@0 {
+ reg = <0x0 0x4000>;
+ label = "stbyram1";
+ pool;
+ };
+
+ stbyram2@4000 {
+ reg = <0x4000 0xc000>;
+ label = "stbyram2";
+ pool;
+ };
+ };
+
+ ocram1: sram@3f040000 {
+ compatible = "mmio-sram";
+ reg = <0x3f040000 0x40000>;
+ };
+
+ gfxram0: sram@3f400000 {
+ compatible = "mmio-sram";
+ reg = <0x3f400000 0x80000>;
+ };
+
+ /* used by L2 cache */
+ gfxram1: sram@3f480000 {
+ compatible = "mmio-sram";
+ reg = <0x3f480000 0x80000>;
+ };
aips0: aips-bus@40000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -70,10 +119,22 @@
mscm_ir: interrupt-controller@40001800 {
compatible = "fsl,vf610-mscm-ir";
+ #address-cells = <1>;
+ #size-cells = <1>;
reg = <0x40001800 0x400>;
fsl,cpucfg = <&mscm_cpucfg>;
interrupt-controller;
#interrupt-cells = <2>;
+
+ cpu2cpu@40001800 {
+ reg = <0x40001800 0x40>;
+ interrupt-parent = <&mscm_ir>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>,
+ <1 IRQ_TYPE_LEVEL_HIGH>,
+ <2 IRQ_TYPE_LEVEL_HIGH>,
+ <3 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1", "int2", "int3";
+ };
};
edma0: dma-controller@40018000 {
@@ -159,6 +220,9 @@
clocks = <&clks VF610_CLK_DSPI0>;
clock-names = "dspi";
spi-num-chipselects = <6>;
+ dmas = <&edma1 1 12>,
+ <&edma1 1 13>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -171,6 +235,37 @@
clocks = <&clks VF610_CLK_DSPI1>;
clock-names = "dspi";
spi-num-chipselects = <4>;
+ dmas = <&edma1 1 14>,
+ <&edma1 1 15>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai0: sai@4002f000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x4002f000 0x1000>;
+ interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_SAI0>,
+ <&clks VF610_CLK_SAI0_DIV>,
+ <&clks 0>, <&clks 0>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 0 17>,
+ <&edma0 0 16>;
+ status = "disabled";
+ };
+
+ sai1: sai@40030000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x40030000 0x1000>;
+ interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_SAI1>,
+ <&clks VF610_CLK_SAI1_DIV>,
+ <&clks 0>, <&clks 0>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 0 19>,
+ <&edma0 0 18>;
status = "disabled";
};
@@ -188,6 +283,20 @@
status = "disabled";
};
+ sai3: sai@40032000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x40032000 0x1000>;
+ interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_SAI3>,
+ <&clks VF610_CLK_SAI3_DIV>,
+ <&clks 0>, <&clks 0>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 9>,
+ <&edma0 1 8>;
+ status = "disabled";
+ };
+
pit: pit@40037000 {
compatible = "fsl,vf610-pit";
reg = <0x40037000 0x1000>;
@@ -234,6 +343,14 @@
<20000000>;
};
+ tcon0: timing-controller@4003d000 {
+ compatible = "fsl,vf610-tcon";
+ reg = <0x4003d000 0x1000>;
+ clocks = <&clks VF610_CLK_TCON0>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
wdoga5: wdog@4003e000 {
compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
reg = <0x4003e000 0x1000>;
@@ -270,6 +387,7 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&iomuxc 0 0 32>;
+ fsl,gpio-wakeup = <&wakeup 22 0 8>; /* PTB0...PTB7 */
};
gpio1: gpio@4004a000 {
@@ -281,6 +399,10 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&iomuxc 0 32 32>;
+ fsl,gpio-wakeup = <&wakeup 1 8 2>, /* PTB11, PTB12 (NMI)*/
+ <&wakeup 4 10 1>, /* PTB14 */
+ <&wakeup 6 11 1>, /* PTB16 */
+ <&wakeup 9 12 2>; /* PTB19, PTB20 */
};
gpio2: gpio@4004b000 {
@@ -303,6 +425,9 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&iomuxc 0 96 32>;
+ fsl,gpio-wakeup = <&wakeup 1 14 1>, /* PTB27 */
+ <&wakeup 7 15 1>, /* PTC30 */
+ <&wakeup 29 16 1>; /* PTE20 */
};
gpio4: gpio@4004d000 {
@@ -321,6 +446,11 @@
reg = <0x40050000 0x400>;
};
+ scsc: scsc@40052000 {
+ compatible = "fsl,vf610-scsc";
+ reg = <0x40052000 0x1000>;
+ };
+
usbphy0: usbphy@40050800 {
compatible = "fsl,vf610-usbphy";
reg = <0x40050800 0x400>;
@@ -339,6 +469,17 @@
status = "disabled";
};
+ dcu0: dcu@40058000 {
+ compatible = "fsl,vf610-dcu";
+ reg = <0x40058000 0x1200>;
+ interrupts = <30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_DCU0>,
+ <&clks VF610_CLK_DCU0_DIV>;
+ clock-names = "dcu", "pix";
+ fsl,tcon = <&tcon0>;
+ status = "disabled";
+ };
+
i2c0: i2c@40066000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -367,8 +508,15 @@
status = "disabled";
};
+ wakeup: wkpu@4006a000 {
+ compatible = "fsl,vf610-wkpu";
+ reg = <0x4006a000 0x1000>;
+ interrupts = <92 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_WKPU>;
+ };
+
clks: ccm@4006b000 {
- compatible = "fsl,vf610-ccm";
+ compatible = "fsl,vf610-ccm", "syscon";
reg = <0x4006b000 0x1000>;
clocks = <&sxosc>, <&fxosc>;
clock-names = "sxosc", "fxosc";
@@ -376,7 +524,7 @@
};
usbdev0: usb@40034000 {
- compatible = "fsl,vf610-usb", "fsl,imx27-usb";
+ compatible = "fsl,vf610-usb";
reg = <0x40034000 0x800>;
interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_USBC0>;
@@ -399,6 +547,14 @@
reg = <0x4006e000 0x1000>;
interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ gpc: gpc@4006c000 {
+ compatible = "fsl,vf610-gpc";
+ reg = <0x4006c000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&mscm_ir>;
+ };
};
aips1: aips-bus@40080000 {
@@ -423,6 +579,22 @@
status = "disabled";
};
+ ocotp@400a5000 {
+ compatible = "fsl,vf610-ocotp";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x400a5000 0xCF0>;
+ clocks = <&clks VF610_CLK_OCOTP>;
+
+ ocotp_cfg0: cfg0@410 {
+ reg = <0x410 0x4>;
+ };
+
+ ocotp_cfg1: cfg1@420 {
+ reg = <0x420 0x4>;
+ };
+ };
+
snvs0: snvs@400a7000 {
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
reg = <0x400a7000 0x2000>;
@@ -455,6 +627,43 @@
status = "disabled";
};
+ dspi2: dspi2@400ac000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,vf610-dspi";
+ reg = <0x400ac000 0x1000>;
+ interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_DSPI2>;
+ clock-names = "dspi";
+ spi-num-chipselects = <2>;
+ dmas = <&edma1 0 10>,
+ <&edma1 0 11>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ dspi3: dspi3@400ad000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,vf610-dspi";
+ reg = <0x400ad000 0x1000>;
+ interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_DSPI3>;
+ clock-names = "dspi";
+ spi-num-chipselects = <2>;
+ dmas = <&edma1 0 12>,
+ <&edma1 0 13>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ ddrmc: ddrmc@400ae000 {
+ compatible = "fsl,vf610-ddrmc";
+ reg = <0x400ae000 0x400>;
+ clocks = <&clks VF610_CLK_DDRMC>;
+ clock-names = "ddrc";
+ };
+
adc1: adc@400bb000 {
compatible = "fsl,vf610-adc";
reg = <0x400bb000 0x1000>;
@@ -490,7 +699,7 @@
};
usbh1: usb@400b4000 {
- compatible = "fsl,vf610-usb", "fsl,imx27-usb";
+ compatible = "fsl,vf610-usb";
reg = <0x400b4000 0x800>;
interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_USBC1>;
@@ -534,6 +743,24 @@
status = "disabled";
};
+ dac0: dac@400cc000 {
+ compatible = "fsl,vf610-dac";
+ reg = <0x400cc000 1000>;
+ interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "dac";
+ clocks = <&clks VF610_CLK_DAC0>;
+ status = "disabled";
+ };
+
+ dac1: dac@400cd000 {
+ compatible = "fsl,vf610-dac";
+ reg = <0x400cd000 1000>;
+ interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "dac";
+ clocks = <&clks VF610_CLK_DAC1>;
+ status = "disabled";
+ };
+
fec0: ethernet@400d0000 {
compatible = "fsl,mvf600-fec";
reg = <0x400d0000 0x1000>;
@@ -577,6 +804,18 @@
status = "disabled";
};
+ esw: l2-switch@400e8000 {
+ compatible = "fsl,eth-switch";
+ reg = <0x400e8000 0x1000 0x400d0000 0x2000>;
+ interrupts = <82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_ESW>,
+ <&clks VF610_CLK_ENET>,
+ <&clks VF610_CLK_ENET0>,
+ <&clks VF610_CLK_ENET1>;
+ clock-names = "esw", "enet", "enet0", "enet1";
+ status = "disabled";
+ };
+
i2c2: i2c@400e6000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -605,5 +844,10 @@
status = "disabled";
};
};
+
+ adc_hwmon: iio_hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc0 16>, <&adc1 16>;
+ };
};
};