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Diffstat (limited to 'arch/arm/mach-davinci/pm.c')
-rw-r--r--arch/arm/mach-davinci/pm.c102
1 files changed, 57 insertions, 45 deletions
diff --git a/arch/arm/mach-davinci/pm.c b/arch/arm/mach-davinci/pm.c
index 8929569b1f8a..0afd201ab980 100644
--- a/arch/arm/mach-davinci/pm.c
+++ b/arch/arm/mach-davinci/pm.c
@@ -21,15 +21,22 @@
#include <mach/common.h>
#include <mach/da8xx.h>
-#include "sram.h"
+#include <mach/mux.h>
#include <mach/pm.h>
#include "clock.h"
+#include "psc.h"
+#include "sram.h"
+#define DA850_PLL1_BASE 0x01e1a000
#define DEEPSLEEP_SLEEPCOUNT_MASK 0xFFFF
+#define DEEPSLEEP_SLEEPCOUNT 128
static void (*davinci_sram_suspend) (struct davinci_pm_config *);
-static struct davinci_pm_config *pdata;
+static struct davinci_pm_config pm_config = {
+ .sleepcount = DEEPSLEEP_SLEEPCOUNT,
+ .ddrpsc_num = DA8XX_LPSC1_EMIF3C,
+};
static void davinci_sram_push(void *dest, void *src, unsigned int size)
{
@@ -41,58 +48,58 @@ static void davinci_pm_suspend(void)
{
unsigned val;
- if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) {
+ if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
/* Switch CPU PLL to bypass mode */
- val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
+ val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
val &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN);
- __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
+ __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
udelay(PLL_BYPASS_TIME);
/* Powerdown CPU PLL */
- val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
+ val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
val |= PLLCTL_PLLPWRDN;
- __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
+ __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
}
/* Configure sleep count in deep sleep register */
- val = __raw_readl(pdata->deepsleep_reg);
+ val = __raw_readl(pm_config.deepsleep_reg);
val &= ~DEEPSLEEP_SLEEPCOUNT_MASK,
- val |= pdata->sleepcount;
- __raw_writel(val, pdata->deepsleep_reg);
+ val |= pm_config.sleepcount;
+ __raw_writel(val, pm_config.deepsleep_reg);
/* System goes to sleep in this call */
- davinci_sram_suspend(pdata);
+ davinci_sram_suspend(&pm_config);
- if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) {
+ if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
/* put CPU PLL in reset */
- val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
+ val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
val &= ~PLLCTL_PLLRST;
- __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
+ __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
/* put CPU PLL in power down */
- val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
+ val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
val &= ~PLLCTL_PLLPWRDN;
- __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
+ __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
/* wait for CPU PLL reset */
udelay(PLL_RESET_TIME);
/* bring CPU PLL out of reset */
- val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
+ val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
val |= PLLCTL_PLLRST;
- __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
+ __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
/* Wait for CPU PLL to lock */
udelay(PLL_LOCK_TIME);
/* Remove CPU PLL from bypass mode */
- val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
+ val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
val &= ~PLLCTL_PLLENSRC;
val |= PLLCTL_PLLEN;
- __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
+ __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
}
}
@@ -117,17 +124,36 @@ static const struct platform_suspend_ops davinci_pm_ops = {
.valid = suspend_valid_only_mem,
};
-static int __init davinci_pm_probe(struct platform_device *pdev)
+int __init davinci_pm_init(void)
{
- pdata = pdev->dev.platform_data;
- if (!pdata) {
- dev_err(&pdev->dev, "cannot get platform data\n");
- return -ENOENT;
+ int ret;
+
+ ret = davinci_cfg_reg(DA850_RTC_ALARM);
+ if (ret)
+ return ret;
+
+ pm_config.ddr2_ctlr_base = da8xx_get_mem_ctlr();
+ pm_config.deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
+
+ pm_config.cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
+ if (!pm_config.cpupll_reg_base)
+ return -ENOMEM;
+
+ pm_config.ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
+ if (!pm_config.ddrpll_reg_base) {
+ ret = -ENOMEM;
+ goto no_ddrpll_mem;
+ }
+
+ pm_config.ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
+ if (!pm_config.ddrpsc_reg_base) {
+ ret = -ENOMEM;
+ goto no_ddrpsc_mem;
}
davinci_sram_suspend = sram_alloc(davinci_cpu_suspend_sz, NULL);
if (!davinci_sram_suspend) {
- dev_err(&pdev->dev, "cannot allocate SRAM memory\n");
+ pr_err("PM: cannot allocate SRAM memory\n");
return -ENOMEM;
}
@@ -136,23 +162,9 @@ static int __init davinci_pm_probe(struct platform_device *pdev)
suspend_set_ops(&davinci_pm_ops);
- return 0;
-}
-
-static int __exit davinci_pm_remove(struct platform_device *pdev)
-{
- sram_free(davinci_sram_suspend, davinci_cpu_suspend_sz);
- return 0;
-}
-
-static struct platform_driver davinci_pm_driver = {
- .driver = {
- .name = "pm-davinci",
- },
- .remove = __exit_p(davinci_pm_remove),
-};
-
-int __init davinci_pm_init(void)
-{
- return platform_driver_probe(&davinci_pm_driver, davinci_pm_probe);
+no_ddrpsc_mem:
+ iounmap(pm_config.ddrpll_reg_base);
+no_ddrpll_mem:
+ iounmap(pm_config.cpupll_reg_base);
+ return ret;
}