diff options
Diffstat (limited to 'arch/arm/mach-mv78xx0/include')
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/bridge-regs.h | 37 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/hardware.h | 14 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/irqs.h | 94 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 129 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/uncompress.h | 4 |
5 files changed, 1 insertions, 277 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h deleted file mode 100644 index e20d6da234a6..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/bridge-regs.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_BRIDGE_REGS_H -#define __ASM_ARCH_BRIDGE_REGS_H - -#include <mach/mv78xx0.h> - -#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) -#define L2_WRITETHROUGH 0x00020000 - -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) -#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 - -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) -#define SOFT_RESET 0x00000001 - -#define BRIDGE_INT_TIMER1_CLR (~0x0004) - -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) -#define IRQ_CAUSE_ERR_OFF 0x0000 -#define IRQ_CAUSE_LOW_OFF 0x0004 -#define IRQ_CAUSE_HIGH_OFF 0x0008 -#define IRQ_MASK_ERR_OFF 0x000c -#define IRQ_MASK_LOW_OFF 0x0010 -#define IRQ_MASK_HIGH_OFF 0x0014 - -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) -#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) - -#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/hardware.h b/arch/arm/mach-mv78xx0/include/mach/hardware.h deleted file mode 100644 index 67cab0a08e07..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/hardware.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/hardware.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "mv78xx0.h" - -#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h deleted file mode 100644 index ac96bcf3d268..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/irqs.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/irqs.h - * - * IRQ definitions for Marvell MV78xx0 SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -/* - * MV78xx0 Low Interrupt Controller - */ -#define IRQ_MV78XX0_ERR 0 -#define IRQ_MV78XX0_SPI 1 -#define IRQ_MV78XX0_I2C_0 2 -#define IRQ_MV78XX0_I2C_1 3 -#define IRQ_MV78XX0_IDMA_0 4 -#define IRQ_MV78XX0_IDMA_1 5 -#define IRQ_MV78XX0_IDMA_2 6 -#define IRQ_MV78XX0_IDMA_3 7 -#define IRQ_MV78XX0_TIMER_0 8 -#define IRQ_MV78XX0_TIMER_1 9 -#define IRQ_MV78XX0_TIMER_2 10 -#define IRQ_MV78XX0_TIMER_3 11 -#define IRQ_MV78XX0_UART_0 12 -#define IRQ_MV78XX0_UART_1 13 -#define IRQ_MV78XX0_UART_2 14 -#define IRQ_MV78XX0_UART_3 15 -#define IRQ_MV78XX0_USB_0 16 -#define IRQ_MV78XX0_USB_1 17 -#define IRQ_MV78XX0_USB_2 18 -#define IRQ_MV78XX0_CRYPTO 19 -#define IRQ_MV78XX0_SDIO_0 20 -#define IRQ_MV78XX0_SDIO_1 21 -#define IRQ_MV78XX0_XOR_0 22 -#define IRQ_MV78XX0_XOR_1 23 -#define IRQ_MV78XX0_I2S_0 24 -#define IRQ_MV78XX0_I2S_1 25 -#define IRQ_MV78XX0_SATA 26 -#define IRQ_MV78XX0_TDMI 27 - -/* - * MV78xx0 High Interrupt Controller - */ -#define IRQ_MV78XX0_PCIE_00 32 -#define IRQ_MV78XX0_PCIE_01 33 -#define IRQ_MV78XX0_PCIE_02 34 -#define IRQ_MV78XX0_PCIE_03 35 -#define IRQ_MV78XX0_PCIE_10 36 -#define IRQ_MV78XX0_PCIE_11 37 -#define IRQ_MV78XX0_PCIE_12 38 -#define IRQ_MV78XX0_PCIE_13 39 -#define IRQ_MV78XX0_GE00_SUM 40 -#define IRQ_MV78XX0_GE00_RX 41 -#define IRQ_MV78XX0_GE00_TX 42 -#define IRQ_MV78XX0_GE00_MISC 43 -#define IRQ_MV78XX0_GE01_SUM 44 -#define IRQ_MV78XX0_GE01_RX 45 -#define IRQ_MV78XX0_GE01_TX 46 -#define IRQ_MV78XX0_GE01_MISC 47 -#define IRQ_MV78XX0_GE10_SUM 48 -#define IRQ_MV78XX0_GE10_RX 49 -#define IRQ_MV78XX0_GE10_TX 50 -#define IRQ_MV78XX0_GE10_MISC 51 -#define IRQ_MV78XX0_GE11_SUM 52 -#define IRQ_MV78XX0_GE11_RX 53 -#define IRQ_MV78XX0_GE11_TX 54 -#define IRQ_MV78XX0_GE11_MISC 55 -#define IRQ_MV78XX0_GPIO_0_7 56 -#define IRQ_MV78XX0_GPIO_8_15 57 -#define IRQ_MV78XX0_GPIO_16_23 58 -#define IRQ_MV78XX0_GPIO_24_31 59 -#define IRQ_MV78XX0_DB_IN 60 -#define IRQ_MV78XX0_DB_OUT 61 - -/* - * MV78xx0 Error Interrupt Controller - */ -#define IRQ_MV78XX0_GE_ERR 70 - -/* - * MV78XX0 General Purpose Pins - */ -#define IRQ_MV78XX0_GPIO_START 96 -#define NR_GPIO_IRQS 32 - -#define MV78XX0_NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) - - -#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h deleted file mode 100644 index 0972d5f9b46d..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/mv78xx0.h - * - * Generic definitions for Marvell MV78xx0 SoC flavors: - * MV781x0 and MV782x0. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_MV78XX0_H -#define __ASM_ARCH_MV78XX0_H - -#include "irqs.h" - -/* - * Marvell MV78xx0 address maps. - * - * phys - * c0000000 PCIe Memory space - * f0800000 PCIe #0 I/O space - * f0900000 PCIe #1 I/O space - * f0a00000 PCIe #2 I/O space - * f0b00000 PCIe #3 I/O space - * f0c00000 PCIe #4 I/O space - * f0d00000 PCIe #5 I/O space - * f0e00000 PCIe #6 I/O space - * f0f00000 PCIe #7 I/O space - * f1000000 on-chip peripheral registers - * - * virt phys size - * fe400000 f102x000 16K core-specific peripheral registers - * fee00000 f0800000 64K PCIe #0 I/O space - * fee10000 f0900000 64K PCIe #1 I/O space - * fee20000 f0a00000 64K PCIe #2 I/O space - * fee30000 f0b00000 64K PCIe #3 I/O space - * fee40000 f0c00000 64K PCIe #4 I/O space - * fee50000 f0d00000 64K PCIe #5 I/O space - * fee60000 f0e00000 64K PCIe #6 I/O space - * fee70000 f0f00000 64K PCIe #7 I/O space - * fd000000 f1000000 1M on-chip peripheral registers - */ -#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 -#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 -#define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000) -#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 -#define MV78XX0_CORE_REGS_SIZE SZ_16K - -#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) -#define MV78XX0_PCIE_IO_SIZE SZ_1M - -#define MV78XX0_REGS_PHYS_BASE 0xf1000000 -#define MV78XX0_REGS_VIRT_BASE IOMEM(0xfd000000) -#define MV78XX0_REGS_SIZE SZ_1M - -#define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000 -#define MV78XX0_PCIE_MEM_SIZE 0x30000000 - -/* - * Core-specific peripheral registers. - */ -#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) -#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE) -#define BRIDGE_WINS_CPU0_BASE (MV78XX0_CORE0_REGS_PHYS_BASE) -#define BRIDGE_WINS_CPU1_BASE (MV78XX0_CORE1_REGS_PHYS_BASE) -#define BRIDGE_WINS_SZ (0xA000) - -/* - * Register Map - */ -#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x00000) -#define DDR_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x00000) -#define DDR_WINDOW_CPU0_BASE (DDR_PHYS_BASE + 0x1500) -#define DDR_WINDOW_CPU1_BASE (DDR_PHYS_BASE + 0x1570) -#define DDR_WINDOW_CPU_SZ (0x20) - -#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x10000) -#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x10000) -#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE + 0x0030) -#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE + 0x0034) -#define GPIO_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0100) -#define I2C_0_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x1000) -#define I2C_1_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x1100) -#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2000) -#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2000) -#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2100) -#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2100) -#define UART2_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2200) -#define UART2_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2200) -#define UART3_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2300) -#define UART3_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2300) - -#define GE10_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x30000) -#define GE11_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x34000) - -#define PCIE00_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x40000) -#define PCIE01_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x44000) -#define PCIE02_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x48000) -#define PCIE03_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x4c000) - -#define USB0_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x50000) -#define USB1_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x51000) -#define USB2_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x52000) - -#define GE00_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x70000) -#define GE01_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x74000) - -#define PCIE10_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x80000) -#define PCIE11_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x84000) -#define PCIE12_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x88000) -#define PCIE13_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x8c000) - -#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0xa0000) - -/* - * Supported devices and revisions. - */ -#define MV78X00_Z0_DEV_ID 0x6381 -#define MV78X00_REV_Z0 1 - -#define MV78100_DEV_ID 0x7810 -#define MV78100_REV_A0 1 -#define MV78100_REV_A1 2 - -#define MV78200_DEV_ID 0x7820 -#define MV78200_REV_A0 1 - -#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/uncompress.h b/arch/arm/mach-mv78xx0/include/mach/uncompress.h index 6a761c44a296..2787ef392262 100644 --- a/arch/arm/mach-mv78xx0/include/mach/uncompress.h +++ b/arch/arm/mach-mv78xx0/include/mach/uncompress.h @@ -1,14 +1,12 @@ /* - * arch/arm/mach-mv78xx0/include/mach/uncompress.h - * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #include <linux/serial_reg.h> -#include <mach/mv78xx0.h> +#define UART0_PHYS_BASE (0xf1000000 + 0x12000) #define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) static void putc(const char c) |