4 files changed, 10 insertions, 52 deletions
diff --git a/arch/arm/mach-mx37/cpu.c b/arch/arm/mach-mx37/cpu.c
index 3832473f781e..3729ac11ca80 100644
--- a/arch/arm/mach-mx37/cpu.c
+++ b/arch/arm/mach-mx37/cpu.c
@@ -25,7 +25,6 @@
 #include <asm/hardware/cache-l2x0.h>
 
 void __iomem *gpc_base;
-void __iomem *ccm_base;
 
 /*!
  * CPU initialization. It is called by fixup_mxc_board()
@@ -74,7 +73,6 @@ static int __init post_cpu_init(void)
 	iram_init(IRAM_BASE_ADDR, iram_size);
 
 	gpc_base = ioremap(GPC_BASE_ADDR, SZ_4K);
-	ccm_base = ioremap(CCM_BASE_ADDR, SZ_4K);
 
 	/* Set ALP bits to 000. Set ALP_EN bit in Arm Memory Controller reg. */
 	reg = __raw_readl(MXC_ARM1176_BASE + 0x1C);
diff --git a/arch/arm/mach-mx37/crm_regs.h b/arch/arm/mach-mx37/crm_regs.h
index bfb9bff13d46..607e7cfd5bdf 100644
--- a/arch/arm/mach-mx37/crm_regs.h
+++ b/arch/arm/mach-mx37/crm_regs.h
@@ -502,11 +502,6 @@
 #define MXC_CCM_CCGR5_CG1_OFFSET			2
 #define MXC_CCM_CCGR5_CG0_OFFSET			0
 
-/* CCM Register Offsets. */
-#define MXC_CCM_CDCR_OFFSET		0x6C
-#define MXC_CCM_CACRR_OFFSET		0x10
-#define MXC_CCM_CDHIPR_OFFSET	0x68
-
 #define MXC_ARM1176_BASE	IO_ADDRESS(ARM1176_BASE_ADDR)
 #define MXC_GPC_BASE		IO_ADDRESS(GPC_BASE_ADDR)
 #define MXC_DPTC_LP_BASE	IO_ADDRESS(GPC_BASE_ADDR + 0x80)
@@ -535,11 +530,6 @@
 #define MXC_GPC_PGR		(MXC_GPC_BASE + 0x4)
 #define MXC_GPC_VCR			(MXC_GPC_BASE + 0x8)
 
-/*GPC OFFSETS */
-#define MXC_GPC_CNTR_OFFSET		0x0
-#define MXC_GPC_PGR_OFFSET		0x4
-#define MXC_GPC_VCR_OFFSET		0x8
-
 /* DVFS CORE */
 #define MXC_DVFSTHRS		(MXC_DVFS_CORE_BASE + 0x00)
 #define MXC_DVFSCOUN		(MXC_DVFS_CORE_BASE + 0x04)
diff --git a/arch/arm/mach-mx37/devices.c b/arch/arm/mach-mx37/devices.c
index ce1f33112396..fd4011b36c31 100644
--- a/arch/arm/mach-mx37/devices.c
+++ b/arch/arm/mach-mx37/devices.c
@@ -661,11 +661,11 @@ struct mxc_dvfs_platform_data dvfs_core_data = {
 	.reg_id = "SW1",
 	.clk1_id = "cpu_clk",
 	.clk2_id = "gpc_dvfs_clk",
-	.gpc_cntr_offset = MXC_GPC_CNTR_OFFSET,
-	.gpc_vcr_offset = MXC_GPC_VCR_OFFSET,
-	.ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET,
-	.ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET,
-	.ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET,
+	.gpc_cntr_reg_addr = MXC_GPC_CNTR,
+	.gpc_vcr_reg_addr = MXC_GPC_VCR,
+	.ccm_cdcr_reg_addr = MXC_CCM_CDCR,
+	.ccm_cacrr_reg_addr = MXC_CCM_CACRR,
+	.ccm_cdhipr_reg_addr = MXC_CCM_CDHIPR,
 	.prediv_mask = 0x3800,
 	.prediv_offset = 11,
 	.prediv_val = 1,
@@ -1168,22 +1168,6 @@ static inline void mxc_init_ssi(void)
 }
 #endif /* CONFIG_SND_MXC_SOC_SSI */
 
-static struct platform_device mxc_v4l2_device = {
-	.name = "mxc_v4l2_capture",
-	.id = 0,
-};
-
-static struct platform_device mxc_v4l2out_device = {
-	.name = "mxc_v4l2_output",
-	.id = 0,
-};
-
-static inline void mxc_init_v4l2()
-{
-	platform_device_register(&mxc_v4l2_device);
-	platform_device_register(&mxc_v4l2out_device);
-}
-
 int __init mxc_init_devices(void)
 {
 	mxc_init_wdt();
@@ -1205,7 +1189,6 @@ int __init mxc_init_devices(void)
 	mxc_init_rngc();
 	mxc_init_iim();
 	mxc_init_ssi();
-	mxc_init_v4l2();
 
 	return 0;
 }
diff --git a/arch/arm/mach-mx37/usb_dr.c b/arch/arm/mach-mx37/usb_dr.c
index eb7fc463526c..c8cbed1cc2d4 100644
--- a/arch/arm/mach-mx37/usb_dr.c
+++ b/arch/arm/mach-mx37/usb_dr.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2005-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -43,7 +43,7 @@ static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config = {
 
 
 /*
- * OTG resources
+ * resources
  */
 static struct resource otg_resources[] = {
 	[0] = {
@@ -57,20 +57,7 @@ static struct resource otg_resources[] = {
 	},
 };
 
-/*
- * UDC resources (same as OTG resource)
- */
-static struct resource udc_resources[] = {
-	[0] = {
-		.start = (u32)(OTG_BASE_ADDR),
-		.end   = (u32)(OTG_BASE_ADDR + 0x620),
-		.flags = IORESOURCE_MEM,
-	},
-	[1] = {
-		.start = MXC_INT_USB_OTG,
-		.flags = IORESOURCE_IRQ,
-	},
-};
+
 static u64 dr_udc_dmamask = ~(u32) 0;
 static void dr_udc_release(struct device *dev)
 {
@@ -88,8 +75,8 @@ static struct platform_device dr_udc_device = {
 		.dma_mask          = &dr_udc_dmamask,
 		.coherent_dma_mask = 0xffffffff,
 	},
-	.resource      = udc_resources,
-	.num_resources = ARRAY_SIZE(udc_resources),
+	.resource      = otg_resources,
+	.num_resources = ARRAY_SIZE(otg_resources),
 };
 
 static u64 dr_otg_dmamask = ~(u32) 0;