summaryrefslogtreecommitdiff
path: root/arch/arm/mach-mx51
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-mx51')
-rw-r--r--arch/arm/mach-mx51/devices.c14
-rw-r--r--arch/arm/mach-mx51/dummy_gpio.c6
-rw-r--r--arch/arm/mach-mx51/mx51_ccwmx51js.c16
-rw-r--r--arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c202
-rw-r--r--arch/arm/mach-mx51/mx51_ccwmx51js_pmic_mc13892.c1
5 files changed, 225 insertions, 14 deletions
diff --git a/arch/arm/mach-mx51/devices.c b/arch/arm/mach-mx51/devices.c
index 3496580d807f..d1a6f8f42528 100644
--- a/arch/arm/mach-mx51/devices.c
+++ b/arch/arm/mach-mx51/devices.c
@@ -596,6 +596,13 @@ extern void mx51_babbage_gpio_spi_chipselect_active(int cspi_mode, int status,
int chipselect);
extern void mx51_babbage_gpio_spi_chipselect_inactive(int cspi_mode, int status,
int chipselect);
+
+extern void mx51_ccwmx51js_gpio_spi_chipselect_active(int cspi_mode, int status,
+ int chipselect);
+extern void mx51_ccwmx51js_gpio_spi_chipselect_inactive(int cspi_mode, int status,
+ int chipselect);
+
+
/*! Platform Data for MXC CSPI1 */
static struct mxc_spi_master mxcspi1_data = {
.maxchipselect = 4,
@@ -695,9 +702,14 @@ void __init mxc_init_spi(void)
#ifdef CONFIG_SPI_MXC_SELECT1
if (machine_is_mx51_babbage()) {
mxcspi1_data.chipselect_active =
- mx51_babbage_gpio_spi_chipselect_active;
+ mx51_babbage_gpio_spi_chipselect_active;
mxcspi1_data.chipselect_inactive =
mx51_babbage_gpio_spi_chipselect_inactive;
+ } else {
+ mxcspi1_data.chipselect_active =
+ mx51_ccwmx51js_gpio_spi_chipselect_active;
+ mxcspi1_data.chipselect_inactive =
+ mx51_ccwmx51js_gpio_spi_chipselect_inactive;
}
if (platform_device_register(&mxcspi1_device) < 0)
printk(KERN_ERR "Error: Registering the SPI Controller_1\n");
diff --git a/arch/arm/mach-mx51/dummy_gpio.c b/arch/arm/mach-mx51/dummy_gpio.c
index bf21862908ac..ad2388c975a9 100644
--- a/arch/arm/mach-mx51/dummy_gpio.c
+++ b/arch/arm/mach-mx51/dummy_gpio.c
@@ -23,12 +23,6 @@ EXPORT_SYMBOL(gpio_gps_inactive);
void config_uartdma_event(int port) {}
EXPORT_SYMBOL(config_uartdma_event);
-void gpio_spi_active(int cspi_mod) {}
-EXPORT_SYMBOL(gpio_spi_active);
-
-void gpio_spi_inactive(int cspi_mod) {}
-EXPORT_SYMBOL(gpio_spi_inactive);
-
void gpio_owire_active(void) {}
EXPORT_SYMBOL(gpio_owire_active);
diff --git a/arch/arm/mach-mx51/mx51_ccwmx51js.c b/arch/arm/mach-mx51/mx51_ccwmx51js.c
index 84f3c33d73ef..ea724edd2768 100644
--- a/arch/arm/mach-mx51/mx51_ccwmx51js.c
+++ b/arch/arm/mach-mx51/mx51_ccwmx51js.c
@@ -385,6 +385,7 @@ static struct fb_videomode wvga_video_mode =
static struct mxc_fb_platform_data fb_data_vga = {
.interface_pix_fmt = IPU_PIX_FMT_RGB24,
+// .interface_pix_fmt = IPU_PIX_FMT_RGB565, // ttd: testing...
};
@@ -438,7 +439,7 @@ static int __init ccwmx51_init_fb(void)
pr_info("VGA interface is primary\n");
fb_data_vga.mode = 0; // Do not use LCD timings.
- fb_data_vga.mode_str = "1024x768M-24@60"; /* Default */
+ fb_data_vga.mode_str = "1024x768M-16@60"; /* Default */
/* Get the desired configuration provided by the bootloader */
if (options[3] != '@') {
@@ -448,15 +449,15 @@ static int __init ccwmx51_init_fb(void)
options = &options[4];
if (((p = strsep (&options, "@")) != NULL) && *p) {
if (video_matches(p, "640x480") ){
- fb_data_vga.mode_str = "640x480M-24@60";
+ fb_data_vga.mode_str = "640x480M-16@60";
} else if (video_matches(p, "800x600")) {
- fb_data_vga.mode_str = "800x600M-24@60";
+ fb_data_vga.mode_str = "800x600M-16@60";
} else if (video_matches(p, "1024x768")) {
- fb_data_vga.mode_str = "1024x768M-24@60";
+ fb_data_vga.mode_str = "1024x768M-16@60";
} else if (video_matches(p, "1280x1024")) {
- fb_data_vga.mode_str = "1280x1024M-24@60";
+ fb_data_vga.mode_str = "1280x1024M-16@60";
} else if (video_matches(p, "1280x1024")) {
- fb_data_vga.mode_str = "1280x1024M-24@60";
+ fb_data_vga.mode_str = "1280x1024M-16@60";
} else
pr_warning("Unsupported video resolution: %s, using default '%s'\n",
p, fb_data_vga.mode_str);
@@ -467,7 +468,8 @@ static int __init ccwmx51_init_fb(void)
} else if (!strncasecmp(options, "LCD", 3)){
gpio_lcd_active();
fb_data_vga.mode = &wvga_video_mode; // Use timings for Digi LCD.
- fb_data_vga.mode_str = "800x480-24@60",
+// fb_data_vga.mode_str = "800x480-24@60",
+ fb_data_vga.mode_str = "800x480-16@60", // ttd: testing...
pr_info("Using LDC wvga video timings and mode %s\n", fb_data_vga.mode_str);
(void)platform_device_register(&mxc_fb_device[0]); /* LCD */
}
diff --git a/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c b/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c
index 01659b3d3507..41a634d978bf 100644
--- a/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c
+++ b/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c
@@ -544,3 +544,205 @@ void gpio_uart_inactive(int port, int no_irda) {}
EXPORT_SYMBOL(gpio_uart_active);
EXPORT_SYMBOL(gpio_uart_inactive);
+
+
+/*!
+ * Setup GPIO for a CSPI device to be active
+ *
+ * @param cspi_mod an CSPI device
+ */
+
+// ttd: in process: lots of duplication....
+
+void gpio_spi_active(int cspi_mod)
+{
+return;
+ printk("ttd: gpio_spi_active(%d) called\n", cspi_mod);
+// printk("RETURN EARLY\n");
+
+// return;
+
+ switch (cspi_mod) {
+ case 0:
+ /* SPI1 */
+ mxc_request_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0);
+// mxc_request_iomux(MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT0);
+
+
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_MOSI,
+ PAD_CTL_HYS_ENABLE |
+ PAD_CTL_PKE_ENABLE |
+ PAD_CTL_DRV_HIGH |
+ PAD_CTL_SRE_FAST
+ );
+
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_MISO,
+ PAD_CTL_HYS_ENABLE |
+ PAD_CTL_PKE_ENABLE |
+ PAD_CTL_DRV_HIGH |
+ PAD_CTL_SRE_FAST
+ );
+
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SCLK,
+ PAD_CTL_HYS_ENABLE |
+ PAD_CTL_PKE_ENABLE |
+ PAD_CTL_DRV_HIGH |
+ PAD_CTL_SRE_FAST
+ );
+
+
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0,
+ PAD_CTL_SRE_FAST
+ );
+
+
+
+/*
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_RDY,
+ PAD_CTL_HYS_ENABLE |
+ PAD_CTL_PKE_ENABLE |
+ PAD_CTL_DRV_HIGH |
+ PAD_CTL_SRE_FAST
+ );
+*/
+ break;
+ case 1:
+ /* SPI2 */
+ break;
+ default:
+ break;
+ }
+}
+
+
+EXPORT_SYMBOL(gpio_spi_active);
+
+/*!
+ * Setup GPIO for a CSPI device to be inactive
+ *
+ * @param cspi_mod a CSPI device
+ */
+void gpio_spi_inactive(int cspi_mod)
+{
+return;
+ printk("ttd: gpio_spi_inactive(%d)) called\n", cspi_mod);
+ switch (cspi_mod) {
+ case 0:
+ /* SPI1 */
+ gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSPI1_MOSI), NULL);
+ gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSPI1_MISO), NULL);
+ gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSPI1_SS0), NULL);
+ gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSPI1_SCLK), NULL);
+// gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSPI1_RDY), NULL);
+
+ mxc_free_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_GPIO);
+ mxc_free_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_GPIO);
+ mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_GPIO);
+ mxc_free_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_GPIO);
+// mxc_free_iomux(MX51_PIN_CSPI1_RDY, MUX_CONFIG_GPIO);
+
+ // ttd: todo: assert chip select to lower overhead of
+ // subsequent spi messaging.
+
+
+
+ break;
+ case 1:
+ /* SPI2 */
+ break;
+ default:
+ break;
+ }
+
+}
+
+
+EXPORT_SYMBOL(gpio_spi_inactive);
+
+// ttd: trying the babbage hack. Currently, this code is gross.
+
+/* workaround for cspi chipselect pin may not keep correct level when idle */
+void mx51_ccwmx51js_gpio_spi_chipselect_active(int cspi_mode, int status,
+ int chipselect)
+{
+ u32 gpio;
+
+// testing!!!
+// return;
+// printk("mx51_ccwmx51js_gpio_spi_chipselect_active(mode=%d, status=%d, chipselect=%d)\n",
+// cspi_mode, status, chipselect);
+
+ switch (cspi_mode) {
+ case 1:
+ switch (chipselect) {
+ case 0x1:
+ mxc_request_iomux(MX51_PIN_CSPI1_SS0,
+ IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0,
+ PAD_CTL_HYS_ENABLE |
+ PAD_CTL_PKE_ENABLE |
+ PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST);
+
+ gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSPI1_SS0), 0);
+
+ break;
+ case 0x2:
+ gpio = IOMUX_TO_GPIO(MX51_PIN_CSPI1_SS0);
+ mxc_request_iomux(MX51_PIN_CSPI1_SS0,
+ IOMUX_CONFIG_GPIO);
+ gpio_request(gpio, "cspi1_ss0");
+ gpio_direction_output(gpio, 0);
+ gpio_set_value(gpio, 1 & (~status));
+ break;
+ default:
+ break;
+ }
+ break;
+ case 2:
+ break;
+ case 3:
+ break;
+ default:
+ break;
+ }
+}
+EXPORT_SYMBOL(mx51_ccwmx51js_gpio_spi_chipselect_active);
+
+void mx51_ccwmx51js_gpio_spi_chipselect_inactive(int cspi_mode, int status,
+ int chipselect)
+{
+// printk("mx51_ccwmx51js_gpio_spi_chipselect_inactive(mode=%d, status=%d, chipselect=%d)\n",
+// cspi_mode, status, chipselect);
+
+
+// testing!!!
+return;
+
+ switch (cspi_mode) {
+ case 1:
+ switch (chipselect) {
+ case 0x1:
+ mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_CSPI1_SS0,
+ IOMUX_CONFIG_GPIO);
+ mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_GPIO);
+ break;
+ case 0x2:
+ mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_GPIO);
+ break;
+ default:
+ break;
+ }
+ break;
+ case 2:
+ break;
+ case 3:
+ break;
+ default:
+ break;
+ }
+}
+EXPORT_SYMBOL(mx51_ccwmx51js_gpio_spi_chipselect_inactive);
diff --git a/arch/arm/mach-mx51/mx51_ccwmx51js_pmic_mc13892.c b/arch/arm/mach-mx51/mx51_ccwmx51js_pmic_mc13892.c
index f650724871ea..d51fae4986c4 100644
--- a/arch/arm/mach-mx51/mx51_ccwmx51js_pmic_mc13892.c
+++ b/arch/arm/mach-mx51/mx51_ccwmx51js_pmic_mc13892.c
@@ -359,3 +359,4 @@ int __init ccwmx51_init_mc13892(void)
return spi_register_board_info(&mc13892_spi_device, 1);
}
+
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-10 19:58:57 +0000