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Diffstat (limited to 'arch/arm/mach-mx6/board-mx6q_sabrelite.c')
-rw-r--r--arch/arm/mach-mx6/board-mx6q_sabrelite.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabrelite.c b/arch/arm/mach-mx6/board-mx6q_sabrelite.c
index bb82ddec55a4..c0065bfc24d4 100644
--- a/arch/arm/mach-mx6/board-mx6q_sabrelite.c
+++ b/arch/arm/mach-mx6/board-mx6q_sabrelite.c
@@ -95,6 +95,7 @@
#define MX6Q_SABRELITE_VOL_DOWN_KEY IMX_GPIO_NR(4, 5)
#define MX6Q_SABRELITE_CSI0_RST IMX_GPIO_NR(1, 8)
#define MX6Q_SABRELITE_CSI0_PWN IMX_GPIO_NR(1, 6)
+#define MX6Q_SABRELITE_ENET_PHY_INT IMX_GPIO_NR(1, 28)
#define N6_WL1271_WL_IRQ IMX_GPIO_NR(6, 14)
#define N6_WL1271_WL_EN IMX_GPIO_NR(6, 15)
@@ -496,13 +497,17 @@ static const struct imxuart_platform_data mx6_arm2_uart2_data __initconst = {
static int mx6q_sabrelite_fec_phy_init(struct phy_device *phydev)
{
- /* prefer master mode, disable 1000 Base-T capable */
- phy_write(phydev, 0x9, 0x1c00);
+ /* prefer master mode */
+ phy_write(phydev, 0x9, 0x1f00);
/* min rx data delay */
phy_write(phydev, 0x0b, 0x8105);
phy_write(phydev, 0x0c, 0x0000);
+ /* min tx data delay */
+ phy_write(phydev, 0x0b, 0x8106);
+ phy_write(phydev, 0x0c, 0x0000);
+
/* max rx/tx clock delay, min rx/tx control delay */
phy_write(phydev, 0x0b, 0x8104);
phy_write(phydev, 0x0c, 0xf0f0);
@@ -514,6 +519,7 @@ static int mx6q_sabrelite_fec_phy_init(struct phy_device *phydev)
static struct fec_platform_data fec_data __initdata = {
.init = mx6q_sabrelite_fec_phy_init,
.phy = PHY_INTERFACE_MODE_RGMII,
+ .phy_irq = gpio_to_irq(MX6Q_SABRELITE_ENET_PHY_INT)
};
static int mx6q_sabrelite_spi_cs[] = {