diff options
Diffstat (limited to 'arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c')
| -rw-r--r-- | arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c | 106 |
1 files changed, 65 insertions, 41 deletions
diff --git a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c index cbde44955f03..6b38bd000bc0 100644 --- a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c +++ b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c @@ -41,36 +41,14 @@ #define PFUZE100_I2C_DEVICE_NAME "pfuze100" /* 7-bit I2C bus slave address */ -#define PFUZE100_I2C_ADDR (0x08) - /*SWBST*/ -#define PFUZE100_SW1AVOL 32 -#define PFUZE100_SW1AVOL_VSEL_M (0x3f<<0) -#define PFUZE100_SW1CVOL 46 -#define PFUZE100_SW1CVOL_VSEL_M (0x3f<<0) -#define PFUZE100_SW1ASTANDBY 33 -#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x19) -#define PFUZE100_SW1ASTANDBY_STBY_M (0x3f<<0) -#define PFUZE100_SW1BSTANDBY 40 -#define PFUZE100_SW1BSTANDBY_STBY_VAL (0x19) -#define PFUZE100_SW1BSTANDBY_STBY_M (0x3f<<0) -#define PFUZE100_SW1CSTANDBY 47 -#define PFUZE100_SW1CSTANDBY_STBY_VAL (0x19) -#define PFUZE100_SW1CSTANDBY_STBY_M (0x3f<<0) -#define PFUZE100_SW2STANDBY 54 -#define PFUZE100_SW2STANDBY_STBY_VAL 0x0 -#define PFUZE100_SW2STANDBY_STBY_M (0x3f<<0) -#define PFUZE100_SW3ASTANDBY 61 -#define PFUZE100_SW3ASTANDBY_STBY_VAL 0x0 -#define PFUZE100_SW3ASTANDBY_STBY_M (0x3f<<0) -#define PFUZE100_SW3BSTANDBY 68 -#define PFUZE100_SW3BSTANDBY_STBY_VAL 0x0 -#define PFUZE100_SW3BSTANDBY_STBY_M (0x3f<<0) -#define PFUZE100_SW4STANDBY 75 -#define PFUZE100_SW4STANDBY_STBY_VAL 0 -#define PFUZE100_SW4STANDBY_STBY_M (0x3f<<0) -#define PFUZE100_SWBSTCON1 102 -#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL (0x1<<2) -#define PFUZE100_SWBSTCON1_SWBSTMOD_M (0x3<<2) +#define PFUZE100_I2C_ADDR (0x08) +#define PFUZE100_DEVICEID (0x0) +#define PFUZE100_REVID (0x3) +#define PFUZE100_SW1AMODE (0x23) +#define PFUZE100_SW1AVOL 32 +#define PFUZE100_SW1AVOL_VSEL_M (0x3f<<0) +#define PFUZE100_SW1CVOL 46 +#define PFUZE100_SW1CVOL_VSEL_M (0x3f<<0) #define PFUZE100_SW1ACON 36 #define PFUZE100_SW1ACON_SPEED_VAL (0x1<<6) /*default */ #define PFUZE100_SW1ACON_SPEED_M (0x3<<6) @@ -166,7 +144,13 @@ static struct regulator_init_data sw1a_init = { .valid_modes_mask = 0, .boot_on = 1, .always_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 975000,/*0.9V+6%*/ + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, }, + }, #ifdef CONFIG_MX6_INTER_LDO_BYPASS .num_consumer_supplies = ARRAY_SIZE(sw1_consumers), @@ -195,7 +179,13 @@ static struct regulator_init_data sw1c_init = { .valid_modes_mask = 0, .always_on = 1, .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 975000,/*0.9V+6%*/ + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, }, + }, #ifdef CONFIG_MX6_INTER_LDO_BYPASS .num_consumer_supplies = ARRAY_SIZE(sw1c_consumers), .consumer_supplies = sw1c_consumers, @@ -399,8 +389,52 @@ static struct regulator_init_data vgen6_init = { static int pfuze100_init(struct mc_pfuze *pfuze) { - int ret; + int ret, i; unsigned int reg; + unsigned char value; + /*read Device ID*/ + ret = pfuze_reg_read(pfuze, PFUZE100_DEVICEID, &value); + if (ret) + goto err; + if (value != 0x10) { + printk(KERN_ERR "wrong device id:%x!\n", value); + goto err; + } + + /*read Revision ID*/ + ret = pfuze_reg_read(pfuze, PFUZE100_REVID, &value); + if (ret) + goto err; + if (value == 0x10) { + printk(KERN_WARNING "PF100 1.0 chip found!\n"); + /* workaround ER1 of pfuze1.0: set all buck regulators in PWM mode + * except SW1C(APS) in normal and PFM mode in standby. + */ + for (i = 0; i < 7; i++) { + if (i == 2)/*SW1C*/ + value = 0xc;/*normal:APS mode;standby:PFM mode*/ + else + value = 0xd;/*normal:PWM mode;standby:PFM mode*/ + ret = pfuze_reg_write(pfuze, + PFUZE100_SW1AMODE + (i * 7), + value); + if (ret) + goto err; + } + + } else { + /*set all switches APS in normal and PFM mode in standby*/ + for (i = 0; i < 7; i++) { + value = 0xc; + ret = pfuze_reg_write(pfuze, + PFUZE100_SW1AMODE + (i * 7), + value); + if (ret) + goto err; + } + + } + if (arm_max_freq == CPU_AT_1_2GHz) { /*VDDARM_IN 1.475V*/ ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1AVOL, @@ -423,16 +457,6 @@ static int pfuze100_init(struct mc_pfuze *pfuze) __raw_writel(reg, ANADIG_REG_CORE); } - ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY, - PFUZE100_SW1ASTANDBY_STBY_M, - PFUZE100_SW1ASTANDBY_STBY_VAL); - if (ret) - goto err; - ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY, - PFUZE100_SW1CSTANDBY_STBY_M, - PFUZE100_SW1CSTANDBY_STBY_VAL); - if (ret) - goto err; /*set SW1AB/1C DVSPEED as 25mV step each 4us,quick than 16us before.*/ ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ACON, PFUZE100_SW1ACON_SPEED_M, |