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Diffstat (limited to 'arch/arm/mach-tegra/platsmp.c')
-rw-r--r--arch/arm/mach-tegra/platsmp.c22
1 files changed, 10 insertions, 12 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index d1178a820f39..dbd302414c67 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -32,6 +32,7 @@
#include "clock.h"
#include "reset.h"
#include "sleep.h"
+#include "cpu-tegra.h"
bool tegra_all_cpus_booted;
@@ -209,8 +210,16 @@ int boot_secondary(unsigned int cpu, struct task_struct *idle)
/* Early boot, clock infrastructure is not initialized
- CPU mode switch is not allowed */
status = -EINVAL;
- } else
+ } else {
+#ifdef CONFIG_CPU_FREQ
+ /* set cpu rate is within g-mode range before switch */
+ unsigned int speed = max(
+ (unsigned long)tegra_getspeed(0),
+ clk_get_min_rate(cpu_g_clk) / 1000);
+ tegra_update_cpu_speed(speed);
+#endif
status = clk_set_parent(cpu_clk, cpu_g_clk);
+ }
if (status)
goto done;
@@ -287,16 +296,5 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
smp_init_cpus() which also means that it did not initialize the
reset handler. Do it now before the secondary CPUs are started. */
tegra_cpu_reset_handler_init();
-
-#if defined(CONFIG_HAVE_ARM_SCU)
- {
- u32 scu_ctrl = __raw_readl(scu_base) |
- 1 << 3 | /* Enable speculative line fill*/
- 1 << 5 | /* Enable IC standby */
- 1 << 6; /* Enable SCU standby */
- if (!(scu_ctrl & 1))
- __raw_writel(scu_ctrl, scu_base);
- }
-#endif
scu_enable(scu_base);
}