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Diffstat (limited to 'arch/arm/mach-tegra/tegra3_save.S')
-rw-r--r--arch/arm/mach-tegra/tegra3_save.S5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra3_save.S b/arch/arm/mach-tegra/tegra3_save.S
index a5e5aabcc8a0..ed214412d6ec 100644
--- a/arch/arm/mach-tegra/tegra3_save.S
+++ b/arch/arm/mach-tegra/tegra3_save.S
@@ -252,14 +252,17 @@ ENTRY(__tegra_lp1_reset)
/* the CPU and system bus are running at 32KHz and executing from
* IRAM when this code is executed; immediately switch to CLKM and
* enable PLLP, PLLM, PLLC, PLLA and PLLX. */
- mov32 r0, TEGRA_CLK_RESET_BASE
+ mov32 r0, TEGRA_CLK_RESET_BASE
+#ifndef CONFIG_TRUSTED_FOUNDATIONS
+ /* secure code handles 32KHz to CLKM/OSC clock switch */
mov r1, #(1<<28)
str r1, [r0, #CLK_RESET_SCLK_BURST]
str r1, [r0, #CLK_RESET_CCLK_BURST]
mov r1, #0
str r1, [r0, #CLK_RESET_SCLK_DIVIDER]
str r1, [r0, #CLK_RESET_CCLK_DIVIDER]
+#endif
/* enable PLLM via PMC */
mov32 r2, TEGRA_PMC_BASE