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-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/epm.h191
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapi.h47
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapiDefaults.h126
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapiHigh.h132
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapiLow.h76
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapiLowMcu.h60
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapiMiddle.h52
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapiMiddleMcu.h41
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/iapiOS.h92
-rw-r--r--arch/arm/plat-mxc/sdma/iapi/include/sdmaStruct.h509
10 files changed, 1326 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/epm.h b/arch/arm/plat-mxc/sdma/iapi/include/epm.h
new file mode 100644
index 000000000000..8d190e242909
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/epm.h
@@ -0,0 +1,191 @@
+/*
+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef __ASM_ARCH_MXC_SDMA_REGS_H__
+#define __ASM_ARCH_MXC_SDMA_REGS_H__
+
+#include <mach/hardware.h>
+
+/* SDMA Reg definition */
+extern void __iomem *sdma_base;
+#define SDMA_BASE_IO_ADDR (sdma_base)
+
+#define SDMA_H_STATSTOP_ADDR (SDMA_BASE_IO_ADDR + 0x008)
+#define SDMA_H_START_ADDR (SDMA_BASE_IO_ADDR + 0x00C)
+
+#define SDMA_H_C0PTR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x000)))
+#define SDMA_H_INTR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x004)))
+#define SDMA_H_STATSTOP (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x008)))
+#define SDMA_H_START (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x00C)))
+#define SDMA_H_EVTOVR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x010)))
+#define SDMA_H_DSPOVR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x014)))
+#define SDMA_H_HOSTOVR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x018)))
+#define SDMA_H_EVTPEND (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x01C)))
+#define SDMA_H_DSPENBL (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x020)))
+#define SDMA_H_RESET (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x024)))
+#define SDMA_H_EVTERR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x028)))
+#define SDMA_H_INTRMSK (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x02C)))
+#define SDMA_H_PSW (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x030)))
+#define SDMA_H_EVTERRDBG (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x034)))
+#define SDMA_H_CONFIG (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x038)))
+#define SDMA_ONCE_ENB (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x040)))
+#define SDMA_ONCE_DATA (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x044)))
+#define SDMA_ONCE_INSTR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x048)))
+#define SDMA_ONCE_STAT (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x04C)))
+#define SDMA_ONCE_CMD (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x050)))
+#define SDMA_EVT_MIRROR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x054)))
+#define SDMA_ILLINSTADDR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x058)))
+#define SDMA_CHN0ADDR (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x05C)))
+#define SDMA_ONCE_RTB (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x060)))
+#define SDMA_XTRIG_CONF1 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x070)))
+#define SDMA_XTRIG_CONF2 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x074)))
+
+#ifdef MXC_SDMA_V2
+#define SDMA_CHNENBL_0 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x200)))
+#define SDMA_CHNENBL_1 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x204)))
+#define SDMA_CHNENBL_2 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x208)))
+#define SDMA_CHNENBL_3 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x20C)))
+#define SDMA_CHNENBL_4 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x210)))
+#define SDMA_CHNENBL_5 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x214)))
+#define SDMA_CHNENBL_6 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x218)))
+#define SDMA_CHNENBL_7 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x21C)))
+#define SDMA_CHNENBL_8 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x220)))
+#define SDMA_CHNENBL_9 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x224)))
+#define SDMA_CHNENBL_10 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x228)))
+#define SDMA_CHNENBL_11 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x22C)))
+#define SDMA_CHNENBL_12 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x230)))
+#define SDMA_CHNENBL_13 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x234)))
+#define SDMA_CHNENBL_14 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x238)))
+#define SDMA_CHNENBL_15 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x23C)))
+#define SDMA_CHNENBL_16 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x240)))
+#define SDMA_CHNENBL_17 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x244)))
+#define SDMA_CHNENBL_18 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x248)))
+#define SDMA_CHNENBL_19 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x24C)))
+#define SDMA_CHNENBL_20 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x250)))
+#define SDMA_CHNENBL_21 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x254)))
+#define SDMA_CHNENBL_22 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x258)))
+#define SDMA_CHNENBL_23 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x25C)))
+#define SDMA_CHNENBL_24 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x260)))
+#define SDMA_CHNENBL_25 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x264)))
+#define SDMA_CHNENBL_26 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x268)))
+#define SDMA_CHNENBL_27 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x26C)))
+#define SDMA_CHNENBL_28 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x270)))
+#define SDMA_CHNENBL_29 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x274)))
+#define SDMA_CHNENBL_30 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x278)))
+#define SDMA_CHNENBL_31 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x27C)))
+#define SDMA_CHNENBL_32 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x280)))
+#define SDMA_CHNENBL_33 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x284)))
+#define SDMA_CHNENBL_34 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x288)))
+#define SDMA_CHNENBL_35 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x28C)))
+#define SDMA_CHNENBL_36 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x290)))
+#define SDMA_CHNENBL_37 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x294)))
+#define SDMA_CHNENBL_38 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x298)))
+#define SDMA_CHNENBL_39 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x29C)))
+#define SDMA_CHNENBL_40 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2A0)))
+#define SDMA_CHNENBL_41 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2A4)))
+#define SDMA_CHNENBL_42 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2A8)))
+#define SDMA_CHNENBL_43 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2AC)))
+#define SDMA_CHNENBL_44 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2B0)))
+#define SDMA_CHNENBL_45 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2B4)))
+#define SDMA_CHNENBL_46 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2B8)))
+#define SDMA_CHNENBL_47 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2BC)))
+
+#define SDMA_ONCE_COUNT (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x300)))
+#define SDMA_ONCE_ECTL (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x304)))
+#define SDMA_ONCE_EAA (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x308)))
+#define SDMA_ONCE_EAB (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x30C)))
+#define SDMA_ONCE_EAM (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x310)))
+#define SDMA_ONCE_ED (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x314)))
+#define SDMA_ONCE_EDM (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x318)))
+#define SDMA_ONCE_PCMATCH (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x31C)))
+
+#else
+
+#define SDMA_CHNENBL_0 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x080)))
+#define SDMA_CHNENBL_1 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x084)))
+#define SDMA_CHNENBL_2 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x088)))
+#define SDMA_CHNENBL_3 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x08C)))
+#define SDMA_CHNENBL_4 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x090)))
+#define SDMA_CHNENBL_5 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x094)))
+#define SDMA_CHNENBL_6 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x098)))
+#define SDMA_CHNENBL_7 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x09C)))
+#define SDMA_CHNENBL_8 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0A0)))
+#define SDMA_CHNENBL_9 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0A4)))
+#define SDMA_CHNENBL_10 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0A8)))
+#define SDMA_CHNENBL_11 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0AC)))
+#define SDMA_CHNENBL_12 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0B0)))
+#define SDMA_CHNENBL_13 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0B4)))
+#define SDMA_CHNENBL_14 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0B8)))
+#define SDMA_CHNENBL_15 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0BC)))
+#define SDMA_CHNENBL_16 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0C0)))
+#define SDMA_CHNENBL_17 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0C4)))
+#define SDMA_CHNENBL_18 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0C8)))
+#define SDMA_CHNENBL_19 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0CC)))
+#define SDMA_CHNENBL_20 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0D0)))
+#define SDMA_CHNENBL_21 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0D4)))
+#define SDMA_CHNENBL_22 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0D8)))
+#define SDMA_CHNENBL_23 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0DC)))
+#define SDMA_CHNENBL_24 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0E0)))
+#define SDMA_CHNENBL_25 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0E4)))
+#define SDMA_CHNENBL_26 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0E8)))
+#define SDMA_CHNENBL_27 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0EC)))
+#define SDMA_CHNENBL_28 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0F0)))
+#define SDMA_CHNENBL_29 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0F4)))
+#define SDMA_CHNENBL_30 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0F8)))
+#define SDMA_CHNENBL_31 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0FC)))
+
+#define SDMA_ONCE_COUNT (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x200)))
+#define SDMA_ONCE_ECTL (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x204)))
+#define SDMA_ONCE_EAA (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x208)))
+#define SDMA_ONCE_EAB (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x20C)))
+#define SDMA_ONCE_EAM (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x210)))
+#define SDMA_ONCE_ED (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x214)))
+#define SDMA_ONCE_EDM (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x218)))
+#define SDMA_ONCE_PCMATCH (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x21C)))
+
+#endif /* MXC_SDMA_V2 */
+
+#define SDMA_CHNPRI_0 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x100)))
+#define SDMA_CHNPRI_1 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x104)))
+#define SDMA_CHNPRI_2 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x108)))
+#define SDMA_CHNPRI_3 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x10C)))
+#define SDMA_CHNPRI_4 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x110)))
+#define SDMA_CHNPRI_5 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x114)))
+#define SDMA_CHNPRI_6 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x118)))
+#define SDMA_CHNPRI_7 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x11C)))
+#define SDMA_CHNPRI_8 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x120)))
+#define SDMA_CHNPRI_9 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x124)))
+#define SDMA_CHNPRI_10 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x128)))
+#define SDMA_CHNPRI_11 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x12C)))
+#define SDMA_CHNPRI_12 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x130)))
+#define SDMA_CHNPRI_13 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x134)))
+#define SDMA_CHNPRI_14 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x138)))
+#define SDMA_CHNPRI_15 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x13C)))
+#define SDMA_CHNPRI_16 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x140)))
+#define SDMA_CHNPRI_17 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x144)))
+#define SDMA_CHNPRI_18 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x148)))
+#define SDMA_CHNPRI_19 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x14C)))
+#define SDMA_CHNPRI_20 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x150)))
+#define SDMA_CHNPRI_21 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x154)))
+#define SDMA_CHNPRI_22 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x158)))
+#define SDMA_CHNPRI_23 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x15C)))
+#define SDMA_CHNPRI_24 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x160)))
+#define SDMA_CHNPRI_25 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x164)))
+#define SDMA_CHNPRI_26 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x168)))
+#define SDMA_CHNPRI_27 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x16C)))
+#define SDMA_CHNPRI_28 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x170)))
+#define SDMA_CHNPRI_29 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x174)))
+#define SDMA_CHNPRI_30 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x178)))
+#define SDMA_CHNPRI_31 (*((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x17C)))
+
+#endif /* _mcuEpm_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapi.h b/arch/arm/plat-mxc/sdma/iapi/include/iapi.h
new file mode 100644
index 000000000000..7bb4915f7868
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapi.h
@@ -0,0 +1,47 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapi.h
+ *
+ * $Id iapi.h $
+ *
+ * Description:
+ * Unique include for the whole IAPI library.
+ *
+ *
+ * http//compass.mot.com/go/115342679
+ *
+ * $Log iapi.h $
+ *
+ * ***************************************************************************/
+
+#ifndef _iapi_h
+#define _iapi_h
+
+/* ****************************************************************************
+ * Include File Section
+ * ***************************************************************************/
+
+#include "sdmaStruct.h"
+#include "iapiDefaults.h"
+#include "iapiLow.h"
+#include "iapiMiddle.h"
+#include "iapiHigh.h"
+
+#ifdef MCU
+#include "iapiLowMcu.h"
+#include "iapiMiddleMcu.h"
+#endif /* MCU */
+
+#endif /* _iapi_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapiDefaults.h b/arch/arm/plat-mxc/sdma/iapi/include/iapiDefaults.h
new file mode 100644
index 000000000000..6ce00b8da5bb
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapiDefaults.h
@@ -0,0 +1,126 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapiDefaults.h
+ *
+ * $Id iapiDefaults.h $
+ *
+ * Description:
+ * This library is written in C to guarantee functionality and integrity in
+ * the usage of SDMA virtual DMA channels. This API (Application Programming
+ * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE
+ * fashion.
+ *
+ *
+ *
+ *
+ * $Log iapiDefaults.h $
+ *
+ *****************************************************************************/
+
+#ifndef _iapi_defaults_h
+#define _iapi_defaults_h
+
+/******************************************************************************
+ * Include File Section
+ *****************************************************************************/
+#include "epm.h"
+#include "sdmaStruct.h"
+
+/* ****************************************************************************
+ * Macro-command Section
+ * ***************************************************************************/
+
+/**
+ * Error codes
+ * lower 5 bits free to include channel number when available
+ * and bit number 6 must be set when channel number is available
+ *
+ * Note :
+ * 1) Abbreviations / naming convention :
+ * - BD : Buffer Descriptor
+ * - CC : Channel Context
+ * - CCB : Channel Control Block
+ * - CD : Channel Descriptor
+ * - B : Buffer
+ * - CH : Channel
+ *
+ */
+#define IAPI_SUCCESS 0
+#define IAPI_FAILURE -1
+#define IAPI_ERR_CH_AVAILABLE 0x00020
+#define IAPI_ERR_NO_ERROR 0x00000
+#define IAPI_ERR_NO_CCB_DEFINED 0x01000
+#define IAPI_ERR_BD_UNINITIALIZED 0x02000
+#define IAPI_ERR_BD_ALLOCATED 0x03000
+#define IAPI_ERR_BD_ALLOCATION 0x04000
+#define IAPI_ERR_CCB_ALLOC_FAILED 0x05000
+#define IAPI_ERR_CCB_UNINITIALIZED 0x06000
+#define IAPI_ERR_CC_ALREADY_DEFINED 0x07000
+#define IAPI_ERR_CC_ALLOC_FAILED 0x08000
+#define IAPI_ERR_CD_ALREADY_DEFINED 0x09000
+#define IAPI_ERR_CD_ALLOC_FAILED 0x0A000
+#define IAPI_ERR_CD_CHANGE_CH_NUMBER 0x0B000
+#define IAPI_ERR_CD_CHANGE_CCB_PTR 0x0C000
+#define IAPI_ERR_CD_CHANGE_UNKNOWN 0x0D000
+#define IAPI_ERR_CD_CHANGE 0x0E000
+#define IAPI_ERR_CD_UNINITIALIZED 0x0F000
+#define IAPI_ERR_CLOSE 0x10000
+#define IAPI_ERR_B_ALLOC_FAILED 0x11000
+#define IAPI_ERR_CONFIG_OVERRIDE 0x12000
+#define IAPI_ERR_CH_IN_USE 0x13000
+#define IAPI_ERR_CALLBACKSYNCH_UNKNOWN 0x14000
+#define IAPI_ERR_INVALID_PARAMETER 0x15000
+#define IAPI_ERR_TRUST 0x16000
+#define IAPI_ERR_CHANNEL_UNINITIALIZED 0x17000
+#define IAPI_ERR_RROR_BIT_READ 0x18000
+#define IAPI_ERR_RROR_BIT_WRITE 0x19000
+#define IAPI_ERR_NOT_ALLOWED 0x1A000
+#define IAPI_ERR_NO_OS_FN 0x1B000
+
+/*
+ * Global Variable Section
+ */
+
+/*
+ * Table to hold pointers to the callback functions registered by the users of
+ *I.API
+ */
+extern void (*callbackIsrTable[CH_NUM]) (channelDescriptor * cd_p, void *arg);
+
+/*
+ * Table to hold user registered data pointers, to be privided in the callback
+ *function
+ */
+extern void *userArgTable[CH_NUM];
+
+/* channelDescriptor data structure filled with default data*/
+extern channelDescriptor iapi_ChannelDefaults;
+
+/* Global variable to hold the last error encountered in I.API operations*/
+extern unsigned int iapi_errno;
+
+/* Used in synchronization, to mark started channels*/
+extern volatile unsigned long iapi_SDMAIntr;
+
+/* Hold a pointer to the start of the CCB array, to be used in the IRQ routine
+ *to find the channel descriptor for the channed sending the interrupt to the
+ *core.
+ */
+extern channelControlBlock *iapi_CCBHead;
+
+/* configs_data structure filled with default data*/
+extern configs_data iapi_ConfigDefaults;
+
+#endif /* iapiDefaults_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapiHigh.h b/arch/arm/plat-mxc/sdma/iapi/include/iapiHigh.h
new file mode 100644
index 000000000000..999a89872f80
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapiHigh.h
@@ -0,0 +1,132 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapiHigh.h
+ *
+ * $Id iapiHigh.h $
+ *
+ * Description:
+ * prototypes for high level function of I.API
+ *
+ *
+ * http://venerque.sps.mot.com/pjt/sfs/www/iapi/softsim_api.pdf
+ *
+ * $Log iapiHigh.h
+ *
+ * ***************************************************************************/
+
+#ifndef _iapiHigh_h
+#define _iapiHigh_h
+
+/* ****************************************************************************
+ * Include File Section
+ *****************************************************************************/
+#include "sdmaStruct.h"
+
+/* ****************************************************************************
+ * Macro-command Section
+ *****************************************************************************/
+enum {
+ IAPI_CHANGE_CHANDESC,
+ IAPI_CHANGE_BDNUM,
+ IAPI_CHANGE_BUFFSIZE,
+ IAPI_CHANGE_CHANBLOCK,
+ IAPI_CHANGE_INSTANCE,
+ IAPI_CHANGE_OWNERSHIP,
+ IAPI_CHANGE_SYNCH,
+ IAPI_CHANGE_TRUST,
+ IAPI_CHANGE_CALLBACKFUNC,
+ IAPI_CHANGE_CHANCCB,
+ IAPI_CHANGE_PRIORITY,
+ IAPI_CHANGE_BDWRAP,
+ IAPI_CHANGE_WATERMARK,
+ IAPI_CHANGE_SET_BDCONT,
+ IAPI_CHANGE_UNSET_BDCONT,
+ IAPI_CHANGE_SET_BDEXTD,
+ IAPI_CHANGE_UNSET_BDEXTD,
+ IAPI_CHANGE_EVTMASK1,
+ IAPI_CHANGE_EVTMASK2,
+ IAPI_CHANGE_PERIPHADDR,
+ IAPI_CHANGE_SET_BDINTR,
+ IAPI_CHANGE_UNSET_BDINTR,
+ IAPI_CHANGE_SET_TRANSFER_CD,
+ IAPI_CHANGE_FORCE_CLOSE,
+ IAPI_CHANGE_SET_TRANSFER,
+ IAPI_CHANGE_USER_ARG,
+ IAPI_CHANGE_SET_BUFFERADDR,
+ IAPI_CHANGE_SET_EXTDBUFFERADDR,
+ IAPI_CHANGE_SET_COMMAND,
+ IAPI_CHANGE_SET_COUNT,
+ IAPI_CHANGE_SET_STATUS,
+ IAPI_CHANGE_GET_BUFFERADDR,
+ IAPI_CHANGE_GET_EXTDBUFFERADDR,
+ IAPI_CHANGE_GET_COMMAND,
+ IAPI_CHANGE_GET_COUNT,
+ IAPI_CHANGE_GET_STATUS,
+ IAPI_CHANGE_SET_ENDIANNESS
+};
+
+/*
+ * Public Function Prototype Section
+ */
+int iapi_Open(channelDescriptor *cd_p, unsigned char channelNumber);
+int iapi_Close(channelDescriptor *cd_p);
+int iapi_Read(channelDescriptor *cd_p, void *buf, unsigned short nbyte);
+int iapi_Write(channelDescriptor *cd_p, void *buf, unsigned short nbyte);
+int iapi_MemCopy(channelDescriptor *cd_p, void *dest, void *src,
+ unsigned long size);
+int iapi_IoCtl(channelDescriptor *cd_p, unsigned long ctlRequest,
+ unsigned long param);
+
+int iapi_Read_ipcv2(channelDescriptor *cd_p, void *data_control_struct_ipcv2);
+
+int iapi_Write_ipcv2(channelDescriptor *cd_p, void *data_control_struct_ipcv2);
+
+#ifdef MCU
+int iapi_Init(channelDescriptor *cd_p, configs_data *config_p,
+ unsigned short *ram_image, unsigned short code_size,
+ unsigned long start_addr);
+#endif /* MCU */
+#ifdef DSP
+int iapi_Init(channelDescriptor *cd_p);
+#endif /* DSP */
+
+int iapi_StartChannel(unsigned char channel);
+int iapi_StopChannel(unsigned char channel);
+int iapi_SynchChannel(unsigned char channel);
+
+int iapi_GetChannelNumber(channelDescriptor *cd_p);
+unsigned long iapi_GetError(channelDescriptor *cd_p);
+int iapi_GetCount(channelDescriptor *cd_p);
+int iapi_GetCountAll(channelDescriptor *cd_p);
+
+#ifndef IRQ_KEYWORD
+#define IRQ_KEYWORD
+#endif /* IRQ_KEYWORD */
+
+IRQ_KEYWORD void IRQ_Handler(void);
+
+#ifdef MCU
+int iapi_GetScript(channelDescriptor *cd_p, void *buf, unsigned short size,
+ unsigned long address);
+int iapi_GetContext(channelDescriptor *cd_p, void *buf, unsigned char channel);
+int iapi_SetScript(channelDescriptor *cd_p, void *buf, unsigned short nbyte,
+ unsigned long destAddr);
+int iapi_SetContext(channelDescriptor *cd_p, void *buf, unsigned char channel);
+int iapi_AssignScript(channelDescriptor *cd_p, script_data *data_p);
+
+int iapi_SetChannelEventMapping(unsigned char event, unsigned long channel_map);
+#endif /* MCU */
+
+#endif /* _iapiHigh_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapiLow.h b/arch/arm/plat-mxc/sdma/iapi/include/iapiLow.h
new file mode 100644
index 000000000000..82a2e2d4be3a
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapiLow.h
@@ -0,0 +1,76 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapiLow.h
+ *
+ * $Id iapiLow.h $
+ *
+ * Description:
+ * prototypes for low level function of I.API
+ *
+ *
+ *
+ *
+ * $Log iapiLow.h
+ *
+ * ***************************************************************************/
+
+#ifndef _iapiLow_h
+#define _iapiLow_h
+
+/* ****************************************************************************
+ * Boolean identifiers
+ *****************************************************************************/
+#define NO_OS 0
+#define LINUX 1
+#define SYMBIAN 2
+#define WINCE 3
+
+/* ****************************************************************************
+ * Include File Section
+ *****************************************************************************/
+#include "sdmaStruct.h"
+#include "iapiDefaults.h"
+#include "iapiOS.h"
+#ifdef MCU
+#include "iapiLowMcu.h"
+#endif /*MCU*/
+#if OS == NO_OS
+#include <stdlib.h>
+#elif OS == LINUX
+#include <linux/types.h>
+#endif
+/* ****************************************************************************
+ * Macro-command Section
+ *****************************************************************************/
+#define GOTO_SLEEP(x) (iapi_GotoSleep)(x)
+#define INIT_SLEEP(x) (iapi_InitSleep)(x)
+/* ****************************************************************************
+ * Public Function Prototype Section
+ *****************************************************************************/
+void iapi_lowStartChannel(unsigned char channel);
+void iapi_lowStopChannel(unsigned char channel);
+void iapi_AttachCallbackISR(channelDescriptor *cd_p,
+ void (*func_p) (channelDescriptor *cd_p,
+ void *arg));
+void iapi_DetachCallbackISR(channelDescriptor *cd_p);
+void iapi_ChangeCallbackISR(channelDescriptor *cd_p,
+ void (*func_p) (channelDescriptor *cd_p,
+ void *arg));
+void iapi_lowSynchChannel(unsigned char channel);
+void iapi_SetBufferDescriptor(bufferDescriptor *bd_p, unsigned char command,
+ unsigned char status, unsigned short count,
+ void *buffAddr, void *extBufferAddr);
+
+#endif /* _iapiLow_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapiLowMcu.h b/arch/arm/plat-mxc/sdma/iapi/include/iapiLowMcu.h
new file mode 100644
index 000000000000..a228003b1f5a
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapiLowMcu.h
@@ -0,0 +1,60 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapiLowMcu.h
+ *
+ * $Id iapiLowMcu.h $
+ *
+ * Description:
+ * prototypes for low level function of I.API of MCU side only
+ *
+ *
+ *
+ *
+ * $Log iapiLowMcu.h $
+ *
+ * ***************************************************************************/
+
+#ifndef _iapiLowMcu_h
+#define _iapiLowMcu_h
+
+/******************************************************************************
+ * Include File Section
+ *****************************************************************************/
+#include "sdmaStruct.h"
+#include "iapiDefaults.h"
+
+/* ****************************************************************************
+ * Public Function Prototype Section
+ * ***************************************************************************/
+
+void iapi_InitChannelTables(void);
+int iapi_ChannelConfig(unsigned char channel, unsigned eventOverride,
+ unsigned mcuOverride, unsigned dspOverride);
+int iapi_Channel0Command(channelDescriptor *cd_p, void *buf,
+ unsigned short nbyte, unsigned char command);
+void iapi_lowGetScript(channelDescriptor *cd_p, void *buf, unsigned short size,
+ unsigned long address);
+void iapi_lowGetContext(channelDescriptor *cd_p, void *buf,
+ unsigned char channel);
+void iapi_lowSetScript(channelDescriptor *cd_p, void *buf,
+ unsigned short nbyte, unsigned long destAddr);
+void iapi_lowSetContext(channelDescriptor *cd_p, void *buf,
+ unsigned char channel);
+int iapi_lowAssignScript(channelDescriptor *cd_p, script_data *data_p);
+
+int iapi_lowSetChannelEventMapping(unsigned char event,
+ unsigned long channel_map);
+
+#endif /* _iapiLowMcu_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddle.h b/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddle.h
new file mode 100644
index 000000000000..33529ba064d5
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddle.h
@@ -0,0 +1,52 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapiMiddle.h
+ *
+ * $Id iapiMiddle.h $
+ *
+ * Description:
+ * prototypes for middle level function of I.API
+ *
+ *
+ *
+ *
+ * $Log iapiMiddle.h
+ *
+ * ***************************************************************************/
+
+#ifndef _iapiMiddle_h
+#define _iapiMiddle_h
+
+/* ****************************************************************************
+ * Include File Section
+ ******************************************************************************/
+#include "sdmaStruct.h"
+#ifdef MCU
+#include "iapiMiddleMcu.h"
+#endif /* MCU */
+
+/* ****************************************************************************
+ * Public Function Prototype Section
+ ******************************************************************************/
+bufferDescriptor *iapi_AllocBD(channelControlBlock *ccb_p);
+int iapi_AllocContext(contextData **ctxd_p, unsigned char channel);
+int iapi_AllocChannelDesc(channelDescriptor **cd_p, unsigned char channel);
+int iapi_ChangeChannelDesc(channelDescriptor *cd_p,
+ unsigned char whatToChange, unsigned long newval);
+void iapi_InitializeCallbackISR(void (*func_p) (channelDescriptor *cd_p,
+ void *arg));
+int iapi_InitializeMemory(channelControlBlock *ccb_p);
+
+#endif /* iapiMiddle_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddleMcu.h b/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddleMcu.h
new file mode 100644
index 000000000000..7f6dd27686b2
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddleMcu.h
@@ -0,0 +1,41 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapiMiddleMcu.h
+ *
+ * $Id iapiMiddleMcu.h $
+ *
+ * Description:
+ * prototypes for middle level function of I.API
+ *
+ *
+ *
+ *
+ * $Log iapiMiddleMcu.h
+ *
+ * ***************************************************************************/
+
+#ifndef _iapiMiddleMcu_h
+#define _iapiMiddleMcu_h
+
+/* ****************************************************************************
+ * Include File Section
+ ******************************************************************************/
+#include "sdmaStruct.h"
+
+/* ****************************************************************************
+ * Public Function Prototype Section
+ ******************************************************************************/
+
+#endif /* iapiMiddleMcu_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/iapiOS.h b/arch/arm/plat-mxc/sdma/iapi/include/iapiOS.h
new file mode 100644
index 000000000000..bec4941b4bd4
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/iapiOS.h
@@ -0,0 +1,92 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: iapiOS.h
+ *
+ * $Id iapiOS.h $
+ *
+ * Description:
+ * prototypes for OS level function of I.API
+ *
+ *
+ *
+ *
+ * $Log iapiOS.h
+ *
+ * ***************************************************************************/
+
+#ifndef _iapiOS_h
+#define _iapiOS_h
+
+/* ****************************************************************************
+ * Boolean identifiers
+ *****************************************************************************/
+#define NO_OS 0
+#define LINUX 1
+#define SYMBIAN 2
+#define WINCE 3
+
+/* ****************************************************************************
+ * Include File Section
+ *****************************************************************************/
+#include "sdmaStruct.h"
+#include "iapiDefaults.h"
+#ifdef MCU
+#include "iapiLowMcu.h"
+#endif /*MCU*/
+#if OS == NO_OS
+#include <stdlib.h>
+#elif OS == LINUX
+#include <linux/types.h>
+#endif
+/* ****************************************************************************
+ * Macro-command Section
+ *****************************************************************************/
+#define SDMA_ERAM 0
+#define SDMA_IRAM 1
+#ifdef CONFIG_SDMA_IRAM
+#define MALLOC(x, s) (s == SDMA_ERAM) ? (*iapi_Malloc)(x) : (*iapi_iram_Malloc)(x)
+#else /*CONFIG_SDMA_IRAM */
+#define MALLOC(x, s) (*iapi_Malloc)(x)
+#endif /*CONFIG_SDMA_IRAM */
+#define FREE(x) if (x != NULL) (*iapi_Free)(x)
+#define GOTO_SLEEP(x) (iapi_GotoSleep)(x)
+#define INIT_SLEEP(x) (iapi_InitSleep)(x)
+/* ****************************************************************************
+ * Public Function Prototype Section
+ *****************************************************************************/
+#ifdef CONFIG_SDMA_IRAM
+extern void *(*iapi_iram_Malloc) (size_t size);
+#endif /*CONFIG_SDMA_IRAM */
+
+extern void *(*iapi_Malloc) (size_t size);
+extern void (*iapi_Free) (void *ptr);
+
+extern void *(*iapi_Virt2Phys) (void *ptr);
+extern void *(*iapi_Phys2Virt) (void *ptr);
+
+extern void (*iapi_WakeUp) (int);
+extern void (*iapi_GotoSleep) (int);
+extern void (*iapi_InitSleep) (int);
+
+extern void *(*iapi_memcpy) (void *dest, const void *src, size_t count);
+extern void *(*iapi_memset) (void *dest, int c, size_t count);
+
+extern void (*iapi_EnableInterrupts) (void);
+extern void (*iapi_DisableInterrupts) (void);
+
+extern int (*iapi_GetChannel) (int);
+extern int (*iapi_ReleaseChannel) (int);
+
+#endif /* _iapiOS_h */
diff --git a/arch/arm/plat-mxc/sdma/iapi/include/sdmaStruct.h b/arch/arm/plat-mxc/sdma/iapi/include/sdmaStruct.h
new file mode 100644
index 000000000000..02ed065af2fa
--- /dev/null
+++ b/arch/arm/plat-mxc/sdma/iapi/include/sdmaStruct.h
@@ -0,0 +1,509 @@
+/******************************************************************************
+ *
+ * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ ******************************************************************************
+ *
+ * File: sdmaStruct.h
+ *
+ * $Id sdmaStruct.h $
+ *
+ * Description: provides necessary definitions and inclusion for ipcmStruct.c
+ *
+ * $Log $
+ *
+ *****************************************************************************/
+#ifndef _sdmaStruct_h
+#define _sdmaStruct_h
+
+/* ****************************************************************************
+ * Include File Section
+ ******************************************************************************/
+
+/* ****************************************************************************
+ * Macro-command Section
+ ******************************************************************************/
+
+/**
+ * Identifier NULL
+ */
+#ifndef NULL
+#define NULL 0
+#endif
+
+/**
+ * Boolean identifiers
+ */
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+/**
+ * Number of channels
+ */
+#define CH_NUM 32
+/**
+ * Number of events
+ */
+#ifdef MXC_SDMA_V2
+#define EVENTS_NUM 48
+#else
+#define EVENTS_NUM 32
+#endif
+/**
+ * Channel configuration
+ */
+#define DONT_OWN_CHANNEL 0
+#define OWN_CHANNEL 1
+
+/**
+ * Ownership (value defined to computed decimal value)
+ */
+#define CH_OWNSHP_OFFSET_EVT 0
+#define CH_OWNSHP_OFFSET_MCU 1
+#define CH_OWNSHP_OFFSET_DSP 2
+/**
+ * Indexof the greg which holds address to start a script from when channel
+ * becomes current.
+ */
+#define SDMA_NUMBER_GREGS 8
+
+/**
+ * Channel contexts management
+ */
+
+#define CHANNEL_CONTEXT_BASE_ADDRESS 0x800
+/**
+ * Buffer descriptor status values.
+ */
+#define BD_DONE 0x01
+#define BD_WRAP 0x02
+#define BD_CONT 0x04
+#define BD_INTR 0x08
+#define BD_RROR 0x10
+#define BD_LAST 0x20
+#define BD_EXTD 0x80
+
+/**
+ * Data Node descriptor status values.
+ */
+#define DND_END_OF_FRAME 0x80
+#define DND_END_OF_XFER 0x40
+#define DND_DONE 0x20
+#define DND_UNUSED 0x01
+
+/**
+ * IPCV2 descriptor status values.
+ */
+#define BD_IPCV2_END_OF_FRAME 0x40
+
+#define IPCV2_MAX_NODES 50
+/**
+ * Error bit set in the CCB status field by the SDMA,
+ * in setbd routine, in case of a transfer error
+ */
+#define DATA_ERROR 0x10000000
+
+/**
+ * Buffer descriptor commands.
+ */
+#define C0_ADDR 0x01
+#define C0_LOAD 0x02
+#define C0_DUMP 0x03
+#define C0_SETCTX 0x07
+#define C0_GETCTX 0x03
+#define C0_SETDM 0x01
+#define C0_SETPM 0x04
+#define C0_GETDM 0x02
+#define C0_GETPM 0x08
+/**
+ * Transfer types, encoded in the BD command field
+ */
+#define TRANSFER_32BIT 0x00
+#define TRANSFER_8BIT 0x01
+#define TRANSFER_16BIT 0x02
+#define TRANSFER_24BIT 0x03
+/**
+ * Change endianness indicator in the BD command field
+ */
+#define CHANGE_ENDIANNESS 0x80
+/**
+ * Size in bytes
+ */
+#define SDMA_BD_SIZE 8
+#define SDMA_EXTENDED_BD_SIZE 12
+#define BD_NUMBER 4
+/**
+ * Channel interrupt policy
+ */
+#define DEFAULT_POLL 0
+#define CALLBACK_ISR 1
+/**
+ * Channel status
+ */
+#define UNINITIALIZED 0
+#define INITIALIZED 1
+
+/**
+ * IoCtl particular values
+ */
+#define SET_BIT_ALL 0xFFFFFFFF
+#define BD_NUM_OFFSET 16
+#define BD_NUM_MASK 0xFFFF0000
+
+/**
+ * Maximum values for IoCtl calls, used in high or middle level calls
+ */
+#define MAX_BD_NUM 256
+#define MAX_BD_SIZE 65536
+#define MAX_BLOCKING 2
+#define MAX_SYNCH 2
+#define MAX_OWNERSHIP 8
+#define MAX_CH_PRIORITY 8
+#define MAX_TRUST 2
+#define MAX_WML 256
+
+/**
+ * Access to channelDescriptor fields
+ */
+enum {
+ IAPI_CHANNELNUMBER,
+ IAPI_BUFFERDESCNUMBER,
+ IAPI_BUFFERSIZE,
+ IAPI_BLOCKING,
+ IAPI_CALLBACKSYNCH,
+ IAPI_OWNERSHIP,
+ IAPI_PRIORITY,
+ IAPI_TRUST,
+ IAPI_UNUSED,
+ IAPI_CALLBACKISR_PTR,
+ IAPI_CCB_PTR,
+ IAPI_BDWRAP,
+ IAPI_WML
+};
+
+/**
+ * Default values for channel descriptor - nobody ownes the channel
+ */
+#define CD_DEFAULT_OWNERSHIP 7
+
+/**
+ * User Type Section
+ */
+
+/**
+ * Command/Mode/Count of buffer descriptors
+ */
+
+#if (ENDIANNESS == B_I_G_ENDIAN)
+typedef struct iapi_modeCount_ipcv2 {
+ unsigned long status:8;
+ /**< L, E , D bits stored here */
+ unsigned long reserved:8;
+ unsigned long count:16;
+ /**< <size of the buffer pointed by this BD */
+} modeCount_ipcv2;
+#else
+typedef struct iapi_modeCount_ipcv2 {
+ unsigned long count:16;
+ /**<size of the buffer pointed by this BD */
+ unsigned long reserved:8;
+ /**Reserved*/
+ unsigned long status:8;
+ /**< L, E , D bits stored here */
+} modeCount_ipcv2;
+#endif
+/**
+ * Data Node descriptor - IPCv2
+ * (differentiated between evolutions of SDMA)
+ */
+typedef struct iapi_dataNodeDescriptor {
+ modeCount_ipcv2 mode; /**<command, status and count */
+ void *bufferAddr;
+ /**<address of the buffer described */
+} dataNodeDescriptor;
+
+#if (ENDIANNESS == B_I_G_ENDIAN)
+typedef struct iapi_modeCount_ipcv1_v2 {
+ unsigned long endianness:1;
+ unsigned long reserved:7;
+ unsigned long status:8;
+ /**< E,R,I,C,W,D status bits stored here */
+ unsigned long count:16;
+ /**< size of the buffer pointed by this BD */
+} modeCount_ipcv1_v2;
+#else
+typedef struct iapi_modeCount_ipcv1_v2 {
+ unsigned long count:16;
+ /**<size of the buffer pointed by this BD */
+ unsigned long status:8;
+ /**< E,R,I,C,W,D status bits stored here */
+ unsigned long reserved:7;
+ unsigned long endianness:1;
+} modeCount_ipcv1_v2;
+#endif
+/**
+ * Buffer descriptor
+ * (differentiated between evolutions of SDMA)
+ */
+typedef struct iapi_bufferDescriptor_ipcv1_v2 {
+ modeCount_ipcv1_v2 mode;
+ /**<command, status and count */
+ void *bufferAddr; /**<address of the buffer described */
+ void *extBufferAddr;/**<extended buffer address */
+} bufferDescriptor_ipcv1_v2;
+
+/**
+ * Mode/Count of data node descriptors - IPCv2
+ */
+
+#if (ENDIANNESS == B_I_G_ENDIAN)
+typedef struct iapi_modeCount {
+ unsigned long command:8;
+ /**< command mostlky used for channel 0 */
+ unsigned long status:8;
+ /**< E,R,I,C,W,D status bits stored here */
+ unsigned long count:16;
+ /**< size of the buffer pointed by this BD */
+} modeCount;
+#else
+typedef struct iapi_modeCount {
+ unsigned long count:16;
+ /**<size of the buffer pointed by this BD */
+ unsigned long status:8;
+ /**< E,R,I,C,W,D status bits stored here */
+ unsigned long command:8;
+ /**< command mostlky used for channel 0 */
+} modeCount;
+#endif
+
+/**
+ * Buffer descriptor
+ * (differentiated between evolutions of SDMA)
+ */
+typedef struct iapi_bufferDescriptor {
+ modeCount mode; /**<command, status and count */
+ void *bufferAddr;
+ /**<address of the buffer described */
+ void *extBufferAddr;
+ /**<extended buffer address */
+} bufferDescriptor;
+
+struct iapi_channelControlBlock;
+struct iapi_channelDescriptor;
+/**
+ * Channel Descriptor
+ */
+typedef struct iapi_channelDescriptor {
+ unsigned char channelNumber;
+ /**<stores the channel number */
+ unsigned char bufferDescNumber;
+ /**<number of BD's automatically allocated for this channel */
+ unsigned short bufferSize; /**<size (in bytes) of buffer descriptors */
+ unsigned long blocking:3;
+ /**<blocking / non blocking feature selection */
+ unsigned long callbackSynch:1;
+ /**<polling/ callback method selection */
+ unsigned long ownership:3;
+ /**<ownership of the channel (host+dedicated+event)*/
+ unsigned long priority:3;
+ /**<reflects the SDMA channel priority register */
+ unsigned long trust:1;
+ /**<trusted buffers or kernel allocated */
+ unsigned long useDataSize:1;
+ /**<indicates if the dataSize field is meaningfull */
+ unsigned long dataSize:2;
+ /**<data transfer size - 8,16,24 or 32 bits*/
+ unsigned long forceClose:1;
+ /**<if TRUE, close channel even with BD owned by SDMA*/
+ unsigned long scriptId:7;
+ /**<number of the script */
+ unsigned long watermarkLevel:10;
+ /**<Watermark level for the peripheral access*/
+ unsigned long eventMask1; /**<First Event mask */
+ unsigned long eventMask2; /**<Second Event mask */
+ unsigned long peripheralAddr;
+ /**<Address of the peripheral or its fifo when needed */
+ void (*callbackISR_ptr) (struct iapi_channelDescriptor *, void *);
+ /**<pointer to the callback function (or NULL) */
+ struct iapi_channelControlBlock *ccb_ptr;
+ /**<pointer to the channel control block associated to this channel */
+} channelDescriptor;
+
+/**
+ * Channel Status
+ */
+typedef struct iapi_channelStatus {
+ unsigned long unused:29;
+ /**<*/
+ unsigned long openedInit:1;
+ /**<channel is initialized or not */
+ unsigned long stateDirection:1;
+ /**<sdma is reading/writing (as seen from channel owner core) */
+ unsigned long execute:1;
+ /**<channel is being processed (started) or not */
+} channelStatus;
+
+/**
+ * Channel control Block
+ */
+typedef struct iapi_channelControlBlock {
+ bufferDescriptor *currentBDptr;/**<current buffer descriptor processed */
+ bufferDescriptor *baseBDptr; /**<first element of buffer descriptor array */
+ channelDescriptor *channelDescriptor;
+ /**<pointer to the channel descriptor */
+ channelStatus status; /**<open/close ; started/stopped ; read/write */
+} channelControlBlock;
+
+/**
+ * Context structure.
+ */
+#if (ENDIANNESS == B_I_G_ENDIAN)
+typedef struct iapi_stateRegisters {
+ unsigned long sf:1;
+ /**<source falut while loading data */
+ unsigned long unused0:1;
+ /**<*/
+ unsigned long rpc:14;
+ /**<return program counter */
+ unsigned long t:1;
+ /**<test bit:status of arithmetic & test instruction*/
+ unsigned long unused1:1;
+ /**<*/
+ unsigned long pc:14;
+ /**<program counter */
+ unsigned long lm:2;
+ /**<loop mode */
+ unsigned long epc:14;
+ /**<loop end program counter */
+ unsigned long df:1;
+ /**<destiantion falut while storing data */
+ unsigned long unused2:1;
+ /**<*/
+ unsigned long spc:14;
+ /**<loop start program counter */
+} stateRegiters;
+#else
+typedef struct iapi_stateRegisters {
+ unsigned long pc:14;
+ /**<program counter */
+ unsigned long unused1:1;
+ /**<*/
+ unsigned long t:1;
+ /**<test bit: status of arithmetic & test instruction*/
+ unsigned long rpc:14;
+ /**<return program counter */
+ unsigned long unused0:1;
+ /**<*/
+ unsigned long sf:1;
+ /**<source falut while loading data */
+ unsigned long spc:14;
+ /**<loop start program counter */
+ unsigned long unused2:1;
+ /**<*/
+ unsigned long df:1;
+ /**<destiantion falut while storing data */
+ unsigned long epc:14;
+ /**<loop end program counter */
+ unsigned long lm:2;
+ /**<loop mode */
+} stateRegiters;
+#endif
+
+/**
+ * This is SDMA version of SDMA
+ */
+typedef struct iapi_contextData {
+ stateRegiters channelState; /**<channel state bits */
+ unsigned long gReg[SDMA_NUMBER_GREGS];
+ /**<general registers */
+ unsigned long mda;
+ /**<burst dma destination address register */
+ unsigned long msa;
+ /**<burst dma source address register */
+ unsigned long ms;
+ /**<burst dma status register */
+ unsigned long md;
+ /**<burst dma data register */
+ unsigned long pda;
+ /**<peripheral dma destination address register */
+ unsigned long psa;
+ /**<peripheral dma source address register */
+ unsigned long ps;
+ /**<peripheral dma status register */
+ unsigned long pd;
+ /**<peripheral dma data register */
+ unsigned long ca;
+ /**<CRC polynomial register */
+ unsigned long cs;
+ /**<CRC accumulator register */
+ unsigned long dda;
+ /**<dedicated core destination address register */
+ unsigned long dsa;
+ /**<dedicated core source address register */
+ unsigned long ds;
+ /**<dedicated core status register */
+ unsigned long dd;
+ /**<dedicated core data register */
+ unsigned long scratch0;
+ /**<scratch */
+ unsigned long scratch1;
+ /**<scratch */
+ unsigned long scratch2;
+ /**<scratch */
+ unsigned long scratch3;
+ /**<scratch */
+ unsigned long scratch4;
+ /**<scratch */
+ unsigned long scratch5;
+ /**<scratch */
+ unsigned long scratch6;
+ /**<scratch */
+ unsigned long scratch7;
+ /**<scratch */
+
+} contextData;
+
+/**
+ *This structure holds the necessary data for the assignment in the
+ * dynamic channel-script association
+ */
+typedef struct iapi_script_data {
+ unsigned short load_address;
+ /**<start address of the script*/
+ unsigned long wml; /**<parameters for the channel descriptor*/
+ unsigned long shp_addr;
+ /**<shared peripheral base address*/
+ unsigned long per_addr;
+ /**<peripheral base address for p2p source*/
+ unsigned long event_mask1;
+ /**<First Event mask */
+ unsigned long event_mask2;
+ /**<Second Event mask */
+} script_data;
+
+/**
+ *This structure holds the the useful bits of the CONFIG register
+ */
+typedef struct iapi_configs_data {
+ unsigned long dspdma:1; /*indicates if the DSPDMA is used */
+ unsigned long rtdobs:1; /*indicates if Real-Time Debug pins are enabled */
+ unsigned long acr:1;
+ /**indicates if AHB freq /core freq = 2 or 1 */
+ unsigned long csm:2;
+ /**indicates which context switch mode is selected*/
+} configs_data;
+
+#endif /* _sdmaStruct_h */
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-16 01:23:19 +0000