diff options
Diffstat (limited to 'arch/arm/plat-mxc')
| -rwxr-xr-x | arch/arm/plat-mxc/include/mach/common.h | 1 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/time.c | 28 |
2 files changed, 0 insertions, 29 deletions
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 4edcaea09b14..3dfc6646307a 100755 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -89,7 +89,6 @@ extern void mx51_efikamx_reset(void); extern int mx53_revision(void); extern int mx50_revision(void); extern int mx53_display_revision(void); -extern unsigned long mx6_timer_rate(void); extern int mxs_reset_block(void __iomem *); extern void early_console_setup(unsigned long base, struct clk *clk); extern void mx6_cpu_regulator_init(void); diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index 3f99628a410e..aaeedb66d66d 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c @@ -294,34 +294,6 @@ static int __init mxc_clockevent_init(struct clk *timer_clk) return 0; } -#ifdef CONFIG_ARCH_MX6 -unsigned long mx6_timer_rate() -{ - struct clk *osc_clk = clk_get(NULL, "osc"); - u32 parent_rate = clk_get_rate(osc_clk); - - u32 reg = __raw_readl(timer_base + MXC_TCTL); - u32 div; - - clk_put(osc_clk); - - if ((reg & V2_TCTL_CLK_OSC_DIV8) == V2_TCTL_CLK_OSC_DIV8) { - if (cpu_is_mx6q()) - /* For MX6Q, only options are 24MHz or 24MHz/8*/ - return parent_rate / 8; - else { - /* For MX6DLS and MX6Solo, the rate is based on the - * divider value set in prescalar register. */ - div = __raw_readl(timer_base + MXC_TPRER); - div = (div >> V2_TPRER_PRE24M_OFFSET) & - V2_TPRER_PRE24M_MASK; - return parent_rate / (div + 1); - } - } - return 0; -} -#endif - void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) { uint32_t tctl_val; |