diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi | 434 |
1 files changed, 434 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi new file mode 100644 index 000000000000..64dcd6d05bdf --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -0,0 +1,434 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018-2019 NXP + * Dong Aisheng <aisheng.dong@nxp.com> + */ + +#include <dt-bindings/firmware/imx/rsrc.h> + +audio_subsys: bus@59000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x59000000 0x0 0x59000000 0x1000000>; + + edma0: dma-controller@591F0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x59200000 0x10000>, /* asrc0 */ + <0x59210000 0x10000>, + <0x59220000 0x10000>, + <0x59230000 0x10000>, + <0x59240000 0x10000>, + <0x59250000 0x10000>, + <0x59260000 0x10000>, /* esai0 rx */ + <0x59270000 0x10000>, /* esai0 tx */ + <0x59280000 0x10000>, /* spdif0 rx */ + <0x59290000 0x10000>, /* spdif0 tx */ + <0x592c0000 0x10000>, /* sai0 rx */ + <0x592d0000 0x10000>, /* sai0 tx */ + <0x592e0000 0x10000>, /* sai1 rx */ + <0x592f0000 0x10000>, /* sai1 tx */ + <0x59350000 0x10000>, + <0x59370000 0x10000>; + #dma-cells = <3>; + shared-interrupt; + dma-channels = <16>; + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc 0 */ + <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>, /* esai0 */ + <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, /* spdif0 */ + <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, /* sai0 */ + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, /* sai1 */ + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "edma0-chan0-rx", "edma0-chan1-rx", /* asrc0 */ + "edma0-chan2-rx", "edma0-chan3-tx", + "edma0-chan4-tx", "edma0-chan5-tx", + "edma0-chan6-rx", "edma0-chan7-tx", /* esai0 */ + "edma0-chan8-rx", "edma0-chan9-tx", /* spdif0 */ + "edma0-chan12-rx", "edma0-chan13-tx", /* sai0 */ + "edma0-chan14-rx", "edma0-chan15-tx", /* sai1 */ + "edma0-chan21-tx", /* gpt5 */ + "edma0-chan23-rx"; /* gpt7 */ + status = "okay"; + }; + + edma1: dma-controller@599F0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x59A00000 0x10000>, /* asrc1 */ + <0x59A10000 0x10000>, + <0x59A20000 0x10000>, + <0x59A30000 0x10000>, + <0x59A40000 0x10000>, + <0x59A50000 0x10000>, + <0x59A80000 0x10000>, /* sai4 rx */ + <0x59A90000 0x10000>, /* sai4 tx */ + <0x59AA0000 0x10000>; /* sai5 tx */ + #dma-cells = <3>; + shared-interrupt; + dma-channels = <9>; + interrupts = <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, /* asrc 1 */ + <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, /* sai4 */ + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; /* sai5 */ + interrupt-names = "edma1-chan0-rx", "edma1-chan1-rx", /* asrc1 */ + "edma1-chan2-rx", "edma1-chan3-tx", + "edma1-chan4-tx", "edma1-chan5-tx", + "edma1-chan8-rx", "edma1-chan9-tx", /* sai4 */ + "edma1-chan10-tx"; /* sai5 */ + status = "okay"; + }; + + adma_acm: acm@59e00000 { + compatible = "nxp,imx8qxp-acm"; + reg = <0x59e00000 0x1D0000>; + #clock-cells = <1>; + power-domains = <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_MCLK_OUT_0>, + <&pd IMX_SC_R_MCLK_OUT_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>, + <&pd IMX_SC_R_ASRC_0>, + <&pd IMX_SC_R_ASRC_1>, + <&pd IMX_SC_R_ESAI_0>, + <&pd IMX_SC_R_SAI_0>, + <&pd IMX_SC_R_SAI_1>, + <&pd IMX_SC_R_SAI_2>, + <&pd IMX_SC_R_SAI_3>, + <&pd IMX_SC_R_SAI_4>, + <&pd IMX_SC_R_SAI_5>, + <&pd IMX_SC_R_SPDIF_0>, + <&pd IMX_SC_R_MQS_0>; + }; + + adma_dsp: dsp@596e8000 { + compatible = "fsl,imx8qxp-dsp"; + reg = <0x596e8000 0x88000>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; + clock-names = "ipg", "ocram", "core"; + fsl,dsp-firmware = "imx/dsp/hifi4.bin"; + power-domains = <&pd IMX_SC_R_MU_13A>, + <&pd IMX_SC_R_MU_13B>, + <&pd IMX_SC_R_DSP>, + <&pd IMX_SC_R_DSP_RAM>; + reserved-region = <&dsp_reserved>; + status = "disabled"; + }; + + adma_asrc0: asrc@59000000 { + compatible = "fsl,imx8qm-asrc0"; + reg = <0x59000000 0x10000>; + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_ASRC_0_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK0_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK1_CLK>, + <&adma_acm IMX_ADMA_ACM_AUD_CLK0_SEL>, + <&adma_acm IMX_ADMA_ACM_AUD_CLK1_SEL>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "ipg", "mem", + "asrck_0", "asrck_1", "asrck_2", "asrck_3", + "asrck_4", "asrck_5", "asrck_6", "asrck_7", + "asrck_8", "asrck_9", "asrck_a", "asrck_b", + "asrck_c", "asrck_d", "asrck_e", "asrck_f", + "spba"; + dmas = <&edma0 0 0 0>, <&edma0 1 0 0>, <&edma0 2 0 0>, + <&edma0 3 0 1>, <&edma0 4 0 1>, <&edma0 5 0 1>; + dma-names = "rxa", "rxb", "rxc", + "txa", "txb", "txc"; + fsl,asrc-rate = <8000>; + fsl,asrc-width = <16>; + power-domains = <&pd IMX_SC_R_ASRC_0>, + <&pd IMX_SC_R_DMA_0_CH0>, + <&pd IMX_SC_R_DMA_0_CH1>, + <&pd IMX_SC_R_DMA_0_CH2>, + <&pd IMX_SC_R_DMA_0_CH3>, + <&pd IMX_SC_R_DMA_0_CH4>, + <&pd IMX_SC_R_DMA_0_CH5>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_esai0: esai@59010000 { + compatible = "fsl,imx8qm-esai"; + reg = <0x59010000 0x10000>; + interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_ESAI_0_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_ESAI_0_EXTAL_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_ESAI_0_IPG_CLK>, + <&clk IMX_CLK_DUMMY>; + clock-names = "core", "extal", "fsys", "spba"; + dmas = <&edma0 6 0 1>, <&edma0 7 0 0>; + dma-names = "rx", "tx"; + power-domains = <&pd IMX_SC_R_ESAI_0>, + <&pd IMX_SC_R_DMA_0_CH6>, + <&pd IMX_SC_R_DMA_0_CH7>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_spdif0: spdif@59020000 { + compatible = "fsl,imx8qm-spdif"; + reg = <0x59020000 0x10000>; + interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, /* rx */ + <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>; /* tx */ + clocks = <&adma_lpcg IMX_ADMA_LPCG_SPDIF_0_GCLKW>, /* core */ + <&clk IMX_CLK_DUMMY>, /* rxtx0 */ + <&adma_lpcg IMX_ADMA_LPCG_SPDIF_0_TX_CLK>, /* rxtx1 */ + <&clk IMX_CLK_DUMMY>, /* rxtx2 */ + <&clk IMX_CLK_DUMMY>, /* rxtx3 */ + <&clk IMX_CLK_DUMMY>, /* rxtx4 */ + <&clk IMX_ADMA_IPG_CLK_ROOT>, /* rxtx5 */ + <&clk IMX_CLK_DUMMY>, /* rxtx6 */ + <&clk IMX_CLK_DUMMY>, /* rxtx7 */ + <&clk IMX_CLK_DUMMY>; /* spba */ + clock-names = "core", "rxtx0", + "rxtx1", "rxtx2", + "rxtx3", "rxtx4", + "rxtx5", "rxtx6", + "rxtx7", "spba"; + dmas = <&edma0 8 0 5>, <&edma0 9 0 4>; + dma-names = "rx", "tx"; + power-domains = <&pd IMX_SC_R_SPDIF_0>, + <&pd IMX_SC_R_DMA_0_CH8>, + <&pd IMX_SC_R_DMA_0_CH9>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_sai0: sai@59040000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59040000 0x10000>; + interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SAI_0_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_SAI_0_MCLK>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <&edma0 12 0 1>, <&edma0 13 0 0>; + power-domains = <&pd IMX_SC_R_SAI_0>, + <&pd IMX_SC_R_DMA_0_CH12>, + <&pd IMX_SC_R_DMA_0_CH13>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_sai1: sai@59050000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59050000 0x10000>; + interrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SAI_1_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_SAI_1_MCLK>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <&edma0 14 0 1>, <&edma0 15 0 0>; + power-domains = <&pd IMX_SC_R_SAI_1>, + <&pd IMX_SC_R_DMA_0_CH14>, + <&pd IMX_SC_R_DMA_0_CH15>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_sai2: sai@59060000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59060000 0x10000>; + interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SAI_2_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_SAI_2_MCLK>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx"; + dmas = <&edma0 16 0 1>; + power-domains = <&pd IMX_SC_R_SAI_2>, + <&pd IMX_SC_R_DMA_0_CH16>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_sai3: sai@59070000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59070000 0x10000>; + interrupts = <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SAI_3_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_SAI_3_MCLK>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx"; + dmas = <&edma0 17 0 1>; + power-domains = <&pd IMX_SC_R_SAI_3>, + <&pd IMX_SC_R_DMA_0_CH17>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_asrc1: asrc@59800000 { + compatible = "fsl,imx8qm-asrc1"; + reg = <0x59800000 0x10000>; + interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_ASRC_0_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK0_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK1_CLK>, + <&adma_acm IMX_ADMA_ACM_AUD_CLK0_SEL>, + <&adma_acm IMX_ADMA_ACM_AUD_CLK1_SEL>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "ipg", "mem", + "asrck_0", "asrck_1", "asrck_2", "asrck_3", + "asrck_4", "asrck_5", "asrck_6", "asrck_7", + "asrck_8", "asrck_9", "asrck_a", "asrck_b", + "asrck_c", "asrck_d", "asrck_e", "asrck_f", + "spba"; + dmas = <&edma1 0 0 0>, <&edma1 1 0 0>, <&edma1 2 0 0>, + <&edma1 3 0 1>, <&edma1 4 0 1>, <&edma1 5 0 1>; + dma-names = "rxa", "rxb", "rxc", + "txa", "txb", "txc"; + fsl,asrc-rate = <8000>; + fsl,asrc-width = <16>; + power-domains = <&pd IMX_SC_R_ASRC_1>, + <&pd IMX_SC_R_DMA_1_CH0>, + <&pd IMX_SC_R_DMA_1_CH1>, + <&pd IMX_SC_R_DMA_1_CH2>, + <&pd IMX_SC_R_DMA_1_CH3>, + <&pd IMX_SC_R_DMA_1_CH4>, + <&pd IMX_SC_R_DMA_1_CH5>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_sai4: sai@59820000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59820000 0x10000>; + interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SAI_4_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_SAI_4_MCLK>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <&edma1 8 0 1>, <&edma1 9 0 0>; + power-domains = <&pd IMX_SC_R_SAI_4>, + <&pd IMX_SC_R_DMA_1_CH8>, + <&pd IMX_SC_R_DMA_1_CH9>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_sai5: sai@59830000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59830000 0x10000>; + interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SAI_5_IPG_CLK>, + <&clk IMX_CLK_DUMMY>, + <&adma_lpcg IMX_ADMA_LPCG_SAI_5_MCLK>, + <&clk IMX_CLK_DUMMY>, + <&clk IMX_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "tx"; + dmas = <&edma1 10 0 0>; + power-domains = <&pd IMX_SC_R_SAI_5>, + <&pd IMX_SC_R_DMA_1_CH10>, + <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>; + status = "disabled"; + }; + + adma_amix: amix@59840000 { + compatible = "fsl,imx8qm-amix"; + reg = <0x59840000 0x10000>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_AMIX_IPG_CLK>; + clock-names = "ipg"; + power-domains = <&pd IMX_SC_R_AMIX>; + status = "disabled"; + }; + + adma_mqs: mqs@59850000 { + compatible = "fsl,imx8qm-mqs"; + reg = <0x59850000 0x10000>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_MQS_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_MQS_MCLK>; + clock-names = "core", "mclk"; + power-domains = <&pd IMX_SC_R_MQS_0>; + status = "disabled"; + }; +}; |