diff options
Diffstat (limited to 'arch')
831 files changed, 13229 insertions, 13075 deletions
diff --git a/arch/alpha/include/asm/thread_info.h b/arch/alpha/include/asm/thread_info.h index 4554ecbff7c6..1f8c72959fb6 100644 --- a/arch/alpha/include/asm/thread_info.h +++ b/arch/alpha/include/asm/thread_info.h @@ -7,6 +7,7 @@ #include <asm/processor.h> #include <asm/types.h> #include <asm/hwrpb.h> +#include <asm/sysinfo.h> #endif #ifndef __ASSEMBLY__ @@ -21,6 +22,7 @@ struct thread_info { mm_segment_t addr_limit; /* thread address space */ unsigned cpu; /* current CPU */ int preempt_count; /* 0 => preemptable, <0 => BUG */ + unsigned int status; /* thread-synchronous flags */ int bpt_nsaved; unsigned long bpt_addr[2]; /* breakpoint handling */ @@ -63,8 +65,6 @@ register struct thread_info *__current_thread_info __asm__("$8"); * - these are process state flags and used from assembly * - pending work-to-be-done flags come first and must be assigned to be * within bits 0 to 7 to fit in and immediate operand. - * - ALPHA_UAC_SHIFT below must be kept consistent with the unaligned - * control flags. * * TIF_SYSCALL_TRACE is known to be 0 via blbs. */ @@ -72,18 +72,12 @@ register struct thread_info *__current_thread_info __asm__("$8"); #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_POLLING_NRFLAG 8 /* poll_idle is polling NEED_RESCHED */ #define TIF_DIE_IF_KERNEL 9 /* dik recursion lock */ -#define TIF_UAC_NOPRINT 10 /* ! Preserve sequence of following */ -#define TIF_UAC_NOFIX 11 /* ! flags as they match */ -#define TIF_UAC_SIGBUS 12 /* ! userspace part of 'osf_sysinfo' */ #define TIF_MEMDIE 13 /* is terminating due to OOM killer */ -#define TIF_RESTORE_SIGMASK 14 /* restore signal mask in do_signal */ #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) -#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) /* Work to do on interrupt/exception return. */ @@ -94,29 +88,63 @@ register struct thread_info *__current_thread_info __asm__("$8"); #define _TIF_ALLWORK_MASK (_TIF_WORK_MASK \ | _TIF_SYSCALL_TRACE) -#define ALPHA_UAC_SHIFT TIF_UAC_NOPRINT -#define ALPHA_UAC_MASK (1 << TIF_UAC_NOPRINT | 1 << TIF_UAC_NOFIX | \ - 1 << TIF_UAC_SIGBUS) +#define TS_UAC_NOPRINT 0x0001 /* ! Preserve the following three */ +#define TS_UAC_NOFIX 0x0002 /* ! flags as they match */ +#define TS_UAC_SIGBUS 0x0004 /* ! userspace part of 'osf_sysinfo' */ +#define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ +#define TS_POLLING 0x0010 /* idle task polling need_resched, + skip sending interrupt */ -#define SET_UNALIGN_CTL(task,value) ({ \ - task_thread_info(task)->flags = ((task_thread_info(task)->flags & \ - ~ALPHA_UAC_MASK) \ - | (((value) << ALPHA_UAC_SHIFT) & (1<<TIF_UAC_NOPRINT))\ - | (((value) << (ALPHA_UAC_SHIFT + 1)) & (1<<TIF_UAC_SIGBUS)) \ - | (((value) << (ALPHA_UAC_SHIFT - 1)) & (1<<TIF_UAC_NOFIX)));\ +#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) + +#ifndef __ASSEMBLY__ +#define HAVE_SET_RESTORE_SIGMASK 1 +static inline void set_restore_sigmask(void) +{ + struct thread_info *ti = current_thread_info(); + ti->status |= TS_RESTORE_SIGMASK; + WARN_ON(!test_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags)); +} +static inline void clear_restore_sigmask(void) +{ + current_thread_info()->status &= ~TS_RESTORE_SIGMASK; +} +static inline bool test_restore_sigmask(void) +{ + return current_thread_info()->status & TS_RESTORE_SIGMASK; +} +static inline bool test_and_clear_restore_sigmask(void) +{ + struct thread_info *ti = current_thread_info(); + if (!(ti->status & TS_RESTORE_SIGMASK)) + return false; + ti->status &= ~TS_RESTORE_SIGMASK; + return true; +} +#endif + +#define SET_UNALIGN_CTL(task,value) ({ \ + __u32 status = task_thread_info(task)->status & ~UAC_BITMASK; \ + if (value & PR_UNALIGN_NOPRINT) \ + status |= TS_UAC_NOPRINT; \ + if (value & PR_UNALIGN_SIGBUS) \ + status |= TS_UAC_SIGBUS; \ + if (value & 4) /* alpha-specific */ \ + status |= TS_UAC_NOFIX; \ + task_thread_info(task)->status = status; \ 0; }) #define GET_UNALIGN_CTL(task,value) ({ \ - put_user((task_thread_info(task)->flags & (1 << TIF_UAC_NOPRINT))\ - >> ALPHA_UAC_SHIFT \ - | (task_thread_info(task)->flags & (1 << TIF_UAC_SIGBUS))\ - >> (ALPHA_UAC_SHIFT + 1) \ - | (task_thread_info(task)->flags & (1 << TIF_UAC_NOFIX))\ - >> (ALPHA_UAC_SHIFT - 1), \ - (int __user *)(value)); \ + __u32 status = task_thread_info(task)->status & ~UAC_BITMASK; \ + __u32 res = 0; \ + if (status & TS_UAC_NOPRINT) \ + res |= PR_UNALIGN_NOPRINT; \ + if (status & TS_UAC_SIGBUS) \ + res |= PR_UNALIGN_SIGBUS; \ + if (status & TS_UAC_NOFIX) \ + res |= 4; \ + put_user(res, (int __user *)(value)); \ }) -#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) - #endif /* __KERNEL__ */ #endif /* _ALPHA_THREAD_INFO_H */ diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c index 9eb090582cf1..1e6956a90608 100644 --- a/arch/alpha/kernel/osf_sys.c +++ b/arch/alpha/kernel/osf_sys.c @@ -793,8 +793,7 @@ SYSCALL_DEFINE5(osf_getsysinfo, unsigned long, op, void __user *, buffer, case GSI_UACPROC: if (nbytes < sizeof(unsigned int)) return -EINVAL; - w = (current_thread_info()->flags >> ALPHA_UAC_SHIFT) & - UAC_BITMASK; + w = current_thread_info()->status & UAC_BITMASK; if (put_user(w, (unsigned int __user *)buffer)) return -EFAULT; return 1; @@ -904,24 +903,20 @@ SYSCALL_DEFINE5(osf_setsysinfo, unsigned long, op, void __user *, buffer, break; case SSI_NVPAIRS: { - unsigned long v, w, i; - unsigned int old, new; + unsigned __user *p = buffer; + unsigned i; - for (i = 0; i < nbytes; ++i) { + for (i = 0, p = buffer; i < nbytes; ++i, p += 2) { + unsigned v, w, status; - if (get_user(v, 2*i + (unsigned int __user *)buffer)) - return -EFAULT; - if (get_user(w, 2*i + 1 + (unsigned int __user *)buffer)) + if (get_user(v, p) || get_user(w, p + 1)) return -EFAULT; switch (v) { case SSIN_UACPROC: - again: - old = current_thread_info()->flags; - new = old & ~(UAC_BITMASK << ALPHA_UAC_SHIFT); - new = new | (w & UAC_BITMASK) << ALPHA_UAC_SHIFT; - if (cmpxchg(¤t_thread_info()->flags, - old, new) != old) - goto again; + w &= UAC_BITMASK; + status = current_thread_info()->status; + status = (status & ~UAC_BITMASK) | w; + current_thread_info()->status = status; break; default: diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c index 4054e0ffe2b2..51987dcf79b8 100644 --- a/arch/alpha/kernel/process.c +++ b/arch/alpha/kernel/process.c @@ -49,7 +49,7 @@ EXPORT_SYMBOL(pm_power_off); void cpu_idle(void) { - set_thread_flag(TIF_POLLING_NRFLAG); + current_thread_info()->status |= TS_POLLING; while (1) { /* FIXME -- EV6 and LCA45 know how to power down diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c index 80d987c0e9aa..272666d006df 100644 --- a/arch/alpha/kernel/traps.c +++ b/arch/alpha/kernel/traps.c @@ -780,17 +780,17 @@ do_entUnaUser(void __user * va, unsigned long opcode, /* Check the UAC bits to decide what the user wants us to do with the unaliged access. */ - if (!test_thread_flag (TIF_UAC_NOPRINT)) { + if (!(current_thread_info()->status & TS_UAC_NOPRINT)) { if (__ratelimit(&ratelimit)) { printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", current->comm, task_pid_nr(current), regs->pc - 4, va, opcode, reg); } } - if (test_thread_flag (TIF_UAC_SIGBUS)) + if ((current_thread_info()->status & TS_UAC_SIGBUS)) goto give_sigbus; /* Not sure why you'd want to use this, but... */ - if (test_thread_flag (TIF_UAC_NOFIX)) + if ((current_thread_info()->status & TS_UAC_NOFIX)) return; /* Don't bother reading ds in the access check since we already diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 73067efd4845..041cf0774776 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -937,7 +937,6 @@ config ARCH_OMAP select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_CLK - select NEED_MACH_GPIO_H help Support for TI's OMAP platform (OMAP1/2/3/4). @@ -1603,8 +1602,8 @@ config NR_CPUS default "4" config HOTPLUG_CPU - bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" - depends on SMP && HOTPLUG && EXPERIMENTAL + bool "Support for hot-pluggable CPUs" + depends on SMP && HOTPLUG help Say Y here to experiment with turning CPUs off and on. CPUs can be controlled through /sys/devices/system/cpu. @@ -1645,8 +1644,8 @@ config HZ default 100 config THUMB2_KERNEL - bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" - depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL + bool "Compile the kernel in Thumb-2 mode" + depends on CPU_V7 && !CPU_V6 && !CPU_V6K select AEABI select ARM_ASM_UNIFIED select ARM_UNWIND @@ -1850,6 +1849,7 @@ config XEN_DOM0 config XEN bool "Xen guest support on ARM (EXPERIMENTAL)" depends on EXPERIMENTAL && ARM && OF + depends on CPU_V7 && !CPU_V6 help Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. diff --git a/arch/arm/Makefile b/arch/arm/Makefile index f023e3acdfbd..5f914fca911b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -21,8 +21,6 @@ endif OBJCOPYFLAGS :=-O binary -R .comment -S GZFLAGS :=-9 #KBUILD_CFLAGS +=-pipe -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: -KBUILD_CFLAGS +=$(call cc-option,-marm,) # Never generate .eh_frame KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm) @@ -105,17 +103,20 @@ endif ifeq ($(CONFIG_THUMB2_KERNEL),y) AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) -CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) -AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb +CFLAGS_ISA :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) +AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb # Work around buggy relocation from gas if requested: ifeq ($(CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11),y) CFLAGS_MODULE +=-fno-optimize-sibling-calls endif +else +CFLAGS_ISA :=$(call cc-option,-marm,) +AFLAGS_ISA :=$(CFLAGS_ISA) endif # Need -Uarm for gcc < 3.x -KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_THUMB2) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm -KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_THUMB2) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float +KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm +KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float CHECKFLAGS += -D__arm__ diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 3fdab016aa5c..f2aa09eb658e 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y) $(obj)/xipImage: vmlinux FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' + $(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' $(obj)/Image $(obj)/zImage: FORCE @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)' @@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE $(obj)/Image: vmlinux FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' $(obj)/compressed/vmlinux: $(obj)/Image FORCE $(Q)$(MAKE) $(build)=$(obj)/compressed $@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' endif @@ -90,7 +90,7 @@ fi $(obj)/uImage: $(obj)/zImage FORCE @$(check_for_multiple_loadaddr) $(call if_changed,uimage) - @echo ' Image $@ is ready' + $(kecho) ' Image $@ is ready' $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE $(Q)$(MAKE) $(build)=$(obj)/bootp $@ @@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE $(obj)/bootpImage: $(obj)/bootp/bootp FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' PHONY += initrd FORCE initrd: diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index c1ce813fcc4a..f37cf9fa5fa0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -25,6 +25,8 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-trats.dtb \ exynos5250-smdk5250.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb +dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ + integratorcp.dtb dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ kirkwood-dns325.dtb \ diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi index b06c0db273b1..e6391a4e6649 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi @@ -126,14 +126,14 @@ #size-cells = <0>; btn3 { - label = "Buttin 3"; + label = "Button 3"; gpios = <&pioA 30 1>; linux,code = <0x103>; gpio-key,wakeup; }; btn4 { - label = "Buttin 4"; + label = "Button 4"; gpios = <&pioA 31 1>; linux,code = <0x104>; gpio-key,wakeup; diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 748ba7aa746c..4b0e0ca08f40 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -483,6 +483,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80004000 0x1000>; interrupts = <0 21 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -494,6 +496,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80122000 0x1000>; interrupts = <0 22 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -505,6 +509,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80128000 0x1000>; interrupts = <0 55 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -516,6 +522,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80110000 0x1000>; interrupts = <0 12 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -527,6 +535,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x8012a000 0x1000>; interrupts = <0 51 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -573,33 +583,38 @@ interrupts = <0 60 0x4>; status = "disabled"; }; + sdi@80118000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80118000 0x1000>; interrupts = <0 50 0x4>; status = "disabled"; }; + sdi@80005000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80005000 0x1000>; interrupts = <0 41 0x4>; status = "disabled"; }; + sdi@80119000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80119000 0x1000>; interrupts = <0 59 0x4>; status = "disabled"; }; + sdi@80114000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80114000 0x1000>; interrupts = <0 99 0x4>; status = "disabled"; }; + sdi@80008000 { compatible = "arm,pl18x", "arm,primecell"; - reg = <0x80114000 0x1000>; + reg = <0x80008000 0x1000>; interrupts = <0 100 0x4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 96fb824b5e6e..5a00022383e7 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -4,21 +4,32 @@ compatible = "marvell,dove"; model = "Marvell Armada 88AP510 SoC"; - interrupt-parent = <&intc>; - - intc: interrupt-controller { - compatible = "marvell,orion-intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0xf1020204 0x04>, - <0xf1020214 0x04>; - }; - - mbus@f1000000 { + soc@f1000000 { compatible = "simple-bus"; - ranges = <0 0xf1000000 0x4000000>; #address-cells = <1>; #size-cells = <1>; + interrupt-parent = <&intc>; + + ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */ + 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */ + 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */ + 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */ + 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */ + 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */ + 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */ + 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */ + + l2: l2-cache { + compatible = "marvell,tauros2-cache"; + marvell,tauros2-cache-features = <0>; + }; + + intc: interrupt-controller { + compatible = "marvell,orion-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20204 0x04>, <0x20214 0x04>; + }; uart0: serial@12000 { compatible = "ns16550a"; @@ -56,11 +67,6 @@ status = "disabled"; }; - wdt: wdt@20300 { - compatible = "marvell,orion-wdt"; - reg = <0x20300 0x28>; - }; - gpio0: gpio@d0400 { compatible = "marvell,orion-gpio"; #gpio-cells = <2>; @@ -139,5 +145,14 @@ nr-ports = <1>; status = "disabled"; }; + + crypto: crypto@30000 { + compatible = "marvell,orion-crypto"; + reg = <0x30000 0x10000>, + <0xc8000000 0x800>; + reg-names = "regs", "sram"; + interrupts = <31>; + status = "okay"; + }; }; }; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 73567b843e72..a21511c14071 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -20,8 +20,10 @@ compatible = "samsung,trats", "samsung,exynos4210"; memory { - reg = <0x40000000 0x20000000 - 0x60000000 0x20000000>; + reg = <0x40000000 0x10000000 + 0x50000000 0x10000000 + 0x60000000 0x10000000 + 0x70000000 0x10000000>; }; chosen { diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 9ca4ca70c1bc..6d31aa383460 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -69,6 +69,7 @@ interrupts = <13>, <56>; interrupt-names = "gpmi-dma", "bch"; clocks = <&clks 34>; + clock-names = "gpmi_io"; fsl,gpmi-dma-channel = <4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index e16d63155480..55c57ea6169e 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -85,6 +85,7 @@ interrupts = <88>, <41>; interrupt-names = "gpmi-dma", "bch"; clocks = <&clks 50>; + clock-names = "gpmi_io"; fsl,gpmi-dma-channel = <4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index 15df4c105e89..5bfa02a3f85c 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -37,6 +37,13 @@ pinctrl_hog: hoggrp { fsl,pins = < 176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */ + >; + }; + }; + + arm2 { + pinctrl_usdhc3_arm2: usdhc3grp-arm2 { + fsl,pins = < 1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */ 1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */ >; @@ -58,7 +65,8 @@ wp-gpios = <&gpio6 14 0>; vmmc-supply = <®_3p3v>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_1>; + pinctrl-0 = <&pinctrl_usdhc3_1 + &pinctrl_usdhc3_arm2>; status = "okay"; }; diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi index 8ac51c08269d..8fea375c734d 100644 --- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi +++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi @@ -48,17 +48,19 @@ #size-cells = <0>; button@1 { label = "Function Button"; - linux,code = <132>; + linux,code = <357>; gpios = <&gpio1 9 1>; }; button@2 { label = "Power-on Switch"; - linux,code = <116>; + linux,code = <0>; + linux,input-type = <5>; gpios = <&gpio1 10 1>; }; button@3 { label = "Power-auto Switch"; - linux,code = <142>; + linux,code = <1>; + linux,input-type = <5>; gpios = <&gpio1 11 1>; }; }; @@ -67,28 +69,28 @@ compatible = "gpio-leds"; led@1 { - label = "lschlv2:blue:func"; + label = "lsxl:blue:func"; gpios = <&gpio1 4 1>; }; led@2 { - label = "lschlv2:red:alarm"; + label = "lsxl:red:alarm"; gpios = <&gpio1 5 1>; }; led@3 { - label = "lschlv2:amber:info"; + label = "lsxl:amber:info"; gpios = <&gpio1 6 1>; }; led@4 { - label = "lschlv2:blue:power"; + label = "lsxl:blue:power"; gpios = <&gpio1 7 1>; linux,default-trigger = "default-on"; }; led@5 { - label = "lschlv2:red:func"; + label = "lsxl:red:func"; gpios = <&gpio1 16 1>; }; }; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index f38ea8771b44..696e929d0304 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -257,7 +257,7 @@ interrupt-names = "common", "tx", "rx", "sidetone"; interrupt-parent = <&intc>; ti,buffer-size = <1280>; - ti,hwmods = "mcbsp2"; + ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; }; mcbsp3: mcbsp@49024000 { @@ -272,7 +272,7 @@ interrupt-names = "common", "tx", "rx", "sidetone"; interrupt-parent = <&intc>; ti,buffer-size = <128>; - ti,hwmods = "mcbsp3"; + ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; }; mcbsp4: mcbsp@49026000 { diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi index b459691655ab..330f833ac3b0 100644 --- a/arch/arm/boot/dts/wm8505.dtsi +++ b/arch/arm/boot/dts/wm8505.dtsi @@ -71,13 +71,13 @@ ehci@d8007100 { compatible = "via,vt8500-ehci"; reg = <0xd8007100 0x200>; - interrupts = <43>; + interrupts = <1>; }; uhci@d8007300 { compatible = "platform-uhci"; reg = <0xd8007300 0x200>; - interrupts = <43>; + interrupts = <0>; }; fb@d8050800 { diff --git a/arch/arm/configs/afeb9260_defconfig b/arch/arm/configs/afeb9260_defconfig deleted file mode 100644 index c285a9d777d9..000000000000 --- a/arch/arm/configs/afeb9260_defconfig +++ /dev/null @@ -1,106 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9260=y -CONFIG_MACH_AFEB9260=y -CONFIG_AT91_PROGRAMMABLE_CLOCKS=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" -CONFIG_FPE_NWFPE=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_ATMEL_SSC=y -CONFIG_EEPROM_AT24=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_GPIO=y -CONFIG_SPI=y -CONFIG_SPI_DEBUG=y -CONFIG_SPI_ATMEL=y -CONFIG_SPI_SPIDEV=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_ZERO=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_RTC_CLASS=y -CONFIG_RTC_DEBUG=y -CONFIG_RTC_DRV_FM3130=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_INOTIFY=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO=y -CONFIG_SYSCTL_SYSCALL_CHECK=y -# CONFIG_FTRACE is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_CRC_T10DIF=y diff --git a/arch/arm/configs/cam60_defconfig b/arch/arm/configs/cam60_defconfig deleted file mode 100644 index 14579711d8fc..000000000000 --- a/arch/arm/configs/cam60_defconfig +++ /dev/null @@ -1,173 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_AUDIT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_KALLSYMS_ALL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9260=y -CONFIG_MACH_CAM60=y -CONFIG_ZBOOT_ROM_BSS=0x20004000 -CONFIG_CMDLINE="console=ttyS0,115200 noinitrd root=/dev/mtdblock0 rootfstype=jffs2 mem=64M" -CONFIG_FPE_NWFPE=y -CONFIG_BINFMT_AOUT=y -CONFIG_BINFMT_MISC=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_NETWORK_SECMARK=y -CONFIG_CFG80211=m -CONFIG_MAC80211=m -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PLATRAM=m -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_SCSI_TGT=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_SCSI_SPI_ATTRS=m -CONFIG_SCSI_FC_ATTRS=m -CONFIG_SCSI_ISCSI_ATTRS=m -CONFIG_SCSI_SAS_LIBSAS=m -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -CONFIG_BROADCOM_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_LKKBD=m -CONFIG_KEYBOARD_NEWTON=m -CONFIG_KEYBOARD_STOWAWAY=m -CONFIG_KEYBOARD_SUNKBD=m -CONFIG_KEYBOARD_XTKBD=m -CONFIG_MOUSE_SERIAL=m -CONFIG_MOUSE_APPLETOUCH=m -CONFIG_MOUSE_VSXXXAA=m -# CONFIG_SERIO_SERPORT is not set -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_SERIAL_NONSTANDARD=y -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_SPI=y -CONFIG_SPI_ATMEL=y -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_LIBUSUAL=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_INTF_DEV_UIE_EMUL=y -CONFIG_RTC_DRV_TEST=m -CONFIG_RTC_DRV_AT91SAM9=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT3_FS=y -CONFIG_INOTIFY=y -CONFIG_QUOTA=y -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_DEFAULT="cp437" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=y -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_UNUSED_SYMBOLS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO=y -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_DEFLATE=m -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC32=m -CONFIG_LIBCRC32C=m diff --git a/arch/arm/configs/cpu9260_defconfig b/arch/arm/configs/cpu9260_defconfig deleted file mode 100644 index 921480c23b98..000000000000 --- a/arch/arm/configs/cpu9260_defconfig +++ /dev/null @@ -1,116 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9260=y -CONFIG_MACH_CPU9260=y -# CONFIG_ARM_THUMB is not set -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PLATRAM=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=y -CONFIG_BLK_DEV_RAM=y -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_PPP=y -CONFIG_PPP_ASYNC=y -CONFIG_PPP_DEFLATE=y -CONFIG_PPP_BSDCOMP=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_LEGACY_PTY_COUNT=32 -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_GPIO=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_AT91SAM9X_WATCHDOG=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_MMC=y -CONFIG_MMC_ATMELMCI=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_HCTOSYS is not set -CONFIG_RTC_DRV_DS1307=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_AUTOFS4_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_CRAMFS=y -CONFIG_MINIX_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set diff --git a/arch/arm/configs/cpu9g20_defconfig b/arch/arm/configs/cpu9g20_defconfig deleted file mode 100644 index ea116cbdffa1..000000000000 --- a/arch/arm/configs/cpu9g20_defconfig +++ /dev/null @@ -1,116 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9G20=y -CONFIG_MACH_CPU9G20=y -# CONFIG_ARM_THUMB is not set -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PLATRAM=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=y -CONFIG_BLK_DEV_RAM=y -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_SMSC_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -CONFIG_PPP=y -CONFIG_PPP_ASYNC=y -CONFIG_PPP_DEFLATE=y -CONFIG_PPP_BSDCOMP=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_LEGACY_PTY_COUNT=32 -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_GPIO=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_AT91SAM9X_WATCHDOG=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_MMC=y -CONFIG_MMC_ATMELMCI=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_HCTOSYS is not set -CONFIG_RTC_DRV_DS1307=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y -CONFIG_AUTOFS4_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_CRAMFS=y -CONFIG_MINIX_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 66aa7a6db884..394ded624e37 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -139,6 +139,7 @@ CONFIG_I2C_IMX=y CONFIG_SPI=y CONFIG_SPI_IMX=y CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_MC9S08DZ60=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y CONFIG_IMX2_WDT=y @@ -155,6 +156,7 @@ CONFIG_SOC_CAMERA=y CONFIG_SOC_CAMERA_OV2640=y CONFIG_VIDEO_MX3=y CONFIG_FB=y +CONFIG_LCD_PLATFORM=y CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_L4F00242T03=y diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index 7bcf850eddcd..3458752c4bb2 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch/arm/configs/mvebu_defconfig @@ -1,6 +1,6 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y +CONFIG_IRQ_DOMAIN_DEBUG=y CONFIG_HIGH_RES_TIMERS=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y @@ -9,10 +9,12 @@ CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_ARCH_MVEBU=y -CONFIG_MACH_ARMADA_370_XP=y +CONFIG_MACH_ARMADA_370=y +CONFIG_MACH_ARMADA_XP=y +# CONFIG_CACHE_L2X0 is not set CONFIG_AEABI=y CONFIG_HIGHMEM=y -CONFIG_USE_OF=y +# CONFIG_COMPACTION is not set CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ARM_APPENDED_DTB=y @@ -23,6 +25,8 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y +# CONFIG_USB_SUPPORT is not set +# CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set diff --git a/arch/arm/configs/qil-a9260_defconfig b/arch/arm/configs/qil-a9260_defconfig deleted file mode 100644 index 42d5db1876ab..000000000000 --- a/arch/arm/configs/qil-a9260_defconfig +++ /dev/null @@ -1,114 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9260=y -CONFIG_MACH_QIL_A9260=y -CONFIG_AT91_SLOW_CLOCK=y -CONFIG_AT91_EARLY_USART0=y -# CONFIG_ARM_THUMB is not set -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="mem=64M console=ttyS1,115200" -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_IP_MROUTE=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_SPI=y -CONFIG_SPI_ATMEL=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_MMC=y -CONFIG_MMC_ATMELMCI=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_M41T94=y -CONFIG_EXT2_FS=y -CONFIG_INOTIFY=y -CONFIG_FUSE_FS=m -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -# CONFIG_CRYPTO_HW is not set diff --git a/arch/arm/configs/sam9_l9260_defconfig b/arch/arm/configs/sam9_l9260_defconfig deleted file mode 100644 index b4384af1bea6..000000000000 --- a/arch/arm/configs/sam9_l9260_defconfig +++ /dev/null @@ -1,148 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_AUDIT=y -CONFIG_LOG_BUF_SHIFT=15 -CONFIG_BLK_DEV_INITRD=y -CONFIG_SLAB=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9260=y -CONFIG_MACH_SAM9_L9260=y -CONFIG_MTD_AT91_DATAFLASH_CARD=y -CONFIG_PREEMPT=y -CONFIG_LEDS=y -CONFIG_LEDS_CPU=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyS0,115200 mem=64M initrd=0x21100000,4194304 root=/dev/ram0 rw" -CONFIG_FPE_NWFPE=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_NET_KEY=y -CONFIG_INET=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_IPV6 is not set -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_MTD_NAND_PLATFORM=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=25 -CONFIG_MTD_UBI_GLUEBI=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -# CONFIG_MISC_DEVICES is not set -CONFIG_RAID_ATTRS=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_LEGACY_PTY_COUNT=16 -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_LIBUSUAL=y -CONFIG_USB_GADGET=y -CONFIG_MMC=y -CONFIG_MMC_DEBUG=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1553=y -CONFIG_RTC_DRV_DS1742=y -CONFIG_RTC_DRV_M48T86=y -CONFIG_RTC_DRV_V3020=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_INOTIFY=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=y -CONFIG_NLS_CODEPAGE_775=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_CODEPAGE_852=y -CONFIG_NLS_CODEPAGE_855=y -CONFIG_NLS_CODEPAGE_857=y -CONFIG_NLS_CODEPAGE_860=y -CONFIG_NLS_CODEPAGE_861=y -CONFIG_NLS_CODEPAGE_862=y -CONFIG_NLS_CODEPAGE_863=y -CONFIG_NLS_CODEPAGE_864=y -CONFIG_NLS_CODEPAGE_865=y -CONFIG_NLS_CODEPAGE_866=y -CONFIG_NLS_CODEPAGE_869=y -CONFIG_NLS_CODEPAGE_936=y -CONFIG_NLS_CODEPAGE_950=y -CONFIG_NLS_CODEPAGE_932=y -CONFIG_NLS_CODEPAGE_949=y -CONFIG_NLS_CODEPAGE_874=y -CONFIG_NLS_ISO8859_8=y -CONFIG_NLS_CODEPAGE_1250=y -CONFIG_NLS_CODEPAGE_1251=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=y -CONFIG_NLS_ISO8859_3=y -CONFIG_NLS_ISO8859_4=y -CONFIG_NLS_ISO8859_5=y -CONFIG_NLS_ISO8859_6=y -CONFIG_NLS_ISO8859_7=y -CONFIG_NLS_ISO8859_9=y -CONFIG_NLS_ISO8859_13=y -CONFIG_NLS_ISO8859_14=y -CONFIG_NLS_ISO8859_15=y -CONFIG_NLS_KOI8_R=y -CONFIG_NLS_KOI8_U=y -CONFIG_NLS_UTF8=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_UNUSED_SYMBOLS=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/configs/stamp9g20_defconfig b/arch/arm/configs/stamp9g20_defconfig deleted file mode 100644 index 52f1488591c7..000000000000 --- a/arch/arm/configs/stamp9g20_defconfig +++ /dev/null @@ -1,128 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_TREE_PREEMPT_RCU=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_LBDAF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9G20=y -CONFIG_MACH_PORTUXG20=y -CONFIG_MACH_STAMP9G20=y -CONFIG_AT91_PROGRAMMABLE_CLOCKS=y -CONFIG_AT91_SLOW_CLOCK=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" -CONFIG_KEXEC=y -CONFIG_CPU_IDLE=y -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -# CONFIG_WIRELESS is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_MACB=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_GPIO=y -CONFIG_SPI=y -CONFIG_SPI_ATMEL=y -CONFIG_SPI_SPIDEV=y -CONFIG_GPIO_SYSFS=y -CONFIG_W1=y -CONFIG_W1_MASTER_GPIO=y -CONFIG_W1_SLAVE_THERM=y -CONFIG_W1_SLAVE_DS2431=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_AT91SAM9X_WATCHDOG=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=m -CONFIG_USB_ZERO=m -CONFIG_USB_ETH=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_MMC=y -CONFIG_MMC_ATMELMCI=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_AT91SAM9=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_INOTIFY=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_15=y -CONFIG_NLS_UTF8=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_ARM_UNWIND is not set diff --git a/arch/arm/configs/usb-a9260_defconfig b/arch/arm/configs/usb-a9260_defconfig deleted file mode 100644 index a1501e1e1a90..000000000000 --- a/arch/arm/configs/usb-a9260_defconfig +++ /dev/null @@ -1,105 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9260=y -CONFIG_MACH_USB_A9260=y -CONFIG_AT91_SLOW_CLOCK=y -# CONFIG_ARM_THUMB is not set -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="mem=64M console=ttyS0,115200" -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_IP_MROUTE=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_SPI=y -CONFIG_SPI_ATMEL=y -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_EXT2_FS=y -CONFIG_INOTIFY=y -CONFIG_FUSE_FS=m -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -# CONFIG_CRYPTO_HW is not set diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig index cdd4d2bd3962..2ba9e63d0f17 100644 --- a/arch/arm/configs/versatile_defconfig +++ b/arch/arm/configs/versatile_defconfig @@ -1,3 +1,4 @@ +CONFIG_ARCH_VERSATILE=y CONFIG_EXPERIMENTAL=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y diff --git a/arch/arm/include/asm/flat.h b/arch/arm/include/asm/flat.h index 59426a4595c9..e847d23351ed 100644 --- a/arch/arm/include/asm/flat.h +++ b/arch/arm/include/asm/flat.h @@ -8,7 +8,7 @@ #define flat_argvp_envp_on_stack() 1 #define flat_old_ram_flag(flags) (flags) #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -#define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp) +#define flat_get_addr_from_rp(rp, relval, flags, persistent) ((void)persistent,get_unaligned(rp)) #define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) #define flat_get_relocate_addr(rel) (rel) #define flat_set_persistent(relval, p) 0 diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 77bd79f2ffdb..7e1f76027f66 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h @@ -200,8 +200,8 @@ extern int __put_user_8(void *, unsigned long long); #define USER_DS KERNEL_DS #define segment_eq(a,b) (1) -#define __addr_ok(addr) (1) -#define __range_ok(addr,size) (0) +#define __addr_ok(addr) ((void)(addr),1) +#define __range_ok(addr,size) ((void)(addr),0) #define get_fs() (KERNEL_DS) static inline void set_fs(mm_segment_t fs) diff --git a/arch/arm/include/asm/xen/interface.h b/arch/arm/include/asm/xen/interface.h index ae05e56dd17d..5000397134b4 100644 --- a/arch/arm/include/asm/xen/interface.h +++ b/arch/arm/include/asm/xen/interface.h @@ -29,16 +29,22 @@ #ifndef __ASSEMBLY__ /* Explicitly size integers that represent pfns in the interface with - * Xen so that we can have one ABI that works for 32 and 64 bit guests. */ + * Xen so that we can have one ABI that works for 32 and 64 bit guests. + * Note that this means that the xen_pfn_t type may be capable of + * representing pfn's which the guest cannot represent in its own pfn + * type. However since pfn space is controlled by the guest this is + * fine since it simply wouldn't be able to create any sure pfns in + * the first place. + */ typedef uint64_t xen_pfn_t; +#define PRI_xen_pfn "llx" typedef uint64_t xen_ulong_t; +#define PRI_xen_ulong "llx" /* Guest handles for primitive C types. */ __DEFINE_GUEST_HANDLE(uchar, unsigned char); __DEFINE_GUEST_HANDLE(uint, unsigned int); -__DEFINE_GUEST_HANDLE(ulong, unsigned long); DEFINE_GUEST_HANDLE(char); DEFINE_GUEST_HANDLE(int); -DEFINE_GUEST_HANDLE(long); DEFINE_GUEST_HANDLE(void); DEFINE_GUEST_HANDLE(uint64_t); DEFINE_GUEST_HANDLE(uint32_t); diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h index 174202318dff..c6b9096cef95 100644 --- a/arch/arm/include/asm/xen/page.h +++ b/arch/arm/include/asm/xen/page.h @@ -10,7 +10,7 @@ #include <xen/interface/grant_table.h> #define pfn_to_mfn(pfn) (pfn) -#define phys_to_machine_mapping_valid (1) +#define phys_to_machine_mapping_valid(pfn) (1) #define mfn_to_pfn(mfn) (mfn) #define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT)) @@ -30,6 +30,8 @@ typedef struct xpaddr { #define XMADDR(x) ((xmaddr_t) { .maddr = (x) }) #define XPADDR(x) ((xpaddr_t) { .paddr = (x) }) +#define INVALID_P2M_ENTRY (~0UL) + static inline xmaddr_t phys_to_machine(xpaddr_t phys) { unsigned offset = phys.paddr & ~PAGE_MASK; @@ -74,9 +76,14 @@ static inline int m2p_remove_override(struct page *page, bool clear_pte) return 0; } +static inline bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn) +{ + BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); + return true; +} + static inline bool set_phys_to_machine(unsigned long pfn, unsigned long mfn) { - BUG(); - return false; + return __set_phys_to_machine(pfn, mfn); } #endif /* _ASM_ARM_XEN_PAGE_H */ diff --git a/arch/arm/include/debug/8250_32.S b/arch/arm/include/debug/8250_32.S new file mode 100644 index 000000000000..8db01eeabbb4 --- /dev/null +++ b/arch/arm/include/debug/8250_32.S @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit + * accesses to the 8250. + */ + +#include <linux/serial_reg.h> + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + /* The UART's don't have any flow control IO's wired up. */ + .macro waituart,rd,rx + .endm diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S index 7419deb1b948..bc1f07c49cd4 100644 --- a/arch/arm/include/debug/picoxcell.S +++ b/arch/arm/include/debug/picoxcell.S @@ -5,10 +5,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * - * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit - * accesses to the 8250. */ -#include <linux/serial_reg.h> #define UART_SHIFT 2 #define PICOXCELL_UART1_BASE 0x80230000 @@ -19,17 +16,4 @@ ldr \rp, =PICOXCELL_UART1_BASE .endm - .macro senduart,rd,rx - str \rd, [\rx, #UART_TX << UART_SHIFT] - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] - and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE - teq \rd, #UART_LSR_TEMT | UART_LSR_THRE - bne 1002b - .endm - - /* The UART's don't have any flow control IO's wired up. */ - .macro waituart,rd,rx - .endm +#include "8250_32.S" diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S index d6f26d23374f..966b2f994946 100644 --- a/arch/arm/include/debug/socfpga.S +++ b/arch/arm/include/debug/socfpga.S @@ -7,6 +7,9 @@ * published by the Free Software Foundation. */ +#define UART_SHIFT 2 +#define DEBUG_LL_UART_OFFSET 0x00002000 + .macro addruart, rp, rv, tmp mov \rp, #DEBUG_LL_UART_OFFSET orr \rp, \rp, #0x00c00000 @@ -14,3 +17,5 @@ orr \rp, \rp, #0xff000000 @ physical base .endm +#include "8250_32.S" + diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 417bac1846bd..34711757ba59 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -88,9 +88,9 @@ ENTRY(ret_from_fork) bl schedule_tail cmp r5, #0 movne r0, r4 - movne lr, pc + adrne lr, BSYM(1f) movne pc, r5 - get_thread_info tsk +1: get_thread_info tsk b ret_slow_syscall ENDPROC(ret_from_fork) diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 16cedb42c0c3..896165096d6a 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -34,6 +34,7 @@ #include <linux/list.h> #include <linux/kallsyms.h> #include <linux/proc_fs.h> +#include <linux/export.h> #include <asm/exception.h> #include <asm/mach/arch.h> @@ -109,6 +110,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags) /* Order is clear bits in "clr" then set bits in "set" */ irq_modify_status(irq, clr, set & ~clr); } +EXPORT_SYMBOL_GPL(set_irq_flags); void __init init_IRQ(void) { diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c index 38c1a3b103a0..839312905067 100644 --- a/arch/arm/kernel/kprobes-test-arm.c +++ b/arch/arm/kernel/kprobes-test-arm.c @@ -366,7 +366,9 @@ void kprobe_arm_test_cases(void) TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3") TEST_UNSUPPORTED(".word 0xe0500090 @ undef") TEST_UNSUPPORTED(".word 0xe05fff9f @ undef") +#endif +#if __LINUX_ARM_ARCH__ >= 7 TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13") @@ -456,6 +458,8 @@ void kprobe_arm_test_cases(void) TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */ #if __LINUX_ARM_ARCH__ >= 6 TEST_UNSUPPORTED("ldrex r2, [sp]") +#endif +#if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K) TEST_UNSUPPORTED("strexd r0, r2, r3, [sp]") TEST_UNSUPPORTED("ldrexd r2, r3, [sp]") TEST_UNSUPPORTED("strexb r0, r2, [sp]") diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index e29c3337ca81..8ef8c9337809 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -45,10 +45,9 @@ int machine_kexec_prepare(struct kimage *image) for (i = 0; i < image->nr_segments; i++) { current_segment = &image->segment[i]; - err = memblock_is_region_memory(current_segment->mem, - current_segment->memsz); - if (err) - return - EINVAL; + if (!memblock_is_region_memory(current_segment->mem, + current_segment->memsz)) + return -EINVAL; err = get_user(header, (__be32*)current_segment->buf); if (err) diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 93971b1a4f0b..53c0304b734a 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -96,6 +96,10 @@ armpmu_event_set_period(struct perf_event *event, s64 period = hwc->sample_period; int ret = 0; + /* The period may have been changed by PERF_EVENT_IOC_PERIOD */ + if (unlikely(period != hwc->last_period)) + left = period - (hwc->last_period - left); + if (unlikely(left <= -period)) { left = period; local64_set(&hwc->period_left, left); diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 8e20754dd31d..fbc8b2623d82 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -294,18 +294,24 @@ static void percpu_timer_setup(void); asmlinkage void __cpuinit secondary_start_kernel(void) { struct mm_struct *mm = &init_mm; - unsigned int cpu = smp_processor_id(); + unsigned int cpu; + + /* + * The identity mapping is uncached (strongly ordered), so + * switch away from it before attempting any exclusive accesses. + */ + cpu_switch_mm(mm->pgd, mm); + enter_lazy_tlb(mm, current); + local_flush_tlb_all(); /* * All kernel threads share the same mm context; grab a * reference and switch to it. */ + cpu = smp_processor_id(); atomic_inc(&mm->mm_count); current->active_mm = mm; cpumask_set_cpu(cpu, mm_cpumask(mm)); - cpu_switch_mm(mm->pgd, mm); - enter_lazy_tlb(mm, current); - local_flush_tlb_all(); printk("CPU%u: Booted secondary processor\n", cpu); diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index e1f906989bb8..b22d700fea27 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -42,10 +42,10 @@ static void twd_set_mode(enum clock_event_mode mode, switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - /* timer load already set up */ ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_PERIODIC; - __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD); + __raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ), + twd_base + TWD_TIMER_LOAD); break; case CLOCK_EVT_MODE_ONESHOT: /* period set, and timer enabled in 'next_event' hook */ diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c index 9d0a30032d7f..0dc53854a5d8 100644 --- a/arch/arm/lib/delay.c +++ b/arch/arm/lib/delay.c @@ -45,6 +45,7 @@ int read_current_timer(unsigned long *timer_val) *timer_val = delay_timer->read_current_timer(); return 0; } +EXPORT_SYMBOL_GPL(read_current_timer); static void __timer_delay(unsigned long cycles) { diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index b14207101938..043624219b55 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -21,19 +21,13 @@ config SOC_AT91SAM9 bool select CPU_ARM926T select GENERIC_CLOCKEVENTS + select MULTI_IRQ_HANDLER + select SPARSE_IRQ menu "Atmel AT91 System-on-Chip" comment "Atmel AT91 Processor" -config SOC_AT91SAM9 - bool - select AT91_SAM9_SMC - select AT91_SAM9_TIME - select CPU_ARM926T - select MULTI_IRQ_HANDLER - select SPARSE_IRQ - config SOC_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/at91_aic.h index eaea66197fa1..eaea66197fa1 100644 --- a/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/arch/arm/mach-at91/at91_aic.h diff --git a/arch/arm/mach-at91/include/mach/at91_rstc.h b/arch/arm/mach-at91/at91_rstc.h index 875fa336800b..875fa336800b 100644 --- a/arch/arm/mach-at91/include/mach/at91_rstc.h +++ b/arch/arm/mach-at91/at91_rstc.h diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/at91_shdwc.h index 60478ea8bd46..60478ea8bd46 100644 --- a/arch/arm/mach-at91/include/mach/at91_shdwc.h +++ b/arch/arm/mach-at91/at91_shdwc.h diff --git a/arch/arm/mach-at91/include/mach/at91_tc.h b/arch/arm/mach-at91/at91_tc.h index 46a317fd7164..46a317fd7164 100644 --- a/arch/arm/mach-at91/include/mach/at91_tc.h +++ b/arch/arm/mach-at91/at91_tc.h diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index b4f0565aff63..aeac7cfc0313 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -17,11 +17,11 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91rm9200.h> -#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_st.h> #include <mach/cpu.h> +#include "at91_aic.h" #include "soc.h" #include "generic.h" #include "clock.h" @@ -187,7 +187,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200.0", &twi_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), CLKDEV_CON_ID("pioA", &pioA_clk), diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index a563189cdfc3..94bbf7dedb09 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -18,11 +18,11 @@ #include <linux/platform_device.h> #include <linux/i2c-gpio.h> -#include <mach/board.h> #include <mach/at91rm9200.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> +#include "board.h" #include "generic.h" @@ -479,7 +479,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91rm9200_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -512,7 +512,7 @@ static struct resource twi_resources[] = { static struct platform_device at91rm9200_twi_device = { .name = "i2c-at91rm9200", - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index ad29f93f20ca..99429849f780 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -20,10 +20,10 @@ #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9260.h> -#include <mach/at91_aic.h> #include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include "at91_aic.h" +#include "at91_rstc.h" #include "soc.h" #include "generic.h" #include "clock.h" @@ -211,8 +211,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk), /* more usart lookup table for DT entries */ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk), diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index a76b8684f52d..2670bac7d984 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -19,7 +19,6 @@ #include <linux/platform_data/at91_adc.h> -#include <mach/board.h> #include <mach/cpu.h> #include <mach/at91sam9260.h> #include <mach/at91sam9260_matrix.h> @@ -27,6 +26,7 @@ #include <mach/at91sam9_smc.h> #include <mach/at91_adc.h> +#include "board.h" #include "generic.h" @@ -389,7 +389,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9260_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -421,7 +421,7 @@ static struct resource twi_resources[] = { }; static struct platform_device at91sam9260_twi_device = { - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 8d999eb1a137..c583ba224622 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -19,10 +19,10 @@ #include <asm/system_misc.h> #include <mach/cpu.h> #include <mach/at91sam9261.h> -#include <mach/at91_aic.h> #include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include "at91_aic.h" +#include "at91_rstc.h" #include "soc.h" #include "generic.h" #include "clock.h" @@ -178,8 +178,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261", &twi_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk), CLKDEV_CON_ID("pioA", &pioA_clk), CLKDEV_CON_ID("pioB", &pioB_clk), CLKDEV_CON_ID("pioC", &pioC_clk), diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 9752f17efba9..a3c0d976ad78 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -21,12 +21,12 @@ #include <linux/fb.h> #include <video/atmel_lcdc.h> -#include <mach/board.h> #include <mach/at91sam9261.h> #include <mach/at91sam9261_matrix.h> #include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> +#include "board.h" #include "generic.h" @@ -285,7 +285,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9261_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -317,7 +317,7 @@ static struct resource twi_resources[] = { }; static struct platform_device at91sam9261_twi_device = { - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 6a01d0360dfb..500ee19eaac9 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -18,10 +18,10 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9263.h> -#include <mach/at91_aic.h> #include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include "at91_aic.h" +#include "at91_rstc.h" #include "soc.h" #include "generic.h" #include "clock.h" @@ -193,7 +193,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), CLKDEV_CON_ID("pioA", &pioA_clk), diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 8dde220b42b6..2ad7fea02535 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -20,12 +20,12 @@ #include <linux/fb.h> #include <video/atmel_lcdc.h> -#include <mach/board.h> #include <mach/at91sam9263.h> #include <mach/at91sam9263_matrix.h> #include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> +#include "board.h" #include "generic.h" @@ -567,7 +567,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9263_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -600,7 +600,7 @@ static struct resource twi_resources[] = { static struct platform_device at91sam9263_twi_device = { .name = "i2c-at91sam9260", - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index ffc0957d7623..358412f1f5f8 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c @@ -20,8 +20,18 @@ #include <asm/mach/time.h> -#include <mach/at91_pit.h> - +#define AT91_PIT_MR 0x00 /* Mode Register */ +#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ +#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ +#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ + +#define AT91_PIT_SR 0x04 /* Status Register */ +#define AT91_PIT_PITS (1 << 0) /* Timer Status */ + +#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */ +#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */ +#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ +#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) #define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20) diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S index 7af2e108b8a0..f039538d3bdb 100644 --- a/arch/arm/mach-at91/at91sam9_alt_reset.S +++ b/arch/arm/mach-at91/at91sam9_alt_reset.S @@ -16,7 +16,7 @@ #include <linux/linkage.h> #include <mach/hardware.h> #include <mach/at91_ramc.h> -#include <mach/at91_rstc.h> +#include "at91_rstc.h" .arm diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 84af1b506d92..098fe16448c3 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -18,10 +18,10 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9g45.h> -#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h> +#include "at91_aic.h" #include "soc.h" #include "generic.h" #include "clock.h" diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index b1596072dcc2..ddc3285208f1 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -26,7 +26,6 @@ #include <video/atmel_lcdc.h> #include <mach/at91_adc.h> -#include <mach/board.h> #include <mach/at91sam9g45.h> #include <mach/at91sam9g45_matrix.h> #include <mach/at91_matrix.h> @@ -36,6 +35,7 @@ #include <media/atmel-isi.h> +#include "board.h" #include "generic.h" #include "clock.h" diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S index 9d457182c86c..721a1a34dd1d 100644 --- a/arch/arm/mach-at91/at91sam9g45_reset.S +++ b/arch/arm/mach-at91/at91sam9g45_reset.S @@ -13,8 +13,7 @@ #include <linux/linkage.h> #include <mach/hardware.h> #include <mach/at91_ramc.h> -#include <mach/at91_rstc.h> - +#include "at91_rstc.h" .arm .globl at91sam9g45_restart diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index 732d3d3f4ec5..896d09e1d24b 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -15,8 +15,8 @@ #include <mach/at91sam9n12.h> #include <mach/at91_pmc.h> #include <mach/cpu.h> -#include <mach/board.h> +#include "board.h" #include "soc.h" #include "generic.h" #include "clock.h" diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 72e908412222..97dd8f15e09a 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -19,10 +19,10 @@ #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9rl.h> -#include <mach/at91_aic.h> #include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include "at91_aic.h" +#include "at91_rstc.h" #include "soc.h" #include "generic.h" #include "clock.h" diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index d6ca0543ce8d..160384d93db2 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -17,13 +17,13 @@ #include <linux/fb.h> #include <video/atmel_lcdc.h> -#include <mach/board.h> #include <mach/at91sam9rl.h> #include <mach/at91sam9rl_matrix.h> #include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> #include <linux/platform_data/dma-atmel.h> +#include "board.h" #include "generic.h" @@ -314,7 +314,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9rl_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -347,7 +347,7 @@ static struct resource twi_resources[] = { static struct platform_device at91sam9rl_twi_device = { .name = "i2c-at91sam9g20", - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index e5035380dcbc..1d6655193de6 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -15,8 +15,8 @@ #include <mach/at91sam9x5.h> #include <mach/at91_pmc.h> #include <mach/cpu.h> -#include <mach/board.h> +#include "board.h" #include "soc.h" #include "generic.h" #include "clock.h" diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 6bd7300a2bc5..19ca79396905 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c @@ -18,9 +18,10 @@ #include <asm/system_misc.h> #include <asm/mach/arch.h> #include <mach/at91x40.h> -#include <mach/at91_aic.h> #include <mach/at91_st.h> #include <mach/timex.h> + +#include "at91_aic.h" #include "generic.h" /* @@ -88,6 +89,6 @@ void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS]) if (!priority) priority = at91x40_default_irq_priority; - at91_aic_init(priority); + at91_aic_init(priority, at91_extern_irq); } diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c index ee06d7bcdf76..0e57e440c061 100644 --- a/arch/arm/mach-at91/at91x40_time.c +++ b/arch/arm/mach-at91/at91x40_time.c @@ -26,7 +26,8 @@ #include <linux/io.h> #include <mach/hardware.h> #include <asm/mach/time.h> -#include <mach/at91_tc.h> + +#include "at91_tc.h" #define at91_tc_read(field) \ __raw_readl(AT91_IO_P2V(AT91_TC) + field) diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 22d8856094f1..b99b5752cc10 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c @@ -34,10 +34,10 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> #include <mach/cpu.h> -#include <mach/at91_aic.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 93a832f70232..854b97974287 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c @@ -43,9 +43,8 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> - +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 477e708497bc..28a18ce6d914 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c @@ -38,10 +38,10 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 71d8f362a1d5..c17bb533a949 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c @@ -35,9 +35,9 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index e71c473316e3..847432441ecc 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c @@ -40,12 +40,12 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91sam9260_matrix.h> #include <mach/at91_matrix.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index 2cbd1a2b6c35..2a7af7868747 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c @@ -36,12 +36,12 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" static struct gpio_led cpuat91_leds[] = { diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index 3e37437a7a61..78e025074423 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c @@ -38,9 +38,9 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 872871ab1160..ec0f3abd504b 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c @@ -35,9 +35,9 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index e8f45c4e0ea8..03f028e4d8ce 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c @@ -15,15 +15,14 @@ #include <linux/of_irq.h> #include <linux/of_platform.h> -#include <mach/board.h> -#include <mach/at91_aic.h> - #include <asm/setup.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c index 01f66e99ece7..b489388a6f84 100644 --- a/arch/arm/mach-at91/board-eb01.c +++ b/arch/arm/mach-at91/board-eb01.c @@ -27,8 +27,9 @@ #include <mach/hardware.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/board.h> -#include <mach/at91_aic.h> + +#include "at91_aic.h" +#include "board.h" #include "generic.h" static void __init at91eb01_init_irq(void) diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index 0cfac16ee9d5..9f5e71c95f05 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c @@ -35,9 +35,8 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> - +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index 3d931ffac4bf..ef69e0ebe949 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c @@ -37,10 +37,10 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> #include <mach/cpu.h> -#include <mach/at91_aic.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index d93658a2b128..50f3d3795c05 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c @@ -24,12 +24,12 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" static void __init eco920_init_early(void) diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index fa98abacb1ba..5d44eba0f20f 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c @@ -33,9 +33,9 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" static void __init flexibity_init_early(void) diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index 6e47071d8206..191d37c16bab 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c @@ -41,10 +41,10 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index a9d5e78118c5..23a2fa17ab29 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c @@ -30,14 +30,14 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/gsia18s.h> -#include <mach/stamp9g20.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gsia18s.h" +#include "stamp9g20.h" static void __init gsia18s_init_early(void) { diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index 86050da3ba53..9a43d1e1a037 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c @@ -34,10 +34,10 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/cpu.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index abe9fed7a3e0..f168bec2369f 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c @@ -35,12 +35,12 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> #include <mach/cpu.h> -#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index 9cda3fd346ae..bc7a1c4a1f6a 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c @@ -44,10 +44,10 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" @@ -129,7 +129,7 @@ static struct spi_board_info neocore926_spi_devices[] = { .max_speed_hz = 125000 * 16, .bus_num = 0, .platform_data = &ads_info, - .irq = AT91SAM9263_ID_IRQ1, + .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1, }, #endif }; diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index 9ca3e32c54cb..0299554495dd 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c @@ -29,13 +29,13 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/stamp9g20.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "stamp9g20.h" static void __init pcontrol_g20_init_early(void) diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index f83e1de699e6..4938f1cd5e13 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c @@ -37,11 +37,11 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 799f214edebe..33b1628467ea 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c @@ -40,11 +40,11 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_shdwc.h> +#include "at91_aic.h" +#include "at91_shdwc.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index 66338e7ebfba..9e5061bef0d0 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c @@ -39,11 +39,11 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 5d1b5729dc69..58277dbc718f 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c @@ -39,11 +39,11 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c index a0ecf04e9ae3..2e8b8339a206 100644 --- a/arch/arm/mach-at91/board-rsi-ews.c +++ b/arch/arm/mach-at91/board-rsi-ews.c @@ -25,11 +25,11 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <linux/gpio.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" static void __init rsi_ews_init_early(void) diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index c5f01acce3c0..b75fbf6003a1 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c @@ -37,10 +37,10 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 8cd6e679fbe0..f0135cd1d858 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c @@ -41,12 +41,12 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_shdwc.h> #include <mach/system_rev.h> +#include "at91_aic.h" +#include "at91_shdwc.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 27b3af1a3047..13ebaa8e4100 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -45,12 +45,12 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_shdwc.h> #include <mach/system_rev.h> +#include "at91_aic.h" +#include "at91_shdwc.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" @@ -309,7 +309,7 @@ static struct spi_board_info ek_spi_devices[] = { .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ .bus_num = 0, .platform_data = &ads_info, - .irq = AT91SAM9261_ID_IRQ0, + .irq = NR_IRQS_LEGACY + AT91SAM9261_ID_IRQ0, .controller_data = (void *) AT91_PIN_PA28, /* CS pin */ }, #endif diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 073e17403d98..89b9608742a7 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -44,12 +44,12 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_shdwc.h> #include <mach/system_rev.h> +#include "at91_aic.h" +#include "at91_shdwc.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" @@ -132,7 +132,7 @@ static struct spi_board_info ek_spi_devices[] = { .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ .bus_num = 0, .platform_data = &ads_info, - .irq = AT91SAM9263_ID_IRQ1, + .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1, }, #endif }; diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 3ab2b86a3762..7b5123802368 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -43,11 +43,11 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/system_rev.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 3d48ec154685..e4cc375e3a32 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -42,12 +42,12 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_shdwc.h> #include <mach/system_rev.h> +#include "at91_aic.h" +#include "at91_shdwc.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index fb89ea92e3f2..377a1097afa7 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -30,11 +30,12 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_shdwc.h> + +#include "at91_aic.h" +#include "at91_shdwc.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index a4e031a039fd..98771500ddb9 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c @@ -32,10 +32,10 @@ #include <asm/mach/arch.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index c3fb31d5116e..48a962b61fa3 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c @@ -25,10 +25,10 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> +#include "at91_aic.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 6ea069b57335..c1060f96e589 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c @@ -41,11 +41,11 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_shdwc.h> +#include "at91_aic.h" +#include "at91_shdwc.h" +#include "board.h" #include "sam9_smc.h" #include "generic.h" diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index f162fdfd66eb..8673aebcb85d 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -43,12 +43,12 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <mach/board.h> -#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> +#include "at91_aic.h" +#include "board.h" #include "generic.h" diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/board.h index c55a4364ffb4..662451d85fc9 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/board.h @@ -31,42 +31,15 @@ #ifndef __ASM_ARCH_BOARD_H #define __ASM_ARCH_BOARD_H -#include <linux/mtd/partitions.h> -#include <linux/device.h> -#include <linux/i2c.h> -#include <linux/leds.h> -#include <linux/spi/spi.h> -#include <linux/usb/atmel_usba_udc.h> -#include <linux/atmel-mci.h> -#include <sound/atmel-ac97c.h> -#include <linux/serial.h> -#include <linux/platform_data/macb.h> #include <linux/platform_data/atmel.h> /* USB Device */ -struct at91_udc_data { - int vbus_pin; /* high == host powering us */ - u8 vbus_active_low; /* vbus polarity */ - u8 vbus_polled; /* Use polling, not interrupt */ - int pullup_pin; /* active == D+ pulled up */ - u8 pullup_active_low; /* true == pullup_pin is active low */ -}; extern void __init at91_add_device_udc(struct at91_udc_data *data); /* USB High Speed Device */ extern void __init at91_add_device_usba(struct usba_platform_data *data); /* Compact Flash */ -struct at91_cf_data { - int irq_pin; /* I/O IRQ */ - int det_pin; /* Card detect */ - int vcc_pin; /* power switching */ - int rst_pin; /* card reset */ - u8 chipselect; /* EBI Chip Select number */ - u8 flags; -#define AT91_CF_TRUE_IDE 0x01 -#define AT91_IDE_SWAP_A0_A2 0x02 -}; extern void __init at91_add_device_cf(struct at91_cf_data *data); /* MMC / SD */ @@ -86,16 +59,6 @@ extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *d extern void __init at91_add_device_eth(struct macb_platform_data *data); /* USB Host */ -#define AT91_MAX_USBH_PORTS 3 -struct at91_usbh_data { - int vbus_pin[AT91_MAX_USBH_PORTS]; /* port power-control pin */ - int overcurrent_pin[AT91_MAX_USBH_PORTS]; - u8 ports; /* number of ports on root hub */ - u8 overcurrent_supported; - u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS]; - u8 overcurrent_status[AT91_MAX_USBH_PORTS]; - u8 overcurrent_changed[AT91_MAX_USBH_PORTS]; -}; extern void __init at91_add_device_usbh(struct at91_usbh_data *data); extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); @@ -124,13 +87,6 @@ extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pin extern struct platform_device *atmel_default_console_device; -struct atmel_uart_data { - int num; /* port num */ - short use_dma_tx; /* use transmit DMA? */ - short use_dma_rx; /* use receive DMA? */ - void __iomem *regs; /* virt. base address, if any */ - struct serial_rs485 rs485; /* rs485 settings */ -}; extern void __init at91_add_device_serial(void); /* @@ -173,24 +129,13 @@ extern void __init at91_add_device_isi(struct isi_platform_data *data, bool use_pck_as_mck); /* Touchscreen Controller */ -struct at91_tsadcc_data { - unsigned int adc_clock; - u8 pendet_debounce; - u8 ts_sample_hold_time; -}; extern void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data); /* CAN */ -struct at91_can_data { - void (*transceiver_switch)(int on); -}; extern void __init at91_add_device_can(struct at91_can_data *data); /* LEDs */ extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); extern void __init at91_pwm_leds(struct gpio_led *leds, int nr); -/* FIXME: this needs a better location, but gets stuff building again */ -extern int at91_suspend_entering_slow_clock(void); - #endif diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index f49650677653..b62f560e6c75 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -26,7 +26,8 @@ extern void __init at91_dt_initialize(void); extern void __init at91_init_irq_default(void); extern void __init at91_init_interrupts(unsigned int priority[]); extern void __init at91x40_init_interrupts(unsigned int priority[]); -extern void __init at91_aic_init(unsigned int priority[]); +extern void __init at91_aic_init(unsigned int priority[], + unsigned int ext_irq_mask); extern int __init at91_aic_of_init(struct device_node *node, struct device_node *parent); extern int __init at91_aic5_of_init(struct device_node *node, diff --git a/arch/arm/mach-at91/include/mach/gsia18s.h b/arch/arm/mach-at91/gsia18s.h index 307c194926f9..307c194926f9 100644 --- a/arch/arm/mach-at91/include/mach/gsia18s.h +++ b/arch/arm/mach-at91/gsia18s.h diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h deleted file mode 100644 index d1f80ad7f4d4..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_pit.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_pit.h - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Periodic Interval Timer (PIT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIT_H -#define AT91_PIT_H - -#define AT91_PIT_MR 0x00 /* Mode Register */ -#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ -#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ -#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ - -#define AT91_PIT_SR 0x04 /* Status Register */ -#define AT91_PIT_PITS (1 << 0) /* Timer Status */ - -#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */ -#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */ -#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ -#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h deleted file mode 100644 index da1945e5f714..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_rtc.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_rtc.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Real Time Clock (RTC) - System peripheral registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTC_H -#define AT91_RTC_H - -#define AT91_RTC_CR 0x00 /* Control Register */ -#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ -#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ -#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ -#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) -#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) -#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) -#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) -#define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ -#define AT91_RTC_CALEVSEL_WEEK (0 << 16) -#define AT91_RTC_CALEVSEL_MONTH (1 << 16) -#define AT91_RTC_CALEVSEL_YEAR (2 << 16) - -#define AT91_RTC_MR 0x04 /* Mode Register */ -#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ - -#define AT91_RTC_TIMR 0x08 /* Time Register */ -#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ -#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ -#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ -#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ - -#define AT91_RTC_CALR 0x0c /* Calendar Register */ -#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ -#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ -#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ -#define AT91_RTC_DAY (7 << 21) /* Current Day */ -#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ - -#define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */ -#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ -#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ -#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ - -#define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */ -#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ -#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ - -#define AT91_RTC_SR 0x18 /* Status Register */ -#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ -#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ -#define AT91_RTC_SECEV (1 << 2) /* Second Event */ -#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ -#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ - -#define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */ -#define AT91_RTC_IER 0x20 /* Interrupt Enable Register */ -#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ -#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ - -#define AT91_RTC_VER 0x2c /* Valid Entry Register */ -#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ -#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ -#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ -#define AT91_RTC_NVCALALR (1 << 3) /* Non valid Calendar Alarm */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 711a7892d331..a832e0707611 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -90,9 +90,6 @@ #define AT91_SRAM_MAX SZ_1M #define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX) -/* Serial ports */ -#define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */ - /* External Memory Map */ #define AT91_CHIPSELECT_0 0x10000000 #define AT91_CHIPSELECT_1 0x20000000 diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 1e02c0e49dcc..8e210262aeee 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -42,7 +42,7 @@ #include <asm/mach/irq.h> #include <asm/mach/map.h> -#include <mach/at91_aic.h> +#include "at91_aic.h" void __iomem *at91_aic_base; static struct irq_domain *at91_aic_domain; @@ -502,14 +502,19 @@ int __init at91_aic5_of_init(struct device_node *node, /* * Initialize the AIC interrupt controller. */ -void __init at91_aic_init(unsigned int *priority) +void __init at91_aic_init(unsigned int *priority, unsigned int ext_irq_mask) { unsigned int i; int irq_base; - if (at91_aic_pm_init()) + at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) + * sizeof(*at91_extern_irq), GFP_KERNEL); + + if (at91_aic_pm_init() || at91_extern_irq == NULL) panic("Unable to allocate bit maps\n"); + *at91_extern_irq = ext_irq_mask; + at91_aic_base = ioremap(AT91_AIC, 512); if (!at91_aic_base) panic("Unable to ioremap AIC registers\n"); diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c index 1b1e62b5f41b..3e22978b5547 100644 --- a/arch/arm/mach-at91/leds.c +++ b/arch/arm/mach-at91/leds.c @@ -15,7 +15,7 @@ #include <linux/init.h> #include <linux/platform_device.h> -#include <mach/board.h> +#include "board.h" /* ------------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 5315f05896e9..adb6db888a1f 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -25,10 +25,10 @@ #include <asm/mach/time.h> #include <asm/mach/irq.h> -#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h> +#include "at91_aic.h" #include "generic.h" #include "pm.h" @@ -36,8 +36,8 @@ * Show the reason for the previous system reset. */ -#include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> +#include "at91_rstc.h" +#include "at91_shdwc.h" static void __init show_reset_status(void) { diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index da9881b161e1..8a66979f5611 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -18,8 +18,8 @@ #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91_pmc.h> -#include <mach/at91_shdwc.h> +#include "at91_shdwc.h" #include "soc.h" #include "generic.h" @@ -47,7 +47,7 @@ void __init at91_init_irq_default(void) void __init at91_init_interrupts(unsigned int *priority) { /* Initialize the AIC interrupt controller */ - at91_aic_init(priority); + at91_aic_init(priority, at91_extern_irq); /* Enable GPIO interrupts */ at91_gpio_irq_setup(); @@ -151,7 +151,7 @@ static void __init soc_detect(u32 dbgu_base) } /* at91sam9g10 */ - if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { + if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { at91_soc_initdata.type = AT91_SOC_SAM9G10; at91_boot_soc = at91sam9261_soc; } diff --git a/arch/arm/mach-at91/include/mach/stamp9g20.h b/arch/arm/mach-at91/stamp9g20.h index f62c0abca4b4..f62c0abca4b4 100644 --- a/arch/arm/mach-at91/include/mach/stamp9g20.h +++ b/arch/arm/mach-at91/stamp9g20.h diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index b37bef1d5ffa..f723fe13d0f0 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -32,6 +32,7 @@ #include <linux/irq.h> #include <plat/time.h> #include <linux/platform_data/usb-ehci-orion.h> +#include <plat/irq.h> #include <plat/common.h> #include <plat/addr-map.h> #include "common.h" @@ -109,8 +110,8 @@ static void __init dove_clk_init(void) orion_clkdev_add(NULL, "orion-ehci.0", usb0); orion_clkdev_add(NULL, "orion-ehci.1", usb1); - orion_clkdev_add(NULL, "mv643xx_eth.0", ge); - orion_clkdev_add("0", "sata_mv.0", sata); + orion_clkdev_add(NULL, "mv643xx_eth_port.0", ge); + orion_clkdev_add(NULL, "sata_mv.0", sata); orion_clkdev_add("0", "pcie", pex0); orion_clkdev_add("1", "pcie", pex1); orion_clkdev_add(NULL, "sdhci-dove.0", sdio0); @@ -399,7 +400,7 @@ static void __init dove_dt_init(void) (dove_tclk + 499999) / 1000000); #ifdef CONFIG_CACHE_TAUROS2 - tauros2_init(); + tauros2_init(0); #endif dove_setup_cpu_mbus(); @@ -415,7 +416,6 @@ static void __init dove_dt_init(void) dove_ehci0_init(); dove_ehci1_init(); dove_pcie_init(1, 1); - dove_crypto_init(); of_platform_populate(NULL, of_default_bus_match_table, dove_auxdata_lookup, NULL); diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c index bb15b26041cb..0ef4435b1657 100644 --- a/arch/arm/mach-dove/pcie.c +++ b/arch/arm/mach-dove/pcie.c @@ -10,6 +10,7 @@ #include <linux/kernel.h> #include <linux/pci.h> +#include <linux/clk.h> #include <video/vga.h> #include <asm/mach/pci.h> #include <asm/mach/arch.h> @@ -188,6 +189,10 @@ static void __init add_pcie_port(int index, void __iomem *base) if (orion_pcie_link_up(base)) { struct pcie_port *pp = &pcie_port[num_pcie_ports++]; + struct clk *clk = clk_get_sys("pcie", (index ? "1" : "0")); + + if (!IS_ERR(clk)) + clk_prepare_enable(clk); printk(KERN_INFO "link up\n"); diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 715b690e5009..1947be8e5f5b 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -47,6 +47,7 @@ #include <plat/fimc-core.h> #include <plat/iic-core.h> #include <plat/tv-core.h> +#include <plat/spi-core.h> #include <plat/regs-serial.h> #include "common.h" @@ -346,6 +347,8 @@ static void __init exynos4_map_io(void) s5p_fb_setname(0, "exynos4-fb"); s5p_hdmi_setname("exynos4-hdmi"); + + s3c64xx_spi_setname("exynos4210-spi"); } static void __init exynos5_map_io(void) @@ -366,6 +369,8 @@ static void __init exynos5_map_io(void) s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c"); s3c_i2c2_setname("s3c2440-i2c"); + + s3c64xx_spi_setname("exynos4210-spi"); } static void __init exynos4_init_clocks(int xtal) diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index e58d786faf78..eadf4b59e7d2 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -99,6 +99,7 @@ static char const *exynos4_dt_compat[] __initdata = { DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ + .smp = smp_ops(exynos_smp_ops), .init_irq = exynos4_init_irq, .map_io = exynos4_dt_map_io, .handle_irq = gic_handle_irq, diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c index 1a7a8dd045a1..1ab91b5209e6 100644 --- a/arch/arm/mach-imx/clk-busy.c +++ b/arch/arm/mach-imx/clk-busy.c @@ -108,7 +108,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, busy->div.hw.init = &init; clk = clk_register(NULL, &busy->div.hw); - if (!clk) + if (IS_ERR(clk)) kfree(busy); return clk; diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index d20d4795f4ea..01e2f843bf2e 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -127,8 +127,8 @@ int __init mx25_clocks_init(void) clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); - clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0), 7); - clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0), 8); + clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7); + clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8); clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 3b6b640eed24..366e5d59d886 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -109,7 +109,7 @@ int __init mx27_clocks_init(unsigned long fref) clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6); clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6); clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks)); - clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 3); + clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6); clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3); clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)); clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); @@ -121,7 +121,7 @@ int __init mx27_clocks_init(unsigned long fref) clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6); - clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 3); + clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 6); clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0); clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0); clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1); diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 9d2c843bde02..b5deb0554552 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -108,9 +108,8 @@ void __init imx3_init_l2x0(void) } l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); - if (IS_ERR(l2x0_base)) { - printk(KERN_ERR "remapping L2 cache area failed with %ld\n", - PTR_ERR(l2x0_base)); + if (!l2x0_base) { + printk(KERN_ERR "remapping L2 cache area failed\n"); return; } diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index 70c5a2882409..d94872fed8c0 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c @@ -51,9 +51,7 @@ static void __init kirkwood_dt_init(void) kirkwood_setup_cpu_mbus(); -#ifdef CONFIG_CACHE_FEROCEON_L2 kirkwood_l2_init(); -#endif /* Setup root of clk tree */ kirkwood_clk_init(); diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 3991077f58a2..2c6c218fb79e 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -633,6 +633,7 @@ char * __init kirkwood_id(void) void __init kirkwood_l2_init(void) { +#ifdef CONFIG_CACHE_FEROCEON_L2 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); feroceon_l2_init(1); @@ -640,6 +641,7 @@ void __init kirkwood_l2_init(void) writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); feroceon_l2_init(0); #endif +#endif } void __init kirkwood_init(void) @@ -657,9 +659,7 @@ void __init kirkwood_init(void) kirkwood_setup_cpu_mbus(); -#ifdef CONFIG_CACHE_FEROCEON_L2 kirkwood_l2_init(); -#endif /* Setup root of clk tree */ kirkwood_clk_init(); diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index cd169c386161..f0e69cbc5baa 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -3,7 +3,8 @@ # # Common support -obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o +obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ + serial.o devices.o dma.o obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 9518bf5996dc..a8fce3ccc707 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -444,16 +444,28 @@ static struct omap1_cam_platform_data ams_delta_camera_platform_data = { .lclk_khz_max = 1334, /* results in 5fps CIF, 10fps QCIF */ }; +static struct platform_device ams_delta_audio_device = { + .name = "ams-delta-audio", + .id = -1, +}; + +static struct platform_device cx20442_codec_device = { + .name = "cx20442-codec", + .id = -1, +}; + static struct platform_device *ams_delta_devices[] __initdata = { &latch1_gpio_device, &latch2_gpio_device, &ams_delta_kp_device, &ams_delta_camera_device, + &ams_delta_audio_device, }; static struct platform_device *late_devices[] __initdata = { &ams_delta_nand_device, &ams_delta_lcd_device, + &cx20442_codec_device, }; static void __init ams_delta_init(void) @@ -613,7 +625,6 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") .atag_offset = 0x100, .map_io = ams_delta_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = ams_delta_init, .init_late = ams_delta_init_late, diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 4b6de70c47a6..e067f221f0f9 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -27,16 +27,16 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/mux.h> #include <mach/flash.h> -#include <plat/fpga.h> #include <linux/platform_data/keypad-omap.h> #include <mach/hardware.h> #include "iomap.h" #include "common.h" +#include "fpga.h" /* fsample is pretty close to p2-sample */ @@ -123,9 +123,9 @@ static struct resource smc91x_resources[] = { static void __init fsample_init_smc91x(void) { - fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); + __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET); mdelay(50); - fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, + __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1, H2P2_DBG_FPGA_LAN_RESET); mdelay(50); } @@ -362,7 +362,6 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") .atag_offset = 0x100, .map_io = omap_fsample_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_fsample_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 4ec579fdd366..608e7d2a2778 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -81,7 +81,6 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") .atag_offset = 0x100, .map_io = omap16xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_generic_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c index e1362ce48497..7119ef28e0ad 100644 --- a/arch/arm/mach-omap1/board-h2-mmc.c +++ b/arch/arm/mach-omap1/board-h2-mmc.c @@ -13,12 +13,11 @@ */ #include <linux/gpio.h> #include <linux/platform_device.h> - +#include <linux/platform_data/gpio-omap.h> #include <linux/i2c/tps65010.h> -#include <plat/mmc.h> - #include "board-h2.h" +#include "mmc.h" #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 376f7f29ef77..9134b646f01b 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -39,8 +39,8 @@ #include <asm/mach/map.h> #include <mach/mux.h> -#include <plat/dma.h> -#include <plat/tc.h> +#include <plat-omap/dma-omap.h> +#include <mach/tc.h> #include <mach/irda.h> #include <linux/platform_data/keypad-omap.h> #include <mach/flash.h> @@ -50,6 +50,7 @@ #include "common.h" #include "board-h2.h" +#include "dma.h" /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define OMAP1610_ETHR_START 0x04000300 @@ -458,7 +459,6 @@ MACHINE_START(OMAP_H2, "TI-H2") .atag_offset = 0x100, .map_io = omap16xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = h2_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c index c74daace8cd6..17d77914d769 100644 --- a/arch/arm/mach-omap1/board-h3-mmc.c +++ b/arch/arm/mach-omap1/board-h3-mmc.c @@ -16,9 +16,8 @@ #include <linux/i2c/tps65010.h> -#include <plat/mmc.h> - #include "board-h3.h" +#include "mmc.h" #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index ededdb7ef28c..bf213d1d8075 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -41,9 +41,9 @@ #include <asm/mach/map.h> #include <mach/mux.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <linux/platform_data/keypad-omap.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> #include <mach/flash.h> #include <mach/hardware.h> @@ -452,7 +452,6 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") .atag_offset = 0x100, .map_io = omap16xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = h3_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 87ab2086ef96..356f816c84a6 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -43,7 +43,7 @@ #include <asm/mach/arch.h> #include <mach/omap7xx.h> -#include <plat/mmc.h> +#include "mmc.h" #include <mach/irqs.h> #include <mach/usb.h> @@ -600,7 +600,6 @@ MACHINE_START(HERALD, "HTC Herald") .atag_offset = 0x100, .map_io = htcherald_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = htcherald_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index db5f7d2976e7..f8033fab0f82 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -33,16 +33,15 @@ #include <mach/mux.h> #include <mach/flash.h> -#include <plat/fpga.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <linux/platform_data/keypad-omap.h> -#include <plat/mmc.h> #include <mach/hardware.h> #include <mach/usb.h> #include "iomap.h" #include "common.h" +#include "mmc.h" /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define INNOVATOR1610_ETHR_START 0x04000300 @@ -215,7 +214,7 @@ static struct platform_device *innovator1510_devices[] __initdata = { static int innovator_get_pendown_state(void) { - return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5)); + return !(__raw_readb(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5)); } static const struct ads7846_platform_data innovator1510_ts_info = { @@ -279,7 +278,7 @@ static struct platform_device *innovator1610_devices[] __initdata = { static void __init innovator_init_smc91x(void) { if (cpu_is_omap1510()) { - fpga_write(fpga_read(OMAP1510_FPGA_RST) & ~1, + __raw_writeb(__raw_readb(OMAP1510_FPGA_RST) & ~1, OMAP1510_FPGA_RST); udelay(750); } else { @@ -335,10 +334,10 @@ static int mmc_set_power(struct device *dev, int slot, int power_on, int vdd) { if (power_on) - fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3), + __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) | (1 << 3), OMAP1510_FPGA_POWER); else - fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3), + __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) & ~(1 << 3), OMAP1510_FPGA_POWER); return 0; @@ -390,14 +389,14 @@ static void __init innovator_init(void) omap_cfg_reg(UART3_TX); omap_cfg_reg(UART3_RX); - reg = fpga_read(OMAP1510_FPGA_POWER); + reg = __raw_readb(OMAP1510_FPGA_POWER); reg |= OMAP1510_FPGA_PCR_COM1_EN; - fpga_write(reg, OMAP1510_FPGA_POWER); + __raw_writeb(reg, OMAP1510_FPGA_POWER); udelay(10); - reg = fpga_read(OMAP1510_FPGA_POWER); + reg = __raw_readb(OMAP1510_FPGA_POWER); reg |= OMAP1510_FPGA_PCR_COM2_EN; - fpga_write(reg, OMAP1510_FPGA_POWER); + __raw_writeb(reg, OMAP1510_FPGA_POWER); udelay(10); platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); @@ -437,6 +436,7 @@ static void __init innovator_init(void) */ static void __init innovator_map_io(void) { +#ifdef CONFIG_ARCH_OMAP15XX omap15xx_map_io(); iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc)); @@ -444,9 +444,10 @@ static void __init innovator_map_io(void) /* Dump the Innovator FPGA rev early - useful info for support. */ pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n", - fpga_read(OMAP1510_FPGA_REV_HIGH), - fpga_read(OMAP1510_FPGA_REV_LOW), - fpga_read(OMAP1510_FPGA_BOARD_REV)); + __raw_readb(OMAP1510_FPGA_REV_HIGH), + __raw_readb(OMAP1510_FPGA_REV_LOW), + __raw_readb(OMAP1510_FPGA_BOARD_REV)); +#endif } MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") @@ -454,7 +455,6 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") .atag_offset = 0x100, .map_io = innovator_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = innovator_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 7d5c06d6a52a..3e8ead67e459 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -29,13 +29,13 @@ #include <asm/mach/map.h> #include <mach/mux.h> -#include <plat/mmc.h> -#include <plat/clock.h> #include <mach/hardware.h> #include <mach/usb.h> #include "common.h" +#include "clock.h" +#include "mmc.h" #define ADS7846_PENDOWN_GPIO 15 @@ -251,7 +251,6 @@ MACHINE_START(NOKIA770, "Nokia 770") .atag_offset = 0x100, .map_io = omap16xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_nokia770_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 5973945a8741..872ea47cd28a 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -48,7 +48,7 @@ #include <mach/flash.h> #include <mach/mux.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/hardware.h> #include <mach/usb.h> @@ -606,7 +606,6 @@ MACHINE_START(OMAP_OSK, "TI-OSK") .atag_offset = 0x100, .map_io = omap16xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = osk_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 1c578d58923a..584b6fab894b 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -36,8 +36,8 @@ #include <mach/flash.h> #include <mach/mux.h> -#include <plat/tc.h> -#include <plat/dma.h> +#include <mach/tc.h> +#include <plat-omap/dma-omap.h> #include <mach/irda.h> #include <linux/platform_data/keypad-omap.h> @@ -45,6 +45,7 @@ #include <mach/usb.h> #include "common.h" +#include "dma.h" #define PALMTE_USBDETECT_GPIO 0 #define PALMTE_USB_OR_DC_GPIO 1 @@ -264,7 +265,6 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") .atag_offset = 0x100, .map_io = omap15xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_palmte_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 97158095083c..fbc986bfe69e 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -28,16 +28,16 @@ #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> #include <linux/platform_data/omap1_bl.h> +#include <linux/platform_data/leds-omap.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/led.h> #include <mach/flash.h> #include <mach/mux.h> -#include <plat/dma.h> -#include <plat/tc.h> +#include <plat-omap/dma-omap.h> +#include <mach/tc.h> #include <mach/irda.h> #include <linux/platform_data/keypad-omap.h> @@ -45,6 +45,7 @@ #include <mach/usb.h> #include "common.h" +#include "dma.h" #define PALMTT_USBDETECT_GPIO 0 #define PALMTT_CABLE_GPIO 1 @@ -310,7 +311,6 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") .atag_offset = 0x100, .map_io = omap15xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_palmtt_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index e311032e7eeb..60d917a93763 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -38,8 +38,8 @@ #include <mach/flash.h> #include <mach/mux.h> -#include <plat/dma.h> -#include <plat/tc.h> +#include <plat-omap/dma-omap.h> +#include <mach/tc.h> #include <mach/irda.h> #include <linux/platform_data/keypad-omap.h> @@ -47,6 +47,7 @@ #include <mach/usb.h> #include "common.h" +#include "dma.h" #define PALMZ71_USBDETECT_GPIO 0 #define PALMZ71_PENIRQ_GPIO 6 @@ -326,7 +327,6 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") .atag_offset = 0x100, .map_io = omap15xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_palmz71_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 198b05417bfc..9a7e483ed6fd 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -28,15 +28,15 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/mux.h> -#include <plat/fpga.h> #include <mach/flash.h> #include <mach/hardware.h> #include "iomap.h" #include "common.h" +#include "fpga.h" static const unsigned int p2_keymap[] = { KEY(0, 0, KEY_UP), @@ -231,9 +231,9 @@ static struct omap_lcd_config perseus2_lcd_config __initdata = { static void __init perseus2_init_smc91x(void) { - fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); + __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET); mdelay(50); - fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, + __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1, H2P2_DBG_FPGA_LAN_RESET); mdelay(50); } @@ -324,7 +324,6 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") .atag_offset = 0x100, .map_io = omap_perseus2_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_perseus2_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c index 5932d56e17bf..4fcf19c78a08 100644 --- a/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/arch/arm/mach-omap1/board-sx1-mmc.c @@ -16,9 +16,10 @@ #include <linux/platform_device.h> #include <mach/hardware.h> -#include <plat/mmc.h> #include <mach/board-sx1.h> +#include "mmc.h" + #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) static int mmc_set_power(struct device *dev, int slot, int power_on, diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 13bf2cc56814..1ebc7e08d6e5 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -36,15 +36,16 @@ #include <mach/flash.h> #include <mach/mux.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> #include <mach/irda.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/board-sx1.h> #include <mach/hardware.h> #include <mach/usb.h> #include "common.h" +#include "dma.h" /* Write to I2C device */ int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) @@ -403,7 +404,6 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") .atag_offset = 0x100, .map_io = omap15xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = omap_sx1_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index ad75e3411d46..abf705f49b19 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -34,7 +34,7 @@ #include <mach/board-voiceblue.h> #include <mach/flash.h> #include <mach/mux.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/hardware.h> #include <mach/usb.h> @@ -286,7 +286,6 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") .atag_offset = 0x100, .map_io = omap15xx_map_io, .init_early = omap1_init_early, - .reserve = omap_reserve, .init_irq = omap1_init_irq, .init_machine = voiceblue_init, .init_late = omap1_init_late, diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 638f4070fc70..4f5fd4a084c0 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -12,6 +12,7 @@ * published by the Free Software Foundation. */ #include <linux/kernel.h> +#include <linux/export.h> #include <linux/list.h> #include <linux/errno.h> #include <linux/err.h> @@ -21,21 +22,21 @@ #include <asm/mach-types.h> -#include <plat/cpu.h> -#include <plat/usb.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/clkdev_omap.h> - #include <mach/hardware.h> +#include "soc.h" #include "iomap.h" #include "clock.h" #include "opp.h" +#include "sram.h" __u32 arm_idlect1_mask; struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; +static LIST_HEAD(clocks); +static DEFINE_MUTEX(clocks_mutex); +static DEFINE_SPINLOCK(clockfw_lock); + /* * Omap1 specific clock functions */ @@ -607,3 +608,497 @@ void omap1_clk_disable_unused(struct clk *clk) } #endif + + +int clk_enable(struct clk *clk) +{ + unsigned long flags; + int ret; + + if (clk == NULL || IS_ERR(clk)) + return -EINVAL; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = omap1_clk_enable(clk); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + unsigned long flags; + + if (clk == NULL || IS_ERR(clk)) + return; + + spin_lock_irqsave(&clockfw_lock, flags); + if (clk->usecount == 0) { + pr_err("Trying disable clock %s with 0 usecount\n", + clk->name); + WARN_ON(1); + goto out; + } + + omap1_clk_disable(clk); + +out: + spin_unlock_irqrestore(&clockfw_lock, flags); +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + unsigned long flags; + unsigned long ret; + + if (clk == NULL || IS_ERR(clk)) + return 0; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = clk->rate; + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_get_rate); + +/* + * Optional clock functions defined in include/linux/clk.h + */ + +long clk_round_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + long ret; + + if (clk == NULL || IS_ERR(clk)) + return 0; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = omap1_clk_round_rate(clk, rate); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk == NULL || IS_ERR(clk)) + return ret; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = omap1_clk_set_rate(clk, rate); + if (ret == 0) + propagate_rate(clk); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); + +int clk_set_parent(struct clk *clk, struct clk *parent) +{ + WARN_ONCE(1, "clk_set_parent() not implemented for OMAP1\n"); + + return -EINVAL; +} +EXPORT_SYMBOL(clk_set_parent); + +struct clk *clk_get_parent(struct clk *clk) +{ + return clk->parent; +} +EXPORT_SYMBOL(clk_get_parent); + +/* + * OMAP specific clock functions shared between omap1 and omap2 + */ + +int __initdata mpurate; + +/* + * By default we use the rate set by the bootloader. + * You can override this with mpurate= cmdline option. + */ +static int __init omap_clk_setup(char *str) +{ + get_option(&str, &mpurate); + + if (!mpurate) + return 1; + + if (mpurate < 1000) + mpurate *= 1000000; + + return 1; +} +__setup("mpurate=", omap_clk_setup); + +/* Used for clocks that always have same value as the parent clock */ +unsigned long followparent_recalc(struct clk *clk) +{ + return clk->parent->rate; +} + +/* + * Used for clocks that have the same value as the parent clock, + * divided by some factor + */ +unsigned long omap_fixed_divisor_recalc(struct clk *clk) +{ + WARN_ON(!clk->fixed_div); + + return clk->parent->rate / clk->fixed_div; +} + +void clk_reparent(struct clk *child, struct clk *parent) +{ + list_del_init(&child->sibling); + if (parent) + list_add(&child->sibling, &parent->children); + child->parent = parent; + + /* now do the debugfs renaming to reattach the child + to the proper parent */ +} + +/* Propagate rate to children */ +void propagate_rate(struct clk *tclk) +{ + struct clk *clkp; + + list_for_each_entry(clkp, &tclk->children, sibling) { + if (clkp->recalc) + clkp->rate = clkp->recalc(clkp); + propagate_rate(clkp); + } +} + +static LIST_HEAD(root_clks); + +/** + * recalculate_root_clocks - recalculate and propagate all root clocks + * + * Recalculates all root clocks (clocks with no parent), which if the + * clock's .recalc is set correctly, should also propagate their rates. + * Called at init. + */ +void recalculate_root_clocks(void) +{ + struct clk *clkp; + + list_for_each_entry(clkp, &root_clks, sibling) { + if (clkp->recalc) + clkp->rate = clkp->recalc(clkp); + propagate_rate(clkp); + } +} + +/** + * clk_preinit - initialize any fields in the struct clk before clk init + * @clk: struct clk * to initialize + * + * Initialize any struct clk fields needed before normal clk initialization + * can run. No return value. + */ +void clk_preinit(struct clk *clk) +{ + INIT_LIST_HEAD(&clk->children); +} + +int clk_register(struct clk *clk) +{ + if (clk == NULL || IS_ERR(clk)) + return -EINVAL; + + /* + * trap out already registered clocks + */ + if (clk->node.next || clk->node.prev) + return 0; + + mutex_lock(&clocks_mutex); + if (clk->parent) + list_add(&clk->sibling, &clk->parent->children); + else + list_add(&clk->sibling, &root_clks); + + list_add(&clk->node, &clocks); + if (clk->init) + clk->init(clk); + mutex_unlock(&clocks_mutex); + + return 0; +} +EXPORT_SYMBOL(clk_register); + +void clk_unregister(struct clk *clk) +{ + if (clk == NULL || IS_ERR(clk)) + return; + + mutex_lock(&clocks_mutex); + list_del(&clk->sibling); + list_del(&clk->node); + mutex_unlock(&clocks_mutex); +} +EXPORT_SYMBOL(clk_unregister); + +void clk_enable_init_clocks(void) +{ + struct clk *clkp; + + list_for_each_entry(clkp, &clocks, node) + if (clkp->flags & ENABLE_ON_INIT) + clk_enable(clkp); +} + +/** + * omap_clk_get_by_name - locate OMAP struct clk by its name + * @name: name of the struct clk to locate + * + * Locate an OMAP struct clk by its name. Assumes that struct clk + * names are unique. Returns NULL if not found or a pointer to the + * struct clk if found. + */ +struct clk *omap_clk_get_by_name(const char *name) +{ + struct clk *c; + struct clk *ret = NULL; + + mutex_lock(&clocks_mutex); + + list_for_each_entry(c, &clocks, node) { + if (!strcmp(c->name, name)) { + ret = c; + break; + } + } + + mutex_unlock(&clocks_mutex); + + return ret; +} + +int omap_clk_enable_autoidle_all(void) +{ + struct clk *c; + unsigned long flags; + + spin_lock_irqsave(&clockfw_lock, flags); + + list_for_each_entry(c, &clocks, node) + if (c->ops->allow_idle) + c->ops->allow_idle(c); + + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} + +int omap_clk_disable_autoidle_all(void) +{ + struct clk *c; + unsigned long flags; + + spin_lock_irqsave(&clockfw_lock, flags); + + list_for_each_entry(c, &clocks, node) + if (c->ops->deny_idle) + c->ops->deny_idle(c); + + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} + +/* + * Low level helpers + */ +static int clkll_enable_null(struct clk *clk) +{ + return 0; +} + +static void clkll_disable_null(struct clk *clk) +{ +} + +const struct clkops clkops_null = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, +}; + +/* + * Dummy clock + * + * Used for clock aliases that are needed on some OMAPs, but not others + */ +struct clk dummy_ck = { + .name = "dummy", + .ops = &clkops_null, +}; + +/* + * + */ + +#ifdef CONFIG_OMAP_RESET_CLOCKS +/* + * Disable any unused clocks left on by the bootloader + */ +static int __init clk_disable_unused(void) +{ + struct clk *ck; + unsigned long flags; + + pr_info("clock: disabling unused clocks to save power\n"); + + spin_lock_irqsave(&clockfw_lock, flags); + list_for_each_entry(ck, &clocks, node) { + if (ck->ops == &clkops_null) + continue; + + if (ck->usecount > 0 || !ck->enable_reg) + continue; + + omap1_clk_disable_unused(ck); + } + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} +late_initcall(clk_disable_unused); +late_initcall(omap_clk_enable_autoidle_all); +#endif + +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) +/* + * debugfs support to trace clock tree hierarchy and attributes + */ + +#include <linux/debugfs.h> +#include <linux/seq_file.h> + +static struct dentry *clk_debugfs_root; + +static int clk_dbg_show_summary(struct seq_file *s, void *unused) +{ + struct clk *c; + struct clk *pa; + + mutex_lock(&clocks_mutex); + seq_printf(s, "%-30s %-30s %-10s %s\n", + "clock-name", "parent-name", "rate", "use-count"); + + list_for_each_entry(c, &clocks, node) { + pa = c->parent; + seq_printf(s, "%-30s %-30s %-10lu %d\n", + c->name, pa ? pa->name : "none", c->rate, + c->usecount); + } + mutex_unlock(&clocks_mutex); + + return 0; +} + +static int clk_dbg_open(struct inode *inode, struct file *file) +{ + return single_open(file, clk_dbg_show_summary, inode->i_private); +} + +static const struct file_operations debug_clock_fops = { + .open = clk_dbg_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int clk_debugfs_register_one(struct clk *c) +{ + int err; + struct dentry *d; + struct clk *pa = c->parent; + + d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); + if (!d) + return -ENOMEM; + c->dent = d; + + d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); + if (!d) { + err = -ENOMEM; + goto err_out; + } + d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); + if (!d) { + err = -ENOMEM; + goto err_out; + } + d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); + if (!d) { + err = -ENOMEM; + goto err_out; + } + return 0; + +err_out: + debugfs_remove_recursive(c->dent); + return err; +} + +static int clk_debugfs_register(struct clk *c) +{ + int err; + struct clk *pa = c->parent; + + if (pa && !pa->dent) { + err = clk_debugfs_register(pa); + if (err) + return err; + } + + if (!c->dent) { + err = clk_debugfs_register_one(c); + if (err) + return err; + } + return 0; +} + +static int __init clk_debugfs_init(void) +{ + struct clk *c; + struct dentry *d; + int err; + + d = debugfs_create_dir("clock", NULL); + if (!d) + return -ENOMEM; + clk_debugfs_root = d; + + list_for_each_entry(c, &clocks, node) { + err = clk_debugfs_register(c); + if (err) + goto err_out; + } + + d = debugfs_create_file("summary", S_IRUGO, + d, NULL, &debug_clock_fops); + if (!d) + return -ENOMEM; + + return 0; +err_out: + debugfs_remove_recursive(clk_debugfs_root); + return err; +} +late_initcall(clk_debugfs_init); + +#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 3d04f4f67676..1e4918a3a5ee 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -14,8 +14,184 @@ #define __ARCH_ARM_MACH_OMAP1_CLOCK_H #include <linux/clk.h> +#include <linux/list.h> -#include <plat/clock.h> +#include <linux/clkdev.h> + +struct module; +struct clk; + +struct omap_clk { + u16 cpu; + struct clk_lookup lk; +}; + +#define CLK(dev, con, ck, cp) \ + { \ + .cpu = cp, \ + .lk = { \ + .dev_id = dev, \ + .con_id = con, \ + .clk = ck, \ + }, \ + } + +/* Platform flags for the clkdev-OMAP integration code */ +#define CK_310 (1 << 0) +#define CK_7XX (1 << 1) /* 7xx, 850 */ +#define CK_1510 (1 << 2) +#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ +#define CK_1710 (1 << 4) /* 1710 extra for rate selection */ + + +/* Temporary, needed during the common clock framework conversion */ +#define __clk_get_name(clk) (clk->name) +#define __clk_get_parent(clk) (clk->parent) +#define __clk_get_rate(clk) (clk->rate) + +/** + * struct clkops - some clock function pointers + * @enable: fn ptr that enables the current clock in hardware + * @disable: fn ptr that enables the current clock in hardware + * @find_idlest: function returning the IDLEST register for the clock's IP blk + * @find_companion: function returning the "companion" clk reg for the clock + * @allow_idle: fn ptr that enables autoidle for the current clock in hardware + * @deny_idle: fn ptr that disables autoidle for the current clock in hardware + * + * A "companion" clk is an accompanying clock to the one being queried + * that must be enabled for the IP module connected to the clock to + * become accessible by the hardware. Neither @find_idlest nor + * @find_companion should be needed; that information is IP + * block-specific; the hwmod code has been created to handle this, but + * until hwmod data is ready and drivers have been converted to use PM + * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and + * @find_companion must, unfortunately, remain. + */ +struct clkops { + int (*enable)(struct clk *); + void (*disable)(struct clk *); + void (*find_idlest)(struct clk *, void __iomem **, + u8 *, u8 *); + void (*find_companion)(struct clk *, void __iomem **, + u8 *); + void (*allow_idle)(struct clk *); + void (*deny_idle)(struct clk *); +}; + +/* + * struct clk.flags possibilities + * + * XXX document the rest of the clock flags here + * + * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL + * bits share the same register. This flag allows the + * omap4_dpllmx*() code to determine which GATE_CTRL bit field + * should be used. This is a temporary solution - a better approach + * would be to associate clock type-specific data with the clock, + * similar to the struct dpll_data approach. + */ +#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ +#define CLOCK_IDLE_CONTROL (1 << 1) +#define CLOCK_NO_IDLE_PARENT (1 << 2) +#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ +#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ +#define CLOCK_CLKOUTX2 (1 << 5) + +/** + * struct clk - OMAP struct clk + * @node: list_head connecting this clock into the full clock list + * @ops: struct clkops * for this clock + * @name: the name of the clock in the hardware (used in hwmod data and debug) + * @parent: pointer to this clock's parent struct clk + * @children: list_head connecting to the child clks' @sibling list_heads + * @sibling: list_head connecting this clk to its parent clk's @children + * @rate: current clock rate + * @enable_reg: register to write to enable the clock (see @enable_bit) + * @recalc: fn ptr that returns the clock's current rate + * @set_rate: fn ptr that can change the clock's current rate + * @round_rate: fn ptr that can round the clock's current rate + * @init: fn ptr to do clock-specific initialization + * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) + * @usecount: number of users that have requested this clock to be enabled + * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div + * @flags: see "struct clk.flags possibilities" above + * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) + * @src_offset: bitshift for source selection bitfield (OMAP1 only) + * + * XXX @rate_offset, @src_offset should probably be removed and OMAP1 + * clock code converted to use clksel. + * + * XXX @usecount is poorly named. It should be "enable_count" or + * something similar. "users" in the description refers to kernel + * code (core code or drivers) that have called clk_enable() and not + * yet called clk_disable(); the usecount of parent clocks is also + * incremented by the clock code when clk_enable() is called on child + * clocks and decremented by the clock code when clk_disable() is + * called on child clocks. + * + * XXX @clkdm, @usecount, @children, @sibling should be marked for + * internal use only. + * + * @children and @sibling are used to optimize parent-to-child clock + * tree traversals. (child-to-parent traversals use @parent.) + * + * XXX The notion of the clock's current rate probably needs to be + * separated from the clock's target rate. + */ +struct clk { + struct list_head node; + const struct clkops *ops; + const char *name; + struct clk *parent; + struct list_head children; + struct list_head sibling; /* node for children */ + unsigned long rate; + void __iomem *enable_reg; + unsigned long (*recalc)(struct clk *); + int (*set_rate)(struct clk *, unsigned long); + long (*round_rate)(struct clk *, unsigned long); + void (*init)(struct clk *); + u8 enable_bit; + s8 usecount; + u8 fixed_div; + u8 flags; + u8 rate_offset; + u8 src_offset; +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) + struct dentry *dent; /* For visible tree hierarchy */ +#endif +}; + +struct clk_functions { + int (*clk_enable)(struct clk *clk); + void (*clk_disable)(struct clk *clk); + long (*clk_round_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_parent)(struct clk *clk, struct clk *parent); + void (*clk_allow_idle)(struct clk *clk); + void (*clk_deny_idle)(struct clk *clk); + void (*clk_disable_unused)(struct clk *clk); +}; + +extern int mpurate; + +extern int clk_init(struct clk_functions *custom_clocks); +extern void clk_preinit(struct clk *clk); +extern int clk_register(struct clk *clk); +extern void clk_reparent(struct clk *child, struct clk *parent); +extern void clk_unregister(struct clk *clk); +extern void propagate_rate(struct clk *clk); +extern void recalculate_root_clocks(void); +extern unsigned long followparent_recalc(struct clk *clk); +extern void clk_enable_init_clocks(void); +unsigned long omap_fixed_divisor_recalc(struct clk *clk); +extern struct clk *omap_clk_get_by_name(const char *name); +extern int omap_clk_enable_autoidle_all(void); +extern int omap_clk_disable_autoidle_all(void); + +extern const struct clkops clkops_null; + +extern struct clk dummy_ck; int omap1_clk_init(void); void omap1_clk_late_init(void); diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 9b45f4b0ee22..cb7c6ae2e3fc 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -22,16 +22,14 @@ #include <asm/mach-types.h> /* for machine_is_* */ -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/clkdev_omap.h> -#include <plat/sram.h> /* for omap_sram_reprogram_clock() */ +#include "soc.h" #include <mach/hardware.h> #include <mach/usb.h> /* for OTG_BASE */ #include "iomap.h" #include "clock.h" +#include "sram.h" /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ #define IDL_CLKOUT_ARM_SHIFT 12 @@ -765,14 +763,6 @@ static struct omap_clk omap_clks[] = { * init */ -static struct clk_functions omap1_clk_functions = { - .clk_enable = omap1_clk_enable, - .clk_disable = omap1_clk_disable, - .clk_round_rate = omap1_clk_round_rate, - .clk_set_rate = omap1_clk_set_rate, - .clk_disable_unused = omap1_clk_disable_unused, -}; - static void __init omap1_show_rates(void) { pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", @@ -803,8 +793,6 @@ int __init omap1_clk_init(void) if (!cpu_is_omap15xx()) omap_writew(0, SOFT_REQ_REG2); - clk_init(&omap1_clk_functions); - /* By default all idlect1 clocks are allowed to idle */ arm_idlect1_mask = ~0; diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index c2552b24f9f2..dab2e102b9d7 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -26,8 +26,10 @@ #ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H #define __ARCH_ARM_MACH_OMAP1_COMMON_H -#include <plat/common.h> #include <linux/mtd/mtd.h> +#include <linux/i2c-omap.h> + +#include <plat/i2c.h> #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) void omap7xx_map_io(void); @@ -38,6 +40,7 @@ static inline void omap7xx_map_io(void) #endif #ifdef CONFIG_ARCH_OMAP15XX +void omap1510_fpga_init_irq(void); void omap15xx_map_io(void); #else static inline void omap15xx_map_io(void) @@ -90,4 +93,6 @@ extern int ocpi_enable(void); static inline int ocpi_enable(void) { return 0; } #endif +extern int omap1_get_reset_sources(void); + #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index d3fec92c54cb..7155ed8b97f8 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -19,10 +19,8 @@ #include <asm/mach/map.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/mux.h> -#include <plat/dma.h> -#include <plat/mmc.h> #include <mach/omap7xx.h> #include <mach/camera.h> @@ -30,6 +28,9 @@ #include "common.h" #include "clock.h" +#include "dma.h" +#include "mmc.h" +#include "sram.h" #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) @@ -175,6 +176,13 @@ static int __init omap_mmc_add(const char *name, int id, unsigned long base, res[3].name = "tx"; res[3].flags = IORESOURCE_DMA; + if (cpu_is_omap7xx()) + data->slots[0].features = MMC_OMAP7XX; + if (cpu_is_omap15xx()) + data->slots[0].features = MMC_OMAP15XX; + if (cpu_is_omap16xx()) + data->slots[0].features = MMC_OMAP16XX; + ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); if (ret == 0) ret = platform_device_add_data(pdev, data, sizeof(*data)); diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c index 29007fef84cd..978aed85d328 100644 --- a/arch/arm/mach-omap1/dma.c +++ b/arch/arm/mach-omap1/dma.c @@ -25,11 +25,13 @@ #include <linux/device.h> #include <linux/io.h> -#include <plat/dma.h> -#include <plat/tc.h> +#include <plat-omap/dma-omap.h> +#include <mach/tc.h> #include <mach/irqs.h> +#include "dma.h" + #define OMAP1_DMA_BASE (0xfffed800) #define OMAP1_LOGICAL_DMA_CH_COUNT 17 #define OMAP1_DMA_STRIDE 0x40 @@ -319,6 +321,9 @@ static int __init omap1_system_dma_init(void) d->dev_caps = ENABLE_1510_MODE; enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; + if (cpu_is_omap16xx()) + d->dev_caps = ENABLE_16XX_MODE; + d->dev_caps |= SRC_PORT; d->dev_caps |= DST_PORT; d->dev_caps |= SRC_INDEX; diff --git a/arch/arm/mach-omap1/dma.h b/arch/arm/mach-omap1/dma.h new file mode 100644 index 000000000000..da6345dab03f --- /dev/null +++ b/arch/arm/mach-omap1/dma.h @@ -0,0 +1,83 @@ +/* + * OMAP1 DMA channel definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __OMAP1_DMA_CHANNEL_H +#define __OMAP1_DMA_CHANNEL_H + +/* DMA channels for omap1 */ +#define OMAP_DMA_NO_DEVICE 0 +#define OMAP_DMA_MCSI1_TX 1 +#define OMAP_DMA_MCSI1_RX 2 +#define OMAP_DMA_I2C_RX 3 +#define OMAP_DMA_I2C_TX 4 +#define OMAP_DMA_EXT_NDMA_REQ 5 +#define OMAP_DMA_EXT_NDMA_REQ2 6 +#define OMAP_DMA_UWIRE_TX 7 +#define OMAP_DMA_MCBSP1_TX 8 +#define OMAP_DMA_MCBSP1_RX 9 +#define OMAP_DMA_MCBSP3_TX 10 +#define OMAP_DMA_MCBSP3_RX 11 +#define OMAP_DMA_UART1_TX 12 +#define OMAP_DMA_UART1_RX 13 +#define OMAP_DMA_UART2_TX 14 +#define OMAP_DMA_UART2_RX 15 +#define OMAP_DMA_MCBSP2_TX 16 +#define OMAP_DMA_MCBSP2_RX 17 +#define OMAP_DMA_UART3_TX 18 +#define OMAP_DMA_UART3_RX 19 +#define OMAP_DMA_CAMERA_IF_RX 20 +#define OMAP_DMA_MMC_TX 21 +#define OMAP_DMA_MMC_RX 22 +#define OMAP_DMA_NAND 23 +#define OMAP_DMA_IRQ_LCD_LINE 24 +#define OMAP_DMA_MEMORY_STICK 25 +#define OMAP_DMA_USB_W2FC_RX0 26 +#define OMAP_DMA_USB_W2FC_RX1 27 +#define OMAP_DMA_USB_W2FC_RX2 28 +#define OMAP_DMA_USB_W2FC_TX0 29 +#define OMAP_DMA_USB_W2FC_TX1 30 +#define OMAP_DMA_USB_W2FC_TX2 31 + +/* These are only for 1610 */ +#define OMAP_DMA_CRYPTO_DES_IN 32 +#define OMAP_DMA_SPI_TX 33 +#define OMAP_DMA_SPI_RX 34 +#define OMAP_DMA_CRYPTO_HASH 35 +#define OMAP_DMA_CCP_ATTN 36 +#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37 +#define OMAP_DMA_CMT_APE_TX_CHAN_0 38 +#define OMAP_DMA_CMT_APE_RV_CHAN_0 39 +#define OMAP_DMA_CMT_APE_TX_CHAN_1 40 +#define OMAP_DMA_CMT_APE_RV_CHAN_1 41 +#define OMAP_DMA_CMT_APE_TX_CHAN_2 42 +#define OMAP_DMA_CMT_APE_RV_CHAN_2 43 +#define OMAP_DMA_CMT_APE_TX_CHAN_3 44 +#define OMAP_DMA_CMT_APE_RV_CHAN_3 45 +#define OMAP_DMA_CMT_APE_TX_CHAN_4 46 +#define OMAP_DMA_CMT_APE_RV_CHAN_4 47 +#define OMAP_DMA_CMT_APE_TX_CHAN_5 48 +#define OMAP_DMA_CMT_APE_RV_CHAN_5 49 +#define OMAP_DMA_CMT_APE_TX_CHAN_6 50 +#define OMAP_DMA_CMT_APE_RV_CHAN_6 51 +#define OMAP_DMA_CMT_APE_TX_CHAN_7 52 +#define OMAP_DMA_CMT_APE_RV_CHAN_7 53 +#define OMAP_DMA_MMC2_TX 54 +#define OMAP_DMA_MMC2_RX 55 +#define OMAP_DMA_CRYPTO_DES_OUT 56 + +#endif /* __OMAP1_DMA_CHANNEL_H */ diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c index 73ae6169aa4a..b3fb531af94e 100644 --- a/arch/arm/mach-omap1/flash.c +++ b/arch/arm/mach-omap1/flash.c @@ -10,7 +10,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/map.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/flash.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 29ec50fc688d..8bd71b2d0967 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -27,11 +27,11 @@ #include <asm/irq.h> #include <asm/mach/irq.h> -#include <plat/fpga.h> - #include <mach/hardware.h> #include "iomap.h" +#include "common.h" +#include "fpga.h" static void fpga_mask_irq(struct irq_data *d) { diff --git a/arch/arm/mach-omap1/fpga.h b/arch/arm/mach-omap1/fpga.h new file mode 100644 index 000000000000..4b4307a80e48 --- /dev/null +++ b/arch/arm/mach-omap1/fpga.h @@ -0,0 +1,52 @@ +/* + * Interrupt handler for OMAP-1510 FPGA + * + * Copyright (C) 2001 RidgeRun, Inc. + * Author: Greg Lonnon <glonnon@ridgerun.com> + * + * Copyright (C) 2002 MontaVista Software, Inc. + * + * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 + * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_OMAP_FPGA_H +#define __ASM_ARCH_OMAP_FPGA_H + +/* + * --------------------------------------------------------------------------- + * H2/P2 Debug board FPGA + * --------------------------------------------------------------------------- + */ +/* maps in the FPGA registers and the ETHR registers */ +#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ +#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ +#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ + +#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) +#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ +#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */ +#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */ +#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */ +#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */ +#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */ +#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */ + +/* LEDs definition on debug board (16 LEDs, all physically green) */ +#define H2P2_DBG_FPGA_LED_GREEN (1 << 15) +#define H2P2_DBG_FPGA_LED_AMBER (1 << 14) +#define H2P2_DBG_FPGA_LED_RED (1 << 13) +#define H2P2_DBG_FPGA_LED_BLUE (1 << 12) +/* cpu0 load-meter LEDs */ +#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ... +#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 +#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) + +#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0) +#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1) + +#endif diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index 98e6f39224a4..02b3eb2e201c 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c @@ -19,6 +19,8 @@ #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> +#include <mach/irqs.h> + #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE #define OMAP1510_GPIO_BASE 0xFFFCE000 diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 33f419236b17..b9952a258d82 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c @@ -19,6 +19,8 @@ #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> +#include <mach/irqs.h> + #define OMAP1610_GPIO1_BASE 0xfffbe400 #define OMAP1610_GPIO2_BASE 0xfffbec00 #define OMAP1610_GPIO3_BASE 0xfffbb400 diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 958ce9acee95..f5819b2b7cbe 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c @@ -19,6 +19,8 @@ #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> +#include <mach/irqs.h> + #define OMAP7XX_GPIO1_BASE 0xfffbc000 #define OMAP7XX_GPIO2_BASE 0xfffbc800 #define OMAP7XX_GPIO3_BASE 0xfffbd000 diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c index a0551a6d7451..faca808cb3d9 100644 --- a/arch/arm/mach-omap1/i2c.c +++ b/arch/arm/mach-omap1/i2c.c @@ -19,11 +19,25 @@ * */ -#include <plat/i2c.h> +#include <linux/i2c-omap.h> #include <mach/mux.h> -#include <plat/cpu.h> +#include "soc.h" + +#include <plat/i2c.h> + +#define OMAP_I2C_SIZE 0x3f +#define OMAP1_I2C_BASE 0xfffb3800 +#define OMAP1_INT_I2C (32 + 4) + +static const char name[] = "omap_i2c"; -void __init omap1_i2c_mux_pins(int bus_id) +static struct resource i2c_resources[2] = { +}; + +static struct platform_device omap_i2c_devices[1] = { +}; + +static void __init omap1_i2c_mux_pins(int bus_id) { if (cpu_is_omap7xx()) { omap_cfg_reg(I2C_7XX_SDA); @@ -33,3 +47,47 @@ void __init omap1_i2c_mux_pins(int bus_id) omap_cfg_reg(I2C_SCL); } } + +int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata, + int bus_id) +{ + struct platform_device *pdev; + struct resource *res; + + if (bus_id > 1) + return -EINVAL; + + omap1_i2c_mux_pins(bus_id); + + pdev = &omap_i2c_devices[bus_id - 1]; + pdev->id = bus_id; + pdev->name = name; + pdev->num_resources = ARRAY_SIZE(i2c_resources); + res = i2c_resources; + res[0].start = OMAP1_I2C_BASE; + res[0].end = res[0].start + OMAP_I2C_SIZE; + res[0].flags = IORESOURCE_MEM; + res[1].start = OMAP1_INT_I2C; + res[1].flags = IORESOURCE_IRQ; + pdev->resource = res; + + /* all OMAP1 have IP version 1 register set */ + pdata->rev = OMAP_I2C_IP_VERSION_1; + + /* all OMAP1 I2C are implemented like this */ + pdata->flags = OMAP_I2C_FLAG_NO_FIFO | + OMAP_I2C_FLAG_SIMPLE_CLOCK | + OMAP_I2C_FLAG_16BIT_DATA_REG | + OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK; + + /* how the cpu bus is wired up differs for 7xx only */ + + if (cpu_is_omap7xx()) + pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1; + else + pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2; + + pdev->dev.platform_data = pdata; + + return platform_device_register(pdev); +} diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index a1b846aacdaf..52de382fc804 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -17,7 +17,7 @@ #include <linux/io.h> #include <asm/system_info.h> -#include <plat/cpu.h> +#include "soc.h" #include <mach/hardware.h> diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index 2b36a281dc84..5c1a26c9f490 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S @@ -13,7 +13,7 @@ #include <linux/serial_reg.h> -#include <plat/serial.h> +#include "serial.h" .pushsection .data omap_uart_phys: .word 0x0 diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S index 88f08cab1717..78a8c6c24764 100644 --- a/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S @@ -13,8 +13,6 @@ #include <mach/hardware.h> #include <mach/irqs.h> -#include "../../iomap.h" - .macro get_irqnr_preamble, base, tmp .endm diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h deleted file mode 100644 index ebf86c0f4f46..000000000000 --- a/arch/arm/mach-omap1/include/mach/gpio.h +++ /dev/null @@ -1,3 +0,0 @@ -/* - * arch/arm/mach-omap1/include/mach/gpio.h - */ diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index 84248d250adb..5875a5098d35 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h @@ -39,7 +39,7 @@ #include <asm/sizes.h> #ifndef __ASSEMBLER__ #include <asm/types.h> -#include <plat/cpu.h> +#include <mach/soc.h> /* * NOTE: Please use ioremap + __raw_read/write where possible instead of these @@ -51,7 +51,7 @@ extern void omap_writeb(u8 v, u32 pa); extern void omap_writew(u16 v, u32 pa); extern void omap_writel(u32 v, u32 pa); -#include <plat/tc.h> +#include <mach/tc.h> /* Almost all documentation for chip and board memory maps assumes * BM is clear. Most devel boards have a switch to control booting @@ -72,7 +72,10 @@ static inline u32 omap_cs3_phys(void) #endif /* ifndef __ASSEMBLER__ */ -#include <plat/serial.h> +#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) + +#include <mach/serial.h> /* * --------------------------------------------------------------------------- diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index 901082def9bd..3c2530523111 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -19,7 +19,7 @@ * because of the strncmp(). */ #if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) -#include <plat/cpu.h> +#include <mach/soc.h> /* * OMAP-1510 Local Bus address offset diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h index 8fe05d6137c0..3d235244bf5c 100644 --- a/arch/arm/mach-omap1/include/mach/omap1510.h +++ b/arch/arm/mach-omap1/include/mach/omap1510.h @@ -45,5 +45,118 @@ #define OMAP1510_DSP_MMU_BASE (0xfffed200) +/* + * --------------------------------------------------------------------------- + * OMAP-1510 FPGA + * --------------------------------------------------------------------------- + */ +#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */ +#define OMAP1510_FPGA_SIZE SZ_4K +#define OMAP1510_FPGA_START 0x08000000 /* PA */ + +/* Revision */ +#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0) +#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1) +#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2) +#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3) +#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4) +#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5) + +/* Interrupt status */ +#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6) +#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7) + +/* Interrupt mask */ +#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8) +#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9) + +/* Reset registers */ +#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa) +#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb) + +#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc) +#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe) +#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf) +#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14) +#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15) +#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16) +#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18) +#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c) +#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100) +#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101) +#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102) + +#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204) + +#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205) +#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206) +#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207) +#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208) +#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209) +#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a) +#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b) +#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d) +#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e) +#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210) + +#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300) + +/* + * Power up Giga UART driver, turn on HID clock. + * Turn off BT power, since we're not using it and it + * draws power. + */ +#define OMAP1510_FPGA_RESET_VALUE 0x42 + +#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7) +#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6) +#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5) +#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4) +#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3) +#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2) +#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1) +#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0) + +/* + * Innovator/OMAP1510 FPGA HID register bit definitions + */ +#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */ +#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */ +#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */ +#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */ +#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */ +#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */ +#define OMAP1510_FPGA_HID_rsrvd (1<<6) +#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */ + +/* The FPGA IRQ is cascaded through GPIO_13 */ +#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13) + +/* IRQ Numbers for interrupts muxed through the FPGA */ +#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0) +#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1) +#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2) +#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3) +#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4) +#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5) +#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6) +#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7) +#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8) +#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9) +#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10) +#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11) +#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12) +#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13) +#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14) +#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15) +#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16) +#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17) +#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18) +#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19) +#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20) +#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21) +#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22) +#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) + #endif /* __ASM_ARCH_OMAP15XX_H */ diff --git a/arch/arm/mach-omap1/include/mach/serial.h b/arch/arm/mach-omap1/include/mach/serial.h new file mode 100644 index 000000000000..2ce6a2db470b --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/serial.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2009 Texas Instruments + * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com> + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_SERIAL_H +#define __ASM_ARCH_SERIAL_H + +#include <linux/init.h> + +/* + * Memory entry used for the DEBUG_LL UART configuration, relative to + * start of RAM. See also uncompress.h and debug-macro.S. + * + * Note that using a memory location for storing the UART configuration + * has at least two limitations: + * + * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the + * uncompress code could then partially overwrite itself + * 2. We assume printascii is called at least once before paging_init, + * and addruart has a chance to read OMAP_UART_INFO + */ +#define OMAP_UART_INFO_OFS 0x3ffc + +/* OMAP1 serial ports */ +#define OMAP1_UART1_BASE 0xfffb0000 +#define OMAP1_UART2_BASE 0xfffb0800 +#define OMAP1_UART3_BASE 0xfffb9800 + +#define OMAP_PORT_SHIFT 2 +#define OMAP7XX_PORT_SHIFT 0 + +#define OMAP1510_BASE_BAUD (12000000/16) +#define OMAP16XX_BASE_BAUD (48000000/16) + +/* + * DEBUG_LL port encoding stored into the UART1 scratchpad register by + * decomp_setup in uncompress.h + */ +#define OMAP1UART1 11 +#define OMAP1UART2 12 +#define OMAP1UART3 13 + +#ifndef __ASSEMBLER__ +extern void omap_serial_init(void); +#endif + +#endif diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h new file mode 100644 index 000000000000..6cf9c1cc2bef --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/soc.h @@ -0,0 +1,229 @@ +/* + * OMAP cpu type detection + * + * Copyright (C) 2004, 2008 Nokia Corporation + * + * Copyright (C) 2009-11 Texas Instruments. + * + * Written by Tony Lindgren <tony.lindgren@nokia.com> + * + * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_OMAP_CPU_H +#define __ASM_ARCH_OMAP_CPU_H + +#ifndef __ASSEMBLY__ + +#include <linux/bitops.h> + +/* + * Test if multicore OMAP support is needed + */ +#undef MULTI_OMAP1 +#undef OMAP_NAME + +#ifdef CONFIG_ARCH_OMAP730 +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap730 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP850 +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap850 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP15XX +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap1510 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP16XX +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap16xx +# endif +#endif + +/* + * omap_rev bits: + * CPU id bits (0730, 1510, 1710, 2422...) [31:16] + * CPU revision (See _REV_ defined in cpu.h) [15:08] + * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] + */ +unsigned int omap_rev(void); + +/* + * Get the CPU revision for OMAP devices + */ +#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff) + +/* + * Macros to group OMAP into cpu classes. + * These can be used in most places. + * cpu_is_omap7xx(): True for OMAP730, OMAP850 + * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 + * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 + */ +#define GET_OMAP_CLASS (omap_rev() & 0xff) + +#define IS_OMAP_CLASS(class, id) \ +static inline int is_omap ##class (void) \ +{ \ + return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ +} + +#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) + +#define IS_OMAP_SUBCLASS(subclass, id) \ +static inline int is_omap ##subclass (void) \ +{ \ + return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ +} + +IS_OMAP_CLASS(7xx, 0x07) +IS_OMAP_CLASS(15xx, 0x15) +IS_OMAP_CLASS(16xx, 0x16) + +#define cpu_is_omap7xx() 0 +#define cpu_is_omap15xx() 0 +#define cpu_is_omap16xx() 0 + +#if defined(MULTI_OMAP1) +# if defined(CONFIG_ARCH_OMAP730) +# undef cpu_is_omap7xx +# define cpu_is_omap7xx() is_omap7xx() +# endif +# if defined(CONFIG_ARCH_OMAP850) +# undef cpu_is_omap7xx +# define cpu_is_omap7xx() is_omap7xx() +# endif +# if defined(CONFIG_ARCH_OMAP15XX) +# undef cpu_is_omap15xx +# define cpu_is_omap15xx() is_omap15xx() +# endif +# if defined(CONFIG_ARCH_OMAP16XX) +# undef cpu_is_omap16xx +# define cpu_is_omap16xx() is_omap16xx() +# endif +#else +# if defined(CONFIG_ARCH_OMAP730) +# undef cpu_is_omap7xx +# define cpu_is_omap7xx() 1 +# endif +# if defined(CONFIG_ARCH_OMAP850) +# undef cpu_is_omap7xx +# define cpu_is_omap7xx() 1 +# endif +# if defined(CONFIG_ARCH_OMAP15XX) +# undef cpu_is_omap15xx +# define cpu_is_omap15xx() 1 +# endif +# if defined(CONFIG_ARCH_OMAP16XX) +# undef cpu_is_omap16xx +# define cpu_is_omap16xx() 1 +# endif +#endif + +/* + * Macros to detect individual cpu types. + * These are only rarely needed. + * cpu_is_omap310(): True for OMAP310 + * cpu_is_omap1510(): True for OMAP1510 + * cpu_is_omap1610(): True for OMAP1610 + * cpu_is_omap1611(): True for OMAP1611 + * cpu_is_omap5912(): True for OMAP5912 + * cpu_is_omap1621(): True for OMAP1621 + * cpu_is_omap1710(): True for OMAP1710 + */ +#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) + +#define IS_OMAP_TYPE(type, id) \ +static inline int is_omap ##type (void) \ +{ \ + return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ +} + +IS_OMAP_TYPE(310, 0x0310) +IS_OMAP_TYPE(1510, 0x1510) +IS_OMAP_TYPE(1610, 0x1610) +IS_OMAP_TYPE(1611, 0x1611) +IS_OMAP_TYPE(5912, 0x1611) +IS_OMAP_TYPE(1621, 0x1621) +IS_OMAP_TYPE(1710, 0x1710) + +#define cpu_is_omap310() 0 +#define cpu_is_omap1510() 0 +#define cpu_is_omap1610() 0 +#define cpu_is_omap5912() 0 +#define cpu_is_omap1611() 0 +#define cpu_is_omap1621() 0 +#define cpu_is_omap1710() 0 + +/* These are needed to compile common code */ +#ifdef CONFIG_ARCH_OMAP1 +#define cpu_is_omap242x() 0 +#define cpu_is_omap2430() 0 +#define cpu_is_omap243x() 0 +#define cpu_is_omap24xx() 0 +#define cpu_is_omap34xx() 0 +#define cpu_is_omap44xx() 0 +#define soc_is_omap54xx() 0 +#define soc_is_am33xx() 0 +#define cpu_class_is_omap1() 1 +#define cpu_class_is_omap2() 0 +#endif + +/* + * Whether we have MULTI_OMAP1 or not, we still need to distinguish + * between 310 vs. 1510 and 1611B/5912 vs. 1710. + */ + +#if defined(CONFIG_ARCH_OMAP15XX) +# undef cpu_is_omap310 +# undef cpu_is_omap1510 +# define cpu_is_omap310() is_omap310() +# define cpu_is_omap1510() is_omap1510() +#endif + +#if defined(CONFIG_ARCH_OMAP16XX) +# undef cpu_is_omap1610 +# undef cpu_is_omap1611 +# undef cpu_is_omap5912 +# undef cpu_is_omap1621 +# undef cpu_is_omap1710 +# define cpu_is_omap1610() is_omap1610() +# define cpu_is_omap1611() is_omap1611() +# define cpu_is_omap5912() is_omap5912() +# define cpu_is_omap1621() is_omap1621() +# define cpu_is_omap1710() is_omap1710() +#endif + +#endif /* __ASSEMBLY__ */ +#endif diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/mach-omap1/include/mach/tc.h index 1b4b2da86203..1b4b2da86203 100644 --- a/arch/arm/plat-omap/include/plat/tc.h +++ b/arch/arm/mach-omap1/include/mach/tc.h diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h index 0ff22dc075c7..ad6fbe7d83f2 100644 --- a/arch/arm/mach-omap1/include/mach/uncompress.h +++ b/arch/arm/mach-omap1/include/mach/uncompress.h @@ -1,5 +1,122 @@ /* - * arch/arm/mach-omap1/include/mach/uncompress.h + * arch/arm/plat-omap/include/mach/uncompress.h + * + * Serial port stubs for kernel decompress status messages + * + * Initially based on: + * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h + * Copyright (C) 2000 RidgeRun, Inc. + * Author: Greg Lonnon <glonnon@ridgerun.com> + * + * Rewritten by: + * Author: <source@mvista.com> + * 2004 (c) MontaVista Software, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. */ -#include <plat/uncompress.h> +#include <linux/types.h> +#include <linux/serial_reg.h> + +#include <asm/memory.h> +#include <asm/mach-types.h> + +#include "serial.h" + +#define MDR1_MODE_MASK 0x07 + +volatile u8 *uart_base; +int uart_shift; + +/* + * Store the DEBUG_LL uart number into memory. + * See also debug-macro.S, and serial.c for related code. + */ +static void set_omap_uart_info(unsigned char port) +{ + /* + * Get address of some.bss variable and round it down + * a la CONFIG_AUTO_ZRELADDR. + */ + u32 ram_start = (u32)&uart_shift & 0xf8000000; + u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); + *uart_info = port; +} + +static void putc(int c) +{ + if (!uart_base) + return; + + /* Check for UART 16x mode */ + if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) + return; + + while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) + barrier(); + uart_base[UART_TX << uart_shift] = c; +} + +static inline void flush(void) +{ +} + +/* + * Macros to configure UART1 and debug UART + */ +#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \ + if (machine_is_##mach()) { \ + uart_base = (volatile u8 *)(dbg_uart); \ + uart_shift = (dbg_shft); \ + port = (dbg_id); \ + set_omap_uart_info(port); \ + break; \ + } + +#define DEBUG_LL_OMAP7XX(p, mach) \ + _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \ + OMAP1UART##p) + +#define DEBUG_LL_OMAP1(p, mach) \ + _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, \ + OMAP1UART##p) + +static inline void arch_decomp_setup(void) +{ + int port = 0; + + /* + * Initialize the port based on the machine ID from the bootloader. + * Note that we're using macros here instead of switch statement + * as machine_is functions are optimized out for the boards that + * are not selected. + */ + do { + /* omap7xx/8xx based boards using UART1 with shift 0 */ + DEBUG_LL_OMAP7XX(1, herald); + DEBUG_LL_OMAP7XX(1, omap_perseus2); + + /* omap15xx/16xx based boards using UART1 */ + DEBUG_LL_OMAP1(1, ams_delta); + DEBUG_LL_OMAP1(1, nokia770); + DEBUG_LL_OMAP1(1, omap_h2); + DEBUG_LL_OMAP1(1, omap_h3); + DEBUG_LL_OMAP1(1, omap_innovator); + DEBUG_LL_OMAP1(1, omap_osk); + DEBUG_LL_OMAP1(1, omap_palmte); + DEBUG_LL_OMAP1(1, omap_palmz71); + + /* omap15xx/16xx based boards using UART2 */ + DEBUG_LL_OMAP1(2, omap_palmtt); + + /* omap15xx/16xx based boards using UART3 */ + DEBUG_LL_OMAP1(3, sx1); + } while (0); +} + +/* + * nothing to do + */ +#define arch_decomp_wdog() diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 6a5baab1f4cb..5a3b80617a11 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -17,8 +17,8 @@ #include <asm/mach/map.h> #include <mach/mux.h> -#include <plat/tc.h> -#include <plat/dma.h> +#include <mach/tc.h> +#include <plat-omap/dma-omap.h> #include "iomap.h" #include "common.h" @@ -134,7 +134,6 @@ void __init omap1_init_early(void) */ omap1_clk_init(); omap1_mux_init(); - omap_init_consistent_dma_size(); } void __init omap1_init_late(void) diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h index 330c4716b028..f4e2d7a21365 100644 --- a/arch/arm/mach-omap1/iomap.h +++ b/arch/arm/mach-omap1/iomap.h @@ -22,9 +22,6 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ -#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) - /* * ---------------------------------------------------------------------------- * Omap1 specific IO mapping diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 6995fb6a3345..122ef67939a2 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -45,7 +45,7 @@ #include <asm/irq.h> #include <asm/mach/irq.h> -#include <plat/cpu.h> +#include "soc.h" #include <mach/hardware.h> diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c index ed42628611bc..7ed8c1857d56 100644 --- a/arch/arm/mach-omap1/lcd_dma.c +++ b/arch/arm/mach-omap1/lcd_dma.c @@ -27,11 +27,13 @@ #include <linux/interrupt.h> #include <linux/io.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> #include <mach/hardware.h> #include <mach/lcdc.h> +#include "dma.h" + int omap_lcd_dma_running(void) { /* diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index bdc2e7541adb..c6d8fdf92e9c 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -19,14 +19,15 @@ #include <linux/platform_device.h> #include <linux/slab.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> #include <mach/mux.h> -#include <plat/cpu.h> +#include "soc.h" #include <linux/platform_data/asoc-ti-mcbsp.h> #include <mach/irqs.h> #include "iomap.h" +#include "dma.h" #define DPS_RSTCT2_PER_EN (1 << 0) #define DSP_RSTCT2_WD_PER_EN (1 << 1) diff --git a/arch/arm/mach-omap1/mmc.h b/arch/arm/mach-omap1/mmc.h new file mode 100644 index 000000000000..39c2b13de884 --- /dev/null +++ b/arch/arm/mach-omap1/mmc.h @@ -0,0 +1,18 @@ +#include <linux/mmc/host.h> +#include <linux/platform_data/mmc-omap.h> + +#define OMAP15XX_NR_MMC 1 +#define OMAP16XX_NR_MMC 2 +#define OMAP1_MMC_SIZE 0x080 +#define OMAP1_MMC1_BASE 0xfffb7800 +#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */ + +#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) +void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, + int nr_controllers); +#else +static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, + int nr_controllers) +{ +} +#endif diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c index 9cd4ddb51397..8dcebe6d8882 100644 --- a/arch/arm/mach-omap1/opp_data.c +++ b/arch/arm/mach-omap1/opp_data.c @@ -10,7 +10,7 @@ * published by the Free Software Foundation. */ -#include <plat/clkdev_omap.h> +#include "clock.h" #include "opp.h" /*------------------------------------------------------------------------- diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 47ec16155483..66d663a6ef3a 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -44,23 +44,23 @@ #include <linux/io.h> #include <linux/atomic.h> +#include <asm/fncpy.h> #include <asm/system_misc.h> #include <asm/irq.h> #include <asm/mach/time.h> #include <asm/mach/irq.h> -#include <plat/cpu.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/tc.h> +#include <mach/tc.h> #include <mach/mux.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> #include <plat/dmtimer.h> #include <mach/irqs.h> #include "iomap.h" +#include "clock.h" #include "pm.h" +#include "sram.h" static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c index 7868e75ad077..3f2d39672393 100644 --- a/arch/arm/mach-omap1/pm_bus.c +++ b/arch/arm/mach-omap1/pm_bus.c @@ -19,8 +19,7 @@ #include <linux/clk.h> #include <linux/err.h> -#include <plat/omap_device.h> -#include <plat/omap-pm.h> +#include "soc.h" #ifdef CONFIG_PM_RUNTIME static int omap1_pm_runtime_suspend(struct device *dev) diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index b17709103866..a0a9f97772ea 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -10,6 +10,19 @@ #include "common.h" +/* ARM_SYSST bit shifts related to SoC reset sources */ +#define ARM_SYSST_POR_SHIFT 5 +#define ARM_SYSST_EXT_RST_SHIFT 4 +#define ARM_SYSST_ARM_WDRST_SHIFT 2 +#define ARM_SYSST_GLOB_SWRST_SHIFT 1 + +/* Standardized reset source bits (across all OMAP SoCs) */ +#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 +#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 +#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 + + void omap1_restart(char mode, const char *cmd) { /* @@ -23,3 +36,28 @@ void omap1_restart(char mode, const char *cmd) omap_writew(1, ARM_RSTCT1); } + +/** + * omap1_get_reset_sources - return the source of the SoC's last reset + * + * Returns bits that represent the last reset source for the SoC. The + * format is standardized across OMAPs for use by the OMAP watchdog. + */ +int omap1_get_reset_sources(void) +{ + int ret = 0; + u16 rs; + + rs = __raw_readw(ARM_SYSST); + + if (rs & (1 << ARM_SYSST_POR_SHIFT)) + ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT)) + ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT)) + ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT)) + ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT; + + return ret; +} diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index b9d6834af835..d1ac08016f0b 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -23,7 +23,6 @@ #include <asm/mach-types.h> #include <mach/mux.h> -#include <plat/fpga.h> #include "pm.h" diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index 0e628743bd03..a908c51839a4 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -36,6 +36,8 @@ #include <asm/assembler.h> +#include <mach/hardware.h> + #include "iomap.h" #include "pm.h" diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h new file mode 100644 index 000000000000..69daf0187b1d --- /dev/null +++ b/arch/arm/mach-omap1/soc.h @@ -0,0 +1,4 @@ +/* + * We can move mach/soc.h here once the drivers are fixed + */ +#include <mach/soc.h> diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c new file mode 100644 index 000000000000..6431b0f862ce --- /dev/null +++ b/arch/arm/mach-omap1/sram-init.c @@ -0,0 +1,76 @@ +/* + * OMAP SRAM detection and management + * + * Copyright (C) 2005 Nokia Corporation + * Written by Tony Lindgren <tony@atomide.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/io.h> + +#include <asm/fncpy.h> +#include <asm/tlb.h> +#include <asm/cacheflush.h> + +#include <asm/mach/map.h> + +#include "soc.h" +#include "sram.h" + +#define OMAP1_SRAM_PA 0x20000000 +#define SRAM_BOOTLOADER_SZ 0x80 + +/* + * The amount of SRAM depends on the core type. + * Note that we cannot try to test for SRAM here because writes + * to secure SRAM will hang the system. Also the SRAM is not + * yet mapped at this point. + */ +static void __init omap_detect_and_map_sram(void) +{ + unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ; + unsigned long omap_sram_start = OMAP1_SRAM_PA; + unsigned long omap_sram_size; + + if (cpu_is_omap7xx()) + omap_sram_size = 0x32000; /* 200K */ + else if (cpu_is_omap15xx()) + omap_sram_size = 0x30000; /* 192K */ + else if (cpu_is_omap1610() || cpu_is_omap1611() || + cpu_is_omap1621() || cpu_is_omap1710()) + omap_sram_size = 0x4000; /* 16K */ + else { + pr_err("Could not detect SRAM size\n"); + omap_sram_size = 0x4000; + } + + omap_map_sram(omap_sram_start, omap_sram_size, + omap_sram_skip, 1); +} + +static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); + +void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) +{ + BUG_ON(!_omap_sram_reprogram_clock); + /* On 730, bit 13 must always be 1 */ + if (cpu_is_omap7xx()) + ckctl |= 0x2000; + _omap_sram_reprogram_clock(dpllctl, ckctl); +} + +int __init omap_sram_init(void) +{ + omap_detect_and_map_sram(); + _omap_sram_reprogram_clock = + omap_sram_push(omap1_sram_reprogram_clock, + omap1_sram_reprogram_clock_sz); + + return 0; +} diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h new file mode 100644 index 000000000000..d5a6c8362301 --- /dev/null +++ b/arch/arm/mach-omap1/sram.h @@ -0,0 +1,7 @@ +#include <plat/sram.h> + +extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); + +/* Do not use these */ +extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); +extern unsigned long omap1_sram_reprogram_clock_sz; diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 74529549130c..89368195bf08 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -50,6 +50,7 @@ #include <asm/mach/irq.h> #include <asm/mach/time.h> +#include <plat/counter-32k.h> #include <plat/dmtimer.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index 84267edd9421..104fed366b8f 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -301,7 +301,7 @@ static inline void otg_device_init(struct omap_usb_config *pdata) #endif -u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) +static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) { u32 syscon1 = 0; @@ -409,7 +409,7 @@ u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) return syscon1 << 16; } -u32 __init omap1_usb1_init(unsigned nwires) +static u32 __init omap1_usb1_init(unsigned nwires) { u32 syscon1 = 0; @@ -475,7 +475,7 @@ bad: return syscon1 << 20; } -u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) +static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) { u32 syscon1 = 0; diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2a1a898c7f90..d669e227e00c 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL select I2C_OMAP select MENELAUS if ARCH_OMAP2 select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 - select PINCTRL select PM_RUNTIME select REGULATOR select SERIAL_OMAP diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index d6721a7f4c3b..d5e834a9075d 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -4,30 +4,37 @@ # Common support obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ - common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o - -# INTCPS IP block support - XXX should be moved to drivers/ -obj-$(CONFIG_ARCH_OMAP2) += irq.o -obj-$(CONFIG_ARCH_OMAP3) += irq.o -obj-$(CONFIG_SOC_AM33XX) += irq.o - -# Secure monitor API support -obj-$(CONFIG_ARCH_OMAP3) += omap-smc.o omap-secure.o -obj-$(CONFIG_ARCH_OMAP4) += omap-smc.o omap-secure.o -obj-$(CONFIG_SOC_OMAP5) += omap-smc.o omap-secure.o + common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ + omap_device.o sram.o + +omap-2-3-common = irq.o +hwmod-common = omap_hwmod.o \ + omap_hwmod_common_data.o +clock-common = clock.o clock_common_data.o \ + clkt_dpll.o clkt_clksel.o +secure-common = omap-smc.o omap-secure.o + +obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) +obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) +obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) +obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) +obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common) ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) obj-y += mcbsp.o endif -obj-$(CONFIG_TWL4030_CORE) += omap_twl.o +obj-$(CONFIG_TWL4030_CORE) += omap_twl.o +obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o # SMP support ONLY available for OMAP4 obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o -obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o -obj-$(CONFIG_SOC_OMAP5) += omap4-common.o omap-wakeupgen.o +omap-4-5-common = omap4-common.o omap-wakeupgen.o \ + sleep44xx.o +obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) +obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) @@ -52,7 +59,6 @@ obj-$(CONFIG_ARCH_OMAP4) += mux44xx.o # SMS/SDRC obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o # obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o -obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o # OPP table initialization ifeq ($(CONFIG_PM_OPP),y) @@ -63,15 +69,16 @@ endif # Power Management ifeq ($(CONFIG_PM),y) -obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o sleep24xx.o +obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o +obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o -obj-$(CONFIG_ARCH_OMAP4) += sleep44xx.o -obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o sleep44xx.o +obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o +obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o -obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o +obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec) @@ -83,76 +90,82 @@ endif endif ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_OMAP3) += cpuidle34xx.o -obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o +obj-$(CONFIG_ARCH_OMAP3) += cpuidle34xx.o +obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o endif # PRCM -obj-y += prcm.o prm_common.o -obj-$(CONFIG_ARCH_OMAP2) += cm2xxx_3xxx.o prm2xxx_3xxx.o -obj-$(CONFIG_ARCH_OMAP3) += cm2xxx_3xxx.o prm2xxx_3xxx.o +obj-y += prcm.o prm_common.o cm_common.o +obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o +obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ prcm_mpu44xx.o prminst44xx.o \ - vc44xx_data.o vp44xx_data.o \ - prm44xx.o + vc44xx_data.o vp44xx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common) # OMAP voltage domains -obj-y += voltage.o vc.o vp.o +voltagedomain-common := voltage.o vc.o vp.o +obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP2) += voltagedomains2xxx_data.o +obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP3) += voltagedomains3xxx_data.o +obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o +obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common) +obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o +obj-$(CONFIG_SOC_OMAP5) += $(voltagedomain-common) # OMAP powerdomain framework -obj-y += powerdomain.o powerdomain-common.o +powerdomain-common += powerdomain.o powerdomain-common.o +obj-$(CONFIG_ARCH_OMAP2) += $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP2) += powerdomains2xxx_data.o -obj-$(CONFIG_ARCH_OMAP2) += powerdomain2xxx_3xxx.o obj-$(CONFIG_ARCH_OMAP2) += powerdomains2xxx_3xxx_data.o -obj-$(CONFIG_ARCH_OMAP3) += powerdomain2xxx_3xxx.o +obj-$(CONFIG_ARCH_OMAP3) += $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP3) += powerdomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += powerdomains2xxx_3xxx_data.o -obj-$(CONFIG_ARCH_OMAP4) += powerdomain44xx.o +obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += powerdomain33xx.o +obj-$(CONFIG_SOC_AM33XX) += $(powerdomain-common) obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o -obj-$(CONFIG_SOC_OMAP5) += powerdomain44xx.o +obj-$(CONFIG_SOC_OMAP5) += $(powerdomain-common) # PRCM clockdomain control -obj-y += clockdomain.o -obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o +clockdomain-common += clockdomain.o +obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o obj-$(CONFIG_SOC_OMAP2420) += clockdomains2420_data.o obj-$(CONFIG_SOC_OMAP2430) += clockdomains2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += clockdomain2xxx_3xxx.o +obj-$(CONFIG_ARCH_OMAP3) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP3) += clockdomains2xxx_3xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += clockdomains3xxx_data.o -obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o +obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o +obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common) obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o -obj-$(CONFIG_SOC_OMAP5) += clockdomain44xx.o +obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common) # Clock framework -obj-y += clock.o clock_common_data.o \ - clkt_dpll.o clkt_clksel.o -obj-$(CONFIG_ARCH_OMAP2) += clock2xxx.o -obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o clkt2xxx_sys.o +obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o +obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_sys.o +obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_apll.o clkt2xxx_osc.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o obj-$(CONFIG_SOC_OMAP2420) += clock2420_data.o obj-$(CONFIG_SOC_OMAP2430) += clock2430.o clock2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += clock3xxx.o +obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o clkt34xx_dpll3m2.o -obj-$(CONFIG_ARCH_OMAP3) += clock3517.o clock36xx.o clkt_iclk.o +obj-$(CONFIG_ARCH_OMAP3) += clock3517.o clock36xx.o obj-$(CONFIG_ARCH_OMAP3) += dpll3xxx.o clock3xxx_data.o -obj-$(CONFIG_ARCH_OMAP4) += clock44xx_data.o +obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o +obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o -obj-$(CONFIG_SOC_AM33XX) += dpll3xxx.o clock33xx_data.o +obj-$(CONFIG_SOC_AM33XX) += $(clock-common) dpll3xxx.o +obj-$(CONFIG_SOC_AM33XX) += clock33xx_data.o +obj-$(CONFIG_SOC_OMAP5) += $(clock-common) obj-$(CONFIG_SOC_OMAP5) += dpll3xxx.o dpll44xx.o # OMAP2 clock rate set data (old "OPP" data) @@ -160,7 +173,6 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o # hwmod data -obj-y += omap_hwmod_common_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_3xxx_ipblock_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o @@ -204,10 +216,10 @@ obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o -obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o +obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o -obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o -obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o +obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o +obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o obj-$(CONFIG_MACH_OVERO) += board-overo.o obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c index d0c54c573d34..af11dcdb7e2c 100644 --- a/arch/arm/mach-omap2/am35xx-emac.c +++ b/arch/arm/mach-omap2/am35xx-emac.c @@ -18,7 +18,7 @@ #include <linux/err.h> #include <linux/davinci_emac.h> #include <asm/system.h> -#include <plat/omap_device.h> +#include "omap_device.h" #include "am35xx.h" #include "control.h" #include "am35xx-emac.h" diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 95b384d54f8a..d1c01625fe5a 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -28,14 +28,12 @@ #include <linux/io.h> #include <linux/gpio.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include "common.h" -#include <plat/gpmc.h> -#include <plat/usb.h> +#include "gpmc.h" #include "gpmc-smc91x.h" #include <video/omapdss.h> diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 96cd3693e1ae..79fd9048fd79 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -30,15 +30,15 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/usb.h> #include "common.h" -#include <plat/dma.h> -#include <plat/gpmc.h> +#include <plat-omap/dma-omap.h> #include <video/omapdss.h> #include <video/omap-panel-tfp410.h> +#include "gpmc.h" #include "gpmc-smc91x.h" +#include "soc.h" #include "board-flash.h" #include "mux.h" #include "sdram-qimonda-hyb18m512160af-6.h" diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index fc224ad86747..81871b1c735c 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -18,9 +18,8 @@ #include "common.h" #include "gpmc-smc91x.h" -#include <plat/usb.h> -#include <mach/board-zoom.h> +#include "board-zoom.h" #include "board-flash.h" #include "mux.h" diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 3669c120c7e8..fd80d976872d 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -27,6 +27,7 @@ #include <linux/leds.h> #include <linux/leds_pwm.h> #include <linux/platform_data/omap4-keypad.h> +#include <linux/usb/musb.h> #include <asm/hardware/gic.h> #include <asm/mach-types.h> @@ -34,8 +35,6 @@ #include <asm/mach/map.h> #include "common.h" -#include <plat/usb.h> -#include <plat/mmc.h> #include "omap4-keypad.h" #include <video/omapdss.h> #include <video/omap-panel-nokia-dsi.h> @@ -45,6 +44,7 @@ #include "soc.h" #include "mux.h" +#include "mmc.h" #include "hsmmc.h" #include "control.h" #include "common-board-devices.h" diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 318feadb1d6e..603503c587b7 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -26,7 +26,6 @@ #include <asm/mach/map.h> #include "common.h" -#include <plat/usb.h> #include "am35xx-emac.h" #include "mux.h" diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index e16289755f2e..96d6c5ab5d4c 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -25,6 +25,7 @@ #include <linux/can/platform/ti_hecc.h> #include <linux/davinci_emac.h> #include <linux/mmc/host.h> +#include <linux/usb/musb.h> #include <linux/platform_data/gpio-omap.h> #include "am35xx.h" @@ -33,7 +34,6 @@ #include <asm/mach/map.h> #include "common.h" -#include <plat/usb.h> #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> #include <video/omap-panel-tfp410.h> diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index cea3abace815..64cf1bde0f3b 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -28,14 +28,14 @@ #include <linux/clk.h> #include <linux/smc91x.h> #include <linux/gpio.h> +#include <linux/platform_data/leds-omap.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> -#include <plat/led.h> #include "common.h" -#include <plat/gpmc.h> +#include "gpmc.h" #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 376d26eb601c..a8cad2237a2a 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -38,21 +38,19 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include "common.h" #include <linux/platform_data/mtd-nand-omap2.h> -#include <plat/gpmc.h> -#include <plat/usb.h> #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> #include <video/omap-panel-tfp410.h> #include <linux/platform_data/spi-omap2-mcspi.h> -#include <mach/hardware.h> - +#include "common.h" #include "mux.h" #include "sdram-micron-mt46h32m32lf-6.h" #include "hsmmc.h" #include "common-board-devices.h" +#include "gpmc.h" +#include "gpmc-nand.h" #define CM_T35_GPIO_PENDOWN 57 #define SB_T35_USB_HUB_RESET_GPIO 167 @@ -181,7 +179,7 @@ static struct omap_nand_platform_data cm_t35_nand_data = { static void __init cm_t35_init_nand(void) { - if (gpmc_nand_init(&cm_t35_nand_data) < 0) + if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0) pr_err("CM-T35: Unable to register NAND device\n"); } #else diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 59c0a45f75b0..278664731d2c 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -39,9 +39,8 @@ #include <asm/mach/map.h> #include "common.h" -#include <plat/usb.h> #include <linux/platform_data/mtd-nand-omap2.h> -#include <plat/gpmc.h> +#include "gpmc.h" #include "am35xx.h" @@ -49,6 +48,7 @@ #include "control.h" #include "common-board-devices.h" #include "am35xx-emac.h" +#include "gpmc-nand.h" #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) static struct gpio_led cm_t3517_leds[] = { @@ -240,7 +240,7 @@ static struct omap_nand_platform_data cm_t3517_nand_data = { static void __init cm_t3517_init_nand(void) { - if (gpmc_nand_init(&cm_t3517_nand_data) < 0) + if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0) pr_err("CM-T3517: NAND initialization failed\n"); } #else diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 1fd161e934c7..933479e36737 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -39,9 +39,8 @@ #include <asm/mach/flash.h> #include "common.h" -#include <plat/gpmc.h> +#include "gpmc.h" #include <linux/platform_data/mtd-nand-omap2.h> -#include <plat/usb.h> #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> #include <video/omap-panel-tfp410.h> @@ -55,8 +54,11 @@ #include "sdram-micron-mt46h32m32lf-6.h" #include "mux.h" #include "hsmmc.h" +#include "board-flash.h" #include "common-board-devices.h" +#define NAND_CS 0 + #define OMAP_DM9000_GPIO_IRQ 25 #define OMAP3_DEVKIT_TS_GPIO 27 @@ -621,8 +623,9 @@ static void __init devkit8000_init(void) usb_musb_init(NULL); usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions, - ARRAY_SIZE(devkit8000_nand_partitions)); + board_nand_init(devkit8000_nand_partitions, + ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS, + NAND_BUSWIDTH_16, NULL); omap_twl4030_audio_init("omap3beagle"); /* Ensure SDRC pins are mux'd for self-refresh */ diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c index e642acf9cad0..c33adea0247c 100644 --- a/arch/arm/mach-omap2/board-flash.c +++ b/arch/arm/mach-omap2/board-flash.c @@ -17,14 +17,14 @@ #include <linux/mtd/physmap.h> #include <linux/io.h> -#include <plat/cpu.h> -#include <plat/gpmc.h> #include <linux/platform_data/mtd-nand-omap2.h> #include <linux/platform_data/mtd-onenand-omap2.h> -#include <plat/tc.h> +#include "soc.h" #include "common.h" #include "board-flash.h" +#include "gpmc-onenand.h" +#include "gpmc-nand.h" #define REG_FPGA_REV 0x10 #define REG_FPGA_DIP_SWITCH_INPUT2 0x60 @@ -104,36 +104,35 @@ __init board_onenand_init(struct mtd_partition *onenand_parts, defined(CONFIG_MTD_NAND_OMAP2_MODULE) /* Note that all values in this struct are in nanoseconds */ -static struct gpmc_timings nand_timings = { +struct gpmc_timings nand_default_timings[1] = { + { + .sync_clk = 0, - .sync_clk = 0, + .cs_on = 0, + .cs_rd_off = 36, + .cs_wr_off = 36, - .cs_on = 0, - .cs_rd_off = 36, - .cs_wr_off = 36, + .adv_on = 6, + .adv_rd_off = 24, + .adv_wr_off = 36, - .adv_on = 6, - .adv_rd_off = 24, - .adv_wr_off = 36, + .we_off = 30, + .oe_off = 48, - .we_off = 30, - .oe_off = 48, + .access = 54, + .rd_cycle = 72, + .wr_cycle = 72, - .access = 54, - .rd_cycle = 72, - .wr_cycle = 72, - - .wr_access = 30, - .wr_data_mux_bus = 0, + .wr_access = 30, + .wr_data_mux_bus = 0, + }, }; -static struct omap_nand_platform_data board_nand_data = { - .gpmc_t = &nand_timings, -}; +static struct omap_nand_platform_data board_nand_data; void -__init board_nand_init(struct mtd_partition *nand_parts, - u8 nr_parts, u8 cs, int nand_type) +__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, + int nand_type, struct gpmc_timings *gpmc_t) { board_nand_data.cs = cs; board_nand_data.parts = nand_parts; @@ -141,7 +140,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, board_nand_data.devsize = nand_type; board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT; - gpmc_nand_init(&board_nand_data); + gpmc_nand_init(&board_nand_data, gpmc_t); } #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ @@ -238,5 +237,6 @@ void __init board_flash_init(struct flash_partitions partition_info[], pr_err("NAND: Unable to find configuration in GPMC\n"); else board_nand_init(partition_info[2].parts, - partition_info[2].nr_parts, nandcs, nand_type); + partition_info[2].nr_parts, nandcs, + nand_type, nand_default_timings); } diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h index c44b70d52021..2fb5d41a9fae 100644 --- a/arch/arm/mach-omap2/board-flash.h +++ b/arch/arm/mach-omap2/board-flash.h @@ -12,7 +12,7 @@ */ #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> -#include <plat/gpmc.h> +#include "gpmc.h" #define PDC_NOR 1 #define PDC_NAND 2 @@ -40,12 +40,14 @@ static inline void board_flash_init(struct flash_partitions part[], #if defined(CONFIG_MTD_NAND_OMAP2) || \ defined(CONFIG_MTD_NAND_OMAP2_MODULE) extern void board_nand_init(struct mtd_partition *nand_parts, - u8 nr_parts, u8 cs, int nand_type); + u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t); +extern struct gpmc_timings nand_default_timings[]; #else static inline void board_nand_init(struct mtd_partition *nand_parts, - u8 nr_parts, u8 cs, int nand_type) + u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t) { } +#define nand_default_timings NULL #endif #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 8d04bf851af4..8668c72ee810 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -26,15 +26,14 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/input/matrix_keypad.h> +#include <linux/mfd/menelaus.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/menelaus.h> -#include <plat/dma.h> -#include <plat/gpmc.h> -#include "debug-devices.h" +#include <plat-omap/dma-omap.h> +#include <plat/debug-devices.h> #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> @@ -42,6 +41,7 @@ #include "common.h" #include "mux.h" #include "control.h" +#include "gpmc.h" #define H4_FLASH_CS 0 #define H4_SMC91X_CS 1 diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 48d5e41dfbfa..dbc705ac4334 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -29,20 +29,19 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include "common.h" -#include <plat/gpmc.h> -#include <plat/usb.h> - #include <video/omapdss.h> #include <video/omap-panel-tfp410.h> #include <linux/platform_data/mtd-onenand-omap2.h> +#include "common.h" +#include "gpmc.h" #include "mux.h" #include "hsmmc.h" #include "sdram-numonyx-m65kxxxxam.h" #include "common-board-devices.h" #include "board-flash.h" #include "control.h" +#include "gpmc-onenand.h" #define IGEP2_SMSC911X_CS 5 #define IGEP2_SMSC911X_GPIO 176 @@ -175,7 +174,7 @@ static void __init igep_flash_init(void) pr_info("IGEP: initializing NAND memory device\n"); board_nand_init(igep_flash_partitions, ARRAY_SIZE(igep_flash_partitions), - 0, NAND_BUSWIDTH_16); + 0, NAND_BUSWIDTH_16, nand_default_timings); } else if (mux == IGEP_SYSBOOT_ONENAND) { pr_info("IGEP: initializing OneNAND memory device\n"); board_onenand_init(igep_flash_partitions, diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index ee8c3cfb95b3..1164b1061038 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -35,9 +35,8 @@ #include <asm/mach/map.h> #include "common.h" -#include <plat/gpmc.h> -#include <mach/board-zoom.h> -#include <plat/usb.h> +#include "board-zoom.h" +#include "gpmc.h" #include "gpmc-smsc911x.h" #include <video/omapdss.h> @@ -420,8 +419,8 @@ static void __init omap_ldp_init(void) omap_serial_init(); omap_sdrc_init(NULL, NULL); usb_musb_init(NULL); - board_nand_init(ldp_nand_partitions, - ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); + board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions), + ZOOM_NAND_CS, 0, nand_default_timings); omap_hsmmc_init(mmc); ldp_display_init(); diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index d95f727ca39a..e3efcb88cb3b 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -22,16 +22,17 @@ #include <linux/usb/musb.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/platform_data/mtd-onenand-omap2.h> +#include <linux/mfd/menelaus.h> #include <sound/tlv320aic3x.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include "common.h" -#include <plat/menelaus.h> -#include <plat/mmc.h> +#include "mmc.h" #include "mux.h" +#include "gpmc-onenand.h" #define TUSB6010_ASYNC_CS 1 #define TUSB6010_SYNC_CS 4 diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 388c431c745a..5a3800da903f 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -24,6 +24,7 @@ #include <linux/input.h> #include <linux/gpio_keys.h> #include <linux/opp.h> +#include <linux/cpu.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -38,19 +39,22 @@ #include <asm/mach/map.h> #include <asm/mach/flash.h> -#include "common.h" #include <video/omapdss.h> #include <video/omap-panel-tfp410.h> -#include <plat/gpmc.h> #include <linux/platform_data/mtd-nand-omap2.h> -#include <plat/usb.h> -#include <plat/omap_device.h> +#include "common.h" +#include "omap_device.h" +#include "gpmc.h" +#include "soc.h" #include "mux.h" #include "hsmmc.h" #include "pm.h" +#include "board-flash.h" #include "common-board-devices.h" +#define NAND_CS 0 + /* * OMAP3 Beagle revision * Run time detection of Beagle revision is done by reading GPIO. @@ -444,27 +448,31 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif -static void __init beagle_opp_init(void) +static int __init beagle_opp_init(void) { int r = 0; - /* Initialize the omap3 opp table */ - if (omap3_opp_init()) { + if (!machine_is_omap3_beagle()) + return 0; + + /* Initialize the omap3 opp table if not already created. */ + r = omap3_opp_init(); + if (IS_ERR_VALUE(r) && (r != -EEXIST)) { pr_err("%s: opp default init failed\n", __func__); - return; + return r; } /* Custom OPP enabled for all xM versions */ if (cpu_is_omap3630()) { struct device *mpu_dev, *iva_dev; - mpu_dev = omap_device_get_by_hwmod_name("mpu"); + mpu_dev = get_cpu_device(0); iva_dev = omap_device_get_by_hwmod_name("iva"); if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) { pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", __func__, mpu_dev, iva_dev); - return; + return -ENODEV; } /* Enable MPU 1GHz and lower opps */ r = opp_enable(mpu_dev, 800000000); @@ -484,8 +492,9 @@ static void __init beagle_opp_init(void) opp_disable(iva_dev, 660000000); } } - return; + return 0; } +device_initcall(beagle_opp_init); static void __init omap3_beagle_init(void) { @@ -512,8 +521,9 @@ static void __init omap3_beagle_init(void) usb_musb_init(NULL); usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, - ARRAY_SIZE(omap3beagle_nand_partitions)); + board_nand_init(omap3beagle_nand_partitions, + ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS, + NAND_BUSWIDTH_16, NULL); omap_twl4030_audio_init("omap3beagle"); /* Ensure msecure is mux'd to be able to set the RTC. */ @@ -522,8 +532,6 @@ static void __init omap3_beagle_init(void) /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); - - beagle_opp_init(); } MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index b9b776b6c954..3c0b9a90f3b3 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -32,6 +32,7 @@ #include <linux/spi/ads7846.h> #include <linux/i2c/twl.h> #include <linux/usb/otg.h> +#include <linux/usb/musb.h> #include <linux/usb/nop-usb-xceiv.h> #include <linux/smsc911x.h> @@ -45,17 +46,20 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/usb.h> #include <linux/platform_data/mtd-nand-omap2.h> #include "common.h" #include <linux/platform_data/spi-omap2-mcspi.h> #include <video/omapdss.h> #include <video/omap-panel-tfp410.h> +#include "soc.h" #include "mux.h" #include "sdram-micron-mt46h32m32lf-6.h" #include "hsmmc.h" #include "common-board-devices.h" +#include "board-flash.h" + +#define NAND_CS 0 #define OMAP3_EVM_TS_GPIO 175 #define OMAP3_EVM_EHCI_VBUS 22 @@ -731,8 +735,9 @@ static void __init omap3_evm_init(void) } usb_musb_init(&musb_board_data); usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions, - ARRAY_SIZE(omap3evm_nand_partitions)); + board_nand_init(omap3evm_nand_partitions, + ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS, + NAND_BUSWIDTH_16, NULL); omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); omap3evm_init_smsc911x(); diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 7bd8253b5d1d..e84e2a875378 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -34,16 +34,13 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include "gpmc-smsc911x.h" -#include <plat/gpmc.h> -#include <plat/sdrc.h> -#include <plat/usb.h> - #include "common.h" #include "mux.h" #include "hsmmc.h" #include "control.h" #include "common-board-devices.h" +#include "gpmc.h" +#include "gpmc-smsc911x.h" #define OMAP3LOGIC_SMSC911X_CS 1 diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 00a1f4ae6e44..ce31bd329f38 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -42,7 +42,6 @@ #include <asm/mach/map.h> #include "common.h" -#include <plat/usb.h> #include <video/omapdss.h> #include <linux/platform_data/mtd-nand-omap2.h> @@ -50,6 +49,7 @@ #include "sdram-micron-mt46h32m32lf-6.h" #include "hsmmc.h" #include "common-board-devices.h" +#include "gpmc-nand.h" #define PANDORA_WIFI_IRQ_GPIO 21 #define PANDORA_WIFI_NRESET_GPIO 23 @@ -602,7 +602,7 @@ static void __init omap3pandora_init(void) omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL); usbhs_init(&usbhs_bdata); usb_musb_init(NULL); - gpmc_nand_init(&pandora_nand_data); + gpmc_nand_init(&pandora_nand_data, NULL); /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 731235eb319e..ba1124538b9c 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -40,9 +40,8 @@ #include <asm/mach/flash.h> #include "common.h" -#include <plat/gpmc.h> +#include "gpmc.h" #include <linux/platform_data/mtd-nand-omap2.h> -#include <plat/usb.h> #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> #include <video/omap-panel-tfp410.h> diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 944ffc436577..a225d819633f 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -44,12 +44,12 @@ #include <asm/system_info.h> #include "common.h" -#include <plat/gpmc.h> +#include "gpmc.h" #include <linux/platform_data/mtd-nand-omap2.h> -#include <plat/usb.h> #include "mux.h" #include "hsmmc.h" +#include "board-flash.h" #include "common-board-devices.h" #include <asm/setup.h> @@ -59,6 +59,8 @@ #define TB_BL_PWM_TIMER 9 #define TB_KILL_POWER_GPIO 168 +#define NAND_CS 0 + static unsigned long touchbook_revision; static struct mtd_partition omap3touchbook_nand_partitions[] = { @@ -365,8 +367,9 @@ static void __init omap3_touchbook_init(void) omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata); usb_musb_init(NULL); usbhs_init(&usbhs_bdata); - omap_nand_flash_init(NAND_BUSWIDTH_16, omap3touchbook_nand_partitions, - ARRAY_SIZE(omap3touchbook_nand_partitions)); + board_nand_init(omap3touchbook_nand_partitions, + ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS, + NAND_BUSWIDTH_16, NULL); /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index bfcd397e233c..8c00b99cd2a3 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -29,6 +29,7 @@ #include <linux/regulator/machine.h> #include <linux/regulator/fixed.h> #include <linux/ti_wilink_st.h> +#include <linux/usb/musb.h> #include <linux/wl12xx.h> #include <linux/platform_data/omap-abe-twl6040.h> @@ -38,12 +39,11 @@ #include <asm/mach/map.h> #include <video/omapdss.h> -#include "common.h" -#include <plat/usb.h> -#include <plat/mmc.h> #include <video/omap-panel-tfp410.h> +#include "common.h" #include "soc.h" +#include "mmc.h" #include "hsmmc.h" #include "control.h" #include "mux.h" diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index b700685762b5..1cfb0374f5e2 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -49,14 +49,17 @@ #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> #include <video/omap-panel-tfp410.h> -#include <plat/gpmc.h> -#include <plat/usb.h> +#include "common.h" #include "mux.h" #include "sdram-micron-mt46h32m32lf-6.h" +#include "gpmc.h" #include "hsmmc.h" +#include "board-flash.h" #include "common-board-devices.h" +#define NAND_CS 0 + #define OVERO_GPIO_BT_XGATE 15 #define OVERO_GPIO_W2W_NRESET 16 #define OVERO_GPIO_PENDOWN 114 @@ -495,8 +498,8 @@ static void __init overo_init(void) omap_serial_init(); omap_sdrc_init(mt46h32m32lf6_sdrc_params, mt46h32m32lf6_sdrc_params); - omap_nand_flash_init(0, overo_nand_partitions, - ARRAY_SIZE(overo_nand_partitions)); + board_nand_init(overo_nand_partitions, + ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL); usb_musb_init(NULL); usbhs_init(&usbhs_bdata); overo_spi_init(); diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 45997bfbcbd2..1997e0e722a1 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -22,17 +22,14 @@ #include <asm/mach/arch.h> #include <asm/mach-types.h> -#include <plat/i2c.h> -#include <plat/mmc.h> -#include <plat/usb.h> -#include <plat/gpmc.h> #include "common.h" -#include <plat/serial.h> - #include "mux.h" +#include "gpmc.h" +#include "mmc.h" #include "hsmmc.h" #include "sdram-nokia.h" #include "common-board-devices.h" +#include "gpmc-onenand.h" static struct regulator_consumer_supply rm680_vemmc_consumers[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 020e03c95bfe..07005fe40a2a 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -31,9 +31,7 @@ #include <asm/system_info.h> #include "common.h" -#include <plat/dma.h> -#include <plat/gpmc.h> -#include <plat/omap-pm.h> +#include <plat-omap/dma-omap.h> #include "gpmc-smc91x.h" #include "board-rx51.h" @@ -52,8 +50,11 @@ #endif #include "mux.h" +#include "omap-pm.h" #include "hsmmc.h" #include "common-board-devices.h" +#include "gpmc.h" +#include "gpmc-onenand.h" #define SYSTEM_REV_B_USES_VAUX3 0x1699 #define SYSTEM_REV_S_USES_VAUX3 0x8 diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 7bbb05d9689b..c388aec14799 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -17,18 +17,18 @@ #include <linux/io.h> #include <linux/gpio.h> #include <linux/leds.h> +#include <linux/usb/musb.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include "common.h" -#include <plat/dma.h> -#include <plat/gpmc.h> -#include <plat/usb.h> +#include <plat-omap/dma-omap.h> +#include "common.h" #include "mux.h" +#include "gpmc.h" #include "pm.h" #include "sdram-nokia.h" diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index c4f8833b4c3c..5e672c2b6a43 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -14,13 +14,14 @@ */ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/usb/musb.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include "common.h" -#include <plat/usb.h> static struct omap_musb_board_data musb_board_data = { .set_phy_power = ti81xx_musb_phy_power, diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index afb2278a29f6..42e5f231a799 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c @@ -17,10 +17,10 @@ #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> -#include <plat/gpmc.h> +#include "gpmc.h" #include "gpmc-smsc911x.h" -#include <mach/board-zoom.h> +#include "board-zoom.h" #include "soc.h" #include "common.h" diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c index b940ab2259fb..1c7c834a5b5f 100644 --- a/arch/arm/mach-omap2/board-zoom-display.c +++ b/arch/arm/mach-omap2/board-zoom-display.c @@ -16,8 +16,9 @@ #include <linux/spi/spi.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include <video/omapdss.h> -#include <mach/board-zoom.h> +#include "board-zoom.h" +#include "soc.h" #include "common.h" #define LCD_PANEL_RESET_GPIO_PROD 96 diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index c166fe1fdff9..26e07addc9d7 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -26,9 +26,8 @@ #include <asm/mach/map.h> #include "common.h" -#include <plat/usb.h> -#include <mach/board-zoom.h> +#include "board-zoom.h" #include "mux.h" #include "hsmmc.h" diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 4994438e1f46..8feb4d99b96d 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -22,9 +22,8 @@ #include <asm/mach/arch.h> #include "common.h" -#include <plat/usb.h> -#include <mach/board-zoom.h> +#include "board-zoom.h" #include "board-flash.h" #include "mux.h" @@ -113,8 +112,9 @@ static void __init omap_zoom_init(void) usbhs_init(&usbhs_bdata); } - board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions), - ZOOM_NAND_CS, NAND_BUSWIDTH_16); + board_nand_init(zoom_nand_partitions, + ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS, + NAND_BUSWIDTH_16, nand_default_timings); zoom_debugboard_init(); zoom_peripherals_init(); diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h b/arch/arm/mach-omap2/board-zoom.h index 2e9486940ead..2e9486940ead 100644 --- a/arch/arm/mach-omap2/include/mach/board-zoom.h +++ b/arch/arm/mach-omap2/board-zoom.h diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c index c2d15212d64d..e3f0c1e262a7 100644 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ b/arch/arm/mach-omap2/clkt2xxx_apll.c @@ -21,12 +21,11 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> #include <plat/prcm.h> #include "clock.h" #include "clock2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */ diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c index 1502a7bc20bb..399534c7843b 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpll.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c @@ -14,10 +14,8 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "clock.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" /* Private functions */ diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c index 4ae439222085..0d2f14c2dcce 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c @@ -25,15 +25,13 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/sdrc.h> - #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" #include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" +#include "sdrc.h" +#include "sram.h" /* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */ diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c index c3460928b5e0..e1777371bb5e 100644 --- a/arch/arm/mach-omap2/clkt2xxx_osc.c +++ b/arch/arm/mach-omap2/clkt2xxx_osc.c @@ -23,8 +23,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "clock.h" #include "clock2xxx.h" #include "prm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c index 8693cfdac49a..46683b3c2461 100644 --- a/arch/arm/mach-omap2/clkt2xxx_sys.c +++ b/arch/arm/mach-omap2/clkt2xxx_sys.c @@ -22,8 +22,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "clock.h" #include "clock2xxx.h" #include "prm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 3524f0e7b6d5..a38ebb209721 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -33,16 +33,14 @@ #include <linux/cpufreq.h> #include <linux/slab.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/sdrc.h> - #include "soc.h" #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" #include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" +#include "sdrc.h" +#include "sram.h" const struct prcm_config *curr_prcm_set; const struct prcm_config *rate_table; diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c index 7c6da2f731dc..6cf298e262f6 100644 --- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c +++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c @@ -21,14 +21,11 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/sdrc.h> - #include "clock.h" #include "clock3xxx.h" #include "clock34xx.h" #include "sdrc.h" +#include "sram.h" #define CYCLES_PER_MHZ 1000000 diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c index 3ff22114d702..53646facda45 100644 --- a/arch/arm/mach-omap2/clkt_clksel.c +++ b/arch/arm/mach-omap2/clkt_clksel.c @@ -45,8 +45,6 @@ #include <linux/io.h> #include <linux/bug.h> -#include <plat/clock.h> - #include "clock.h" /* Private functions */ diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index 80411142f482..8463cc356245 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -21,8 +21,6 @@ #include <asm/div64.h> -#include <plat/clock.h> - #include "soc.h" #include "clock.h" #include "cm-regbits-24xx.h" diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c index 3d43fba2542f..7c8d41e49834 100644 --- a/arch/arm/mach-omap2/clkt_iclk.c +++ b/arch/arm/mach-omap2/clkt_iclk.c @@ -14,7 +14,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> #include <plat/prcm.h> #include "clock.h" diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 961ac8f7e13d..9205ea7d8dde 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -15,6 +15,7 @@ #undef DEBUG #include <linux/kernel.h> +#include <linux/export.h> #include <linux/list.h> #include <linux/errno.h> #include <linux/err.h> @@ -25,7 +26,6 @@ #include <asm/cpu.h> -#include <plat/clock.h> #include <plat/prcm.h> #include <trace/events/power.h> @@ -33,7 +33,8 @@ #include "soc.h" #include "clockdomain.h" #include "clock.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" +#include "cm3xxx.h" #include "cm-regbits-24xx.h" #include "cm-regbits-34xx.h" @@ -47,6 +48,10 @@ u16 cpu_mask; */ static bool clkdm_control = true; +static LIST_HEAD(clocks); +static DEFINE_MUTEX(clocks_mutex); +static DEFINE_SPINLOCK(clockfw_lock); + /* * OMAP2+ specific clock functions */ @@ -512,12 +517,510 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name, /* Common data */ -struct clk_functions omap2_clk_functions = { - .clk_enable = omap2_clk_enable, - .clk_disable = omap2_clk_disable, - .clk_round_rate = omap2_clk_round_rate, - .clk_set_rate = omap2_clk_set_rate, - .clk_set_parent = omap2_clk_set_parent, - .clk_disable_unused = omap2_clk_disable_unused, +int clk_enable(struct clk *clk) +{ + unsigned long flags; + int ret; + + if (clk == NULL || IS_ERR(clk)) + return -EINVAL; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = omap2_clk_enable(clk); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + unsigned long flags; + + if (clk == NULL || IS_ERR(clk)) + return; + + spin_lock_irqsave(&clockfw_lock, flags); + if (clk->usecount == 0) { + pr_err("Trying disable clock %s with 0 usecount\n", + clk->name); + WARN_ON(1); + goto out; + } + + omap2_clk_disable(clk); + +out: + spin_unlock_irqrestore(&clockfw_lock, flags); +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + unsigned long flags; + unsigned long ret; + + if (clk == NULL || IS_ERR(clk)) + return 0; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = clk->rate; + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_get_rate); + +/* + * Optional clock functions defined in include/linux/clk.h + */ + +long clk_round_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + long ret; + + if (clk == NULL || IS_ERR(clk)) + return 0; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = omap2_clk_round_rate(clk, rate); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk == NULL || IS_ERR(clk)) + return ret; + + spin_lock_irqsave(&clockfw_lock, flags); + ret = omap2_clk_set_rate(clk, rate); + if (ret == 0) + propagate_rate(clk); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); + +int clk_set_parent(struct clk *clk, struct clk *parent) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent)) + return ret; + + spin_lock_irqsave(&clockfw_lock, flags); + if (clk->usecount == 0) { + ret = omap2_clk_set_parent(clk, parent); + if (ret == 0) + propagate_rate(clk); + } else { + ret = -EBUSY; + } + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; +} +EXPORT_SYMBOL(clk_set_parent); + +struct clk *clk_get_parent(struct clk *clk) +{ + return clk->parent; +} +EXPORT_SYMBOL(clk_get_parent); + +/* + * OMAP specific clock functions shared between omap1 and omap2 + */ + +int __initdata mpurate; + +/* + * By default we use the rate set by the bootloader. + * You can override this with mpurate= cmdline option. + */ +static int __init omap_clk_setup(char *str) +{ + get_option(&str, &mpurate); + + if (!mpurate) + return 1; + + if (mpurate < 1000) + mpurate *= 1000000; + + return 1; +} +__setup("mpurate=", omap_clk_setup); + +/* Used for clocks that always have same value as the parent clock */ +unsigned long followparent_recalc(struct clk *clk) +{ + return clk->parent->rate; +} + +/* + * Used for clocks that have the same value as the parent clock, + * divided by some factor + */ +unsigned long omap_fixed_divisor_recalc(struct clk *clk) +{ + WARN_ON(!clk->fixed_div); + + return clk->parent->rate / clk->fixed_div; +} + +void clk_reparent(struct clk *child, struct clk *parent) +{ + list_del_init(&child->sibling); + if (parent) + list_add(&child->sibling, &parent->children); + child->parent = parent; + + /* now do the debugfs renaming to reattach the child + to the proper parent */ +} + +/* Propagate rate to children */ +void propagate_rate(struct clk *tclk) +{ + struct clk *clkp; + + list_for_each_entry(clkp, &tclk->children, sibling) { + if (clkp->recalc) + clkp->rate = clkp->recalc(clkp); + propagate_rate(clkp); + } +} + +static LIST_HEAD(root_clks); + +/** + * recalculate_root_clocks - recalculate and propagate all root clocks + * + * Recalculates all root clocks (clocks with no parent), which if the + * clock's .recalc is set correctly, should also propagate their rates. + * Called at init. + */ +void recalculate_root_clocks(void) +{ + struct clk *clkp; + + list_for_each_entry(clkp, &root_clks, sibling) { + if (clkp->recalc) + clkp->rate = clkp->recalc(clkp); + propagate_rate(clkp); + } +} + +/** + * clk_preinit - initialize any fields in the struct clk before clk init + * @clk: struct clk * to initialize + * + * Initialize any struct clk fields needed before normal clk initialization + * can run. No return value. + */ +void clk_preinit(struct clk *clk) +{ + INIT_LIST_HEAD(&clk->children); +} + +int clk_register(struct clk *clk) +{ + if (clk == NULL || IS_ERR(clk)) + return -EINVAL; + + /* + * trap out already registered clocks + */ + if (clk->node.next || clk->node.prev) + return 0; + + mutex_lock(&clocks_mutex); + if (clk->parent) + list_add(&clk->sibling, &clk->parent->children); + else + list_add(&clk->sibling, &root_clks); + + list_add(&clk->node, &clocks); + if (clk->init) + clk->init(clk); + mutex_unlock(&clocks_mutex); + + return 0; +} +EXPORT_SYMBOL(clk_register); + +void clk_unregister(struct clk *clk) +{ + if (clk == NULL || IS_ERR(clk)) + return; + + mutex_lock(&clocks_mutex); + list_del(&clk->sibling); + list_del(&clk->node); + mutex_unlock(&clocks_mutex); +} +EXPORT_SYMBOL(clk_unregister); + +void clk_enable_init_clocks(void) +{ + struct clk *clkp; + + list_for_each_entry(clkp, &clocks, node) + if (clkp->flags & ENABLE_ON_INIT) + clk_enable(clkp); +} + +/** + * omap_clk_get_by_name - locate OMAP struct clk by its name + * @name: name of the struct clk to locate + * + * Locate an OMAP struct clk by its name. Assumes that struct clk + * names are unique. Returns NULL if not found or a pointer to the + * struct clk if found. + */ +struct clk *omap_clk_get_by_name(const char *name) +{ + struct clk *c; + struct clk *ret = NULL; + + mutex_lock(&clocks_mutex); + + list_for_each_entry(c, &clocks, node) { + if (!strcmp(c->name, name)) { + ret = c; + break; + } + } + + mutex_unlock(&clocks_mutex); + + return ret; +} + +int omap_clk_enable_autoidle_all(void) +{ + struct clk *c; + unsigned long flags; + + spin_lock_irqsave(&clockfw_lock, flags); + + list_for_each_entry(c, &clocks, node) + if (c->ops->allow_idle) + c->ops->allow_idle(c); + + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} + +int omap_clk_disable_autoidle_all(void) +{ + struct clk *c; + unsigned long flags; + + spin_lock_irqsave(&clockfw_lock, flags); + + list_for_each_entry(c, &clocks, node) + if (c->ops->deny_idle) + c->ops->deny_idle(c); + + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} + +/* + * Low level helpers + */ +static int clkll_enable_null(struct clk *clk) +{ + return 0; +} + +static void clkll_disable_null(struct clk *clk) +{ +} + +const struct clkops clkops_null = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, +}; + +/* + * Dummy clock + * + * Used for clock aliases that are needed on some OMAPs, but not others + */ +struct clk dummy_ck = { + .name = "dummy", + .ops = &clkops_null, +}; + +/* + * + */ + +#ifdef CONFIG_OMAP_RESET_CLOCKS +/* + * Disable any unused clocks left on by the bootloader + */ +static int __init clk_disable_unused(void) +{ + struct clk *ck; + unsigned long flags; + + pr_info("clock: disabling unused clocks to save power\n"); + + spin_lock_irqsave(&clockfw_lock, flags); + list_for_each_entry(ck, &clocks, node) { + if (ck->ops == &clkops_null) + continue; + + if (ck->usecount > 0 || !ck->enable_reg) + continue; + + omap2_clk_disable_unused(ck); + } + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} +late_initcall(clk_disable_unused); +late_initcall(omap_clk_enable_autoidle_all); +#endif + +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) +/* + * debugfs support to trace clock tree hierarchy and attributes + */ + +#include <linux/debugfs.h> +#include <linux/seq_file.h> + +static struct dentry *clk_debugfs_root; + +static int clk_dbg_show_summary(struct seq_file *s, void *unused) +{ + struct clk *c; + struct clk *pa; + + mutex_lock(&clocks_mutex); + seq_printf(s, "%-30s %-30s %-10s %s\n", + "clock-name", "parent-name", "rate", "use-count"); + + list_for_each_entry(c, &clocks, node) { + pa = c->parent; + seq_printf(s, "%-30s %-30s %-10lu %d\n", + c->name, pa ? pa->name : "none", c->rate, + c->usecount); + } + mutex_unlock(&clocks_mutex); + + return 0; +} + +static int clk_dbg_open(struct inode *inode, struct file *file) +{ + return single_open(file, clk_dbg_show_summary, inode->i_private); +} + +static const struct file_operations debug_clock_fops = { + .open = clk_dbg_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, }; +static int clk_debugfs_register_one(struct clk *c) +{ + int err; + struct dentry *d; + struct clk *pa = c->parent; + + d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); + if (!d) + return -ENOMEM; + c->dent = d; + + d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); + if (!d) { + err = -ENOMEM; + goto err_out; + } + d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); + if (!d) { + err = -ENOMEM; + goto err_out; + } + d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); + if (!d) { + err = -ENOMEM; + goto err_out; + } + return 0; + +err_out: + debugfs_remove_recursive(c->dent); + return err; +} + +static int clk_debugfs_register(struct clk *c) +{ + int err; + struct clk *pa = c->parent; + + if (pa && !pa->dent) { + err = clk_debugfs_register(pa); + if (err) + return err; + } + + if (!c->dent) { + err = clk_debugfs_register_one(c); + if (err) + return err; + } + return 0; +} + +static int __init clk_debugfs_init(void) +{ + struct clk *c; + struct dentry *d; + int err; + + d = debugfs_create_dir("clock", NULL); + if (!d) + return -ENOMEM; + clk_debugfs_root = d; + + list_for_each_entry(c, &clocks, node) { + err = clk_debugfs_register(c); + if (err) + goto err_out; + } + + d = debugfs_create_file("summary", S_IRUGO, + d, NULL, &debug_clock_fops); + if (!d) + return -ENOMEM; + + return 0; +err_out: + debugfs_remove_recursive(clk_debugfs_root); + return err; +} +late_initcall(clk_debugfs_init); + +#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ + diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 35ec5f3d9a73..cfba1ffe5cc2 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -17,8 +17,323 @@ #define __ARCH_ARM_MACH_OMAP2_CLOCK_H #include <linux/kernel.h> +#include <linux/list.h> + +#include <linux/clkdev.h> + +struct omap_clk { + u16 cpu; + struct clk_lookup lk; +}; + +#define CLK(dev, con, ck, cp) \ + { \ + .cpu = cp, \ + .lk = { \ + .dev_id = dev, \ + .con_id = con, \ + .clk = ck, \ + }, \ + } + +/* Platform flags for the clkdev-OMAP integration code */ +#define CK_242X (1 << 0) +#define CK_243X (1 << 1) /* 243x, 253x */ +#define CK_3430ES1 (1 << 2) /* 34xxES1 only */ +#define CK_3430ES2PLUS (1 << 3) /* 34xxES2, ES3, non-Sitara 35xx only */ +#define CK_AM35XX (1 << 4) /* Sitara AM35xx */ +#define CK_36XX (1 << 5) /* 36xx/37xx-specific clocks */ +#define CK_443X (1 << 6) +#define CK_TI816X (1 << 7) +#define CK_446X (1 << 8) +#define CK_AM33XX (1 << 9) /* AM33xx specific clocks */ + + +#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) +#define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX) + +struct module; +struct clk; +struct clockdomain; + +/* Temporary, needed during the common clock framework conversion */ +#define __clk_get_name(clk) (clk->name) +#define __clk_get_parent(clk) (clk->parent) +#define __clk_get_rate(clk) (clk->rate) + +/** + * struct clkops - some clock function pointers + * @enable: fn ptr that enables the current clock in hardware + * @disable: fn ptr that enables the current clock in hardware + * @find_idlest: function returning the IDLEST register for the clock's IP blk + * @find_companion: function returning the "companion" clk reg for the clock + * @allow_idle: fn ptr that enables autoidle for the current clock in hardware + * @deny_idle: fn ptr that disables autoidle for the current clock in hardware + * + * A "companion" clk is an accompanying clock to the one being queried + * that must be enabled for the IP module connected to the clock to + * become accessible by the hardware. Neither @find_idlest nor + * @find_companion should be needed; that information is IP + * block-specific; the hwmod code has been created to handle this, but + * until hwmod data is ready and drivers have been converted to use PM + * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and + * @find_companion must, unfortunately, remain. + */ +struct clkops { + int (*enable)(struct clk *); + void (*disable)(struct clk *); + void (*find_idlest)(struct clk *, void __iomem **, + u8 *, u8 *); + void (*find_companion)(struct clk *, void __iomem **, + u8 *); + void (*allow_idle)(struct clk *); + void (*deny_idle)(struct clk *); +}; + +/* struct clksel_rate.flags possibilities */ +#define RATE_IN_242X (1 << 0) +#define RATE_IN_243X (1 << 1) +#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */ +#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */ +#define RATE_IN_36XX (1 << 4) +#define RATE_IN_4430 (1 << 5) +#define RATE_IN_TI816X (1 << 6) +#define RATE_IN_4460 (1 << 7) +#define RATE_IN_AM33XX (1 << 8) +#define RATE_IN_TI814X (1 << 9) + +#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) +#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) +#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX) +#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460) + +/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */ +#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX) + + +/** + * struct clksel_rate - register bitfield values corresponding to clk divisors + * @val: register bitfield value (shifted to bit 0) + * @div: clock divisor corresponding to @val + * @flags: (see "struct clksel_rate.flags possibilities" above) + * + * @val should match the value of a read from struct clk.clksel_reg + * AND'ed with struct clk.clksel_mask, shifted right to bit 0. + * + * @div is the divisor that should be applied to the parent clock's rate + * to produce the current clock's rate. + */ +struct clksel_rate { + u32 val; + u8 div; + u16 flags; +}; + +/** + * struct clksel - available parent clocks, and a pointer to their divisors + * @parent: struct clk * to a possible parent clock + * @rates: available divisors for this parent clock + * + * A struct clksel is always associated with one or more struct clks + * and one or more struct clksel_rates. + */ +struct clksel { + struct clk *parent; + const struct clksel_rate *rates; +}; + +/** + * struct dpll_data - DPLL registers and integration data + * @mult_div1_reg: register containing the DPLL M and N bitfields + * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg + * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg + * @clk_bypass: struct clk pointer to the clock's bypass clock input + * @clk_ref: struct clk pointer to the clock's reference clock input + * @control_reg: register containing the DPLL mode bitfield + * @enable_mask: mask of the DPLL mode bitfield in @control_reg + * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() + * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate() + * @max_multiplier: maximum valid non-bypass multiplier value (actual) + * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate() + * @min_divider: minimum valid non-bypass divider value (actual) + * @max_divider: maximum valid non-bypass divider value (actual) + * @modes: possible values of @enable_mask + * @autoidle_reg: register containing the DPLL autoidle mode bitfield + * @idlest_reg: register containing the DPLL idle status bitfield + * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg + * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg + * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg + * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg + * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs + * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs + * @flags: DPLL type/features (see below) + * + * Possible values for @flags: + * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs) + * + * @freqsel_mask is only used on the OMAP34xx family and AM35xx. + * + * XXX Some DPLLs have multiple bypass inputs, so it's not technically + * correct to only have one @clk_bypass pointer. + * + * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m, + * @last_rounded_n) should be separated from the runtime-fixed fields + * and placed into a different structure, so that the runtime-fixed data + * can be placed into read-only space. + */ +struct dpll_data { + void __iomem *mult_div1_reg; + u32 mult_mask; + u32 div1_mask; + struct clk *clk_bypass; + struct clk *clk_ref; + void __iomem *control_reg; + u32 enable_mask; + unsigned long last_rounded_rate; + u16 last_rounded_m; + u16 max_multiplier; + u8 last_rounded_n; + u8 min_divider; + u16 max_divider; + u8 modes; + void __iomem *autoidle_reg; + void __iomem *idlest_reg; + u32 autoidle_mask; + u32 freqsel_mask; + u32 idlest_mask; + u32 dco_mask; + u32 sddiv_mask; + u8 auto_recal_bit; + u8 recal_en_bit; + u8 recal_st_bit; + u8 flags; +}; + +/* + * struct clk.flags possibilities + * + * XXX document the rest of the clock flags here + * + * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL + * bits share the same register. This flag allows the + * omap4_dpllmx*() code to determine which GATE_CTRL bit field + * should be used. This is a temporary solution - a better approach + * would be to associate clock type-specific data with the clock, + * similar to the struct dpll_data approach. + */ +#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ +#define CLOCK_IDLE_CONTROL (1 << 1) +#define CLOCK_NO_IDLE_PARENT (1 << 2) +#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ +#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ +#define CLOCK_CLKOUTX2 (1 << 5) + +/** + * struct clk - OMAP struct clk + * @node: list_head connecting this clock into the full clock list + * @ops: struct clkops * for this clock + * @name: the name of the clock in the hardware (used in hwmod data and debug) + * @parent: pointer to this clock's parent struct clk + * @children: list_head connecting to the child clks' @sibling list_heads + * @sibling: list_head connecting this clk to its parent clk's @children + * @rate: current clock rate + * @enable_reg: register to write to enable the clock (see @enable_bit) + * @recalc: fn ptr that returns the clock's current rate + * @set_rate: fn ptr that can change the clock's current rate + * @round_rate: fn ptr that can round the clock's current rate + * @init: fn ptr to do clock-specific initialization + * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) + * @usecount: number of users that have requested this clock to be enabled + * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div + * @flags: see "struct clk.flags possibilities" above + * @clksel_reg: for clksel clks, register va containing src/divisor select + * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector + * @clksel: for clksel clks, pointer to struct clksel for this clock + * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock + * @clkdm_name: clockdomain name that this clock is contained in + * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime + * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) + * @src_offset: bitshift for source selection bitfield (OMAP1 only) + * + * XXX @rate_offset, @src_offset should probably be removed and OMAP1 + * clock code converted to use clksel. + * + * XXX @usecount is poorly named. It should be "enable_count" or + * something similar. "users" in the description refers to kernel + * code (core code or drivers) that have called clk_enable() and not + * yet called clk_disable(); the usecount of parent clocks is also + * incremented by the clock code when clk_enable() is called on child + * clocks and decremented by the clock code when clk_disable() is + * called on child clocks. + * + * XXX @clkdm, @usecount, @children, @sibling should be marked for + * internal use only. + * + * @children and @sibling are used to optimize parent-to-child clock + * tree traversals. (child-to-parent traversals use @parent.) + * + * XXX The notion of the clock's current rate probably needs to be + * separated from the clock's target rate. + */ +struct clk { + struct list_head node; + const struct clkops *ops; + const char *name; + struct clk *parent; + struct list_head children; + struct list_head sibling; /* node for children */ + unsigned long rate; + void __iomem *enable_reg; + unsigned long (*recalc)(struct clk *); + int (*set_rate)(struct clk *, unsigned long); + long (*round_rate)(struct clk *, unsigned long); + void (*init)(struct clk *); + u8 enable_bit; + s8 usecount; + u8 fixed_div; + u8 flags; + void __iomem *clksel_reg; + u32 clksel_mask; + const struct clksel *clksel; + struct dpll_data *dpll_data; + const char *clkdm_name; + struct clockdomain *clkdm; +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) + struct dentry *dent; /* For visible tree hierarchy */ +#endif +}; + +struct clk_functions { + int (*clk_enable)(struct clk *clk); + void (*clk_disable)(struct clk *clk); + long (*clk_round_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_parent)(struct clk *clk, struct clk *parent); + void (*clk_allow_idle)(struct clk *clk); + void (*clk_deny_idle)(struct clk *clk); + void (*clk_disable_unused)(struct clk *clk); +}; + +extern int mpurate; + +extern int clk_init(struct clk_functions *custom_clocks); +extern void clk_preinit(struct clk *clk); +extern int clk_register(struct clk *clk); +extern void clk_reparent(struct clk *child, struct clk *parent); +extern void clk_unregister(struct clk *clk); +extern void propagate_rate(struct clk *clk); +extern void recalculate_root_clocks(void); +extern unsigned long followparent_recalc(struct clk *clk); +extern void clk_enable_init_clocks(void); +unsigned long omap_fixed_divisor_recalc(struct clk *clk); +extern struct clk *omap_clk_get_by_name(const char *name); +extern int omap_clk_enable_autoidle_all(void); +extern int omap_clk_disable_autoidle_all(void); + +extern const struct clkops clkops_null; + +extern struct clk dummy_ck; -#include <plat/clock.h> /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ #define CORE_CLK_SRC_32K 0x0 diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index c3cde1a2b6de..da1e388f22f7 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -18,14 +18,12 @@ #include <linux/clk.h> #include <linux/list.h> -#include <plat/clkdev_omap.h> - #include "soc.h" #include "iomap.h" #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" @@ -1935,8 +1933,6 @@ int __init omap2420_clk_init(void) cpu_mask = RATE_IN_242X; rate_table = omap2420_rate_table; - clk_init(&omap2_clk_functions); - for (c = omap2420_clks; c < omap2420_clks + ARRAY_SIZE(omap2420_clks); c++) clk_preinit(c->lk.clk); diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c index a8e326177466..e37df538bcd3 100644 --- a/arch/arm/mach-omap2/clock2430.c +++ b/arch/arm/mach-omap2/clock2430.c @@ -21,13 +21,11 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "soc.h" #include "iomap.h" #include "clock.h" #include "clock2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" /** diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 22404fe435e7..c97dafef894d 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -17,14 +17,12 @@ #include <linux/clk.h> #include <linux/list.h> -#include <plat/clkdev_omap.h> - #include "soc.h" #include "iomap.h" #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" @@ -2034,8 +2032,6 @@ int __init omap2430_clk_init(void) cpu_mask = RATE_IN_243X; rate_table = omap2430_rate_table; - clk_init(&omap2_clk_functions); - for (c = omap2430_clks; c < omap2430_clks + ARRAY_SIZE(omap2430_clks); c++) clk_preinit(c->lk.clk); diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index e92be1fc1a00..5feee16fee0e 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c @@ -22,8 +22,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "soc.h" #include "clock.h" #include "clock2xxx.h" diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c index 114ab4b8e0e3..17e3de51bcba 100644 --- a/arch/arm/mach-omap2/clock33xx_data.c +++ b/arch/arm/mach-omap2/clock33xx_data.c @@ -17,9 +17,8 @@ #include <linux/kernel.h> #include <linux/list.h> #include <linux/clk.h> -#include <plat/clkdev_omap.h> -#include "am33xx.h" +#include "soc.h" #include "iomap.h" #include "control.h" #include "clock.h" @@ -1073,6 +1072,8 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX), CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX), CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX), + CLK(NULL, "timer_32k_ck", &clkdiv32k_ick, CK_AM33XX), + CLK(NULL, "timer_sys_ck", &sys_clkin_ck, CK_AM33XX), }; int __init am33xx_clk_init(void) @@ -1085,8 +1086,6 @@ int __init am33xx_clk_init(void) cpu_clkflg = CK_AM33XX; } - clk_init(&omap2_clk_functions); - for (c = am33xx_clks; c < am33xx_clks + ARRAY_SIZE(am33xx_clks); c++) clk_preinit(c->lk.clk); diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 1fc96b9ee330..e41819ba7482 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -21,11 +21,9 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "clock.h" #include "clock34xx.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" /** diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c index 2e97d08f0e56..622ea0502610 100644 --- a/arch/arm/mach-omap2/clock3517.c +++ b/arch/arm/mach-omap2/clock3517.c @@ -21,11 +21,9 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "clock.h" #include "clock3517.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" /* diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c index 0c5e25ed8879..0e1e9e4e2fa4 100644 --- a/arch/arm/mach-omap2/clock36xx.c +++ b/arch/arm/mach-omap2/clock36xx.c @@ -22,8 +22,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "clock.h" #include "clock36xx.h" diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index 83bb01427d40..3e8aca2b1b61 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c @@ -21,8 +21,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> - #include "soc.h" #include "clock.h" #include "clock3xxx.h" diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 1f42c9d5ecf3..6cca19953950 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -21,8 +21,6 @@ #include <linux/list.h> #include <linux/io.h> -#include <plat/clkdev_omap.h> - #include "soc.h" #include "iomap.h" #include "clock.h" @@ -30,7 +28,7 @@ #include "clock34xx.h" #include "clock36xx.h" #include "clock3517.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-34xx.h" @@ -3573,8 +3571,6 @@ int __init omap3xxx_clk_init(void) else dpll4_dd = dpll4_dd_34xx; - clk_init(&omap2_clk_functions); - for (c = omap3xxx_clks; c < omap3xxx_clks + ARRAY_SIZE(omap3xxx_clks); c++) clk_preinit(c->lk.clk); diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index d661d138f270..2a450c9b9a7b 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -28,8 +28,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clkdev_omap.h> - #include "soc.h" #include "iomap.h" #include "clock.h" @@ -3294,7 +3292,7 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), - CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), + CLK("omap-gpmc", "fck", &dummy_ck, CK_443X), CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), @@ -3366,8 +3364,6 @@ int __init omap4xxx_clk_init(void) return 0; } - clk_init(&omap2_clk_functions); - /* * Must stay commented until all OMAP SoC drivers are * converted to runtime PM, or drivers may start crashing diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index cbb879139c51..64e50465a4b5 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -27,7 +27,8 @@ #include <linux/bitops.h> -#include <plat/clock.h> +#include "soc.h" +#include "clock.h" #include "clockdomain.h" /* clkdm_list contains all registered struct clockdomains */ @@ -925,15 +926,18 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) return -EINVAL; + spin_lock_irqsave(&clkdm->lock, flags); + /* * For arch's with no autodeps, clkcm_clk_enable * should be called for every clock instance or hwmod that is * enabled, so the clkdm can be force woken up. */ - if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) + if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) { + spin_unlock_irqrestore(&clkdm->lock, flags); return 0; + } - spin_lock_irqsave(&clkdm->lock, flags); arch_clkdm->clkdm_clk_enable(clkdm); pwrdm_state_switch(clkdm->pwrdm.ptr); spin_unlock_irqrestore(&clkdm->lock, flags); @@ -950,15 +954,19 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) return -EINVAL; + spin_lock_irqsave(&clkdm->lock, flags); + if (atomic_read(&clkdm->usecount) == 0) { + spin_unlock_irqrestore(&clkdm->lock, flags); WARN_ON(1); /* underflow */ return -ERANGE; } - if (atomic_dec_return(&clkdm->usecount) > 0) + if (atomic_dec_return(&clkdm->usecount) > 0) { + spin_unlock_irqrestore(&clkdm->lock, flags); return 0; + } - spin_lock_irqsave(&clkdm->lock, flags); arch_clkdm->clkdm_clk_disable(clkdm); pwrdm_state_switch(clkdm->pwrdm.ptr); spin_unlock_irqrestore(&clkdm->lock, flags); diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 629576be7444..bc42446e23ab 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -18,9 +18,8 @@ #include <linux/spinlock.h> #include "powerdomain.h" -#include <plat/clock.h> -#include <plat/omap_hwmod.h> -#include <plat/cpu.h> +#include "clock.h" +#include "omap_hwmod.h" /* * Clockdomain flags diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c deleted file mode 100644 index 70294f54e35a..000000000000 --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c +++ /dev/null @@ -1,339 +0,0 @@ -/* - * OMAP2 and OMAP3 clockdomain control - * - * Copyright (C) 2008-2010 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation - * - * Derived from mach-omap2/clockdomain.c written by Paul Walmsley - * Rajendra Nayak <rnayak@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <plat/prcm.h> -#include "prm.h" -#include "prm2xxx_3xxx.h" -#include "cm.h" -#include "cm2xxx_3xxx.h" -#include "cm-regbits-24xx.h" -#include "cm-regbits-34xx.h" -#include "prm-regbits-24xx.h" -#include "clockdomain.h" - -static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); - return 0; -} - -static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); - return 0; -} - -static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, - PM_WKDEP, (1 << clkdm2->dep_bit)); -} - -static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->wkdep_usecount, 0); - } - - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, - PM_WKDEP); - return 0; -} - -static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit)); -} - -static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->sleepdep_usecount, 0); - } - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap2_clkdm_sleep(struct clockdomain *clkdm) -{ - omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, - clkdm->pwrdm.ptr->prcm_offs, - OMAP2_PM_PWSTCTRL); - return 0; -} - -static int omap2_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, - clkdm->pwrdm.ptr->prcm_offs, - OMAP2_PM_PWSTCTRL); - return 0; -} - -static void omap2_clkdm_allow_idle(struct clockdomain *clkdm) -{ - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_add_autodeps(clkdm); - - omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void omap2_clkdm_deny_idle(struct clockdomain *clkdm) -{ - omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_del_autodeps(clkdm); -} - -static void _enable_hwsup(struct clockdomain *clkdm) -{ - if (cpu_is_omap24xx()) - omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - else if (cpu_is_omap34xx()) - omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void _disable_hwsup(struct clockdomain *clkdm) -{ - if (cpu_is_omap24xx()) - omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - else if (cpu_is_omap34xx()) - omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static int omap3_clkdm_sleep(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - return 0; -} - -static int omap3_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - return 0; -} - -static int omap2_clkdm_clk_enable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_add_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap2_clkdm_wakeup(clkdm); - } - - return 0; -} - -static int omap2_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_del_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) - omap2_clkdm_sleep(clkdm); - } - - return 0; -} - -static void omap3_clkdm_allow_idle(struct clockdomain *clkdm) -{ - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_add_autodeps(clkdm); - - omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void omap3_clkdm_deny_idle(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_del_autodeps(clkdm); -} - -static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) && - (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { - omap3_clkdm_wakeup(clkdm); - return 0; - } - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_add_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap3_clkdm_wakeup(clkdm); - } - - return 0; -} - -static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && - !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { - _enable_hwsup(clkdm); - return 0; - } - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_del_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) - omap3_clkdm_sleep(clkdm); - } - - return 0; -} - -struct clkdm_ops omap2_clkdm_operations = { - .clkdm_add_wkdep = omap2_clkdm_add_wkdep, - .clkdm_del_wkdep = omap2_clkdm_del_wkdep, - .clkdm_read_wkdep = omap2_clkdm_read_wkdep, - .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, - .clkdm_sleep = omap2_clkdm_sleep, - .clkdm_wakeup = omap2_clkdm_wakeup, - .clkdm_allow_idle = omap2_clkdm_allow_idle, - .clkdm_deny_idle = omap2_clkdm_deny_idle, - .clkdm_clk_enable = omap2_clkdm_clk_enable, - .clkdm_clk_disable = omap2_clkdm_clk_disable, -}; - -struct clkdm_ops omap3_clkdm_operations = { - .clkdm_add_wkdep = omap2_clkdm_add_wkdep, - .clkdm_del_wkdep = omap2_clkdm_del_wkdep, - .clkdm_read_wkdep = omap2_clkdm_read_wkdep, - .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, - .clkdm_add_sleepdep = omap3_clkdm_add_sleepdep, - .clkdm_del_sleepdep = omap3_clkdm_del_sleepdep, - .clkdm_read_sleepdep = omap3_clkdm_read_sleepdep, - .clkdm_clear_all_sleepdeps = omap3_clkdm_clear_all_sleepdeps, - .clkdm_sleep = omap3_clkdm_sleep, - .clkdm_wakeup = omap3_clkdm_wakeup, - .clkdm_allow_idle = omap3_clkdm_allow_idle, - .clkdm_deny_idle = omap3_clkdm_deny_idle, - .clkdm_clk_enable = omap3xxx_clkdm_clk_enable, - .clkdm_clk_disable = omap3xxx_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/clockdomain33xx.c b/arch/arm/mach-omap2/clockdomain33xx.c deleted file mode 100644 index aca6388fad76..000000000000 --- a/arch/arm/mach-omap2/clockdomain33xx.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * AM33XX clockdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath <hvaibhav@ti.com> - * - * Derived from mach-omap2/clockdomain44xx.c written by Rajendra Nayak - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/kernel.h> - -#include "clockdomain.h" -#include "cm33xx.h" - - -static int am33xx_clkdm_sleep(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static int am33xx_clkdm_wakeup(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - return am33xx_clkdm_wakeup(clkdm); - - return 0; -} - -static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) - am33xx_clkdm_sleep(clkdm); - - return 0; -} - -struct clkdm_ops am33xx_clkdm_operations = { - .clkdm_sleep = am33xx_clkdm_sleep, - .clkdm_wakeup = am33xx_clkdm_wakeup, - .clkdm_allow_idle = am33xx_clkdm_allow_idle, - .clkdm_deny_idle = am33xx_clkdm_deny_idle, - .clkdm_clk_enable = am33xx_clkdm_clk_enable, - .clkdm_clk_disable = am33xx_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c deleted file mode 100644 index 6fc6155625bc..000000000000 --- a/arch/arm/mach-omap2/clockdomain44xx.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * OMAP4 clockdomain control - * - * Copyright (C) 2008-2010 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation - * - * Derived from mach-omap2/clockdomain.c written by Paul Walmsley - * Rajendra Nayak <rnayak@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include "clockdomain.h" -#include "cminst44xx.h" -#include "cm44xx.h" - -static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit), - clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit), - clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP, - (1 << clkdm2->dep_bit)); -} - -static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - if (!clkdm->prcm_partition) - return 0; - - for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->wkdep_usecount, 0); - } - - omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_sleep(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static int omap4_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); -} - -static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap4_clkdm_wakeup(clkdm); - else - omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, - clkdm->clkdm_offs); -} - -static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - return omap4_clkdm_wakeup(clkdm); - - return 0; -} - -static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->prcm_partition) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && - !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { - omap4_clkdm_allow_idle(clkdm); - return 0; - } - - hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) - omap4_clkdm_sleep(clkdm); - - return 0; -} - -struct clkdm_ops omap4_clkdm_operations = { - .clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep, - .clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep, - .clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep, - .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps, - .clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep, - .clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep, - .clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep, - .clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps, - .clkdm_sleep = omap4_clkdm_sleep, - .clkdm_wakeup = omap4_clkdm_wakeup, - .clkdm_allow_idle = omap4_clkdm_allow_idle, - .clkdm_deny_idle = omap4_clkdm_deny_idle, - .clkdm_clk_enable = omap4_clkdm_clk_enable, - .clkdm_clk_disable = omap4_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c index 5c741852fac0..7e76becf3a4a 100644 --- a/arch/arm/mach-omap2/clockdomains2420_data.c +++ b/arch/arm/mach-omap2/clockdomains2420_data.c @@ -35,6 +35,7 @@ #include <linux/kernel.h> #include <linux/io.h> +#include "soc.h" #include "clockdomain.h" #include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c index f09617555e15..b923007e45d0 100644 --- a/arch/arm/mach-omap2/clockdomains2430_data.c +++ b/arch/arm/mach-omap2/clockdomains2430_data.c @@ -35,6 +35,7 @@ #include <linux/kernel.h> #include <linux/io.h> +#include "soc.h" #include "clockdomain.h" #include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c index 933a35cd124a..e6b91e552d3d 100644 --- a/arch/arm/mach-omap2/clockdomains3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c @@ -33,6 +33,7 @@ #include <linux/kernel.h> #include <linux/io.h> +#include "soc.h" #include "clockdomain.h" #include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index f24e3f7a2bbc..b3cee913dd67 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -33,4 +33,16 @@ */ #define MAX_MODULE_DISABLE_TIME 5000 +# ifndef __ASSEMBLER__ + +/** + * struct cm_ll_data - fn ptrs to per-SoC CM function implementations + */ +struct cm_ll_data {}; + +extern int cm_register(struct cm_ll_data *cld); +extern int cm_unregister(struct cm_ll_data *cld); + +# endif + #endif diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c new file mode 100644 index 000000000000..64165013daf9 --- /dev/null +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -0,0 +1,255 @@ +/* + * OMAP2xxx CM module functions + * + * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc. + * Paul Walmsley + * Rajendra Nayak <rnayak@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> + +#include "soc.h" +#include "iomap.h" +#include "common.h" +#include "prm2xxx.h" +#include "cm.h" +#include "cm2xxx.h" +#include "cm-regbits-24xx.h" +#include "clockdomain.h" + +/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */ +#define DPLL_AUTOIDLE_DISABLE 0x0 +#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP 0x3 + +/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */ +#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0 +#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3 + +static const u8 omap2xxx_cm_idlest_offs[] = { + CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4 +}; + +/* + * + */ + +static void _write_clktrctrl(u8 c, s16 module, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); + v &= ~mask; + v |= c << __ffs(mask); + omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); +} + +bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); + v &= mask; + v >>= __ffs(mask); + + return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; +} + +void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask); +} + +void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask); +} + +/* + * DPLL autoidle control + */ + +static void _omap2xxx_set_dpll_autoidle(u8 m) +{ + u32 v; + + v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); + v &= ~OMAP24XX_AUTO_DPLL_MASK; + v |= m << OMAP24XX_AUTO_DPLL_SHIFT; + omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); +} + +void omap2xxx_cm_set_dpll_disable_autoidle(void) +{ + _omap2xxx_set_dpll_autoidle(OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP); +} + +void omap2xxx_cm_set_dpll_auto_low_power_stop(void) +{ + _omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE); +} + +/* + * APLL autoidle control + */ + +static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); + v &= ~mask; + v |= m << __ffs(mask); + omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); +} + +void omap2xxx_cm_set_apll54_disable_autoidle(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, + OMAP24XX_AUTO_54M_MASK); +} + +void omap2xxx_cm_set_apll54_auto_low_power_stop(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, + OMAP24XX_AUTO_54M_MASK); +} + +void omap2xxx_cm_set_apll96_disable_autoidle(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, + OMAP24XX_AUTO_96M_MASK); +} + +void omap2xxx_cm_set_apll96_auto_low_power_stop(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, + OMAP24XX_AUTO_96M_MASK); +} + +/* + * + */ + +/** + * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset + * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) + * @idlest_shift: shift of the bit in the CM_IDLEST* register to check + * + * Wait for the PRCM to indicate that the module identified by + * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon + * success or -EBUSY if the module doesn't enable in time. + */ +int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) +{ + int ena = 0, i = 0; + u8 cm_idlest_reg; + u32 mask; + + if (!idlest_id || (idlest_id > ARRAY_SIZE(omap2xxx_cm_idlest_offs))) + return -EINVAL; + + cm_idlest_reg = omap2xxx_cm_idlest_offs[idlest_id - 1]; + + mask = 1 << idlest_shift; + ena = mask; + + omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & + mask) == ena), MAX_MODULE_READY_TIME, i); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; +} + +/* Clockdomain low-level functions */ + +static void omap2xxx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} + +static void omap2xxx_clkdm_deny_idle(struct clockdomain *clkdm) +{ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + +static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_add_autodeps(clkdm); + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap2xxx_clkdm_wakeup(clkdm); + } + + return 0; +} + +static int omap2xxx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_del_autodeps(clkdm); + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) + omap2xxx_clkdm_sleep(clkdm); + } + + return 0; +} + +struct clkdm_ops omap2_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, + .clkdm_sleep = omap2xxx_clkdm_sleep, + .clkdm_wakeup = omap2xxx_clkdm_wakeup, + .clkdm_allow_idle = omap2xxx_clkdm_allow_idle, + .clkdm_deny_idle = omap2xxx_clkdm_deny_idle, + .clkdm_clk_enable = omap2xxx_clkdm_clk_enable, + .clkdm_clk_disable = omap2xxx_clkdm_clk_disable, +}; + diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h new file mode 100644 index 000000000000..bce3c4be6d1f --- /dev/null +++ b/arch/arm/mach-omap2/cm2xxx.h @@ -0,0 +1,66 @@ +/* + * OMAP2xxx Clock Management (CM) register definitions + * + * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The CM hardware modules on the OMAP2/3 are quite similar to each + * other. The CM modules/instances on OMAP4 are quite different, so + * they are handled in a separate file. + */ +#ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_H +#define __ARCH_ASM_MACH_OMAP2_CM2XXX_H + +#include "prcm-common.h" +#include "cm2xxx_3xxx.h" + +#define OMAP2420_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) +#define OMAP2430_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) + +/* + * Module specific CM register offsets from CM_BASE + domain offset + * Use cm_{read,write}_mod_reg() with these registers. + * These register offsets generally appear in more than one PRCM submodule. + */ + +/* OMAP2-specific register offsets */ + +#define OMAP24XX_CM_FCLKEN2 0x0004 +#define OMAP24XX_CM_ICLKEN4 0x001c +#define OMAP24XX_CM_AUTOIDLE4 0x003c +#define OMAP24XX_CM_IDLEST4 0x002c + +/* CM_IDLEST bit field values to indicate deasserted IdleReq */ + +#define OMAP24XX_CM_IDLEST_VAL 0 + + +/* Clock management domain register get/set */ + +#ifndef __ASSEMBLER__ + +extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); + +extern void omap2xxx_cm_set_dpll_disable_autoidle(void); +extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); + +extern void omap2xxx_cm_set_apll54_disable_autoidle(void); +extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void); +extern void omap2xxx_cm_set_apll96_disable_autoidle(void); +extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); + +extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); +extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); + +#endif + +#endif diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h index 57b2f3c2fbf3..0e26bb1bf7e2 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h @@ -18,27 +18,6 @@ #include "prcm-common.h" -#define OMAP2420_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) -#define OMAP2430_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) -#define OMAP34XX_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) - - -/* - * OMAP3-specific global CM registers - * Use cm_{read,write}_reg() with these registers. - * These registers appear once per CM module. - */ - -#define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000) -#define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010) -#define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c) - -#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) - /* * Module specific CM register offsets from CM_BASE + domain offset * Use cm_{read,write}_mod_reg() with these registers. @@ -57,6 +36,7 @@ #define CM_IDLEST 0x0020 #define CM_IDLEST1 CM_IDLEST #define CM_IDLEST2 0x0024 +#define OMAP2430_CM_IDLEST3 0x0028 #define CM_AUTOIDLE 0x0030 #define CM_AUTOIDLE1 CM_AUTOIDLE #define CM_AUTOIDLE2 0x0034 @@ -66,70 +46,55 @@ #define CM_CLKSEL2 0x0044 #define OMAP2_CM_CLKSTCTRL 0x0048 -/* OMAP2-specific register offsets */ - -#define OMAP24XX_CM_FCLKEN2 0x0004 -#define OMAP24XX_CM_ICLKEN4 0x001c -#define OMAP24XX_CM_AUTOIDLE4 0x003c -#define OMAP24XX_CM_IDLEST4 0x002c - -#define OMAP2430_CM_IDLEST3 0x0028 - -/* OMAP3-specific register offsets */ - -#define OMAP3430_CM_CLKEN_PLL 0x0004 -#define OMAP3430ES2_CM_CLKEN2 0x0004 -#define OMAP3430ES2_CM_FCLKEN3 0x0008 -#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 -#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 -#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 -#define OMAP3430_CM_CLKSEL1 CM_CLKSEL -#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL -#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 -#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 -#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL -#define OMAP3430_CM_CLKSTST 0x004c -#define OMAP3430ES2_CM_CLKSEL4 0x004c -#define OMAP3430ES2_CM_CLKSEL5 0x0050 -#define OMAP3430_CM_CLKSEL2_EMU 0x0050 -#define OMAP3430_CM_CLKSEL3_EMU 0x0054 - +#ifndef __ASSEMBLER__ -/* CM_IDLEST bit field values to indicate deasserted IdleReq */ +#include <linux/io.h> -#define OMAP24XX_CM_IDLEST_VAL 0 -#define OMAP34XX_CM_IDLEST_VAL 1 +static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx) +{ + return __raw_readl(cm_base + module + idx); +} +static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + __raw_writel(val, cm_base + module + idx); +} -/* Clock management domain register get/set */ +/* Read-modify-write a register in a CM module. Caller must lock */ +static inline u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, + s16 idx) +{ + u32 v; -#ifndef __ASSEMBLER__ + v = omap2_cm_read_mod_reg(module, idx); + v &= ~mask; + v |= bits; + omap2_cm_write_mod_reg(v, module, idx); -extern u32 omap2_cm_read_mod_reg(s16 module, u16 idx); -extern void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx); -extern u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); + return v; +} -extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, - u8 idlest_shift); -extern u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); +/* Read a CM register, AND it, and shift the result down to bit 0 */ +static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; -extern bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask); -extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); -extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); + v = omap2_cm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); -extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); + return v; +} -extern void omap2xxx_cm_set_dpll_disable_autoidle(void); -extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); +static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx); +} -extern void omap2xxx_cm_set_apll54_disable_autoidle(void); -extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void); -extern void omap2xxx_cm_set_apll96_disable_autoidle(void); -extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); +static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); +} #endif @@ -147,10 +112,4 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); #define OMAP_ST_GFX_MASK (1 << 0) -/* Function prototypes */ -# ifndef __ASSEMBLER__ -extern void omap3_cm_save_context(void); -extern void omap3_cm_restore_context(void); -# endif - #endif diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index 13f56eafef03..058ce3c0873e 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -22,8 +22,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> - +#include "clockdomain.h" #include "cm.h" #include "cm33xx.h" #include "cm-regbits-34xx.h" @@ -311,3 +310,58 @@ void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs) v &= ~AM33XX_MODULEMODE_MASK; am33xx_cm_write_reg(v, inst, clkctrl_offs); } + +/* + * Clockdomain low-level functions + */ + +static int am33xx_clkdm_sleep(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static int am33xx_clkdm_wakeup(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); +} + +static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); +} + +static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + return am33xx_clkdm_wakeup(clkdm); + + return 0; +} + +static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); + + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + am33xx_clkdm_sleep(clkdm); + + return 0; +} + +struct clkdm_ops am33xx_clkdm_operations = { + .clkdm_sleep = am33xx_clkdm_sleep, + .clkdm_wakeup = am33xx_clkdm_wakeup, + .clkdm_allow_idle = am33xx_clkdm_allow_idle, + .clkdm_deny_idle = am33xx_clkdm_deny_idle, + .clkdm_clk_enable = am33xx_clkdm_clk_enable, + .clkdm_clk_disable = am33xx_clkdm_clk_disable, +}; diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index 7f07ab02a5b3..8b03ec2f4394 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -1,8 +1,10 @@ /* - * OMAP2/3 CM module functions + * OMAP3xxx CM module functions * * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc. * Paul Walmsley + * Rajendra Nayak <rnayak@ti.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -12,8 +14,6 @@ #include <linux/kernel.h> #include <linux/types.h> #include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/list.h> #include <linux/errno.h> #include <linux/err.h> #include <linux/io.h> @@ -21,56 +21,16 @@ #include "soc.h" #include "iomap.h" #include "common.h" +#include "prm2xxx_3xxx.h" #include "cm.h" -#include "cm2xxx_3xxx.h" -#include "cm-regbits-24xx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" +#include "clockdomain.h" -/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */ -#define DPLL_AUTOIDLE_DISABLE 0x0 -#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP 0x3 - -/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */ -#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0 -#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3 - -static const u8 cm_idlest_offs[] = { - CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4 +static const u8 omap3xxx_cm_idlest_offs[] = { + CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 }; -u32 omap2_cm_read_mod_reg(s16 module, u16 idx) -{ - return __raw_readl(cm_base + module + idx); -} - -void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - __raw_writel(val, cm_base + module + idx); -} - -/* Read-modify-write a register in a CM module. Caller must lock */ -u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) -{ - u32 v; - - v = omap2_cm_read_mod_reg(module, idx); - v &= ~mask; - v |= bits; - omap2_cm_write_mod_reg(v, module, idx); - - return v; -} - -u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx); -} - -u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); -} - /* * */ @@ -85,33 +45,15 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask) omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); } -bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask) +bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) { u32 v; - bool ret = 0; - - BUG_ON(!cpu_is_omap24xx() && !cpu_is_omap34xx()); v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); v &= mask; v >>= __ffs(mask); - if (cpu_is_omap24xx()) - ret = (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; - else - ret = (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; - - return ret; -} - -void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) -{ - _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask); -} - -void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) -{ - _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask); + return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; } void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) @@ -135,109 +77,209 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask) } /* - * DPLL autoidle control + * */ -static void _omap2xxx_set_dpll_autoidle(u8 m) +/** + * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset + * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) + * @idlest_shift: shift of the bit in the CM_IDLEST* register to check + * + * Wait for the PRCM to indicate that the module identified by + * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon + * success or -EBUSY if the module doesn't enable in time. + */ +int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) { - u32 v; + int ena = 0, i = 0; + u8 cm_idlest_reg; + u32 mask; + + if (!idlest_id || (idlest_id > ARRAY_SIZE(omap3xxx_cm_idlest_offs))) + return -EINVAL; + + cm_idlest_reg = omap3xxx_cm_idlest_offs[idlest_id - 1]; + + mask = 1 << idlest_shift; + ena = 0; + + omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & + mask) == ena), MAX_MODULE_READY_TIME, i); - v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); - v &= ~OMAP24XX_AUTO_DPLL_MASK; - v |= m << OMAP24XX_AUTO_DPLL_SHIFT; - omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } -void omap2xxx_cm_set_dpll_disable_autoidle(void) +/* Clockdomain low-level operations */ + +static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) { - _omap2xxx_set_dpll_autoidle(OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP); + omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; } -void omap2xxx_cm_set_dpll_auto_low_power_stop(void) +static int omap3xxx_clkdm_del_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) { - _omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE); + omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; } -/* - * APLL autoidle control - */ - -static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) +static int omap3xxx_clkdm_read_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) { - u32 v; - - v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); - v &= ~mask; - v |= m << __ffs(mask); - omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); + return omap2_cm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP, + (1 << clkdm2->dep_bit)); } -void omap2xxx_cm_set_apll54_disable_autoidle(void) +static int omap3xxx_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, - OMAP24XX_AUTO_54M_MASK); + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->sleepdep_usecount, 0); + } + omap2_cm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; } -void omap2xxx_cm_set_apll54_auto_low_power_stop(void) +static int omap3xxx_clkdm_sleep(struct clockdomain *clkdm) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, - OMAP24XX_AUTO_54M_MASK); + omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; } -void omap2xxx_cm_set_apll96_disable_autoidle(void) +static int omap3xxx_clkdm_wakeup(struct clockdomain *clkdm) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, - OMAP24XX_AUTO_96M_MASK); + omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; } -void omap2xxx_cm_set_apll96_auto_low_power_stop(void) +static void omap3xxx_clkdm_allow_idle(struct clockdomain *clkdm) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, - OMAP24XX_AUTO_96M_MASK); -} + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); -/* - * - */ + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} -/** - * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby - * @prcm_mod: PRCM module offset - * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) - * @idlest_shift: shift of the bit in the CM_IDLEST* register to check - * - * XXX document - */ -int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) +static void omap3xxx_clkdm_deny_idle(struct clockdomain *clkdm) { - int ena = 0, i = 0; - u8 cm_idlest_reg; - u32 mask; + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); - if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs))) - return -EINVAL; + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} - cm_idlest_reg = cm_idlest_offs[idlest_id - 1]; +static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + bool hwsup = false; - mask = 1 << idlest_shift; + if (!clkdm->clktrctrl_mask) + return 0; - if (cpu_is_omap24xx()) - ena = mask; - else if (cpu_is_omap34xx()) - ena = 0; - else - BUG(); + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) && + (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { + omap3xxx_clkdm_wakeup(clkdm); + return 0; + } + + hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_add_autodeps(clkdm); + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap3xxx_clkdm_wakeup(clkdm); + } + + return 0; +} - omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena), - MAX_MODULE_READY_TIME, i); +static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; + if (!clkdm->clktrctrl_mask) + return 0; + + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && + !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; + } + + hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_del_autodeps(clkdm); + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) + omap3xxx_clkdm_sleep(clkdm); + } + + return 0; } +struct clkdm_ops omap3_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, + .clkdm_add_sleepdep = omap3xxx_clkdm_add_sleepdep, + .clkdm_del_sleepdep = omap3xxx_clkdm_del_sleepdep, + .clkdm_read_sleepdep = omap3xxx_clkdm_read_sleepdep, + .clkdm_clear_all_sleepdeps = omap3xxx_clkdm_clear_all_sleepdeps, + .clkdm_sleep = omap3xxx_clkdm_sleep, + .clkdm_wakeup = omap3xxx_clkdm_wakeup, + .clkdm_allow_idle = omap3xxx_clkdm_allow_idle, + .clkdm_deny_idle = omap3xxx_clkdm_deny_idle, + .clkdm_clk_enable = omap3xxx_clkdm_clk_enable, + .clkdm_clk_disable = omap3xxx_clkdm_clk_disable, +}; + /* * Context save/restore code - OMAP3 only */ -#ifdef CONFIG_ARCH_OMAP3 struct omap3_cm_regs { u32 iva2_cm_clksel1; u32 iva2_cm_clksel2; @@ -555,4 +597,3 @@ void omap3_cm_restore_context(void) omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD, OMAP3_CM_CLKOUT_CTRL_OFFSET); } -#endif diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h new file mode 100644 index 000000000000..4a6ac812edf4 --- /dev/null +++ b/arch/arm/mach-omap2/cm3xxx.h @@ -0,0 +1,86 @@ +/* + * OMAP2/3 Clock Management (CM) register definitions + * + * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The CM hardware modules on the OMAP2/3 are quite similar to each + * other. The CM modules/instances on OMAP4 are quite different, so + * they are handled in a separate file. + */ +#ifndef __ARCH_ASM_MACH_OMAP2_CM3XXX_H +#define __ARCH_ASM_MACH_OMAP2_CM3XXX_H + +#include "prcm-common.h" +#include "cm2xxx_3xxx.h" + +#define OMAP34XX_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) + + +/* + * OMAP3-specific global CM registers + * Use cm_{read,write}_reg() with these registers. + * These registers appear once per CM module. + */ + +#define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000) +#define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010) +#define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c) + +#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) + +/* + * Module specific CM register offsets from CM_BASE + domain offset + * Use cm_{read,write}_mod_reg() with these registers. + * These register offsets generally appear in more than one PRCM submodule. + */ + +/* OMAP3-specific register offsets */ + +#define OMAP3430_CM_CLKEN_PLL 0x0004 +#define OMAP3430ES2_CM_CLKEN2 0x0004 +#define OMAP3430ES2_CM_FCLKEN3 0x0008 +#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 +#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 +#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 +#define OMAP3430_CM_CLKSEL1 CM_CLKSEL +#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL +#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 +#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 +#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL +#define OMAP3430_CM_CLKSTST 0x004c +#define OMAP3430ES2_CM_CLKSEL4 0x004c +#define OMAP3430ES2_CM_CLKSEL5 0x0050 +#define OMAP3430_CM_CLKSEL2_EMU 0x0050 +#define OMAP3430_CM_CLKSEL3_EMU 0x0054 + + +/* CM_IDLEST bit field values to indicate deasserted IdleReq */ + +#define OMAP34XX_CM_IDLEST_VAL 1 + + +#ifndef __ASSEMBLER__ + +extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); + +extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); +extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); + +extern void omap3_cm_save_context(void); +extern void omap3_cm_restore_context(void); + +#endif + +#endif diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c new file mode 100644 index 000000000000..3246cef151dc --- /dev/null +++ b/arch/arm/mach-omap2/cm_common.c @@ -0,0 +1,71 @@ +/* + * OMAP2+ common Clock Management (CM) IP block functions + * + * Copyright (C) 2012 Texas Instruments, Inc. + * Paul Walmsley <paul@pwsan.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX This code should eventually be moved to a CM driver. + */ + +#include <linux/kernel.h> +#include <linux/init.h> + +#include "cm2xxx.h" +#include "cm3xxx.h" +#include "cm44xx.h" + +/* + * cm_ll_data: function pointers to SoC-specific implementations of + * common CM functions + */ +static struct cm_ll_data null_cm_ll_data; +static struct cm_ll_data *cm_ll_data = &null_cm_ll_data; + +/** + * cm_register - register per-SoC low-level data with the CM + * @cld: low-level per-SoC OMAP CM data & function pointers to register + * + * Register per-SoC low-level OMAP CM data and function pointers with + * the OMAP CM common interface. The caller must keep the data + * pointed to by @cld valid until it calls cm_unregister() and + * it returns successfully. Returns 0 upon success, -EINVAL if @cld + * is NULL, or -EEXIST if cm_register() has already been called + * without an intervening cm_unregister(). + */ +int cm_register(struct cm_ll_data *cld) +{ + if (!cld) + return -EINVAL; + + if (cm_ll_data != &null_cm_ll_data) + return -EEXIST; + + cm_ll_data = cld; + + return 0; +} + +/** + * cm_unregister - unregister per-SoC low-level data & function pointers + * @cld: low-level per-SoC OMAP CM data & function pointers to unregister + * + * Unregister per-SoC low-level OMAP CM data and function pointers + * that were previously registered with cm_register(). The + * caller may not destroy any of the data pointed to by @cld until + * this function returns successfully. Returns 0 upon success, or + * -EINVAL if @cld is NULL or if @cld does not match the struct + * cm_ll_data * previously registered by cm_register(). + */ +int cm_unregister(struct cm_ll_data *cld) +{ + if (!cld || cm_ll_data != cld) + return -EINVAL; + + cm_ll_data = &null_cm_ll_data; + + return 0; +} diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 1894015ff04b..7f9a464f01e9 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -2,8 +2,9 @@ * OMAP4 CM instance functions * * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2008-2011 Texas Instruments, Inc. * Paul Walmsley + * Rajendra Nayak <rnayak@ti.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -22,6 +23,7 @@ #include "iomap.h" #include "common.h" +#include "clockdomain.h" #include "cm.h" #include "cm1_44xx.h" #include "cm2_44xx.h" @@ -343,3 +345,141 @@ void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, v &= ~OMAP4430_MODULEMODE_MASK; omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); } + +/* + * Clockdomain low-level functions + */ + +static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit), + clkdm1->prcm_partition, + clkdm1->cm_inst, clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit), + clkdm1->prcm_partition, + clkdm1->cm_inst, clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition, + clkdm1->cm_inst, + clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP, + (1 << clkdm2->dep_bit)); +} + +static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) +{ + struct clkdm_dep *cd; + u32 mask = 0; + + if (!clkdm->prcm_partition) + return 0; + + for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->wkdep_usecount, 0); + } + + omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_sleep(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static int omap4_clkdm_wakeup(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); +} + +static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap4_clkdm_wakeup(clkdm); + else + omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, + clkdm->clkdm_offs); +} + +static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + return omap4_clkdm_wakeup(clkdm); + + return 0; +} + +static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->prcm_partition) + return 0; + + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && + !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + omap4_clkdm_allow_idle(clkdm); + return 0; + } + + hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + omap4_clkdm_sleep(clkdm); + + return 0; +} + +struct clkdm_ops omap4_clkdm_operations = { + .clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep, + .clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep, + .clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep, + .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps, + .clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep, + .clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep, + .clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep, + .clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps, + .clkdm_sleep = omap4_clkdm_sleep, + .clkdm_wakeup = omap4_clkdm_wakeup, + .clkdm_allow_idle = omap4_clkdm_allow_idle, + .clkdm_deny_idle = omap4_clkdm_deny_idle, + .clkdm_clk_enable = omap4_clkdm_clk_enable, + .clkdm_clk_disable = omap4_clkdm_clk_disable, +}; diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c index 48daac2581b4..ad856092c06a 100644 --- a/arch/arm/mach-omap2/common-board-devices.c +++ b/arch/arm/mach-omap2/common-board-devices.c @@ -25,7 +25,6 @@ #include <linux/spi/ads7846.h> #include <linux/platform_data/spi-omap2-mcspi.h> -#include <linux/platform_data/mtd-nand-omap2.h> #include "common.h" #include "common-board-devices.h" @@ -96,48 +95,3 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, { } #endif - -#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) -static struct omap_nand_platform_data nand_data; - -void __init omap_nand_flash_init(int options, struct mtd_partition *parts, - int nr_parts) -{ - u8 cs = 0; - u8 nandcs = GPMC_CS_NUM + 1; - - /* find out the chip-select on which NAND exists */ - while (cs < GPMC_CS_NUM) { - u32 ret = 0; - ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); - - if ((ret & 0xC00) == 0x800) { - printk(KERN_INFO "Found NAND on CS%d\n", cs); - if (nandcs > GPMC_CS_NUM) - nandcs = cs; - } - cs++; - } - - if (nandcs > GPMC_CS_NUM) { - pr_info("NAND: Unable to find configuration in GPMC\n"); - return; - } - - if (nandcs < GPMC_CS_NUM) { - nand_data.cs = nandcs; - nand_data.parts = parts; - nand_data.nr_parts = nr_parts; - nand_data.devsize = options; - - printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); - if (gpmc_nand_init(&nand_data) < 0) - printk(KERN_ERR "Unable to register NAND device\n"); - } -} -#else -void __init omap_nand_flash_init(int options, struct mtd_partition *parts, - int nr_parts) -{ -} -#endif diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h index a0b4a42836ab..72bb41b3fd25 100644 --- a/arch/arm/mach-omap2/common-board-devices.h +++ b/arch/arm/mach-omap2/common-board-devices.h @@ -10,6 +10,5 @@ struct ads7846_platform_data; void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, struct ads7846_platform_data *board_pdata); -void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts); #endif /* __OMAP_COMMON_BOARD_DEVICES__ */ diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 17950c6e130b..34fb5b95859b 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -16,14 +16,17 @@ #include <linux/init.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/platform_data/dsp-omap.h> -#include <plat/clock.h> +#include <plat/vram.h> #include "soc.h" #include "iomap.h" #include "common.h" +#include "clock.h" #include "sdrc.h" #include "control.h" +#include "omap-secure.h" /* Global address base setup code */ @@ -200,3 +203,20 @@ void __init omap5_map_io(void) omap5_map_common_io(); } #endif + +/* + * Stub function for OMAP2 so that common files + * continue to build when custom builds are used + */ +int __weak omap_secure_ram_reserve_memblock(void) +{ + return 0; +} + +void __init omap_reserve(void) +{ + omap_vram_reserve_sdram_memblock(); + omap_dsp_reserve_sdram_memblock(); + omap_secure_ram_reserve_memblock(); + omap_barrier_reserve_memblock(); +} diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 7045e4d61ac3..426fcfcfd821 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -28,13 +28,16 @@ #include <linux/irq.h> #include <linux/delay.h> +#include <linux/i2c.h> #include <linux/i2c/twl.h> +#include <linux/i2c-omap.h> #include <asm/proc-fns.h> -#include <plat/cpu.h> -#include <plat/serial.h> -#include <plat/common.h> +#include "i2c.h" +#include "serial.h" + +#include "usb.h" #define OMAP_INTC_START NR_IRQS @@ -338,6 +341,10 @@ extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1); struct omap2_hsmmc_info; extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers); +extern void omap_reserve(void); + +struct omap_hwmod; +extern int omap_dss_reset(struct omap_hwmod *); #endif /* __ASSEMBLER__ */ #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index d1ff8399a222..06375ad20917 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -1,7 +1,7 @@ /* * OMAP2/3 System Control Module register access * - * Copyright (C) 2007 Texas Instruments, Inc. + * Copyright (C) 2007, 2012 Texas Instruments, Inc. * Copyright (C) 2007 Nokia Corporation * * Written by Paul Walmsley @@ -15,15 +15,13 @@ #include <linux/kernel.h> #include <linux/io.h> -#include <plat/sdrc.h> - #include "soc.h" #include "iomap.h" #include "common.h" #include "cm-regbits-34xx.h" #include "prm-regbits-34xx.h" -#include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" +#include "prm3xxx.h" +#include "cm3xxx.h" #include "sdrc.h" #include "pm.h" #include "control.h" diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 6cd0c2a36a25..9adbdc846ceb 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -23,10 +23,11 @@ #include <asm/mach-types.h> #include <asm/mach/map.h> +#include <plat-omap/dma-omap.h> + #include "iomap.h" -#include <plat/dma.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> +#include "omap_hwmod.h" +#include "omap_device.h" #include "omap4-keypad.h" #include "soc.h" @@ -34,6 +35,7 @@ #include "mux.h" #include "control.h" #include "devices.h" +#include "dma.h" #define L3_MODULES_MAX_LEN 12 #define L3_MODULES 3 @@ -341,7 +343,7 @@ static void __init omap_init_dmic(void) oh = omap_hwmod_lookup("dmic"); if (!oh) { - printk(KERN_ERR "Could not look up mcpdm hw_mod\n"); + pr_err("Could not look up dmic hw_mod\n"); return; } diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 1011995f150a..89c57129357a 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -25,11 +25,12 @@ #include <linux/delay.h> #include <video/omapdss.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> -#include <plat/omap-pm.h> +#include "omap_hwmod.h" +#include "omap_device.h" +#include "omap-pm.h" #include "common.h" +#include "soc.h" #include "iomap.h" #include "mux.h" #include "control.h" @@ -284,6 +285,35 @@ err: return ERR_PTR(r); } +static enum omapdss_version __init omap_display_get_version(void) +{ + if (cpu_is_omap24xx()) + return OMAPDSS_VER_OMAP24xx; + else if (cpu_is_omap3630()) + return OMAPDSS_VER_OMAP3630; + else if (cpu_is_omap34xx()) { + if (soc_is_am35xx()) { + return OMAPDSS_VER_AM35xx; + } else { + if (omap_rev() < OMAP3430_REV_ES3_0) + return OMAPDSS_VER_OMAP34xx_ES1; + else + return OMAPDSS_VER_OMAP34xx_ES3; + } + } else if (omap_rev() == OMAP4430_REV_ES1_0) + return OMAPDSS_VER_OMAP4430_ES1; + else if (omap_rev() == OMAP4430_REV_ES2_0 || + omap_rev() == OMAP4430_REV_ES2_1 || + omap_rev() == OMAP4430_REV_ES2_2) + return OMAPDSS_VER_OMAP4430_ES2; + else if (cpu_is_omap44xx()) + return OMAPDSS_VER_OMAP4; + else if (soc_is_omap54xx()) + return OMAPDSS_VER_OMAP5; + else + return OMAPDSS_VER_UNKNOWN; +} + int __init omap_display_init(struct omap_dss_board_info *board_data) { int r = 0; @@ -291,9 +321,18 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) int i, oh_count; const struct omap_dss_hwmod_data *curr_dss_hwmod; struct platform_device *dss_pdev; + enum omapdss_version ver; /* create omapdss device */ + ver = omap_display_get_version(); + + if (ver == OMAPDSS_VER_UNKNOWN) { + pr_err("DSS not supported on this SoC\n"); + return -ENODEV; + } + + board_data->version = ver; board_data->dsi_enable_pads = omap_dsi_enable_pads; board_data->dsi_disable_pads = omap_dsi_disable_pads; board_data->get_context_loss_count = omap_pm_get_dev_context_loss_count; diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index ff75abe60af2..e5aba58da5d2 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c @@ -28,9 +28,11 @@ #include <linux/init.h> #include <linux/device.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> + +#include "soc.h" +#include "omap_hwmod.h" +#include "omap_device.h" #define OMAP2_DMA_STRIDE 0x60 @@ -274,6 +276,9 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) return -ENOMEM; } + if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) + d->dev_caps |= HS_CHANNELS_RESERVED; + /* Check the capabilities register for descriptor loading feature */ if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS) dma_common_ch_end = CCDN; diff --git a/arch/arm/mach-omap2/dma.h b/arch/arm/mach-omap2/dma.h new file mode 100644 index 000000000000..eba80dbc5218 --- /dev/null +++ b/arch/arm/mach-omap2/dma.h @@ -0,0 +1,131 @@ +/* + * OMAP2PLUS DMA channel definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __OMAP2PLUS_DMA_CHANNEL_H +#define __OMAP2PLUS_DMA_CHANNEL_H + + +/* DMA channels for 24xx */ +#define OMAP24XX_DMA_NO_DEVICE 0 +#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */ +#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */ +#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */ +#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */ +#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */ +#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */ +#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */ +#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */ +#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */ +#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */ +#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */ +#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */ +#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */ +#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */ +#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */ +#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */ +#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */ +#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */ +#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */ +#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */ +#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */ +#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */ +#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */ +#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */ +#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */ +#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */ +#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */ +#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */ +#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */ +#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */ +#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */ +#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */ +#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */ +#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */ +#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */ +#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */ +#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */ +#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */ +#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */ +#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */ +#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */ +#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */ +#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */ +#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */ +#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */ +#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */ +#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */ +#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */ +#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */ +#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */ +#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */ +#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */ +#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */ +#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */ +#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */ +#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */ +#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */ +#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */ +#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */ +#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */ +#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */ +#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */ +#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */ +#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */ +#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */ +#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */ +#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */ +#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */ +#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */ +#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */ +#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */ +#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */ +#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */ +#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */ +#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */ +#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */ +#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */ +#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */ +#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */ +#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */ +#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */ +#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */ +#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */ +#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */ +#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */ +#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */ +#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */ +#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */ +#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */ +#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */ +#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */ +#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */ +#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */ +#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */ +#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */ +#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */ +#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ +#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ + +#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ +#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ + +/* Only for AM35xx */ +#define AM35XX_DMA_UART4_TX 54 +#define AM35XX_DMA_UART4_RX 55 + +#endif /* __OMAP2PLUS_DMA_CHANNEL_H */ diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index 814e1808e158..eacf51f2bc27 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -28,8 +28,6 @@ #include <linux/bitops.h> #include <linux/clkdev.h> -#include <plat/clock.h> - #include "soc.h" #include "clock.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c index 09d0ccccb861..5854da168a9c 100644 --- a/arch/arm/mach-omap2/dpll44xx.c +++ b/arch/arm/mach-omap2/dpll44xx.c @@ -15,8 +15,6 @@ #include <linux/io.h> #include <linux/bitops.h> -#include <plat/clock.h> - #include "soc.h" #include "clock.h" #include "clock44xx.h" diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c index 72e0f01b715c..6282cc826613 100644 --- a/arch/arm/mach-omap2/drm.c +++ b/arch/arm/mach-omap2/drm.c @@ -24,8 +24,8 @@ #include <linux/platform_device.h> #include <linux/dma-mapping.h> -#include <plat/omap_device.h> -#include <plat/omap_hwmod.h> +#include "omap_device.h" +#include "omap_hwmod.h" #if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c index 98388109f22a..b155500e84a8 100644 --- a/arch/arm/mach-omap2/dsp.c +++ b/arch/arm/mach-omap2/dsp.c @@ -27,7 +27,7 @@ #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" #ifdef CONFIG_BRIDGE_DVFS -#include <plat/omap-pm.h> +#include "omap-pm.h" #endif #include <linux/platform_data/dsp-omap.h> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index d1058f16fb40..399acabc3d0b 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -23,9 +23,9 @@ #include <linux/of.h> #include <linux/platform_data/gpio-omap.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> -#include <plat/omap-pm.h> +#include "omap_hwmod.h" +#include "omap_device.h" +#include "omap-pm.h" #include "powerdomain.h" diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 4acf497faeb3..8607735b3ab3 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -17,9 +17,12 @@ #include <asm/mach/flash.h> -#include <plat/gpmc.h> - +#include "gpmc.h" #include "soc.h" +#include "gpmc-nand.h" + +/* minimum size for IO mapping */ +#define NAND_IO_SIZE 4 static struct resource gpmc_nand_resource[] = { { @@ -40,41 +43,36 @@ static struct platform_device gpmc_nand_device = { .resource = gpmc_nand_resource, }; -static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data) +static int omap2_nand_gpmc_retime( + struct omap_nand_platform_data *gpmc_nand_data, + struct gpmc_timings *gpmc_t) { struct gpmc_timings t; int err; - if (!gpmc_nand_data->gpmc_t) - return 0; - memset(&t, 0, sizeof(t)); - t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk; - t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on); - t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on); + t.sync_clk = gpmc_t->sync_clk; + t.cs_on = gpmc_round_ns_to_ticks(gpmc_t->cs_on); + t.adv_on = gpmc_round_ns_to_ticks(gpmc_t->adv_on); /* Read */ - t.adv_rd_off = gpmc_round_ns_to_ticks( - gpmc_nand_data->gpmc_t->adv_rd_off); + t.adv_rd_off = gpmc_round_ns_to_ticks(gpmc_t->adv_rd_off); t.oe_on = t.adv_on; - t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access); - t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off); - t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off); - t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle); + t.access = gpmc_round_ns_to_ticks(gpmc_t->access); + t.oe_off = gpmc_round_ns_to_ticks(gpmc_t->oe_off); + t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_t->cs_rd_off); + t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_t->rd_cycle); /* Write */ - t.adv_wr_off = gpmc_round_ns_to_ticks( - gpmc_nand_data->gpmc_t->adv_wr_off); + t.adv_wr_off = gpmc_round_ns_to_ticks(gpmc_t->adv_wr_off); t.we_on = t.oe_on; if (cpu_is_omap34xx()) { - t.wr_data_mux_bus = gpmc_round_ns_to_ticks( - gpmc_nand_data->gpmc_t->wr_data_mux_bus); - t.wr_access = gpmc_round_ns_to_ticks( - gpmc_nand_data->gpmc_t->wr_access); + t.wr_data_mux_bus = gpmc_round_ns_to_ticks(gpmc_t->wr_data_mux_bus); + t.wr_access = gpmc_round_ns_to_ticks(gpmc_t->wr_access); } - t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off); - t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off); - t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle); + t.we_off = gpmc_round_ns_to_ticks(gpmc_t->we_off); + t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_t->cs_wr_off); + t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_t->wr_cycle); /* Configure GPMC */ if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16) @@ -91,7 +89,29 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data return 0; } -int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) +static bool __init gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) +{ + /* support only OMAP3 class */ + if (!cpu_is_omap34xx()) { + pr_err("BCH ecc is not supported on this CPU\n"); + return 0; + } + + /* + * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1. + * Other chips may be added if confirmed to work. + */ + if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) && + (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) { + pr_err("BCH 4-bit mode is not supported on this CPU\n"); + return 0; + } + + return 1; +} + +int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, + struct gpmc_timings *gpmc_t) { int err = 0; struct device *dev = &gpmc_nand_device.dev; @@ -112,11 +132,13 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); gpmc_nand_resource[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); - /* Set timings in GPMC */ - err = omap2_nand_gpmc_retime(gpmc_nand_data); - if (err < 0) { - dev_err(dev, "Unable to set gpmc timings: %d\n", err); - return err; + + if (gpmc_t) { + err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t); + if (err < 0) { + dev_err(dev, "Unable to set gpmc timings: %d\n", err); + return err; + } } /* Enable RD PIN Monitoring Reg */ @@ -126,6 +148,9 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); + if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) + return -EINVAL; + err = platform_device_register(&gpmc_nand_device); if (err < 0) { dev_err(dev, "Unable to register NAND device\n"); diff --git a/arch/arm/mach-omap2/gpmc-nand.h b/arch/arm/mach-omap2/gpmc-nand.h new file mode 100644 index 000000000000..d59e1281e851 --- /dev/null +++ b/arch/arm/mach-omap2/gpmc-nand.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-omap2/gpmc-nand.h + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __OMAP2_GPMC_NAND_H +#define __OMAP2_GPMC_NAND_H + +#include "gpmc.h" +#include <linux/platform_data/mtd-nand-omap2.h> + +#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2) +extern int gpmc_nand_init(struct omap_nand_platform_data *d, + struct gpmc_timings *gpmc_t); +#else +static inline int gpmc_nand_init(struct omap_nand_platform_data *d, + struct gpmc_timings *gpmc_t) +{ + return 0; +} +#endif + +#endif diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 916716e1da3b..d102183ed9a5 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -16,15 +16,25 @@ #include <linux/mtd/onenand_regs.h> #include <linux/io.h> #include <linux/platform_data/mtd-onenand-omap2.h> +#include <linux/err.h> #include <asm/mach/flash.h> -#include <plat/gpmc.h> - +#include "gpmc.h" #include "soc.h" +#include "gpmc-onenand.h" #define ONENAND_IO_SIZE SZ_128K +#define ONENAND_FLAG_SYNCREAD (1 << 0) +#define ONENAND_FLAG_SYNCWRITE (1 << 1) +#define ONENAND_FLAG_HF (1 << 2) +#define ONENAND_FLAG_VHF (1 << 3) + +static unsigned onenand_flags; +static unsigned latency; +static int fclk_offset; + static struct omap_onenand_platform_data *gpmc_onenand_data; static struct resource gpmc_onenand_resource = { @@ -38,11 +48,9 @@ static struct platform_device gpmc_onenand_device = { .resource = &gpmc_onenand_resource, }; -static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base) +static struct gpmc_timings omap2_onenand_calc_async_timings(void) { struct gpmc_timings t; - u32 reg; - int err; const int t_cer = 15; const int t_avdp = 12; @@ -55,11 +63,6 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base) const int t_wpl = 40; const int t_wph = 30; - /* Ensure sync read and sync write are disabled */ - reg = readw(onenand_base + ONENAND_REG_SYS_CFG1); - reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE; - writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); - memset(&t, 0, sizeof(t)); t.sync_clk = 0; t.cs_on = 0; @@ -86,25 +89,30 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base) t.cs_wr_off = t.we_off + gpmc_round_ns_to_ticks(t_wph); t.wr_cycle = t.cs_wr_off + gpmc_round_ns_to_ticks(t_cez); + return t; +} + +static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) +{ /* Configure GPMC for asynchronous read */ gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, GPMC_CONFIG1_DEVICESIZE_16 | GPMC_CONFIG1_MUXADDDATA); - err = gpmc_cs_set_timings(cs, &t); - if (err) - return err; + return gpmc_cs_set_timings(cs, t); +} + +static void omap2_onenand_set_async_mode(void __iomem *onenand_base) +{ + u32 reg; /* Ensure sync read and sync write are disabled */ reg = readw(onenand_base + ONENAND_REG_SYS_CFG1); reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE; writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); - - return 0; } -static void set_onenand_cfg(void __iomem *onenand_base, int latency, - int sync_read, int sync_write, int hf, int vhf) +static void set_onenand_cfg(void __iomem *onenand_base) { u32 reg; @@ -112,19 +120,19 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency, reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9)); reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) | ONENAND_SYS_CFG1_BL_16; - if (sync_read) + if (onenand_flags & ONENAND_FLAG_SYNCREAD) reg |= ONENAND_SYS_CFG1_SYNC_READ; else reg &= ~ONENAND_SYS_CFG1_SYNC_READ; - if (sync_write) + if (onenand_flags & ONENAND_FLAG_SYNCWRITE) reg |= ONENAND_SYS_CFG1_SYNC_WRITE; else reg &= ~ONENAND_SYS_CFG1_SYNC_WRITE; - if (hf) + if (onenand_flags & ONENAND_FLAG_HF) reg |= ONENAND_SYS_CFG1_HF; else reg &= ~ONENAND_SYS_CFG1_HF; - if (vhf) + if (onenand_flags & ONENAND_FLAG_VHF) reg |= ONENAND_SYS_CFG1_VHF; else reg &= ~ONENAND_SYS_CFG1_VHF; @@ -132,21 +140,10 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency, } static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg, - void __iomem *onenand_base, bool *clk_dep) + void __iomem *onenand_base) { u16 ver = readw(onenand_base + ONENAND_REG_VERSION_ID); - int freq = 0; - - if (cfg->get_freq) { - struct onenand_freq_info fi; - - fi.maf_id = readw(onenand_base + ONENAND_REG_MANUFACTURER_ID); - fi.dev_id = readw(onenand_base + ONENAND_REG_DEVICE_ID); - fi.ver_id = ver; - freq = cfg->get_freq(&fi, clk_dep); - if (freq) - return freq; - } + int freq; switch ((ver >> 4) & 0xf) { case 0: @@ -172,9 +169,9 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg, return freq; } -static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, - void __iomem *onenand_base, - int *freq_ptr) +static struct gpmc_timings +omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg, + int freq) { struct gpmc_timings t; const int t_cer = 15; @@ -184,29 +181,15 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, const int t_wpl = 40; const int t_wph = 30; int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo; - int div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency; - int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0; - int err, ticks_cez; - int cs = cfg->cs, freq = *freq_ptr; u32 reg; - bool clk_dep = false; + int div, fclk_offset_ns, gpmc_clk_ns; + int ticks_cez; + int cs = cfg->cs; - if (cfg->flags & ONENAND_SYNC_READ) { - sync_read = 1; - } else if (cfg->flags & ONENAND_SYNC_READWRITE) { - sync_read = 1; - sync_write = 1; - } else - return omap2_onenand_set_async_mode(cs, onenand_base); - - if (!freq) { - /* Very first call freq is not known */ - err = omap2_onenand_set_async_mode(cs, onenand_base); - if (err) - return err; - freq = omap2_onenand_get_freq(cfg, onenand_base, &clk_dep); - first_time = 1; - } + if (cfg->flags & ONENAND_SYNC_READ) + onenand_flags = ONENAND_FLAG_SYNCREAD; + else if (cfg->flags & ONENAND_SYNC_READWRITE) + onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE; switch (freq) { case 104: @@ -244,44 +227,31 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, t_ach = 9; t_aavdh = 7; t_rdyo = 15; - sync_write = 0; + onenand_flags &= ~ONENAND_FLAG_SYNCWRITE; break; } - div = gpmc_cs_calc_divider(cs, min_gpmc_clk_period); + div = gpmc_calc_divider(min_gpmc_clk_period); gpmc_clk_ns = gpmc_ticks_to_ns(div); if (gpmc_clk_ns < 15) /* >66Mhz */ - hf = 1; + onenand_flags |= ONENAND_FLAG_HF; + else + onenand_flags &= ~ONENAND_FLAG_HF; if (gpmc_clk_ns < 12) /* >83Mhz */ - vhf = 1; - if (vhf) + onenand_flags |= ONENAND_FLAG_VHF; + else + onenand_flags &= ~ONENAND_FLAG_VHF; + if (onenand_flags & ONENAND_FLAG_VHF) latency = 8; - else if (hf) + else if (onenand_flags & ONENAND_FLAG_HF) latency = 6; else if (gpmc_clk_ns >= 25) /* 40 MHz*/ latency = 3; else latency = 4; - if (clk_dep) { - if (gpmc_clk_ns < 12) { /* >83Mhz */ - t_ces = 3; - t_avds = 4; - } else if (gpmc_clk_ns < 15) { /* >66Mhz */ - t_ces = 5; - t_avds = 4; - } else if (gpmc_clk_ns < 25) { /* >40Mhz */ - t_ces = 6; - t_avds = 5; - } else { - t_ces = 7; - t_avds = 7; - } - } - - if (first_time) - set_onenand_cfg(onenand_base, latency, - sync_read, sync_write, hf, vhf); + /* Set synchronous read timings */ + memset(&t, 0, sizeof(t)); if (div == 1) { reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2); @@ -307,8 +277,6 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg); } - /* Set synchronous read timings */ - memset(&t, 0, sizeof(t)); t.sync_clk = min_gpmc_clk_period; t.cs_on = 0; t.adv_on = 0; @@ -330,7 +298,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, ticks_cez); /* Write */ - if (sync_write) { + if (onenand_flags & ONENAND_FLAG_SYNCWRITE) { t.adv_wr_off = t.adv_rd_off; t.we_on = 0; t.we_off = t.cs_rd_off; @@ -355,6 +323,14 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, } } + return t; +} + +static int gpmc_set_sync_mode(int cs, struct gpmc_timings *t) +{ + unsigned sync_read = onenand_flags & ONENAND_FLAG_SYNCREAD; + unsigned sync_write = onenand_flags & ONENAND_FLAG_SYNCWRITE; + /* Configure GPMC for synchronous read */ gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, GPMC_CONFIG1_WRAPBURST_SUPP | @@ -371,11 +347,45 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, GPMC_CONFIG1_DEVICETYPE_NOR | GPMC_CONFIG1_MUXADDDATA); - err = gpmc_cs_set_timings(cs, &t); - if (err) - return err; + return gpmc_cs_set_timings(cs, t); +} + +static int omap2_onenand_setup_async(void __iomem *onenand_base) +{ + struct gpmc_timings t; + int ret; + + omap2_onenand_set_async_mode(onenand_base); - set_onenand_cfg(onenand_base, latency, sync_read, sync_write, hf, vhf); + t = omap2_onenand_calc_async_timings(); + + ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); + if (IS_ERR_VALUE(ret)) + return ret; + + omap2_onenand_set_async_mode(onenand_base); + + return 0; +} + +static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr) +{ + int ret, freq = *freq_ptr; + struct gpmc_timings t; + + if (!freq) { + /* Very first call freq is not known */ + freq = omap2_onenand_get_freq(gpmc_onenand_data, onenand_base); + set_onenand_cfg(onenand_base); + } + + t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq); + + ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t); + if (IS_ERR_VALUE(ret)) + return ret; + + set_onenand_cfg(onenand_base); *freq_ptr = freq; @@ -385,15 +395,22 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr) { struct device *dev = &gpmc_onenand_device.dev; + unsigned l = ONENAND_SYNC_READ | ONENAND_SYNC_READWRITE; + int ret; - /* Set sync timings in GPMC */ - if (omap2_onenand_set_sync_mode(gpmc_onenand_data, onenand_base, - freq_ptr) < 0) { - dev_err(dev, "Unable to set synchronous mode\n"); - return -EINVAL; + ret = omap2_onenand_setup_async(onenand_base); + if (ret) { + dev_err(dev, "unable to set to async mode\n"); + return ret; } - return 0; + if (!(gpmc_onenand_data->flags & l)) + return 0; + + ret = omap2_onenand_setup_sync(onenand_base, freq_ptr); + if (ret) + dev_err(dev, "unable to set to sync mode\n"); + return ret; } void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) @@ -411,6 +428,11 @@ void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) gpmc_onenand_data->flags |= ONENAND_SYNC_READ; } + if (cpu_is_omap34xx()) + gpmc_onenand_data->flags |= ONENAND_IN_OMAP34XX; + else + gpmc_onenand_data->flags &= ~ONENAND_IN_OMAP34XX; + err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE, (unsigned long *)&gpmc_onenand_resource.start); if (err < 0) { diff --git a/arch/arm/mach-omap2/gpmc-onenand.h b/arch/arm/mach-omap2/gpmc-onenand.h new file mode 100644 index 000000000000..216f23a8b45c --- /dev/null +++ b/arch/arm/mach-omap2/gpmc-onenand.h @@ -0,0 +1,24 @@ +/* + * arch/arm/mach-omap2/gpmc-onenand.h + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __OMAP2_GPMC_ONENAND_H +#define __OMAP2_GPMC_ONENAND_H + +#include <linux/platform_data/mtd-onenand-omap2.h> + +#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) +extern void gpmc_onenand_init(struct omap_onenand_platform_data *d); +#else +#define board_onenand_data NULL +static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d) +{ +} +#endif + +#endif diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c index 565475310374..6eed907d594c 100644 --- a/arch/arm/mach-omap2/gpmc-smc91x.c +++ b/arch/arm/mach-omap2/gpmc-smc91x.c @@ -17,7 +17,7 @@ #include <linux/io.h> #include <linux/smc91x.h> -#include <plat/gpmc.h> +#include "gpmc.h" #include "gpmc-smc91x.h" #include "soc.h" diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c index 249a0b440cd6..ef990118d32b 100644 --- a/arch/arm/mach-omap2/gpmc-smsc911x.c +++ b/arch/arm/mach-omap2/gpmc-smsc911x.c @@ -20,7 +20,7 @@ #include <linux/io.h> #include <linux/smsc911x.h> -#include <plat/gpmc.h> +#include "gpmc.h" #include "gpmc-smsc911x.h" static struct resource gpmc_smsc911x_resources[] = { diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 5ac5cf30406a..bf6117c32f4b 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -26,16 +26,14 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> -#include <asm/mach-types.h> -#include <plat/gpmc.h> +#include <linux/platform_data/mtd-nand-omap2.h> -#include <plat/cpu.h> -#include <plat/gpmc.h> -#include <plat/sdrc.h> -#include <plat/omap_device.h> +#include <asm/mach-types.h> #include "soc.h" #include "common.h" +#include "omap_device.h" +#include "gpmc.h" #define DEVICE_NAME "omap-gpmc" @@ -59,6 +57,9 @@ #define GPMC_ECC_SIZE_CONFIG 0x1fc #define GPMC_ECC1_RESULT 0x200 #define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */ +#define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */ +#define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */ +#define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */ /* GPMC ECC control settings */ #define GPMC_ECC_CTRL_ECCCLEAR 0x100 @@ -75,6 +76,7 @@ #define GPMC_CS0_OFFSET 0x60 #define GPMC_CS_SIZE 0x30 +#define GPMC_BCH_SIZE 0x10 #define GPMC_MEM_START 0x00000000 #define GPMC_MEM_END 0x3FFFFFFF @@ -137,7 +139,6 @@ static struct resource gpmc_mem_root; static struct resource gpmc_cs_mem[GPMC_CS_NUM]; static DEFINE_SPINLOCK(gpmc_mem_lock); static unsigned int gpmc_cs_map; /* flag for cs which are initialized */ -static int gpmc_ecc_used = -EINVAL; /* cs using ecc engine */ static struct device *gpmc_dev; static int gpmc_irq; static resource_size_t phys_base, mem_size; @@ -158,22 +159,6 @@ static u32 gpmc_read_reg(int idx) return __raw_readl(gpmc_base + idx); } -static void gpmc_cs_write_byte(int cs, int idx, u8 val) -{ - void __iomem *reg_addr; - - reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; - __raw_writeb(val, reg_addr); -} - -static u8 gpmc_cs_read_byte(int cs, int idx) -{ - void __iomem *reg_addr; - - reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; - return __raw_readb(reg_addr); -} - void gpmc_cs_write_reg(int cs, int idx, u32 val) { void __iomem *reg_addr; @@ -288,7 +273,7 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, return -1 #endif -int gpmc_cs_calc_divider(int cs, unsigned int sync_clk) +int gpmc_calc_divider(unsigned int sync_clk) { int div; u32 l; @@ -308,7 +293,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) int div; u32 l; - div = gpmc_cs_calc_divider(cs, t->sync_clk); + div = gpmc_calc_divider(t->sync_clk); if (div < 0) return div; @@ -509,44 +494,6 @@ void gpmc_cs_free(int cs) EXPORT_SYMBOL(gpmc_cs_free); /** - * gpmc_read_status - read access request to get the different gpmc status - * @cmd: command type - * @return status - */ -int gpmc_read_status(int cmd) -{ - int status = -EINVAL; - u32 regval = 0; - - switch (cmd) { - case GPMC_GET_IRQ_STATUS: - status = gpmc_read_reg(GPMC_IRQSTATUS); - break; - - case GPMC_PREFETCH_FIFO_CNT: - regval = gpmc_read_reg(GPMC_PREFETCH_STATUS); - status = GPMC_PREFETCH_STATUS_FIFO_CNT(regval); - break; - - case GPMC_PREFETCH_COUNT: - regval = gpmc_read_reg(GPMC_PREFETCH_STATUS); - status = GPMC_PREFETCH_STATUS_COUNT(regval); - break; - - case GPMC_STATUS_BUFFER: - regval = gpmc_read_reg(GPMC_STATUS); - /* 1 : buffer is available to write */ - status = regval & GPMC_STATUS_BUFF_EMPTY; - break; - - default: - printk(KERN_ERR "gpmc_read_status: Not supported\n"); - } - return status; -} -EXPORT_SYMBOL(gpmc_read_status); - -/** * gpmc_cs_configure - write request to configure gpmc * @cs: chip select number * @cmd: command type @@ -614,121 +561,10 @@ int gpmc_cs_configure(int cs, int cmd, int wval) } EXPORT_SYMBOL(gpmc_cs_configure); -/** - * gpmc_nand_read - nand specific read access request - * @cs: chip select number - * @cmd: command type - */ -int gpmc_nand_read(int cs, int cmd) -{ - int rval = -EINVAL; - - switch (cmd) { - case GPMC_NAND_DATA: - rval = gpmc_cs_read_byte(cs, GPMC_CS_NAND_DATA); - break; - - default: - printk(KERN_ERR "gpmc_read_nand_ctrl: Not supported\n"); - } - return rval; -} -EXPORT_SYMBOL(gpmc_nand_read); - -/** - * gpmc_nand_write - nand specific write request - * @cs: chip select number - * @cmd: command type - * @wval: value to write - */ -int gpmc_nand_write(int cs, int cmd, int wval) -{ - int err = 0; - - switch (cmd) { - case GPMC_NAND_COMMAND: - gpmc_cs_write_byte(cs, GPMC_CS_NAND_COMMAND, wval); - break; - - case GPMC_NAND_ADDRESS: - gpmc_cs_write_byte(cs, GPMC_CS_NAND_ADDRESS, wval); - break; - - case GPMC_NAND_DATA: - gpmc_cs_write_byte(cs, GPMC_CS_NAND_DATA, wval); - - default: - printk(KERN_ERR "gpmc_write_nand_ctrl: Not supported\n"); - err = -EINVAL; - } - return err; -} -EXPORT_SYMBOL(gpmc_nand_write); - - - -/** - * gpmc_prefetch_enable - configures and starts prefetch transfer - * @cs: cs (chip select) number - * @fifo_th: fifo threshold to be used for read/ write - * @dma_mode: dma mode enable (1) or disable (0) - * @u32_count: number of bytes to be transferred - * @is_write: prefetch read(0) or write post(1) mode - */ -int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode, - unsigned int u32_count, int is_write) -{ - - if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) { - pr_err("gpmc: fifo threshold is not supported\n"); - return -1; - } else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) { - /* Set the amount of bytes to be prefetched */ - gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count); - - /* Set dma/mpu mode, the prefetch read / post write and - * enable the engine. Set which cs is has requested for. - */ - gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) | - PREFETCH_FIFOTHRESHOLD(fifo_th) | - ENABLE_PREFETCH | - (dma_mode << DMA_MPU_MODE) | - (0x1 & is_write))); - - /* Start the prefetch engine */ - gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1); - } else { - return -EBUSY; - } - - return 0; -} -EXPORT_SYMBOL(gpmc_prefetch_enable); - -/** - * gpmc_prefetch_reset - disables and stops the prefetch engine - */ -int gpmc_prefetch_reset(int cs) -{ - u32 config1; - - /* check if the same module/cs is trying to reset */ - config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); - if (((config1 >> CS_NUM_SHIFT) & 0x7) != cs) - return -EINVAL; - - /* Stop the PFPW engine */ - gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0); - - /* Reset/disable the PFPW engine */ - gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0); - - return 0; -} -EXPORT_SYMBOL(gpmc_prefetch_reset); - void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) { + int i; + reg->gpmc_status = gpmc_base + GPMC_STATUS; reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; @@ -744,7 +580,17 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; - reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0; + + for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) { + reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 + + GPMC_BCH_SIZE * i; + reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 + + GPMC_BCH_SIZE * i; + reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 + + GPMC_BCH_SIZE * i; + reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 + + GPMC_BCH_SIZE * i; + } } int gpmc_get_client_irq(unsigned irq_config) @@ -868,9 +714,9 @@ static void __devexit gpmc_mem_exit(void) } -static void __devinit gpmc_mem_init(void) +static int __devinit gpmc_mem_init(void) { - int cs; + int cs, rc; unsigned long boot_rom_space = 0; /* never allocate the first page, to facilitate bug detection; @@ -890,13 +736,21 @@ static void __devinit gpmc_mem_init(void) if (!gpmc_cs_mem_enabled(cs)) continue; gpmc_cs_get_memconf(cs, &base, &size); - if (gpmc_cs_insert_mem(cs, base, size) < 0) - BUG(); + rc = gpmc_cs_insert_mem(cs, base, size); + if (IS_ERR_VALUE(rc)) { + while (--cs >= 0) + if (gpmc_cs_mem_enabled(cs)) + gpmc_cs_delete_mem(cs); + return rc; + } } + + return 0; } static __devinit int gpmc_probe(struct platform_device *pdev) { + int rc; u32 l; struct resource *res; @@ -936,7 +790,13 @@ static __devinit int gpmc_probe(struct platform_device *pdev) dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), GPMC_REVISION_MINOR(l)); - gpmc_mem_init(); + rc = gpmc_mem_init(); + if (IS_ERR_VALUE(rc)) { + clk_disable_unprepare(gpmc_l3_clk); + clk_put(gpmc_l3_clk); + dev_err(gpmc_dev, "failed to reserve memory\n"); + return rc; + } if (IS_ERR_VALUE(gpmc_setup_irq())) dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); @@ -1079,267 +939,3 @@ void omap3_gpmc_restore_context(void) } } #endif /* CONFIG_ARCH_OMAP3 */ - -/** - * gpmc_enable_hwecc - enable hardware ecc functionality - * @cs: chip select number - * @mode: read/write mode - * @dev_width: device bus width(1 for x16, 0 for x8) - * @ecc_size: bytes for which ECC will be generated - */ -int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size) -{ - unsigned int val; - - /* check if ecc module is in used */ - if (gpmc_ecc_used != -EINVAL) - return -EINVAL; - - gpmc_ecc_used = cs; - - /* clear ecc and enable bits */ - gpmc_write_reg(GPMC_ECC_CONTROL, - GPMC_ECC_CTRL_ECCCLEAR | - GPMC_ECC_CTRL_ECCREG1); - - /* program ecc and result sizes */ - val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F)); - gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, val); - - switch (mode) { - case GPMC_ECC_READ: - case GPMC_ECC_WRITE: - gpmc_write_reg(GPMC_ECC_CONTROL, - GPMC_ECC_CTRL_ECCCLEAR | - GPMC_ECC_CTRL_ECCREG1); - break; - case GPMC_ECC_READSYN: - gpmc_write_reg(GPMC_ECC_CONTROL, - GPMC_ECC_CTRL_ECCCLEAR | - GPMC_ECC_CTRL_ECCDISABLE); - break; - default: - printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode); - break; - } - - /* (ECC 16 or 8 bit col) | ( CS ) | ECC Enable */ - val = (dev_width << 7) | (cs << 1) | (0x1); - gpmc_write_reg(GPMC_ECC_CONFIG, val); - return 0; -} -EXPORT_SYMBOL_GPL(gpmc_enable_hwecc); - -/** - * gpmc_calculate_ecc - generate non-inverted ecc bytes - * @cs: chip select number - * @dat: data pointer over which ecc is computed - * @ecc_code: ecc code buffer - * - * Using non-inverted ECC is considered ugly since writing a blank - * page (padding) will clear the ECC bytes. This is not a problem as long - * no one is trying to write data on the seemingly unused page. Reading - * an erased page will produce an ECC mismatch between generated and read - * ECC bytes that has to be dealt with separately. - */ -int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code) -{ - unsigned int val = 0x0; - - if (gpmc_ecc_used != cs) - return -EINVAL; - - /* read ecc result */ - val = gpmc_read_reg(GPMC_ECC1_RESULT); - *ecc_code++ = val; /* P128e, ..., P1e */ - *ecc_code++ = val >> 16; /* P128o, ..., P1o */ - /* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */ - *ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0); - - gpmc_ecc_used = -EINVAL; - return 0; -} -EXPORT_SYMBOL_GPL(gpmc_calculate_ecc); - -#ifdef CONFIG_ARCH_OMAP3 - -/** - * gpmc_init_hwecc_bch - initialize hardware BCH ecc functionality - * @cs: chip select number - * @nsectors: how many 512-byte sectors to process - * @nerrors: how many errors to correct per sector (4 or 8) - * - * This function must be executed before any call to gpmc_enable_hwecc_bch. - */ -int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors) -{ - /* check if ecc module is in use */ - if (gpmc_ecc_used != -EINVAL) - return -EINVAL; - - /* support only OMAP3 class */ - if (!cpu_is_omap34xx()) { - printk(KERN_ERR "BCH ecc is not supported on this CPU\n"); - return -EINVAL; - } - - /* - * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1. - * Other chips may be added if confirmed to work. - */ - if ((nerrors == 4) && - (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) { - printk(KERN_ERR "BCH 4-bit mode is not supported on this CPU\n"); - return -EINVAL; - } - - /* sanity check */ - if (nsectors > 8) { - printk(KERN_ERR "BCH cannot process %d sectors (max is 8)\n", - nsectors); - return -EINVAL; - } - - return 0; -} -EXPORT_SYMBOL_GPL(gpmc_init_hwecc_bch); - -/** - * gpmc_enable_hwecc_bch - enable hardware BCH ecc functionality - * @cs: chip select number - * @mode: read/write mode - * @dev_width: device bus width(1 for x16, 0 for x8) - * @nsectors: how many 512-byte sectors to process - * @nerrors: how many errors to correct per sector (4 or 8) - */ -int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors, - int nerrors) -{ - unsigned int val; - - /* check if ecc module is in use */ - if (gpmc_ecc_used != -EINVAL) - return -EINVAL; - - gpmc_ecc_used = cs; - - /* clear ecc and enable bits */ - gpmc_write_reg(GPMC_ECC_CONTROL, 0x1); - - /* - * When using BCH, sector size is hardcoded to 512 bytes. - * Here we are using wrapping mode 6 both for reading and writing, with: - * size0 = 0 (no additional protected byte in spare area) - * size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area) - */ - gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (32 << 22) | (0 << 12)); - - /* BCH configuration */ - val = ((1 << 16) | /* enable BCH */ - (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */ - (0x06 << 8) | /* wrap mode = 6 */ - (dev_width << 7) | /* bus width */ - (((nsectors-1) & 0x7) << 4) | /* number of sectors */ - (cs << 1) | /* ECC CS */ - (0x1)); /* enable ECC */ - - gpmc_write_reg(GPMC_ECC_CONFIG, val); - gpmc_write_reg(GPMC_ECC_CONTROL, 0x101); - return 0; -} -EXPORT_SYMBOL_GPL(gpmc_enable_hwecc_bch); - -/** - * gpmc_calculate_ecc_bch4 - Generate 7 ecc bytes per sector of 512 data bytes - * @cs: chip select number - * @dat: The pointer to data on which ecc is computed - * @ecc: The ecc output buffer - */ -int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc) -{ - int i; - unsigned long nsectors, reg, val1, val2; - - if (gpmc_ecc_used != cs) - return -EINVAL; - - nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1; - - for (i = 0; i < nsectors; i++) { - - reg = GPMC_ECC_BCH_RESULT_0 + 16*i; - - /* Read hw-computed remainder */ - val1 = gpmc_read_reg(reg + 0); - val2 = gpmc_read_reg(reg + 4); - - /* - * Add constant polynomial to remainder, in order to get an ecc - * sequence of 0xFFs for a buffer filled with 0xFFs; and - * left-justify the resulting polynomial. - */ - *ecc++ = 0x28 ^ ((val2 >> 12) & 0xFF); - *ecc++ = 0x13 ^ ((val2 >> 4) & 0xFF); - *ecc++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF)); - *ecc++ = 0x39 ^ ((val1 >> 20) & 0xFF); - *ecc++ = 0x96 ^ ((val1 >> 12) & 0xFF); - *ecc++ = 0xac ^ ((val1 >> 4) & 0xFF); - *ecc++ = 0x7f ^ ((val1 & 0xF) << 4); - } - - gpmc_ecc_used = -EINVAL; - return 0; -} -EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch4); - -/** - * gpmc_calculate_ecc_bch8 - Generate 13 ecc bytes per block of 512 data bytes - * @cs: chip select number - * @dat: The pointer to data on which ecc is computed - * @ecc: The ecc output buffer - */ -int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc) -{ - int i; - unsigned long nsectors, reg, val1, val2, val3, val4; - - if (gpmc_ecc_used != cs) - return -EINVAL; - - nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1; - - for (i = 0; i < nsectors; i++) { - - reg = GPMC_ECC_BCH_RESULT_0 + 16*i; - - /* Read hw-computed remainder */ - val1 = gpmc_read_reg(reg + 0); - val2 = gpmc_read_reg(reg + 4); - val3 = gpmc_read_reg(reg + 8); - val4 = gpmc_read_reg(reg + 12); - - /* - * Add constant polynomial to remainder, in order to get an ecc - * sequence of 0xFFs for a buffer filled with 0xFFs. - */ - *ecc++ = 0xef ^ (val4 & 0xFF); - *ecc++ = 0x51 ^ ((val3 >> 24) & 0xFF); - *ecc++ = 0x2e ^ ((val3 >> 16) & 0xFF); - *ecc++ = 0x09 ^ ((val3 >> 8) & 0xFF); - *ecc++ = 0xed ^ (val3 & 0xFF); - *ecc++ = 0x93 ^ ((val2 >> 24) & 0xFF); - *ecc++ = 0x9a ^ ((val2 >> 16) & 0xFF); - *ecc++ = 0xc2 ^ ((val2 >> 8) & 0xFF); - *ecc++ = 0x97 ^ (val2 & 0xFF); - *ecc++ = 0x79 ^ ((val1 >> 24) & 0xFF); - *ecc++ = 0xe5 ^ ((val1 >> 16) & 0xFF); - *ecc++ = 0x24 ^ ((val1 >> 8) & 0xFF); - *ecc++ = 0xb5 ^ (val1 & 0xFF); - } - - gpmc_ecc_used = -EINVAL; - return 0; -} -EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch8); - -#endif /* CONFIG_ARCH_OMAP3 */ diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/mach-omap2/gpmc.h index 2e6e2597178c..79f4dfc2adb3 100644 --- a/arch/arm/plat-omap/include/plat/gpmc.h +++ b/arch/arm/mach-omap2/gpmc.h @@ -11,6 +11,8 @@ #ifndef __OMAP2_GPMC_H #define __OMAP2_GPMC_H +#include <linux/platform_data/mtd-nand-omap2.h> + /* Maximum Number of Chip Selects */ #define GPMC_CS_NUM 8 @@ -32,15 +34,6 @@ #define GPMC_SET_IRQ_STATUS 0x00000004 #define GPMC_CONFIG_WP 0x00000005 -#define GPMC_GET_IRQ_STATUS 0x00000006 -#define GPMC_PREFETCH_FIFO_CNT 0x00000007 /* bytes available in FIFO for r/w */ -#define GPMC_PREFETCH_COUNT 0x00000008 /* remaining bytes to be read/write*/ -#define GPMC_STATUS_BUFFER 0x00000009 /* 1: buffer is available to write */ - -#define GPMC_NAND_COMMAND 0x0000000a -#define GPMC_NAND_ADDRESS 0x0000000b -#define GPMC_NAND_DATA 0x0000000c - #define GPMC_ENABLE_IRQ 0x0000000d /* ECC commands */ @@ -76,25 +69,10 @@ #define GPMC_DEVICETYPE_NOR 0 #define GPMC_DEVICETYPE_NAND 2 #define GPMC_CONFIG_WRITEPROTECT 0x00000010 -#define GPMC_STATUS_BUFF_EMPTY 0x00000001 #define WR_RD_PIN_MONITORING 0x00600000 -#define GPMC_PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F) -#define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff) #define GPMC_IRQ_FIFOEVENTENABLE 0x01 #define GPMC_IRQ_COUNT_EVENT 0x02 -#define PREFETCH_FIFOTHRESHOLD_MAX 0x40 -#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8) - -enum omap_ecc { - /* 1-bit ecc: stored at end of spare area */ - OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */ - OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ - /* 1-bit ecc: stored at beginning of spare area as romcode */ - OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ - OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */ - OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */ -}; /* * Note that all values in this struct are in nanoseconds except sync_clk @@ -133,22 +111,6 @@ struct gpmc_timings { u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */ }; -struct gpmc_nand_regs { - void __iomem *gpmc_status; - void __iomem *gpmc_nand_command; - void __iomem *gpmc_nand_address; - void __iomem *gpmc_nand_data; - void __iomem *gpmc_prefetch_config1; - void __iomem *gpmc_prefetch_config2; - void __iomem *gpmc_prefetch_control; - void __iomem *gpmc_prefetch_status; - void __iomem *gpmc_ecc_config; - void __iomem *gpmc_ecc_control; - void __iomem *gpmc_ecc_size_config; - void __iomem *gpmc_ecc1_result; - void __iomem *gpmc_bch_result0; -}; - extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs); extern int gpmc_get_client_irq(unsigned irq_config); @@ -160,31 +122,14 @@ extern unsigned long gpmc_get_fclk_period(void); extern void gpmc_cs_write_reg(int cs, int idx, u32 val); extern u32 gpmc_cs_read_reg(int cs, int idx); -extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk); +extern int gpmc_calc_divider(unsigned int sync_clk); extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); extern void gpmc_cs_free(int cs); extern int gpmc_cs_set_reserved(int cs, int reserved); extern int gpmc_cs_reserved(int cs); -extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode, - unsigned int u32_count, int is_write); -extern int gpmc_prefetch_reset(int cs); extern void omap3_gpmc_save_context(void); extern void omap3_gpmc_restore_context(void); -extern int gpmc_read_status(int cmd); extern int gpmc_cs_configure(int cs, int cmd, int wval); -extern int gpmc_nand_read(int cs, int cmd); -extern int gpmc_nand_write(int cs, int cmd, int wval); - -int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size); -int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code); - -#ifdef CONFIG_ARCH_OMAP3 -int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors); -int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors, - int nerrors); -int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc); -int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc); -#endif /* CONFIG_ARCH_OMAP3 */ #endif diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c index e003f2bba30c..3da8900598c8 100644 --- a/arch/arm/mach-omap2/hdq1w.c +++ b/arch/arm/mach-omap2/hdq1w.c @@ -27,8 +27,8 @@ #include <linux/err.h> #include <linux/platform_device.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> +#include "omap_hwmod.h" +#include "omap_device.h" #include "hdq1w.h" #include "common.h" diff --git a/arch/arm/mach-omap2/hdq1w.h b/arch/arm/mach-omap2/hdq1w.h index 0c1efc846d8d..c7e08d2a7a46 100644 --- a/arch/arm/mach-omap2/hdq1w.h +++ b/arch/arm/mach-omap2/hdq1w.h @@ -21,7 +21,7 @@ #ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H #define ARCH_ARM_MACH_OMAP2_HDQ1W_H -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" /* * XXX A future cleanup patch should modify diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 4d3a6324155f..4a964338992a 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -14,14 +14,14 @@ #include <linux/string.h> #include <linux/delay.h> #include <linux/gpio.h> -#include <mach/hardware.h> #include <linux/platform_data/gpio-omap.h> -#include <plat/mmc.h> -#include <plat/omap-pm.h> -#include <plat/omap_device.h> +#include "soc.h" +#include "omap_device.h" +#include "omap-pm.h" #include "mux.h" +#include "mmc.h" #include "hsmmc.h" #include "control.h" diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c index 8763c8520dc2..1df9b5feda16 100644 --- a/arch/arm/mach-omap2/hwspinlock.c +++ b/arch/arm/mach-omap2/hwspinlock.c @@ -21,8 +21,8 @@ #include <linux/err.h> #include <linux/hwspinlock.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> +#include "omap_hwmod.h" +#include "omap_device.h" static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = { .base_id = 0, diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index fc57e67b321f..4e63097e3cd8 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -19,11 +19,13 @@ * */ -#include <plat/i2c.h> +#include "soc.h" #include "common.h" -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" +#include "omap_device.h" #include "mux.h" +#include "i2c.h" /* In register I2C_CON, Bit 15 is the I2C enable bit */ #define I2C_EN BIT(15) @@ -33,7 +35,9 @@ /* Maximum microseconds to wait for OMAP module to softreset */ #define MAX_MODULE_SOFTRESET_WAIT 10000 -void __init omap2_i2c_mux_pins(int bus_id) +#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 + +static void __init omap2_i2c_mux_pins(int bus_id) { char mux_name[sizeof("i2c2_scl.i2c2_scl")]; @@ -104,3 +108,62 @@ int omap_i2c_reset(struct omap_hwmod *oh) return 0; } + +static int __init omap_i2c_nr_ports(void) +{ + int ports = 0; + + if (cpu_is_omap24xx()) + ports = 2; + else if (cpu_is_omap34xx()) + ports = 3; + else if (cpu_is_omap44xx()) + ports = 4; + return ports; +} + +static const char name[] = "omap_i2c"; + +int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata, + int bus_id) +{ + int l; + struct omap_hwmod *oh; + struct platform_device *pdev; + char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; + struct omap_i2c_bus_platform_data *pdata; + struct omap_i2c_dev_attr *dev_attr; + + if (bus_id > omap_i2c_nr_ports()) + return -EINVAL; + + omap2_i2c_mux_pins(bus_id); + + l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id); + WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN, + "String buffer overflow in I2C%d device setup\n", bus_id); + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + pr_err("Could not look up %s\n", oh_name); + return -EEXIST; + } + + pdata = i2c_pdata; + /* + * pass the hwmod class's CPU-specific knowledge of I2C IP revision in + * use, and functionality implementation flags, up to the OMAP I2C + * driver via platform data + */ + pdata->rev = oh->class->rev; + + dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; + pdata->flags = dev_attr->flags; + + pdev = omap_device_build(name, bus_id, oh, pdata, + sizeof(struct omap_i2c_bus_platform_data), + NULL, 0, 0); + WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); + + return PTR_RET(pdev); +} + diff --git a/arch/arm/mach-omap2/i2c.h b/arch/arm/mach-omap2/i2c.h new file mode 100644 index 000000000000..42b6f2e7d190 --- /dev/null +++ b/arch/arm/mach-omap2/i2c.h @@ -0,0 +1,42 @@ +/* + * Helper module for board specific I2C bus registration + * + * Copyright (C) 2009 Nokia Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <plat/i2c.h> + +#ifndef __MACH_OMAP2_I2C_H +#define __MACH_OMAP2_I2C_H + +/** + * i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod + * @fifo_depth: total controller FIFO size (in bytes) + * @flags: differences in hardware support capability + * + * @fifo_depth represents what exists on the hardware, not what is + * actually configured at runtime by the device driver. + */ +struct omap_i2c_dev_attr { + u8 fifo_depth; + u32 flags; +}; + +int omap_i2c_reset(struct omap_hwmod *oh); + +#endif /* __MACH_OMAP2_I2C_H */ diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 93d10de7129f..cfaed13d0040 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S @@ -13,7 +13,7 @@ #include <linux/serial_reg.h> -#include <plat/serial.h> +#include <mach/serial.h> #define UART_OFFSET(addr) ((addr) & 0x00ffffff) diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h deleted file mode 100644 index 5621cc59c9f4..000000000000 --- a/arch/arm/mach-omap2/include/mach/gpio.h +++ /dev/null @@ -1,3 +0,0 @@ -/* - * arch/arm/mach-omap2/include/mach/gpio.h - */ diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/mach-omap2/include/mach/serial.h index 65fce44dce34..70eda00db7a4 100644 --- a/arch/arm/plat-omap/include/plat/serial.h +++ b/arch/arm/mach-omap2/include/mach/serial.h @@ -1,6 +1,4 @@ /* - * arch/arm/plat-omap/include/mach/serial.h - * * Copyright (C) 2009 Texas Instruments * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com> * @@ -10,11 +8,6 @@ * GNU General Public License for more details. */ -#ifndef __ASM_ARCH_SERIAL_H -#define __ASM_ARCH_SERIAL_H - -#include <linux/init.h> - /* * Memory entry used for the DEBUG_LL UART configuration, relative to * start of RAM. See also uncompress.h and debug-macro.S. @@ -29,11 +22,6 @@ */ #define OMAP_UART_INFO_OFS 0x3ffc -/* OMAP1 serial ports */ -#define OMAP1_UART1_BASE 0xfffb0000 -#define OMAP1_UART2_BASE 0xfffb0800 -#define OMAP1_UART3_BASE 0xfffb9800 - /* OMAP2 serial ports */ #define OMAP2_UART1_BASE 0x4806a000 #define OMAP2_UART2_BASE 0x4806c000 @@ -76,20 +64,14 @@ #define ZOOM_UART_VIRT 0xfa400000 #define OMAP_PORT_SHIFT 2 -#define OMAP7XX_PORT_SHIFT 0 #define ZOOM_PORT_SHIFT 1 -#define OMAP1510_BASE_BAUD (12000000/16) -#define OMAP16XX_BASE_BAUD (48000000/16) #define OMAP24XX_BASE_BAUD (48000000/16) /* * DEBUG_LL port encoding stored into the UART1 scratchpad register by * decomp_setup in uncompress.h */ -#define OMAP1UART1 11 -#define OMAP1UART2 12 -#define OMAP1UART3 13 #define OMAP2UART1 21 #define OMAP2UART2 22 #define OMAP2UART3 23 @@ -109,15 +91,6 @@ #define OMAP5UART4 OMAP4UART4 #define ZOOM_UART 95 /* Only on zoom2/3 */ -/* This is only used by 8250.c for omap1510 */ -#define is_omap_port(pt) ({int __ret = 0; \ - if ((pt)->port.mapbase == OMAP1_UART1_BASE || \ - (pt)->port.mapbase == OMAP1_UART2_BASE || \ - (pt)->port.mapbase == OMAP1_UART3_BASE) \ - __ret = 1; \ - __ret; \ - }) - #ifndef __ASSEMBLER__ struct omap_board_data; @@ -128,5 +101,3 @@ extern void omap_serial_board_init(struct omap_uart_port_info *platform_data); extern void omap_serial_init_port(struct omap_board_data *bdata, struct omap_uart_port_info *platform_data); #endif - -#endif diff --git a/arch/arm/mach-omap2/include/mach/uncompress.h b/arch/arm/mach-omap2/include/mach/uncompress.h index 78e0557bfd4e..8e3546d3e041 100644 --- a/arch/arm/mach-omap2/include/mach/uncompress.h +++ b/arch/arm/mach-omap2/include/mach/uncompress.h @@ -1,5 +1,176 @@ /* - * arch/arm/mach-omap2/include/mach/uncompress.h + * arch/arm/plat-omap/include/mach/uncompress.h + * + * Serial port stubs for kernel decompress status messages + * + * Initially based on: + * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h + * Copyright (C) 2000 RidgeRun, Inc. + * Author: Greg Lonnon <glonnon@ridgerun.com> + * + * Rewritten by: + * Author: <source@mvista.com> + * 2004 (c) MontaVista Software, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. */ -#include <plat/uncompress.h> +#include <linux/types.h> +#include <linux/serial_reg.h> + +#include <asm/memory.h> +#include <asm/mach-types.h> + +#include <mach/serial.h> + +#define MDR1_MODE_MASK 0x07 + +volatile u8 *uart_base; +int uart_shift; + +/* + * Store the DEBUG_LL uart number into memory. + * See also debug-macro.S, and serial.c for related code. + */ +static void set_omap_uart_info(unsigned char port) +{ + /* + * Get address of some.bss variable and round it down + * a la CONFIG_AUTO_ZRELADDR. + */ + u32 ram_start = (u32)&uart_shift & 0xf8000000; + u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); + *uart_info = port; +} + +static void putc(int c) +{ + if (!uart_base) + return; + + /* Check for UART 16x mode */ + if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) + return; + + while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) + barrier(); + uart_base[UART_TX << uart_shift] = c; +} + +static inline void flush(void) +{ +} + +/* + * Macros to configure UART1 and debug UART + */ +#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \ + if (machine_is_##mach()) { \ + uart_base = (volatile u8 *)(dbg_uart); \ + uart_shift = (dbg_shft); \ + port = (dbg_id); \ + set_omap_uart_info(port); \ + break; \ + } + +#define DEBUG_LL_OMAP2(p, mach) \ + _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, \ + OMAP2UART##p) + +#define DEBUG_LL_OMAP3(p, mach) \ + _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, \ + OMAP3UART##p) + +#define DEBUG_LL_OMAP4(p, mach) \ + _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \ + OMAP4UART##p) + +#define DEBUG_LL_OMAP5(p, mach) \ + _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \ + OMAP5UART##p) +/* Zoom2/3 shift is different for UART1 and external port */ +#define DEBUG_LL_ZOOM(mach) \ + _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART) + +#define DEBUG_LL_TI81XX(p, mach) \ + _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ + TI81XXUART##p) + +#define DEBUG_LL_AM33XX(p, mach) \ + _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ + AM33XXUART##p) + +static inline void arch_decomp_setup(void) +{ + int port = 0; + + /* + * Initialize the port based on the machine ID from the bootloader. + * Note that we're using macros here instead of switch statement + * as machine_is functions are optimized out for the boards that + * are not selected. + */ + do { + /* omap2 based boards using UART1 */ + DEBUG_LL_OMAP2(1, omap_2430sdp); + DEBUG_LL_OMAP2(1, omap_apollon); + DEBUG_LL_OMAP2(1, omap_h4); + + /* omap2 based boards using UART3 */ + DEBUG_LL_OMAP2(3, nokia_n800); + DEBUG_LL_OMAP2(3, nokia_n810); + DEBUG_LL_OMAP2(3, nokia_n810_wimax); + + /* omap3 based boards using UART1 */ + DEBUG_LL_OMAP2(1, omap3evm); + DEBUG_LL_OMAP3(1, omap_3430sdp); + DEBUG_LL_OMAP3(1, omap_3630sdp); + DEBUG_LL_OMAP3(1, omap3530_lv_som); + DEBUG_LL_OMAP3(1, omap3_torpedo); + + /* omap3 based boards using UART3 */ + DEBUG_LL_OMAP3(3, cm_t35); + DEBUG_LL_OMAP3(3, cm_t3517); + DEBUG_LL_OMAP3(3, cm_t3730); + DEBUG_LL_OMAP3(3, craneboard); + DEBUG_LL_OMAP3(3, devkit8000); + DEBUG_LL_OMAP3(3, igep0020); + DEBUG_LL_OMAP3(3, igep0030); + DEBUG_LL_OMAP3(3, nokia_rm680); + DEBUG_LL_OMAP3(3, nokia_rm696); + DEBUG_LL_OMAP3(3, nokia_rx51); + DEBUG_LL_OMAP3(3, omap3517evm); + DEBUG_LL_OMAP3(3, omap3_beagle); + DEBUG_LL_OMAP3(3, omap3_pandora); + DEBUG_LL_OMAP3(3, omap_ldp); + DEBUG_LL_OMAP3(3, overo); + DEBUG_LL_OMAP3(3, touchbook); + + /* omap4 based boards using UART3 */ + DEBUG_LL_OMAP4(3, omap_4430sdp); + DEBUG_LL_OMAP4(3, omap4_panda); + + /* omap5 based boards using UART3 */ + DEBUG_LL_OMAP5(3, omap5_sevm); + + /* zoom2/3 external uart */ + DEBUG_LL_ZOOM(omap_zoom2); + DEBUG_LL_ZOOM(omap_zoom3); + + /* TI8168 base boards using UART3 */ + DEBUG_LL_TI81XX(3, ti8168evm); + + /* TI8148 base boards using UART1 */ + DEBUG_LL_TI81XX(1, ti8148evm); + + /* AM33XX base boards using UART1 */ + DEBUG_LL_AM33XX(1, am335xevm); + } while (0); +} + +/* + * nothing to do + */ +#define arch_decomp_wdog() diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 4234d28dc171..807b8d919f81 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -25,14 +25,9 @@ #include <asm/tlb.h> #include <asm/mach/map.h> -#include <plat/sram.h> -#include <plat/sdrc.h> -#include <plat/serial.h> -#include <plat/omap-pm.h> -#include <plat/omap_hwmod.h> -#include <plat/multi.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> +#include "omap_hwmod.h" #include "soc.h" #include "iomap.h" #include "voltage.h" @@ -43,6 +38,10 @@ #include "clock2xxx.h" #include "clock3xxx.h" #include "clock44xx.h" +#include "omap-pm.h" +#include "sdrc.h" +#include "serial.h" +#include "sram.h" /* * The machine specific code may provide the extra mapping besides the @@ -354,11 +353,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); } -static void __init omap_common_init_early(void) -{ - omap_init_consistent_dma_size(); -} - static void __init omap_hwmod_init_postsetup(void) { u8 postsetup_state; @@ -379,7 +373,6 @@ void __init omap2420_init_early(void) { omap2_set_globals_242x(); omap2xxx_check_revision(); - omap_common_init_early(); omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); @@ -401,7 +394,6 @@ void __init omap2430_init_early(void) { omap2_set_globals_243x(); omap2xxx_check_revision(); - omap_common_init_early(); omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); @@ -428,7 +420,6 @@ void __init omap3_init_early(void) omap2_set_globals_3xxx(); omap3xxx_check_revision(); omap3xxx_check_features(); - omap_common_init_early(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); @@ -462,7 +453,6 @@ void __init ti81xx_init_early(void) omap2_set_globals_ti81xx(); omap3xxx_check_revision(); ti81xx_check_features(); - omap_common_init_early(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); @@ -520,7 +510,6 @@ void __init am33xx_init_early(void) omap2_set_globals_am33xx(); omap3xxx_check_revision(); ti81xx_check_features(); - omap_common_init_early(); am33xx_voltagedomains_init(); am33xx_powerdomains_init(); am33xx_clockdomains_init(); @@ -536,7 +525,6 @@ void __init omap4430_init_early(void) omap2_set_globals_443x(); omap4xxx_check_revision(); omap4xxx_check_features(); - omap_common_init_early(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); @@ -558,7 +546,6 @@ void __init omap5_init_early(void) { omap2_set_globals_5xxx(); omap5xxx_check_revision(); - omap_common_init_early(); } #endif diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 37f8f948047b..a106c75c5338 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -19,11 +19,12 @@ #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/platform_data/asoc-ti-mcbsp.h> - -#include <plat/dma.h> -#include <plat/omap_device.h> #include <linux/pm_runtime.h> +#include <plat-omap/dma-omap.h> + +#include "omap_device.h" + /* * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. * Sidetone needs non-gated ICLK and sidetone autoidle is broken. diff --git a/arch/arm/mach-omap2/mmc.h b/arch/arm/mach-omap2/mmc.h new file mode 100644 index 000000000000..0cd4b089da9c --- /dev/null +++ b/arch/arm/mach-omap2/mmc.h @@ -0,0 +1,23 @@ +#include <linux/mmc/host.h> +#include <linux/platform_data/mmc-omap.h> + +#define OMAP24XX_NR_MMC 2 +#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE +#define OMAP2_MMC1_BASE 0x4809c000 + +#define OMAP4_MMC_REG_OFFSET 0x100 + +#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) +void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data); +#else +static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) +{ +} +#endif + +struct omap_hwmod; +int omap_msdi_reset(struct omap_hwmod *oh); + +/* called from board-specific card detection service routine */ +extern void omap_mmc_notify_cover_event(struct device *dev, int slot, + int is_closed); diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c index 9e57b4aadb06..627e97e30743 100644 --- a/arch/arm/mach-omap2/msdi.c +++ b/arch/arm/mach-omap2/msdi.c @@ -25,13 +25,12 @@ #include <linux/err.h> #include <linux/platform_data/gpio-omap.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> -#include <plat/mmc.h> - #include "common.h" #include "control.h" +#include "omap_hwmod.h" +#include "omap_device.h" #include "mux.h" +#include "mmc.h" /* * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 701e17cba468..26126343d6ac 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -36,8 +36,9 @@ #include <linux/interrupt.h> -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" +#include "soc.h" #include "control.h" #include "mux.h" #include "prm.h" diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index 17f80e4ab162..c47140bbbec4 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c @@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = { "sys_off_mode", NULL, NULL, NULL, "gpio_9", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_CTS, 150, - "uart1_cts", NULL, NULL, NULL, + "uart1_cts", "ssi1_rdy_tx", NULL, NULL, "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_RTS, 149, - "uart1_rts", NULL, NULL, NULL, + "uart1_rts", "ssi1_flag_tx", NULL, NULL, "gpio_149", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_RX, 151, - "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk", + "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", "gpio_151", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_TX, 148, - "uart1_tx", NULL, NULL, NULL, + "uart1_tx", "ssi1_dat_tx", NULL, NULL, "gpio_148", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART2_CTS, 144, "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index ff4e6a0e9c7c..3f5fd7e3549d 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -50,6 +50,7 @@ #include <asm/suspend.h> #include <asm/hardware/cache-l2x0.h> +#include "soc.h" #include "common.h" #include "omap44xx.h" #include "omap4-sar-layout.h" diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c index 9722f418ae1f..6a3be2bebddb 100644 --- a/arch/arm/plat-omap/omap-pm-noop.c +++ b/arch/arm/mach-omap2/omap-pm-noop.c @@ -22,9 +22,8 @@ #include <linux/device.h> #include <linux/platform_device.h> -/* Interface documentation is in mach/omap-pm.h */ -#include <plat/omap-pm.h> -#include <plat/omap_device.h> +#include "omap_device.h" +#include "omap-pm.h" static bool off_mode_enabled; static int dummy_context_loss_counter; diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/mach-omap2/omap-pm.h index 67faa7b8fe92..67faa7b8fe92 100644 --- a/arch/arm/plat-omap/include/plat/omap-pm.h +++ b/arch/arm/mach-omap2/omap-pm.h diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c index e089e4d1ae38..b970440cffca 100644 --- a/arch/arm/mach-omap2/omap-secure.c +++ b/arch/arm/mach-omap2/omap-secure.c @@ -18,7 +18,6 @@ #include <asm/cacheflush.h> #include <asm/memblock.h> -#include <plat/omap-secure.h> #include "omap-secure.h" static phys_addr_t omap_secure_memblock_base; diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h index c90a43589abe..0e729170c46b 100644 --- a/arch/arm/mach-omap2/omap-secure.h +++ b/arch/arm/mach-omap2/omap-secure.h @@ -52,6 +52,13 @@ extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2, u32 arg3, u32 arg4); extern u32 omap_smc2(u32 id, u32 falg, u32 pargs); extern phys_addr_t omap_secure_ram_mempool_base(void); +extern int omap_secure_ram_reserve_memblock(void); +#ifdef CONFIG_OMAP4_ERRATA_I688 +extern int omap_barrier_reserve_memblock(void); +#else +static inline void omap_barrier_reserve_memblock(void) +{ } +#endif #endif /* __ASSEMBLER__ */ #endif /* OMAP_ARCH_OMAP_SECURE_H */ diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index e1f289748c5d..3cfcd41bf8fa 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -25,16 +25,14 @@ #include <asm/mach/map.h> #include <asm/memblock.h> -#include <plat/sram.h> -#include <plat/omap-secure.h> -#include <plat/mmc.h> - #include "omap-wakeupgen.h" - #include "soc.h" #include "common.h" +#include "mmc.h" #include "hsmmc.h" #include "omap4-sar-layout.h" +#include "omap-secure.h" +#include "sram.h" #ifdef CONFIG_CACHE_L2X0 static void __iomem *l2cache_base; diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/mach-omap2/omap_device.c index 7a7d1f2a65e9..0ef934fec364 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -89,9 +89,8 @@ #include <linux/of.h> #include <linux/notifier.h> -#include <plat/omap_device.h> -#include <plat/omap_hwmod.h> -#include <plat/clock.h> +#include "omap_device.h" +#include "omap_hwmod.h" /* These parameters are passed to _omap_device_{de,}activate() */ #define USE_WAKEUP_LAT 0 diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/mach-omap2/omap_device.h index 106f50665804..0933c599bf89 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/mach-omap2/omap_device.h @@ -34,7 +34,7 @@ #include <linux/kernel.h> #include <linux/platform_device.h> -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" extern struct dev_pm_domain omap_device_pm_domain; diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index b969ab1d258b..37eeb45612f8 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -139,18 +139,19 @@ #include <linux/slab.h> #include <linux/bootmem.h> -#include <plat/clock.h> -#include <plat/omap_hwmod.h> +#include "clock.h" +#include "omap_hwmod.h" #include <plat/prcm.h> #include "soc.h" #include "common.h" #include "clockdomain.h" #include "powerdomain.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" +#include "cm3xxx.h" #include "cminst44xx.h" #include "cm33xx.h" -#include "prm2xxx_3xxx.h" +#include "prm3xxx.h" #include "prm44xx.h" #include "prm33xx.h" #include "prminst44xx.h" @@ -2668,7 +2669,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) /* Static functions intended only for use in soc_ops field function pointers */ /** - * _omap2_wait_target_ready - wait for a module to leave slave idle + * _omap2xxx_wait_target_ready - wait for a module to leave slave idle * @oh: struct omap_hwmod * * * Wait for a module @oh to leave slave idle. Returns 0 if the module @@ -2676,7 +2677,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) * slave idle; otherwise, pass along the return value of the * appropriate *_cm*_wait_module_ready() function. */ -static int _omap2_wait_target_ready(struct omap_hwmod *oh) +static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh) { if (!oh) return -EINVAL; @@ -2689,9 +2690,36 @@ static int _omap2_wait_target_ready(struct omap_hwmod *oh) /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ - return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, - oh->prcm.omap2.idlest_reg_id, - oh->prcm.omap2.idlest_idle_bit); + return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs, + oh->prcm.omap2.idlest_reg_id, + oh->prcm.omap2.idlest_idle_bit); +} + +/** + * _omap3xxx_wait_target_ready - wait for a module to leave slave idle + * @oh: struct omap_hwmod * + * + * Wait for a module @oh to leave slave idle. Returns 0 if the module + * does not have an IDLEST bit or if the module successfully leaves + * slave idle; otherwise, pass along the return value of the + * appropriate *_cm*_wait_module_ready() function. + */ +static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh) +{ + if (!oh) + return -EINVAL; + + if (oh->flags & HWMOD_NO_IDLEST) + return 0; + + if (!_find_mpu_rt_port(oh)) + return 0; + + /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ + + return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs, + oh->prcm.omap2.idlest_reg_id, + oh->prcm.omap2.idlest_idle_bit); } /** @@ -3959,8 +3987,13 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) */ void __init omap_hwmod_init(void) { - if (cpu_is_omap24xx() || cpu_is_omap34xx()) { - soc_ops.wait_target_ready = _omap2_wait_target_ready; + if (cpu_is_omap24xx()) { + soc_ops.wait_target_ready = _omap2xxx_wait_target_ready; + soc_ops.assert_hardreset = _omap2_assert_hardreset; + soc_ops.deassert_hardreset = _omap2_deassert_hardreset; + soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; + } else if (cpu_is_omap34xx()) { + soc_ops.wait_target_ready = _omap3xxx_wait_target_ready; soc_ops.assert_hardreset = _omap2_assert_hardreset; soc_ops.deassert_hardreset = _omap2_deassert_hardreset; soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index b3349f7b1a2c..87b59b45c678 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -35,7 +35,6 @@ #include <linux/list.h> #include <linux/ioport.h> #include <linux/spinlock.h> -#include <plat/cpu.h> struct omap_device; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index b5db6007c523..a8b3368dca3d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -12,21 +12,24 @@ * XXX handle crossbar/shared link difference for L3? * XXX these should be marked initdata for multi-OMAP kernels */ + +#include <linux/i2c-omap.h> #include <linux/platform_data/spi-omap2-mcspi.h> -#include <plat/omap_hwmod.h> -#include <plat/dma.h> -#include <plat/serial.h> -#include <plat/i2c.h> +#include <plat-omap/dma-omap.h> #include <plat/dmtimer.h> + +#include "omap_hwmod.h" #include "l3_2xxx.h" #include "l4_2xxx.h" -#include <plat/mmc.h> #include "omap_hwmod_common_data.h" #include "cm-regbits-24xx.h" #include "prm-regbits-24xx.h" +#include "i2c.h" +#include "mmc.h" +#include "serial.h" #include "wd_timer.h" /* diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index c455e41b0237..dc768c50e523 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -12,21 +12,23 @@ * XXX handle crossbar/shared link difference for L3? * XXX these should be marked initdata for multi-OMAP kernels */ + +#include <linux/i2c-omap.h> #include <linux/platform_data/asoc-ti-mcbsp.h> #include <linux/platform_data/spi-omap2-mcspi.h> -#include <plat/omap_hwmod.h> -#include <plat/dma.h> -#include <plat/serial.h> -#include <plat/i2c.h> +#include <plat-omap/dma-omap.h> #include <plat/dmtimer.h> -#include <plat/mmc.h> + +#include "omap_hwmod.h" +#include "mmc.h" #include "l3_2xxx.h" #include "soc.h" #include "omap_hwmod_common_data.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" +#include "i2c.h" #include "wd_timer.h" /* diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c index cbb4ef6544ad..0413daba2dba 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c @@ -13,8 +13,7 @@ */ #include <asm/sizes.h> -#include <plat/omap_hwmod.h> -#include <plat/serial.h> +#include "omap_hwmod.h" #include "omap_hwmod_common_data.h" diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index 8851bbb6bb24..40d6c93d9853 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -9,13 +9,14 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <plat/omap_hwmod.h> -#include <plat/serial.h> -#include <plat/dma.h> -#include <plat/common.h> + +#include <plat-omap/dma-omap.h> + +#include "omap_hwmod.h" #include "hdq1w.h" #include "omap_hwmod_common_data.h" +#include "dma.h" /* UART */ diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c index 1a1287d62648..47901a5e76de 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -13,10 +13,10 @@ */ #include <asm/sizes.h> -#include <plat/omap_hwmod.h> -#include <plat/serial.h> +#include "omap_hwmod.h" #include "l3_2xxx.h" #include "l4_2xxx.h" +#include "serial.h" #include "omap_hwmod_common_data.h" diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index bd9220ed5ab9..a0116d08cf45 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -8,13 +8,13 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <plat/omap_hwmod.h> -#include <plat/serial.h> + #include <linux/platform_data/gpio-omap.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> #include <plat/dmtimer.h> #include <linux/platform_data/spi-omap2-mcspi.h> +#include "omap_hwmod.h" #include "omap_hwmod_common_data.h" #include "cm-regbits-24xx.h" #include "prm-regbits-24xx.h" diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 59d5c1cd316d..ad8d43b33273 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -14,13 +14,11 @@ * GNU General Public License for more details. */ -#include <plat/omap_hwmod.h> -#include <plat/cpu.h> +#include <linux/i2c-omap.h> + +#include "omap_hwmod.h" #include <linux/platform_data/gpio-omap.h> #include <linux/platform_data/spi-omap2-mcspi.h> -#include <plat/dma.h> -#include <plat/mmc.h> -#include <plat/i2c.h> #include "omap_hwmod_common_data.h" @@ -28,6 +26,8 @@ #include "cm33xx.h" #include "prm33xx.h" #include "prm-regbits-33xx.h" +#include "i2c.h" +#include "mmc.h" /* * IP blocks diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 621bc7137233..1150f823f24e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -14,16 +14,14 @@ * * XXX these should be marked initdata for multi-OMAP kernels */ + +#include <linux/i2c-omap.h> #include <linux/power/smartreflex.h> #include <linux/platform_data/gpio-omap.h> -#include <plat/omap_hwmod.h> -#include <plat/dma.h> -#include <plat/serial.h> +#include <plat-omap/dma-omap.h> #include "l3_3xxx.h" #include "l4_3xxx.h" -#include <plat/i2c.h> -#include <plat/mmc.h> #include <linux/platform_data/asoc-ti-mcbsp.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/platform_data/iommu-omap.h> @@ -32,10 +30,16 @@ #include "am35xx.h" #include "soc.h" +#include "omap_hwmod.h" #include "omap_hwmod_common_data.h" #include "prm-regbits-34xx.h" #include "cm-regbits-34xx.h" + +#include "dma.h" +#include "i2c.h" +#include "mmc.h" #include "wd_timer.h" +#include "serial.h" /* * OMAP3xxx hardware module integration data diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 5850b3e81512..224bbaf73f32 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -21,22 +21,23 @@ #include <linux/io.h> #include <linux/platform_data/gpio-omap.h> #include <linux/power/smartreflex.h> +#include <linux/i2c-omap.h> + +#include <plat-omap/dma-omap.h> -#include <plat/omap_hwmod.h> -#include <plat/i2c.h> -#include <plat/dma.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/platform_data/asoc-ti-mcbsp.h> #include <linux/platform_data/iommu-omap.h> -#include <plat/mmc.h> #include <plat/dmtimer.h> -#include <plat/common.h> +#include "omap_hwmod.h" #include "omap_hwmod_common_data.h" #include "cm1_44xx.h" #include "cm2_44xx.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" +#include "i2c.h" +#include "mmc.h" #include "wd_timer.h" /* Base offset for all OMAP4 interrupts external to MPUSS */ diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c index 9f1ccdc8cc8c..79d623b83e49 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c @@ -16,7 +16,7 @@ * data and their integration with other OMAP modules and Linux. */ -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" #include "omap_hwmod_common_data.h" diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 2bc8f1705d4a..cfcce299177c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -13,7 +13,7 @@ #ifndef __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H #define __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" #include "common.h" #include "display.h" diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h index c784c12f98a1..7e437bf6024c 100644 --- a/arch/arm/mach-omap2/omap_opp_data.h +++ b/arch/arm/mach-omap2/omap_opp_data.h @@ -19,7 +19,7 @@ #ifndef __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H #define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" #include "voltage.h" diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index d992db8ff0b0..4d76a3ca5bf3 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c @@ -27,11 +27,11 @@ #include <linux/io.h> #include <linux/err.h> #include <linux/usb.h> - -#include <plat/usb.h> +#include <linux/usb/musb.h> #include "soc.h" #include "control.h" +#include "usb.h" void am35x_musb_reset(void) { diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index f515a1a056d5..2bf35dc091be 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -18,6 +18,7 @@ #include <linux/kernel.h> #include <linux/i2c/twl.h> +#include "soc.h" #include "voltage.h" #include "pm.h" diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c index 58e16aef40bb..bd41d59a7cab 100644 --- a/arch/arm/mach-omap2/opp.c +++ b/arch/arm/mach-omap2/opp.c @@ -20,7 +20,7 @@ #include <linux/opp.h> #include <linux/cpu.h> -#include <plat/omap_device.h> +#include "omap_device.h" #include "omap_opp_data.h" diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c index 75cef5f67a8a..62772e0e0d69 100644 --- a/arch/arm/mach-omap2/opp3xxx_data.c +++ b/arch/arm/mach-omap2/opp3xxx_data.c @@ -19,6 +19,7 @@ */ #include <linux/module.h> +#include "soc.h" #include "control.h" #include "omap_opp_data.h" #include "pm.h" diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 46092cd806fa..3cf4fdfd7ab0 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -27,12 +27,13 @@ #include <linux/module.h> #include <linux/slab.h> -#include <plat/clock.h> +#include "clock.h" #include "powerdomain.h" #include "clockdomain.h" #include <plat/dmtimer.h> -#include <plat/omap-pm.h> +#include "omap-pm.h" +#include "soc.h" #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" #include "pm.h" diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index ea61c32957bd..331478f9b864 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -20,10 +20,11 @@ #include <asm/system_misc.h> -#include <plat/omap-pm.h> -#include <plat/omap_device.h> +#include "omap-pm.h" +#include "omap_device.h" #include "common.h" +#include "soc.h" #include "prcm-common.h" #include "voltage.h" #include "powerdomain.h" diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 686137d164da..67d66131cfa7 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void); #define PM_RTA_ERRATUM_i608 (1 << 0) #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) +#define PM_PER_MEMORIES_ERRATUM_i582 (1 << 2) #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) extern u16 pm34xx_errata; diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 8af6cd6ac331..13e1f4303989 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -31,21 +31,24 @@ #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> +#include <asm/fncpy.h> + #include <asm/mach/time.h> #include <asm/mach/irq.h> #include <asm/mach-types.h> #include <asm/system_misc.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> +#include "soc.h" #include "common.h" -#include "prm2xxx_3xxx.h" +#include "clock.h" +#include "prm2xxx.h" #include "prm-regbits-24xx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" +#include "sram.h" #include "pm.h" #include "control.h" #include "powerdomain.h" diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index ba670db1fd37..a8b43da0b6f4 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -32,25 +32,25 @@ #include <trace/events/power.h> +#include <asm/fncpy.h> #include <asm/suspend.h> #include <asm/system_misc.h> -#include <plat/sram.h> #include "clockdomain.h" #include "powerdomain.h" -#include <plat/sdrc.h> #include <plat/prcm.h> -#include <plat/gpmc.h> -#include <plat/dma.h> +#include <plat-omap/dma-omap.h> +#include "soc.h" #include "common.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" +#include "gpmc.h" #include "prm-regbits-34xx.h" - -#include "prm2xxx_3xxx.h" +#include "prm3xxx.h" #include "pm.h" #include "sdrc.h" +#include "sram.h" #include "control.h" /* pm34xx errata defined in pm.h */ @@ -652,14 +652,17 @@ static void __init pm_errata_configure(void) /* Enable the l2 cache toggling in sleep logic */ enable_omap3630_toggle_l2_on_restore(); if (omap_rev() < OMAP3630_REV_ES1_2) - pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583; + pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 | + PM_PER_MEMORIES_ERRATUM_i582); + } else if (cpu_is_omap34xx()) { + pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582; } } int __init omap3_pm_init(void) { struct power_state *pwrst, *tmp; - struct clockdomain *neon_clkdm, *mpu_clkdm; + struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm; int ret; if (!omap3_has_io_chain_ctrl()) @@ -711,6 +714,8 @@ int __init omap3_pm_init(void) neon_clkdm = clkdm_lookup("neon_clkdm"); mpu_clkdm = clkdm_lookup("mpu_clkdm"); + per_clkdm = clkdm_lookup("per_clkdm"); + wkup_clkdm = clkdm_lookup("wkup_clkdm"); #ifdef CONFIG_SUSPEND omap_pm_suspend = omap3_pm_suspend; @@ -727,6 +732,27 @@ int __init omap3_pm_init(void) if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608)) omap3630_ctrl_disable_rta(); + /* + * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are + * not correctly reset when the PER powerdomain comes back + * from OFF or OSWR when the CORE powerdomain is kept active. + * See OMAP36xx Erratum i582 "PER Domain reset issue after + * Domain-OFF/OSWR Wakeup". This wakeup dependency is not a + * complete workaround. The kernel must also prevent the PER + * powerdomain from going to OSWR/OFF while the CORE + * powerdomain is not going to OSWR/OFF. And if PER last + * power state was off while CORE last power state was ON, the + * UART3/4 and McBSP2/3 SIDETONE devices need to run a + * self-test using their loopback tests; if that fails, those + * devices are unusable until the PER/CORE can complete a transition + * from ON to OSWR/OFF and then back to ON. + * + * XXX Technically this workaround is only needed if off-mode + * or OSWR is enabled. + */ + if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582)) + clkdm_add_wkdep(per_clkdm, wkup_clkdm); + clkdm_add_wkdep(neon_clkdm, mpu_clkdm); if (omap_type() != OMAP2_DEVICE_TYPE_GP) { omap3_secure_ram_storage = diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 04922d149068..7da75aed1514 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -18,6 +18,7 @@ #include <linux/slab.h> #include <asm/system_misc.h> +#include "soc.h" #include "common.h" #include "clockdomain.h" #include "powerdomain.h" diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c index 2a791766283d..3cf79b54ce61 100644 --- a/arch/arm/mach-omap2/pmu.c +++ b/arch/arm/mach-omap2/pmu.c @@ -15,8 +15,9 @@ #include <asm/pmu.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> +#include "soc.h" +#include "omap_hwmod.h" +#include "omap_device.h" static char *omap2_pmu_oh_names[] = {"mpu"}; static char *omap3_pmu_oh_names[] = {"mpu", "debugss"}; diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index baee90608d11..5277d56eb37f 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -22,8 +22,6 @@ #include <linux/atomic.h> -#include <plat/cpu.h> - #include "voltage.h" /* Powerdomain basic power states */ diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c deleted file mode 100644 index 3950ccfe5f4a..000000000000 --- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - * OMAP2 and OMAP3 powerdomain control - * - * Copyright (C) 2009-2011 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation - * - * Derived from mach-omap2/powerdomain.c written by Paul Walmsley - * Rajendra Nayak <rnayak@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/io.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/bug.h> - -#include <plat/prcm.h> - -#include "powerdomain.h" -#include "prm.h" -#include "prm-regbits-24xx.h" -#include "prm-regbits-34xx.h" - - -/* Common functions across OMAP2 and OMAP3 */ -static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); - return 0; -} - -static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, - OMAP_POWERSTATE_MASK); -} - -static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTST, - OMAP_POWERSTATEST_MASK); -} - -static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); - - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_stst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, - m); -} - -static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, m); -} - -static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 v; - - v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); - omap2_prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & - OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -/* Applicable only for OMAP3. Not supported on OMAP2 */ -static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, - OMAP3430_LASTPOWERSTATEENTERED_MASK); -} - -static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTST, - OMAP3430_LOGICSTATEST_MASK); -} - -static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, - OMAP3430_LOGICSTATEST_MASK); -} - -static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, - OMAP3430_LASTLOGICSTATEENTERED_MASK); -} - -static int omap3_get_mem_bank_lastmemst_mask(u8 bank) -{ - switch (bank) { - case 0: - return OMAP3430_LASTMEM1STATEENTERED_MASK; - case 1: - return OMAP3430_LASTMEM2STATEENTERED_MASK; - case 2: - return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; - case 3: - return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; - default: - WARN_ON(1); /* should never happen */ - return -EEXIST; - } - return 0; -} - -static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap3_get_mem_bank_lastmemst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, m); -} - -static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); - return 0; -} - -static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) -{ - return omap2_prm_rmw_mod_reg_bits(0, - 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); -} - -static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) -{ - return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, - 0, pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); -} - -struct pwrdm_ops omap2_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, - .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, - .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, - .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, - .pwrdm_wait_transition = omap2_pwrdm_wait_transition, -}; - -struct pwrdm_ops omap3_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, - .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, - .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst, - .pwrdm_read_prev_logic_pwrst = omap3_pwrdm_read_prev_logic_pwrst, - .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, - .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, - .pwrdm_read_prev_mem_pwrst = omap3_pwrdm_read_prev_mem_pwrst, - .pwrdm_clear_all_prev_pwrst = omap3_pwrdm_clear_all_prev_pwrst, - .pwrdm_enable_hdwr_sar = omap3_pwrdm_enable_hdwr_sar, - .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar, - .pwrdm_wait_transition = omap2_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/powerdomain33xx.c b/arch/arm/mach-omap2/powerdomain33xx.c deleted file mode 100644 index 67c5663899b6..000000000000 --- a/arch/arm/mach-omap2/powerdomain33xx.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * AM33XX Powerdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * Derived from mach-omap2/powerdomain44xx.c written by Rajendra Nayak - * <rnayak@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/io.h> -#include <linux/errno.h> -#include <linux/delay.h> - -#include <plat/prcm.h> - -#include "powerdomain.h" -#include "prm33xx.h" -#include "prm-regbits-33xx.h" - - -static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= OMAP_POWERSTATE_MASK; - v >>= OMAP_POWERSTATE_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= OMAP_POWERSTATEST_MASK; - v >>= OMAP_POWERSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LASTPOWERSTATEENTERED_MASK; - v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT; - - return v; -} - -static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK, - (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK, - AM33XX_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_offs, pwrdm->pwrstst_offs); - return 0; -} - -static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LOGICSTATEST_MASK; - v >>= AM33XX_LOGICSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - u32 v, m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_on_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_ret_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_pwrst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_retst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs) - & OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -struct pwrdm_ops am33xx_pwrdm_operations = { - .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst, - .pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst, - .pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst, - .pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst, - .pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange, - .pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst, - .pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst, - .pwrdm_wait_transition = am33xx_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c deleted file mode 100644 index aceb4f464c9b..000000000000 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ /dev/null @@ -1,285 +0,0 @@ -/* - * OMAP4 powerdomain control - * - * Copyright (C) 2009-2010, 2012 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation - * - * Derived from mach-omap2/powerdomain.c written by Paul Walmsley - * Rajendra Nayak <rnayak@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/io.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/bug.h> - -#include "powerdomain.h" -#include <plat/prcm.h> -#include "prm2xxx_3xxx.h" -#include "prm44xx.h" -#include "prminst44xx.h" -#include "prm-regbits-44xx.h" - -static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); - return 0; -} - -static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= OMAP_POWERSTATE_MASK; - v >>= OMAP_POWERSTATE_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP_POWERSTATEST_MASK; - v >>= OMAP_POWERSTATEST_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; - v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; - - return v; -} - -static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, - (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); - return 0; -} - -static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, - OMAP4430_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTST); - return 0; -} - -static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 v; - - v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); - - omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP4430_LOGICSTATEST_MASK; - v >>= OMAP4430_LOGICSTATEST_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= OMAP4430_LOGICRETSTATE_MASK; - v >>= OMAP4430_LOGICRETSTATE_SHIFT; - - return v; -} - -/** - * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate - * @pwrdm: struct powerdomain * to read the state for - * - * Reads the previous logic powerstate for a powerdomain. This - * function must determine the previous logic powerstate by first - * checking the previous powerstate for the domain. If that was OFF, - * then logic has been lost. If previous state was RETENTION, the - * function reads the setting for the next retention logic state to - * see the actual value. In every other case, the logic is - * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET - * depending whether the logic was retained or not. - */ -static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) -{ - int state; - - state = omap4_pwrdm_read_prev_pwrst(pwrdm); - - if (state == PWRDM_POWER_OFF) - return PWRDM_POWER_OFF; - - if (state != PWRDM_POWER_RET) - return PWRDM_POWER_RET; - - return omap4_pwrdm_read_logic_retst(pwrdm); -} - -static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = omap2_pwrdm_get_mem_bank_stst_mask(bank); - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= m; - v >>= __ffs(m); - - return v; -} - -/** - * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate - * @pwrdm: struct powerdomain * to read mem powerstate for - * @bank: memory bank index - * - * Reads the previous memory powerstate for a powerdomain. This - * function must determine the previous memory powerstate by first - * checking the previous powerstate for the domain. If that was OFF, - * then logic has been lost. If previous state was RETENTION, the - * function reads the setting for the next memory retention state to - * see the actual value. In every other case, the logic is - * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET - * depending whether logic was retained or not. - */ -static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - int state; - - state = omap4_pwrdm_read_prev_pwrst(pwrdm); - - if (state == PWRDM_POWER_OFF) - return PWRDM_POWER_OFF; - - if (state != PWRDM_POWER_RET) - return PWRDM_POWER_RET; - - return omap4_pwrdm_read_mem_retst(pwrdm, bank); -} - -static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, - pwrdm->prcm_offs, - OMAP4_PM_PWSTST) & - OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -struct pwrdm_ops omap4_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, - .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange, - .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst, - .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, - .pwrdm_read_prev_logic_pwrst = omap4_pwrdm_read_prev_logic_pwrst, - .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, - .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst, - .pwrdm_read_prev_mem_pwrst = omap4_pwrdm_read_prev_mem_pwrst, - .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst, - .pwrdm_wait_transition = omap4_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c index 2385c1f009ee..ba520d4f7c7b 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c @@ -14,6 +14,7 @@ #include <linux/kernel.h> #include <linux/init.h> +#include "soc.h" #include "powerdomain.h" #include "powerdomains2xxx_3xxx_data.h" diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 0f51e034e0aa..cff270a178c5 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -28,6 +28,7 @@ #include "common.h" #include <plat/prcm.h> +#include "soc.h" #include "clock.h" #include "clock2xxx.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h index 6ac966103f34..638da6dd41c3 100644 --- a/arch/arm/mach-omap2/prm-regbits-24xx.h +++ b/arch/arm/mach-omap2/prm-regbits-24xx.h @@ -14,7 +14,7 @@ * published by the Free Software Foundation. */ -#include "prm2xxx_3xxx.h" +#include "prm2xxx.h" /* Bits shared between registers */ @@ -209,9 +209,13 @@ /* RM_RSTST_WKUP specific bits */ /* 2430 calls EXTWMPU_RST "EXTWARM_RST" and GLOBALWMPU_RST "GLOBALWARM_RST" */ +#define OMAP24XX_EXTWMPU_RST_SHIFT 6 #define OMAP24XX_EXTWMPU_RST_MASK (1 << 6) +#define OMAP24XX_SECU_WD_RST_SHIFT 5 #define OMAP24XX_SECU_WD_RST_MASK (1 << 5) +#define OMAP24XX_MPU_WD_RST_SHIFT 4 #define OMAP24XX_MPU_WD_RST_MASK (1 << 4) +#define OMAP24XX_SECU_VIOL_RST_SHIFT 3 #define OMAP24XX_SECU_VIOL_RST_MASK (1 << 3) /* PM_WKEN_WKUP specific bits */ diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index 64c087af6a8b..838b594d4e13 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -14,7 +14,7 @@ #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_34XX_H -#include "prm2xxx_3xxx.h" +#include "prm3xxx.h" /* Shared register bits */ @@ -509,15 +509,25 @@ #define OMAP3430_RSTTIME1_MASK (0xff << 0) /* PRM_RSTST */ +#define OMAP3430_ICECRUSHER_RST_SHIFT 10 #define OMAP3430_ICECRUSHER_RST_MASK (1 << 10) +#define OMAP3430_ICEPICK_RST_SHIFT 9 #define OMAP3430_ICEPICK_RST_MASK (1 << 9) +#define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT 8 #define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_MASK (1 << 8) +#define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT 7 #define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_MASK (1 << 7) +#define OMAP3430_EXTERNAL_WARM_RST_SHIFT 6 #define OMAP3430_EXTERNAL_WARM_RST_MASK (1 << 6) +#define OMAP3430_SECURE_WD_RST_SHIFT 5 #define OMAP3430_SECURE_WD_RST_MASK (1 << 5) +#define OMAP3430_MPU_WD_RST_SHIFT 4 #define OMAP3430_MPU_WD_RST_MASK (1 << 4) +#define OMAP3430_SECURITY_VIOL_RST_SHIFT 3 #define OMAP3430_SECURITY_VIOL_RST_MASK (1 << 3) +#define OMAP3430_GLOBAL_SW_RST_SHIFT 1 #define OMAP3430_GLOBAL_SW_RST_MASK (1 << 1) +#define OMAP3430_GLOBAL_COLD_RST_SHIFT 0 #define OMAP3430_GLOBAL_COLD_RST_MASK (1 << 0) /* PRM_VOLTCTRL */ diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 39d562169d18..c30ab5de8d1d 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -52,5 +52,58 @@ #define OMAP_POWERSTATE_SHIFT 0 #define OMAP_POWERSTATE_MASK (0x3 << 0) +/* + * Standardized OMAP reset source bits + * + * To the extent these happen to match the hardware register bit + * shifts, it's purely coincidental. Used by omap-wdt.c. + * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever + * there are any bits remaining in the global PRM_RSTST register that + * haven't been identified, or when the PRM code for the current SoC + * doesn't know how to interpret the register. + */ +#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 +#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 +#define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT 2 +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 +#define OMAP_SECU_WD_RST_SRC_ID_SHIFT 4 +#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 +#define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT 6 +#define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT 7 +#define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT 8 +#define OMAP_ICEPICK_RST_SRC_ID_SHIFT 9 +#define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT 10 +#define OMAP_C2C_RST_SRC_ID_SHIFT 11 +#define OMAP_UNKNOWN_RST_SRC_ID_SHIFT 12 + +#ifndef __ASSEMBLER__ + +/** + * struct prm_reset_src_map - map register bitshifts to standard bitshifts + * @reg_shift: bitshift in the PRM reset source register + * @std_shift: bitshift equivalent in the standard reset source list + * + * The fields are signed because -1 is used as a terminator. + */ +struct prm_reset_src_map { + s8 reg_shift; + s8 std_shift; +}; + +/** + * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations + * @read_reset_sources: ptr to the Soc PRM-specific get_reset_source impl + */ +struct prm_ll_data { + u32 (*read_reset_sources)(void); +}; + +extern int prm_register(struct prm_ll_data *pld); +extern int prm_unregister(struct prm_ll_data *pld); + +extern u32 prm_read_reset_sources(void); + +#endif + #endif diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c new file mode 100644 index 000000000000..e2860f9c111d --- /dev/null +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -0,0 +1,126 @@ +/* + * OMAP2xxx PRM module functions + * + * Copyright (C) 2010-2012 Texas Instruments, Inc. + * Copyright (C) 2010 Nokia Corporation + * Benoît Cousson + * Paul Walmsley + * Rajendra Nayak <rnayak@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/irq.h> + +#include "common.h" +#include <plat/cpu.h> +#include <plat/prcm.h> + +#include "vp.h" +#include "powerdomain.h" +#include "clockdomain.h" +#include "prm2xxx.h" +#include "cm2xxx_3xxx.h" +#include "prm-regbits-24xx.h" + +/* + * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP + * hardware register (which are specific to the OMAP2xxx SoCs) to + * reset source ID bit shifts (which is an OMAP SoC-independent + * enumeration) + */ +static struct prm_reset_src_map omap2xxx_prm_reset_src_map[] = { + { OMAP_GLOBALCOLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP_GLOBALWARM_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP24XX_SECU_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP24XX_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP24XX_SECU_WD_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT }, + { OMAP24XX_EXTWMPU_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + +/** + * omap2xxx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap2xxx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); + + p = omap2xxx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + +int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) +{ + omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, + clkdm->pwrdm.ptr->prcm_offs, + OMAP2_PM_PWSTCTRL); + return 0; +} + +int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm) +{ + omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, + clkdm->pwrdm.ptr->prcm_offs, + OMAP2_PM_PWSTCTRL); + return 0; +} + +struct pwrdm_ops omap2_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, + .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, + .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, + .pwrdm_wait_transition = omap2_pwrdm_wait_transition, +}; + +/* + * + */ + +static struct prm_ll_data omap2xxx_prm_ll_data = { + .read_reset_sources = &omap2xxx_prm_read_reset_sources, +}; + +static int __init omap2xxx_prm_init(void) +{ + if (!cpu_is_omap24xx()) + return 0; + + return prm_register(&omap2xxx_prm_ll_data); +} +subsys_initcall(omap2xxx_prm_init); + +static void __exit omap2xxx_prm_exit(void) +{ + if (!cpu_is_omap24xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap2xxx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap2xxx_prm_exit); diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h new file mode 100644 index 000000000000..1d97112524f1 --- /dev/null +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -0,0 +1,132 @@ +/* + * OMAP2xxx Power/Reset Management (PRM) register definitions + * + * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The PRM hardware modules on the OMAP2/3 are quite similar to each + * other. The PRM on OMAP4 has a new register layout, and is handled + * in a separate file. + */ +#ifndef __ARCH_ARM_MACH_OMAP2_PRM2XXX_H +#define __ARCH_ARM_MACH_OMAP2_PRM2XXX_H + +#include "prcm-common.h" +#include "prm.h" +#include "prm2xxx_3xxx.h" + +#define OMAP2420_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) +#define OMAP2430_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) + +/* + * OMAP2-specific global PRM registers + * Use __raw_{read,write}l() with these registers. + * + * With a few exceptions, these are the register names beginning with + * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE + * bits.) + * + */ + +#define OMAP2_PRCM_REVISION_OFFSET 0x0000 +#define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) +#define OMAP2_PRCM_SYSCONFIG_OFFSET 0x0010 +#define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) + +#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018 +#define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c +#define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) + +#define OMAP2_PRCM_VOLTCTRL_OFFSET 0x0050 +#define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) +#define OMAP2_PRCM_VOLTST_OFFSET 0x0054 +#define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) +#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET 0x0060 +#define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) +#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) +#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET 0x0078 +#define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) +#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET 0x0080 +#define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) +#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084 +#define OMAP2420_PRCM_CLKCFG_STATUS OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084) +#define OMAP2_PRCM_VOLTSETUP_OFFSET 0x0090 +#define OMAP2420_PRCM_VOLTSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090) +#define OMAP2_PRCM_CLKSSETUP_OFFSET 0x0094 +#define OMAP2420_PRCM_CLKSSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094) +#define OMAP2_PRCM_POLCTRL_OFFSET 0x0098 +#define OMAP2420_PRCM_POLCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098) + +#define OMAP2430_PRCM_REVISION OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000) +#define OMAP2430_PRCM_SYSCONFIG OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010) + +#define OMAP2430_PRCM_IRQSTATUS_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP2430_PRCM_IRQENABLE_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c) + +#define OMAP2430_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050) +#define OMAP2430_PRCM_VOLTST OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054) +#define OMAP2430_PRCM_CLKSRC_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060) +#define OMAP2430_PRCM_CLKOUT_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070) +#define OMAP2430_PRCM_CLKEMUL_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078) +#define OMAP2430_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080) +#define OMAP2430_PRCM_CLKCFG_STATUS OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084) +#define OMAP2430_PRCM_VOLTSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090) +#define OMAP2430_PRCM_CLKSSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094) +#define OMAP2430_PRCM_POLCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098) + +/* + * Module specific PRM register offsets from PRM_BASE + domain offset + * + * Use prm_{read,write}_mod_reg() with these registers. + * + * With a few exceptions, these are the register names beginning with + * {PM,RM}_* on both OMAP2/3 SoC families.. (The exceptions are the + * IRQSTATUS and IRQENABLE bits.) + */ + +/* Register offsets appearing on both OMAP2 and OMAP3 */ + +#define OMAP2_RM_RSTCTRL 0x0050 +#define OMAP2_RM_RSTTIME 0x0054 +#define OMAP2_RM_RSTST 0x0058 +#define OMAP2_PM_PWSTCTRL 0x00e0 +#define OMAP2_PM_PWSTST 0x00e4 + +#define PM_WKEN 0x00a0 +#define PM_WKEN1 PM_WKEN +#define PM_WKST 0x00b0 +#define PM_WKST1 PM_WKST +#define PM_WKDEP 0x00c8 +#define PM_EVGENCTRL 0x00d4 +#define PM_EVGENONTIM 0x00d8 +#define PM_EVGENOFFTIM 0x00dc + +/* OMAP2xxx specific register offsets */ +#define OMAP24XX_PM_WKEN2 0x00a4 +#define OMAP24XX_PM_WKST2 0x00b4 + +#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ +#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ +#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 +#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc + +#ifndef __ASSEMBLER__ +/* Function prototypes */ +extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); +extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); + +extern int __init prm2xxx_init(void); +extern int __exit prm2xxx_exit(void); + +#endif + +#endif diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 9529984d8d2b..30517f5af707 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -15,82 +15,12 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/io.h> -#include <linux/irq.h> -#include <plat/prcm.h> - -#include "soc.h" #include "common.h" -#include "vp.h" - +#include "powerdomain.h" #include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" #include "prm-regbits-24xx.h" -#include "prm-regbits-34xx.h" - -static const struct omap_prcm_irq omap3_prcm_irqs[] = { - OMAP_PRCM_IRQ("wkup", 0, 0), - OMAP_PRCM_IRQ("io", 9, 1), -}; - -static struct omap_prcm_irq_setup omap3_prcm_irq_setup = { - .ack = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .mask = OMAP3_PRM_IRQENABLE_MPU_OFFSET, - .nr_regs = 1, - .irqs = omap3_prcm_irqs, - .nr_irqs = ARRAY_SIZE(omap3_prcm_irqs), - .irq = 11 + OMAP_INTC_START, - .read_pending_irqs = &omap3xxx_prm_read_pending_irqs, - .ocp_barrier = &omap3xxx_prm_ocp_barrier, - .save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen, - .restore_irqen = &omap3xxx_prm_restore_irqen, -}; - -u32 omap2_prm_read_mod_reg(s16 module, u16 idx) -{ - return __raw_readl(prm_base + module + idx); -} - -void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - __raw_writel(val, prm_base + module + idx); -} - -/* Read-modify-write a register in a PRM module. Caller must lock */ -u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) -{ - u32 v; - - v = omap2_prm_read_mod_reg(module, idx); - v &= ~mask; - v |= bits; - omap2_prm_write_mod_reg(v, module, idx); - - return v; -} - -/* Read a PRM register, AND it, and shift the result down to bit 0 */ -u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) -{ - u32 v; - - v = omap2_prm_read_mod_reg(domain, idx); - v &= mask; - v >>= __ffs(mask); - - return v; -} - -u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx); -} - -u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx); -} - +#include "clockdomain.h" /** * omap2_prm_is_hardreset_asserted - read the HW reset line state of @@ -104,9 +34,6 @@ u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) */ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) { - if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) - return -EINVAL; - return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, (1 << shift)); } @@ -127,9 +54,6 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) { u32 mask; - if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) - return -EINVAL; - mask = 1 << shift; omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL); @@ -156,9 +80,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) u32 rst, st; int c; - if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) - return -EINVAL; - rst = 1 << rst_shift; st = 1 << st_shift; @@ -178,188 +99,155 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } -/* PRM VP */ - -/* - * struct omap3_vp - OMAP3 VP register access description. - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg - */ -struct omap3_vp { - u32 tranxdone_status; -}; - -static struct omap3_vp omap3_vp[] = { - [OMAP3_VP_VDD_MPU_ID] = { - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, - }, - [OMAP3_VP_VDD_CORE_ID] = { - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, - }, -}; - -#define MAX_VP_ID ARRAY_SIZE(omap3_vp); - -u32 omap3_prm_vp_check_txdone(u8 vp_id) -{ - struct omap3_vp *vp = &omap3_vp[vp_id]; - u32 irqstatus; - irqstatus = omap2_prm_read_mod_reg(OCP_MOD, - OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - return irqstatus & vp->tranxdone_status; -} +/* Powerdomain low-level functions */ -void omap3_prm_vp_clear_txdone(u8 vp_id) +/* Common functions across OMAP2 and OMAP3 */ +int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { - struct omap3_vp *vp = &omap3_vp[vp_id]; - - omap2_prm_write_mod_reg(vp->tranxdone_status, - OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); + return 0; } -u32 omap3_prm_vcvp_read(u8 offset) +int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) { - return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); } -void omap3_prm_vcvp_write(u32 val, u8 offset) +int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) { - omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP_POWERSTATEST_MASK); } -u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) { - return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); + u32 m; + + m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); + + omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); + + return 0; } -/** - * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events - * @events: ptr to a u32, preallocated by caller - * - * Read PRM_IRQSTATUS_MPU bits, AND'ed with the currently-enabled PRM - * MPU IRQs, and store the result into the u32 pointed to by @events. - * No return value. - */ -void omap3xxx_prm_read_pending_irqs(unsigned long *events) +int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) { - u32 mask, st; + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - /* XXX Can the mask read be avoided (e.g., can it come from RAM?) */ - mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); - st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); - events[0] = mask & st; + return 0; } -/** - * omap3xxx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete - * - * Force any buffered writes to the PRM IP block to complete. Needed - * by the PRM IRQ handler, which reads and writes directly to the IP - * block, to avoid race conditions after acknowledging or clearing IRQ - * bits. No return value. - */ -void omap3xxx_prm_ocp_barrier(void) +int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) { - omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); + u32 m; + + m = omap2_pwrdm_get_mem_bank_stst_mask(bank); + + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, + m); } -/** - * omap3xxx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU reg - * @saved_mask: ptr to a u32 array to save IRQENABLE bits - * - * Save the PRM_IRQENABLE_MPU register to @saved_mask. @saved_mask - * must be allocated by the caller. Intended to be used in the PRM - * interrupt handler suspend callback. The OCP barrier is needed to - * ensure the write to disable PRM interrupts reaches the PRM before - * returning; otherwise, spurious interrupts might occur. No return - * value. - */ -void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask) +int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) { - saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD, - OMAP3_PRM_IRQENABLE_MPU_OFFSET); - omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - /* OCP barrier */ - omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, m); } -/** - * omap3xxx_prm_restore_irqen - set PRM_IRQENABLE_MPU register from args - * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously - * - * Restore the PRM_IRQENABLE_MPU register from @saved_mask. Intended - * to be used in the PRM interrupt handler resume callback to restore - * values saved by omap3xxx_prm_save_and_clear_irqen(). No OCP - * barrier should be needed here; any pending PRM interrupts will fire - * once the writes reach the PRM. No return value. - */ -void omap3xxx_prm_restore_irqen(u32 *saved_mask) +int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) { - omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD, - OMAP3_PRM_IRQENABLE_MPU_OFFSET); + u32 v; + + v = pwrst << __ffs(OMAP_LOGICRETSTATE_MASK); + omap2_prm_rmw_mod_reg_bits(OMAP_LOGICRETSTATE_MASK, v, pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); + + return 0; } -/** - * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain - * - * Clear any previously-latched I/O wakeup events and ensure that the - * I/O wakeup gates are aligned with the current mux settings. Works - * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then - * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No - * return value. - */ -void omap3xxx_prm_reconfigure_io_chain(void) +int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) { - int i = 0; + u32 c = 0; - omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, - PM_WKEN); + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ - omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) & - OMAP3430_ST_IO_CHAIN_MASK, - MAX_IOPAD_LATCH_TIME, i); - if (i == MAX_IOPAD_LATCH_TIME) - pr_warn("PRM: I/O chain clock line assertion timed out\n"); + /* XXX Is this udelay() value meaningful? */ + while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & + OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); - omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, - PM_WKEN); + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; + } - omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD, - PM_WKST); + pr_debug("powerdomain: completed transition in %d loops\n", c); - omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST); + return 0; } -/** - * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches - * - * Activates the I/O wakeup event latches and allows events logged by - * those latches to signal a wakeup event to the PRCM. For I/O - * wakeups to occur, WAKEUPENABLE bits must be set in the pad mux - * registers, and omap3xxx_prm_reconfigure_io_chain() must be called. - * No return value. - */ -static void __init omap3xxx_prm_enable_io_wakeup(void) +int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) { - if (omap3_has_io_wakeup()) - omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, - PM_WKEN); + return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + PM_WKDEP, (1 << clkdm2->dep_bit)); } -static int __init omap3xxx_prcm_init(void) +int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) { - int ret = 0; - - if (cpu_is_omap34xx()) { - omap3xxx_prm_enable_io_wakeup(); - ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); - if (!ret) - irq_set_status_flags(omap_prcm_event_to_irq("io"), - IRQ_NOAUTOEN); + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + /* PRM accesses are slow, so minimize them */ + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->wkdep_usecount, 0); } - return ret; + omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + PM_WKDEP); + return 0; } -subsys_initcall(omap3xxx_prcm_init); + diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index c19d249b4816..3330b1bf789d 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -1,7 +1,7 @@ /* - * OMAP2/3 Power/Reset Management (PRM) register definitions + * OMAP2xxx/3xxx-common Power/Reset Management (PRM) register definitions * - * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc. + * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. * Copyright (C) 2008-2010 Nokia Corporation * Paul Walmsley * @@ -19,160 +19,6 @@ #include "prcm-common.h" #include "prm.h" -#define OMAP2420_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) -#define OMAP2430_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) -#define OMAP34XX_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) - - -/* - * OMAP2-specific global PRM registers - * Use __raw_{read,write}l() with these registers. - * - * With a few exceptions, these are the register names beginning with - * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE - * bits.) - * - */ - -#define OMAP2_PRCM_REVISION_OFFSET 0x0000 -#define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2_PRCM_SYSCONFIG_OFFSET 0x0010 -#define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2_PRCM_VOLTCTRL_OFFSET 0x0050 -#define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2_PRCM_VOLTST_OFFSET 0x0054 -#define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET 0x0060 -#define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET 0x0078 -#define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET 0x0080 -#define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084 -#define OMAP2420_PRCM_CLKCFG_STATUS OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2_PRCM_VOLTSETUP_OFFSET 0x0090 -#define OMAP2420_PRCM_VOLTSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2_PRCM_CLKSSETUP_OFFSET 0x0094 -#define OMAP2420_PRCM_CLKSSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2_PRCM_POLCTRL_OFFSET 0x0098 -#define OMAP2420_PRCM_POLCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098) - -#define OMAP2430_PRCM_REVISION OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2430_PRCM_SYSCONFIG OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2430_PRCM_IRQSTATUS_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2430_PRCM_IRQENABLE_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2430_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2430_PRCM_VOLTST OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2430_PRCM_CLKSRC_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2430_PRCM_CLKOUT_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2430_PRCM_CLKEMUL_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2430_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2430_PRCM_CLKCFG_STATUS OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2430_PRCM_VOLTSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2430_PRCM_CLKSSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2430_PRCM_POLCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098) - -/* - * OMAP3-specific global PRM registers - * Use __raw_{read,write}l() with these registers. - * - * With a few exceptions, these are the register names beginning with - * PRM_* on 34xx. (The exceptions are the IRQSTATUS and IRQENABLE - * bits.) - */ - -#define OMAP3_PRM_REVISION_OFFSET 0x0004 -#define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) -#define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 -#define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) - -#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) - - -#define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 -#define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) -#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024 -#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024) -#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028 -#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028) -#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET 0x002c -#define OMAP3430_PRM_VC_CMD_VAL_0 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c) -#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET 0x0030 -#define OMAP3430_PRM_VC_CMD_VAL_1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030) -#define OMAP3_PRM_VC_CH_CONF_OFFSET 0x0034 -#define OMAP3430_PRM_VC_CH_CONF OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034) -#define OMAP3_PRM_VC_I2C_CFG_OFFSET 0x0038 -#define OMAP3430_PRM_VC_I2C_CFG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038) -#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET 0x003c -#define OMAP3430_PRM_VC_BYPASS_VAL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c) -#define OMAP3_PRM_RSTCTRL_OFFSET 0x0050 -#define OMAP3430_PRM_RSTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050) -#define OMAP3_PRM_RSTTIME_OFFSET 0x0054 -#define OMAP3430_PRM_RSTTIME OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054) -#define OMAP3_PRM_RSTST_OFFSET 0x0058 -#define OMAP3430_PRM_RSTST OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058) -#define OMAP3_PRM_VOLTCTRL_OFFSET 0x0060 -#define OMAP3430_PRM_VOLTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060) -#define OMAP3_PRM_SRAM_PCHARGE_OFFSET 0x0064 -#define OMAP3430_PRM_SRAM_PCHARGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064) -#define OMAP3_PRM_CLKSRC_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKSRC_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070) -#define OMAP3_PRM_VOLTSETUP1_OFFSET 0x0090 -#define OMAP3430_PRM_VOLTSETUP1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090) -#define OMAP3_PRM_VOLTOFFSET_OFFSET 0x0094 -#define OMAP3430_PRM_VOLTOFFSET OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094) -#define OMAP3_PRM_CLKSETUP_OFFSET 0x0098 -#define OMAP3430_PRM_CLKSETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098) -#define OMAP3_PRM_POLCTRL_OFFSET 0x009c -#define OMAP3430_PRM_POLCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c) -#define OMAP3_PRM_VOLTSETUP2_OFFSET 0x00a0 -#define OMAP3430_PRM_VOLTSETUP2 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0) -#define OMAP3_PRM_VP1_CONFIG_OFFSET 0x00b0 -#define OMAP3430_PRM_VP1_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0) -#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET 0x00b4 -#define OMAP3430_PRM_VP1_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4) -#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET 0x00b8 -#define OMAP3430_PRM_VP1_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8) -#define OMAP3_PRM_VP1_VLIMITTO_OFFSET 0x00bc -#define OMAP3430_PRM_VP1_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc) -#define OMAP3_PRM_VP1_VOLTAGE_OFFSET 0x00c0 -#define OMAP3430_PRM_VP1_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0) -#define OMAP3_PRM_VP1_STATUS_OFFSET 0x00c4 -#define OMAP3430_PRM_VP1_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4) -#define OMAP3_PRM_VP2_CONFIG_OFFSET 0x00d0 -#define OMAP3430_PRM_VP2_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0) -#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET 0x00d4 -#define OMAP3430_PRM_VP2_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4) -#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET 0x00d8 -#define OMAP3430_PRM_VP2_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8) -#define OMAP3_PRM_VP2_VLIMITTO_OFFSET 0x00dc -#define OMAP3430_PRM_VP2_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc) -#define OMAP3_PRM_VP2_VOLTAGE_OFFSET 0x00e0 -#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) -#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 -#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) - -#define OMAP3_PRM_CLKSEL_OFFSET 0x0040 -#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) -#define OMAP3_PRM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKOUT_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070) - /* * Module specific PRM register offsets from PRM_BASE + domain offset * @@ -200,66 +46,83 @@ #define PM_EVGENONTIM 0x00d8 #define PM_EVGENOFFTIM 0x00dc -/* OMAP2xxx specific register offsets */ -#define OMAP24XX_PM_WKEN2 0x00a4 -#define OMAP24XX_PM_WKST2 0x00b4 - -#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ -#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ -#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 -#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc - -/* OMAP3 specific register offsets */ -#define OMAP3430ES2_PM_WKEN3 0x00f0 -#define OMAP3430ES2_PM_WKST3 0x00b8 - -#define OMAP3430_PM_MPUGRPSEL 0x00a4 -#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL -#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8 -#define OMAP3430_PM_IVAGRPSEL 0x00a8 -#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL -#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4 - -#define OMAP3430_PM_PREPWSTST 0x00e8 - -#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8 -#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc +#ifndef __ASSEMBLER__ +#include <linux/io.h> +#include "powerdomain.h" -#ifndef __ASSEMBLER__ /* Power/reset management domain register get/set */ -extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx); -extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx); -extern u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); +static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx) +{ + return __raw_readl(prm_base + module + idx); +} + +static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + __raw_writel(val, prm_base + module + idx); +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, + s16 idx) +{ + u32 v; + + v = omap2_prm_read_mod_reg(module, idx); + v &= ~mask; + v |= bits; + omap2_prm_write_mod_reg(v, module, idx); + + return v; +} + +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; + + v = omap2_prm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx); +} + +static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx); +} /* These omap2_ PRM functions apply to both OMAP2 and 3 */ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); -/* OMAP3-specific VP functions */ -u32 omap3_prm_vp_check_txdone(u8 vp_id); -void omap3_prm_vp_clear_txdone(u8 vp_id); - -/* - * OMAP3 access functions for voltage controller (VC) and - * voltage proccessor (VP) in the PRM. - */ -extern u32 omap3_prm_vcvp_read(u8 offset); -extern void omap3_prm_vcvp_write(u32 val, u8 offset); -extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); - -extern void omap3xxx_prm_reconfigure_io_chain(void); - -/* PRM interrupt-related functions */ -extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); -extern void omap3xxx_prm_ocp_barrier(void); -extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); -extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); +extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); +extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm); +extern int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm); +extern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst); +extern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst); +extern int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); +extern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); +extern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); +extern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm); + +extern int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm); #endif /* __ASSEMBLER */ @@ -348,7 +211,9 @@ extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); * * 3430: RM_RSTST_CORE, RM_RSTST_EMU */ +#define OMAP_GLOBALWARM_RST_SHIFT 1 #define OMAP_GLOBALWARM_RST_MASK (1 << 1) +#define OMAP_GLOBALCOLD_RST_SHIFT 0 #define OMAP_GLOBALCOLD_RST_MASK (1 << 0) /* diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index e7dbb6cf1255..1ac73883f891 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -19,9 +19,8 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> - #include "common.h" +#include "powerdomain.h" #include "prm33xx.h" #include "prm-regbits-33xx.h" @@ -133,3 +132,204 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } + +static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + return 0; +} + +static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= OMAP_POWERSTATE_MASK; + v >>= OMAP_POWERSTATE_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= OMAP_POWERSTATEST_MASK; + v >>= OMAP_POWERSTATEST_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= AM33XX_LASTPOWERSTATEENTERED_MASK; + v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT; + + return v; +} + +static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) +{ + am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK, + (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + return 0; +} + +static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK, + AM33XX_LASTPOWERSTATEENTERED_MASK, + pwrdm->prcm_offs, pwrdm->pwrstst_offs); + return 0; +} + +static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 m; + + m = pwrdm->logicretstate_mask; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= AM33XX_LOGICSTATEST_MASK; + v >>= AM33XX_LOGICSTATEST_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + u32 v, m; + + m = pwrdm->logicretstate_mask; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = pwrdm->mem_on_mask[bank]; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = pwrdm->mem_ret_mask[bank]; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = pwrdm->mem_pwrst_mask[bank]; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = pwrdm->mem_retst_mask[bank]; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs) + & OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; + } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + + return 0; +} + +struct pwrdm_ops am33xx_pwrdm_operations = { + .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst, + .pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst, + .pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst, + .pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange, + .pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst, + .pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst, + .pwrdm_wait_transition = am33xx_pwrdm_wait_transition, +}; diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c new file mode 100644 index 000000000000..1fea656b2ca8 --- /dev/null +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -0,0 +1,403 @@ +/* + * OMAP3xxx PRM module functions + * + * Copyright (C) 2010-2012 Texas Instruments, Inc. + * Copyright (C) 2010 Nokia Corporation + * Benoît Cousson + * Paul Walmsley + * Rajendra Nayak <rnayak@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/irq.h> + +#include "common.h" +#include <plat/cpu.h> +#include <plat/prcm.h> + +#include "vp.h" +#include "powerdomain.h" +#include "prm3xxx.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" +#include "prm-regbits-34xx.h" + +static const struct omap_prcm_irq omap3_prcm_irqs[] = { + OMAP_PRCM_IRQ("wkup", 0, 0), + OMAP_PRCM_IRQ("io", 9, 1), +}; + +static struct omap_prcm_irq_setup omap3_prcm_irq_setup = { + .ack = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, + .mask = OMAP3_PRM_IRQENABLE_MPU_OFFSET, + .nr_regs = 1, + .irqs = omap3_prcm_irqs, + .nr_irqs = ARRAY_SIZE(omap3_prcm_irqs), + .irq = 11 + OMAP_INTC_START, + .read_pending_irqs = &omap3xxx_prm_read_pending_irqs, + .ocp_barrier = &omap3xxx_prm_ocp_barrier, + .save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen, + .restore_irqen = &omap3xxx_prm_restore_irqen, +}; + +/* + * omap3_prm_reset_src_map - map from bits in the PRM_RSTST hardware + * register (which are specific to OMAP3xxx SoCs) to reset source ID + * bit shifts (which is an OMAP SoC-independent enumeration) + */ +static struct prm_reset_src_map omap3xxx_prm_reset_src_map[] = { + { OMAP3430_GLOBAL_COLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP3430_GLOBAL_SW_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP3430_SECURITY_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP3430_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP3430_SECURE_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP3430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT, + OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT }, + { OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT, + OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT }, + { OMAP3430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT }, + { OMAP3430_ICECRUSHER_RST_SHIFT, OMAP_ICECRUSHER_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + +/* PRM VP */ + +/* + * struct omap3_vp - OMAP3 VP register access description. + * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg + */ +struct omap3_vp { + u32 tranxdone_status; +}; + +static struct omap3_vp omap3_vp[] = { + [OMAP3_VP_VDD_MPU_ID] = { + .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, + }, + [OMAP3_VP_VDD_CORE_ID] = { + .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, + }, +}; + +#define MAX_VP_ID ARRAY_SIZE(omap3_vp); + +u32 omap3_prm_vp_check_txdone(u8 vp_id) +{ + struct omap3_vp *vp = &omap3_vp[vp_id]; + u32 irqstatus; + + irqstatus = omap2_prm_read_mod_reg(OCP_MOD, + OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + return irqstatus & vp->tranxdone_status; +} + +void omap3_prm_vp_clear_txdone(u8 vp_id) +{ + struct omap3_vp *vp = &omap3_vp[vp_id]; + + omap2_prm_write_mod_reg(vp->tranxdone_status, + OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); +} + +u32 omap3_prm_vcvp_read(u8 offset) +{ + return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); +} + +void omap3_prm_vcvp_write(u32 val, u8 offset) +{ + omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); +} + +u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +{ + return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); +} + +/** + * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events + * @events: ptr to a u32, preallocated by caller + * + * Read PRM_IRQSTATUS_MPU bits, AND'ed with the currently-enabled PRM + * MPU IRQs, and store the result into the u32 pointed to by @events. + * No return value. + */ +void omap3xxx_prm_read_pending_irqs(unsigned long *events) +{ + u32 mask, st; + + /* XXX Can the mask read be avoided (e.g., can it come from RAM?) */ + mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + + events[0] = mask & st; +} + +/** + * omap3xxx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete + * + * Force any buffered writes to the PRM IP block to complete. Needed + * by the PRM IRQ handler, which reads and writes directly to the IP + * block, to avoid race conditions after acknowledging or clearing IRQ + * bits. No return value. + */ +void omap3xxx_prm_ocp_barrier(void) +{ + omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); +} + +/** + * omap3xxx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU reg + * @saved_mask: ptr to a u32 array to save IRQENABLE bits + * + * Save the PRM_IRQENABLE_MPU register to @saved_mask. @saved_mask + * must be allocated by the caller. Intended to be used in the PRM + * interrupt handler suspend callback. The OCP barrier is needed to + * ensure the write to disable PRM interrupts reaches the PRM before + * returning; otherwise, spurious interrupts might occur. No return + * value. + */ +void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask) +{ + saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD, + OMAP3_PRM_IRQENABLE_MPU_OFFSET); + omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + + /* OCP barrier */ + omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); +} + +/** + * omap3xxx_prm_restore_irqen - set PRM_IRQENABLE_MPU register from args + * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously + * + * Restore the PRM_IRQENABLE_MPU register from @saved_mask. Intended + * to be used in the PRM interrupt handler resume callback to restore + * values saved by omap3xxx_prm_save_and_clear_irqen(). No OCP + * barrier should be needed here; any pending PRM interrupts will fire + * once the writes reach the PRM. No return value. + */ +void omap3xxx_prm_restore_irqen(u32 *saved_mask) +{ + omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD, + OMAP3_PRM_IRQENABLE_MPU_OFFSET); +} + +/** + * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain + * + * Clear any previously-latched I/O wakeup events and ensure that the + * I/O wakeup gates are aligned with the current mux settings. Works + * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then + * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No + * return value. + */ +void omap3xxx_prm_reconfigure_io_chain(void) +{ + int i = 0; + + omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, + PM_WKEN); + + omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) & + OMAP3430_ST_IO_CHAIN_MASK, + MAX_IOPAD_LATCH_TIME, i); + if (i == MAX_IOPAD_LATCH_TIME) + pr_warn("PRM: I/O chain clock line assertion timed out\n"); + + omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, + PM_WKEN); + + omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD, + PM_WKST); + + omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST); +} + +/** + * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches + * + * Activates the I/O wakeup event latches and allows events logged by + * those latches to signal a wakeup event to the PRCM. For I/O + * wakeups to occur, WAKEUPENABLE bits must be set in the pad mux + * registers, and omap3xxx_prm_reconfigure_io_chain() must be called. + * No return value. + */ +static void __init omap3xxx_prm_enable_io_wakeup(void) +{ + if (omap3_has_io_wakeup()) + omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, + PM_WKEN); +} + +/** + * omap3xxx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap3xxx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); + + p = omap3xxx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + +/* Powerdomain low-level functions */ + +/* Applicable only for OMAP3. Not supported on OMAP2 */ +static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, + OMAP3430_LASTPOWERSTATEENTERED_MASK); +} + +static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP3430_LOGICSTATEST_MASK); +} + +static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP3430_LOGICSTATEST_MASK); +} + +static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, + OMAP3430_LASTLOGICSTATEENTERED_MASK); +} + +static int omap3_get_mem_bank_lastmemst_mask(u8 bank) +{ + switch (bank) { + case 0: + return OMAP3430_LASTMEM1STATEENTERED_MASK; + case 1: + return OMAP3430_LASTMEM2STATEENTERED_MASK; + case 2: + return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; + case 3: + return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + return 0; +} + +static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + m = omap3_get_mem_bank_lastmemst_mask(bank); + + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, m); +} + +static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); + return 0; +} + +static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) +{ + return omap2_prm_rmw_mod_reg_bits(0, + 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); +} + +static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) +{ + return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + 0, pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); +} + +struct pwrdm_ops omap3_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, + .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst, + .pwrdm_read_prev_logic_pwrst = omap3_pwrdm_read_prev_logic_pwrst, + .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, + .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, + .pwrdm_read_prev_mem_pwrst = omap3_pwrdm_read_prev_mem_pwrst, + .pwrdm_clear_all_prev_pwrst = omap3_pwrdm_clear_all_prev_pwrst, + .pwrdm_enable_hdwr_sar = omap3_pwrdm_enable_hdwr_sar, + .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar, + .pwrdm_wait_transition = omap2_pwrdm_wait_transition, +}; + +/* + * + */ + +static struct prm_ll_data omap3xxx_prm_ll_data = { + .read_reset_sources = &omap3xxx_prm_read_reset_sources, +}; + +static int __init omap3xxx_prm_init(void) +{ + int ret; + + if (!cpu_is_omap34xx()) + return 0; + + ret = prm_register(&omap3xxx_prm_ll_data); + if (ret) + return ret; + + omap3xxx_prm_enable_io_wakeup(); + ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); + if (!ret) + irq_set_status_flags(omap_prcm_event_to_irq("io"), + IRQ_NOAUTOEN); + + + return ret; +} +subsys_initcall(omap3xxx_prm_init); + +static void __exit omap3xxx_prm_exit(void) +{ + if (!cpu_is_omap34xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap3xxx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap3xxx_prm_exit); diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h new file mode 100644 index 000000000000..a3c28a875410 --- /dev/null +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -0,0 +1,160 @@ +/* + * OMAP3xxx Power/Reset Management (PRM) register definitions + * + * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The PRM hardware modules on the OMAP2/3 are quite similar to each + * other. The PRM on OMAP4 has a new register layout, and is handled + * in a separate file. + */ +#ifndef __ARCH_ARM_MACH_OMAP2_PRM3XXX_H +#define __ARCH_ARM_MACH_OMAP2_PRM3XXX_H + +#include "prcm-common.h" +#include "prm.h" +#include "prm2xxx_3xxx.h" + +#define OMAP34XX_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) + + +/* + * OMAP3-specific global PRM registers + * Use __raw_{read,write}l() with these registers. + * + * With a few exceptions, these are the register names beginning with + * PRM_* on 34xx. (The exceptions are the IRQSTATUS and IRQENABLE + * bits.) + */ + +#define OMAP3_PRM_REVISION_OFFSET 0x0004 +#define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) +#define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 +#define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) + +#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 +#define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c +#define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) + + +#define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 +#define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) +#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024 +#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024) +#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028 +#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028) +#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET 0x002c +#define OMAP3430_PRM_VC_CMD_VAL_0 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c) +#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET 0x0030 +#define OMAP3430_PRM_VC_CMD_VAL_1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030) +#define OMAP3_PRM_VC_CH_CONF_OFFSET 0x0034 +#define OMAP3430_PRM_VC_CH_CONF OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034) +#define OMAP3_PRM_VC_I2C_CFG_OFFSET 0x0038 +#define OMAP3430_PRM_VC_I2C_CFG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038) +#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET 0x003c +#define OMAP3430_PRM_VC_BYPASS_VAL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c) +#define OMAP3_PRM_RSTCTRL_OFFSET 0x0050 +#define OMAP3430_PRM_RSTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050) +#define OMAP3_PRM_RSTTIME_OFFSET 0x0054 +#define OMAP3430_PRM_RSTTIME OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054) +#define OMAP3_PRM_RSTST_OFFSET 0x0058 +#define OMAP3430_PRM_RSTST OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058) +#define OMAP3_PRM_VOLTCTRL_OFFSET 0x0060 +#define OMAP3430_PRM_VOLTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060) +#define OMAP3_PRM_SRAM_PCHARGE_OFFSET 0x0064 +#define OMAP3430_PRM_SRAM_PCHARGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064) +#define OMAP3_PRM_CLKSRC_CTRL_OFFSET 0x0070 +#define OMAP3430_PRM_CLKSRC_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070) +#define OMAP3_PRM_VOLTSETUP1_OFFSET 0x0090 +#define OMAP3430_PRM_VOLTSETUP1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090) +#define OMAP3_PRM_VOLTOFFSET_OFFSET 0x0094 +#define OMAP3430_PRM_VOLTOFFSET OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094) +#define OMAP3_PRM_CLKSETUP_OFFSET 0x0098 +#define OMAP3430_PRM_CLKSETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098) +#define OMAP3_PRM_POLCTRL_OFFSET 0x009c +#define OMAP3430_PRM_POLCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c) +#define OMAP3_PRM_VOLTSETUP2_OFFSET 0x00a0 +#define OMAP3430_PRM_VOLTSETUP2 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0) +#define OMAP3_PRM_VP1_CONFIG_OFFSET 0x00b0 +#define OMAP3430_PRM_VP1_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0) +#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET 0x00b4 +#define OMAP3430_PRM_VP1_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4) +#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET 0x00b8 +#define OMAP3430_PRM_VP1_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8) +#define OMAP3_PRM_VP1_VLIMITTO_OFFSET 0x00bc +#define OMAP3430_PRM_VP1_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc) +#define OMAP3_PRM_VP1_VOLTAGE_OFFSET 0x00c0 +#define OMAP3430_PRM_VP1_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0) +#define OMAP3_PRM_VP1_STATUS_OFFSET 0x00c4 +#define OMAP3430_PRM_VP1_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4) +#define OMAP3_PRM_VP2_CONFIG_OFFSET 0x00d0 +#define OMAP3430_PRM_VP2_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0) +#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET 0x00d4 +#define OMAP3430_PRM_VP2_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4) +#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET 0x00d8 +#define OMAP3430_PRM_VP2_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8) +#define OMAP3_PRM_VP2_VLIMITTO_OFFSET 0x00dc +#define OMAP3430_PRM_VP2_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc) +#define OMAP3_PRM_VP2_VOLTAGE_OFFSET 0x00e0 +#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) +#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 +#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) + +#define OMAP3_PRM_CLKSEL_OFFSET 0x0040 +#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) +#define OMAP3_PRM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP3430_PRM_CLKOUT_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070) + +/* OMAP3 specific register offsets */ +#define OMAP3430ES2_PM_WKEN3 0x00f0 +#define OMAP3430ES2_PM_WKST3 0x00b8 + +#define OMAP3430_PM_MPUGRPSEL 0x00a4 +#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL +#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8 + +#define OMAP3430_PM_IVAGRPSEL 0x00a8 +#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL +#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4 + +#define OMAP3430_PM_PREPWSTST 0x00e8 + +#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8 +#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc + + +#ifndef __ASSEMBLER__ + +/* OMAP3-specific VP functions */ +u32 omap3_prm_vp_check_txdone(u8 vp_id); +void omap3_prm_vp_clear_txdone(u8 vp_id); + +/* + * OMAP3 access functions for voltage controller (VC) and + * voltage proccessor (VP) in the PRM. + */ +extern u32 omap3_prm_vcvp_read(u8 offset); +extern void omap3_prm_vcvp_write(u32 val, u8 offset); +extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); + +extern void omap3xxx_prm_reconfigure_io_chain(void); + +/* PRM interrupt-related functions */ +extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); +extern void omap3xxx_prm_ocp_barrier(void); +extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); +extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); + +extern u32 omap3xxx_prm_get_reset_sources(void); + +#endif /* __ASSEMBLER */ + + +#endif diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index f0c4d5f4a174..a799e9552fbf 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -1,10 +1,11 @@ /* * OMAP4 PRM module functions * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2012 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * Benoît Cousson * Paul Walmsley + * Rajendra Nayak <rnayak@ti.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -27,6 +28,9 @@ #include "prm-regbits-44xx.h" #include "prcm44xx.h" #include "prminst44xx.h" +#include "powerdomain.h" + +/* Static data */ static const struct omap_prcm_irq omap4_prcm_irqs[] = { OMAP_PRCM_IRQ("wkup", 0, 0), @@ -46,6 +50,33 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { .restore_irqen = &omap44xx_prm_restore_irqen, }; +/* + * omap44xx_prm_reset_src_map - map from bits in the PRM_RSTST + * hardware register (which are specific to OMAP44xx SoCs) to reset + * source ID bit shifts (which is an OMAP SoC-independent + * enumeration) + */ +static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { + { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, + OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, + OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, + OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_WDT_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_SECURE_WDT_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_MPU_VOLT_MGR_RST_SHIFT, + OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_IVA_VOLT_MGR_RST_SHIFT, + OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_CORE_VOLT_MGR_RST_SHIFT, + OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT }, + { OMAP4430_C2C_RST_SHIFT, OMAP_C2C_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + /* PRM low-level functions */ /* Read a register in a CM/PRM instance in the PRM module */ @@ -291,12 +322,324 @@ static void __init omap44xx_prm_enable_io_wakeup(void) OMAP4_PRM_IO_PMCTRL_OFFSET); } -static int __init omap4xxx_prcm_init(void) +/** + * omap44xx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap44xx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, + OMAP4_RM_RSTST); + + p = omap44xx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + +/* Powerdomain low-level functions */ + +static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + return 0; +} + +static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP_POWERSTATE_MASK; + v >>= OMAP_POWERSTATE_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP_POWERSTATEST_MASK; + v >>= OMAP_POWERSTATEST_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; + v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; + + return v; +} + +static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, + (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + return 0; +} + +static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, + OMAP4430_LASTPOWERSTATEENTERED_MASK, + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTST); + return 0; +} + +static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 v; + + v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); + + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LOGICSTATEST_MASK; + v >>= OMAP4430_LOGICSTATEST_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) { - if (cpu_is_omap44xx()) { - omap44xx_prm_enable_io_wakeup(); - return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP4430_LOGICRETSTATE_MASK; + v >>= OMAP4430_LOGICRETSTATE_SHIFT; + + return v; +} + +/** + * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate + * @pwrdm: struct powerdomain * to read the state for + * + * Reads the previous logic powerstate for a powerdomain. This + * function must determine the previous logic powerstate by first + * checking the previous powerstate for the domain. If that was OFF, + * then logic has been lost. If previous state was RETENTION, the + * function reads the setting for the next retention logic state to + * see the actual value. In every other case, the logic is + * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET + * depending whether the logic was retained or not. + */ +static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + int state; + + state = omap4_pwrdm_read_prev_pwrst(pwrdm); + + if (state == PWRDM_POWER_OFF) + return PWRDM_POWER_OFF; + + if (state != PWRDM_POWER_RET) + return PWRDM_POWER_RET; + + return omap4_pwrdm_read_logic_retst(pwrdm); +} + +static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = omap2_pwrdm_get_mem_bank_stst_mask(bank); + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= m; + v >>= __ffs(m); + + return v; +} + +/** + * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate + * @pwrdm: struct powerdomain * to read mem powerstate for + * @bank: memory bank index + * + * Reads the previous memory powerstate for a powerdomain. This + * function must determine the previous memory powerstate by first + * checking the previous powerstate for the domain. If that was OFF, + * then logic has been lost. If previous state was RETENTION, the + * function reads the setting for the next memory retention state to + * see the actual value. In every other case, the logic is + * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET + * depending whether logic was retained or not. + */ +static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + int state; + + state = omap4_pwrdm_read_prev_pwrst(pwrdm); + + if (state == PWRDM_POWER_OFF) + return PWRDM_POWER_OFF; + + if (state != PWRDM_POWER_RET) + return PWRDM_POWER_RET; + + return omap4_pwrdm_read_mem_retst(pwrdm, bank); +} + +static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, + pwrdm->prcm_offs, + OMAP4_PM_PWSTST) & + OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + return 0; } -subsys_initcall(omap4xxx_prcm_init); + +struct pwrdm_ops omap4_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, + .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange, + .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst, + .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, + .pwrdm_read_prev_logic_pwrst = omap4_pwrdm_read_prev_logic_pwrst, + .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, + .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst, + .pwrdm_read_prev_mem_pwrst = omap4_pwrdm_read_prev_mem_pwrst, + .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst, + .pwrdm_wait_transition = omap4_pwrdm_wait_transition, +}; + +/* + * XXX document + */ +static struct prm_ll_data omap44xx_prm_ll_data = { + .read_reset_sources = &omap44xx_prm_read_reset_sources, +}; + +static int __init omap44xx_prm_init(void) +{ + int ret; + + if (!cpu_is_omap44xx()) + return 0; + + ret = prm_register(&omap44xx_prm_ll_data); + if (ret) + return ret; + + omap44xx_prm_enable_io_wakeup(); + + return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); +} +subsys_initcall(omap44xx_prm_init); + +static void __exit omap44xx_prm_exit(void) +{ + if (!cpu_is_omap44xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap44xx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap44xx_prm_exit); diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index ee72ae6bd8c9..c8e1accdc90e 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -771,6 +771,8 @@ extern void omap44xx_prm_ocp_barrier(void); extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask); extern void omap44xx_prm_restore_irqen(u32 *saved_mask); +extern u32 omap44xx_prm_get_reset_sources(void); + # endif #endif diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 6b4d332be2f6..945b4ad6ab84 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -24,10 +24,11 @@ #include <linux/interrupt.h> #include <linux/slab.h> -#include <plat/common.h> #include <plat/prcm.h> #include "prm2xxx_3xxx.h" +#include "prm2xxx.h" +#include "prm3xxx.h" #include "prm44xx.h" /* @@ -53,6 +54,13 @@ static struct irq_chip_generic **prcm_irq_chips; */ static struct omap_prcm_irq_setup *prcm_irq_setup; +/* + * prm_ll_data: function pointers to SoC-specific implementations of + * common PRM functions + */ +static struct prm_ll_data null_prm_ll_data; +static struct prm_ll_data *prm_ll_data = &null_prm_ll_data; + /* Private functions */ /* @@ -319,64 +327,71 @@ err: return -ENOMEM; } -/* - * Stubbed functions so that common files continue to build when - * custom builds are used - * XXX These are temporary and should be removed at the earliest possible - * opportunity +/** + * prm_read_reset_sources - return the sources of the SoC's last reset + * + * Return a u32 bitmask representing the reset sources that caused the + * SoC to reset. The low-level per-SoC functions called by this + * function remap the SoC-specific reset source bits into an + * OMAP-common set of reset source bits, defined in + * arch/arm/mach-omap2/prm.h. Returns the standardized reset source + * u32 bitmask from the hardware upon success, or returns (1 << + * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources() + * function was registered. */ -u32 __weak omap2_prm_read_mod_reg(s16 module, u16 idx) +u32 prm_read_reset_sources(void) { - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT; -void __weak omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); -} + if (prm_ll_data->read_reset_sources) + ret = prm_ll_data->read_reset_sources(); + else + WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__); -u32 __weak omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, - s16 module, s16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; + return ret; } -u32 __weak omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +/** + * prm_register - register per-SoC low-level data with the PRM + * @pld: low-level per-SoC OMAP PRM data & function pointers to register + * + * Register per-SoC low-level OMAP PRM data and function pointers with + * the OMAP PRM common interface. The caller must keep the data + * pointed to by @pld valid until it calls prm_unregister() and + * it returns successfully. Returns 0 upon success, -EINVAL if @pld + * is NULL, or -EEXIST if prm_register() has already been called + * without an intervening prm_unregister(). + */ +int prm_register(struct prm_ll_data *pld) { - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + if (!pld) + return -EINVAL; -u32 __weak omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + if (prm_ll_data != &null_prm_ll_data) + return -EEXIST; -u32 __weak omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + prm_ll_data = pld; -int __weak omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); return 0; } -int __weak omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) +/** + * prm_unregister - unregister per-SoC low-level data & function pointers + * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister + * + * Unregister per-SoC low-level OMAP PRM data and function pointers + * that were previously registered with prm_register(). The + * caller may not destroy any of the data pointed to by @pld until + * this function returns successfully. Returns 0 upon success, or + * -EINVAL if @pld is NULL or if @pld does not match the struct + * prm_ll_data * previously registered by prm_register(). + */ +int prm_unregister(struct prm_ll_data *pld) { - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + if (!pld || prm_ll_data != pld) + return -EINVAL; + + prm_ll_data = &null_prm_ll_data; -int __weak omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, - u8 st_shift) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); return 0; } - diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h index 8bfaf342a028..1ee58c281a31 100644 --- a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h +++ b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h @@ -11,7 +11,7 @@ #ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM #define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM -#include <plat/sdrc.h> +#include "sdrc.h" /* Hynix H8MBX00U0MER-0EM */ static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = { diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h index a391b4939f74..85cccc004c06 100644 --- a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h +++ b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h @@ -14,7 +14,7 @@ #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF #define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF -#include <plat/sdrc.h> +#include "sdrc.h" /* Micron MT46H32M32LF-6 */ /* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */ diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c index 845c4fd2b125..0fa7ffa9b5ed 100644 --- a/arch/arm/mach-omap2/sdram-nokia.c +++ b/arch/arm/mach-omap2/sdram-nokia.c @@ -18,10 +18,8 @@ #include <linux/io.h> #include "common.h" -#include <plat/clock.h> -#include <plat/sdrc.h> - #include "sdram-nokia.h" +#include "sdrc.h" /* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */ struct sdram_timings { diff --git a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h index cd4352917022..003f7bf4e2e3 100644 --- a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h +++ b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h @@ -11,7 +11,7 @@ #ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM #define __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM -#include <plat/sdrc.h> +#include "sdrc.h" /* Numonyx M65KXXXXAM */ static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = { diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h index 0e518a72831f..8dc3de5ebb5b 100644 --- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h +++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h @@ -14,7 +14,7 @@ #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 #define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 -#include <plat/sdrc.h> +#include "sdrc.h" /* Qimonda HYB18M512160AF-6 */ static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = { diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index e3d345f46409..c64ee1904be8 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -24,10 +24,7 @@ #include <linux/io.h> #include "common.h" -#include <plat/clock.h> -#include <plat/sram.h> - -#include <plat/sdrc.h> +#include "clock.h" #include "sdrc.h" static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1; @@ -160,19 +157,3 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, sdrc_write_reg(l, SDRC_POWER); omap2_sms_save_context(); } - -void omap2_sms_write_rot_control(u32 val, unsigned ctx) -{ - sms_write_reg(val, SMS_ROT_CONTROL(ctx)); -} - -void omap2_sms_write_rot_size(u32 val, unsigned ctx) -{ - sms_write_reg(val, SMS_ROT_SIZE(ctx)); -} - -void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx) -{ - sms_write_reg(val, SMS_ROT_PHYSICAL_BA(ctx)); -} - diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index b3f83799e6cf..69c4b329452e 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h @@ -2,12 +2,14 @@ #define __ARCH_ARM_MACH_OMAP2_SDRC_H /* - * OMAP2 SDRC register definitions + * OMAP2/3 SDRC/SMS macros and prototypes * - * Copyright (C) 2007 Texas Instruments, Inc. - * Copyright (C) 2007 Nokia Corporation + * Copyright (C) 2007-2008, 2012 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation * - * Written by Paul Walmsley + * Paul Walmsley + * Tony Lindgren + * Richard Woodruff * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -15,8 +17,6 @@ */ #undef DEBUG -#include <plat/sdrc.h> - #ifndef __ASSEMBLER__ #include <linux/io.h> @@ -50,6 +50,58 @@ static inline u32 sms_read_reg(u16 reg) { return __raw_readl(OMAP_SMS_REGADDR(reg)); } + + +/** + * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate + * @rate: SDRC clock rate (in Hz) + * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate + * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate + * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate + * @mr: Value to program to SDRC_MR for this rate + * + * This structure holds a pre-computed set of register values for the + * SDRC for a given SDRC clock rate and SDRAM chip. These are + * intended to be pre-computed and specified in an array in the board-*.c + * files. The structure is keyed off the 'rate' field. + */ +struct omap_sdrc_params { + unsigned long rate; + u32 actim_ctrla; + u32 actim_ctrlb; + u32 rfr_ctrl; + u32 mr; +}; + +#ifdef CONFIG_SOC_HAS_OMAP2_SDRC +void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, + struct omap_sdrc_params *sdrc_cs1); +#else +static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, + struct omap_sdrc_params *sdrc_cs1) {}; +#endif + +int omap2_sdrc_get_params(unsigned long r, + struct omap_sdrc_params **sdrc_cs0, + struct omap_sdrc_params **sdrc_cs1); +void omap2_sms_save_context(void); +void omap2_sms_restore_context(void); + +struct memory_timings { + u32 m_type; /* ddr = 1, sdr = 0 */ + u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */ + u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */ + u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */ + u32 base_cs; /* base chip select to use for calculations */ +}; + +extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode); +struct omap_sdrc_params *rx51_get_sdram_timings(void); + +u32 omap2xxx_sdrc_dll_is_unlocked(void); +u32 omap2xxx_sdrc_reprogram(u32 level, u32 force); + + #else #define OMAP242X_SDRC_REGADDR(reg) \ OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) @@ -57,6 +109,7 @@ static inline u32 sms_read_reg(u16 reg) OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) #define OMAP34XX_SDRC_REGADDR(reg) \ OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) + #endif /* __ASSEMBLER__ */ /* Minimum frequency that the SDRC DLL can lock at */ @@ -74,4 +127,85 @@ static inline u32 sms_read_reg(u16 reg) */ #define SDRC_MPURATE_LOOPS 96 +/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ + +#define SDRC_SYSCONFIG 0x010 +#define SDRC_CS_CFG 0x040 +#define SDRC_SHARING 0x044 +#define SDRC_ERR_TYPE 0x04C +#define SDRC_DLLA_CTRL 0x060 +#define SDRC_DLLA_STATUS 0x064 +#define SDRC_DLLB_CTRL 0x068 +#define SDRC_DLLB_STATUS 0x06C +#define SDRC_POWER 0x070 +#define SDRC_MCFG_0 0x080 +#define SDRC_MR_0 0x084 +#define SDRC_EMR2_0 0x08c +#define SDRC_ACTIM_CTRL_A_0 0x09c +#define SDRC_ACTIM_CTRL_B_0 0x0a0 +#define SDRC_RFR_CTRL_0 0x0a4 +#define SDRC_MANUAL_0 0x0a8 +#define SDRC_MCFG_1 0x0B0 +#define SDRC_MR_1 0x0B4 +#define SDRC_EMR2_1 0x0BC +#define SDRC_ACTIM_CTRL_A_1 0x0C4 +#define SDRC_ACTIM_CTRL_B_1 0x0C8 +#define SDRC_RFR_CTRL_1 0x0D4 +#define SDRC_MANUAL_1 0x0D8 + +#define SDRC_POWER_AUTOCOUNT_SHIFT 8 +#define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT) +#define SDRC_POWER_CLKCTRL_SHIFT 4 +#define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT) +#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT) + +/* + * These values represent the number of memory clock cycles between + * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192 + * rows per device, and include a subtraction of a 50 cycle window in the + * event that the autorefresh command is delayed due to other SDRC activity. + * The '| 1' sets the ARE field to send one autorefresh when the autorefresh + * counter reaches 0. + * + * These represent optimal values for common parts, it won't work for all. + * As long as you scale down, most parameters are still work, they just + * become sub-optimal. The RFR value goes in the opposite direction. If you + * don't adjust it down as your clock period increases the refresh interval + * will not be met. Setting all parameters for complete worst case may work, + * but may cut memory performance by 2x. Due to errata the DLLs need to be + * unlocked and their value needs run time calibration. A dynamic call is + * need for that as no single right value exists acorss production samples. + * + * Only the FULL speed values are given. Current code is such that rate + * changes must be made at DPLLoutx2. The actual value adjustment for low + * frequency operation will be handled by omap_set_performance() + * + * By having the boot loader boot up in the fastest L4 speed available likely + * will result in something which you can switch between. + */ +#define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1) +#define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1) +#define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1) +#define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1) /* Need to calc */ +#define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */ + + +/* + * SMS register access + */ + +#define OMAP242X_SMS_REGADDR(reg) \ + (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg) +#define OMAP243X_SMS_REGADDR(reg) \ + (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg) +#define OMAP343X_SMS_REGADDR(reg) \ + (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg) + +/* SMS register offsets - read/write with sms_{read,write}_reg() */ + +#define SMS_SYSCONFIG 0x010 +/* REVISIT: fill in other SMS registers here */ + + + #endif diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index 73e55e485329..907291714643 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c @@ -24,16 +24,13 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/sdrc.h> - #include "soc.h" #include "iomap.h" #include "common.h" -#include "prm2xxx_3xxx.h" +#include "prm2xxx.h" #include "clock.h" #include "sdrc.h" +#include "sram.h" /* Memory timing, DLL mode flags */ #define M_DDR 1 diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 0405c8190803..aa30a3c20883 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -28,19 +28,20 @@ #include <linux/console.h> #include <plat/omap-serial.h> -#include "common.h" -#include <plat/dma.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> -#include <plat/omap-pm.h> -#include <plat/serial.h> +#include <plat-omap/dma-omap.h> +#include "common.h" +#include "omap_hwmod.h" +#include "omap_device.h" +#include "omap-pm.h" +#include "soc.h" #include "prm2xxx_3xxx.h" #include "pm.h" #include "cm2xxx_3xxx.h" #include "prm-regbits-34xx.h" #include "control.h" #include "mux.h" +#include "serial.h" /* * NOTE: By default the serial auto_suspend timeout is disabled as it causes @@ -329,6 +330,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata, oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); + if (console_uart_id == bdata->id) { + omap_device_enable(pdev); + pm_runtime_set_active(&pdev->dev); + } + oh->dev_attr = uart; if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) diff --git a/arch/arm/mach-omap2/serial.h b/arch/arm/mach-omap2/serial.h new file mode 100644 index 000000000000..c4014f013df0 --- /dev/null +++ b/arch/arm/mach-omap2/serial.h @@ -0,0 +1 @@ +#include <mach/serial.h> diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 506987979c1c..d1dedc8195ed 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -26,13 +26,12 @@ #include <asm/assembler.h> -#include <plat/sram.h> - #include "omap34xx.h" #include "iomap.h" -#include "cm2xxx_3xxx.h" -#include "prm2xxx_3xxx.h" +#include "cm3xxx.h" +#include "prm3xxx.h" #include "sdrc.h" +#include "sram.h" #include "control.h" /* diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index fc9b96daf851..070096496e20 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -1,7 +1,473 @@ -#include <plat/cpu.h> +/* + * OMAP cpu type detection + * + * Copyright (C) 2004, 2008 Nokia Corporation + * + * Copyright (C) 2009-11 Texas Instruments. + * + * Written by Tony Lindgren <tony.lindgren@nokia.com> + * + * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + #include "omap24xx.h" #include "omap34xx.h" #include "omap44xx.h" #include "ti81xx.h" #include "am33xx.h" #include "omap54xx.h" + +#ifndef __ASSEMBLY__ + +#include <linux/bitops.h> + +/* + * Test if multicore OMAP support is needed + */ +#undef MULTI_OMAP2 +#undef OMAP_NAME + +#ifdef CONFIG_SOC_OMAP2420 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap2420 +# endif +#endif +#ifdef CONFIG_SOC_OMAP2430 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap2430 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP3 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap3 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP4 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap4 +# endif +#endif + +#ifdef CONFIG_SOC_OMAP5 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap5 +# endif +#endif + +#ifdef CONFIG_SOC_AM33XX +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME am33xx +# endif +#endif + +/* + * Omap device type i.e. EMU/HS/TST/GP/BAD + */ +#define OMAP2_DEVICE_TYPE_TEST 0 +#define OMAP2_DEVICE_TYPE_EMU 1 +#define OMAP2_DEVICE_TYPE_SEC 2 +#define OMAP2_DEVICE_TYPE_GP 3 +#define OMAP2_DEVICE_TYPE_BAD 4 + +int omap_type(void); + +/* + * omap_rev bits: + * CPU id bits (0730, 1510, 1710, 2422...) [31:16] + * CPU revision (See _REV_ defined in cpu.h) [15:08] + * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] + */ +unsigned int omap_rev(void); + +/* + * Get the CPU revision for OMAP devices + */ +#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff) + +/* + * Macros to group OMAP into cpu classes. + * These can be used in most places. + * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430 + * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423 + * cpu_is_omap243x(): True for OMAP2430 + * cpu_is_omap343x(): True for OMAP3430 + * cpu_is_omap443x(): True for OMAP4430 + * cpu_is_omap446x(): True for OMAP4460 + * cpu_is_omap447x(): True for OMAP4470 + * soc_is_omap543x(): True for OMAP5430, OMAP5432 + */ +#define GET_OMAP_CLASS (omap_rev() & 0xff) + +#define IS_OMAP_CLASS(class, id) \ +static inline int is_omap ##class (void) \ +{ \ + return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ +} + +#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff) + +#define IS_AM_CLASS(class, id) \ +static inline int is_am ##class (void) \ +{ \ + return (GET_AM_CLASS == (id)) ? 1 : 0; \ +} + +#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff) + +#define IS_TI_CLASS(class, id) \ +static inline int is_ti ##class (void) \ +{ \ + return (GET_TI_CLASS == (id)) ? 1 : 0; \ +} + +#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) + +#define IS_OMAP_SUBCLASS(subclass, id) \ +static inline int is_omap ##subclass (void) \ +{ \ + return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ +} + +#define IS_TI_SUBCLASS(subclass, id) \ +static inline int is_ti ##subclass (void) \ +{ \ + return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ +} + +#define IS_AM_SUBCLASS(subclass, id) \ +static inline int is_am ##subclass (void) \ +{ \ + return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ +} + +IS_OMAP_CLASS(24xx, 0x24) +IS_OMAP_CLASS(34xx, 0x34) +IS_OMAP_CLASS(44xx, 0x44) +IS_AM_CLASS(35xx, 0x35) +IS_OMAP_CLASS(54xx, 0x54) +IS_AM_CLASS(33xx, 0x33) + +IS_TI_CLASS(81xx, 0x81) + +IS_OMAP_SUBCLASS(242x, 0x242) +IS_OMAP_SUBCLASS(243x, 0x243) +IS_OMAP_SUBCLASS(343x, 0x343) +IS_OMAP_SUBCLASS(363x, 0x363) +IS_OMAP_SUBCLASS(443x, 0x443) +IS_OMAP_SUBCLASS(446x, 0x446) +IS_OMAP_SUBCLASS(447x, 0x447) +IS_OMAP_SUBCLASS(543x, 0x543) + +IS_TI_SUBCLASS(816x, 0x816) +IS_TI_SUBCLASS(814x, 0x814) +IS_AM_SUBCLASS(335x, 0x335) + +#define cpu_is_omap24xx() 0 +#define cpu_is_omap242x() 0 +#define cpu_is_omap243x() 0 +#define cpu_is_omap34xx() 0 +#define cpu_is_omap343x() 0 +#define cpu_is_ti81xx() 0 +#define cpu_is_ti816x() 0 +#define cpu_is_ti814x() 0 +#define soc_is_am35xx() 0 +#define soc_is_am33xx() 0 +#define soc_is_am335x() 0 +#define cpu_is_omap44xx() 0 +#define cpu_is_omap443x() 0 +#define cpu_is_omap446x() 0 +#define cpu_is_omap447x() 0 +#define soc_is_omap54xx() 0 +#define soc_is_omap543x() 0 + +#if defined(MULTI_OMAP2) +# if defined(CONFIG_ARCH_OMAP2) +# undef cpu_is_omap24xx +# define cpu_is_omap24xx() is_omap24xx() +# endif +# if defined (CONFIG_SOC_OMAP2420) +# undef cpu_is_omap242x +# define cpu_is_omap242x() is_omap242x() +# endif +# if defined (CONFIG_SOC_OMAP2430) +# undef cpu_is_omap243x +# define cpu_is_omap243x() is_omap243x() +# endif +# if defined(CONFIG_ARCH_OMAP3) +# undef cpu_is_omap34xx +# undef cpu_is_omap343x +# define cpu_is_omap34xx() is_omap34xx() +# define cpu_is_omap343x() is_omap343x() +# endif +#else +# if defined(CONFIG_ARCH_OMAP2) +# undef cpu_is_omap24xx +# define cpu_is_omap24xx() 1 +# endif +# if defined(CONFIG_SOC_OMAP2420) +# undef cpu_is_omap242x +# define cpu_is_omap242x() 1 +# endif +# if defined(CONFIG_SOC_OMAP2430) +# undef cpu_is_omap243x +# define cpu_is_omap243x() 1 +# endif +# if defined(CONFIG_ARCH_OMAP3) +# undef cpu_is_omap34xx +# define cpu_is_omap34xx() 1 +# endif +# if defined(CONFIG_SOC_OMAP3430) +# undef cpu_is_omap343x +# define cpu_is_omap343x() 1 +# endif +#endif + +/* + * Macros to detect individual cpu types. + * These are only rarely needed. + * cpu_is_omap2420(): True for OMAP2420 + * cpu_is_omap2422(): True for OMAP2422 + * cpu_is_omap2423(): True for OMAP2423 + * cpu_is_omap2430(): True for OMAP2430 + * cpu_is_omap3430(): True for OMAP3430 + */ +#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) + +#define IS_OMAP_TYPE(type, id) \ +static inline int is_omap ##type (void) \ +{ \ + return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ +} + +IS_OMAP_TYPE(2420, 0x2420) +IS_OMAP_TYPE(2422, 0x2422) +IS_OMAP_TYPE(2423, 0x2423) +IS_OMAP_TYPE(2430, 0x2430) +IS_OMAP_TYPE(3430, 0x3430) + +#define cpu_is_omap2420() 0 +#define cpu_is_omap2422() 0 +#define cpu_is_omap2423() 0 +#define cpu_is_omap2430() 0 +#define cpu_is_omap3430() 0 +#define cpu_is_omap3630() 0 +#define soc_is_omap5430() 0 + +/* These are needed for the common code */ +#ifdef CONFIG_ARCH_OMAP2PLUS +#define cpu_is_omap7xx() 0 +#define cpu_is_omap15xx() 0 +#define cpu_is_omap16xx() 0 +#define cpu_is_omap1510() 0 +#define cpu_is_omap1610() 0 +#define cpu_is_omap1611() 0 +#define cpu_is_omap1621() 0 +#define cpu_is_omap1710() 0 +#define cpu_class_is_omap1() 0 +#define cpu_class_is_omap2() 1 +#endif + +#if defined(CONFIG_ARCH_OMAP2) +# undef cpu_is_omap2420 +# undef cpu_is_omap2422 +# undef cpu_is_omap2423 +# undef cpu_is_omap2430 +# define cpu_is_omap2420() is_omap2420() +# define cpu_is_omap2422() is_omap2422() +# define cpu_is_omap2423() is_omap2423() +# define cpu_is_omap2430() is_omap2430() +#endif + +#if defined(CONFIG_ARCH_OMAP3) +# undef cpu_is_omap3430 +# undef cpu_is_ti81xx +# undef cpu_is_ti816x +# undef cpu_is_ti814x +# undef soc_is_am35xx +# define cpu_is_omap3430() is_omap3430() +# undef cpu_is_omap3630 +# define cpu_is_omap3630() is_omap363x() +# define cpu_is_ti81xx() is_ti81xx() +# define cpu_is_ti816x() is_ti816x() +# define cpu_is_ti814x() is_ti814x() +# define soc_is_am35xx() is_am35xx() +#endif + +# if defined(CONFIG_SOC_AM33XX) +# undef soc_is_am33xx +# undef soc_is_am335x +# define soc_is_am33xx() is_am33xx() +# define soc_is_am335x() is_am335x() +#endif + +# if defined(CONFIG_ARCH_OMAP4) +# undef cpu_is_omap44xx +# undef cpu_is_omap443x +# undef cpu_is_omap446x +# undef cpu_is_omap447x +# define cpu_is_omap44xx() is_omap44xx() +# define cpu_is_omap443x() is_omap443x() +# define cpu_is_omap446x() is_omap446x() +# define cpu_is_omap447x() is_omap447x() +# endif + +# if defined(CONFIG_SOC_OMAP5) +# undef soc_is_omap54xx +# undef soc_is_omap543x +# define soc_is_omap54xx() is_omap54xx() +# define soc_is_omap543x() is_omap543x() +#endif + +/* Various silicon revisions for omap2 */ +#define OMAP242X_CLASS 0x24200024 +#define OMAP2420_REV_ES1_0 OMAP242X_CLASS +#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8)) + +#define OMAP243X_CLASS 0x24300024 +#define OMAP2430_REV_ES1_0 OMAP243X_CLASS + +#define OMAP343X_CLASS 0x34300034 +#define OMAP3430_REV_ES1_0 OMAP343X_CLASS +#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8)) +#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8)) +#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8)) +#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8)) +#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8)) + +#define OMAP363X_CLASS 0x36300034 +#define OMAP3630_REV_ES1_0 OMAP363X_CLASS +#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8)) +#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8)) + +#define TI816X_CLASS 0x81600034 +#define TI8168_REV_ES1_0 TI816X_CLASS +#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) + +#define TI814X_CLASS 0x81400034 +#define TI8148_REV_ES1_0 TI814X_CLASS +#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8)) +#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8)) + +#define AM35XX_CLASS 0x35170034 +#define AM35XX_REV_ES1_0 AM35XX_CLASS +#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8)) + +#define AM335X_CLASS 0x33500033 +#define AM335X_REV_ES1_0 AM335X_CLASS + +#define OMAP443X_CLASS 0x44300044 +#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) +#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8)) +#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) +#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) +#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8)) + +#define OMAP446X_CLASS 0x44600044 +#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) +#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8)) + +#define OMAP447X_CLASS 0x44700044 +#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8)) + +#define OMAP54XX_CLASS 0x54000054 +#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8)) +#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8)) + +void omap2xxx_check_revision(void); +void omap3xxx_check_revision(void); +void omap4xxx_check_revision(void); +void omap5xxx_check_revision(void); +void omap3xxx_check_features(void); +void ti81xx_check_features(void); +void omap4xxx_check_features(void); + +/* + * Runtime detection of OMAP3 features + * + * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip + * family have OS-level control over the I/O chain clock. This is + * to avoid a window during which wakeups could potentially be lost + * during powerdomain transitions. If this bit is set, it + * indicates that the chip does support OS-level control of this + * feature. + */ +extern u32 omap_features; + +#define OMAP3_HAS_L2CACHE BIT(0) +#define OMAP3_HAS_IVA BIT(1) +#define OMAP3_HAS_SGX BIT(2) +#define OMAP3_HAS_NEON BIT(3) +#define OMAP3_HAS_ISP BIT(4) +#define OMAP3_HAS_192MHZ_CLK BIT(5) +#define OMAP3_HAS_IO_WAKEUP BIT(6) +#define OMAP3_HAS_SDRC BIT(7) +#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8) +#define OMAP4_HAS_MPU_1GHZ BIT(9) +#define OMAP4_HAS_MPU_1_2GHZ BIT(10) +#define OMAP4_HAS_MPU_1_5GHZ BIT(11) + + +#define OMAP3_HAS_FEATURE(feat,flag) \ +static inline unsigned int omap3_has_ ##feat(void) \ +{ \ + return omap_features & OMAP3_HAS_ ##flag; \ +} \ + +OMAP3_HAS_FEATURE(l2cache, L2CACHE) +OMAP3_HAS_FEATURE(sgx, SGX) +OMAP3_HAS_FEATURE(iva, IVA) +OMAP3_HAS_FEATURE(neon, NEON) +OMAP3_HAS_FEATURE(isp, ISP) +OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) +OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) +OMAP3_HAS_FEATURE(sdrc, SDRC) +OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL) + +/* + * Runtime detection of OMAP4 features + */ +#define OMAP4_HAS_FEATURE(feat, flag) \ +static inline unsigned int omap4_has_ ##feat(void) \ +{ \ + return omap_features & OMAP4_HAS_ ##flag; \ +} \ + +OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ) +OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ) +OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ) + +#endif /* __ASSEMBLY__ */ + diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index f8217a5a4a26..b0e77a407047 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -23,8 +23,8 @@ #include <linux/slab.h> #include <linux/io.h> -#include <plat/omap_device.h> - +#include "soc.h" +#include "omap_device.h" #include "voltage.h" #include "control.h" #include "pm.h" diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c new file mode 100644 index 000000000000..0ff0f068bea8 --- /dev/null +++ b/arch/arm/mach-omap2/sram.c @@ -0,0 +1,305 @@ +/* + * + * OMAP SRAM detection and management + * + * Copyright (C) 2005 Nokia Corporation + * Written by Tony Lindgren <tony@atomide.com> + * + * Copyright (C) 2009-2012 Texas Instruments + * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/io.h> + +#include <asm/fncpy.h> +#include <asm/tlb.h> +#include <asm/cacheflush.h> + +#include <asm/mach/map.h> + +#include "soc.h" +#include "iomap.h" +#include "prm2xxx_3xxx.h" +#include "sdrc.h" +#include "sram.h" + +#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) +#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) +#ifdef CONFIG_OMAP4_ERRATA_I688 +#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA +#else +#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) +#endif +#define OMAP5_SRAM_PA 0x40300000 + +#define SRAM_BOOTLOADER_SZ 0x00 + +#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048) +#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050) +#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058) + +#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848) +#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850) +#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858) +#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880) +#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048) + +#define GP_DEVICE 0x300 + +#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) + +static unsigned long omap_sram_start; +static unsigned long omap_sram_skip; +static unsigned long omap_sram_size; + +/* + * Depending on the target RAMFS firewall setup, the public usable amount of + * SRAM varies. The default accessible size for all device types is 2k. A GP + * device allows ARM11 but not other initiators for full size. This + * functionality seems ok until some nice security API happens. + */ +static int is_sram_locked(void) +{ + if (OMAP2_DEVICE_TYPE_GP == omap_type()) { + /* RAMFW: R/W access to all initiators for all qualifier sets */ + if (cpu_is_omap242x()) { + __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */ + __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ + __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ + } + if (cpu_is_omap34xx()) { + __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ + __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ + __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ + __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2); + __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0); + } + return 0; + } else + return 1; /* assume locked with no PPA or security driver */ +} + +/* + * The amount of SRAM depends on the core type. + * Note that we cannot try to test for SRAM here because writes + * to secure SRAM will hang the system. Also the SRAM is not + * yet mapped at this point. + */ +static void __init omap_detect_sram(void) +{ + omap_sram_skip = SRAM_BOOTLOADER_SZ; + if (is_sram_locked()) { + if (cpu_is_omap34xx()) { + omap_sram_start = OMAP3_SRAM_PUB_PA; + if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) || + (omap_type() == OMAP2_DEVICE_TYPE_SEC)) { + omap_sram_size = 0x7000; /* 28K */ + omap_sram_skip += SZ_16K; + } else { + omap_sram_size = 0x8000; /* 32K */ + } + } else if (cpu_is_omap44xx()) { + omap_sram_start = OMAP4_SRAM_PUB_PA; + omap_sram_size = 0xa000; /* 40K */ + } else if (soc_is_omap54xx()) { + omap_sram_start = OMAP5_SRAM_PA; + omap_sram_size = SZ_128K; /* 128KB */ + } else { + omap_sram_start = OMAP2_SRAM_PUB_PA; + omap_sram_size = 0x800; /* 2K */ + } + } else { + if (soc_is_am33xx()) { + omap_sram_start = AM33XX_SRAM_PA; + omap_sram_size = 0x10000; /* 64K */ + } else if (cpu_is_omap34xx()) { + omap_sram_start = OMAP3_SRAM_PA; + omap_sram_size = 0x10000; /* 64K */ + } else if (cpu_is_omap44xx()) { + omap_sram_start = OMAP4_SRAM_PA; + omap_sram_size = 0xe000; /* 56K */ + } else if (soc_is_omap54xx()) { + omap_sram_start = OMAP5_SRAM_PA; + omap_sram_size = SZ_128K; /* 128KB */ + } else { + omap_sram_start = OMAP2_SRAM_PA; + if (cpu_is_omap242x()) + omap_sram_size = 0xa0000; /* 640K */ + else if (cpu_is_omap243x()) + omap_sram_size = 0x10000; /* 64K */ + } + } +} + +/* + * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. + */ +static void __init omap2_map_sram(void) +{ + int cached = 1; + +#ifdef CONFIG_OMAP4_ERRATA_I688 + if (cpu_is_omap44xx()) { + omap_sram_start += PAGE_SIZE; + omap_sram_size -= SZ_16K; + } +#endif + if (cpu_is_omap34xx()) { + /* + * SRAM must be marked as non-cached on OMAP3 since the + * CORE DPLL M2 divider change code (in SRAM) runs with the + * SDRAM controller disabled, and if it is marked cached, + * the ARM may attempt to write cache lines back to SDRAM + * which will cause the system to hang. + */ + cached = 0; + } + + omap_map_sram(omap_sram_start, omap_sram_size, + omap_sram_skip, cached); +} + +static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); + +void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock) +{ + BUG_ON(!_omap2_sram_ddr_init); + _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, + base_cs, force_unlock); +} + +static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, + u32 mem_type); + +void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type) +{ + BUG_ON(!_omap2_sram_reprogram_sdrc); + _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); +} + +static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); + +u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) +{ + BUG_ON(!_omap2_set_prcm); + return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); +} + +#ifdef CONFIG_SOC_OMAP2420 +static int __init omap242x_sram_init(void) +{ + _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init, + omap242x_sram_ddr_init_sz); + + _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc, + omap242x_sram_reprogram_sdrc_sz); + + _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm, + omap242x_sram_set_prcm_sz); + + return 0; +} +#else +static inline int omap242x_sram_init(void) +{ + return 0; +} +#endif + +#ifdef CONFIG_SOC_OMAP2430 +static int __init omap243x_sram_init(void) +{ + _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init, + omap243x_sram_ddr_init_sz); + + _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc, + omap243x_sram_reprogram_sdrc_sz); + + _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm, + omap243x_sram_set_prcm_sz); + + return 0; +} +#else +static inline int omap243x_sram_init(void) +{ + return 0; +} +#endif + +#ifdef CONFIG_ARCH_OMAP3 + +static u32 (*_omap3_sram_configure_core_dpll)( + u32 m2, u32 unlock_dll, u32 f, u32 inc, + u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, + u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, + u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, + u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); + +u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc, + u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, + u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, + u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, + u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1) +{ + BUG_ON(!_omap3_sram_configure_core_dpll); + return _omap3_sram_configure_core_dpll( + m2, unlock_dll, f, inc, + sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0, + sdrc_actim_ctrl_b_0, sdrc_mr_0, + sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1, + sdrc_actim_ctrl_b_1, sdrc_mr_1); +} + +void omap3_sram_restore_context(void) +{ + omap_sram_reset(); + + _omap3_sram_configure_core_dpll = + omap_sram_push(omap3_sram_configure_core_dpll, + omap3_sram_configure_core_dpll_sz); + omap_push_sram_idle(); +} + +static inline int omap34xx_sram_init(void) +{ + omap3_sram_restore_context(); + return 0; +} +#else +static inline int omap34xx_sram_init(void) +{ + return 0; +} +#endif /* CONFIG_ARCH_OMAP3 */ + +static inline int am33xx_sram_init(void) +{ + return 0; +} + +int __init omap_sram_init(void) +{ + omap_detect_sram(); + omap2_map_sram(); + + if (cpu_is_omap242x()) + omap242x_sram_init(); + else if (cpu_is_omap2430()) + omap243x_sram_init(); + else if (soc_is_am33xx()) + am33xx_sram_init(); + else if (cpu_is_omap34xx()) + omap34xx_sram_init(); + + return 0; +} diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h new file mode 100644 index 000000000000..ca7277c2a9ee --- /dev/null +++ b/arch/arm/mach-omap2/sram.h @@ -0,0 +1,83 @@ +/* + * Interface for functions that need to be run in internal SRAM + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASSEMBLY__ +#include <plat/sram.h> + +extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); + +extern u32 omap3_configure_core_dpll( + u32 m2, u32 unlock_dll, u32 f, u32 inc, + u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, + u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, + u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, + u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); +extern void omap3_sram_restore_context(void); + +/* Do not use these */ +extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); +extern unsigned long omap24xx_sram_reprogram_clock_sz; + +extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern unsigned long omap242x_sram_ddr_init_sz; + +extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, + int bypass); +extern unsigned long omap242x_sram_set_prcm_sz; + +extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern unsigned long omap242x_sram_reprogram_sdrc_sz; + + +extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern unsigned long omap243x_sram_ddr_init_sz; + +extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, + int bypass); +extern unsigned long omap243x_sram_set_prcm_sz; + +extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern unsigned long omap243x_sram_reprogram_sdrc_sz; + +extern u32 omap3_sram_configure_core_dpll( + u32 m2, u32 unlock_dll, u32 f, u32 inc, + u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, + u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, + u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, + u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); +extern unsigned long omap3_sram_configure_core_dpll_sz; + +#ifdef CONFIG_PM +extern void omap_push_sram_idle(void); +#else +static inline void omap_push_sram_idle(void) {} +#endif /* CONFIG_PM */ + +#endif /* __ASSEMBLY__ */ + +/* + * OMAP2+: define the SRAM PA addresses. + * Used by the SRAM management code and the idle sleep code. + */ +#define OMAP2_SRAM_PA 0x40200000 +#define OMAP3_SRAM_PA 0x40200000 +#ifdef CONFIG_OMAP4_ERRATA_I688 +#define OMAP4_SRAM_PA 0x40304000 +#define OMAP4_SRAM_VA 0xfe404000 +#else +#define OMAP4_SRAM_PA 0x40300000 +#endif +#define AM33XX_SRAM_PA 0x40300000 diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index 8f7326cd435b..680a7c56cc3e 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S @@ -34,8 +34,8 @@ #include "soc.h" #include "iomap.h" -#include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" +#include "prm2xxx.h" +#include "cm2xxx.h" #include "sdrc.h" .text diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index b140d6578529..a1e9edd673f4 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S @@ -34,8 +34,8 @@ #include "soc.h" #include "iomap.h" -#include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" +#include "prm2xxx.h" +#include "cm2xxx.h" #include "sdrc.h" .text diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 2d0ceaa23fb8..1446331b576a 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -32,7 +32,7 @@ #include "soc.h" #include "iomap.h" #include "sdrc.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" /* * This file needs be built unconditionally as ARM to interoperate correctly diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 44f9aa7ec0c0..c5bc2cb4d8d3 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -43,10 +43,11 @@ #include <asm/sched_clock.h> #include <asm/arch_timer.h> -#include <plat/omap_hwmod.h> -#include <plat/omap_device.h> +#include "omap_hwmod.h" +#include "omap_device.h" +#include <plat/counter-32k.h> #include <plat/dmtimer.h> -#include <plat/omap-pm.h> +#include "omap-pm.h" #include "soc.h" #include "common.h" @@ -467,7 +468,7 @@ OMAP_SYS_TIMER(3_am33xx) #ifdef CONFIG_ARCH_OMAP4 #ifdef CONFIG_LOCAL_TIMERS static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, - OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START); + OMAP44XX_LOCAL_TWD_BASE, 29); #endif static void __init omap4_timer_init(void) @@ -559,6 +560,8 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) if (timer_dev_attr) pdata->timer_capability = timer_dev_attr->timer_capability; + pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; + pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), NULL, 0, 0); diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 635e109f5ad3..827f54a1dd1d 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c @@ -26,9 +26,6 @@ #include <linux/regulator/machine.h> #include <linux/regulator/fixed.h> -#include <plat/i2c.h> -#include <plat/usb.h> - #include "soc.h" #include "twl-common.h" #include "pm.h" diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c index 3c434498e12e..d1dbe125b34f 100644 --- a/arch/arm/mach-omap2/usb-host.c +++ b/arch/arm/mach-omap2/usb-host.c @@ -25,10 +25,10 @@ #include <asm/io.h> -#include <plat/usb.h> -#include <plat/omap_device.h> - +#include "soc.h" +#include "omap_device.h" #include "mux.h" +#include "usb.h" #ifdef CONFIG_MFD_OMAP_USB_HOST diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 51da21cb78f1..7b33b375fe77 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -25,12 +25,10 @@ #include <linux/io.h> #include <linux/usb/musb.h> -#include <plat/usb.h> -#include <plat/omap_device.h> - -#include "am35xx.h" - +#include "omap_device.h" +#include "soc.h" #include "mux.h" +#include "usb.h" static struct musb_hdrc_config musb_config = { .multipoint = 1, diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 805bea6edf17..a8795ff19e6d 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -15,10 +15,11 @@ #include <linux/platform_device.h> #include <linux/gpio.h> #include <linux/export.h> +#include <linux/platform_data/usb-omap.h> #include <linux/usb/musb.h> -#include <plat/gpmc.h> +#include "gpmc.h" #include "mux.h" diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h new file mode 100644 index 000000000000..9b986ead7c45 --- /dev/null +++ b/arch/arm/mach-omap2/usb.h @@ -0,0 +1,82 @@ +#include <linux/platform_data/usb-omap.h> + +/* AM35x */ +/* USB 2.0 PHY Control */ +#define CONF2_PHY_GPIOMODE (1 << 23) +#define CONF2_OTGMODE (3 << 14) +#define CONF2_NO_OVERRIDE (0 << 14) +#define CONF2_FORCE_HOST (1 << 14) +#define CONF2_FORCE_DEVICE (2 << 14) +#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14) +#define CONF2_SESENDEN (1 << 13) +#define CONF2_VBDTCTEN (1 << 12) +#define CONF2_REFFREQ_24MHZ (2 << 8) +#define CONF2_REFFREQ_26MHZ (7 << 8) +#define CONF2_REFFREQ_13MHZ (6 << 8) +#define CONF2_REFFREQ (0xf << 8) +#define CONF2_PHYCLKGD (1 << 7) +#define CONF2_VBUSSENSE (1 << 6) +#define CONF2_PHY_PLLON (1 << 5) +#define CONF2_RESET (1 << 4) +#define CONF2_PHYPWRDN (1 << 3) +#define CONF2_OTGPWRDN (1 << 2) +#define CONF2_DATPOL (1 << 1) + +/* TI81XX specific definitions */ +#define USBCTRL0 0x620 +#define USBSTAT0 0x624 + +/* TI816X PHY controls bits */ +#define TI816X_USBPHY0_NORMAL_MODE (1 << 0) +#define TI816X_USBPHY_REFCLK_OSC (1 << 8) + +/* TI814X PHY controls bits */ +#define USBPHY_CM_PWRDN (1 << 0) +#define USBPHY_OTG_PWRDN (1 << 1) +#define USBPHY_CHGDET_DIS (1 << 2) +#define USBPHY_CHGDET_RSTRT (1 << 3) +#define USBPHY_SRCONDM (1 << 4) +#define USBPHY_SINKONDP (1 << 5) +#define USBPHY_CHGISINK_EN (1 << 6) +#define USBPHY_CHGVSRC_EN (1 << 7) +#define USBPHY_DMPULLUP (1 << 8) +#define USBPHY_DPPULLUP (1 << 9) +#define USBPHY_CDET_EXTCTL (1 << 10) +#define USBPHY_GPIO_MODE (1 << 12) +#define USBPHY_DPOPBUFCTL (1 << 13) +#define USBPHY_DMOPBUFCTL (1 << 14) +#define USBPHY_DPINPUT (1 << 15) +#define USBPHY_DMINPUT (1 << 16) +#define USBPHY_DPGPIO_PD (1 << 17) +#define USBPHY_DMGPIO_PD (1 << 18) +#define USBPHY_OTGVDET_EN (1 << 19) +#define USBPHY_OTGSESSEND_EN (1 << 20) +#define USBPHY_DATA_POLARITY (1 << 23) + +struct usbhs_omap_board_data { + enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; + + /* have to be valid if phy_reset is true and portx is in phy mode */ + int reset_gpio_port[OMAP3_HS_USB_PORTS]; + + /* Set this to true for ES2.x silicon */ + unsigned es2_compatibility:1; + + unsigned phy_reset:1; + + /* + * Regulators for USB PHYs. + * Each PHY can have a separate regulator. + */ + struct regulator *regulator[OMAP3_HS_USB_PORTS]; +}; + +extern void usb_musb_init(struct omap_musb_board_data *board_data); +extern void usbhs_init(const struct usbhs_omap_board_data *pdata); + +extern void am35x_musb_reset(void); +extern void am35x_musb_phy_power(u8 on); +extern void am35x_musb_clear_irq(void); +extern void am35x_set_mode(u8 musb_mode); +extern void ti81xx_musb_phy_power(u8 on); + diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index b2f1c67043a2..f6b6c37ac3f4 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c @@ -11,7 +11,7 @@ #include <linux/io.h> #include <linux/err.h> -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" #include "wd_timer.h" #include "common.h" diff --git a/arch/arm/mach-omap2/wd_timer.h b/arch/arm/mach-omap2/wd_timer.h index f6bbba73b535..a78f81034a9f 100644 --- a/arch/arm/mach-omap2/wd_timer.h +++ b/arch/arm/mach-omap2/wd_timer.h @@ -10,7 +10,7 @@ #ifndef __ARCH_ARM_MACH_OMAP2_WD_TIMER_H #define __ARCH_ARM_MACH_OMAP2_WD_TIMER_H -#include <plat/omap_hwmod.h> +#include "omap_hwmod.h" extern int omap2_wd_timer_disable(struct omap_hwmod *oh); extern int omap2_wd_timer_reset(struct omap_hwmod *oh); diff --git a/arch/arm/mach-prima2/include/mach/gpio.h b/arch/arm/mach-prima2/include/mach/gpio.h deleted file mode 100644 index 1904bb03876e..000000000000 --- a/arch/arm/mach-prima2/include/mach/gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __MACH_GPIO_H -#define __MACH_GPIO_H - -/* Pull up/down values */ -enum sirfsoc_gpio_pull { - SIRFSOC_GPIO_PULL_NONE, - SIRFSOC_GPIO_PULL_UP, - SIRFSOC_GPIO_PULL_DOWN, -}; - -void sirfsoc_gpio_set_pull(unsigned gpio, unsigned mode); - -#endif diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c index 749220f91a70..4407b1730539 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2440.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c @@ -163,7 +163,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = { CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), }; -static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif) +static int __init_refok s3c2440_clk_add(struct device *dev, struct subsys_interface *sif) { struct clk *clock_upll; struct clk *clock_h; diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c index ed5a95ece9eb..77ee0b732237 100644 --- a/arch/arm/mach-s3c24xx/s3c2416.c +++ b/arch/arm/mach-s3c24xx/s3c2416.c @@ -61,6 +61,7 @@ #include <plat/nand-core.h> #include <plat/adc-core.h> #include <plat/rtc-core.h> +#include <plat/spi-core.h> static struct map_desc s3c2416_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -132,6 +133,7 @@ void __init s3c2416_map_io(void) /* initialize device information early */ s3c2416_default_sdhci0(); s3c2416_default_sdhci1(); + s3c64xx_spi_setname("s3c2443-spi"); iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc)); } diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c index ab648ad8fa50..165b6a6b3daa 100644 --- a/arch/arm/mach-s3c24xx/s3c2443.c +++ b/arch/arm/mach-s3c24xx/s3c2443.c @@ -43,6 +43,7 @@ #include <plat/nand-core.h> #include <plat/adc-core.h> #include <plat/rtc-core.h> +#include <plat/spi-core.h> static struct map_desc s3c2443_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -100,6 +101,9 @@ void __init s3c2443_map_io(void) s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull; s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull; + /* initialize device information early */ + s3c64xx_spi_setname("s3c2443-spi"); + iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); } diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 6e6a0a9d6778..111e404a81fd 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c @@ -44,6 +44,7 @@ #include <plat/sdhci.h> #include <plat/adc-core.h> #include <plat/fb-core.h> +#include <plat/spi-core.h> #include <plat/gpio-cfg.h> #include <plat/regs-irqtype.h> #include <plat/regs-serial.h> @@ -179,6 +180,7 @@ void __init s5p6440_map_io(void) /* initialize any device information early */ s3c_adc_setname("s3c64xx-adc"); s3c_fb_setname("s5p64x0-fb"); + s3c64xx_spi_setname("s5p64x0-spi"); s5p64x0_default_sdhci0(); s5p64x0_default_sdhci1(); @@ -193,6 +195,7 @@ void __init s5p6450_map_io(void) /* initialize any device information early */ s3c_adc_setname("s3c64xx-adc"); s3c_fb_setname("s5p64x0-fb"); + s3c64xx_spi_setname("s5p64x0-spi"); s5p64x0_default_sdhci0(); s5p64x0_default_sdhci1(); diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c index 621908658861..cc6e561c9958 100644 --- a/arch/arm/mach-s5pc100/common.c +++ b/arch/arm/mach-s5pc100/common.c @@ -45,6 +45,7 @@ #include <plat/fb-core.h> #include <plat/iic-core.h> #include <plat/onenand-core.h> +#include <plat/spi-core.h> #include <plat/regs-serial.h> #include <plat/watchdog-reset.h> @@ -165,6 +166,8 @@ void __init s5pc100_map_io(void) s3c_onenand_setname("s5pc100-onenand"); s3c_fb_setname("s5pc100-fb"); s3c_cfcon_setname("s5pc100-pata"); + + s3c64xx_spi_setname("s5pc100-spi"); } void __init s5pc100_init_clocks(int xtal) diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 4c9e9027df9a..a0c50efe8145 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c @@ -43,6 +43,7 @@ #include <plat/iic-core.h> #include <plat/keypad-core.h> #include <plat/tv-core.h> +#include <plat/spi-core.h> #include <plat/regs-serial.h> #include "common.h" @@ -196,6 +197,8 @@ void __init s5pv210_map_io(void) /* setup TV devices */ s5p_hdmi_setname("s5pv210-hdmi"); + + s3c64xx_spi_setname("s5pv210-spi"); } void __init s5pv210_init_clocks(int xtal) diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 2912eab3b967..3cc8b1c21da9 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1196,7 +1196,7 @@ static void __init eva_init(void) #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 32K*8way */ - l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff); + l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); #endif i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 3cafb6ab5e9a..37b2a3133b3b 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -24,17 +24,17 @@ #include <linux/clkdev.h> #include <mach/common.h> -#define FRQMR 0xffc80014 -#define MSTPCR0 0xffc80030 -#define MSTPCR1 0xffc80034 -#define MSTPCR3 0xffc8003c -#define MSTPSR1 0xffc80044 -#define MSTPSR4 0xffc80048 -#define MSTPSR6 0xffc8004c -#define MSTPCR4 0xffc80050 -#define MSTPCR5 0xffc80054 -#define MSTPCR6 0xffc80058 -#define MSTPCR7 0xffc80040 +#define FRQMR IOMEM(0xffc80014) +#define MSTPCR0 IOMEM(0xffc80030) +#define MSTPCR1 IOMEM(0xffc80034) +#define MSTPCR3 IOMEM(0xffc8003c) +#define MSTPSR1 IOMEM(0xffc80044) +#define MSTPSR4 IOMEM(0xffc80048) +#define MSTPSR6 IOMEM(0xffc8004c) +#define MSTPCR4 IOMEM(0xffc80050) +#define MSTPCR5 IOMEM(0xffc80054) +#define MSTPCR6 IOMEM(0xffc80058) +#define MSTPCR7 IOMEM(0xffc80040) /* ioremap() through clock mapping mandatory to avoid * collision with ARM coherent DMA virtual memory range. diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 2917668f0091..ebbffc25f24f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -247,7 +247,7 @@ void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*16way */ - l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff); + l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff); #endif r8a7779_pm_init(); diff --git a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h deleted file mode 100644 index e69de29bb2d1..000000000000 --- a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h +++ /dev/null diff --git a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h deleted file mode 100644 index e69de29bb2d1..000000000000 --- a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h +++ /dev/null diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 57e235f4ac74..aa5325cd1c42 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -182,7 +182,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") .init_early = tegra20_init_early, .init_irq = tegra_dt_init_irq, .handle_irq = gic_handle_irq, - .timer = &tegra_timer, + .timer = &tegra_sys_timer, .init_machine = tegra_dt_init, .init_late = tegra_dt_init_late, .restart = tegra_assert_system_reset, diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index e4a676d4ddf7..5e92a81f9a2e 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -89,7 +89,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)") .init_early = tegra30_init_early, .init_irq = tegra_dt_init_irq, .handle_irq = gic_handle_irq, - .timer = &tegra_timer, + .timer = &tegra_sys_timer, .init_machine = tegra30_dt_init, .init_late = tegra_init_late, .restart = tegra_assert_system_reset, diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h index f88e5143c767..91fbe733a21e 100644 --- a/arch/arm/mach-tegra/board.h +++ b/arch/arm/mach-tegra/board.h @@ -55,5 +55,5 @@ static inline int harmony_pcie_init(void) { return 0; } void __init tegra_paz00_wifikill_init(void); -extern struct sys_timer tegra_timer; +extern struct sys_timer tegra_sys_timer; #endif diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c b/arch/arm/mach-tegra/tegra20_clocks_data.c index cc9b5fd8c3d3..8d398a33adf7 100644 --- a/arch/arm/mach-tegra/tegra20_clocks_data.c +++ b/arch/arm/mach-tegra/tegra20_clocks_data.c @@ -953,6 +953,7 @@ PERIPH_CLK(pcie_xclk, NULL, "pcie_xclk", 74, 0, 26000000, mux_clk_m, static struct clk *tegra_list_clks[] = { &tegra_apbdma, &tegra_rtc, + &tegra_timer, &tegra_i2s1, &tegra_i2s2, &tegra_spdif_out, diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index 5cd502c27163..e9de5dfd94ec 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -1199,7 +1199,7 @@ static long tegra30_pll_round_rate(struct clk_hw *hw, unsigned long rate, { struct clk_tegra *c = to_clk_tegra(hw); unsigned long input_rate = *prate; - unsigned long output_rate = *prate; + u64 output_rate = *prate; const struct clk_pll_freq_table *sel; struct clk_pll_freq_table cfg; int mul; diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c index d92cb556ae35..3d2e5532a9ea 100644 --- a/arch/arm/mach-tegra/tegra30_clocks_data.c +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c @@ -1143,6 +1143,7 @@ struct clk *tegra_list_clks[] = { &tegra_apbdma, &tegra_rtc, &tegra_kbc, + &tegra_timer, &tegra_kfuse, &tegra_fuse, &tegra_fuse_burn, diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index eccdce983043..d3b8c8e7368f 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -245,7 +245,7 @@ static void __init tegra_init_timer(void) register_persistent_clock(NULL, tegra_read_persistent_clock); } -struct sys_timer tegra_timer = { +struct sys_timer tegra_sys_timer = { .init = tegra_init_timer, }; diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 2236cbd03cd7..1f3fbc2bb776 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -16,6 +16,7 @@ #include <linux/stat.h> #include <linux/of.h> #include <linux/of_irq.h> +#include <linux/irq.h> #include <linux/platform_data/clk-ux500.h> #include <asm/hardware/gic.h> diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index b9f60ebe3bc4..023f443784ec 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -856,8 +856,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) if (thumb2_32b) { offset.un = 0; handler = do_alignment_t32_to_handler(&instr, regs, &offset); - } else + } else { + offset.un = 0; handler = do_alignment_ldmstm; + } break; default: diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 477a2d23ddf1..58bc3e4d3bd0 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -610,7 +610,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller) { u64 mask = get_coherent_dma_mask(dev); - struct page *page; + struct page *page = NULL; void *addr; #ifdef CONFIG_DMA_API_DEBUG diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h index bf312c354a21..0f5a5f2a2c7b 100644 --- a/arch/arm/mm/vmregion.h +++ b/arch/arm/mm/vmregion.h @@ -17,7 +17,6 @@ struct arm_vmregion { struct list_head vm_list; unsigned long vm_start; unsigned long vm_end; - void *priv; int vm_active; const void *caller; }; diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c index 540d3a7d92df..e7b920b58675 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c +++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c @@ -55,7 +55,7 @@ struct platform_device *__init imx_add_mxc_mmc( struct resource res[] = { { .start = data->iobase, - .end = data->iobase + SZ_4K - 1, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { .start = data->irq, diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 7cd56ed5cd94..82fcb206b5b2 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -26,6 +26,7 @@ config ARCH_OMAP2PLUS select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP select OMAP_DM_TIMER + select PINCTRL select PROC_DEVICETREE if PROC_FS select SPARSE_IRQ select USE_OF diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index dacaee009a4e..8d885848600a 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -3,13 +3,12 @@ # # Common support -obj-y := common.o sram.o clock.o dma.o fb.o counter_32k.o +obj-y := sram.o dma.o fb.o counter_32k.o obj-m := obj-n := obj- := # omap_device support (OMAP2+ only at the moment) -obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_device.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o @@ -20,4 +19,3 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y) # OMAP mailbox framework obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o -obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c deleted file mode 100644 index 9d7ac20ef8f9..000000000000 --- a/arch/arm/plat-omap/clock.c +++ /dev/null @@ -1,544 +0,0 @@ -/* - * linux/arch/arm/plat-omap/clock.c - * - * Copyright (C) 2004 - 2008 Nokia corporation - * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> - * - * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/export.h> -#include <linux/err.h> -#include <linux/string.h> -#include <linux/clk.h> -#include <linux/mutex.h> -#include <linux/cpufreq.h> -#include <linux/io.h> - -#include <plat/clock.h> - -static LIST_HEAD(clocks); -static DEFINE_MUTEX(clocks_mutex); -static DEFINE_SPINLOCK(clockfw_lock); - -static struct clk_functions *arch_clock; - -/* - * Standard clock functions defined in include/linux/clk.h - */ - -int clk_enable(struct clk *clk) -{ - unsigned long flags; - int ret; - - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - if (!arch_clock || !arch_clock->clk_enable) - return -EINVAL; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = arch_clock->clk_enable(clk); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_enable); - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - - if (clk == NULL || IS_ERR(clk)) - return; - - if (!arch_clock || !arch_clock->clk_disable) - return; - - spin_lock_irqsave(&clockfw_lock, flags); - if (clk->usecount == 0) { - pr_err("Trying disable clock %s with 0 usecount\n", - clk->name); - WARN_ON(1); - goto out; - } - - arch_clock->clk_disable(clk); - -out: - spin_unlock_irqrestore(&clockfw_lock, flags); -} -EXPORT_SYMBOL(clk_disable); - -unsigned long clk_get_rate(struct clk *clk) -{ - unsigned long flags; - unsigned long ret; - - if (clk == NULL || IS_ERR(clk)) - return 0; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = clk->rate; - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_get_rate); - -/* - * Optional clock functions defined in include/linux/clk.h - */ - -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - long ret; - - if (clk == NULL || IS_ERR(clk)) - return 0; - - if (!arch_clock || !arch_clock->clk_round_rate) - return 0; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = arch_clock->clk_round_rate(clk, rate); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_round_rate); - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret = -EINVAL; - - if (clk == NULL || IS_ERR(clk)) - return ret; - - if (!arch_clock || !arch_clock->clk_set_rate) - return ret; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = arch_clock->clk_set_rate(clk, rate); - if (ret == 0) - propagate_rate(clk); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_set_rate); - -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - unsigned long flags; - int ret = -EINVAL; - - if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent)) - return ret; - - if (!arch_clock || !arch_clock->clk_set_parent) - return ret; - - spin_lock_irqsave(&clockfw_lock, flags); - if (clk->usecount == 0) { - ret = arch_clock->clk_set_parent(clk, parent); - if (ret == 0) - propagate_rate(clk); - } else - ret = -EBUSY; - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_set_parent); - -struct clk *clk_get_parent(struct clk *clk) -{ - return clk->parent; -} -EXPORT_SYMBOL(clk_get_parent); - -/* - * OMAP specific clock functions shared between omap1 and omap2 - */ - -int __initdata mpurate; - -/* - * By default we use the rate set by the bootloader. - * You can override this with mpurate= cmdline option. - */ -static int __init omap_clk_setup(char *str) -{ - get_option(&str, &mpurate); - - if (!mpurate) - return 1; - - if (mpurate < 1000) - mpurate *= 1000000; - - return 1; -} -__setup("mpurate=", omap_clk_setup); - -/* Used for clocks that always have same value as the parent clock */ -unsigned long followparent_recalc(struct clk *clk) -{ - return clk->parent->rate; -} - -/* - * Used for clocks that have the same value as the parent clock, - * divided by some factor - */ -unsigned long omap_fixed_divisor_recalc(struct clk *clk) -{ - WARN_ON(!clk->fixed_div); - - return clk->parent->rate / clk->fixed_div; -} - -void clk_reparent(struct clk *child, struct clk *parent) -{ - list_del_init(&child->sibling); - if (parent) - list_add(&child->sibling, &parent->children); - child->parent = parent; - - /* now do the debugfs renaming to reattach the child - to the proper parent */ -} - -/* Propagate rate to children */ -void propagate_rate(struct clk *tclk) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - -static LIST_HEAD(root_clks); - -/** - * recalculate_root_clocks - recalculate and propagate all root clocks - * - * Recalculates all root clocks (clocks with no parent), which if the - * clock's .recalc is set correctly, should also propagate their rates. - * Called at init. - */ -void recalculate_root_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &root_clks, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - -/** - * clk_preinit - initialize any fields in the struct clk before clk init - * @clk: struct clk * to initialize - * - * Initialize any struct clk fields needed before normal clk initialization - * can run. No return value. - */ -void clk_preinit(struct clk *clk) -{ - INIT_LIST_HEAD(&clk->children); -} - -int clk_register(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - /* - * trap out already registered clocks - */ - if (clk->node.next || clk->node.prev) - return 0; - - mutex_lock(&clocks_mutex); - if (clk->parent) - list_add(&clk->sibling, &clk->parent->children); - else - list_add(&clk->sibling, &root_clks); - - list_add(&clk->node, &clocks); - if (clk->init) - clk->init(clk); - mutex_unlock(&clocks_mutex); - - return 0; -} -EXPORT_SYMBOL(clk_register); - -void clk_unregister(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return; - - mutex_lock(&clocks_mutex); - list_del(&clk->sibling); - list_del(&clk->node); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL(clk_unregister); - -void clk_enable_init_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &clocks, node) { - if (clkp->flags & ENABLE_ON_INIT) - clk_enable(clkp); - } -} - -int omap_clk_enable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->allow_idle) - c->ops->allow_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} - -int omap_clk_disable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->deny_idle) - c->ops->deny_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} - -/* - * Low level helpers - */ -static int clkll_enable_null(struct clk *clk) -{ - return 0; -} - -static void clkll_disable_null(struct clk *clk) -{ -} - -const struct clkops clkops_null = { - .enable = clkll_enable_null, - .disable = clkll_disable_null, -}; - -/* - * Dummy clock - * - * Used for clock aliases that are needed on some OMAPs, but not others - */ -struct clk dummy_ck = { - .name = "dummy", - .ops = &clkops_null, -}; - -/* - * - */ - -#ifdef CONFIG_OMAP_RESET_CLOCKS -/* - * Disable any unused clocks left on by the bootloader - */ -static int __init clk_disable_unused(void) -{ - struct clk *ck; - unsigned long flags; - - if (!arch_clock || !arch_clock->clk_disable_unused) - return 0; - - pr_info("clock: disabling unused clocks to save power\n"); - - spin_lock_irqsave(&clockfw_lock, flags); - list_for_each_entry(ck, &clocks, node) { - if (ck->ops == &clkops_null) - continue; - - if (ck->usecount > 0 || !ck->enable_reg) - continue; - - arch_clock->clk_disable_unused(ck); - } - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} -late_initcall(clk_disable_unused); -late_initcall(omap_clk_enable_autoidle_all); -#endif - -int __init clk_init(struct clk_functions * custom_clocks) -{ - if (!custom_clocks) { - pr_err("No custom clock functions registered\n"); - BUG(); - } - - arch_clock = custom_clocks; - - return 0; -} - -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) -/* - * debugfs support to trace clock tree hierarchy and attributes - */ - -#include <linux/debugfs.h> -#include <linux/seq_file.h> - -static struct dentry *clk_debugfs_root; - -static int clk_dbg_show_summary(struct seq_file *s, void *unused) -{ - struct clk *c; - struct clk *pa; - - mutex_lock(&clocks_mutex); - seq_printf(s, "%-30s %-30s %-10s %s\n", - "clock-name", "parent-name", "rate", "use-count"); - - list_for_each_entry(c, &clocks, node) { - pa = c->parent; - seq_printf(s, "%-30s %-30s %-10lu %d\n", - c->name, pa ? pa->name : "none", c->rate, c->usecount); - } - mutex_unlock(&clocks_mutex); - - return 0; -} - -static int clk_dbg_open(struct inode *inode, struct file *file) -{ - return single_open(file, clk_dbg_show_summary, inode->i_private); -} - -static const struct file_operations debug_clock_fops = { - .open = clk_dbg_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int clk_debugfs_register_one(struct clk *c) -{ - int err; - struct dentry *d; - struct clk *pa = c->parent; - - d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); - if (!d) - return -ENOMEM; - c->dent = d; - - d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); - if (!d) { - err = -ENOMEM; - goto err_out; - } - d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); - if (!d) { - err = -ENOMEM; - goto err_out; - } - d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); - if (!d) { - err = -ENOMEM; - goto err_out; - } - return 0; - -err_out: - debugfs_remove_recursive(c->dent); - return err; -} - -static int clk_debugfs_register(struct clk *c) -{ - int err; - struct clk *pa = c->parent; - - if (pa && !pa->dent) { - err = clk_debugfs_register(pa); - if (err) - return err; - } - - if (!c->dent) { - err = clk_debugfs_register_one(c); - if (err) - return err; - } - return 0; -} - -static int __init clk_debugfs_init(void) -{ - struct clk *c; - struct dentry *d; - int err; - - d = debugfs_create_dir("clock", NULL); - if (!d) - return -ENOMEM; - clk_debugfs_root = d; - - list_for_each_entry(c, &clocks, node) { - err = clk_debugfs_register(c); - if (err) - goto err_out; - } - - d = debugfs_create_file("summary", S_IRUGO, - d, NULL, &debug_clock_fops); - if (!d) - return -ENOMEM; - - return 0; -err_out: - debugfs_remove_recursive(clk_debugfs_root); - return err; -} -late_initcall(clk_debugfs_init); - -#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c deleted file mode 100644 index 111315a69354..000000000000 --- a/arch/arm/plat-omap/common.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/arch/arm/plat-omap/common.c - * - * Code common to all OMAP machines. - * The file is created by Tony Lindgren <tony@atomide.com> - * - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/dma-mapping.h> - -#include <plat/common.h> -#include <plat/vram.h> -#include <linux/platform_data/dsp-omap.h> -#include <plat/dma.h> - -#include <plat/omap-secure.h> - -void __init omap_reserve(void) -{ - omap_vram_reserve_sdram_memblock(); - omap_dsp_reserve_sdram_memblock(); - omap_secure_ram_reserve_memblock(); - omap_barrier_reserve_memblock(); -} - -void __init omap_init_consistent_dma_size(void) -{ -#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE - init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20); -#endif -} - -/* - * Stub function for OMAP2 so that common files - * continue to build when custom builds are used - */ -int __weak omap_secure_ram_reserve_memblock(void) -{ - return 0; -} diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index 87ba8dd0d791..f3771cdb9838 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -22,9 +22,6 @@ #include <asm/mach/time.h> #include <asm/sched_clock.h> -#include <plat/common.h> -#include <plat/clock.h> - /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ #define OMAP2_32KSYNCNT_REV_OFF 0x0 #define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c index c7a4c0902b38..a609e2161817 100644 --- a/arch/arm/plat-omap/debug-devices.c +++ b/arch/arm/plat-omap/debug-devices.c @@ -15,7 +15,7 @@ #include <linux/io.h> #include <linux/smc91x.h> -#include <mach/hardware.h> +#include <plat/debug-devices.h> /* Many OMAP development platforms reuse the same "debug board"; these * platforms include H2, H3, H4, and Perseus2. diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c index ea29bbe8e5cf..c43ea21f33b4 100644 --- a/arch/arm/plat-omap/debug-leds.c +++ b/arch/arm/plat-omap/debug-leds.c @@ -17,16 +17,33 @@ #include <linux/platform_data/gpio-omap.h> #include <linux/slab.h> -#include <mach/hardware.h> #include <asm/mach-types.h> -#include <plat/fpga.h> - /* Many OMAP development platforms reuse the same "debug board"; these * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the * debug board (all green), accessed through FPGA registers. */ +/* NOTE: most boards don't have a static mapping for the FPGA ... */ +struct h2p2_dbg_fpga { + /* offset 0x00 */ + u16 smc91x[8]; + /* offset 0x10 */ + u16 fpga_rev; + u16 board_rev; + u16 gpio_outputs; + u16 leds; + /* offset 0x18 */ + u16 misc_inputs; + u16 lan_status; + u16 lan_reset; + u16 reserved0; + /* offset 0x20 */ + u16 ps2_data; + u16 ps2_ctrl; + /* plus also 4 rs232 ports ... */ +}; + static struct h2p2_dbg_fpga __iomem *fpga; static u16 fpga_led_state; diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index c76ed8bff838..c288b76f8e6c 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -36,9 +36,7 @@ #include <linux/slab.h> #include <linux/delay.h> -#include <plat/cpu.h> -#include <plat/dma.h> -#include <plat/tc.h> +#include <plat-omap/dma-omap.h> /* * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA @@ -175,12 +173,13 @@ static inline void set_gdma_dev(int req, int dev) #define omap_writel(val, reg) do {} while (0) #endif +#ifdef CONFIG_ARCH_OMAP1 void omap_set_dma_priority(int lch, int dst_port, int priority) { unsigned long reg; u32 l; - if (cpu_class_is_omap1()) { + if (dma_omap1()) { switch (dst_port) { case OMAP_DMA_PORT_OCP_T1: /* FFFECC00 */ reg = OMAP_TC_OCPT1_PRIOR; @@ -203,18 +202,22 @@ void omap_set_dma_priority(int lch, int dst_port, int priority) l |= (priority & 0xf) << 8; omap_writel(l, reg); } +} +#endif - if (cpu_class_is_omap2()) { - u32 ccr; +#ifdef CONFIG_ARCH_OMAP2PLUS +void omap_set_dma_priority(int lch, int dst_port, int priority) +{ + u32 ccr; - ccr = p->dma_read(CCR, lch); - if (priority) - ccr |= (1 << 6); - else - ccr &= ~(1 << 6); - p->dma_write(ccr, CCR, lch); - } + ccr = p->dma_read(CCR, lch); + if (priority) + ccr |= (1 << 6); + else + ccr &= ~(1 << 6); + p->dma_write(ccr, CCR, lch); } +#endif EXPORT_SYMBOL(omap_set_dma_priority); void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, @@ -228,7 +231,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, l |= data_type; p->dma_write(l, CSDP, lch); - if (cpu_class_is_omap1()) { + if (dma_omap1()) { u16 ccr; ccr = p->dma_read(CCR, lch); @@ -244,7 +247,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, p->dma_write(ccr, CCR2, lch); } - if (cpu_class_is_omap2() && dma_trigger) { + if (dma_omap2plus() && dma_trigger) { u32 val; val = p->dma_read(CCR, lch); @@ -284,7 +287,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color) { BUG_ON(omap_dma_in_1510_mode()); - if (cpu_class_is_omap1()) { + if (dma_omap1()) { u16 w; w = p->dma_read(CCR2, lch); @@ -314,7 +317,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color) p->dma_write(w, LCH_CTRL, lch); } - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { u32 val; val = p->dma_read(CCR, lch); @@ -342,7 +345,7 @@ EXPORT_SYMBOL(omap_set_dma_color_mode); void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode) { - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { u32 csdp; csdp = p->dma_read(CSDP, lch); @@ -355,7 +358,7 @@ EXPORT_SYMBOL(omap_set_dma_write_mode); void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode) { - if (cpu_class_is_omap1() && !cpu_is_omap15xx()) { + if (dma_omap1() && !dma_omap15xx()) { u32 l; l = p->dma_read(LCH_CTRL, lch); @@ -373,7 +376,7 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode, { u32 l; - if (cpu_class_is_omap1()) { + if (dma_omap1()) { u16 w; w = p->dma_read(CSDP, lch); @@ -415,7 +418,7 @@ EXPORT_SYMBOL(omap_set_dma_params); void omap_set_dma_src_index(int lch, int eidx, int fidx) { - if (cpu_class_is_omap2()) + if (dma_omap2plus()) return; p->dma_write(eidx, CSEI, lch); @@ -447,13 +450,13 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) case OMAP_DMA_DATA_BURST_DIS: break; case OMAP_DMA_DATA_BURST_4: - if (cpu_class_is_omap2()) + if (dma_omap2plus()) burst = 0x1; else burst = 0x2; break; case OMAP_DMA_DATA_BURST_8: - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { burst = 0x2; break; } @@ -463,7 +466,7 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) * fall through */ case OMAP_DMA_DATA_BURST_16: - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { burst = 0x3; break; } @@ -487,7 +490,7 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode, { u32 l; - if (cpu_class_is_omap1()) { + if (dma_omap1()) { l = p->dma_read(CSDP, lch); l &= ~(0x1f << 9); l |= dest_port << 9; @@ -508,7 +511,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_params); void omap_set_dma_dest_index(int lch, int eidx, int fidx) { - if (cpu_class_is_omap2()) + if (dma_omap2plus()) return; p->dma_write(eidx, CDEI, lch); @@ -540,19 +543,19 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) case OMAP_DMA_DATA_BURST_DIS: break; case OMAP_DMA_DATA_BURST_4: - if (cpu_class_is_omap2()) + if (dma_omap2plus()) burst = 0x1; else burst = 0x2; break; case OMAP_DMA_DATA_BURST_8: - if (cpu_class_is_omap2()) + if (dma_omap2plus()) burst = 0x2; else burst = 0x3; break; case OMAP_DMA_DATA_BURST_16: - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { burst = 0x3; break; } @@ -573,7 +576,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode); static inline void omap_enable_channel_irq(int lch) { /* Clear CSR */ - if (cpu_class_is_omap1()) + if (dma_omap1()) p->dma_read(CSR, lch); else p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); @@ -587,7 +590,7 @@ static inline void omap_disable_channel_irq(int lch) /* disable channel interrupts */ p->dma_write(0, CICR, lch); /* Clear CSR */ - if (cpu_class_is_omap1()) + if (dma_omap1()) p->dma_read(CSR, lch); else p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); @@ -611,7 +614,7 @@ static inline void enable_lnk(int lch) l = p->dma_read(CLNK_CTRL, lch); - if (cpu_class_is_omap1()) + if (dma_omap1()) l &= ~(1 << 14); /* Set the ENABLE_LNK bits */ @@ -619,7 +622,7 @@ static inline void enable_lnk(int lch) l = dma_chan[lch].next_lch | (1 << 15); #ifndef CONFIG_ARCH_OMAP1 - if (cpu_class_is_omap2()) + if (dma_omap2plus()) if (dma_chan[lch].next_linked_ch != -1) l = dma_chan[lch].next_linked_ch | (1 << 15); #endif @@ -636,12 +639,12 @@ static inline void disable_lnk(int lch) /* Disable interrupts */ omap_disable_channel_irq(lch); - if (cpu_class_is_omap1()) { + if (dma_omap1()) { /* Set the STOP_LNK bit */ l |= 1 << 14; } - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { /* Clear the ENABLE_LNK bit */ l &= ~(1 << 15); } @@ -655,7 +658,7 @@ static inline void omap2_enable_irq_lch(int lch) u32 val; unsigned long flags; - if (!cpu_class_is_omap2()) + if (dma_omap1()) return; spin_lock_irqsave(&dma_chan_lock, flags); @@ -673,7 +676,7 @@ static inline void omap2_disable_irq_lch(int lch) u32 val; unsigned long flags; - if (!cpu_class_is_omap2()) + if (dma_omap1()) return; spin_lock_irqsave(&dma_chan_lock, flags); @@ -712,7 +715,7 @@ int omap_request_dma(int dev_id, const char *dev_name, if (p->clear_lch_regs) p->clear_lch_regs(free_ch); - if (cpu_class_is_omap2()) + if (dma_omap2plus()) omap_clear_dma(free_ch); spin_unlock_irqrestore(&dma_chan_lock, flags); @@ -723,7 +726,7 @@ int omap_request_dma(int dev_id, const char *dev_name, chan->flags = 0; #ifndef CONFIG_ARCH_OMAP1 - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { chan->chain_id = -1; chan->next_linked_ch = -1; } @@ -731,13 +734,13 @@ int omap_request_dma(int dev_id, const char *dev_name, chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; - if (cpu_class_is_omap1()) + if (dma_omap1()) chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ; - else if (cpu_class_is_omap2()) + else if (dma_omap2plus()) chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ | OMAP2_DMA_TRANS_ERR_IRQ; - if (cpu_is_omap16xx()) { + if (dma_omap16xx()) { /* If the sync device is set, configure it dynamically. */ if (dev_id != 0) { set_gdma_dev(free_ch + 1, dev_id); @@ -748,11 +751,11 @@ int omap_request_dma(int dev_id, const char *dev_name, * id. */ p->dma_write(dev_id | (1 << 10), CCR, free_ch); - } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) { + } else if (dma_omap1()) { p->dma_write(dev_id, CCR, free_ch); } - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { omap_enable_channel_irq(free_ch); omap2_enable_irq_lch(free_ch); } @@ -774,7 +777,7 @@ void omap_free_dma(int lch) } /* Disable interrupt for logical channel */ - if (cpu_class_is_omap2()) + if (dma_omap2plus()) omap2_disable_irq_lch(lch); /* Disable all DMA interrupts for the channel. */ @@ -784,7 +787,7 @@ void omap_free_dma(int lch) p->dma_write(0, CCR, lch); /* Clear registers */ - if (cpu_class_is_omap2()) + if (dma_omap2plus()) omap_clear_dma(lch); spin_lock_irqsave(&dma_chan_lock, flags); @@ -810,7 +813,7 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) { u32 reg; - if (!cpu_class_is_omap2()) { + if (dma_omap1()) { printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __func__); return; } @@ -849,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio, } l = p->dma_read(CCR, lch); l &= ~((1 << 6) | (1 << 26)); - if (cpu_class_is_omap2() && !cpu_is_omap242x()) + if (d->dev_caps & IS_RW_PRIORITY) l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26); else l |= ((read_prio & 0x1) << 6); @@ -882,7 +885,7 @@ void omap_start_dma(int lch) * The CPC/CDAC register needs to be initialized to zero * before starting dma transfer. */ - if (cpu_is_omap15xx()) + if (dma_omap15xx()) p->dma_write(0, CPC, lch); else p->dma_write(0, CDAC, lch); @@ -1045,7 +1048,7 @@ dma_addr_t omap_get_dma_src_pos(int lch) { dma_addr_t offset = 0; - if (cpu_is_omap15xx()) + if (dma_omap15xx()) offset = p->dma_read(CPC, lch); else offset = p->dma_read(CSAC, lch); @@ -1053,7 +1056,7 @@ dma_addr_t omap_get_dma_src_pos(int lch) if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0) offset = p->dma_read(CSAC, lch); - if (!cpu_is_omap15xx()) { + if (!dma_omap15xx()) { /* * CDAC == 0 indicates that the DMA transfer on the channel has * not been started (no data has been transferred so far). @@ -1065,7 +1068,7 @@ dma_addr_t omap_get_dma_src_pos(int lch) offset = p->dma_read(CSSA, lch); } - if (cpu_class_is_omap1()) + if (dma_omap1()) offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); return offset; @@ -1084,7 +1087,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch) { dma_addr_t offset = 0; - if (cpu_is_omap15xx()) + if (dma_omap15xx()) offset = p->dma_read(CPC, lch); else offset = p->dma_read(CDAC, lch); @@ -1093,7 +1096,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch) * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is * read before the DMA controller finished disabling the channel. */ - if (!cpu_is_omap15xx() && offset == 0) { + if (!dma_omap15xx() && offset == 0) { offset = p->dma_read(CDAC, lch); /* * CDAC == 0 indicates that the DMA transfer on the channel has @@ -1104,7 +1107,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch) offset = p->dma_read(CDSA, lch); } - if (cpu_class_is_omap1()) + if (dma_omap1()) offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); return offset; @@ -1121,7 +1124,7 @@ int omap_dma_running(void) { int lch; - if (cpu_class_is_omap1()) + if (dma_omap1()) if (omap_lcd_dma_running()) return 1; @@ -2024,7 +2027,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) dma_chan = d->chan; enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { dma_linked_lch = kzalloc(sizeof(struct dma_link_info) * dma_lch_count, GFP_KERNEL); if (!dma_linked_lch) { @@ -2036,7 +2039,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) spin_lock_init(&dma_chan_lock); for (ch = 0; ch < dma_chan_count; ch++) { omap_clear_dma(ch); - if (cpu_class_is_omap2()) + if (dma_omap2plus()) omap2_disable_irq_lch(ch); dma_chan[ch].dev_id = -1; @@ -2045,7 +2048,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) if (ch >= 6 && enable_1510_mode) continue; - if (cpu_class_is_omap1()) { + if (dma_omap1()) { /* * request_irq() doesn't like dev_id (ie. ch) being * zero, so we have to kludge around this. @@ -2070,11 +2073,11 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) } } - if (cpu_class_is_omap2() && !cpu_is_omap242x()) + if (d->dev_caps & IS_RW_PRIORITY) omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE, DMA_DEFAULT_FIFO_DEPTH, 0); - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { strcpy(irq_name, "0"); dma_irq = platform_get_irq_byname(pdev, irq_name); if (dma_irq < 0) { @@ -2089,9 +2092,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) } } - /* reserve dma channels 0 and 1 in high security devices */ - if (cpu_is_omap34xx() && - (omap_type() != OMAP2_DEVICE_TYPE_GP)) { + /* reserve dma channels 0 and 1 in high security devices on 34xx */ + if (d->dev_caps & HS_CHANNELS_RESERVED) { pr_info("Reserving DMA channels 0 and 1 for HS ROM code\n"); dma_chan[0].dev_id = 0; dma_chan[1].dev_id = 1; @@ -2118,7 +2120,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev) { int dma_irq; - if (cpu_class_is_omap2()) { + if (dma_omap2plus()) { char irq_name[4]; strcpy(irq_name, "0"); dma_irq = platform_get_irq_byname(pdev, irq_name); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 938b50a33439..82231a75abd6 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -42,9 +42,6 @@ #include <linux/pm_runtime.h> #include <plat/dmtimer.h> -#include <plat/omap-pm.h> - -#include <mach/hardware.h> static u32 omap_reserved_systimers; static LIST_HEAD(omap_timer_list); @@ -271,7 +268,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer) EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq); #if defined(CONFIG_ARCH_OMAP1) - +#include <mach/hardware.h> /** * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR * @inputmask: current value of idlect mask @@ -348,7 +345,8 @@ int omap_dm_timer_start(struct omap_dm_timer *timer) omap_dm_timer_enable(timer); if (!(timer->capability & OMAP_TIMER_ALWON)) { - if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != + if (timer->get_context_loss_count && + timer->get_context_loss_count(&timer->pdev->dev) != timer->ctx_loss_count) omap_timer_restore_context(timer); } @@ -377,9 +375,11 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer) __omap_dm_timer_stop(timer, timer->posted, rate); - if (!(timer->capability & OMAP_TIMER_ALWON)) - timer->ctx_loss_count = - omap_pm_get_dev_context_loss_count(&timer->pdev->dev); + if (!(timer->capability & OMAP_TIMER_ALWON)) { + if (timer->get_context_loss_count) + timer->ctx_loss_count = + timer->get_context_loss_count(&timer->pdev->dev); + } /* * Since the register values are computed and written within @@ -495,7 +495,8 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_enable(timer); if (!(timer->capability & OMAP_TIMER_ALWON)) { - if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != + if (timer->get_context_loss_count && + timer->get_context_loss_count(&timer->pdev->dev) != timer->ctx_loss_count) omap_timer_restore_context(timer); } @@ -729,6 +730,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) timer->reserved = omap_dm_timer_reserved_systimer(timer->id); timer->pdev = pdev; timer->capability = pdata->timer_capability; + timer->get_context_loss_count = pdata->get_context_loss_count; /* Skip pm_runtime_enable for OMAP1 */ if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index bcbb9d5dc293..3a77b30f53d4 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c @@ -30,9 +30,69 @@ #include <linux/io.h> #include <linux/omapfb.h> -#include <mach/hardware.h> #include <asm/mach/map.h> +#include <plat/cpu.h> + +#ifdef CONFIG_OMAP2_VRFB + +/* + * The first memory resource is the register region for VRFB, + * the rest are VRFB virtual memory areas for each VRFB context. + */ + +static const struct resource omap2_vrfb_resources[] = { + DEFINE_RES_MEM_NAMED(0x68008000u, 0x40, "vrfb-regs"), + DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"), + DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"), + DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"), + DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"), +}; + +static const struct resource omap3_vrfb_resources[] = { + DEFINE_RES_MEM_NAMED(0x6C000180u, 0xc0, "vrfb-regs"), + DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"), + DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"), + DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"), + DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"), + DEFINE_RES_MEM_NAMED(0xe0000000u, 0x4000000, "vrfb-area-4"), + DEFINE_RES_MEM_NAMED(0xe4000000u, 0x4000000, "vrfb-area-5"), + DEFINE_RES_MEM_NAMED(0xe8000000u, 0x4000000, "vrfb-area-6"), + DEFINE_RES_MEM_NAMED(0xec000000u, 0x4000000, "vrfb-area-7"), + DEFINE_RES_MEM_NAMED(0xf0000000u, 0x4000000, "vrfb-area-8"), + DEFINE_RES_MEM_NAMED(0xf4000000u, 0x4000000, "vrfb-area-9"), + DEFINE_RES_MEM_NAMED(0xf8000000u, 0x4000000, "vrfb-area-10"), + DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"), +}; + +static int __init omap_init_vrfb(void) +{ + struct platform_device *pdev; + const struct resource *res; + unsigned int num_res; + + if (cpu_is_omap24xx()) { + res = omap2_vrfb_resources; + num_res = ARRAY_SIZE(omap2_vrfb_resources); + } else if (cpu_is_omap34xx()) { + res = omap3_vrfb_resources; + num_res = ARRAY_SIZE(omap3_vrfb_resources); + } else { + return 0; + } + + pdev = platform_device_register_resndata(NULL, "omapvrfb", -1, + res, num_res, NULL, 0); + + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + else + return 0; +} + +arch_initcall(omap_init_vrfb); +#endif + #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) static bool omapfb_lcd_configured; diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index a5683a84c6ee..f9df624d108c 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -26,160 +26,18 @@ #include <linux/kernel.h> #include <linux/platform_device.h> #include <linux/i2c.h> +#include <linux/i2c-omap.h> #include <linux/slab.h> #include <linux/err.h> #include <linux/clk.h> -#include <mach/irqs.h> #include <plat/i2c.h> -#include <plat/omap_device.h> -#define OMAP_I2C_SIZE 0x3f -#define OMAP1_I2C_BASE 0xfffb3800 -#define OMAP1_INT_I2C (32 + 4) - -static const char name[] = "omap_i2c"; - -#define I2C_RESOURCE_BUILDER(base, irq) \ - { \ - .start = (base), \ - .end = (base) + OMAP_I2C_SIZE, \ - .flags = IORESOURCE_MEM, \ - }, \ - { \ - .start = (irq), \ - .flags = IORESOURCE_IRQ, \ - }, - -static struct resource i2c_resources[][2] = { - { I2C_RESOURCE_BUILDER(0, 0) }, -}; - -#define I2C_DEV_BUILDER(bus_id, res, data) \ - { \ - .id = (bus_id), \ - .name = name, \ - .num_resources = ARRAY_SIZE(res), \ - .resource = (res), \ - .dev = { \ - .platform_data = (data), \ - }, \ - } - -#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 #define OMAP_I2C_MAX_CONTROLLERS 4 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS]; -static struct platform_device omap_i2c_devices[] = { - I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]), -}; #define OMAP_I2C_CMDLINE_SETUP (BIT(31)) -static int __init omap_i2c_nr_ports(void) -{ - int ports = 0; - - if (cpu_class_is_omap1()) - ports = 1; - else if (cpu_is_omap24xx()) - ports = 2; - else if (cpu_is_omap34xx()) - ports = 3; - else if (cpu_is_omap44xx()) - ports = 4; - - return ports; -} - -static inline int omap1_i2c_add_bus(int bus_id) -{ - struct platform_device *pdev; - struct omap_i2c_bus_platform_data *pdata; - struct resource *res; - - omap1_i2c_mux_pins(bus_id); - - pdev = &omap_i2c_devices[bus_id - 1]; - res = pdev->resource; - res[0].start = OMAP1_I2C_BASE; - res[0].end = res[0].start + OMAP_I2C_SIZE; - res[1].start = OMAP1_INT_I2C; - pdata = &i2c_pdata[bus_id - 1]; - - /* all OMAP1 have IP version 1 register set */ - pdata->rev = OMAP_I2C_IP_VERSION_1; - - /* all OMAP1 I2C are implemented like this */ - pdata->flags = OMAP_I2C_FLAG_NO_FIFO | - OMAP_I2C_FLAG_SIMPLE_CLOCK | - OMAP_I2C_FLAG_16BIT_DATA_REG | - OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK; - - /* how the cpu bus is wired up differs for 7xx only */ - - if (cpu_is_omap7xx()) - pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1; - else - pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2; - - return platform_device_register(pdev); -} - - -#ifdef CONFIG_ARCH_OMAP2PLUS -static inline int omap2_i2c_add_bus(int bus_id) -{ - int l; - struct omap_hwmod *oh; - struct platform_device *pdev; - char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; - struct omap_i2c_bus_platform_data *pdata; - struct omap_i2c_dev_attr *dev_attr; - - omap2_i2c_mux_pins(bus_id); - - l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id); - WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN, - "String buffer overflow in I2C%d device setup\n", bus_id); - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - pr_err("Could not look up %s\n", oh_name); - return -EEXIST; - } - - pdata = &i2c_pdata[bus_id - 1]; - /* - * pass the hwmod class's CPU-specific knowledge of I2C IP revision in - * use, and functionality implementation flags, up to the OMAP I2C - * driver via platform data - */ - pdata->rev = oh->class->rev; - - dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; - pdata->flags = dev_attr->flags; - - pdev = omap_device_build(name, bus_id, oh, pdata, - sizeof(struct omap_i2c_bus_platform_data), - NULL, 0, 0); - WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); - - return PTR_RET(pdev); -} -#else -static inline int omap2_i2c_add_bus(int bus_id) -{ - return 0; -} -#endif - -static int __init omap_i2c_add_bus(int bus_id) -{ - if (cpu_class_is_omap1()) - return omap1_i2c_add_bus(bus_id); - else - return omap2_i2c_add_bus(bus_id); -} - /** * omap_i2c_bus_setup - Process command line options for the I2C bus speed * @str: String of options @@ -193,12 +51,11 @@ static int __init omap_i2c_add_bus(int bus_id) */ static int __init omap_i2c_bus_setup(char *str) { - int ports; int ints[3]; - ports = omap_i2c_nr_ports(); get_options(str, 3, ints); - if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports) + if (ints[0] < 2 || ints[1] < 1 || + ints[1] > OMAP_I2C_MAX_CONTROLLERS) return 0; i2c_pdata[ints[1] - 1].clkrate = ints[2]; i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP; @@ -218,7 +75,7 @@ static int __init omap_register_i2c_bus_cmdline(void) for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; - err = omap_i2c_add_bus(i + 1); + err = omap_i2c_add_bus(&i2c_pdata[i], i + 1); if (err) goto out; } @@ -243,7 +100,7 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate, { int err; - BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports()); + BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS); if (info) { err = i2c_register_board_info(bus_id, info, len); @@ -256,5 +113,5 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate, i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; - return omap_i2c_add_bus(bus_id); + return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id); } diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat-omap/dma-omap.h index 0a87b052f8f7..6f506ba9e453 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat-omap/dma-omap.h @@ -1,5 +1,5 @@ /* - * arch/arm/plat-omap/include/mach/dma.h + * OMAP DMA handling defines and function * * Copyright (C) 2003 Nokia Corporation * Author: Juha Yrjölä <juha.yrjola@nokia.com> @@ -23,187 +23,8 @@ #include <linux/platform_device.h> -/* - * TODO: These dma channel defines should go away once all - * the omap drivers hwmod adapted. - */ - -/* Move omap4 specific defines to dma-44xx.h */ -#include "dma-44xx.h" - #define INT_DMA_LCD 25 -/* DMA channels for omap1 */ -#define OMAP_DMA_NO_DEVICE 0 -#define OMAP_DMA_MCSI1_TX 1 -#define OMAP_DMA_MCSI1_RX 2 -#define OMAP_DMA_I2C_RX 3 -#define OMAP_DMA_I2C_TX 4 -#define OMAP_DMA_EXT_NDMA_REQ 5 -#define OMAP_DMA_EXT_NDMA_REQ2 6 -#define OMAP_DMA_UWIRE_TX 7 -#define OMAP_DMA_MCBSP1_TX 8 -#define OMAP_DMA_MCBSP1_RX 9 -#define OMAP_DMA_MCBSP3_TX 10 -#define OMAP_DMA_MCBSP3_RX 11 -#define OMAP_DMA_UART1_TX 12 -#define OMAP_DMA_UART1_RX 13 -#define OMAP_DMA_UART2_TX 14 -#define OMAP_DMA_UART2_RX 15 -#define OMAP_DMA_MCBSP2_TX 16 -#define OMAP_DMA_MCBSP2_RX 17 -#define OMAP_DMA_UART3_TX 18 -#define OMAP_DMA_UART3_RX 19 -#define OMAP_DMA_CAMERA_IF_RX 20 -#define OMAP_DMA_MMC_TX 21 -#define OMAP_DMA_MMC_RX 22 -#define OMAP_DMA_NAND 23 -#define OMAP_DMA_IRQ_LCD_LINE 24 -#define OMAP_DMA_MEMORY_STICK 25 -#define OMAP_DMA_USB_W2FC_RX0 26 -#define OMAP_DMA_USB_W2FC_RX1 27 -#define OMAP_DMA_USB_W2FC_RX2 28 -#define OMAP_DMA_USB_W2FC_TX0 29 -#define OMAP_DMA_USB_W2FC_TX1 30 -#define OMAP_DMA_USB_W2FC_TX2 31 - -/* These are only for 1610 */ -#define OMAP_DMA_CRYPTO_DES_IN 32 -#define OMAP_DMA_SPI_TX 33 -#define OMAP_DMA_SPI_RX 34 -#define OMAP_DMA_CRYPTO_HASH 35 -#define OMAP_DMA_CCP_ATTN 36 -#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37 -#define OMAP_DMA_CMT_APE_TX_CHAN_0 38 -#define OMAP_DMA_CMT_APE_RV_CHAN_0 39 -#define OMAP_DMA_CMT_APE_TX_CHAN_1 40 -#define OMAP_DMA_CMT_APE_RV_CHAN_1 41 -#define OMAP_DMA_CMT_APE_TX_CHAN_2 42 -#define OMAP_DMA_CMT_APE_RV_CHAN_2 43 -#define OMAP_DMA_CMT_APE_TX_CHAN_3 44 -#define OMAP_DMA_CMT_APE_RV_CHAN_3 45 -#define OMAP_DMA_CMT_APE_TX_CHAN_4 46 -#define OMAP_DMA_CMT_APE_RV_CHAN_4 47 -#define OMAP_DMA_CMT_APE_TX_CHAN_5 48 -#define OMAP_DMA_CMT_APE_RV_CHAN_5 49 -#define OMAP_DMA_CMT_APE_TX_CHAN_6 50 -#define OMAP_DMA_CMT_APE_RV_CHAN_6 51 -#define OMAP_DMA_CMT_APE_TX_CHAN_7 52 -#define OMAP_DMA_CMT_APE_RV_CHAN_7 53 -#define OMAP_DMA_MMC2_TX 54 -#define OMAP_DMA_MMC2_RX 55 -#define OMAP_DMA_CRYPTO_DES_OUT 56 - -/* DMA channels for 24xx */ -#define OMAP24XX_DMA_NO_DEVICE 0 -#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */ -#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */ -#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */ -#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */ -#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */ -#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */ -#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */ -#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */ -#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */ -#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */ -#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */ -#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */ -#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */ -#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */ -#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */ -#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */ -#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */ -#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */ -#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */ -#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */ -#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */ -#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */ -#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */ -#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */ -#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */ -#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */ -#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */ -#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */ -#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */ -#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */ -#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */ -#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */ -#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */ -#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */ -#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */ -#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */ -#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */ -#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */ -#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */ -#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */ -#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */ -#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */ -#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */ -#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */ -#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */ -#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */ -#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */ -#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */ -#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */ -#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */ -#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */ -#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */ -#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */ -#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */ -#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */ -#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */ -#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */ -#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */ -#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */ -#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */ -#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */ -#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */ -#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */ -#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */ -#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */ -#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */ -#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */ -#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */ -#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */ -#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */ -#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */ -#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */ -#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */ -#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */ -#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */ -#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */ -#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */ -#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */ -#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */ -#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */ -#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */ -#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */ -#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */ -#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */ -#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */ -#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */ -#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */ -#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */ -#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */ -#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */ -#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */ -#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */ -#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */ -#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */ -#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */ -#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */ -#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ -#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ - -#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ -#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ - -/* Only for AM35xx */ -#define AM35XX_DMA_UART4_TX 54 -#define AM35XX_DMA_UART4_RX 55 - -/*----------------------------------------------------------------------------*/ - #define OMAP1_DMA_TOUT_IRQ (1 << 0) #define OMAP_DMA_DROP_IRQ (1 << 1) #define OMAP_DMA_HALF_IRQ (1 << 2) @@ -309,10 +130,12 @@ #define SRC_PORT BIT(0x7) #define DST_PORT BIT(0x8) #define SRC_INDEX BIT(0x9) -#define DST_INDEX BIT(0xA) -#define IS_BURST_ONLY4 BIT(0xB) -#define CLEAR_CSR_ON_READ BIT(0xC) -#define IS_WORD_16 BIT(0xD) +#define DST_INDEX BIT(0xa) +#define IS_BURST_ONLY4 BIT(0xb) +#define CLEAR_CSR_ON_READ BIT(0xc) +#define IS_WORD_16 BIT(0xd) +#define ENABLE_16XX_MODE BIT(0xe) +#define HS_CHANNELS_RESERVED BIT(0xf) /* Defines for DMA Capabilities */ #define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18) @@ -449,7 +272,15 @@ struct omap_system_dma_plat_info { u32 (*dma_read)(int reg, int lch); }; -extern void __init omap_init_consistent_dma_size(void); +#ifdef CONFIG_ARCH_OMAP2PLUS +#define dma_omap2plus() 1 +#else +#define dma_omap2plus() 0 +#endif +#define dma_omap1() (!dma_omap2plus()) +#define dma_omap15xx() ((dma_omap1() && (d->dev_caps & ENABLE_1510_MODE))) +#define dma_omap16xx() ((dma_omap1() && (d->dev_caps & ENABLE_16XX_MODE))) + extern void omap_set_dma_priority(int lch, int dst_port, int priority); extern int omap_request_dma(int dev_id, const char *dev_name, void (*callback)(int lch, u16 ch_status, void *data), diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h deleted file mode 100644 index 025d85a3ee86..000000000000 --- a/arch/arm/plat-omap/include/plat/clkdev_omap.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * clkdev <-> OMAP integration - * - * Russell King <linux@arm.linux.org.uk> - * - */ - -#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H -#define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H - -#include <linux/clkdev.h> - -struct omap_clk { - u16 cpu; - struct clk_lookup lk; -}; - -#define CLK(dev, con, ck, cp) \ - { \ - .cpu = cp, \ - .lk = { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - }, \ - } - -/* Platform flags for the clkdev-OMAP integration code */ -#define CK_310 (1 << 0) -#define CK_7XX (1 << 1) /* 7xx, 850 */ -#define CK_1510 (1 << 2) -#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ -#define CK_242X (1 << 4) -#define CK_243X (1 << 5) /* 243x, 253x */ -#define CK_3430ES1 (1 << 6) /* 34xxES1 only */ -#define CK_3430ES2PLUS (1 << 7) /* 34xxES2, ES3, non-Sitara 35xx only */ -#define CK_AM35XX (1 << 9) /* Sitara AM35xx */ -#define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */ -#define CK_443X (1 << 11) -#define CK_TI816X (1 << 12) -#define CK_446X (1 << 13) -#define CK_AM33XX (1 << 14) /* AM33xx specific clocks */ -#define CK_1710 (1 << 15) /* 1710 extra for rate selection */ - - -#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) -#define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX) - - -#endif - diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h deleted file mode 100644 index e2e2d045e428..000000000000 --- a/arch/arm/plat-omap/include/plat/clock.h +++ /dev/null @@ -1,309 +0,0 @@ -/* - * OMAP clock: data structure definitions, function prototypes, shared macros - * - * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation - * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> - * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_OMAP_CLOCK_H -#define __ARCH_ARM_OMAP_CLOCK_H - -#include <linux/list.h> - -struct module; -struct clk; -struct clockdomain; - -/* Temporary, needed during the common clock framework conversion */ -#define __clk_get_name(clk) (clk->name) -#define __clk_get_parent(clk) (clk->parent) -#define __clk_get_rate(clk) (clk->rate) - -/** - * struct clkops - some clock function pointers - * @enable: fn ptr that enables the current clock in hardware - * @disable: fn ptr that enables the current clock in hardware - * @find_idlest: function returning the IDLEST register for the clock's IP blk - * @find_companion: function returning the "companion" clk reg for the clock - * @allow_idle: fn ptr that enables autoidle for the current clock in hardware - * @deny_idle: fn ptr that disables autoidle for the current clock in hardware - * - * A "companion" clk is an accompanying clock to the one being queried - * that must be enabled for the IP module connected to the clock to - * become accessible by the hardware. Neither @find_idlest nor - * @find_companion should be needed; that information is IP - * block-specific; the hwmod code has been created to handle this, but - * until hwmod data is ready and drivers have been converted to use PM - * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and - * @find_companion must, unfortunately, remain. - */ -struct clkops { - int (*enable)(struct clk *); - void (*disable)(struct clk *); - void (*find_idlest)(struct clk *, void __iomem **, - u8 *, u8 *); - void (*find_companion)(struct clk *, void __iomem **, - u8 *); - void (*allow_idle)(struct clk *); - void (*deny_idle)(struct clk *); -}; - -#ifdef CONFIG_ARCH_OMAP2PLUS - -/* struct clksel_rate.flags possibilities */ -#define RATE_IN_242X (1 << 0) -#define RATE_IN_243X (1 << 1) -#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */ -#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */ -#define RATE_IN_36XX (1 << 4) -#define RATE_IN_4430 (1 << 5) -#define RATE_IN_TI816X (1 << 6) -#define RATE_IN_4460 (1 << 7) -#define RATE_IN_AM33XX (1 << 8) -#define RATE_IN_TI814X (1 << 9) - -#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) -#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) -#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX) -#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460) - -/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */ -#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX) - - -/** - * struct clksel_rate - register bitfield values corresponding to clk divisors - * @val: register bitfield value (shifted to bit 0) - * @div: clock divisor corresponding to @val - * @flags: (see "struct clksel_rate.flags possibilities" above) - * - * @val should match the value of a read from struct clk.clksel_reg - * AND'ed with struct clk.clksel_mask, shifted right to bit 0. - * - * @div is the divisor that should be applied to the parent clock's rate - * to produce the current clock's rate. - */ -struct clksel_rate { - u32 val; - u8 div; - u16 flags; -}; - -/** - * struct clksel - available parent clocks, and a pointer to their divisors - * @parent: struct clk * to a possible parent clock - * @rates: available divisors for this parent clock - * - * A struct clksel is always associated with one or more struct clks - * and one or more struct clksel_rates. - */ -struct clksel { - struct clk *parent; - const struct clksel_rate *rates; -}; - -/** - * struct dpll_data - DPLL registers and integration data - * @mult_div1_reg: register containing the DPLL M and N bitfields - * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg - * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg - * @clk_bypass: struct clk pointer to the clock's bypass clock input - * @clk_ref: struct clk pointer to the clock's reference clock input - * @control_reg: register containing the DPLL mode bitfield - * @enable_mask: mask of the DPLL mode bitfield in @control_reg - * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() - * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate() - * @max_multiplier: maximum valid non-bypass multiplier value (actual) - * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate() - * @min_divider: minimum valid non-bypass divider value (actual) - * @max_divider: maximum valid non-bypass divider value (actual) - * @modes: possible values of @enable_mask - * @autoidle_reg: register containing the DPLL autoidle mode bitfield - * @idlest_reg: register containing the DPLL idle status bitfield - * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg - * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg - * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg - * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg - * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs - * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs - * @flags: DPLL type/features (see below) - * - * Possible values for @flags: - * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs) - * - * @freqsel_mask is only used on the OMAP34xx family and AM35xx. - * - * XXX Some DPLLs have multiple bypass inputs, so it's not technically - * correct to only have one @clk_bypass pointer. - * - * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m, - * @last_rounded_n) should be separated from the runtime-fixed fields - * and placed into a different structure, so that the runtime-fixed data - * can be placed into read-only space. - */ -struct dpll_data { - void __iomem *mult_div1_reg; - u32 mult_mask; - u32 div1_mask; - struct clk *clk_bypass; - struct clk *clk_ref; - void __iomem *control_reg; - u32 enable_mask; - unsigned long last_rounded_rate; - u16 last_rounded_m; - u16 max_multiplier; - u8 last_rounded_n; - u8 min_divider; - u16 max_divider; - u8 modes; - void __iomem *autoidle_reg; - void __iomem *idlest_reg; - u32 autoidle_mask; - u32 freqsel_mask; - u32 idlest_mask; - u32 dco_mask; - u32 sddiv_mask; - u8 auto_recal_bit; - u8 recal_en_bit; - u8 recal_st_bit; - u8 flags; -}; - -#endif - -/* - * struct clk.flags possibilities - * - * XXX document the rest of the clock flags here - * - * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL - * bits share the same register. This flag allows the - * omap4_dpllmx*() code to determine which GATE_CTRL bit field - * should be used. This is a temporary solution - a better approach - * would be to associate clock type-specific data with the clock, - * similar to the struct dpll_data approach. - */ -#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ -#define CLOCK_IDLE_CONTROL (1 << 1) -#define CLOCK_NO_IDLE_PARENT (1 << 2) -#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ -#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ -#define CLOCK_CLKOUTX2 (1 << 5) - -/** - * struct clk - OMAP struct clk - * @node: list_head connecting this clock into the full clock list - * @ops: struct clkops * for this clock - * @name: the name of the clock in the hardware (used in hwmod data and debug) - * @parent: pointer to this clock's parent struct clk - * @children: list_head connecting to the child clks' @sibling list_heads - * @sibling: list_head connecting this clk to its parent clk's @children - * @rate: current clock rate - * @enable_reg: register to write to enable the clock (see @enable_bit) - * @recalc: fn ptr that returns the clock's current rate - * @set_rate: fn ptr that can change the clock's current rate - * @round_rate: fn ptr that can round the clock's current rate - * @init: fn ptr to do clock-specific initialization - * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) - * @usecount: number of users that have requested this clock to be enabled - * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div - * @flags: see "struct clk.flags possibilities" above - * @clksel_reg: for clksel clks, register va containing src/divisor select - * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector - * @clksel: for clksel clks, pointer to struct clksel for this clock - * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock - * @clkdm_name: clockdomain name that this clock is contained in - * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime - * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) - * @src_offset: bitshift for source selection bitfield (OMAP1 only) - * - * XXX @rate_offset, @src_offset should probably be removed and OMAP1 - * clock code converted to use clksel. - * - * XXX @usecount is poorly named. It should be "enable_count" or - * something similar. "users" in the description refers to kernel - * code (core code or drivers) that have called clk_enable() and not - * yet called clk_disable(); the usecount of parent clocks is also - * incremented by the clock code when clk_enable() is called on child - * clocks and decremented by the clock code when clk_disable() is - * called on child clocks. - * - * XXX @clkdm, @usecount, @children, @sibling should be marked for - * internal use only. - * - * @children and @sibling are used to optimize parent-to-child clock - * tree traversals. (child-to-parent traversals use @parent.) - * - * XXX The notion of the clock's current rate probably needs to be - * separated from the clock's target rate. - */ -struct clk { - struct list_head node; - const struct clkops *ops; - const char *name; - struct clk *parent; - struct list_head children; - struct list_head sibling; /* node for children */ - unsigned long rate; - void __iomem *enable_reg; - unsigned long (*recalc)(struct clk *); - int (*set_rate)(struct clk *, unsigned long); - long (*round_rate)(struct clk *, unsigned long); - void (*init)(struct clk *); - u8 enable_bit; - s8 usecount; - u8 fixed_div; - u8 flags; -#ifdef CONFIG_ARCH_OMAP2PLUS - void __iomem *clksel_reg; - u32 clksel_mask; - const struct clksel *clksel; - struct dpll_data *dpll_data; - const char *clkdm_name; - struct clockdomain *clkdm; -#else - u8 rate_offset; - u8 src_offset; -#endif -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) - struct dentry *dent; /* For visible tree hierarchy */ -#endif -}; - -struct clk_functions { - int (*clk_enable)(struct clk *clk); - void (*clk_disable)(struct clk *clk); - long (*clk_round_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_parent)(struct clk *clk, struct clk *parent); - void (*clk_allow_idle)(struct clk *clk); - void (*clk_deny_idle)(struct clk *clk); - void (*clk_disable_unused)(struct clk *clk); -}; - -extern int mpurate; - -extern int clk_init(struct clk_functions *custom_clocks); -extern void clk_preinit(struct clk *clk); -extern int clk_register(struct clk *clk); -extern void clk_reparent(struct clk *child, struct clk *parent); -extern void clk_unregister(struct clk *clk); -extern void propagate_rate(struct clk *clk); -extern void recalculate_root_clocks(void); -extern unsigned long followparent_recalc(struct clk *clk); -extern void clk_enable_init_clocks(void); -unsigned long omap_fixed_divisor_recalc(struct clk *clk); -extern struct clk *omap_clk_get_by_name(const char *name); -extern int omap_clk_enable_autoidle_all(void); -extern int omap_clk_disable_autoidle_all(void); - -extern const struct clkops clkops_null; - -extern struct clk dummy_ck; - -#endif diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h deleted file mode 100644 index d1cb6f527b7e..000000000000 --- a/arch/arm/plat-omap/include/plat/common.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/common.h - * - * Header for code common to all OMAP machines. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H -#define __ARCH_ARM_MACH_OMAP_COMMON_H - -#include <plat/i2c.h> -#include <plat/omap_hwmod.h> - -extern int __init omap_init_clocksource_32k(void __iomem *vbase); - -extern void __init omap_check_revision(void); - -extern void omap_reserve(void); -extern int omap_dss_reset(struct omap_hwmod *); - -void omap_sram_init(void); - -#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h new file mode 100644 index 000000000000..da000d482ff2 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/counter-32k.h @@ -0,0 +1 @@ +int omap_init_clocksource_32k(void __iomem *vbase); diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 67da857783ce..b4516aba67ed 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -1,6 +1,4 @@ /* - * arch/arm/plat-omap/include/mach/cpu.h - * * OMAP cpu type detection * * Copyright (C) 2004, 2008 Nokia Corporation @@ -30,470 +28,12 @@ #ifndef __ASM_ARCH_OMAP_CPU_H #define __ASM_ARCH_OMAP_CPU_H -#ifndef __ASSEMBLY__ - -#include <linux/bitops.h> -#include <plat/multi.h> - -/* - * Omap device type i.e. EMU/HS/TST/GP/BAD - */ -#define OMAP2_DEVICE_TYPE_TEST 0 -#define OMAP2_DEVICE_TYPE_EMU 1 -#define OMAP2_DEVICE_TYPE_SEC 2 -#define OMAP2_DEVICE_TYPE_GP 3 -#define OMAP2_DEVICE_TYPE_BAD 4 - -int omap_type(void); - -/* - * omap_rev bits: - * CPU id bits (0730, 1510, 1710, 2422...) [31:16] - * CPU revision (See _REV_ defined in cpu.h) [15:08] - * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] - */ -unsigned int omap_rev(void); - -/* - * Get the CPU revision for OMAP devices - */ -#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff) - -/* - * Macros to group OMAP into cpu classes. - * These can be used in most places. - * cpu_is_omap7xx(): True for OMAP730, OMAP850 - * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 - * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 - * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430 - * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423 - * cpu_is_omap243x(): True for OMAP2430 - * cpu_is_omap343x(): True for OMAP3430 - * cpu_is_omap443x(): True for OMAP4430 - * cpu_is_omap446x(): True for OMAP4460 - * cpu_is_omap447x(): True for OMAP4470 - * soc_is_omap543x(): True for OMAP5430, OMAP5432 - */ -#define GET_OMAP_CLASS (omap_rev() & 0xff) - -#define IS_OMAP_CLASS(class, id) \ -static inline int is_omap ##class (void) \ -{ \ - return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ -} - -#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff) - -#define IS_AM_CLASS(class, id) \ -static inline int is_am ##class (void) \ -{ \ - return (GET_AM_CLASS == (id)) ? 1 : 0; \ -} - -#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff) - -#define IS_TI_CLASS(class, id) \ -static inline int is_ti ##class (void) \ -{ \ - return (GET_TI_CLASS == (id)) ? 1 : 0; \ -} - -#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) - -#define IS_OMAP_SUBCLASS(subclass, id) \ -static inline int is_omap ##subclass (void) \ -{ \ - return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ -} - -#define IS_TI_SUBCLASS(subclass, id) \ -static inline int is_ti ##subclass (void) \ -{ \ - return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ -} - -#define IS_AM_SUBCLASS(subclass, id) \ -static inline int is_am ##subclass (void) \ -{ \ - return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ -} - -IS_OMAP_CLASS(7xx, 0x07) -IS_OMAP_CLASS(15xx, 0x15) -IS_OMAP_CLASS(16xx, 0x16) -IS_OMAP_CLASS(24xx, 0x24) -IS_OMAP_CLASS(34xx, 0x34) -IS_OMAP_CLASS(44xx, 0x44) -IS_AM_CLASS(35xx, 0x35) -IS_OMAP_CLASS(54xx, 0x54) -IS_AM_CLASS(33xx, 0x33) - -IS_TI_CLASS(81xx, 0x81) - -IS_OMAP_SUBCLASS(242x, 0x242) -IS_OMAP_SUBCLASS(243x, 0x243) -IS_OMAP_SUBCLASS(343x, 0x343) -IS_OMAP_SUBCLASS(363x, 0x363) -IS_OMAP_SUBCLASS(443x, 0x443) -IS_OMAP_SUBCLASS(446x, 0x446) -IS_OMAP_SUBCLASS(447x, 0x447) -IS_OMAP_SUBCLASS(543x, 0x543) - -IS_TI_SUBCLASS(816x, 0x816) -IS_TI_SUBCLASS(814x, 0x814) -IS_AM_SUBCLASS(335x, 0x335) - -#define cpu_is_omap7xx() 0 -#define cpu_is_omap15xx() 0 -#define cpu_is_omap16xx() 0 -#define cpu_is_omap24xx() 0 -#define cpu_is_omap242x() 0 -#define cpu_is_omap243x() 0 -#define cpu_is_omap34xx() 0 -#define cpu_is_omap343x() 0 -#define cpu_is_ti81xx() 0 -#define cpu_is_ti816x() 0 -#define cpu_is_ti814x() 0 -#define soc_is_am35xx() 0 -#define soc_is_am33xx() 0 -#define soc_is_am335x() 0 -#define cpu_is_omap44xx() 0 -#define cpu_is_omap443x() 0 -#define cpu_is_omap446x() 0 -#define cpu_is_omap447x() 0 -#define soc_is_omap54xx() 0 -#define soc_is_omap543x() 0 - -#if defined(MULTI_OMAP1) -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() is_omap7xx() -# endif -# if defined(CONFIG_ARCH_OMAP850) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() is_omap7xx() -# endif -# if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap15xx -# define cpu_is_omap15xx() is_omap15xx() -# endif -# if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap16xx -# define cpu_is_omap16xx() is_omap16xx() -# endif -#else -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP850) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap15xx -# define cpu_is_omap15xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap16xx -# define cpu_is_omap16xx() 1 -# endif -#endif - -#if defined(MULTI_OMAP2) -# if defined(CONFIG_ARCH_OMAP2) -# undef cpu_is_omap24xx -# define cpu_is_omap24xx() is_omap24xx() -# endif -# if defined (CONFIG_SOC_OMAP2420) -# undef cpu_is_omap242x -# define cpu_is_omap242x() is_omap242x() -# endif -# if defined (CONFIG_SOC_OMAP2430) -# undef cpu_is_omap243x -# define cpu_is_omap243x() is_omap243x() -# endif -# if defined(CONFIG_ARCH_OMAP3) -# undef cpu_is_omap34xx -# undef cpu_is_omap343x -# define cpu_is_omap34xx() is_omap34xx() -# define cpu_is_omap343x() is_omap343x() -# endif -#else -# if defined(CONFIG_ARCH_OMAP2) -# undef cpu_is_omap24xx -# define cpu_is_omap24xx() 1 -# endif -# if defined(CONFIG_SOC_OMAP2420) -# undef cpu_is_omap242x -# define cpu_is_omap242x() 1 -# endif -# if defined(CONFIG_SOC_OMAP2430) -# undef cpu_is_omap243x -# define cpu_is_omap243x() 1 -# endif -# if defined(CONFIG_ARCH_OMAP3) -# undef cpu_is_omap34xx -# define cpu_is_omap34xx() 1 -# endif -# if defined(CONFIG_SOC_OMAP3430) -# undef cpu_is_omap343x -# define cpu_is_omap343x() 1 -# endif -#endif - -/* - * Macros to detect individual cpu types. - * These are only rarely needed. - * cpu_is_omap310(): True for OMAP310 - * cpu_is_omap1510(): True for OMAP1510 - * cpu_is_omap1610(): True for OMAP1610 - * cpu_is_omap1611(): True for OMAP1611 - * cpu_is_omap5912(): True for OMAP5912 - * cpu_is_omap1621(): True for OMAP1621 - * cpu_is_omap1710(): True for OMAP1710 - * cpu_is_omap2420(): True for OMAP2420 - * cpu_is_omap2422(): True for OMAP2422 - * cpu_is_omap2423(): True for OMAP2423 - * cpu_is_omap2430(): True for OMAP2430 - * cpu_is_omap3430(): True for OMAP3430 - */ -#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) - -#define IS_OMAP_TYPE(type, id) \ -static inline int is_omap ##type (void) \ -{ \ - return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ -} - -IS_OMAP_TYPE(310, 0x0310) -IS_OMAP_TYPE(1510, 0x1510) -IS_OMAP_TYPE(1610, 0x1610) -IS_OMAP_TYPE(1611, 0x1611) -IS_OMAP_TYPE(5912, 0x1611) -IS_OMAP_TYPE(1621, 0x1621) -IS_OMAP_TYPE(1710, 0x1710) -IS_OMAP_TYPE(2420, 0x2420) -IS_OMAP_TYPE(2422, 0x2422) -IS_OMAP_TYPE(2423, 0x2423) -IS_OMAP_TYPE(2430, 0x2430) -IS_OMAP_TYPE(3430, 0x3430) - -#define cpu_is_omap310() 0 -#define cpu_is_omap1510() 0 -#define cpu_is_omap1610() 0 -#define cpu_is_omap5912() 0 -#define cpu_is_omap1611() 0 -#define cpu_is_omap1621() 0 -#define cpu_is_omap1710() 0 -#define cpu_is_omap2420() 0 -#define cpu_is_omap2422() 0 -#define cpu_is_omap2423() 0 -#define cpu_is_omap2430() 0 -#define cpu_is_omap3430() 0 -#define cpu_is_omap3630() 0 -#define soc_is_omap5430() 0 - -/* - * Whether we have MULTI_OMAP1 or not, we still need to distinguish - * between 310 vs. 1510 and 1611B/5912 vs. 1710. - */ - -#if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap310 -# undef cpu_is_omap1510 -# define cpu_is_omap310() is_omap310() -# define cpu_is_omap1510() is_omap1510() -#endif - -#if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap1610 -# undef cpu_is_omap1611 -# undef cpu_is_omap5912 -# undef cpu_is_omap1621 -# undef cpu_is_omap1710 -# define cpu_is_omap1610() is_omap1610() -# define cpu_is_omap1611() is_omap1611() -# define cpu_is_omap5912() is_omap5912() -# define cpu_is_omap1621() is_omap1621() -# define cpu_is_omap1710() is_omap1710() -#endif - -#if defined(CONFIG_ARCH_OMAP2) -# undef cpu_is_omap2420 -# undef cpu_is_omap2422 -# undef cpu_is_omap2423 -# undef cpu_is_omap2430 -# define cpu_is_omap2420() is_omap2420() -# define cpu_is_omap2422() is_omap2422() -# define cpu_is_omap2423() is_omap2423() -# define cpu_is_omap2430() is_omap2430() -#endif - -#if defined(CONFIG_ARCH_OMAP3) -# undef cpu_is_omap3430 -# undef cpu_is_ti81xx -# undef cpu_is_ti816x -# undef cpu_is_ti814x -# undef soc_is_am35xx -# define cpu_is_omap3430() is_omap3430() -# undef cpu_is_omap3630 -# define cpu_is_omap3630() is_omap363x() -# define cpu_is_ti81xx() is_ti81xx() -# define cpu_is_ti816x() is_ti816x() -# define cpu_is_ti814x() is_ti814x() -# define soc_is_am35xx() is_am35xx() +#ifdef CONFIG_ARCH_OMAP1 +#include <mach/soc.h> #endif -# if defined(CONFIG_SOC_AM33XX) -# undef soc_is_am33xx -# undef soc_is_am335x -# define soc_is_am33xx() is_am33xx() -# define soc_is_am335x() is_am335x() +#ifdef CONFIG_ARCH_OMAP2PLUS +#include "../../mach-omap2/soc.h" #endif -# if defined(CONFIG_ARCH_OMAP4) -# undef cpu_is_omap44xx -# undef cpu_is_omap443x -# undef cpu_is_omap446x -# undef cpu_is_omap447x -# define cpu_is_omap44xx() is_omap44xx() -# define cpu_is_omap443x() is_omap443x() -# define cpu_is_omap446x() is_omap446x() -# define cpu_is_omap447x() is_omap447x() -# endif - -# if defined(CONFIG_SOC_OMAP5) -# undef soc_is_omap54xx -# undef soc_is_omap543x -# define soc_is_omap54xx() is_omap54xx() -# define soc_is_omap543x() is_omap543x() -#endif - -/* Macros to detect if we have OMAP1 or OMAP2 */ -#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \ - cpu_is_omap16xx()) -#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \ - cpu_is_omap44xx() || soc_is_omap54xx() || \ - soc_is_am33xx()) - -/* Various silicon revisions for omap2 */ -#define OMAP242X_CLASS 0x24200024 -#define OMAP2420_REV_ES1_0 OMAP242X_CLASS -#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8)) - -#define OMAP243X_CLASS 0x24300024 -#define OMAP2430_REV_ES1_0 OMAP243X_CLASS - -#define OMAP343X_CLASS 0x34300034 -#define OMAP3430_REV_ES1_0 OMAP343X_CLASS -#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8)) -#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8)) -#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8)) -#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8)) -#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8)) - -#define OMAP363X_CLASS 0x36300034 -#define OMAP3630_REV_ES1_0 OMAP363X_CLASS -#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8)) -#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8)) - -#define TI816X_CLASS 0x81600034 -#define TI8168_REV_ES1_0 TI816X_CLASS -#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) - -#define TI814X_CLASS 0x81400034 -#define TI8148_REV_ES1_0 TI814X_CLASS -#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8)) -#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8)) - -#define AM35XX_CLASS 0x35170034 -#define AM35XX_REV_ES1_0 AM35XX_CLASS -#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8)) - -#define AM335X_CLASS 0x33500033 -#define AM335X_REV_ES1_0 AM335X_CLASS - -#define OMAP443X_CLASS 0x44300044 -#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) -#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8)) -#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) -#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) -#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8)) - -#define OMAP446X_CLASS 0x44600044 -#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) -#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8)) - -#define OMAP447X_CLASS 0x44700044 -#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8)) - -#define OMAP54XX_CLASS 0x54000054 -#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8)) -#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8)) - -void omap2xxx_check_revision(void); -void omap3xxx_check_revision(void); -void omap4xxx_check_revision(void); -void omap5xxx_check_revision(void); -void omap3xxx_check_features(void); -void ti81xx_check_features(void); -void omap4xxx_check_features(void); - -/* - * Runtime detection of OMAP3 features - * - * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip - * family have OS-level control over the I/O chain clock. This is - * to avoid a window during which wakeups could potentially be lost - * during powerdomain transitions. If this bit is set, it - * indicates that the chip does support OS-level control of this - * feature. - */ -extern u32 omap_features; - -#define OMAP3_HAS_L2CACHE BIT(0) -#define OMAP3_HAS_IVA BIT(1) -#define OMAP3_HAS_SGX BIT(2) -#define OMAP3_HAS_NEON BIT(3) -#define OMAP3_HAS_ISP BIT(4) -#define OMAP3_HAS_192MHZ_CLK BIT(5) -#define OMAP3_HAS_IO_WAKEUP BIT(6) -#define OMAP3_HAS_SDRC BIT(7) -#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8) -#define OMAP4_HAS_MPU_1GHZ BIT(9) -#define OMAP4_HAS_MPU_1_2GHZ BIT(10) -#define OMAP4_HAS_MPU_1_5GHZ BIT(11) - - -#define OMAP3_HAS_FEATURE(feat,flag) \ -static inline unsigned int omap3_has_ ##feat(void) \ -{ \ - return omap_features & OMAP3_HAS_ ##flag; \ -} \ - -OMAP3_HAS_FEATURE(l2cache, L2CACHE) -OMAP3_HAS_FEATURE(sgx, SGX) -OMAP3_HAS_FEATURE(iva, IVA) -OMAP3_HAS_FEATURE(neon, NEON) -OMAP3_HAS_FEATURE(isp, ISP) -OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) -OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) -OMAP3_HAS_FEATURE(sdrc, SDRC) -OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL) - -/* - * Runtime detection of OMAP4 features - */ -#define OMAP4_HAS_FEATURE(feat, flag) \ -static inline unsigned int omap4_has_ ##feat(void) \ -{ \ - return omap_features & OMAP4_HAS_ ##flag; \ -} \ - -OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ) -OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ) -OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ) - -#endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm/mach-omap2/debug-devices.h b/arch/arm/plat-omap/include/plat/debug-devices.h index a4edbd2f7484..8fc4287222dd 100644 --- a/arch/arm/mach-omap2/debug-devices.h +++ b/arch/arm/plat-omap/include/plat/debug-devices.h @@ -1,9 +1,2 @@ -#ifndef _OMAP_DEBUG_DEVICES_H -#define _OMAP_DEBUG_DEVICES_H - -#include <linux/types.h> - /* for TI reference platforms sharing the same debug card */ extern int debug_card_init(u32 addr, unsigned gpio); - -#endif diff --git a/arch/arm/plat-omap/include/plat/dma-44xx.h b/arch/arm/plat-omap/include/plat/dma-44xx.h deleted file mode 100644 index 1f767cb2f38a..000000000000 --- a/arch/arm/plat-omap/include/plat/dma-44xx.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * OMAP4 SDMA channel definitions - * - * Copyright (C) 2009-2010 Texas Instruments, Inc. - * Copyright (C) 2009-2010 Nokia Corporation - * - * Santosh Shilimkar (santosh.shilimkar@ti.com) - * Benoit Cousson (b-cousson@ti.com) - * Paul Walmsley (paul@pwsan.com) - * - * This file is automatically generated from the OMAP hardware databases. - * We respectfully ask that any modifications to this file be coordinated - * with the public linux-omap@vger.kernel.org mailing list and the - * authors above to ensure that the autogeneration scripts are kept - * up-to-date with the file contents. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H -#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H - -#define OMAP44XX_DMA_SYS_REQ0 2 -#define OMAP44XX_DMA_SYS_REQ1 3 -#define OMAP44XX_DMA_GPMC 4 -#define OMAP44XX_DMA_DSS_DISPC_REQ 6 -#define OMAP44XX_DMA_SYS_REQ2 7 -#define OMAP44XX_DMA_MCASP1_AXEVT 8 -#define OMAP44XX_DMA_ISS_REQ1 9 -#define OMAP44XX_DMA_ISS_REQ2 10 -#define OMAP44XX_DMA_MCASP1_AREVT 11 -#define OMAP44XX_DMA_ISS_REQ3 12 -#define OMAP44XX_DMA_ISS_REQ4 13 -#define OMAP44XX_DMA_DSS_RFBI_REQ 14 -#define OMAP44XX_DMA_SPI3_TX0 15 -#define OMAP44XX_DMA_SPI3_RX0 16 -#define OMAP44XX_DMA_MCBSP2_TX 17 -#define OMAP44XX_DMA_MCBSP2_RX 18 -#define OMAP44XX_DMA_MCBSP3_TX 19 -#define OMAP44XX_DMA_MCBSP3_RX 20 -#define OMAP44XX_DMA_C2C_SSCM_GPO0 21 -#define OMAP44XX_DMA_C2C_SSCM_GPO1 22 -#define OMAP44XX_DMA_SPI3_TX1 23 -#define OMAP44XX_DMA_SPI3_RX1 24 -#define OMAP44XX_DMA_I2C3_TX 25 -#define OMAP44XX_DMA_I2C3_RX 26 -#define OMAP44XX_DMA_I2C1_TX 27 -#define OMAP44XX_DMA_I2C1_RX 28 -#define OMAP44XX_DMA_I2C2_TX 29 -#define OMAP44XX_DMA_I2C2_RX 30 -#define OMAP44XX_DMA_MCBSP4_TX 31 -#define OMAP44XX_DMA_MCBSP4_RX 32 -#define OMAP44XX_DMA_MCBSP1_TX 33 -#define OMAP44XX_DMA_MCBSP1_RX 34 -#define OMAP44XX_DMA_SPI1_TX0 35 -#define OMAP44XX_DMA_SPI1_RX0 36 -#define OMAP44XX_DMA_SPI1_TX1 37 -#define OMAP44XX_DMA_SPI1_RX1 38 -#define OMAP44XX_DMA_SPI1_TX2 39 -#define OMAP44XX_DMA_SPI1_RX2 40 -#define OMAP44XX_DMA_SPI1_TX3 41 -#define OMAP44XX_DMA_SPI1_RX3 42 -#define OMAP44XX_DMA_SPI2_TX0 43 -#define OMAP44XX_DMA_SPI2_RX0 44 -#define OMAP44XX_DMA_SPI2_TX1 45 -#define OMAP44XX_DMA_SPI2_RX1 46 -#define OMAP44XX_DMA_MMC2_TX 47 -#define OMAP44XX_DMA_MMC2_RX 48 -#define OMAP44XX_DMA_UART1_TX 49 -#define OMAP44XX_DMA_UART1_RX 50 -#define OMAP44XX_DMA_UART2_TX 51 -#define OMAP44XX_DMA_UART2_RX 52 -#define OMAP44XX_DMA_UART3_TX 53 -#define OMAP44XX_DMA_UART3_RX 54 -#define OMAP44XX_DMA_UART4_TX 55 -#define OMAP44XX_DMA_UART4_RX 56 -#define OMAP44XX_DMA_MMC4_TX 57 -#define OMAP44XX_DMA_MMC4_RX 58 -#define OMAP44XX_DMA_MMC5_TX 59 -#define OMAP44XX_DMA_MMC5_RX 60 -#define OMAP44XX_DMA_MMC1_TX 61 -#define OMAP44XX_DMA_MMC1_RX 62 -#define OMAP44XX_DMA_SYS_REQ3 64 -#define OMAP44XX_DMA_MCPDM_UP 65 -#define OMAP44XX_DMA_MCPDM_DL 66 -#define OMAP44XX_DMA_DMIC_REQ 67 -#define OMAP44XX_DMA_C2C_SSCM_GPO2 68 -#define OMAP44XX_DMA_C2C_SSCM_GPO3 69 -#define OMAP44XX_DMA_SPI4_TX0 70 -#define OMAP44XX_DMA_SPI4_RX0 71 -#define OMAP44XX_DMA_DSS_DSI1_REQ0 72 -#define OMAP44XX_DMA_DSS_DSI1_REQ1 73 -#define OMAP44XX_DMA_DSS_DSI1_REQ2 74 -#define OMAP44XX_DMA_DSS_DSI1_REQ3 75 -#define OMAP44XX_DMA_DSS_HDMI_REQ 76 -#define OMAP44XX_DMA_MMC3_TX 77 -#define OMAP44XX_DMA_MMC3_RX 78 -#define OMAP44XX_DMA_USIM_TX 79 -#define OMAP44XX_DMA_USIM_RX 80 -#define OMAP44XX_DMA_DSS_DSI2_REQ0 81 -#define OMAP44XX_DMA_DSS_DSI2_REQ1 82 -#define OMAP44XX_DMA_DSS_DSI2_REQ2 83 -#define OMAP44XX_DMA_DSS_DSI2_REQ3 84 -#define OMAP44XX_DMA_SLIMBUS1_TX0 85 -#define OMAP44XX_DMA_SLIMBUS1_TX1 86 -#define OMAP44XX_DMA_SLIMBUS1_TX2 87 -#define OMAP44XX_DMA_SLIMBUS1_TX3 88 -#define OMAP44XX_DMA_SLIMBUS1_RX0 89 -#define OMAP44XX_DMA_SLIMBUS1_RX1 90 -#define OMAP44XX_DMA_SLIMBUS1_RX2 91 -#define OMAP44XX_DMA_SLIMBUS1_RX3 92 -#define OMAP44XX_DMA_SLIMBUS2_TX0 93 -#define OMAP44XX_DMA_SLIMBUS2_TX1 94 -#define OMAP44XX_DMA_SLIMBUS2_TX2 95 -#define OMAP44XX_DMA_SLIMBUS2_TX3 96 -#define OMAP44XX_DMA_SLIMBUS2_RX0 97 -#define OMAP44XX_DMA_SLIMBUS2_RX1 98 -#define OMAP44XX_DMA_SLIMBUS2_RX2 99 -#define OMAP44XX_DMA_SLIMBUS2_RX3 100 -#define OMAP44XX_DMA_ABE_REQ_0 101 -#define OMAP44XX_DMA_ABE_REQ_1 102 -#define OMAP44XX_DMA_ABE_REQ_2 103 -#define OMAP44XX_DMA_ABE_REQ_3 104 -#define OMAP44XX_DMA_ABE_REQ_4 105 -#define OMAP44XX_DMA_ABE_REQ_5 106 -#define OMAP44XX_DMA_ABE_REQ_6 107 -#define OMAP44XX_DMA_ABE_REQ_7 108 -#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ 109 -#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ 110 -#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ 111 -#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ 112 -#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ 113 -#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ 114 -#define OMAP44XX_DMA_DES_P_CTX_IN_REQ 115 -#define OMAP44XX_DMA_DES_P_DATA_IN_REQ 116 -#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ 117 -#define OMAP44XX_DMA_SHA2_CTXIN_P 118 -#define OMAP44XX_DMA_SHA2_DIN_P 119 -#define OMAP44XX_DMA_SHA2_CTXOUT_P 120 -#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ 121 -#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ 122 -#define OMAP44XX_DMA_I2C4_TX 124 -#define OMAP44XX_DMA_I2C4_RX 125 - -#endif diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 85868e98c11c..3f5b9cfd9c0b 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -94,6 +94,7 @@ struct dmtimer_platform_data { /* set_timer_src - Only used for OMAP1 devices */ int (*set_timer_src)(struct platform_device *pdev, int source); u32 timer_capability; + int (*get_context_loss_count)(struct device *); }; int omap_dm_timer_reserve_systimer(int id); @@ -263,6 +264,7 @@ struct omap_dm_timer { unsigned reserved:1; unsigned posted:1; struct timer_regs context; + int (*get_context_loss_count)(struct device *); int ctx_loss_count; int revision; u32 capability; diff --git a/arch/arm/plat-omap/include/plat/fpga.h b/arch/arm/plat-omap/include/plat/fpga.h deleted file mode 100644 index bd3c6324ae1f..000000000000 --- a/arch/arm/plat-omap/include/plat/fpga.h +++ /dev/null @@ -1,193 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/fpga.h - * - * Interrupt handler for OMAP-1510 FPGA - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: Greg Lonnon <glonnon@ridgerun.com> - * - * Copyright (C) 2002 MontaVista Software, Inc. - * - * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 - * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_OMAP_FPGA_H -#define __ASM_ARCH_OMAP_FPGA_H - -extern void omap1510_fpga_init_irq(void); - -#define fpga_read(reg) __raw_readb(reg) -#define fpga_write(val, reg) __raw_writeb(val, reg) - -/* - * --------------------------------------------------------------------------- - * H2/P2 Debug board FPGA - * --------------------------------------------------------------------------- - */ -/* maps in the FPGA registers and the ETHR registers */ -#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ -#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ -#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ - -#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) -#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ -#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */ -#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */ -#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */ -#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */ -#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */ -#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */ - -/* NOTE: most boards don't have a static mapping for the FPGA ... */ -struct h2p2_dbg_fpga { - /* offset 0x00 */ - u16 smc91x[8]; - /* offset 0x10 */ - u16 fpga_rev; - u16 board_rev; - u16 gpio_outputs; - u16 leds; - /* offset 0x18 */ - u16 misc_inputs; - u16 lan_status; - u16 lan_reset; - u16 reserved0; - /* offset 0x20 */ - u16 ps2_data; - u16 ps2_ctrl; - /* plus also 4 rs232 ports ... */ -}; - -/* LEDs definition on debug board (16 LEDs, all physically green) */ -#define H2P2_DBG_FPGA_LED_GREEN (1 << 15) -#define H2P2_DBG_FPGA_LED_AMBER (1 << 14) -#define H2P2_DBG_FPGA_LED_RED (1 << 13) -#define H2P2_DBG_FPGA_LED_BLUE (1 << 12) -/* cpu0 load-meter LEDs */ -#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ... -#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 -#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) - -#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0) -#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1) - -/* - * --------------------------------------------------------------------------- - * OMAP-1510 FPGA - * --------------------------------------------------------------------------- - */ -#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */ -#define OMAP1510_FPGA_SIZE SZ_4K -#define OMAP1510_FPGA_START 0x08000000 /* PA */ - -/* Revision */ -#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0) -#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1) - -#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2) -#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3) -#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4) -#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5) - -/* Interrupt status */ -#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6) -#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7) - -/* Interrupt mask */ -#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8) -#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9) - -/* Reset registers */ -#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa) -#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb) - -#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc) -#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe) -#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf) -#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14) -#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15) -#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16) -#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18) -#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100) -#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101) -#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102) - -#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204) - -#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205) -#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206) -#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207) -#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208) -#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209) -#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a) -#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b) -#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c) -#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d) -#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e) -#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210) - -#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300) - -/* - * Power up Giga UART driver, turn on HID clock. - * Turn off BT power, since we're not using it and it - * draws power. - */ -#define OMAP1510_FPGA_RESET_VALUE 0x42 - -#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7) -#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6) -#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5) -#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4) -#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3) -#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2) -#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1) -#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0) - -/* - * Innovator/OMAP1510 FPGA HID register bit definitions - */ -#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */ -#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */ -#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */ -#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */ -#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */ -#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */ -#define OMAP1510_FPGA_HID_rsrvd (1<<6) -#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */ - -/* The FPGA IRQ is cascaded through GPIO_13 */ -#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13) - -/* IRQ Numbers for interrupts muxed through the FPGA */ -#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0) -#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1) -#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2) -#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3) -#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4) -#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5) -#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6) -#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7) -#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8) -#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9) -#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10) -#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11) -#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12) -#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13) -#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14) -#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15) -#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16) -#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17) -#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18) -#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19) -#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20) -#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21) -#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22) -#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) - -#endif diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index 7c22b9e10dc3..7a9028cb5a75 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -18,11 +18,15 @@ * 02110-1301 USA * */ -#ifndef __ASM__ARCH_OMAP_I2C_H -#define __ASM__ARCH_OMAP_I2C_H -#include <linux/i2c.h> -#include <linux/i2c-omap.h> +#ifndef __PLAT_OMAP_I2C_H +#define __PLAT_OMAP_I2C_H + +struct i2c_board_info; +struct omap_i2c_bus_platform_data; + +int omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata, + int bus_id); #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) extern int omap_register_i2c_bus(int bus_id, u32 clkrate, @@ -37,23 +41,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, } #endif -/** - * i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod - * @fifo_depth: total controller FIFO size (in bytes) - * @flags: differences in hardware support capability - * - * @fifo_depth represents what exists on the hardware, not what is - * actually configured at runtime by the device driver. - */ -struct omap_i2c_dev_attr { - u8 fifo_depth; - u32 flags; -}; - -void __init omap1_i2c_mux_pins(int bus_id); -void __init omap2_i2c_mux_pins(int bus_id); - struct omap_hwmod; int omap_i2c_reset(struct omap_hwmod *oh); -#endif /* __ASM__ARCH_OMAP_I2C_H */ +#endif /* __PLAT_OMAP_I2C_H */ diff --git a/arch/arm/plat-omap/include/plat/led.h b/arch/arm/plat-omap/include/plat/led.h deleted file mode 100644 index 25e451e7e2fd..000000000000 --- a/arch/arm/plat-omap/include/plat/led.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/led.h - * - * Copyright (C) 2006 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef ASMARM_ARCH_LED_H -#define ASMARM_ARCH_LED_H - -struct omap_led_config { - struct led_classdev cdev; - s16 gpio; -}; - -struct omap_led_platform_data { - s16 nr_leds; - struct omap_led_config *leds; -}; - -#endif diff --git a/arch/arm/plat-omap/include/plat/menelaus.h b/arch/arm/plat-omap/include/plat/menelaus.h deleted file mode 100644 index 4a970ec62dd1..000000000000 --- a/arch/arm/plat-omap/include/plat/menelaus.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/menelaus.h - * - * Functions to access Menelaus power management chip - */ - -#ifndef __ASM_ARCH_MENELAUS_H -#define __ASM_ARCH_MENELAUS_H - -struct device; - -struct menelaus_platform_data { - int (* late_init)(struct device *dev); -}; - -extern int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), - void *data); -extern void menelaus_unregister_mmc_callback(void); -extern int menelaus_set_mmc_opendrain(int slot, int enable); -extern int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_on); - -extern int menelaus_set_vmem(unsigned int mV); -extern int menelaus_set_vio(unsigned int mV); -extern int menelaus_set_vmmc(unsigned int mV); -extern int menelaus_set_vaux(unsigned int mV); -extern int menelaus_set_vdcdc(int dcdc, unsigned int mV); -extern int menelaus_set_slot_sel(int enable); -extern int menelaus_get_slot_pin_states(void); -extern int menelaus_set_vcore_sw(unsigned int mV); -extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV); - -#define EN_VPLL_SLEEP (1 << 7) -#define EN_VMMC_SLEEP (1 << 6) -#define EN_VAUX_SLEEP (1 << 5) -#define EN_VIO_SLEEP (1 << 4) -#define EN_VMEM_SLEEP (1 << 3) -#define EN_DC3_SLEEP (1 << 2) -#define EN_DC2_SLEEP (1 << 1) -#define EN_VC_SLEEP (1 << 0) - -extern int menelaus_set_regulator_sleep(int enable, u32 val); - -#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_MENELAUS) -#define omap_has_menelaus() 1 -#else -#define omap_has_menelaus() 0 -#endif - -#endif diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h deleted file mode 100644 index 8b4e4f2da2f5..000000000000 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ /dev/null @@ -1,188 +0,0 @@ -/* - * MMC definitions for OMAP2 - * - * Copyright (C) 2006 Nokia Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __OMAP2_MMC_H -#define __OMAP2_MMC_H - -#include <linux/types.h> -#include <linux/device.h> -#include <linux/mmc/host.h> - -#include <plat/omap_hwmod.h> - -#define OMAP15XX_NR_MMC 1 -#define OMAP16XX_NR_MMC 2 -#define OMAP1_MMC_SIZE 0x080 -#define OMAP1_MMC1_BASE 0xfffb7800 -#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */ - -#define OMAP24XX_NR_MMC 2 -#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE -#define OMAP2_MMC1_BASE 0x4809c000 - -#define OMAP4_MMC_REG_OFFSET 0x100 - -#define OMAP_MMC_MAX_SLOTS 2 - -/* - * struct omap_mmc_dev_attr.flags possibilities - * - * OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can - * operate with either 1.8Vdc or 3.0Vdc card voltages; this flag - * should be set if this is the case. See for example Section 22.5.3 - * "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia - * Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R). - * - * OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers - * don't work correctly on some MMC controller instances on some - * OMAP3 SoCs; this flag should be set if this is the case. See - * for example Advisory 2.1.1.128 "MMC: Multiple Block Read - * Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_ - * Revision F (October 2010) (SPRZ278F). - */ -#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0) -#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1) - -struct omap_mmc_dev_attr { - u8 flags; -}; - -struct omap_mmc_platform_data { - /* back-link to device */ - struct device *dev; - - /* number of slots per controller */ - unsigned nr_slots:2; - - /* set if your board has components or wiring that limits the - * maximum frequency on the MMC bus */ - unsigned int max_freq; - - /* switch the bus to a new slot */ - int (*switch_slot)(struct device *dev, int slot); - /* initialize board-specific MMC functionality, can be NULL if - * not supported */ - int (*init)(struct device *dev); - void (*cleanup)(struct device *dev); - void (*shutdown)(struct device *dev); - - /* To handle board related suspend/resume functionality for MMC */ - int (*suspend)(struct device *dev, int slot); - int (*resume)(struct device *dev, int slot); - - /* Return context loss count due to PM states changing */ - int (*get_context_loss_count)(struct device *dev); - - /* Integrating attributes from the omap_hwmod layer */ - u8 controller_flags; - - /* Register offset deviation */ - u16 reg_offset; - - struct omap_mmc_slot_data { - - /* - * 4/8 wires and any additional host capabilities - * need to OR'd all capabilities (ref. linux/mmc/host.h) - */ - u8 wires; /* Used for the MMC driver on omap1 and 2420 */ - u32 caps; /* Used for the MMC driver on 2430 and later */ - u32 pm_caps; /* PM capabilities of the mmc */ - - /* - * nomux means "standard" muxing is wrong on this board, and - * that board-specific code handled it before common init logic. - */ - unsigned nomux:1; - - /* switch pin can be for card detect (default) or card cover */ - unsigned cover:1; - - /* use the internal clock */ - unsigned internal_clock:1; - - /* nonremovable e.g. eMMC */ - unsigned nonremovable:1; - - /* Try to sleep or power off when possible */ - unsigned power_saving:1; - - /* If using power_saving and the MMC power is not to go off */ - unsigned no_off:1; - - /* eMMC does not handle power off when not in sleep state */ - unsigned no_regulator_off_init:1; - - /* Regulator off remapped to sleep */ - unsigned vcc_aux_disable_is_sleep:1; - - /* we can put the features above into this variable */ -#define HSMMC_HAS_PBIAS (1 << 0) -#define HSMMC_HAS_UPDATED_RESET (1 << 1) - unsigned features; - - int switch_pin; /* gpio (card detect) */ - int gpio_wp; /* gpio (write protect) */ - - int (*set_bus_mode)(struct device *dev, int slot, int bus_mode); - int (*set_power)(struct device *dev, int slot, - int power_on, int vdd); - int (*get_ro)(struct device *dev, int slot); - void (*remux)(struct device *dev, int slot, int power_on); - /* Call back before enabling / disabling regulators */ - void (*before_set_reg)(struct device *dev, int slot, - int power_on, int vdd); - /* Call back after enabling / disabling regulators */ - void (*after_set_reg)(struct device *dev, int slot, - int power_on, int vdd); - /* if we have special card, init it using this callback */ - void (*init_card)(struct mmc_card *card); - - /* return MMC cover switch state, can be NULL if not supported. - * - * possible return values: - * 0 - closed - * 1 - open - */ - int (*get_cover_state)(struct device *dev, int slot); - - const char *name; - u32 ocr_mask; - - /* Card detection IRQs */ - int card_detect_irq; - int (*card_detect)(struct device *dev, int slot); - - unsigned int ban_openended:1; - - } slots[OMAP_MMC_MAX_SLOTS]; -}; - -/* called from board-specific card detection service routine */ -extern void omap_mmc_notify_cover_event(struct device *dev, int slot, - int is_closed); - -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) -void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers); -void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data); -#else -static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers) -{ -} -static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) -{ -} -#endif - -extern int omap_msdi_reset(struct omap_hwmod *oh); - -#endif diff --git a/arch/arm/plat-omap/include/plat/multi.h b/arch/arm/plat-omap/include/plat/multi.h deleted file mode 100644 index 324d31b14852..000000000000 --- a/arch/arm/plat-omap/include/plat/multi.h +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Support for compiling in multiple OMAP processors - * - * Copyright (C) 2010 Nokia Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __PLAT_OMAP_MULTI_H -#define __PLAT_OMAP_MULTI_H - -/* - * Test if multicore OMAP support is needed - */ -#undef MULTI_OMAP1 -#undef MULTI_OMAP2 -#undef OMAP_NAME - -#ifdef CONFIG_ARCH_OMAP730 -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap730 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP850 -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap850 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP15XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap1510 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP16XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap16xx -# endif -#endif -#ifdef CONFIG_ARCH_OMAP2PLUS -# if (defined(OMAP_NAME) || defined(MULTI_OMAP1)) -# error "OMAP1 and OMAP2PLUS can't be selected at the same time" -# endif -#endif -#ifdef CONFIG_SOC_OMAP2420 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap2420 -# endif -#endif -#ifdef CONFIG_SOC_OMAP2430 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap2430 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP3 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap3 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP4 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap4 -# endif -#endif - -#ifdef CONFIG_SOC_OMAP5 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap5 -# endif -#endif - -#ifdef CONFIG_SOC_AM33XX -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME am33xx -# endif -#endif - -#endif /* __PLAT_OMAP_MULTI_H */ diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h deleted file mode 100644 index 0e4acd2d2deb..000000000000 --- a/arch/arm/plat-omap/include/plat/omap-secure.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __OMAP_SECURE_H__ -#define __OMAP_SECURE_H__ - -#include <linux/types.h> - -extern int omap_secure_ram_reserve_memblock(void); - -#ifdef CONFIG_OMAP4_ERRATA_I688 -extern int omap_barrier_reserve_memblock(void); -#else -static inline void omap_barrier_reserve_memblock(void) -{ } -#endif -#endif /* __OMAP_SECURE_H__ */ diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index f4a4cd014795..1957a8516e93 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -40,10 +40,10 @@ #define OMAP_UART_WER_MOD_WKUP 0X7F /* Enable XON/XOFF flow control on output */ -#define OMAP_UART_SW_TX 0x8 +#define OMAP_UART_SW_TX 0x04 /* Enable XON/XOFF flow control on input */ -#define OMAP_UART_SW_RX 0x2 +#define OMAP_UART_SW_RX 0x04 #define OMAP_UART_SYSC_RESET 0X07 #define OMAP_UART_TCR_TRIG 0X0F diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h deleted file mode 100644 index 36d6a7666216..000000000000 --- a/arch/arm/plat-omap/include/plat/sdrc.h +++ /dev/null @@ -1,164 +0,0 @@ -#ifndef ____ASM_ARCH_SDRC_H -#define ____ASM_ARCH_SDRC_H - -/* - * OMAP2/3 SDRC/SMS register definitions - * - * Copyright (C) 2007-2008 Texas Instruments, Inc. - * Copyright (C) 2007-2008 Nokia Corporation - * - * Tony Lindgren - * Paul Walmsley - * Richard Woodruff - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - -/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ - -#define SDRC_SYSCONFIG 0x010 -#define SDRC_CS_CFG 0x040 -#define SDRC_SHARING 0x044 -#define SDRC_ERR_TYPE 0x04C -#define SDRC_DLLA_CTRL 0x060 -#define SDRC_DLLA_STATUS 0x064 -#define SDRC_DLLB_CTRL 0x068 -#define SDRC_DLLB_STATUS 0x06C -#define SDRC_POWER 0x070 -#define SDRC_MCFG_0 0x080 -#define SDRC_MR_0 0x084 -#define SDRC_EMR2_0 0x08c -#define SDRC_ACTIM_CTRL_A_0 0x09c -#define SDRC_ACTIM_CTRL_B_0 0x0a0 -#define SDRC_RFR_CTRL_0 0x0a4 -#define SDRC_MANUAL_0 0x0a8 -#define SDRC_MCFG_1 0x0B0 -#define SDRC_MR_1 0x0B4 -#define SDRC_EMR2_1 0x0BC -#define SDRC_ACTIM_CTRL_A_1 0x0C4 -#define SDRC_ACTIM_CTRL_B_1 0x0C8 -#define SDRC_RFR_CTRL_1 0x0D4 -#define SDRC_MANUAL_1 0x0D8 - -#define SDRC_POWER_AUTOCOUNT_SHIFT 8 -#define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT) -#define SDRC_POWER_CLKCTRL_SHIFT 4 -#define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT) -#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT) - -/* - * These values represent the number of memory clock cycles between - * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192 - * rows per device, and include a subtraction of a 50 cycle window in the - * event that the autorefresh command is delayed due to other SDRC activity. - * The '| 1' sets the ARE field to send one autorefresh when the autorefresh - * counter reaches 0. - * - * These represent optimal values for common parts, it won't work for all. - * As long as you scale down, most parameters are still work, they just - * become sub-optimal. The RFR value goes in the opposite direction. If you - * don't adjust it down as your clock period increases the refresh interval - * will not be met. Setting all parameters for complete worst case may work, - * but may cut memory performance by 2x. Due to errata the DLLs need to be - * unlocked and their value needs run time calibration. A dynamic call is - * need for that as no single right value exists acorss production samples. - * - * Only the FULL speed values are given. Current code is such that rate - * changes must be made at DPLLoutx2. The actual value adjustment for low - * frequency operation will be handled by omap_set_performance() - * - * By having the boot loader boot up in the fastest L4 speed available likely - * will result in something which you can switch between. - */ -#define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1) -#define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1) -#define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1) -#define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1) /* Need to calc */ -#define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */ - - -/* - * SMS register access - */ - -#define OMAP242X_SMS_REGADDR(reg) \ - (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg) -#define OMAP243X_SMS_REGADDR(reg) \ - (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg) -#define OMAP343X_SMS_REGADDR(reg) \ - (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg) - -/* SMS register offsets - read/write with sms_{read,write}_reg() */ - -#define SMS_SYSCONFIG 0x010 -#define SMS_ROT_CONTROL(context) (0x180 + 0x10 * context) -#define SMS_ROT_SIZE(context) (0x184 + 0x10 * context) -#define SMS_ROT_PHYSICAL_BA(context) (0x188 + 0x10 * context) -/* REVISIT: fill in other SMS registers here */ - - -#ifndef __ASSEMBLER__ - -/** - * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate - * @rate: SDRC clock rate (in Hz) - * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate - * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate - * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate - * @mr: Value to program to SDRC_MR for this rate - * - * This structure holds a pre-computed set of register values for the - * SDRC for a given SDRC clock rate and SDRAM chip. These are - * intended to be pre-computed and specified in an array in the board-*.c - * files. The structure is keyed off the 'rate' field. - */ -struct omap_sdrc_params { - unsigned long rate; - u32 actim_ctrla; - u32 actim_ctrlb; - u32 rfr_ctrl; - u32 mr; -}; - -#ifdef CONFIG_SOC_HAS_OMAP2_SDRC -void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, - struct omap_sdrc_params *sdrc_cs1); -#else -static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, - struct omap_sdrc_params *sdrc_cs1) {}; -#endif - -int omap2_sdrc_get_params(unsigned long r, - struct omap_sdrc_params **sdrc_cs0, - struct omap_sdrc_params **sdrc_cs1); -void omap2_sms_save_context(void); -void omap2_sms_restore_context(void); - -void omap2_sms_write_rot_control(u32 val, unsigned ctx); -void omap2_sms_write_rot_size(u32 val, unsigned ctx); -void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx); - -#ifdef CONFIG_ARCH_OMAP2 - -struct memory_timings { - u32 m_type; /* ddr = 1, sdr = 0 */ - u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */ - u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */ - u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */ - u32 base_cs; /* base chip select to use for calculations */ -}; - -extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode); -struct omap_sdrc_params *rx51_get_sdram_timings(void); - -u32 omap2xxx_sdrc_dll_is_unlocked(void); -u32 omap2xxx_sdrc_reprogram(u32 level, u32 force); - -#endif /* CONFIG_ARCH_OMAP2 */ - -#endif /* __ASSEMBLER__ */ - -#endif diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h index 227ae2657554..ba4525059a99 100644 --- a/arch/arm/plat-omap/include/plat/sram.h +++ b/arch/arm/plat-omap/include/plat/sram.h @@ -1,18 +1,8 @@ -/* - * arch/arm/plat-omap/include/mach/sram.h - * - * Interface for functions that need to be run in internal SRAM - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ +int omap_sram_init(void); -#ifndef __ARCH_ARM_OMAP_SRAM_H -#define __ARCH_ARM_OMAP_SRAM_H - -#ifndef __ASSEMBLY__ -#include <asm/fncpy.h> +void omap_map_sram(unsigned long start, unsigned long size, + unsigned long skip, int cached); +void omap_sram_reset(void); extern void *omap_sram_push_address(unsigned long size); @@ -24,82 +14,3 @@ extern void *omap_sram_push_address(unsigned long size); _res = fncpy(_sram_address, &(funcp), size); \ _res; \ }) - -extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); - -extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock); -extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, - u32 mem_type); -extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); - -extern u32 omap3_configure_core_dpll( - u32 m2, u32 unlock_dll, u32 f, u32 inc, - u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, - u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, - u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, - u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); -extern void omap3_sram_restore_context(void); - -/* Do not use these */ -extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); -extern unsigned long omap1_sram_reprogram_clock_sz; - -extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); -extern unsigned long omap24xx_sram_reprogram_clock_sz; - -extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock); -extern unsigned long omap242x_sram_ddr_init_sz; - -extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, - int bypass); -extern unsigned long omap242x_sram_set_prcm_sz; - -extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, - u32 mem_type); -extern unsigned long omap242x_sram_reprogram_sdrc_sz; - - -extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock); -extern unsigned long omap243x_sram_ddr_init_sz; - -extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, - int bypass); -extern unsigned long omap243x_sram_set_prcm_sz; - -extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, - u32 mem_type); -extern unsigned long omap243x_sram_reprogram_sdrc_sz; - -extern u32 omap3_sram_configure_core_dpll( - u32 m2, u32 unlock_dll, u32 f, u32 inc, - u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, - u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, - u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, - u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); -extern unsigned long omap3_sram_configure_core_dpll_sz; - -#ifdef CONFIG_PM -extern void omap_push_sram_idle(void); -#else -static inline void omap_push_sram_idle(void) {} -#endif /* CONFIG_PM */ - -#endif /* __ASSEMBLY__ */ - -/* - * OMAP2+: define the SRAM PA addresses. - * Used by the SRAM management code and the idle sleep code. - */ -#define OMAP2_SRAM_PA 0x40200000 -#define OMAP3_SRAM_PA 0x40200000 -#ifdef CONFIG_OMAP4_ERRATA_I688 -#define OMAP4_SRAM_PA 0x40304000 -#define OMAP4_SRAM_VA 0xfe404000 -#else -#define OMAP4_SRAM_PA 0x40300000 -#endif -#define AM33XX_SRAM_PA 0x40300000 -#endif diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h deleted file mode 100644 index 7f7b112acccb..000000000000 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ /dev/null @@ -1,204 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/uncompress.h - * - * Serial port stubs for kernel decompress status messages - * - * Initially based on: - * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon <glonnon@ridgerun.com> - * - * Rewritten by: - * Author: <source@mvista.com> - * 2004 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include <linux/types.h> -#include <linux/serial_reg.h> - -#include <asm/memory.h> -#include <asm/mach-types.h> - -#include <plat/serial.h> - -#define MDR1_MODE_MASK 0x07 - -volatile u8 *uart_base; -int uart_shift; - -/* - * Store the DEBUG_LL uart number into memory. - * See also debug-macro.S, and serial.c for related code. - */ -static void set_omap_uart_info(unsigned char port) -{ - /* - * Get address of some.bss variable and round it down - * a la CONFIG_AUTO_ZRELADDR. - */ - u32 ram_start = (u32)&uart_shift & 0xf8000000; - u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); - *uart_info = port; -} - -static void putc(int c) -{ - if (!uart_base) - return; - - /* Check for UART 16x mode */ - if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) - return; - - while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) - barrier(); - uart_base[UART_TX << uart_shift] = c; -} - -static inline void flush(void) -{ -} - -/* - * Macros to configure UART1 and debug UART - */ -#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \ - if (machine_is_##mach()) { \ - uart_base = (volatile u8 *)(dbg_uart); \ - uart_shift = (dbg_shft); \ - port = (dbg_id); \ - set_omap_uart_info(port); \ - break; \ - } - -#define DEBUG_LL_OMAP7XX(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \ - OMAP1UART##p) - -#define DEBUG_LL_OMAP1(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, \ - OMAP1UART##p) - -#define DEBUG_LL_OMAP2(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, \ - OMAP2UART##p) - -#define DEBUG_LL_OMAP3(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, \ - OMAP3UART##p) - -#define DEBUG_LL_OMAP4(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \ - OMAP4UART##p) - -#define DEBUG_LL_OMAP5(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \ - OMAP5UART##p) -/* Zoom2/3 shift is different for UART1 and external port */ -#define DEBUG_LL_ZOOM(mach) \ - _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART) - -#define DEBUG_LL_TI81XX(p, mach) \ - _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ - TI81XXUART##p) - -#define DEBUG_LL_AM33XX(p, mach) \ - _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ - AM33XXUART##p) - -static inline void arch_decomp_setup(void) -{ - int port = 0; - - /* - * Initialize the port based on the machine ID from the bootloader. - * Note that we're using macros here instead of switch statement - * as machine_is functions are optimized out for the boards that - * are not selected. - */ - do { - /* omap7xx/8xx based boards using UART1 with shift 0 */ - DEBUG_LL_OMAP7XX(1, herald); - DEBUG_LL_OMAP7XX(1, omap_perseus2); - - /* omap15xx/16xx based boards using UART1 */ - DEBUG_LL_OMAP1(1, ams_delta); - DEBUG_LL_OMAP1(1, nokia770); - DEBUG_LL_OMAP1(1, omap_h2); - DEBUG_LL_OMAP1(1, omap_h3); - DEBUG_LL_OMAP1(1, omap_innovator); - DEBUG_LL_OMAP1(1, omap_osk); - DEBUG_LL_OMAP1(1, omap_palmte); - DEBUG_LL_OMAP1(1, omap_palmz71); - - /* omap15xx/16xx based boards using UART2 */ - DEBUG_LL_OMAP1(2, omap_palmtt); - - /* omap15xx/16xx based boards using UART3 */ - DEBUG_LL_OMAP1(3, sx1); - - /* omap2 based boards using UART1 */ - DEBUG_LL_OMAP2(1, omap_2430sdp); - DEBUG_LL_OMAP2(1, omap_apollon); - DEBUG_LL_OMAP2(1, omap_h4); - - /* omap2 based boards using UART3 */ - DEBUG_LL_OMAP2(3, nokia_n800); - DEBUG_LL_OMAP2(3, nokia_n810); - DEBUG_LL_OMAP2(3, nokia_n810_wimax); - - /* omap3 based boards using UART1 */ - DEBUG_LL_OMAP2(1, omap3evm); - DEBUG_LL_OMAP3(1, omap_3430sdp); - DEBUG_LL_OMAP3(1, omap_3630sdp); - DEBUG_LL_OMAP3(1, omap3530_lv_som); - DEBUG_LL_OMAP3(1, omap3_torpedo); - - /* omap3 based boards using UART3 */ - DEBUG_LL_OMAP3(3, cm_t35); - DEBUG_LL_OMAP3(3, cm_t3517); - DEBUG_LL_OMAP3(3, cm_t3730); - DEBUG_LL_OMAP3(3, craneboard); - DEBUG_LL_OMAP3(3, devkit8000); - DEBUG_LL_OMAP3(3, igep0020); - DEBUG_LL_OMAP3(3, igep0030); - DEBUG_LL_OMAP3(3, nokia_rm680); - DEBUG_LL_OMAP3(3, nokia_rm696); - DEBUG_LL_OMAP3(3, nokia_rx51); - DEBUG_LL_OMAP3(3, omap3517evm); - DEBUG_LL_OMAP3(3, omap3_beagle); - DEBUG_LL_OMAP3(3, omap3_pandora); - DEBUG_LL_OMAP3(3, omap_ldp); - DEBUG_LL_OMAP3(3, overo); - DEBUG_LL_OMAP3(3, touchbook); - - /* omap4 based boards using UART3 */ - DEBUG_LL_OMAP4(3, omap_4430sdp); - DEBUG_LL_OMAP4(3, omap4_panda); - - /* omap5 based boards using UART3 */ - DEBUG_LL_OMAP5(3, omap5_sevm); - - /* zoom2/3 external uart */ - DEBUG_LL_ZOOM(omap_zoom2); - DEBUG_LL_ZOOM(omap_zoom3); - - /* TI8168 base boards using UART3 */ - DEBUG_LL_TI81XX(3, ti8168evm); - - /* TI8148 base boards using UART1 */ - DEBUG_LL_TI81XX(1, ti8148evm); - - /* AM33XX base boards using UART1 */ - DEBUG_LL_AM33XX(1, am335xevm); - } while (0); -} - -/* - * nothing to do - */ -#define arch_decomp_wdog() diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h deleted file mode 100644 index 87ee140fefaa..000000000000 --- a/arch/arm/plat-omap/include/plat/usb.h +++ /dev/null @@ -1,179 +0,0 @@ -// include/asm-arm/mach-omap/usb.h - -#ifndef __ASM_ARCH_OMAP_USB_H -#define __ASM_ARCH_OMAP_USB_H - -#include <linux/io.h> -#include <linux/platform_device.h> -#include <linux/usb/musb.h> - -#define OMAP3_HS_USB_PORTS 3 - -enum usbhs_omap_port_mode { - OMAP_USBHS_PORT_MODE_UNUSED, - OMAP_EHCI_PORT_MODE_PHY, - OMAP_EHCI_PORT_MODE_TLL, - OMAP_EHCI_PORT_MODE_HSIC, - OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0, - OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM, - OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0, - OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM, - OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0, - OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM, - OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0, - OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM, - OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0, - OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM -}; - -struct usbhs_omap_board_data { - enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; - - /* have to be valid if phy_reset is true and portx is in phy mode */ - int reset_gpio_port[OMAP3_HS_USB_PORTS]; - - /* Set this to true for ES2.x silicon */ - unsigned es2_compatibility:1; - - unsigned phy_reset:1; - - /* - * Regulators for USB PHYs. - * Each PHY can have a separate regulator. - */ - struct regulator *regulator[OMAP3_HS_USB_PORTS]; -}; - -#ifdef CONFIG_ARCH_OMAP2PLUS - -struct ehci_hcd_omap_platform_data { - enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; - int reset_gpio_port[OMAP3_HS_USB_PORTS]; - struct regulator *regulator[OMAP3_HS_USB_PORTS]; - unsigned phy_reset:1; -}; - -struct ohci_hcd_omap_platform_data { - enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; - unsigned es2_compatibility:1; -}; - -struct usbhs_omap_platform_data { - enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; - - struct ehci_hcd_omap_platform_data *ehci_data; - struct ohci_hcd_omap_platform_data *ohci_data; -}; - -struct usbtll_omap_platform_data { - enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; -}; -/*-------------------------------------------------------------------------*/ - -struct omap_musb_board_data { - u8 interface_type; - u8 mode; - u16 power; - unsigned extvbus:1; - void (*set_phy_power)(u8 on); - void (*clear_irq)(void); - void (*set_mode)(u8 mode); - void (*reset)(void); -}; - -enum musb_interface {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI}; - -extern void usb_musb_init(struct omap_musb_board_data *board_data); - -extern void usbhs_init(const struct usbhs_omap_board_data *pdata); -extern int omap_tll_enable(void); -extern int omap_tll_disable(void); - -extern int omap4430_phy_power(struct device *dev, int ID, int on); -extern int omap4430_phy_set_clk(struct device *dev, int on); -extern int omap4430_phy_init(struct device *dev); -extern int omap4430_phy_exit(struct device *dev); -extern int omap4430_phy_suspend(struct device *dev, int suspend); - -#endif - -extern void am35x_musb_reset(void); -extern void am35x_musb_phy_power(u8 on); -extern void am35x_musb_clear_irq(void); -extern void am35x_set_mode(u8 musb_mode); -extern void ti81xx_musb_phy_power(u8 on); - -/* AM35x */ -/* USB 2.0 PHY Control */ -#define CONF2_PHY_GPIOMODE (1 << 23) -#define CONF2_OTGMODE (3 << 14) -#define CONF2_NO_OVERRIDE (0 << 14) -#define CONF2_FORCE_HOST (1 << 14) -#define CONF2_FORCE_DEVICE (2 << 14) -#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14) -#define CONF2_SESENDEN (1 << 13) -#define CONF2_VBDTCTEN (1 << 12) -#define CONF2_REFFREQ_24MHZ (2 << 8) -#define CONF2_REFFREQ_26MHZ (7 << 8) -#define CONF2_REFFREQ_13MHZ (6 << 8) -#define CONF2_REFFREQ (0xf << 8) -#define CONF2_PHYCLKGD (1 << 7) -#define CONF2_VBUSSENSE (1 << 6) -#define CONF2_PHY_PLLON (1 << 5) -#define CONF2_RESET (1 << 4) -#define CONF2_PHYPWRDN (1 << 3) -#define CONF2_OTGPWRDN (1 << 2) -#define CONF2_DATPOL (1 << 1) - -/* TI81XX specific definitions */ -#define USBCTRL0 0x620 -#define USBSTAT0 0x624 - -/* TI816X PHY controls bits */ -#define TI816X_USBPHY0_NORMAL_MODE (1 << 0) -#define TI816X_USBPHY_REFCLK_OSC (1 << 8) - -/* TI814X PHY controls bits */ -#define USBPHY_CM_PWRDN (1 << 0) -#define USBPHY_OTG_PWRDN (1 << 1) -#define USBPHY_CHGDET_DIS (1 << 2) -#define USBPHY_CHGDET_RSTRT (1 << 3) -#define USBPHY_SRCONDM (1 << 4) -#define USBPHY_SINKONDP (1 << 5) -#define USBPHY_CHGISINK_EN (1 << 6) -#define USBPHY_CHGVSRC_EN (1 << 7) -#define USBPHY_DMPULLUP (1 << 8) -#define USBPHY_DPPULLUP (1 << 9) -#define USBPHY_CDET_EXTCTL (1 << 10) -#define USBPHY_GPIO_MODE (1 << 12) -#define USBPHY_DPOPBUFCTL (1 << 13) -#define USBPHY_DMOPBUFCTL (1 << 14) -#define USBPHY_DPINPUT (1 << 15) -#define USBPHY_DMINPUT (1 << 16) -#define USBPHY_DPGPIO_PD (1 << 17) -#define USBPHY_DMGPIO_PD (1 << 18) -#define USBPHY_OTGVDET_EN (1 << 19) -#define USBPHY_OTGSESSEND_EN (1 << 20) -#define USBPHY_DATA_POLARITY (1 << 23) - -#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) -u32 omap1_usb0_init(unsigned nwires, unsigned is_device); -u32 omap1_usb1_init(unsigned nwires); -u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup); -#else -static inline u32 omap1_usb0_init(unsigned nwires, unsigned is_device) -{ - return 0; -} -static inline u32 omap1_usb1_init(unsigned nwires) -{ - return 0; - -} -static inline u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) -{ - return 0; -} -#endif - -#endif /* __ASM_ARCH_OMAP_USB_H */ diff --git a/arch/arm/plat-omap/include/plat/vrfb.h b/arch/arm/plat-omap/include/plat/vrfb.h deleted file mode 100644 index 3792bdea2f6d..000000000000 --- a/arch/arm/plat-omap/include/plat/vrfb.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * VRFB Rotation Engine - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef __OMAP_VRFB_H__ -#define __OMAP_VRFB_H__ - -#define OMAP_VRFB_LINE_LEN 2048 - -struct vrfb { - u8 context; - void __iomem *vaddr[4]; - unsigned long paddr[4]; - u16 xres; - u16 yres; - u16 xoffset; - u16 yoffset; - u8 bytespp; - bool yuv_mode; -}; - -#ifdef CONFIG_OMAP2_VRFB -extern int omap_vrfb_request_ctx(struct vrfb *vrfb); -extern void omap_vrfb_release_ctx(struct vrfb *vrfb); -extern void omap_vrfb_adjust_size(u16 *width, u16 *height, - u8 bytespp); -extern u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp); -extern u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp); -extern void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr, - u16 width, u16 height, - unsigned bytespp, bool yuv_mode); -extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot); -extern void omap_vrfb_restore_context(void); - -#else -static inline int omap_vrfb_request_ctx(struct vrfb *vrfb) { return 0; } -static inline void omap_vrfb_release_ctx(struct vrfb *vrfb) {} -static inline void omap_vrfb_adjust_size(u16 *width, u16 *height, - u8 bytespp) {} -static inline u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp) - { return 0; } -static inline u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp) - { return 0; } -static inline void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr, - u16 width, u16 height, unsigned bytespp, bool yuv_mode) {} -static inline int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot) - { return 0; } -static inline void omap_vrfb_restore_context(void) {} -#endif -#endif /* __VRFB_H */ diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 28acb383e7df..743fc2836f7a 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -20,198 +20,20 @@ #include <linux/init.h> #include <linux/io.h> +#include <asm/fncpy.h> #include <asm/tlb.h> #include <asm/cacheflush.h> #include <asm/mach/map.h> -#include <plat/sram.h> -#include <plat/cpu.h> - -#include "sram.h" - -/* XXX These "sideways" includes will disappear when sram.c becomes a driver */ -#include "../mach-omap2/iomap.h" -#include "../mach-omap2/prm2xxx_3xxx.h" -#include "../mach-omap2/sdrc.h" - -#define OMAP1_SRAM_PA 0x20000000 -#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) -#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) -#ifdef CONFIG_OMAP4_ERRATA_I688 -#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA -#else -#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) -#endif -#define OMAP5_SRAM_PA 0x40300000 - -#if defined(CONFIG_ARCH_OMAP2PLUS) -#define SRAM_BOOTLOADER_SZ 0x00 -#else -#define SRAM_BOOTLOADER_SZ 0x80 -#endif - -#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048) -#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050) -#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058) - -#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848) -#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850) -#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858) -#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880) -#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048) - -#define GP_DEVICE 0x300 - #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) -static unsigned long omap_sram_start; static void __iomem *omap_sram_base; static unsigned long omap_sram_skip; static unsigned long omap_sram_size; static void __iomem *omap_sram_ceil; /* - * Depending on the target RAMFS firewall setup, the public usable amount of - * SRAM varies. The default accessible size for all device types is 2k. A GP - * device allows ARM11 but not other initiators for full size. This - * functionality seems ok until some nice security API happens. - */ -static int is_sram_locked(void) -{ - if (OMAP2_DEVICE_TYPE_GP == omap_type()) { - /* RAMFW: R/W access to all initiators for all qualifier sets */ - if (cpu_is_omap242x()) { - __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */ - __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ - __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ - } - if (cpu_is_omap34xx()) { - __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ - __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ - __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ - __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2); - __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0); - } - return 0; - } else - return 1; /* assume locked with no PPA or security driver */ -} - -/* - * The amount of SRAM depends on the core type. - * Note that we cannot try to test for SRAM here because writes - * to secure SRAM will hang the system. Also the SRAM is not - * yet mapped at this point. - */ -static void __init omap_detect_sram(void) -{ - omap_sram_skip = SRAM_BOOTLOADER_SZ; - if (cpu_class_is_omap2()) { - if (is_sram_locked()) { - if (cpu_is_omap34xx()) { - omap_sram_start = OMAP3_SRAM_PUB_PA; - if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) || - (omap_type() == OMAP2_DEVICE_TYPE_SEC)) { - omap_sram_size = 0x7000; /* 28K */ - omap_sram_skip += SZ_16K; - } else { - omap_sram_size = 0x8000; /* 32K */ - } - } else if (cpu_is_omap44xx()) { - omap_sram_start = OMAP4_SRAM_PUB_PA; - omap_sram_size = 0xa000; /* 40K */ - } else if (soc_is_omap54xx()) { - omap_sram_start = OMAP5_SRAM_PA; - omap_sram_size = SZ_128K; /* 128KB */ - } else { - omap_sram_start = OMAP2_SRAM_PUB_PA; - omap_sram_size = 0x800; /* 2K */ - } - } else { - if (soc_is_am33xx()) { - omap_sram_start = AM33XX_SRAM_PA; - omap_sram_size = 0x10000; /* 64K */ - } else if (cpu_is_omap34xx()) { - omap_sram_start = OMAP3_SRAM_PA; - omap_sram_size = 0x10000; /* 64K */ - } else if (cpu_is_omap44xx()) { - omap_sram_start = OMAP4_SRAM_PA; - omap_sram_size = 0xe000; /* 56K */ - } else if (soc_is_omap54xx()) { - omap_sram_start = OMAP5_SRAM_PA; - omap_sram_size = SZ_128K; /* 128KB */ - } else { - omap_sram_start = OMAP2_SRAM_PA; - if (cpu_is_omap242x()) - omap_sram_size = 0xa0000; /* 640K */ - else if (cpu_is_omap243x()) - omap_sram_size = 0x10000; /* 64K */ - } - } - } else { - omap_sram_start = OMAP1_SRAM_PA; - - if (cpu_is_omap7xx()) - omap_sram_size = 0x32000; /* 200K */ - else if (cpu_is_omap15xx()) - omap_sram_size = 0x30000; /* 192K */ - else if (cpu_is_omap1610() || cpu_is_omap1611() || - cpu_is_omap1621() || cpu_is_omap1710()) - omap_sram_size = 0x4000; /* 16K */ - else { - pr_err("Could not detect SRAM size\n"); - omap_sram_size = 0x4000; - } - } -} - -/* - * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. - */ -static void __init omap_map_sram(void) -{ - int cached = 1; - - if (omap_sram_size == 0) - return; - -#ifdef CONFIG_OMAP4_ERRATA_I688 - if (cpu_is_omap44xx()) { - omap_sram_start += PAGE_SIZE; - omap_sram_size -= SZ_16K; - } -#endif - if (cpu_is_omap34xx()) { - /* - * SRAM must be marked as non-cached on OMAP3 since the - * CORE DPLL M2 divider change code (in SRAM) runs with the - * SDRAM controller disabled, and if it is marked cached, - * the ARM may attempt to write cache lines back to SDRAM - * which will cause the system to hang. - */ - cached = 0; - } - - omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE); - omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, - cached); - if (!omap_sram_base) { - pr_err("SRAM: Could not map\n"); - return; - } - - omap_sram_ceil = omap_sram_base + omap_sram_size; - - /* - * Looks like we need to preserve some bootloader code at the - * beginning of SRAM for jumping to flash for reboot to work... - */ - memset_io(omap_sram_base + omap_sram_skip, 0, - omap_sram_size - omap_sram_skip); -} - -/* * Memory allocator for SRAM: calculates the new ceiling address * for pushing a function using the fncpy API. * @@ -236,171 +58,39 @@ void *omap_sram_push_address(unsigned long size) return (void *)omap_sram_ceil; } -#ifdef CONFIG_ARCH_OMAP1 - -static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); - -void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) -{ - BUG_ON(!_omap_sram_reprogram_clock); - /* On 730, bit 13 must always be 1 */ - if (cpu_is_omap7xx()) - ckctl |= 0x2000; - _omap_sram_reprogram_clock(dpllctl, ckctl); -} - -static int __init omap1_sram_init(void) -{ - _omap_sram_reprogram_clock = - omap_sram_push(omap1_sram_reprogram_clock, - omap1_sram_reprogram_clock_sz); - - return 0; -} - -#else -#define omap1_sram_init() do {} while (0) -#endif - -#if defined(CONFIG_ARCH_OMAP2) - -static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock); - -void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock) -{ - BUG_ON(!_omap2_sram_ddr_init); - _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, - base_cs, force_unlock); -} - -static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, - u32 mem_type); - -void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type) -{ - BUG_ON(!_omap2_sram_reprogram_sdrc); - _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); -} - -static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); - -u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) -{ - BUG_ON(!_omap2_set_prcm); - return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); -} -#endif - -#ifdef CONFIG_SOC_OMAP2420 -static int __init omap242x_sram_init(void) -{ - _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init, - omap242x_sram_ddr_init_sz); - - _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc, - omap242x_sram_reprogram_sdrc_sz); - - _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm, - omap242x_sram_set_prcm_sz); - - return 0; -} -#else -static inline int omap242x_sram_init(void) -{ - return 0; -} -#endif - -#ifdef CONFIG_SOC_OMAP2430 -static int __init omap243x_sram_init(void) -{ - _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init, - omap243x_sram_ddr_init_sz); - - _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc, - omap243x_sram_reprogram_sdrc_sz); - - _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm, - omap243x_sram_set_prcm_sz); - - return 0; -} -#else -static inline int omap243x_sram_init(void) -{ - return 0; -} -#endif - -#ifdef CONFIG_ARCH_OMAP3 - -static u32 (*_omap3_sram_configure_core_dpll)( - u32 m2, u32 unlock_dll, u32 f, u32 inc, - u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, - u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, - u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, - u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); - -u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc, - u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, - u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, - u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, - u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1) -{ - BUG_ON(!_omap3_sram_configure_core_dpll); - return _omap3_sram_configure_core_dpll( - m2, unlock_dll, f, inc, - sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0, - sdrc_actim_ctrl_b_0, sdrc_mr_0, - sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1, - sdrc_actim_ctrl_b_1, sdrc_mr_1); -} - -void omap3_sram_restore_context(void) +/* + * The SRAM context is lost during off-idle and stack + * needs to be reset. + */ +void omap_sram_reset(void) { omap_sram_ceil = omap_sram_base + omap_sram_size; - - _omap3_sram_configure_core_dpll = - omap_sram_push(omap3_sram_configure_core_dpll, - omap3_sram_configure_core_dpll_sz); - omap_push_sram_idle(); } -static inline int omap34xx_sram_init(void) -{ - omap3_sram_restore_context(); - return 0; -} -#else -static inline int omap34xx_sram_init(void) -{ - return 0; -} -#endif /* CONFIG_ARCH_OMAP3 */ - -static inline int am33xx_sram_init(void) +/* + * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. + */ +void __init omap_map_sram(unsigned long start, unsigned long size, + unsigned long skip, int cached) { - return 0; -} + if (size == 0) + return; -int __init omap_sram_init(void) -{ - omap_detect_sram(); - omap_map_sram(); + start = ROUND_DOWN(start, PAGE_SIZE); + omap_sram_size = size; + omap_sram_skip = skip; + omap_sram_base = __arm_ioremap_exec(start, size, cached); + if (!omap_sram_base) { + pr_err("SRAM: Could not map\n"); + return; + } - if (!(cpu_class_is_omap2())) - omap1_sram_init(); - else if (cpu_is_omap242x()) - omap242x_sram_init(); - else if (cpu_is_omap2430()) - omap243x_sram_init(); - else if (soc_is_am33xx()) - am33xx_sram_init(); - else if (cpu_is_omap34xx()) - omap34xx_sram_init(); + omap_sram_reset(); - return 0; + /* + * Looks like we need to preserve some bootloader code at the + * beginning of SRAM for jumping to flash for reboot to work... + */ + memset_io(omap_sram_base + omap_sram_skip, 0, + omap_sram_size - omap_sram_skip); } diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/plat-omap/sram.h deleted file mode 100644 index 29b43ef97f20..000000000000 --- a/arch/arm/plat-omap/sram.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __PLAT_OMAP_SRAM_H__ -#define __PLAT_OMAP_SRAM_H__ - -extern int __init omap_sram_init(void); - -#endif /* __PLAT_OMAP_SRAM_H__ */ diff --git a/arch/arm/plat-samsung/include/plat/spi-core.h b/arch/arm/plat-samsung/include/plat/spi-core.h new file mode 100644 index 000000000000..0b9428ab3fc3 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/spi-core.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __PLAT_S3C_SPI_CORE_H +#define __PLAT_S3C_SPI_CORE_H + +/* These functions are only for use with the core support code, such as + * the cpu specific initialisation code + */ + +/* re-define device name depending on support. */ +static inline void s3c64xx_spi_setname(char *name) +{ +#ifdef CONFIG_S3C64XX_DEV_SPI0 + s3c64xx_device_spi0.name = name; +#endif +#ifdef CONFIG_S3C64XX_DEV_SPI1 + s3c64xx_device_spi1.name = name; +#endif +#ifdef CONFIG_S3C64XX_DEV_SPI2 + s3c64xx_device_spi2.name = name; +#endif +} + +#endif /* __PLAT_S3C_SPI_CORE_H */ diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile index 635cb1865e4d..cd60a81163e9 100644 --- a/arch/arm/tools/Makefile +++ b/arch/arm/tools/Makefile @@ -5,6 +5,6 @@ # include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types - @echo ' Generating $@' + $(kecho) ' Generating $@' @mkdir -p $(dir $@) $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } diff --git a/arch/arm/xen/grant-table.c b/arch/arm/xen/grant-table.c index dbd1330c0196..859a9bb002d5 100644 --- a/arch/arm/xen/grant-table.c +++ b/arch/arm/xen/grant-table.c @@ -33,7 +33,7 @@ #include <xen/page.h> #include <xen/grant_table.h> -int arch_gnttab_map_shared(unsigned long *frames, unsigned long nr_gframes, +int arch_gnttab_map_shared(xen_pfn_t *frames, unsigned long nr_gframes, unsigned long max_nr_gframes, void **__shared) { diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7ff68c946073..ef54a59a9e89 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -22,6 +22,7 @@ config ARM64 select HAVE_PERF_EVENTS select HAVE_SPARSE_IRQ select IRQ_DOMAIN + select MODULES_USE_ELF_RELA select NO_BOOTMEM select OF select OF_EARLY_FLATTREE diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild index fe77e51a7847..a581a2205938 100644 --- a/arch/arm64/include/asm/Kbuild +++ b/arch/arm64/include/asm/Kbuild @@ -18,7 +18,6 @@ generic-y += ipcbuf.h generic-y += irq_regs.h generic-y += kdebug.h generic-y += kmap_types.h -generic-y += linkage.h generic-y += local.h generic-y += local64.h generic-y += mman.h diff --git a/arch/arm64/include/asm/linkage.h b/arch/arm64/include/asm/linkage.h new file mode 100644 index 000000000000..636c1bced7d4 --- /dev/null +++ b/arch/arm64/include/asm/linkage.h @@ -0,0 +1,7 @@ +#ifndef __ASM_LINKAGE_H +#define __ASM_LINKAGE_H + +#define __ALIGN .align 4 +#define __ALIGN_STR ".align 4" + +#endif diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 39a208a392f7..5d810044feda 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -92,30 +92,20 @@ static inline void start_thread_common(struct pt_regs *regs, unsigned long pc) static inline void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) { - unsigned long *stack = (unsigned long *)sp; - start_thread_common(regs, pc); regs->pstate = PSR_MODE_EL0t; regs->sp = sp; - regs->regs[2] = stack[2]; /* x2 (envp) */ - regs->regs[1] = stack[1]; /* x1 (argv) */ - regs->regs[0] = stack[0]; /* x0 (argc) */ } #ifdef CONFIG_COMPAT static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) { - unsigned int *stack = (unsigned int *)sp; - start_thread_common(regs, pc); regs->pstate = COMPAT_PSR_MODE_USR; if (pc & 1) regs->pstate |= COMPAT_PSR_T_BIT; regs->compat_sp = sp; - regs->regs[2] = stack[2]; /* x2 (envp) */ - regs->regs[1] = stack[1]; /* x1 (argv) */ - regs->regs[0] = stack[0]; /* x0 (argc) */ } #endif diff --git a/arch/arm64/include/uapi/asm/ptrace.h b/arch/arm64/include/uapi/asm/ptrace.h index 9b131b4efa0b..6913643bbe54 100644 --- a/arch/arm64/include/uapi/asm/ptrace.h +++ b/arch/arm64/include/uapi/asm/ptrace.h @@ -79,13 +79,14 @@ struct user_fpsimd_state { struct user_hwdebug_state { __u32 dbg_info; + __u32 pad; struct { __u64 addr; __u32 ctrl; + __u32 pad; } dbg_regs[16]; }; - #endif /* __ASSEMBLY__ */ #endif /* _UAPI__ASM_PTRACE_H */ diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 2ea3968367c2..6e1e77f1831c 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -234,28 +234,33 @@ static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type, struct arch_hw_breakpoint_ctrl ctrl, struct perf_event_attr *attr) { - int err, len, type; + int err, len, type, disabled = !ctrl.enabled; - err = arch_bp_generic_fields(ctrl, &len, &type); - if (err) - return err; - - switch (note_type) { - case NT_ARM_HW_BREAK: - if ((type & HW_BREAKPOINT_X) != type) - return -EINVAL; - break; - case NT_ARM_HW_WATCH: - if ((type & HW_BREAKPOINT_RW) != type) + if (disabled) { + len = 0; + type = HW_BREAKPOINT_EMPTY; + } else { + err = arch_bp_generic_fields(ctrl, &len, &type); + if (err) + return err; + + switch (note_type) { + case NT_ARM_HW_BREAK: + if ((type & HW_BREAKPOINT_X) != type) + return -EINVAL; + break; + case NT_ARM_HW_WATCH: + if ((type & HW_BREAKPOINT_RW) != type) + return -EINVAL; + break; + default: return -EINVAL; - break; - default: - return -EINVAL; + } } attr->bp_len = len; attr->bp_type = type; - attr->disabled = !ctrl.enabled; + attr->disabled = disabled; return 0; } @@ -372,7 +377,7 @@ static int ptrace_hbp_set_addr(unsigned int note_type, #define PTRACE_HBP_ADDR_SZ sizeof(u64) #define PTRACE_HBP_CTRL_SZ sizeof(u32) -#define PTRACE_HBP_REG_OFF sizeof(u32) +#define PTRACE_HBP_PAD_SZ sizeof(u32) static int hw_break_get(struct task_struct *target, const struct user_regset *regset, @@ -380,7 +385,7 @@ static int hw_break_get(struct task_struct *target, void *kbuf, void __user *ubuf) { unsigned int note_type = regset->core_note_type; - int ret, idx = 0, offset = PTRACE_HBP_REG_OFF, limit; + int ret, idx = 0, offset, limit; u32 info, ctrl; u64 addr; @@ -389,11 +394,20 @@ static int hw_break_get(struct task_struct *target, if (ret) return ret; - ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0, 4); + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0, + sizeof(info)); + if (ret) + return ret; + + /* Pad */ + offset = offsetof(struct user_hwdebug_state, pad); + ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset, + offset + PTRACE_HBP_PAD_SZ); if (ret) return ret; /* (address, ctrl) registers */ + offset = offsetof(struct user_hwdebug_state, dbg_regs); limit = regset->n * regset->size; while (count && offset < limit) { ret = ptrace_hbp_get_addr(note_type, target, idx, &addr); @@ -413,6 +427,13 @@ static int hw_break_get(struct task_struct *target, if (ret) return ret; offset += PTRACE_HBP_CTRL_SZ; + + ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, + offset, + offset + PTRACE_HBP_PAD_SZ); + if (ret) + return ret; + offset += PTRACE_HBP_PAD_SZ; idx++; } @@ -425,12 +446,13 @@ static int hw_break_set(struct task_struct *target, const void *kbuf, const void __user *ubuf) { unsigned int note_type = regset->core_note_type; - int ret, idx = 0, offset = PTRACE_HBP_REG_OFF, limit; + int ret, idx = 0, offset, limit; u32 ctrl; u64 addr; - /* Resource info */ - ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, 4); + /* Resource info and pad */ + offset = offsetof(struct user_hwdebug_state, dbg_regs); + ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset); if (ret) return ret; @@ -454,6 +476,13 @@ static int hw_break_set(struct task_struct *target, if (ret) return ret; offset += PTRACE_HBP_CTRL_SZ; + + ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, + offset, + offset + PTRACE_HBP_PAD_SZ); + if (ret) + return ret; + offset += PTRACE_HBP_PAD_SZ; idx++; } diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 48ffb9fb3fe3..7665a9bfdb1e 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -170,7 +170,19 @@ static void __init setup_machine_fdt(phys_addr_t dt_phys) void __init early_init_dt_add_memory_arch(u64 base, u64 size) { + base &= PAGE_MASK; size &= PAGE_MASK; + if (base + size < PHYS_OFFSET) { + pr_warning("Ignoring memory block 0x%llx - 0x%llx\n", + base, base + size); + return; + } + if (base < PHYS_OFFSET) { + pr_warning("Ignoring memory range 0x%llx - 0x%llx\n", + base, PHYS_OFFSET); + size -= PHYS_OFFSET - base; + base = PHYS_OFFSET; + } memblock_add(base, size); } diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index b711525be21f..226b6bf6e9c2 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -46,7 +46,6 @@ #include <asm/sections.h> #include <asm/tlbflush.h> #include <asm/ptrace.h> -#include <asm/mmu_context.h> /* * as from 2.5, kernels no longer have an init_tasks structure diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c index 17948fc7d663..ba457943a16b 100644 --- a/arch/arm64/kernel/vdso.c +++ b/arch/arm64/kernel/vdso.c @@ -28,6 +28,7 @@ #include <linux/sched.h> #include <linux/signal.h> #include <linux/slab.h> +#include <linux/timekeeper_internal.h> #include <linux/vmalloc.h> #include <asm/cacheflush.h> @@ -222,11 +223,10 @@ struct vm_area_struct *get_gate_vma(struct mm_struct *mm) /* * Update the vDSO data page to keep in sync with kernel timekeeping. */ -void update_vsyscall(struct timespec *ts, struct timespec *wtm, - struct clocksource *clock, u32 mult) +void update_vsyscall(struct timekeeper *tk) { struct timespec xtime_coarse; - u32 use_syscall = strcmp(clock->name, "arch_sys_counter"); + u32 use_syscall = strcmp(tk->clock->name, "arch_sys_counter"); ++vdso_data->tb_seq_count; smp_wmb(); @@ -237,13 +237,13 @@ void update_vsyscall(struct timespec *ts, struct timespec *wtm, vdso_data->xtime_coarse_nsec = xtime_coarse.tv_nsec; if (!use_syscall) { - vdso_data->cs_cycle_last = clock->cycle_last; - vdso_data->xtime_clock_sec = ts->tv_sec; - vdso_data->xtime_clock_nsec = ts->tv_nsec; - vdso_data->cs_mult = mult; - vdso_data->cs_shift = clock->shift; - vdso_data->wtm_clock_sec = wtm->tv_sec; - vdso_data->wtm_clock_nsec = wtm->tv_nsec; + vdso_data->cs_cycle_last = tk->clock->cycle_last; + vdso_data->xtime_clock_sec = tk->xtime_sec; + vdso_data->xtime_clock_nsec = tk->xtime_nsec >> tk->shift; + vdso_data->cs_mult = tk->mult; + vdso_data->cs_shift = tk->shift; + vdso_data->wtm_clock_sec = tk->wall_to_monotonic.tv_sec; + vdso_data->wtm_clock_nsec = tk->wall_to_monotonic.tv_nsec; } smp_wmb(); diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h index 70742ec997f8..d485b0391357 100644 --- a/arch/avr32/mach-at32ap/include/mach/board.h +++ b/arch/avr32/mach-at32ap/include/mach/board.h @@ -26,7 +26,6 @@ static inline void __deprecated at32_add_system_devices(void) } -#define ATMEL_MAX_UART 4 extern struct platform_device *atmel_default_console_device; /* Flags for selecting USART extra pins */ @@ -34,13 +33,6 @@ extern struct platform_device *atmel_default_console_device; #define ATMEL_USART_CTS 0x02 #define ATMEL_USART_CLK 0x04 -struct atmel_uart_data { - int num; /* port num */ - short use_dma_tx; /* use transmit DMA? */ - short use_dma_rx; /* use receive DMA? */ - void __iomem *regs; /* virtual base address, if any */ - struct serial_rs485 rs485; /* rs485 settings */ -}; void at32_map_usart(unsigned int hw_id, unsigned int line, int flags); struct platform_device *at32_add_device_usart(unsigned int id); diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S index 002732960315..ee0beb354e4d 100644 --- a/arch/frv/kernel/entry.S +++ b/arch/frv/kernel/entry.S @@ -867,8 +867,8 @@ ret_from_fork: ret_from_kernel_thread: lddi.p @(gr28,#REG_GR(8)),gr20 call schedule_tail - or.p gr20,gr20,gr8 - calll @(gr21,gr0) + calll.p @(gr21,gr0) + or gr20,gr20,gr8 bra sys_exit .globl ret_from_kernel_execve diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c index 655d90d20bb0..e1e3aa196aa4 100644 --- a/arch/frv/kernel/process.c +++ b/arch/frv/kernel/process.c @@ -194,7 +194,7 @@ int copy_thread(unsigned long clone_flags, memset(childregs, 0, sizeof(struct pt_regs)); childregs->gr9 = usp; /* function */ childregs->gr8 = arg; - chilregs->psr = PSR_S; + childregs->psr = PSR_S; p->thread.pc = (unsigned long) ret_from_kernel_thread; save_user_regs(p->thread.user); return 0; diff --git a/arch/frv/kernel/setup.c b/arch/frv/kernel/setup.c index 1f1e5efb3385..b8993c87d3de 100644 --- a/arch/frv/kernel/setup.c +++ b/arch/frv/kernel/setup.c @@ -112,9 +112,11 @@ char __initdata redboot_command_line[COMMAND_LINE_SIZE]; #ifdef CONFIG_PM #define __pminit #define __pminitdata +#define __pminitconst #else #define __pminit __init #define __pminitdata __initdata +#define __pminitconst __initconst #endif struct clock_cmode { diff --git a/arch/hexagon/include/asm/Kbuild b/arch/hexagon/include/asm/Kbuild index 3364b6966d26..3bfa9b30f448 100644 --- a/arch/hexagon/include/asm/Kbuild +++ b/arch/hexagon/include/asm/Kbuild @@ -1,8 +1,5 @@ -include include/asm-generic/Kbuild.asm -header-y += registers.h header-y += ucontext.h -header-y += user.h generic-y += auxvec.h generic-y += bug.h diff --git a/arch/hexagon/include/asm/atomic.h b/arch/hexagon/include/asm/atomic.h index 3e258043337b..468fbb0781cd 100644 --- a/arch/hexagon/include/asm/atomic.h +++ b/arch/hexagon/include/asm/atomic.h @@ -1,7 +1,7 @@ /* * Atomic operations for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify diff --git a/arch/hexagon/include/asm/barrier.h b/arch/hexagon/include/asm/barrier.h index a4ed6e26cb1d..1041a8e70ce8 100644 --- a/arch/hexagon/include/asm/barrier.h +++ b/arch/hexagon/include/asm/barrier.h @@ -1,7 +1,7 @@ /* * Memory barrier definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/bitops.h b/arch/hexagon/include/asm/bitops.h index 4caa649ad78b..9b1e4afbab3c 100644 --- a/arch/hexagon/include/asm/bitops.h +++ b/arch/hexagon/include/asm/bitops.h @@ -1,7 +1,7 @@ /* * Bit operations for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify diff --git a/arch/hexagon/include/asm/cache.h b/arch/hexagon/include/asm/cache.h index 0f01de2eb4ab..f4ca594fdf8c 100644 --- a/arch/hexagon/include/asm/cache.h +++ b/arch/hexagon/include/asm/cache.h @@ -1,7 +1,7 @@ /* * Cache definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/cacheflush.h b/arch/hexagon/include/asm/cacheflush.h index 6865c1be927a..49e0896ec240 100644 --- a/arch/hexagon/include/asm/cacheflush.h +++ b/arch/hexagon/include/asm/cacheflush.h @@ -1,7 +1,7 @@ /* * Cache flush operations for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/checksum.h b/arch/hexagon/include/asm/checksum.h index 3ce4ecd44f82..46ec8a7fd65f 100644 --- a/arch/hexagon/include/asm/checksum.h +++ b/arch/hexagon/include/asm/checksum.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/cmpxchg.h b/arch/hexagon/include/asm/cmpxchg.h index c5f9527e1df6..9e7802911a57 100644 --- a/arch/hexagon/include/asm/cmpxchg.h +++ b/arch/hexagon/include/asm/cmpxchg.h @@ -1,7 +1,7 @@ /* * xchg/cmpxchg operations for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify diff --git a/arch/hexagon/include/asm/delay.h b/arch/hexagon/include/asm/delay.h index 9ab12e9a872b..53079719d667 100644 --- a/arch/hexagon/include/asm/delay.h +++ b/arch/hexagon/include/asm/delay.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/dma-mapping.h b/arch/hexagon/include/asm/dma-mapping.h index 233ed3d2d25e..85e9935660cb 100644 --- a/arch/hexagon/include/asm/dma-mapping.h +++ b/arch/hexagon/include/asm/dma-mapping.h @@ -1,7 +1,7 @@ /* * DMA operations for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/dma.h b/arch/hexagon/include/asm/dma.h index da6d2f61a93a..9e34ff49f3b7 100644 --- a/arch/hexagon/include/asm/dma.h +++ b/arch/hexagon/include/asm/dma.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/elf.h b/arch/hexagon/include/asm/elf.h index 82b499621e05..1ba4b3bff5ed 100644 --- a/arch/hexagon/include/asm/elf.h +++ b/arch/hexagon/include/asm/elf.h @@ -1,7 +1,7 @@ /* * ELF definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/exec.h b/arch/hexagon/include/asm/exec.h index 350e6d497d44..c32b2132614b 100644 --- a/arch/hexagon/include/asm/exec.h +++ b/arch/hexagon/include/asm/exec.h @@ -1,7 +1,7 @@ /* * Process execution related definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/fixmap.h b/arch/hexagon/include/asm/fixmap.h index b27f4941645b..b75b6bf4269c 100644 --- a/arch/hexagon/include/asm/fixmap.h +++ b/arch/hexagon/include/asm/fixmap.h @@ -1,7 +1,7 @@ /* * Fixmap support for Hexagon - enough to support highmem features * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/hexagon_vm.h b/arch/hexagon/include/asm/hexagon_vm.h index 182cb9d54769..c144bee6cabe 100644 --- a/arch/hexagon/include/asm/hexagon_vm.h +++ b/arch/hexagon/include/asm/hexagon_vm.h @@ -1,7 +1,7 @@ /* * Declarations for to Hexagon Virtal Machine. * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/intrinsics.h b/arch/hexagon/include/asm/intrinsics.h index 1c02186d2e9a..ca587737fb2a 100644 --- a/arch/hexagon/include/asm/intrinsics.h +++ b/arch/hexagon/include/asm/intrinsics.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/io.h b/arch/hexagon/include/asm/io.h index b3acc2cc71bf..e527cfeff5ba 100644 --- a/arch/hexagon/include/asm/io.h +++ b/arch/hexagon/include/asm/io.h @@ -1,7 +1,7 @@ /* * IO definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/irq.h b/arch/hexagon/include/asm/irq.h index ded8c15cf3e5..51661db389d6 100644 --- a/arch/hexagon/include/asm/irq.h +++ b/arch/hexagon/include/asm/irq.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/irqflags.h b/arch/hexagon/include/asm/irqflags.h index ec1523655416..e5fd9492d60f 100644 --- a/arch/hexagon/include/asm/irqflags.h +++ b/arch/hexagon/include/asm/irqflags.h @@ -1,7 +1,7 @@ /* * IRQ support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/kgdb.h b/arch/hexagon/include/asm/kgdb.h index 9e8779702f10..32a6fb66944a 100644 --- a/arch/hexagon/include/asm/kgdb.h +++ b/arch/hexagon/include/asm/kgdb.h @@ -1,7 +1,7 @@ /* * arch/hexagon/include/asm/kgdb.h - Hexagon KGDB Support * - * Copyright (c) 2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/linkage.h b/arch/hexagon/include/asm/linkage.h index a00b85f680b8..31b4cbe7e583 100644 --- a/arch/hexagon/include/asm/linkage.h +++ b/arch/hexagon/include/asm/linkage.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/mem-layout.h b/arch/hexagon/include/asm/mem-layout.h index 72e5dcda79f5..af16e977c55e 100644 --- a/arch/hexagon/include/asm/mem-layout.h +++ b/arch/hexagon/include/asm/mem-layout.h @@ -1,7 +1,7 @@ /* * Memory layout definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/mmu.h b/arch/hexagon/include/asm/mmu.h index 30a5d8d2659d..2288b19fd0f2 100644 --- a/arch/hexagon/include/asm/mmu.h +++ b/arch/hexagon/include/asm/mmu.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/mmu_context.h b/arch/hexagon/include/asm/mmu_context.h index b4fe5a5411b6..d423d2e73c30 100644 --- a/arch/hexagon/include/asm/mmu_context.h +++ b/arch/hexagon/include/asm/mmu_context.h @@ -1,7 +1,7 @@ /* * MM context support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/module.h b/arch/hexagon/include/asm/module.h index 72ba494e6d7d..6b4323acef44 100644 --- a/arch/hexagon/include/asm/module.h +++ b/arch/hexagon/include/asm/module.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/page.h b/arch/hexagon/include/asm/page.h index edd97626c482..692adc213429 100644 --- a/arch/hexagon/include/asm/page.h +++ b/arch/hexagon/include/asm/page.h @@ -1,7 +1,7 @@ /* * Page management definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/perf_event.h b/arch/hexagon/include/asm/perf_event.h index 8b8526b491c7..430978b1de38 100644 --- a/arch/hexagon/include/asm/perf_event.h +++ b/arch/hexagon/include/asm/perf_event.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/pgalloc.h b/arch/hexagon/include/asm/pgalloc.h index 13443c775131..679bf6d66487 100644 --- a/arch/hexagon/include/asm/pgalloc.h +++ b/arch/hexagon/include/asm/pgalloc.h @@ -1,7 +1,7 @@ /* * Page table support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/pgtable.h b/arch/hexagon/include/asm/pgtable.h index ca619bf225ef..20d55f69fe55 100644 --- a/arch/hexagon/include/asm/pgtable.h +++ b/arch/hexagon/include/asm/pgtable.h @@ -1,7 +1,7 @@ /* * Page table support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/processor.h b/arch/hexagon/include/asm/processor.h index e8ea459002a4..a03323ab9d44 100644 --- a/arch/hexagon/include/asm/processor.h +++ b/arch/hexagon/include/asm/processor.h @@ -1,7 +1,7 @@ /* * Process/processor support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/smp.h b/arch/hexagon/include/asm/smp.h index 87c869a6a897..2b9b974e0952 100644 --- a/arch/hexagon/include/asm/smp.h +++ b/arch/hexagon/include/asm/smp.h @@ -1,7 +1,7 @@ /* * SMP definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/spinlock.h b/arch/hexagon/include/asm/spinlock.h index 168a920485a8..12ca4ebc0338 100644 --- a/arch/hexagon/include/asm/spinlock.h +++ b/arch/hexagon/include/asm/spinlock.h @@ -1,7 +1,7 @@ /* * Spinlock support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify diff --git a/arch/hexagon/include/asm/spinlock_types.h b/arch/hexagon/include/asm/spinlock_types.h index 99b5a7575c21..7a906b5214a4 100644 --- a/arch/hexagon/include/asm/spinlock_types.h +++ b/arch/hexagon/include/asm/spinlock_types.h @@ -1,7 +1,7 @@ /* * Spinlock support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/string.h b/arch/hexagon/include/asm/string.h index f4489c15942c..7d37f47a1d07 100644 --- a/arch/hexagon/include/asm/string.h +++ b/arch/hexagon/include/asm/string.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/suspend.h b/arch/hexagon/include/asm/suspend.h index 089dd8268791..18b44b557fbc 100644 --- a/arch/hexagon/include/asm/suspend.h +++ b/arch/hexagon/include/asm/suspend.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/switch_to.h b/arch/hexagon/include/asm/switch_to.h index 28ca0dfb6064..96745e7b3e3c 100644 --- a/arch/hexagon/include/asm/switch_to.h +++ b/arch/hexagon/include/asm/switch_to.h @@ -1,7 +1,7 @@ /* * Task switching definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/syscall.h b/arch/hexagon/include/asm/syscall.h index 3e7d61d38d97..fb0e9d48faa6 100644 --- a/arch/hexagon/include/asm/syscall.h +++ b/arch/hexagon/include/asm/syscall.h @@ -1,7 +1,7 @@ /* * Syscall support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/thread_info.h b/arch/hexagon/include/asm/thread_info.h index e4a0aad69cbb..f7c32406a711 100644 --- a/arch/hexagon/include/asm/thread_info.h +++ b/arch/hexagon/include/asm/thread_info.h @@ -1,7 +1,7 @@ /* * Thread support for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/time.h b/arch/hexagon/include/asm/time.h index 081b82cac9a9..deda170c03b8 100644 --- a/arch/hexagon/include/asm/time.h +++ b/arch/hexagon/include/asm/time.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/timer-regs.h b/arch/hexagon/include/asm/timer-regs.h index d80db239a7b6..79912b8c1e5b 100644 --- a/arch/hexagon/include/asm/timer-regs.h +++ b/arch/hexagon/include/asm/timer-regs.h @@ -1,7 +1,7 @@ /* * Timer support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/timex.h b/arch/hexagon/include/asm/timex.h index b11c62b23f31..f63fe132f072 100644 --- a/arch/hexagon/include/asm/timex.h +++ b/arch/hexagon/include/asm/timex.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/tlb.h b/arch/hexagon/include/asm/tlb.h index 473abde01d62..2f00772cc08a 100644 --- a/arch/hexagon/include/asm/tlb.h +++ b/arch/hexagon/include/asm/tlb.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/tlbflush.h b/arch/hexagon/include/asm/tlbflush.h index b89a90251225..62d95a9705c4 100644 --- a/arch/hexagon/include/asm/tlbflush.h +++ b/arch/hexagon/include/asm/tlbflush.h @@ -1,7 +1,7 @@ /* * TLB flush support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/traps.h b/arch/hexagon/include/asm/traps.h index 6a407f6e5e24..ec11285012cf 100644 --- a/arch/hexagon/include/asm/traps.h +++ b/arch/hexagon/include/asm/traps.h @@ -1,7 +1,7 @@ /* * Trap support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/uaccess.h b/arch/hexagon/include/asm/uaccess.h index 7e706eadbf0a..e4127e4d6a5b 100644 --- a/arch/hexagon/include/asm/uaccess.h +++ b/arch/hexagon/include/asm/uaccess.h @@ -1,7 +1,7 @@ /* * User memory access support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/vdso.h b/arch/hexagon/include/asm/vdso.h index 2d95cbba3572..ed08e6c6886d 100644 --- a/arch/hexagon/include/asm/vdso.h +++ b/arch/hexagon/include/asm/vdso.h @@ -1,7 +1,7 @@ /* * vDSO implementation for Hexagon * - * Copyright (c) 2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/vm_fault.h b/arch/hexagon/include/asm/vm_fault.h index cacda36ef5d5..9b0e9c50ceda 100644 --- a/arch/hexagon/include/asm/vm_fault.h +++ b/arch/hexagon/include/asm/vm_fault.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/vm_mmu.h b/arch/hexagon/include/asm/vm_mmu.h index 580462de5cca..9a94de7969bb 100644 --- a/arch/hexagon/include/asm/vm_mmu.h +++ b/arch/hexagon/include/asm/vm_mmu.h @@ -1,7 +1,7 @@ /* * Hexagon VM page table entry definitions * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/uapi/asm/Kbuild b/arch/hexagon/include/uapi/asm/Kbuild index baebb3da1d44..c31706c38631 100644 --- a/arch/hexagon/include/uapi/asm/Kbuild +++ b/arch/hexagon/include/uapi/asm/Kbuild @@ -1,3 +1,15 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +header-y += bitsperlong.h +header-y += byteorder.h +header-y += kvm_para.h +header-y += param.h +header-y += ptrace.h +header-y += registers.h +header-y += setup.h +header-y += sigcontext.h +header-y += signal.h +header-y += swab.h +header-y += unistd.h +header-y += user.h diff --git a/arch/hexagon/include/asm/bitsperlong.h b/arch/hexagon/include/uapi/asm/bitsperlong.h index 2701cae3426e..4a658151383d 100644 --- a/arch/hexagon/include/asm/bitsperlong.h +++ b/arch/hexagon/include/uapi/asm/bitsperlong.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/byteorder.h b/arch/hexagon/include/uapi/asm/byteorder.h index 0e19b9fe4ca6..e31f3f7d9a45 100644 --- a/arch/hexagon/include/asm/byteorder.h +++ b/arch/hexagon/include/uapi/asm/byteorder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/kvm_para.h b/arch/hexagon/include/uapi/asm/kvm_para.h index 14fab8f0b957..14fab8f0b957 100644 --- a/arch/hexagon/include/asm/kvm_para.h +++ b/arch/hexagon/include/uapi/asm/kvm_para.h diff --git a/arch/hexagon/include/asm/param.h b/arch/hexagon/include/uapi/asm/param.h index 285344bbd036..5cec8c0417fb 100644 --- a/arch/hexagon/include/asm/param.h +++ b/arch/hexagon/include/uapi/asm/param.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/ptrace.h b/arch/hexagon/include/uapi/asm/ptrace.h index 3d2f607cd63c..8ef784047a74 100644 --- a/arch/hexagon/include/asm/ptrace.h +++ b/arch/hexagon/include/uapi/asm/ptrace.h @@ -1,7 +1,7 @@ /* * Ptrace definitions for the Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/registers.h b/arch/hexagon/include/uapi/asm/registers.h index 4dd741be855d..c20406f63b5c 100644 --- a/arch/hexagon/include/asm/registers.h +++ b/arch/hexagon/include/uapi/asm/registers.h @@ -1,23 +1,8 @@ /* * Register definitions for the Hexagon architecture - * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. */ + #ifndef _ASM_REGISTERS_H #define _ASM_REGISTERS_H diff --git a/arch/hexagon/include/asm/setup.h b/arch/hexagon/include/uapi/asm/setup.h index 3b754c50bc0a..e48285e4af96 100644 --- a/arch/hexagon/include/asm/setup.h +++ b/arch/hexagon/include/uapi/asm/setup.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/sigcontext.h b/arch/hexagon/include/uapi/asm/sigcontext.h index ce6dcd995220..b6ba5369ccc6 100644 --- a/arch/hexagon/include/asm/sigcontext.h +++ b/arch/hexagon/include/uapi/asm/sigcontext.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/signal.h b/arch/hexagon/include/uapi/asm/signal.h index 471c0562e17b..939556817d34 100644 --- a/arch/hexagon/include/asm/signal.h +++ b/arch/hexagon/include/uapi/asm/signal.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/swab.h b/arch/hexagon/include/uapi/asm/swab.h index 99cf0be3fb83..9069e9247a2e 100644 --- a/arch/hexagon/include/asm/swab.h +++ b/arch/hexagon/include/uapi/asm/swab.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/unistd.h b/arch/hexagon/include/uapi/asm/unistd.h index c0d5565030ae..81312d6a52e6 100644 --- a/arch/hexagon/include/asm/unistd.h +++ b/arch/hexagon/include/uapi/asm/unistd.h @@ -1,7 +1,7 @@ /* * Syscall support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/include/asm/user.h b/arch/hexagon/include/uapi/asm/user.h index 3a55078543d1..cef13ee1413f 100644 --- a/arch/hexagon/include/asm/user.h +++ b/arch/hexagon/include/uapi/asm/user.h @@ -1,21 +1,3 @@ -/* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - #ifndef HEXAGON_ASM_USER_H #define HEXAGON_ASM_USER_H diff --git a/arch/hexagon/kernel/asm-offsets.c b/arch/hexagon/kernel/asm-offsets.c index 89ffa514611f..2d5e84d3b00d 100644 --- a/arch/hexagon/kernel/asm-offsets.c +++ b/arch/hexagon/kernel/asm-offsets.c @@ -5,7 +5,7 @@ * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000 MIPS Technologies, Inc. * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/dma.c b/arch/hexagon/kernel/dma.c index 2b48751aa5f7..65c7bdcf565e 100644 --- a/arch/hexagon/kernel/dma.c +++ b/arch/hexagon/kernel/dma.c @@ -1,7 +1,7 @@ /* * DMA implementation for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/head.S b/arch/hexagon/kernel/head.S index 8e6b819125a3..d859402c73ba 100644 --- a/arch/hexagon/kernel/head.S +++ b/arch/hexagon/kernel/head.S @@ -1,7 +1,7 @@ /* * Early kernel startup code for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify diff --git a/arch/hexagon/kernel/hexagon_ksyms.c b/arch/hexagon/kernel/hexagon_ksyms.c index 7f1892471805..32b1379d6877 100644 --- a/arch/hexagon/kernel/hexagon_ksyms.c +++ b/arch/hexagon/kernel/hexagon_ksyms.c @@ -1,7 +1,7 @@ /* * Export of symbols defined in assembly files and/or libgcc. * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/irq_cpu.c b/arch/hexagon/kernel/irq_cpu.c index d4416a1a431e..85883e1fdc12 100644 --- a/arch/hexagon/kernel/irq_cpu.c +++ b/arch/hexagon/kernel/irq_cpu.c @@ -1,7 +1,7 @@ /* * First-level interrupt controller model for Hexagon. * - * Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/kgdb.c b/arch/hexagon/kernel/kgdb.c index fe4aa1bcca50..344645370646 100644 --- a/arch/hexagon/kernel/kgdb.c +++ b/arch/hexagon/kernel/kgdb.c @@ -1,7 +1,7 @@ /* * arch/hexagon/kernel/kgdb.c - Hexagon KGDB Support * - * Copyright (c) 2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/module.c b/arch/hexagon/kernel/module.c index 61a76bae3668..477d07a5646c 100644 --- a/arch/hexagon/kernel/module.c +++ b/arch/hexagon/kernel/module.c @@ -1,7 +1,7 @@ /* * Kernel module loader for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/process.c b/arch/hexagon/kernel/process.c index af51de63b835..9f6d7411b574 100644 --- a/arch/hexagon/kernel/process.c +++ b/arch/hexagon/kernel/process.c @@ -1,7 +1,7 @@ /* * Process creation support for Hexagon * - * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/ptrace.c b/arch/hexagon/kernel/ptrace.c index 96c3b2c4dbad..670b1b0bee63 100644 --- a/arch/hexagon/kernel/ptrace.c +++ b/arch/hexagon/kernel/ptrace.c @@ -1,7 +1,7 @@ /* * Ptrace support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/reset.c b/arch/hexagon/kernel/reset.c index 4d72fc58e9b1..6aeabc962b3b 100644 --- a/arch/hexagon/kernel/reset.c +++ b/arch/hexagon/kernel/reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/setup.c b/arch/hexagon/kernel/setup.c index 1202f78d25cb..94a387835008 100644 --- a/arch/hexagon/kernel/setup.c +++ b/arch/hexagon/kernel/setup.c @@ -1,7 +1,7 @@ /* * Arch related setup for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/signal.c b/arch/hexagon/kernel/signal.c index 1ea16bec7b91..5047b8b879c0 100644 --- a/arch/hexagon/kernel/signal.c +++ b/arch/hexagon/kernel/signal.c @@ -1,7 +1,7 @@ /* * Signal support for Hexagon processor * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c index 149fbefc1a4d..8e095dffd070 100644 --- a/arch/hexagon/kernel/smp.c +++ b/arch/hexagon/kernel/smp.c @@ -1,7 +1,7 @@ /* * SMP support for Hexagon * - * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/stacktrace.c b/arch/hexagon/kernel/stacktrace.c index 11c597b2ac59..f94918b449a8 100644 --- a/arch/hexagon/kernel/stacktrace.c +++ b/arch/hexagon/kernel/stacktrace.c @@ -1,7 +1,7 @@ /* * Stacktrace support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/syscall.c b/arch/hexagon/kernel/syscall.c index 25a9bfe3445d..319fa6494f58 100644 --- a/arch/hexagon/kernel/syscall.c +++ b/arch/hexagon/kernel/syscall.c @@ -1,7 +1,7 @@ /* * Hexagon system calls * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/syscalltab.c b/arch/hexagon/kernel/syscalltab.c index c550f4177ab8..7024b1ddc08a 100644 --- a/arch/hexagon/kernel/syscalltab.c +++ b/arch/hexagon/kernel/syscalltab.c @@ -1,7 +1,7 @@ /* * System call table for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/time.c b/arch/hexagon/kernel/time.c index 36ba64185711..9903fad997f3 100644 --- a/arch/hexagon/kernel/time.c +++ b/arch/hexagon/kernel/time.c @@ -1,7 +1,7 @@ /* * Time related functions for Hexagon architecture * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/topology.c b/arch/hexagon/kernel/topology.c index ba4475184432..352f27e809fd 100644 --- a/arch/hexagon/kernel/topology.c +++ b/arch/hexagon/kernel/topology.c @@ -1,7 +1,7 @@ /* * CPU topology for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/trampoline.S b/arch/hexagon/kernel/trampoline.S index 06c36c036b98..18110a9056b0 100644 --- a/arch/hexagon/kernel/trampoline.S +++ b/arch/hexagon/kernel/trampoline.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/traps.c b/arch/hexagon/kernel/traps.c index f08857d0715b..a41eeb8eeaa1 100644 --- a/arch/hexagon/kernel/traps.c +++ b/arch/hexagon/kernel/traps.c @@ -1,7 +1,7 @@ /* * Kernel traps/events for Hexagon processor * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vdso.c b/arch/hexagon/kernel/vdso.c index 5d39f42f7085..0bf5a87e4d0a 100644 --- a/arch/hexagon/kernel/vdso.c +++ b/arch/hexagon/kernel/vdso.c @@ -1,7 +1,7 @@ /* * vDSO implementation for Hexagon * - * Copyright (c) 2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vm_entry.S b/arch/hexagon/kernel/vm_entry.S index 5b99066cbc8d..cd71673ac259 100644 --- a/arch/hexagon/kernel/vm_entry.S +++ b/arch/hexagon/kernel/vm_entry.S @@ -1,7 +1,7 @@ /* * Event entry/exit for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vm_events.c b/arch/hexagon/kernel/vm_events.c index 591fc1b68635..9b5a4a295a68 100644 --- a/arch/hexagon/kernel/vm_events.c +++ b/arch/hexagon/kernel/vm_events.c @@ -1,7 +1,7 @@ /* * Mostly IRQ support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vm_init_segtable.S b/arch/hexagon/kernel/vm_init_segtable.S index aebb35b6465e..80967f2192b3 100644 --- a/arch/hexagon/kernel/vm_init_segtable.S +++ b/arch/hexagon/kernel/vm_init_segtable.S @@ -1,7 +1,7 @@ /* * Initial page table for Linux kernel under Hexagon VM, * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vm_ops.S b/arch/hexagon/kernel/vm_ops.S index 24d7fcac4ff2..9fb77b3f6cf2 100644 --- a/arch/hexagon/kernel/vm_ops.S +++ b/arch/hexagon/kernel/vm_ops.S @@ -1,7 +1,7 @@ /* * Hexagon VM instruction support * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vm_switch.S b/arch/hexagon/kernel/vm_switch.S index 0decf2f58e32..62c6df91b3bb 100644 --- a/arch/hexagon/kernel/vm_switch.S +++ b/arch/hexagon/kernel/vm_switch.S @@ -1,7 +1,7 @@ /* * Context switch support for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vm_vectors.S b/arch/hexagon/kernel/vm_vectors.S index 97a4b50b00df..620f42cc582a 100644 --- a/arch/hexagon/kernel/vm_vectors.S +++ b/arch/hexagon/kernel/vm_vectors.S @@ -1,7 +1,7 @@ /* * Event jump tables * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/kernel/vmlinux.lds.S b/arch/hexagon/kernel/vmlinux.lds.S index 071d3c30edfb..14e793f6abbf 100644 --- a/arch/hexagon/kernel/vmlinux.lds.S +++ b/arch/hexagon/kernel/vmlinux.lds.S @@ -1,7 +1,7 @@ /* * Linker script for Hexagon kernel * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/lib/checksum.c b/arch/hexagon/lib/checksum.c index 93005522d52b..8169f78a46a7 100644 --- a/arch/hexagon/lib/checksum.c +++ b/arch/hexagon/lib/checksum.c @@ -1,7 +1,7 @@ /* * Checksum functions for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/lib/io.c b/arch/hexagon/lib/io.c index 8ae47ba0e705..885c9626d5e0 100644 --- a/arch/hexagon/lib/io.c +++ b/arch/hexagon/lib/io.c @@ -1,7 +1,7 @@ /* * I/O access functions for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/lib/memcpy.S b/arch/hexagon/lib/memcpy.S index 2101c3395665..81c561c4b4d6 100644 --- a/arch/hexagon/lib/memcpy.S +++ b/arch/hexagon/lib/memcpy.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * * This program is free software; you can redistribute it and/or modify diff --git a/arch/hexagon/lib/memset.S b/arch/hexagon/lib/memset.S index 26d961439ab0..9341889ea3f6 100644 --- a/arch/hexagon/lib/memset.S +++ b/arch/hexagon/lib/memset.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 Code Aurora Forum. All rights reserved. + * Copyright (c) 2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/cache.c b/arch/hexagon/mm/cache.c index c5cf6ee27587..fe14ccf28561 100644 --- a/arch/hexagon/mm/cache.c +++ b/arch/hexagon/mm/cache.c @@ -1,7 +1,7 @@ /* * Cache management functions for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/copy_from_user.S b/arch/hexagon/mm/copy_from_user.S index 8eb1d4d61a3d..7fc94f3e6642 100644 --- a/arch/hexagon/mm/copy_from_user.S +++ b/arch/hexagon/mm/copy_from_user.S @@ -1,7 +1,7 @@ /* * User memory copy functions for kernel * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/copy_to_user.S b/arch/hexagon/mm/copy_to_user.S index cb9740ed9e7d..0cfbcc09d1d9 100644 --- a/arch/hexagon/mm/copy_to_user.S +++ b/arch/hexagon/mm/copy_to_user.S @@ -1,7 +1,7 @@ /* * User memory copying routines for the Hexagon Kernel * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/copy_user_template.S b/arch/hexagon/mm/copy_user_template.S index 08d7d7b23daa..254d8cc766bb 100644 --- a/arch/hexagon/mm/copy_user_template.S +++ b/arch/hexagon/mm/copy_user_template.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/init.c b/arch/hexagon/mm/init.c index b57d741750b2..69ffcfd28794 100644 --- a/arch/hexagon/mm/init.c +++ b/arch/hexagon/mm/init.c @@ -1,7 +1,7 @@ /* * Memory subsystem initialization for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/ioremap.c b/arch/hexagon/mm/ioremap.c index 3a37bc3b0116..5905fd5f97f6 100644 --- a/arch/hexagon/mm/ioremap.c +++ b/arch/hexagon/mm/ioremap.c @@ -1,7 +1,7 @@ /* * I/O remap functions for Hexagon * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/pgalloc.c b/arch/hexagon/mm/pgalloc.c index b175e2d42b89..19760a4611d9 100644 --- a/arch/hexagon/mm/pgalloc.c +++ b/arch/hexagon/mm/pgalloc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/strnlen_user.S b/arch/hexagon/mm/strnlen_user.S index 5c6a16c7c72a..0eecb7a768fe 100644 --- a/arch/hexagon/mm/strnlen_user.S +++ b/arch/hexagon/mm/strnlen_user.S @@ -1,7 +1,7 @@ /* * User string length functions for kernel * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/uaccess.c b/arch/hexagon/mm/uaccess.c index e748108b47a7..34127261c2b7 100644 --- a/arch/hexagon/mm/uaccess.c +++ b/arch/hexagon/mm/uaccess.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/vm_fault.c b/arch/hexagon/mm/vm_fault.c index 513b74cb397e..308ef0ce648b 100644 --- a/arch/hexagon/mm/vm_fault.c +++ b/arch/hexagon/mm/vm_fault.c @@ -1,7 +1,7 @@ /* * Memory fault handling for Hexagon * - * Copyright (c) 2010-2011 Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/hexagon/mm/vm_tlb.c b/arch/hexagon/mm/vm_tlb.c index c6ff41575461..9647d00cb761 100644 --- a/arch/hexagon/mm/vm_tlb.c +++ b/arch/hexagon/mm/vm_tlb.c @@ -1,7 +1,7 @@ /* * Hexagon Virtual Machine TLB functions * - * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. + * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild index 4a159da23633..dd02f09b6eda 100644 --- a/arch/ia64/include/asm/Kbuild +++ b/arch/ia64/include/asm/Kbuild @@ -1,3 +1,4 @@ generic-y += clkdev.h generic-y += exec.h +generic-y += kvm_para.h diff --git a/arch/ia64/include/asm/kvm_para.h b/arch/ia64/include/asm/kvm_para.h deleted file mode 100644 index 47c00f910434..000000000000 --- a/arch/ia64/include/asm/kvm_para.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ -#ifndef __IA64_KVM_PARA_H -#define __IA64_KVM_PARA_H - -#include <uapi/asm/kvm_para.h> - - -static inline unsigned int kvm_arch_para_features(void) -{ - return 0; -} - -static inline bool kvm_check_and_clear_guest_paused(void) -{ - return false; -} - -#endif diff --git a/arch/ia64/include/uapi/asm/Kbuild b/arch/ia64/include/uapi/asm/Kbuild index 30cafac93703..1b3f5eb5fcdb 100644 --- a/arch/ia64/include/uapi/asm/Kbuild +++ b/arch/ia64/include/uapi/asm/Kbuild @@ -1,6 +1,8 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +generic-y += kvm_para.h + header-y += auxvec.h header-y += bitsperlong.h header-y += break.h diff --git a/arch/ia64/include/uapi/asm/kvm_para.h b/arch/ia64/include/uapi/asm/kvm_para.h deleted file mode 100644 index e69de29bb2d1..000000000000 --- a/arch/ia64/include/uapi/asm/kvm_para.h +++ /dev/null diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild index ecb540810ab3..88fa3ac86fae 100644 --- a/arch/m68k/include/asm/Kbuild +++ b/arch/m68k/include/asm/Kbuild @@ -1,5 +1,3 @@ -include include/asm-generic/Kbuild.asm -header-y += cachectl.h generic-y += bitsperlong.h generic-y += clkdev.h diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h index 5e08b597f012..0f717045bdde 100644 --- a/arch/m68k/include/asm/ptrace.h +++ b/arch/m68k/include/asm/ptrace.h @@ -1,82 +1,10 @@ #ifndef _M68K_PTRACE_H #define _M68K_PTRACE_H -#define PT_D1 0 -#define PT_D2 1 -#define PT_D3 2 -#define PT_D4 3 -#define PT_D5 4 -#define PT_D6 5 -#define PT_D7 6 -#define PT_A0 7 -#define PT_A1 8 -#define PT_A2 9 -#define PT_A3 10 -#define PT_A4 11 -#define PT_A5 12 -#define PT_A6 13 -#define PT_D0 14 -#define PT_USP 15 -#define PT_ORIG_D0 16 -#define PT_SR 17 -#define PT_PC 18 +#include <uapi/asm/ptrace.h> #ifndef __ASSEMBLY__ -/* this struct defines the way the registers are stored on the - stack during a system call. */ - -struct pt_regs { - long d1; - long d2; - long d3; - long d4; - long d5; - long a0; - long a1; - long a2; - long d0; - long orig_d0; - long stkadj; -#ifdef CONFIG_COLDFIRE - unsigned format : 4; /* frame format specifier */ - unsigned vector : 12; /* vector offset */ - unsigned short sr; - unsigned long pc; -#else - unsigned short sr; - unsigned long pc; - unsigned format : 4; /* frame format specifier */ - unsigned vector : 12; /* vector offset */ -#endif -}; - -/* - * This is the extended stack used by signal handlers and the context - * switcher: it's pushed after the normal "struct pt_regs". - */ -struct switch_stack { - unsigned long d6; - unsigned long d7; - unsigned long a3; - unsigned long a4; - unsigned long a5; - unsigned long a6; - unsigned long retpc; -}; - -/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 - -#define PTRACE_GET_THREAD_AREA 25 - -#define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */ - -#ifdef __KERNEL__ - #ifndef PS_S #define PS_S (0x2000) #define PS_M (0x1000) @@ -94,6 +22,5 @@ struct switch_stack { #define arch_has_block_step() (1) #endif -#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ #endif /* _M68K_PTRACE_H */ diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h index 00c2c5397d37..65e78a2dad64 100644 --- a/arch/m68k/include/asm/setup.h +++ b/arch/m68k/include/asm/setup.h @@ -19,33 +19,12 @@ ** Redesign of the boot information structure; moved boot information ** structure to bootinfo.h */ - #ifndef _M68K_SETUP_H #define _M68K_SETUP_H +#include <uapi/asm/setup.h> - /* - * Linux/m68k Architectures - */ - -#define MACH_AMIGA 1 -#define MACH_ATARI 2 -#define MACH_MAC 3 -#define MACH_APOLLO 4 -#define MACH_SUN3 5 -#define MACH_MVME147 6 -#define MACH_MVME16x 7 -#define MACH_BVME6000 8 -#define MACH_HP300 9 -#define MACH_Q40 10 -#define MACH_SUN3X 11 -#define MACH_M54XX 12 - -#define COMMAND_LINE_SIZE 256 - -#ifdef __KERNEL__ - #define CL_SIZE COMMAND_LINE_SIZE #ifndef __ASSEMBLY__ @@ -194,63 +173,6 @@ extern unsigned long m68k_machtype; # define MACH_TYPE (m68k_machtype) #endif -#endif /* __KERNEL__ */ - - - /* - * CPU, FPU and MMU types - * - * Note: we may rely on the following equalities: - * - * CPU_68020 == MMU_68851 - * CPU_68030 == MMU_68030 - * CPU_68040 == FPU_68040 == MMU_68040 - * CPU_68060 == FPU_68060 == MMU_68060 - */ - -#define CPUB_68020 0 -#define CPUB_68030 1 -#define CPUB_68040 2 -#define CPUB_68060 3 -#define CPUB_COLDFIRE 4 - -#define CPU_68020 (1<<CPUB_68020) -#define CPU_68030 (1<<CPUB_68030) -#define CPU_68040 (1<<CPUB_68040) -#define CPU_68060 (1<<CPUB_68060) -#define CPU_COLDFIRE (1<<CPUB_COLDFIRE) - -#define FPUB_68881 0 -#define FPUB_68882 1 -#define FPUB_68040 2 /* Internal FPU */ -#define FPUB_68060 3 /* Internal FPU */ -#define FPUB_SUNFPA 4 /* Sun-3 FPA */ -#define FPUB_COLDFIRE 5 /* ColdFire FPU */ - -#define FPU_68881 (1<<FPUB_68881) -#define FPU_68882 (1<<FPUB_68882) -#define FPU_68040 (1<<FPUB_68040) -#define FPU_68060 (1<<FPUB_68060) -#define FPU_SUNFPA (1<<FPUB_SUNFPA) -#define FPU_COLDFIRE (1<<FPUB_COLDFIRE) - -#define MMUB_68851 0 -#define MMUB_68030 1 /* Internal MMU */ -#define MMUB_68040 2 /* Internal MMU */ -#define MMUB_68060 3 /* Internal MMU */ -#define MMUB_APOLLO 4 /* Custom Apollo */ -#define MMUB_SUN3 5 /* Custom Sun-3 */ -#define MMUB_COLDFIRE 6 /* Internal MMU */ - -#define MMU_68851 (1<<MMUB_68851) -#define MMU_68030 (1<<MMUB_68030) -#define MMU_68040 (1<<MMUB_68040) -#define MMU_68060 (1<<MMUB_68060) -#define MMU_SUN3 (1<<MMUB_SUN3) -#define MMU_APOLLO (1<<MMUB_APOLLO) -#define MMU_COLDFIRE (1<<MMUB_COLDFIRE) - -#ifdef __KERNEL__ #ifndef __ASSEMBLY__ extern unsigned long m68k_cputype; @@ -385,6 +307,4 @@ extern int m68k_realnum_memory; /* real # of memory blocks found */ extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */ #endif -#endif /* __KERNEL__ */ - #endif /* _M68K_SETUP_H */ diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h index 60e88660169c..67e489d8d1bd 100644 --- a/arch/m68k/include/asm/signal.h +++ b/arch/m68k/include/asm/signal.h @@ -1,12 +1,8 @@ #ifndef _M68K_SIGNAL_H #define _M68K_SIGNAL_H -#include <linux/types.h> +#include <uapi/asm/signal.h> -/* Avoid too many header ordering problems. */ -struct siginfo; - -#ifdef __KERNEL__ /* Most things should be clean enough to redefine this at will, if care is taken to make libc match. */ @@ -20,92 +16,6 @@ typedef struct { unsigned long sig[_NSIG_WORDS]; } sigset_t; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include <asm-generic/signal-defs.h> - -#ifdef __KERNEL__ struct old_sigaction { __sighandler_t sa_handler; old_sigset_t sa_mask; @@ -123,31 +33,6 @@ struct sigaction { struct k_sigaction { struct sigaction sa; }; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ #include <asm/sigcontext.h> #ifndef CONFIG_CPU_HAS_NO_BITFIELDS @@ -208,5 +93,4 @@ struct pt_regs; extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie); #endif /* __uClinux__ */ -#endif /* __KERNEL__ */ #endif /* _M68K_SIGNAL_H */ diff --git a/arch/m68k/include/asm/termios.h b/arch/m68k/include/asm/termios.h index 0823032e4045..ad8efb098663 100644 --- a/arch/m68k/include/asm/termios.h +++ b/arch/m68k/include/asm/termios.h @@ -1,27 +1,8 @@ #ifndef _M68K_TERMIOS_H #define _M68K_TERMIOS_H -#include <asm/termbits.h> -#include <asm/ioctls.h> +#include <uapi/asm/termios.h> -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -#ifdef __KERNEL__ /* intr=^C quit=^| erase=del kill=^U eof=^D vtime=\0 vmin=\1 sxtc=\0 start=^Q stop=^S susp=^Z eol=\0 @@ -29,27 +10,6 @@ struct termio { eol2=\0 */ #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" -#endif - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ /* * Translate a "termio" structure into a "termios". Ugh. @@ -87,6 +47,4 @@ struct termio { #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) -#endif /* __KERNEL__ */ - #endif /* _M68K_TERMIOS_H */ diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h index c702ad716791..5fc7f7bec1c8 100644 --- a/arch/m68k/include/asm/unistd.h +++ b/arch/m68k/include/asm/unistd.h @@ -1,361 +1,10 @@ #ifndef _ASM_M68K_UNISTD_H_ #define _ASM_M68K_UNISTD_H_ -/* - * This file contains the system call numbers. - */ - -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_waitpid 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_chown 16 -/*#define __NR_break 17*/ -#define __NR_oldstat 18 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_oldfstat 28 -#define __NR_pause 29 -#define __NR_utime 30 -/*#define __NR_stty 31*/ -/*#define __NR_gtty 32*/ -#define __NR_access 33 -#define __NR_nice 34 -/*#define __NR_ftime 35*/ -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -/*#define __NR_prof 44*/ -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_umount2 52 -/*#define __NR_lock 53*/ -#define __NR_ioctl 54 -#define __NR_fcntl 55 -/*#define __NR_mpx 56*/ -#define __NR_setpgid 57 -/*#define __NR_ulimit 58*/ -/*#define __NR_oldolduname 59*/ -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sgetmask 68 -#define __NR_ssetmask 69 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_oldlstat 84 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -/*#define __NR_profil 98*/ -#define __NR_statfs 99 -#define __NR_fstatfs 100 -/*#define __NR_ioperm 101*/ -#define __NR_socketcall 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -/*#define __NR_olduname 109*/ -/*#define __NR_iopl 110*/ /* not supported */ -#define __NR_vhangup 111 -/*#define __NR_idle 112*/ /* Obsolete */ -/*#define __NR_vm86 113*/ /* not supported */ -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_cacheflush 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -/*#define __NR_afs_syscall 137*/ /* Syscall for Andrew File System */ -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_getpagesize 166 -#define __NR_query_module 167 -#define __NR_poll 168 -#define __NR_nfsservctl 169 -#define __NR_setresgid 170 -#define __NR_getresgid 171 -#define __NR_prctl 172 -#define __NR_rt_sigreturn 173 -#define __NR_rt_sigaction 174 -#define __NR_rt_sigprocmask 175 -#define __NR_rt_sigpending 176 -#define __NR_rt_sigtimedwait 177 -#define __NR_rt_sigqueueinfo 178 -#define __NR_rt_sigsuspend 179 -#define __NR_pread64 180 -#define __NR_pwrite64 181 -#define __NR_lchown 182 -#define __NR_getcwd 183 -#define __NR_capget 184 -#define __NR_capset 185 -#define __NR_sigaltstack 186 -#define __NR_sendfile 187 -#define __NR_getpmsg 188 /* some people actually want streams */ -#define __NR_putpmsg 189 /* some people actually want streams */ -#define __NR_vfork 190 -#define __NR_ugetrlimit 191 -#define __NR_mmap2 192 -#define __NR_truncate64 193 -#define __NR_ftruncate64 194 -#define __NR_stat64 195 -#define __NR_lstat64 196 -#define __NR_fstat64 197 -#define __NR_chown32 198 -#define __NR_getuid32 199 -#define __NR_getgid32 200 -#define __NR_geteuid32 201 -#define __NR_getegid32 202 -#define __NR_setreuid32 203 -#define __NR_setregid32 204 -#define __NR_getgroups32 205 -#define __NR_setgroups32 206 -#define __NR_fchown32 207 -#define __NR_setresuid32 208 -#define __NR_getresuid32 209 -#define __NR_setresgid32 210 -#define __NR_getresgid32 211 -#define __NR_lchown32 212 -#define __NR_setuid32 213 -#define __NR_setgid32 214 -#define __NR_setfsuid32 215 -#define __NR_setfsgid32 216 -#define __NR_pivot_root 217 -/* 218*/ -/* 219*/ -#define __NR_getdents64 220 -#define __NR_gettid 221 -#define __NR_tkill 222 -#define __NR_setxattr 223 -#define __NR_lsetxattr 224 -#define __NR_fsetxattr 225 -#define __NR_getxattr 226 -#define __NR_lgetxattr 227 -#define __NR_fgetxattr 228 -#define __NR_listxattr 229 -#define __NR_llistxattr 230 -#define __NR_flistxattr 231 -#define __NR_removexattr 232 -#define __NR_lremovexattr 233 -#define __NR_fremovexattr 234 -#define __NR_futex 235 -#define __NR_sendfile64 236 -#define __NR_mincore 237 -#define __NR_madvise 238 -#define __NR_fcntl64 239 -#define __NR_readahead 240 -#define __NR_io_setup 241 -#define __NR_io_destroy 242 -#define __NR_io_getevents 243 -#define __NR_io_submit 244 -#define __NR_io_cancel 245 -#define __NR_fadvise64 246 -#define __NR_exit_group 247 -#define __NR_lookup_dcookie 248 -#define __NR_epoll_create 249 -#define __NR_epoll_ctl 250 -#define __NR_epoll_wait 251 -#define __NR_remap_file_pages 252 -#define __NR_set_tid_address 253 -#define __NR_timer_create 254 -#define __NR_timer_settime 255 -#define __NR_timer_gettime 256 -#define __NR_timer_getoverrun 257 -#define __NR_timer_delete 258 -#define __NR_clock_settime 259 -#define __NR_clock_gettime 260 -#define __NR_clock_getres 261 -#define __NR_clock_nanosleep 262 -#define __NR_statfs64 263 -#define __NR_fstatfs64 264 -#define __NR_tgkill 265 -#define __NR_utimes 266 -#define __NR_fadvise64_64 267 -#define __NR_mbind 268 -#define __NR_get_mempolicy 269 -#define __NR_set_mempolicy 270 -#define __NR_mq_open 271 -#define __NR_mq_unlink 272 -#define __NR_mq_timedsend 273 -#define __NR_mq_timedreceive 274 -#define __NR_mq_notify 275 -#define __NR_mq_getsetattr 276 -#define __NR_waitid 277 -/*#define __NR_vserver 278*/ -#define __NR_add_key 279 -#define __NR_request_key 280 -#define __NR_keyctl 281 -#define __NR_ioprio_set 282 -#define __NR_ioprio_get 283 -#define __NR_inotify_init 284 -#define __NR_inotify_add_watch 285 -#define __NR_inotify_rm_watch 286 -#define __NR_migrate_pages 287 -#define __NR_openat 288 -#define __NR_mkdirat 289 -#define __NR_mknodat 290 -#define __NR_fchownat 291 -#define __NR_futimesat 292 -#define __NR_fstatat64 293 -#define __NR_unlinkat 294 -#define __NR_renameat 295 -#define __NR_linkat 296 -#define __NR_symlinkat 297 -#define __NR_readlinkat 298 -#define __NR_fchmodat 299 -#define __NR_faccessat 300 -#define __NR_pselect6 301 -#define __NR_ppoll 302 -#define __NR_unshare 303 -#define __NR_set_robust_list 304 -#define __NR_get_robust_list 305 -#define __NR_splice 306 -#define __NR_sync_file_range 307 -#define __NR_tee 308 -#define __NR_vmsplice 309 -#define __NR_move_pages 310 -#define __NR_sched_setaffinity 311 -#define __NR_sched_getaffinity 312 -#define __NR_kexec_load 313 -#define __NR_getcpu 314 -#define __NR_epoll_pwait 315 -#define __NR_utimensat 316 -#define __NR_signalfd 317 -#define __NR_timerfd_create 318 -#define __NR_eventfd 319 -#define __NR_fallocate 320 -#define __NR_timerfd_settime 321 -#define __NR_timerfd_gettime 322 -#define __NR_signalfd4 323 -#define __NR_eventfd2 324 -#define __NR_epoll_create1 325 -#define __NR_dup3 326 -#define __NR_pipe2 327 -#define __NR_inotify_init1 328 -#define __NR_preadv 329 -#define __NR_pwritev 330 -#define __NR_rt_tgsigqueueinfo 331 -#define __NR_perf_event_open 332 -#define __NR_get_thread_area 333 -#define __NR_set_thread_area 334 -#define __NR_atomic_cmpxchg_32 335 -#define __NR_atomic_barrier 336 -#define __NR_fanotify_init 337 -#define __NR_fanotify_mark 338 -#define __NR_prlimit64 339 -#define __NR_name_to_handle_at 340 -#define __NR_open_by_handle_at 341 -#define __NR_clock_adjtime 342 -#define __NR_syncfs 343 -#define __NR_setns 344 -#define __NR_process_vm_readv 345 -#define __NR_process_vm_writev 346 +#include <uapi/asm/unistd.h> -#ifdef __KERNEL__ -#define NR_syscalls 347 +#define NR_syscalls 348 #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -393,5 +42,4 @@ */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif /* __KERNEL__ */ #endif /* _ASM_M68K_UNISTD_H_ */ diff --git a/arch/m68k/include/uapi/asm/Kbuild b/arch/m68k/include/uapi/asm/Kbuild index baebb3da1d44..972bce120e1e 100644 --- a/arch/m68k/include/uapi/asm/Kbuild +++ b/arch/m68k/include/uapi/asm/Kbuild @@ -1,3 +1,26 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +header-y += a.out.h +header-y += auxvec.h +header-y += byteorder.h +header-y += cachectl.h +header-y += fcntl.h +header-y += ioctls.h +header-y += msgbuf.h +header-y += param.h +header-y += poll.h +header-y += posix_types.h +header-y += ptrace.h +header-y += sembuf.h +header-y += setup.h +header-y += shmbuf.h +header-y += sigcontext.h +header-y += signal.h +header-y += socket.h +header-y += sockios.h +header-y += stat.h +header-y += swab.h +header-y += termbits.h +header-y += termios.h +header-y += unistd.h diff --git a/arch/m68k/include/asm/a.out.h b/arch/m68k/include/uapi/asm/a.out.h index 3885fe43432a..3885fe43432a 100644 --- a/arch/m68k/include/asm/a.out.h +++ b/arch/m68k/include/uapi/asm/a.out.h diff --git a/arch/m68k/include/asm/auxvec.h b/arch/m68k/include/uapi/asm/auxvec.h index 844d6d52204b..844d6d52204b 100644 --- a/arch/m68k/include/asm/auxvec.h +++ b/arch/m68k/include/uapi/asm/auxvec.h diff --git a/arch/m68k/include/asm/byteorder.h b/arch/m68k/include/uapi/asm/byteorder.h index 31b260a88803..31b260a88803 100644 --- a/arch/m68k/include/asm/byteorder.h +++ b/arch/m68k/include/uapi/asm/byteorder.h diff --git a/arch/m68k/include/asm/cachectl.h b/arch/m68k/include/uapi/asm/cachectl.h index 525978e959e3..525978e959e3 100644 --- a/arch/m68k/include/asm/cachectl.h +++ b/arch/m68k/include/uapi/asm/cachectl.h diff --git a/arch/m68k/include/asm/fcntl.h b/arch/m68k/include/uapi/asm/fcntl.h index 1c369b20dc45..1c369b20dc45 100644 --- a/arch/m68k/include/asm/fcntl.h +++ b/arch/m68k/include/uapi/asm/fcntl.h diff --git a/arch/m68k/include/asm/ioctls.h b/arch/m68k/include/uapi/asm/ioctls.h index 1332bb4ca5b0..1332bb4ca5b0 100644 --- a/arch/m68k/include/asm/ioctls.h +++ b/arch/m68k/include/uapi/asm/ioctls.h diff --git a/arch/m68k/include/asm/msgbuf.h b/arch/m68k/include/uapi/asm/msgbuf.h index 243cb798de8f..243cb798de8f 100644 --- a/arch/m68k/include/asm/msgbuf.h +++ b/arch/m68k/include/uapi/asm/msgbuf.h diff --git a/arch/m68k/include/asm/param.h b/arch/m68k/include/uapi/asm/param.h index 36265ccf5c7b..36265ccf5c7b 100644 --- a/arch/m68k/include/asm/param.h +++ b/arch/m68k/include/uapi/asm/param.h diff --git a/arch/m68k/include/asm/poll.h b/arch/m68k/include/uapi/asm/poll.h index f080fcdb61bf..f080fcdb61bf 100644 --- a/arch/m68k/include/asm/poll.h +++ b/arch/m68k/include/uapi/asm/poll.h diff --git a/arch/m68k/include/asm/posix_types.h b/arch/m68k/include/uapi/asm/posix_types.h index cf4dbf70fdc7..cf4dbf70fdc7 100644 --- a/arch/m68k/include/asm/posix_types.h +++ b/arch/m68k/include/uapi/asm/posix_types.h diff --git a/arch/m68k/include/uapi/asm/ptrace.h b/arch/m68k/include/uapi/asm/ptrace.h new file mode 100644 index 000000000000..caf92fd34939 --- /dev/null +++ b/arch/m68k/include/uapi/asm/ptrace.h @@ -0,0 +1,79 @@ +#ifndef _UAPI_M68K_PTRACE_H +#define _UAPI_M68K_PTRACE_H + +#define PT_D1 0 +#define PT_D2 1 +#define PT_D3 2 +#define PT_D4 3 +#define PT_D5 4 +#define PT_D6 5 +#define PT_D7 6 +#define PT_A0 7 +#define PT_A1 8 +#define PT_A2 9 +#define PT_A3 10 +#define PT_A4 11 +#define PT_A5 12 +#define PT_A6 13 +#define PT_D0 14 +#define PT_USP 15 +#define PT_ORIG_D0 16 +#define PT_SR 17 +#define PT_PC 18 + +#ifndef __ASSEMBLY__ + +/* this struct defines the way the registers are stored on the + stack during a system call. */ + +struct pt_regs { + long d1; + long d2; + long d3; + long d4; + long d5; + long a0; + long a1; + long a2; + long d0; + long orig_d0; + long stkadj; +#ifdef CONFIG_COLDFIRE + unsigned format : 4; /* frame format specifier */ + unsigned vector : 12; /* vector offset */ + unsigned short sr; + unsigned long pc; +#else + unsigned short sr; + unsigned long pc; + unsigned format : 4; /* frame format specifier */ + unsigned vector : 12; /* vector offset */ +#endif +}; + +/* + * This is the extended stack used by signal handlers and the context + * switcher: it's pushed after the normal "struct pt_regs". + */ +struct switch_stack { + unsigned long d6; + unsigned long d7; + unsigned long a3; + unsigned long a4; + unsigned long a5; + unsigned long a6; + unsigned long retpc; +}; + +/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 + +#define PTRACE_GET_THREAD_AREA 25 + +#define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */ + +#endif /* __ASSEMBLY__ */ +#endif /* _UAPI_M68K_PTRACE_H */ diff --git a/arch/m68k/include/asm/sembuf.h b/arch/m68k/include/uapi/asm/sembuf.h index 2308052a8c24..2308052a8c24 100644 --- a/arch/m68k/include/asm/sembuf.h +++ b/arch/m68k/include/uapi/asm/sembuf.h diff --git a/arch/m68k/include/uapi/asm/setup.h b/arch/m68k/include/uapi/asm/setup.h new file mode 100644 index 000000000000..85579bff455c --- /dev/null +++ b/arch/m68k/include/uapi/asm/setup.h @@ -0,0 +1,103 @@ +/* +** asm/setup.h -- Definition of the Linux/m68k setup information +** +** Copyright 1992 by Greg Harp +** +** This file is subject to the terms and conditions of the GNU General Public +** License. See the file COPYING in the main directory of this archive +** for more details. +** +** Created 09/29/92 by Greg Harp +** +** 5/2/94 Roman Hodek: +** Added bi_atari part of the machine dependent union bi_un; for now it +** contains just a model field to distinguish between TT and Falcon. +** 26/7/96 Roman Zippel: +** Renamed to setup.h; added some useful macros to allow gcc some +** optimizations if possible. +** 5/10/96 Geert Uytterhoeven: +** Redesign of the boot information structure; moved boot information +** structure to bootinfo.h +*/ + +#ifndef _UAPI_M68K_SETUP_H +#define _UAPI_M68K_SETUP_H + + + + /* + * Linux/m68k Architectures + */ + +#define MACH_AMIGA 1 +#define MACH_ATARI 2 +#define MACH_MAC 3 +#define MACH_APOLLO 4 +#define MACH_SUN3 5 +#define MACH_MVME147 6 +#define MACH_MVME16x 7 +#define MACH_BVME6000 8 +#define MACH_HP300 9 +#define MACH_Q40 10 +#define MACH_SUN3X 11 +#define MACH_M54XX 12 + +#define COMMAND_LINE_SIZE 256 + + + + /* + * CPU, FPU and MMU types + * + * Note: we may rely on the following equalities: + * + * CPU_68020 == MMU_68851 + * CPU_68030 == MMU_68030 + * CPU_68040 == FPU_68040 == MMU_68040 + * CPU_68060 == FPU_68060 == MMU_68060 + */ + +#define CPUB_68020 0 +#define CPUB_68030 1 +#define CPUB_68040 2 +#define CPUB_68060 3 +#define CPUB_COLDFIRE 4 + +#define CPU_68020 (1<<CPUB_68020) +#define CPU_68030 (1<<CPUB_68030) +#define CPU_68040 (1<<CPUB_68040) +#define CPU_68060 (1<<CPUB_68060) +#define CPU_COLDFIRE (1<<CPUB_COLDFIRE) + +#define FPUB_68881 0 +#define FPUB_68882 1 +#define FPUB_68040 2 /* Internal FPU */ +#define FPUB_68060 3 /* Internal FPU */ +#define FPUB_SUNFPA 4 /* Sun-3 FPA */ +#define FPUB_COLDFIRE 5 /* ColdFire FPU */ + +#define FPU_68881 (1<<FPUB_68881) +#define FPU_68882 (1<<FPUB_68882) +#define FPU_68040 (1<<FPUB_68040) +#define FPU_68060 (1<<FPUB_68060) +#define FPU_SUNFPA (1<<FPUB_SUNFPA) +#define FPU_COLDFIRE (1<<FPUB_COLDFIRE) + +#define MMUB_68851 0 +#define MMUB_68030 1 /* Internal MMU */ +#define MMUB_68040 2 /* Internal MMU */ +#define MMUB_68060 3 /* Internal MMU */ +#define MMUB_APOLLO 4 /* Custom Apollo */ +#define MMUB_SUN3 5 /* Custom Sun-3 */ +#define MMUB_COLDFIRE 6 /* Internal MMU */ + +#define MMU_68851 (1<<MMUB_68851) +#define MMU_68030 (1<<MMUB_68030) +#define MMU_68040 (1<<MMUB_68040) +#define MMU_68060 (1<<MMUB_68060) +#define MMU_SUN3 (1<<MMUB_SUN3) +#define MMU_APOLLO (1<<MMUB_APOLLO) +#define MMU_COLDFIRE (1<<MMUB_COLDFIRE) + + +#endif /* _UAPI_M68K_SETUP_H */ diff --git a/arch/m68k/include/asm/shmbuf.h b/arch/m68k/include/uapi/asm/shmbuf.h index f8928d62f1b7..f8928d62f1b7 100644 --- a/arch/m68k/include/asm/shmbuf.h +++ b/arch/m68k/include/uapi/asm/shmbuf.h diff --git a/arch/m68k/include/asm/sigcontext.h b/arch/m68k/include/uapi/asm/sigcontext.h index 523db2a51cf3..523db2a51cf3 100644 --- a/arch/m68k/include/asm/sigcontext.h +++ b/arch/m68k/include/uapi/asm/sigcontext.h diff --git a/arch/m68k/include/uapi/asm/signal.h b/arch/m68k/include/uapi/asm/signal.h new file mode 100644 index 000000000000..2b450f311bd9 --- /dev/null +++ b/arch/m68k/include/uapi/asm/signal.h @@ -0,0 +1,118 @@ +#ifndef _UAPI_M68K_SIGNAL_H +#define _UAPI_M68K_SIGNAL_H + +#include <linux/types.h> + +/* Avoid too many header ordering problems. */ +struct siginfo; + +#ifndef __KERNEL__ +/* Here we must cater to libcs that poke about in kernel headers. */ + +#define NSIG 32 +typedef unsigned long sigset_t; + +#endif /* __KERNEL__ */ + +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 +#define SIGBUS 7 +#define SIGFPE 8 +#define SIGKILL 9 +#define SIGUSR1 10 +#define SIGSEGV 11 +#define SIGUSR2 12 +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGSTKFLT 16 +#define SIGCHLD 17 +#define SIGCONT 18 +#define SIGSTOP 19 +#define SIGTSTP 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGURG 23 +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGIO 29 +#define SIGPOLL SIGIO +/* +#define SIGLOST 29 +*/ +#define SIGPWR 30 +#define SIGSYS 31 +#define SIGUNUSED 31 + +/* These should not be considered constants from userland. */ +#define SIGRTMIN 32 +#define SIGRTMAX _NSIG + +/* + * SA_FLAGS values: + * + * SA_ONSTACK indicates that a registered stack_t will be used. + * SA_RESTART flag to get restarting signals (which were the default long ago) + * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. + * SA_RESETHAND clears the handler when the signal is delivered. + * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. + * SA_NODEFER prevents the current signal from being masked in the handler. + * + * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single + * Unix names RESETHAND and NODEFER respectively. + */ +#define SA_NOCLDSTOP 0x00000001 +#define SA_NOCLDWAIT 0x00000002 +#define SA_SIGINFO 0x00000004 +#define SA_ONSTACK 0x08000000 +#define SA_RESTART 0x10000000 +#define SA_NODEFER 0x40000000 +#define SA_RESETHAND 0x80000000 + +#define SA_NOMASK SA_NODEFER +#define SA_ONESHOT SA_RESETHAND + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 2048 +#define SIGSTKSZ 8192 + +#include <asm-generic/signal-defs.h> + +#ifndef __KERNEL__ +/* Here we must cater to libcs that poke about in kernel headers. */ + +struct sigaction { + union { + __sighandler_t _sa_handler; + void (*_sa_sigaction)(int, struct siginfo *, void *); + } _u; + sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); +}; + +#define sa_handler _u._sa_handler +#define sa_sigaction _u._sa_sigaction + +#endif /* __KERNEL__ */ + +typedef struct sigaltstack { + void __user *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#endif /* _UAPI_M68K_SIGNAL_H */ diff --git a/arch/m68k/include/asm/socket.h b/arch/m68k/include/uapi/asm/socket.h index d1be684edf97..d1be684edf97 100644 --- a/arch/m68k/include/asm/socket.h +++ b/arch/m68k/include/uapi/asm/socket.h diff --git a/arch/m68k/include/asm/sockios.h b/arch/m68k/include/uapi/asm/sockios.h index c04a23943cb7..c04a23943cb7 100644 --- a/arch/m68k/include/asm/sockios.h +++ b/arch/m68k/include/uapi/asm/sockios.h diff --git a/arch/m68k/include/asm/stat.h b/arch/m68k/include/uapi/asm/stat.h index dd38bc2e9f98..dd38bc2e9f98 100644 --- a/arch/m68k/include/asm/stat.h +++ b/arch/m68k/include/uapi/asm/stat.h diff --git a/arch/m68k/include/asm/swab.h b/arch/m68k/include/uapi/asm/swab.h index b7b37a40defc..b7b37a40defc 100644 --- a/arch/m68k/include/asm/swab.h +++ b/arch/m68k/include/uapi/asm/swab.h diff --git a/arch/m68k/include/asm/termbits.h b/arch/m68k/include/uapi/asm/termbits.h index aea1e37b765a..aea1e37b765a 100644 --- a/arch/m68k/include/asm/termbits.h +++ b/arch/m68k/include/uapi/asm/termbits.h diff --git a/arch/m68k/include/uapi/asm/termios.h b/arch/m68k/include/uapi/asm/termios.h new file mode 100644 index 000000000000..ce2142c9ac1d --- /dev/null +++ b/arch/m68k/include/uapi/asm/termios.h @@ -0,0 +1,44 @@ +#ifndef _UAPI_M68K_TERMIOS_H +#define _UAPI_M68K_TERMIOS_H + +#include <asm/termbits.h> +#include <asm/ioctls.h> + +struct winsize { + unsigned short ws_row; + unsigned short ws_col; + unsigned short ws_xpixel; + unsigned short ws_ypixel; +}; + +#define NCC 8 +struct termio { + unsigned short c_iflag; /* input mode flags */ + unsigned short c_oflag; /* output mode flags */ + unsigned short c_cflag; /* control mode flags */ + unsigned short c_lflag; /* local mode flags */ + unsigned char c_line; /* line discipline */ + unsigned char c_cc[NCC]; /* control characters */ +}; + + +/* modem lines */ +#define TIOCM_LE 0x001 +#define TIOCM_DTR 0x002 +#define TIOCM_RTS 0x004 +#define TIOCM_ST 0x008 +#define TIOCM_SR 0x010 +#define TIOCM_CTS 0x020 +#define TIOCM_CAR 0x040 +#define TIOCM_RNG 0x080 +#define TIOCM_DSR 0x100 +#define TIOCM_CD TIOCM_CAR +#define TIOCM_RI TIOCM_RNG +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 + +/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ + + +#endif /* _UAPI_M68K_TERMIOS_H */ diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h new file mode 100644 index 000000000000..b94bfbf90705 --- /dev/null +++ b/arch/m68k/include/uapi/asm/unistd.h @@ -0,0 +1,357 @@ +#ifndef _UAPI_ASM_M68K_UNISTD_H_ +#define _UAPI_ASM_M68K_UNISTD_H_ + +/* + * This file contains the system call numbers. + */ + +#define __NR_restart_syscall 0 +#define __NR_exit 1 +#define __NR_fork 2 +#define __NR_read 3 +#define __NR_write 4 +#define __NR_open 5 +#define __NR_close 6 +#define __NR_waitpid 7 +#define __NR_creat 8 +#define __NR_link 9 +#define __NR_unlink 10 +#define __NR_execve 11 +#define __NR_chdir 12 +#define __NR_time 13 +#define __NR_mknod 14 +#define __NR_chmod 15 +#define __NR_chown 16 +/*#define __NR_break 17*/ +#define __NR_oldstat 18 +#define __NR_lseek 19 +#define __NR_getpid 20 +#define __NR_mount 21 +#define __NR_umount 22 +#define __NR_setuid 23 +#define __NR_getuid 24 +#define __NR_stime 25 +#define __NR_ptrace 26 +#define __NR_alarm 27 +#define __NR_oldfstat 28 +#define __NR_pause 29 +#define __NR_utime 30 +/*#define __NR_stty 31*/ +/*#define __NR_gtty 32*/ +#define __NR_access 33 +#define __NR_nice 34 +/*#define __NR_ftime 35*/ +#define __NR_sync 36 +#define __NR_kill 37 +#define __NR_rename 38 +#define __NR_mkdir 39 +#define __NR_rmdir 40 +#define __NR_dup 41 +#define __NR_pipe 42 +#define __NR_times 43 +/*#define __NR_prof 44*/ +#define __NR_brk 45 +#define __NR_setgid 46 +#define __NR_getgid 47 +#define __NR_signal 48 +#define __NR_geteuid 49 +#define __NR_getegid 50 +#define __NR_acct 51 +#define __NR_umount2 52 +/*#define __NR_lock 53*/ +#define __NR_ioctl 54 +#define __NR_fcntl 55 +/*#define __NR_mpx 56*/ +#define __NR_setpgid 57 +/*#define __NR_ulimit 58*/ +/*#define __NR_oldolduname 59*/ +#define __NR_umask 60 +#define __NR_chroot 61 +#define __NR_ustat 62 +#define __NR_dup2 63 +#define __NR_getppid 64 +#define __NR_getpgrp 65 +#define __NR_setsid 66 +#define __NR_sigaction 67 +#define __NR_sgetmask 68 +#define __NR_ssetmask 69 +#define __NR_setreuid 70 +#define __NR_setregid 71 +#define __NR_sigsuspend 72 +#define __NR_sigpending 73 +#define __NR_sethostname 74 +#define __NR_setrlimit 75 +#define __NR_getrlimit 76 +#define __NR_getrusage 77 +#define __NR_gettimeofday 78 +#define __NR_settimeofday 79 +#define __NR_getgroups 80 +#define __NR_setgroups 81 +#define __NR_select 82 +#define __NR_symlink 83 +#define __NR_oldlstat 84 +#define __NR_readlink 85 +#define __NR_uselib 86 +#define __NR_swapon 87 +#define __NR_reboot 88 +#define __NR_readdir 89 +#define __NR_mmap 90 +#define __NR_munmap 91 +#define __NR_truncate 92 +#define __NR_ftruncate 93 +#define __NR_fchmod 94 +#define __NR_fchown 95 +#define __NR_getpriority 96 +#define __NR_setpriority 97 +/*#define __NR_profil 98*/ +#define __NR_statfs 99 +#define __NR_fstatfs 100 +/*#define __NR_ioperm 101*/ +#define __NR_socketcall 102 +#define __NR_syslog 103 +#define __NR_setitimer 104 +#define __NR_getitimer 105 +#define __NR_stat 106 +#define __NR_lstat 107 +#define __NR_fstat 108 +/*#define __NR_olduname 109*/ +/*#define __NR_iopl 110*/ /* not supported */ +#define __NR_vhangup 111 +/*#define __NR_idle 112*/ /* Obsolete */ +/*#define __NR_vm86 113*/ /* not supported */ +#define __NR_wait4 114 +#define __NR_swapoff 115 +#define __NR_sysinfo 116 +#define __NR_ipc 117 +#define __NR_fsync 118 +#define __NR_sigreturn 119 +#define __NR_clone 120 +#define __NR_setdomainname 121 +#define __NR_uname 122 +#define __NR_cacheflush 123 +#define __NR_adjtimex 124 +#define __NR_mprotect 125 +#define __NR_sigprocmask 126 +#define __NR_create_module 127 +#define __NR_init_module 128 +#define __NR_delete_module 129 +#define __NR_get_kernel_syms 130 +#define __NR_quotactl 131 +#define __NR_getpgid 132 +#define __NR_fchdir 133 +#define __NR_bdflush 134 +#define __NR_sysfs 135 +#define __NR_personality 136 +/*#define __NR_afs_syscall 137*/ /* Syscall for Andrew File System */ +#define __NR_setfsuid 138 +#define __NR_setfsgid 139 +#define __NR__llseek 140 +#define __NR_getdents 141 +#define __NR__newselect 142 +#define __NR_flock 143 +#define __NR_msync 144 +#define __NR_readv 145 +#define __NR_writev 146 +#define __NR_getsid 147 +#define __NR_fdatasync 148 +#define __NR__sysctl 149 +#define __NR_mlock 150 +#define __NR_munlock 151 +#define __NR_mlockall 152 +#define __NR_munlockall 153 +#define __NR_sched_setparam 154 +#define __NR_sched_getparam 155 +#define __NR_sched_setscheduler 156 +#define __NR_sched_getscheduler 157 +#define __NR_sched_yield 158 +#define __NR_sched_get_priority_max 159 +#define __NR_sched_get_priority_min 160 +#define __NR_sched_rr_get_interval 161 +#define __NR_nanosleep 162 +#define __NR_mremap 163 +#define __NR_setresuid 164 +#define __NR_getresuid 165 +#define __NR_getpagesize 166 +#define __NR_query_module 167 +#define __NR_poll 168 +#define __NR_nfsservctl 169 +#define __NR_setresgid 170 +#define __NR_getresgid 171 +#define __NR_prctl 172 +#define __NR_rt_sigreturn 173 +#define __NR_rt_sigaction 174 +#define __NR_rt_sigprocmask 175 +#define __NR_rt_sigpending 176 +#define __NR_rt_sigtimedwait 177 +#define __NR_rt_sigqueueinfo 178 +#define __NR_rt_sigsuspend 179 +#define __NR_pread64 180 +#define __NR_pwrite64 181 +#define __NR_lchown 182 +#define __NR_getcwd 183 +#define __NR_capget 184 +#define __NR_capset 185 +#define __NR_sigaltstack 186 +#define __NR_sendfile 187 +#define __NR_getpmsg 188 /* some people actually want streams */ +#define __NR_putpmsg 189 /* some people actually want streams */ +#define __NR_vfork 190 +#define __NR_ugetrlimit 191 +#define __NR_mmap2 192 +#define __NR_truncate64 193 +#define __NR_ftruncate64 194 +#define __NR_stat64 195 +#define __NR_lstat64 196 +#define __NR_fstat64 197 +#define __NR_chown32 198 +#define __NR_getuid32 199 +#define __NR_getgid32 200 +#define __NR_geteuid32 201 +#define __NR_getegid32 202 +#define __NR_setreuid32 203 +#define __NR_setregid32 204 +#define __NR_getgroups32 205 +#define __NR_setgroups32 206 +#define __NR_fchown32 207 +#define __NR_setresuid32 208 +#define __NR_getresuid32 209 +#define __NR_setresgid32 210 +#define __NR_getresgid32 211 +#define __NR_lchown32 212 +#define __NR_setuid32 213 +#define __NR_setgid32 214 +#define __NR_setfsuid32 215 +#define __NR_setfsgid32 216 +#define __NR_pivot_root 217 +/* 218*/ +/* 219*/ +#define __NR_getdents64 220 +#define __NR_gettid 221 +#define __NR_tkill 222 +#define __NR_setxattr 223 +#define __NR_lsetxattr 224 +#define __NR_fsetxattr 225 +#define __NR_getxattr 226 +#define __NR_lgetxattr 227 +#define __NR_fgetxattr 228 +#define __NR_listxattr 229 +#define __NR_llistxattr 230 +#define __NR_flistxattr 231 +#define __NR_removexattr 232 +#define __NR_lremovexattr 233 +#define __NR_fremovexattr 234 +#define __NR_futex 235 +#define __NR_sendfile64 236 +#define __NR_mincore 237 +#define __NR_madvise 238 +#define __NR_fcntl64 239 +#define __NR_readahead 240 +#define __NR_io_setup 241 +#define __NR_io_destroy 242 +#define __NR_io_getevents 243 +#define __NR_io_submit 244 +#define __NR_io_cancel 245 +#define __NR_fadvise64 246 +#define __NR_exit_group 247 +#define __NR_lookup_dcookie 248 +#define __NR_epoll_create 249 +#define __NR_epoll_ctl 250 +#define __NR_epoll_wait 251 +#define __NR_remap_file_pages 252 +#define __NR_set_tid_address 253 +#define __NR_timer_create 254 +#define __NR_timer_settime 255 +#define __NR_timer_gettime 256 +#define __NR_timer_getoverrun 257 +#define __NR_timer_delete 258 +#define __NR_clock_settime 259 +#define __NR_clock_gettime 260 +#define __NR_clock_getres 261 +#define __NR_clock_nanosleep 262 +#define __NR_statfs64 263 +#define __NR_fstatfs64 264 +#define __NR_tgkill 265 +#define __NR_utimes 266 +#define __NR_fadvise64_64 267 +#define __NR_mbind 268 +#define __NR_get_mempolicy 269 +#define __NR_set_mempolicy 270 +#define __NR_mq_open 271 +#define __NR_mq_unlink 272 +#define __NR_mq_timedsend 273 +#define __NR_mq_timedreceive 274 +#define __NR_mq_notify 275 +#define __NR_mq_getsetattr 276 +#define __NR_waitid 277 +/*#define __NR_vserver 278*/ +#define __NR_add_key 279 +#define __NR_request_key 280 +#define __NR_keyctl 281 +#define __NR_ioprio_set 282 +#define __NR_ioprio_get 283 +#define __NR_inotify_init 284 +#define __NR_inotify_add_watch 285 +#define __NR_inotify_rm_watch 286 +#define __NR_migrate_pages 287 +#define __NR_openat 288 +#define __NR_mkdirat 289 +#define __NR_mknodat 290 +#define __NR_fchownat 291 +#define __NR_futimesat 292 +#define __NR_fstatat64 293 +#define __NR_unlinkat 294 +#define __NR_renameat 295 +#define __NR_linkat 296 +#define __NR_symlinkat 297 +#define __NR_readlinkat 298 +#define __NR_fchmodat 299 +#define __NR_faccessat 300 +#define __NR_pselect6 301 +#define __NR_ppoll 302 +#define __NR_unshare 303 +#define __NR_set_robust_list 304 +#define __NR_get_robust_list 305 +#define __NR_splice 306 +#define __NR_sync_file_range 307 +#define __NR_tee 308 +#define __NR_vmsplice 309 +#define __NR_move_pages 310 +#define __NR_sched_setaffinity 311 +#define __NR_sched_getaffinity 312 +#define __NR_kexec_load 313 +#define __NR_getcpu 314 +#define __NR_epoll_pwait 315 +#define __NR_utimensat 316 +#define __NR_signalfd 317 +#define __NR_timerfd_create 318 +#define __NR_eventfd 319 +#define __NR_fallocate 320 +#define __NR_timerfd_settime 321 +#define __NR_timerfd_gettime 322 +#define __NR_signalfd4 323 +#define __NR_eventfd2 324 +#define __NR_epoll_create1 325 +#define __NR_dup3 326 +#define __NR_pipe2 327 +#define __NR_inotify_init1 328 +#define __NR_preadv 329 +#define __NR_pwritev 330 +#define __NR_rt_tgsigqueueinfo 331 +#define __NR_perf_event_open 332 +#define __NR_get_thread_area 333 +#define __NR_set_thread_area 334 +#define __NR_atomic_cmpxchg_32 335 +#define __NR_atomic_barrier 336 +#define __NR_fanotify_init 337 +#define __NR_fanotify_mark 338 +#define __NR_prlimit64 339 +#define __NR_name_to_handle_at 340 +#define __NR_open_by_handle_at 341 +#define __NR_clock_adjtime 342 +#define __NR_syncfs 343 +#define __NR_setns 344 +#define __NR_process_vm_readv 345 +#define __NR_process_vm_writev 346 +#define __NR_kcmp 347 + +#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S index ce827b376110..4fc2e29b771b 100644 --- a/arch/m68k/kernel/syscalltable.S +++ b/arch/m68k/kernel/syscalltable.S @@ -367,4 +367,5 @@ ENTRY(sys_call_table) .long sys_setns .long sys_process_vm_readv /* 345 */ .long sys_process_vm_writev + .long sys_kcmp diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild index e69de29bb2d1..533053d12ced 100644 --- a/arch/mips/include/asm/Kbuild +++ b/arch/mips/include/asm/Kbuild @@ -0,0 +1 @@ +# MIPS headers diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h index e7cd78277c23..dc0a5f77a35c 100644 --- a/arch/mips/include/asm/delay.h +++ b/arch/mips/include/asm/delay.h @@ -13,9 +13,9 @@ #include <linux/param.h> -extern void __delay(unsigned int loops); -extern void __ndelay(unsigned int ns); -extern void __udelay(unsigned int us); +extern void __delay(unsigned long loops); +extern void __ndelay(unsigned long ns); +extern void __udelay(unsigned long us); #define ndelay(ns) __ndelay(ns) #define udelay(us) __udelay(us) diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h index c26e18250079..f5b521d5a67d 100644 --- a/arch/mips/include/asm/pgtable-64.h +++ b/arch/mips/include/asm/pgtable-64.h @@ -9,6 +9,7 @@ #ifndef _ASM_PGTABLE_64_H #define _ASM_PGTABLE_64_H +#include <linux/compiler.h> #include <linux/linkage.h> #include <asm/addrspace.h> @@ -172,7 +173,19 @@ static inline int pmd_none(pmd_t pmd) return pmd_val(pmd) == (unsigned long) invalid_pte_table; } -#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK) +static inline int pmd_bad(pmd_t pmd) +{ +#ifdef CONFIG_HUGETLB_PAGE + /* pmd_huge(pmd) but inline */ + if (unlikely(pmd_val(pmd) & _PAGE_HUGE)) + return 0; +#endif + + if (unlikely(pmd_val(pmd) & ~PAGE_MASK)) + return 1; + + return 0; +} static inline int pmd_present(pmd_t pmd) { diff --git a/arch/mips/jz4740/serial.h b/arch/mips/jz4740/serial.h index b9fe3ade0289..8eb715bb1ea8 100644 --- a/arch/mips/jz4740/serial.h +++ b/arch/mips/jz4740/serial.h @@ -14,6 +14,9 @@ */ #ifndef __MIPS_JZ4740_SERIAL_H__ +#define __MIPS_JZ4740_SERIAL_H__ + +struct uart_port; void jz4740_serial_out(struct uart_port *p, int offset, int value); diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c index afc379ca3753..06cd0c610f44 100644 --- a/arch/mips/kernel/smp-cmp.c +++ b/arch/mips/kernel/smp-cmp.c @@ -97,7 +97,7 @@ static void cmp_init_secondary(void) /* Enable per-cpu interrupts: platform specific */ - c->core = (read_c0_ebase() >> 1) & 0xff; + c->core = (read_c0_ebase() >> 1) & 0x1ff; #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE; #endif diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c index 5995969e8c42..dc81ca8dc0dd 100644 --- a/arch/mips/lib/delay.c +++ b/arch/mips/lib/delay.c @@ -15,13 +15,17 @@ #include <asm/compiler.h> #include <asm/war.h> -inline void __delay(unsigned int loops) +void __delay(unsigned long loops) { __asm__ __volatile__ ( " .set noreorder \n" " .align 3 \n" "1: bnez %0, 1b \n" +#if __SIZEOF_LONG__ == 4 " subu %0, 1 \n" +#else + " dsubu %0, 1 \n" +#endif " .set reorder \n" : "=r" (loops) : "0" (loops)); diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 3f69725556af..a99c1d3fc567 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -50,8 +50,9 @@ static void dump_tlb(int first, int last) { unsigned long s_entryhi, entryhi, asid; unsigned long long entrylo0, entrylo1; - unsigned int s_index, pagemask, c0, c1, i; + unsigned int s_index, s_pagemask, pagemask, c0, c1, i; + s_pagemask = read_c0_pagemask(); s_entryhi = read_c0_entryhi(); s_index = read_c0_index(); asid = s_entryhi & 0xff; @@ -103,6 +104,7 @@ static void dump_tlb(int first, int last) write_c0_entryhi(s_entryhi); write_c0_index(s_index); + write_c0_pagemask(s_pagemask); } void dump_tlb_all(void) diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 87b9cfcc30ff..4b9b935a070e 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -320,6 +320,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) tlb_write_random(); else tlb_write_indexed(); + tlbw_use_hazard(); write_c0_pagemask(PM_DEFAULT_MASK); } else #endif diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 658a520364ce..2833dcb67b5a 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -148,8 +148,8 @@ enum label_id { label_leave, label_vmalloc, label_vmalloc_done, - label_tlbw_hazard, - label_split, + label_tlbw_hazard_0, + label_split = label_tlbw_hazard_0 + 8, label_tlbl_goaround1, label_tlbl_goaround2, label_nopage_tlbl, @@ -167,7 +167,7 @@ UASM_L_LA(_second_part) UASM_L_LA(_leave) UASM_L_LA(_vmalloc) UASM_L_LA(_vmalloc_done) -UASM_L_LA(_tlbw_hazard) +/* _tlbw_hazard_x is handled differently. */ UASM_L_LA(_split) UASM_L_LA(_tlbl_goaround1) UASM_L_LA(_tlbl_goaround2) @@ -181,6 +181,30 @@ UASM_L_LA(_large_segbits_fault) UASM_L_LA(_tlb_huge_update) #endif +static int __cpuinitdata hazard_instance; + +static void uasm_bgezl_hazard(u32 **p, struct uasm_reloc **r, int instance) +{ + switch (instance) { + case 0 ... 7: + uasm_il_bgezl(p, r, 0, label_tlbw_hazard_0 + instance); + return; + default: + BUG(); + } +} + +static void uasm_bgezl_label(struct uasm_label **l, u32 **p, int instance) +{ + switch (instance) { + case 0 ... 7: + uasm_build_label(l, *p, label_tlbw_hazard_0 + instance); + break; + default: + BUG(); + } +} + /* * For debug purposes. */ @@ -478,21 +502,28 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, * This branch uses up a mtc0 hazard nop slot and saves * two nops after the tlbw instruction. */ - uasm_il_bgezl(p, r, 0, label_tlbw_hazard); + uasm_bgezl_hazard(p, r, hazard_instance); tlbw(p); - uasm_l_tlbw_hazard(l, *p); + uasm_bgezl_label(l, p, hazard_instance); + hazard_instance++; uasm_i_nop(p); break; case CPU_R4600: case CPU_R4700: - case CPU_R5000: - case CPU_R5000A: uasm_i_nop(p); tlbw(p); uasm_i_nop(p); break; + case CPU_R5000: + case CPU_R5000A: + case CPU_NEVADA: + uasm_i_nop(p); /* QED specifies 2 nops hazard */ + uasm_i_nop(p); /* QED specifies 2 nops hazard */ + tlbw(p); + break; + case CPU_R4300: case CPU_5KC: case CPU_TX49XX: @@ -526,17 +557,6 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, tlbw(p); break; - case CPU_NEVADA: - uasm_i_nop(p); /* QED specifies 2 nops hazard */ - /* - * This branch uses up a mtc0 hazard nop slot and saves - * a nop after the tlbw instruction. - */ - uasm_il_bgezl(p, r, 0, label_tlbw_hazard); - tlbw(p); - uasm_l_tlbw_hazard(l, *p); - break; - case CPU_RM7000: uasm_i_nop(p); uasm_i_nop(p); diff --git a/arch/mn10300/include/uapi/asm/setup.h b/arch/mn10300/include/uapi/asm/setup.h index e69de29bb2d1..ae5704fa77ad 100644 --- a/arch/mn10300/include/uapi/asm/setup.h +++ b/arch/mn10300/include/uapi/asm/setup.h @@ -0,0 +1,4 @@ +/* + * There isn't anything here anymore, but the file must not be empty or patch + * will delete it. + */ diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild index 458371a1565a..bac8debecffb 100644 --- a/arch/parisc/include/asm/Kbuild +++ b/arch/parisc/include/asm/Kbuild @@ -1,6 +1,5 @@ -include include/asm-generic/Kbuild.asm -header-y += pdc.h -generic-y += clkdev.h -generic-y += word-at-a-time.h -generic-y += exec.h +generic-y += word-at-a-time.h auxvec.h user.h cputime.h emergency-restart.h \ + segment.h topology.h vga.h device.h percpu.h hw_irq.h mutex.h \ + div64.h irq_regs.h kdebug.h kvm_para.h local64.h local.h param.h \ + poll.h xor.h clkdev.h exec.h diff --git a/arch/parisc/include/asm/auxvec.h b/arch/parisc/include/asm/auxvec.h deleted file mode 100644 index 9c3ac4b89dc9..000000000000 --- a/arch/parisc/include/asm/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMPARISC_AUXVEC_H -#define __ASMPARISC_AUXVEC_H - -#endif diff --git a/arch/parisc/include/asm/compat_signal.h b/arch/parisc/include/asm/compat_signal.h deleted file mode 100644 index 6ad02c360b21..000000000000 --- a/arch/parisc/include/asm/compat_signal.h +++ /dev/null @@ -1,2 +0,0 @@ -/* Use generic */ -#include <asm-generic/compat_signal.h> diff --git a/arch/parisc/include/asm/cputime.h b/arch/parisc/include/asm/cputime.h deleted file mode 100644 index dcdf2fbd7e72..000000000000 --- a/arch/parisc/include/asm/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __PARISC_CPUTIME_H -#define __PARISC_CPUTIME_H - -#include <asm-generic/cputime.h> - -#endif /* __PARISC_CPUTIME_H */ diff --git a/arch/parisc/include/asm/device.h b/arch/parisc/include/asm/device.h deleted file mode 100644 index d8f9872b0e2d..000000000000 --- a/arch/parisc/include/asm/device.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#include <asm-generic/device.h> - diff --git a/arch/parisc/include/asm/div64.h b/arch/parisc/include/asm/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/arch/parisc/include/asm/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/div64.h> diff --git a/arch/parisc/include/asm/emergency-restart.h b/arch/parisc/include/asm/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/arch/parisc/include/asm/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include <asm-generic/emergency-restart.h> - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/arch/parisc/include/asm/hw_irq.h b/arch/parisc/include/asm/hw_irq.h deleted file mode 100644 index 6707f7df3921..000000000000 --- a/arch/parisc/include/asm/hw_irq.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _ASM_HW_IRQ_H -#define _ASM_HW_IRQ_H - -/* - * linux/include/asm/hw_irq.h - */ - -#endif diff --git a/arch/parisc/include/asm/irq_regs.h b/arch/parisc/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/arch/parisc/include/asm/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/irq_regs.h> diff --git a/arch/parisc/include/asm/kdebug.h b/arch/parisc/include/asm/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/arch/parisc/include/asm/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/kdebug.h> diff --git a/arch/parisc/include/asm/kvm_para.h b/arch/parisc/include/asm/kvm_para.h deleted file mode 100644 index 14fab8f0b957..000000000000 --- a/arch/parisc/include/asm/kvm_para.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/kvm_para.h> diff --git a/arch/parisc/include/asm/local.h b/arch/parisc/include/asm/local.h deleted file mode 100644 index c11c530f74d0..000000000000 --- a/arch/parisc/include/asm/local.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/local.h> diff --git a/arch/parisc/include/asm/local64.h b/arch/parisc/include/asm/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/arch/parisc/include/asm/local64.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/local64.h> diff --git a/arch/parisc/include/asm/mutex.h b/arch/parisc/include/asm/mutex.h deleted file mode 100644 index 458c1f7fbc18..000000000000 --- a/arch/parisc/include/asm/mutex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Pull in the generic implementation for the mutex fastpath. - * - * TODO: implement optimized primitives instead, or leave the generic - * implementation in place, or pick the atomic_xchg() based generic - * implementation. (see asm-generic/mutex-xchg.h for details) - */ - -#include <asm-generic/mutex-dec.h> diff --git a/arch/parisc/include/asm/param.h b/arch/parisc/include/asm/param.h deleted file mode 100644 index 965d45427975..000000000000 --- a/arch/parisc/include/asm/param.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/param.h> diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h index 7f0f2d23059d..7eb616e4bf8a 100644 --- a/arch/parisc/include/asm/pdc.h +++ b/arch/parisc/include/asm/pdc.h @@ -1,348 +1,10 @@ #ifndef _PARISC_PDC_H #define _PARISC_PDC_H -/* - * PDC return values ... - * All PDC calls return a subset of these errors. - */ - -#define PDC_WARN 3 /* Call completed with a warning */ -#define PDC_REQ_ERR_1 2 /* See above */ -#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */ -#define PDC_OK 0 /* Call completed successfully */ -#define PDC_BAD_PROC -1 /* Called non-existent procedure*/ -#define PDC_BAD_OPTION -2 /* Called with non-existent option */ -#define PDC_ERROR -3 /* Call could not complete without an error */ -#define PDC_NE_MOD -5 /* Module not found */ -#define PDC_NE_CELL_MOD -7 /* Cell module not found */ -#define PDC_INVALID_ARG -10 /* Called with an invalid argument */ -#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */ -#define PDC_NOT_NARROW -17 /* Narrow mode not supported */ - -/* - * PDC entry points... - */ - -#define PDC_POW_FAIL 1 /* perform a power-fail */ -#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */ - -#define PDC_CHASSIS 2 /* PDC-chassis functions */ -#define PDC_CHASSIS_DISP 0 /* update chassis display */ -#define PDC_CHASSIS_WARN 1 /* return chassis warnings */ -#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */ -#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */ - -#define PDC_PIM 3 /* Get PIM data */ -#define PDC_PIM_HPMC 0 /* Transfer HPMC data */ -#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/ -#define PDC_PIM_LPMC 2 /* Transfer HPMC data */ -#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */ -#define PDC_PIM_TOC 4 /* Transfer TOC data */ - -#define PDC_MODEL 4 /* PDC model information call */ -#define PDC_MODEL_INFO 0 /* returns information */ -#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */ -#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/ -#define PDC_MODEL_SYSMODEL 3 /* return system model info */ -#define PDC_MODEL_ENSPEC 4 /* enable specific option */ -#define PDC_MODEL_DISPEC 5 /* disable specific option */ -#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */ -#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */ -/* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */ -#define PDC_MODEL_OS64 (1 << 0) -#define PDC_MODEL_OS32 (1 << 1) -#define PDC_MODEL_IOPDIR_FDC (1 << 2) -#define PDC_MODEL_NVA_MASK (3 << 4) -#define PDC_MODEL_NVA_SUPPORTED (0 << 4) -#define PDC_MODEL_NVA_SLOW (1 << 4) -#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4) -#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */ -#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */ - -#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */ -#define PA90_INSTRUCTION_SET 0x8 - -#define PDC_CACHE 5 /* return/set cache (& TLB) info*/ -#define PDC_CACHE_INFO 0 /* returns information */ -#define PDC_CACHE_SET_COH 1 /* set coherence state */ -#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */ - -#define PDC_HPA 6 /* return HPA of processor */ -#define PDC_HPA_PROCESSOR 0 -#define PDC_HPA_MODULES 1 - -#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */ -#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */ - -#define PDC_IODC 8 /* talk to IODC */ -#define PDC_IODC_READ 0 /* read IODC entry point */ -/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */ -#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */ -/* 1, 2 obsolete - HVERSION dependent*/ -#define PDC_IODC_RI_INIT 3 /* Initialize module */ -#define PDC_IODC_RI_IO 4 /* Module input/output */ -#define PDC_IODC_RI_SPA 5 /* Module input/output */ -#define PDC_IODC_RI_CONFIG 6 /* Module input/output */ -/* 7 obsolete - HVERSION dependent */ -#define PDC_IODC_RI_TEST 8 /* Module input/output */ -#define PDC_IODC_RI_TLB 9 /* Module input/output */ -#define PDC_IODC_NINIT 2 /* non-destructive init */ -#define PDC_IODC_DINIT 3 /* destructive init */ -#define PDC_IODC_MEMERR 4 /* check for memory errors */ -#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */ -#define PDC_IODC_BUS_ERROR -4 /* bus error return value */ -#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */ -#define PDC_IODC_COUNT -6 /* count is too small */ - -#define PDC_TOD 9 /* time-of-day clock (TOD) */ -#define PDC_TOD_READ 0 /* read TOD */ -#define PDC_TOD_WRITE 1 /* write TOD */ - - -#define PDC_STABLE 10 /* stable storage (sprockets) */ -#define PDC_STABLE_READ 0 -#define PDC_STABLE_WRITE 1 -#define PDC_STABLE_RETURN_SIZE 2 -#define PDC_STABLE_VERIFY_CONTENTS 3 -#define PDC_STABLE_INITIALIZE 4 - -#define PDC_NVOLATILE 11 /* often not implemented */ - -#define PDC_ADD_VALID 12 /* Memory validation PDC call */ -#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */ - -#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */ - -#define PDC_PROC 16 /* (sprockets) */ - -#define PDC_CONFIG 16 /* (sprockets) */ -#define PDC_CONFIG_DECONFIG 0 -#define PDC_CONFIG_DRECONFIG 1 -#define PDC_CONFIG_DRETURN_CONFIG 2 - -#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */ -#define PDC_BTLB_INFO 0 /* returns parameter */ -#define PDC_BTLB_INSERT 1 /* insert BTLB entry */ -#define PDC_BTLB_PURGE 2 /* purge BTLB entries */ -#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */ - -#define PDC_TLB 19 /* manage hardware TLB miss handling */ -#define PDC_TLB_INFO 0 /* returns parameter */ -#define PDC_TLB_SETUP 1 /* set up miss handling */ - -#define PDC_MEM 20 /* Manage memory */ -#define PDC_MEM_MEMINFO 0 -#define PDC_MEM_ADD_PAGE 1 -#define PDC_MEM_CLEAR_PDT 2 -#define PDC_MEM_READ_PDT 3 -#define PDC_MEM_RESET_CLEAR 4 -#define PDC_MEM_GOODMEM 5 -#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */ -#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE -#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131 -#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132 -#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133 - -#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */ -#define PDC_MEM_RET_DUPLICATE_ENTRY 4 -#define PDC_MEM_RET_BUF_SIZE_SMALL 1 -#define PDC_MEM_RET_PDT_FULL -11 -#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL - -#define PDC_PSW 21 /* Get/Set default System Mask */ -#define PDC_PSW_MASK 0 /* Return mask */ -#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */ -#define PDC_PSW_SET_DEFAULTS 2 /* Set default */ -#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */ -#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */ - -#define PDC_SYSTEM_MAP 22 /* find system modules */ -#define PDC_FIND_MODULE 0 -#define PDC_FIND_ADDRESS 1 -#define PDC_TRANSLATE_PATH 2 - -#define PDC_SOFT_POWER 23 /* soft power switch */ -#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */ -#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */ - - -/* HVERSION dependent */ - -/* The PDC_MEM_MAP calls */ -#define PDC_MEM_MAP 128 /* on s700: return page info */ -#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */ - -#define PDC_EEPROM 129 /* EEPROM access */ -#define PDC_EEPROM_READ_WORD 0 -#define PDC_EEPROM_WRITE_WORD 1 -#define PDC_EEPROM_READ_BYTE 2 -#define PDC_EEPROM_WRITE_BYTE 3 -#define PDC_EEPROM_EEPROM_PASSWORD -1000 - -#define PDC_NVM 130 /* NVM (non-volatile memory) access */ -#define PDC_NVM_READ_WORD 0 -#define PDC_NVM_WRITE_WORD 1 -#define PDC_NVM_READ_BYTE 2 -#define PDC_NVM_WRITE_BYTE 3 - -#define PDC_SEED_ERROR 132 /* (sprockets) */ - -#define PDC_IO 135 /* log error info, reset IO system */ -#define PDC_IO_READ_AND_CLEAR_ERRORS 0 -#define PDC_IO_RESET 1 -#define PDC_IO_RESET_DEVICES 2 -/* sets bits 6&7 (little endian) of the HcControl Register */ -#define PDC_IO_USB_SUSPEND 0xC000000000000000 -#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */ -#define PDC_IO_NO_SUSPEND -6 /* return value */ - -#define PDC_BROADCAST_RESET 136 /* reset all processors */ -#define PDC_DO_RESET 0 /* option: perform a broadcast reset */ -#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */ -#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */ -#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */ - -#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */ -#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */ - -#define PDC_LAN_STATION_ID_SIZE 6 - -#define PDC_CHECK_RANGES 139 /* (sprockets) */ - -#define PDC_NV_SECTIONS 141 /* (sprockets) */ - -#define PDC_PERFORMANCE 142 /* performance monitoring */ - -#define PDC_SYSTEM_INFO 143 /* system information */ -#define PDC_SYSINFO_RETURN_INFO_SIZE 0 -#define PDC_SYSINFO_RRETURN_SYS_INFO 1 -#define PDC_SYSINFO_RRETURN_ERRORS 2 -#define PDC_SYSINFO_RRETURN_WARNINGS 3 -#define PDC_SYSINFO_RETURN_REVISIONS 4 -#define PDC_SYSINFO_RRETURN_DIAGNOSE 5 -#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005 - -#define PDC_RDR 144 /* (sprockets) */ -#define PDC_RDR_READ_BUFFER 0 -#define PDC_RDR_READ_SINGLE 1 -#define PDC_RDR_WRITE_SINGLE 2 - -#define PDC_INTRIGUE 145 /* (sprockets) */ -#define PDC_INTRIGUE_WRITE_BUFFER 0 -#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1 -#define PDC_INTRIGUE_START_CPU_COUNTERS 2 -#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3 - -#define PDC_STI 146 /* STI access */ -/* same as PDC_PCI_XXX values (see below) */ - -/* Legacy PDC definitions for same stuff */ -#define PDC_PCI_INDEX 147 -#define PDC_PCI_INTERFACE_INFO 0 -#define PDC_PCI_SLOT_INFO 1 -#define PDC_PCI_INFLIGHT_BYTES 2 -#define PDC_PCI_READ_CONFIG 3 -#define PDC_PCI_WRITE_CONFIG 4 -#define PDC_PCI_READ_PCI_IO 5 -#define PDC_PCI_WRITE_PCI_IO 6 -#define PDC_PCI_READ_CONFIG_DELAY 7 -#define PDC_PCI_UPDATE_CONFIG_DELAY 8 -#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9 -#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10 -#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11 -#define PDC_PCI_PCI_RESERVED 12 -#define PDC_PCI_PCI_INT_ROUTE_SIZE 13 -#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE -#define PDC_PCI_PCI_INT_ROUTE 14 -#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE -#define PDC_PCI_READ_MON_TYPE 15 -#define PDC_PCI_WRITE_MON_TYPE 16 - - -/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */ -#define PDC_INITIATOR 163 -#define PDC_GET_INITIATOR 0 -#define PDC_SET_INITIATOR 1 -#define PDC_DELETE_INITIATOR 2 -#define PDC_RETURN_TABLE_SIZE 3 -#define PDC_RETURN_TABLE 4 - -#define PDC_LINK 165 /* (sprockets) */ -#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */ -#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */ - -/* cl_class - * page 3-33 of IO-Firmware ARS - * IODC ENTRY_INIT(Search first) RET[1] - */ -#define CL_NULL 0 /* invalid */ -#define CL_RANDOM 1 /* random access (as disk) */ -#define CL_SEQU 2 /* sequential access (as tape) */ -#define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */ -#define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */ -#define CL_DISPL 9 /* half-duplex console (display) */ -#define CL_FC 10 /* FiberChannel access media */ - -/* IODC ENTRY_INIT() */ -#define ENTRY_INIT_SRCH_FRST 2 -#define ENTRY_INIT_SRCH_NEXT 3 -#define ENTRY_INIT_MOD_DEV 4 -#define ENTRY_INIT_DEV 5 -#define ENTRY_INIT_MOD 6 -#define ENTRY_INIT_MSG 9 - -/* IODC ENTRY_IO() */ -#define ENTRY_IO_BOOTIN 0 -#define ENTRY_IO_BOOTOUT 1 -#define ENTRY_IO_CIN 2 -#define ENTRY_IO_COUT 3 -#define ENTRY_IO_CLOSE 4 -#define ENTRY_IO_GETMSG 9 -#define ENTRY_IO_BBLOCK_IN 16 -#define ENTRY_IO_BBLOCK_OUT 17 - -/* IODC ENTRY_SPA() */ - -/* IODC ENTRY_CONFIG() */ - -/* IODC ENTRY_TEST() */ - -/* IODC ENTRY_TLB() */ - -/* constants for OS (NVM...) */ -#define OS_ID_NONE 0 /* Undefined OS ID */ -#define OS_ID_HPUX 1 /* HP-UX OS */ -#define OS_ID_MPEXL 2 /* MPE XL OS */ -#define OS_ID_OSF 3 /* OSF OS */ -#define OS_ID_HPRT 4 /* HP-RT OS */ -#define OS_ID_NOVEL 5 /* NOVELL OS */ -#define OS_ID_LINUX 6 /* Linux */ - - -/* constants for PDC_CHASSIS */ -#define OSTAT_OFF 0 -#define OSTAT_FLT 1 -#define OSTAT_TEST 2 -#define OSTAT_INIT 3 -#define OSTAT_SHUT 4 -#define OSTAT_WARN 5 -#define OSTAT_RUN 6 -#define OSTAT_ON 7 - -/* Page Zero constant offsets used by the HPMC handler */ -#define BOOT_CONSOLE_HPA_OFFSET 0x3c0 -#define BOOT_CONSOLE_SPA_OFFSET 0x3c4 -#define BOOT_CONSOLE_PATH_OFFSET 0x3a8 - -/* size of the pdc_result buffer for firmware.c */ -#define NUM_PDC_RESULT 32 +#include <uapi/asm/pdc.h> #if !defined(__ASSEMBLY__) -#include <linux/types.h> - -#ifdef __KERNEL__ - extern int pdc_type; /* Values for pdc_type */ @@ -673,88 +335,5 @@ static inline char * os_id_to_string(u16 os_id) { } } -#endif /* __KERNEL__ */ - -/* flags of the device_path */ -#define PF_AUTOBOOT 0x80 -#define PF_AUTOSEARCH 0x40 -#define PF_TIMER 0x0F - -struct device_path { /* page 1-69 */ - unsigned char flags; /* flags see above! */ - unsigned char bc[6]; /* bus converter routing info */ - unsigned char mod; - unsigned int layers[6];/* device-specific layer-info */ -} __attribute__((aligned(8))) ; - -struct pz_device { - struct device_path dp; /* see above */ - /* struct iomod *hpa; */ - unsigned int hpa; /* HPA base address */ - /* char *spa; */ - unsigned int spa; /* SPA base address */ - /* int (*iodc_io)(struct iomod*, ...); */ - unsigned int iodc_io; /* device entry point */ - short pad; /* reserved */ - unsigned short cl_class;/* see below */ -} __attribute__((aligned(8))) ; - -struct zeropage { - /* [0x000] initialize vectors (VEC) */ - unsigned int vec_special; /* must be zero */ - /* int (*vec_pow_fail)(void);*/ - unsigned int vec_pow_fail; /* power failure handler */ - /* int (*vec_toc)(void); */ - unsigned int vec_toc; - unsigned int vec_toclen; - /* int (*vec_rendz)(void); */ - unsigned int vec_rendz; - int vec_pow_fail_flen; - int vec_pad[10]; - - /* [0x040] reserved processor dependent */ - int pad0[112]; - - /* [0x200] reserved */ - int pad1[84]; - - /* [0x350] memory configuration (MC) */ - int memc_cont; /* contiguous mem size (bytes) */ - int memc_phsize; /* physical memory size */ - int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */ - unsigned int mem_pdc_hi; /* used for 64-bit */ - - /* [0x360] various parameters for the boot-CPU */ - /* unsigned int *mem_booterr[8]; */ - unsigned int mem_booterr[8]; /* ptr to boot errors */ - unsigned int mem_free; /* first location, where OS can be loaded */ - /* struct iomod *mem_hpa; */ - unsigned int mem_hpa; /* HPA of the boot-CPU */ - /* int (*mem_pdc)(int, ...); */ - unsigned int mem_pdc; /* PDC entry point */ - unsigned int mem_10msec; /* number of clock ticks in 10msec */ - - /* [0x390] initial memory module (IMM) */ - /* struct iomod *imm_hpa; */ - unsigned int imm_hpa; /* HPA of the IMM */ - int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */ - unsigned int imm_spa_size; /* SPA size of the IMM in bytes */ - unsigned int imm_max_mem; /* bytes of mem in IMM */ - - /* [0x3A0] boot console, display device and keyboard */ - struct pz_device mem_cons; /* description of console device */ - struct pz_device mem_boot; /* description of boot device */ - struct pz_device mem_kbd; /* description of keyboard device */ - - /* [0x430] reserved */ - int pad430[116]; - - /* [0x600] processor dependent */ - __u32 pad600[1]; - __u32 proc_sti; /* pointer to STI ROM */ - __u32 pad608[126]; -}; - #endif /* !defined(__ASSEMBLY__) */ - #endif /* _PARISC_PDC_H */ diff --git a/arch/parisc/include/asm/percpu.h b/arch/parisc/include/asm/percpu.h deleted file mode 100644 index a0dcd1970128..000000000000 --- a/arch/parisc/include/asm/percpu.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _PARISC_PERCPU_H -#define _PARISC_PERCPU_H - -#include <asm-generic/percpu.h> - -#endif - diff --git a/arch/parisc/include/asm/poll.h b/arch/parisc/include/asm/poll.h deleted file mode 100644 index c98509d3149e..000000000000 --- a/arch/parisc/include/asm/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/poll.h> diff --git a/arch/parisc/include/asm/ptrace.h b/arch/parisc/include/asm/ptrace.h index 250ae35aa062..a2db278a5def 100644 --- a/arch/parisc/include/asm/ptrace.h +++ b/arch/parisc/include/asm/ptrace.h @@ -1,49 +1,11 @@ -#ifndef _PARISC_PTRACE_H -#define _PARISC_PTRACE_H - /* written by Philipp Rumpf, Copyright (C) 1999 SuSE GmbH Nuernberg ** Copyright (C) 2000 Grant Grundler, Hewlett-Packard */ +#ifndef _PARISC_PTRACE_H +#define _PARISC_PTRACE_H -#include <linux/types.h> - -/* This struct defines the way the registers are stored on the - * stack during a system call. - * - * N.B. gdb/strace care about the size and offsets within this - * structure. If you change things, you may break object compatibility - * for those applications. - */ - -struct pt_regs { - unsigned long gr[32]; /* PSW is in gr[0] */ - __u64 fr[32]; - unsigned long sr[ 8]; - unsigned long iasq[2]; - unsigned long iaoq[2]; - unsigned long cr27; - unsigned long pad0; /* available for other uses */ - unsigned long orig_r28; - unsigned long ksp; - unsigned long kpc; - unsigned long sar; /* CR11 */ - unsigned long iir; /* CR19 */ - unsigned long isr; /* CR20 */ - unsigned long ior; /* CR21 */ - unsigned long ipsw; /* CR22 */ -}; - -/* - * The numbers chosen here are somewhat arbitrary but absolutely MUST - * not overlap with any of the number assigned in <linux/ptrace.h>. - * - * These ones are taken from IA-64 on the assumption that theirs are - * the most correct (and we also want to support PTRACE_SINGLEBLOCK - * since we have taken branch traps too) - */ -#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */ +#include <uapi/asm/ptrace.h> -#ifdef __KERNEL__ #define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS)) @@ -58,6 +20,4 @@ struct pt_regs { unsigned long profile_pc(struct pt_regs *); -#endif /* __KERNEL__ */ - #endif diff --git a/arch/parisc/include/asm/real.h b/arch/parisc/include/asm/real.h deleted file mode 100644 index 82acb25db395..000000000000 --- a/arch/parisc/include/asm/real.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef _PARISC_REAL_H -#define _PARISC_REAL_H - - -#endif diff --git a/arch/parisc/include/asm/segment.h b/arch/parisc/include/asm/segment.h deleted file mode 100644 index 26794ddb6524..000000000000 --- a/arch/parisc/include/asm/segment.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __PARISC_SEGMENT_H -#define __PARISC_SEGMENT_H - -/* Only here because we have some old header files that expect it.. */ - -#endif diff --git a/arch/parisc/include/asm/signal.h b/arch/parisc/include/asm/signal.h index c20356375d1d..21abf4fc169a 100644 --- a/arch/parisc/include/asm/signal.h +++ b/arch/parisc/include/asm/signal.h @@ -1,129 +1,19 @@ #ifndef _ASM_PARISC_SIGNAL_H #define _ASM_PARISC_SIGNAL_H -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGEMT 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGBUS 10 -#define SIGSEGV 11 -#define SIGSYS 12 /* Linux doesn't use this */ -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGUSR1 16 -#define SIGUSR2 17 -#define SIGCHLD 18 -#define SIGPWR 19 -#define SIGVTALRM 20 -#define SIGPROF 21 -#define SIGIO 22 -#define SIGPOLL SIGIO -#define SIGWINCH 23 -#define SIGSTOP 24 -#define SIGTSTP 25 -#define SIGCONT 26 -#define SIGTTIN 27 -#define SIGTTOU 28 -#define SIGURG 29 -#define SIGLOST 30 /* Linux doesn't use this either */ -#define SIGUNUSED 31 -#define SIGRESERVE SIGUNUSED +#include <uapi/asm/signal.h> -#define SIGXCPU 33 -#define SIGXFSZ 34 -#define SIGSTKFLT 36 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 37 -#define SIGRTMAX _NSIG /* it's 44 under HP/UX */ - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_ONSTACK 0x00000001 -#define SA_RESETHAND 0x00000004 -#define SA_NOCLDSTOP 0x00000008 -#define SA_SIGINFO 0x00000010 -#define SA_NODEFER 0x00000020 -#define SA_RESTART 0x00000040 -#define SA_NOCLDWAIT 0x00000080 -#define _SA_SIGGFAULT 0x00000100 /* HPUX */ - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -#define SA_RESTORER 0x04000000 /* obsolete -- ignored */ - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#ifdef __KERNEL__ #define _NSIG 64 /* bits-per-word, where word apparently means 'long' not 'int' */ #define _NSIG_BPW BITS_PER_LONG #define _NSIG_WORDS (_NSIG / _NSIG_BPW) -#endif /* __KERNEL__ */ - -#define SIG_BLOCK 0 /* for blocking signals */ -#define SIG_UNBLOCK 1 /* for unblocking signals */ -#define SIG_SETMASK 2 /* for setting the signal mask */ - -#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ -#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ -#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ - # ifndef __ASSEMBLY__ - -# include <linux/types.h> - -/* Avoid too many header ordering problems. */ -struct siginfo; - -/* Type of a signal handler. */ #ifdef CONFIG_64BIT -/* function pointers on 64-bit parisc are pointers to little structs and the - * compiler doesn't support code which changes or tests the address of - * the function in the little struct. This is really ugly -PB - */ -typedef char __user *__sighandler_t; #else -typedef void __signalfn_t(int); -typedef __signalfn_t __user *__sighandler_t; #endif -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ - /* Most things should be clean enough to redefine this at will, if care is taken to make libc match. */ @@ -148,6 +38,5 @@ struct k_sigaction { #include <asm/sigcontext.h> -#endif /* __KERNEL__ */ #endif /* !__ASSEMBLY */ #endif /* _ASM_PARISC_SIGNAL_H */ diff --git a/arch/parisc/include/asm/termios.h b/arch/parisc/include/asm/termios.h index a2a57a4548af..9bbc0c8974ea 100644 --- a/arch/parisc/include/asm/termios.h +++ b/arch/parisc/include/asm/termios.h @@ -1,45 +1,8 @@ #ifndef _PARISC_TERMIOS_H #define _PARISC_TERMIOS_H -#include <asm/termbits.h> -#include <asm/ioctls.h> +#include <uapi/asm/termios.h> -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ /* intr=^C quit=^\ erase=del kill=^U eof=^D vtime=\0 vmin=\1 sxtc=\0 @@ -85,6 +48,4 @@ struct termio { #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) -#endif /* __KERNEL__ */ - #endif /* _PARISC_TERMIOS_H */ diff --git a/arch/parisc/include/asm/topology.h b/arch/parisc/include/asm/topology.h deleted file mode 100644 index d8133eb0b1e7..000000000000 --- a/arch/parisc/include/asm/topology.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_PARISC_TOPOLOGY_H -#define _ASM_PARISC_TOPOLOGY_H - -#include <asm-generic/topology.h> - -#endif /* _ASM_PARISC_TOPOLOGY_H */ diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h index d61de64f990a..541639c3f607 100644 --- a/arch/parisc/include/asm/unistd.h +++ b/arch/parisc/include/asm/unistd.h @@ -1,840 +1,8 @@ #ifndef _ASM_PARISC_UNISTD_H_ #define _ASM_PARISC_UNISTD_H_ -/* - * This file contains the system call numbers. - */ - -/* - * HP-UX system calls get their native numbers for binary compatibility. - */ - -#define __NR_HPUX_exit 1 -#define __NR_HPUX_fork 2 -#define __NR_HPUX_read 3 -#define __NR_HPUX_write 4 -#define __NR_HPUX_open 5 -#define __NR_HPUX_close 6 -#define __NR_HPUX_wait 7 -#define __NR_HPUX_creat 8 -#define __NR_HPUX_link 9 -#define __NR_HPUX_unlink 10 -#define __NR_HPUX_execv 11 -#define __NR_HPUX_chdir 12 -#define __NR_HPUX_time 13 -#define __NR_HPUX_mknod 14 -#define __NR_HPUX_chmod 15 -#define __NR_HPUX_chown 16 -#define __NR_HPUX_break 17 -#define __NR_HPUX_lchmod 18 -#define __NR_HPUX_lseek 19 -#define __NR_HPUX_getpid 20 -#define __NR_HPUX_mount 21 -#define __NR_HPUX_umount 22 -#define __NR_HPUX_setuid 23 -#define __NR_HPUX_getuid 24 -#define __NR_HPUX_stime 25 -#define __NR_HPUX_ptrace 26 -#define __NR_HPUX_alarm 27 -#define __NR_HPUX_oldfstat 28 -#define __NR_HPUX_pause 29 -#define __NR_HPUX_utime 30 -#define __NR_HPUX_stty 31 -#define __NR_HPUX_gtty 32 -#define __NR_HPUX_access 33 -#define __NR_HPUX_nice 34 -#define __NR_HPUX_ftime 35 -#define __NR_HPUX_sync 36 -#define __NR_HPUX_kill 37 -#define __NR_HPUX_stat 38 -#define __NR_HPUX_setpgrp3 39 -#define __NR_HPUX_lstat 40 -#define __NR_HPUX_dup 41 -#define __NR_HPUX_pipe 42 -#define __NR_HPUX_times 43 -#define __NR_HPUX_profil 44 -#define __NR_HPUX_ki_call 45 -#define __NR_HPUX_setgid 46 -#define __NR_HPUX_getgid 47 -#define __NR_HPUX_sigsys 48 -#define __NR_HPUX_reserved1 49 -#define __NR_HPUX_reserved2 50 -#define __NR_HPUX_acct 51 -#define __NR_HPUX_set_userthreadid 52 -#define __NR_HPUX_oldlock 53 -#define __NR_HPUX_ioctl 54 -#define __NR_HPUX_reboot 55 -#define __NR_HPUX_symlink 56 -#define __NR_HPUX_utssys 57 -#define __NR_HPUX_readlink 58 -#define __NR_HPUX_execve 59 -#define __NR_HPUX_umask 60 -#define __NR_HPUX_chroot 61 -#define __NR_HPUX_fcntl 62 -#define __NR_HPUX_ulimit 63 -#define __NR_HPUX_getpagesize 64 -#define __NR_HPUX_mremap 65 -#define __NR_HPUX_vfork 66 -#define __NR_HPUX_vread 67 -#define __NR_HPUX_vwrite 68 -#define __NR_HPUX_sbrk 69 -#define __NR_HPUX_sstk 70 -#define __NR_HPUX_mmap 71 -#define __NR_HPUX_vadvise 72 -#define __NR_HPUX_munmap 73 -#define __NR_HPUX_mprotect 74 -#define __NR_HPUX_madvise 75 -#define __NR_HPUX_vhangup 76 -#define __NR_HPUX_swapoff 77 -#define __NR_HPUX_mincore 78 -#define __NR_HPUX_getgroups 79 -#define __NR_HPUX_setgroups 80 -#define __NR_HPUX_getpgrp2 81 -#define __NR_HPUX_setpgrp2 82 -#define __NR_HPUX_setitimer 83 -#define __NR_HPUX_wait3 84 -#define __NR_HPUX_swapon 85 -#define __NR_HPUX_getitimer 86 -#define __NR_HPUX_gethostname42 87 -#define __NR_HPUX_sethostname42 88 -#define __NR_HPUX_getdtablesize 89 -#define __NR_HPUX_dup2 90 -#define __NR_HPUX_getdopt 91 -#define __NR_HPUX_fstat 92 -#define __NR_HPUX_select 93 -#define __NR_HPUX_setdopt 94 -#define __NR_HPUX_fsync 95 -#define __NR_HPUX_setpriority 96 -#define __NR_HPUX_socket_old 97 -#define __NR_HPUX_connect_old 98 -#define __NR_HPUX_accept_old 99 -#define __NR_HPUX_getpriority 100 -#define __NR_HPUX_send_old 101 -#define __NR_HPUX_recv_old 102 -#define __NR_HPUX_socketaddr_old 103 -#define __NR_HPUX_bind_old 104 -#define __NR_HPUX_setsockopt_old 105 -#define __NR_HPUX_listen_old 106 -#define __NR_HPUX_vtimes_old 107 -#define __NR_HPUX_sigvector 108 -#define __NR_HPUX_sigblock 109 -#define __NR_HPUX_siggetmask 110 -#define __NR_HPUX_sigpause 111 -#define __NR_HPUX_sigstack 112 -#define __NR_HPUX_recvmsg_old 113 -#define __NR_HPUX_sendmsg_old 114 -#define __NR_HPUX_vtrace_old 115 -#define __NR_HPUX_gettimeofday 116 -#define __NR_HPUX_getrusage 117 -#define __NR_HPUX_getsockopt_old 118 -#define __NR_HPUX_resuba_old 119 -#define __NR_HPUX_readv 120 -#define __NR_HPUX_writev 121 -#define __NR_HPUX_settimeofday 122 -#define __NR_HPUX_fchown 123 -#define __NR_HPUX_fchmod 124 -#define __NR_HPUX_recvfrom_old 125 -#define __NR_HPUX_setresuid 126 -#define __NR_HPUX_setresgid 127 -#define __NR_HPUX_rename 128 -#define __NR_HPUX_truncate 129 -#define __NR_HPUX_ftruncate 130 -#define __NR_HPUX_flock_old 131 -#define __NR_HPUX_sysconf 132 -#define __NR_HPUX_sendto_old 133 -#define __NR_HPUX_shutdown_old 134 -#define __NR_HPUX_socketpair_old 135 -#define __NR_HPUX_mkdir 136 -#define __NR_HPUX_rmdir 137 -#define __NR_HPUX_utimes_old 138 -#define __NR_HPUX_sigcleanup_old 139 -#define __NR_HPUX_setcore 140 -#define __NR_HPUX_getpeername_old 141 -#define __NR_HPUX_gethostid 142 -#define __NR_HPUX_sethostid 143 -#define __NR_HPUX_getrlimit 144 -#define __NR_HPUX_setrlimit 145 -#define __NR_HPUX_killpg_old 146 -#define __NR_HPUX_cachectl 147 -#define __NR_HPUX_quotactl 148 -#define __NR_HPUX_get_sysinfo 149 -#define __NR_HPUX_getsockname_old 150 -#define __NR_HPUX_privgrp 151 -#define __NR_HPUX_rtprio 152 -#define __NR_HPUX_plock 153 -#define __NR_HPUX_reserved3 154 -#define __NR_HPUX_lockf 155 -#define __NR_HPUX_semget 156 -#define __NR_HPUX_osemctl 157 -#define __NR_HPUX_semop 158 -#define __NR_HPUX_msgget 159 -#define __NR_HPUX_omsgctl 160 -#define __NR_HPUX_msgsnd 161 -#define __NR_HPUX_msgrecv 162 -#define __NR_HPUX_shmget 163 -#define __NR_HPUX_oshmctl 164 -#define __NR_HPUX_shmat 165 -#define __NR_HPUX_shmdt 166 -#define __NR_HPUX_m68020_advise 167 -/* [168,189] are for Discless/DUX */ -#define __NR_HPUX_csp 168 -#define __NR_HPUX_cluster 169 -#define __NR_HPUX_mkrnod 170 -#define __NR_HPUX_test 171 -#define __NR_HPUX_unsp_open 172 -#define __NR_HPUX_reserved4 173 -#define __NR_HPUX_getcontext_old 174 -#define __NR_HPUX_osetcontext 175 -#define __NR_HPUX_bigio 176 -#define __NR_HPUX_pipenode 177 -#define __NR_HPUX_lsync 178 -#define __NR_HPUX_getmachineid 179 -#define __NR_HPUX_cnodeid 180 -#define __NR_HPUX_cnodes 181 -#define __NR_HPUX_swapclients 182 -#define __NR_HPUX_rmt_process 183 -#define __NR_HPUX_dskless_stats 184 -#define __NR_HPUX_sigprocmask 185 -#define __NR_HPUX_sigpending 186 -#define __NR_HPUX_sigsuspend 187 -#define __NR_HPUX_sigaction 188 -#define __NR_HPUX_reserved5 189 -#define __NR_HPUX_nfssvc 190 -#define __NR_HPUX_getfh 191 -#define __NR_HPUX_getdomainname 192 -#define __NR_HPUX_setdomainname 193 -#define __NR_HPUX_async_daemon 194 -#define __NR_HPUX_getdirentries 195 -#define __NR_HPUX_statfs 196 -#define __NR_HPUX_fstatfs 197 -#define __NR_HPUX_vfsmount 198 -#define __NR_HPUX_reserved6 199 -#define __NR_HPUX_waitpid 200 -/* 201 - 223 missing */ -#define __NR_HPUX_sigsetreturn 224 -#define __NR_HPUX_sigsetstatemask 225 -/* 226 missing */ -#define __NR_HPUX_cs 227 -#define __NR_HPUX_cds 228 -#define __NR_HPUX_set_no_trunc 229 -#define __NR_HPUX_pathconf 230 -#define __NR_HPUX_fpathconf 231 -/* 232, 233 missing */ -#define __NR_HPUX_nfs_fcntl 234 -#define __NR_HPUX_ogetacl 235 -#define __NR_HPUX_ofgetacl 236 -#define __NR_HPUX_osetacl 237 -#define __NR_HPUX_ofsetacl 238 -#define __NR_HPUX_pstat 239 -#define __NR_HPUX_getaudid 240 -#define __NR_HPUX_setaudid 241 -#define __NR_HPUX_getaudproc 242 -#define __NR_HPUX_setaudproc 243 -#define __NR_HPUX_getevent 244 -#define __NR_HPUX_setevent 245 -#define __NR_HPUX_audwrite 246 -#define __NR_HPUX_audswitch 247 -#define __NR_HPUX_audctl 248 -#define __NR_HPUX_ogetaccess 249 -#define __NR_HPUX_fsctl 250 -/* 251 - 258 missing */ -#define __NR_HPUX_swapfs 259 -#define __NR_HPUX_fss 260 -/* 261 - 266 missing */ -#define __NR_HPUX_tsync 267 -#define __NR_HPUX_getnumfds 268 -#define __NR_HPUX_poll 269 -#define __NR_HPUX_getmsg 270 -#define __NR_HPUX_putmsg 271 -#define __NR_HPUX_fchdir 272 -#define __NR_HPUX_getmount_cnt 273 -#define __NR_HPUX_getmount_entry 274 -#define __NR_HPUX_accept 275 -#define __NR_HPUX_bind 276 -#define __NR_HPUX_connect 277 -#define __NR_HPUX_getpeername 278 -#define __NR_HPUX_getsockname 279 -#define __NR_HPUX_getsockopt 280 -#define __NR_HPUX_listen 281 -#define __NR_HPUX_recv 282 -#define __NR_HPUX_recvfrom 283 -#define __NR_HPUX_recvmsg 284 -#define __NR_HPUX_send 285 -#define __NR_HPUX_sendmsg 286 -#define __NR_HPUX_sendto 287 -#define __NR_HPUX_setsockopt 288 -#define __NR_HPUX_shutdown 289 -#define __NR_HPUX_socket 290 -#define __NR_HPUX_socketpair 291 -#define __NR_HPUX_proc_open 292 -#define __NR_HPUX_proc_close 293 -#define __NR_HPUX_proc_send 294 -#define __NR_HPUX_proc_recv 295 -#define __NR_HPUX_proc_sendrecv 296 -#define __NR_HPUX_proc_syscall 297 -/* 298 - 311 missing */ -#define __NR_HPUX_semctl 312 -#define __NR_HPUX_msgctl 313 -#define __NR_HPUX_shmctl 314 -#define __NR_HPUX_mpctl 315 -#define __NR_HPUX_exportfs 316 -#define __NR_HPUX_getpmsg 317 -#define __NR_HPUX_putpmsg 318 -/* 319 missing */ -#define __NR_HPUX_msync 320 -#define __NR_HPUX_msleep 321 -#define __NR_HPUX_mwakeup 322 -#define __NR_HPUX_msem_init 323 -#define __NR_HPUX_msem_remove 324 -#define __NR_HPUX_adjtime 325 -#define __NR_HPUX_kload 326 -#define __NR_HPUX_fattach 327 -#define __NR_HPUX_fdetach 328 -#define __NR_HPUX_serialize 329 -#define __NR_HPUX_statvfs 330 -#define __NR_HPUX_fstatvfs 331 -#define __NR_HPUX_lchown 332 -#define __NR_HPUX_getsid 333 -#define __NR_HPUX_sysfs 334 -/* 335, 336 missing */ -#define __NR_HPUX_sched_setparam 337 -#define __NR_HPUX_sched_getparam 338 -#define __NR_HPUX_sched_setscheduler 339 -#define __NR_HPUX_sched_getscheduler 340 -#define __NR_HPUX_sched_yield 341 -#define __NR_HPUX_sched_get_priority_max 342 -#define __NR_HPUX_sched_get_priority_min 343 -#define __NR_HPUX_sched_rr_get_interval 344 -#define __NR_HPUX_clock_settime 345 -#define __NR_HPUX_clock_gettime 346 -#define __NR_HPUX_clock_getres 347 -#define __NR_HPUX_timer_create 348 -#define __NR_HPUX_timer_delete 349 -#define __NR_HPUX_timer_settime 350 -#define __NR_HPUX_timer_gettime 351 -#define __NR_HPUX_timer_getoverrun 352 -#define __NR_HPUX_nanosleep 353 -#define __NR_HPUX_toolbox 354 -/* 355 missing */ -#define __NR_HPUX_getdents 356 -#define __NR_HPUX_getcontext 357 -#define __NR_HPUX_sysinfo 358 -#define __NR_HPUX_fcntl64 359 -#define __NR_HPUX_ftruncate64 360 -#define __NR_HPUX_fstat64 361 -#define __NR_HPUX_getdirentries64 362 -#define __NR_HPUX_getrlimit64 363 -#define __NR_HPUX_lockf64 364 -#define __NR_HPUX_lseek64 365 -#define __NR_HPUX_lstat64 366 -#define __NR_HPUX_mmap64 367 -#define __NR_HPUX_setrlimit64 368 -#define __NR_HPUX_stat64 369 -#define __NR_HPUX_truncate64 370 -#define __NR_HPUX_ulimit64 371 -#define __NR_HPUX_pread 372 -#define __NR_HPUX_preadv 373 -#define __NR_HPUX_pwrite 374 -#define __NR_HPUX_pwritev 375 -#define __NR_HPUX_pread64 376 -#define __NR_HPUX_preadv64 377 -#define __NR_HPUX_pwrite64 378 -#define __NR_HPUX_pwritev64 379 -#define __NR_HPUX_setcontext 380 -#define __NR_HPUX_sigaltstack 381 -#define __NR_HPUX_waitid 382 -#define __NR_HPUX_setpgrp 383 -#define __NR_HPUX_recvmsg2 384 -#define __NR_HPUX_sendmsg2 385 -#define __NR_HPUX_socket2 386 -#define __NR_HPUX_socketpair2 387 -#define __NR_HPUX_setregid 388 -#define __NR_HPUX_lwp_create 389 -#define __NR_HPUX_lwp_terminate 390 -#define __NR_HPUX_lwp_wait 391 -#define __NR_HPUX_lwp_suspend 392 -#define __NR_HPUX_lwp_resume 393 -/* 394 missing */ -#define __NR_HPUX_lwp_abort_syscall 395 -#define __NR_HPUX_lwp_info 396 -#define __NR_HPUX_lwp_kill 397 -#define __NR_HPUX_ksleep 398 -#define __NR_HPUX_kwakeup 399 -/* 400 missing */ -#define __NR_HPUX_pstat_getlwp 401 -#define __NR_HPUX_lwp_exit 402 -#define __NR_HPUX_lwp_continue 403 -#define __NR_HPUX_getacl 404 -#define __NR_HPUX_fgetacl 405 -#define __NR_HPUX_setacl 406 -#define __NR_HPUX_fsetacl 407 -#define __NR_HPUX_getaccess 408 -#define __NR_HPUX_lwp_mutex_init 409 -#define __NR_HPUX_lwp_mutex_lock_sys 410 -#define __NR_HPUX_lwp_mutex_unlock 411 -#define __NR_HPUX_lwp_cond_init 412 -#define __NR_HPUX_lwp_cond_signal 413 -#define __NR_HPUX_lwp_cond_broadcast 414 -#define __NR_HPUX_lwp_cond_wait_sys 415 -#define __NR_HPUX_lwp_getscheduler 416 -#define __NR_HPUX_lwp_setscheduler 417 -#define __NR_HPUX_lwp_getstate 418 -#define __NR_HPUX_lwp_setstate 419 -#define __NR_HPUX_lwp_detach 420 -#define __NR_HPUX_mlock 421 -#define __NR_HPUX_munlock 422 -#define __NR_HPUX_mlockall 423 -#define __NR_HPUX_munlockall 424 -#define __NR_HPUX_shm_open 425 -#define __NR_HPUX_shm_unlink 426 -#define __NR_HPUX_sigqueue 427 -#define __NR_HPUX_sigwaitinfo 428 -#define __NR_HPUX_sigtimedwait 429 -#define __NR_HPUX_sigwait 430 -#define __NR_HPUX_aio_read 431 -#define __NR_HPUX_aio_write 432 -#define __NR_HPUX_lio_listio 433 -#define __NR_HPUX_aio_error 434 -#define __NR_HPUX_aio_return 435 -#define __NR_HPUX_aio_cancel 436 -#define __NR_HPUX_aio_suspend 437 -#define __NR_HPUX_aio_fsync 438 -#define __NR_HPUX_mq_open 439 -#define __NR_HPUX_mq_close 440 -#define __NR_HPUX_mq_unlink 441 -#define __NR_HPUX_mq_send 442 -#define __NR_HPUX_mq_receive 443 -#define __NR_HPUX_mq_notify 444 -#define __NR_HPUX_mq_setattr 445 -#define __NR_HPUX_mq_getattr 446 -#define __NR_HPUX_ksem_open 447 -#define __NR_HPUX_ksem_unlink 448 -#define __NR_HPUX_ksem_close 449 -#define __NR_HPUX_ksem_post 450 -#define __NR_HPUX_ksem_wait 451 -#define __NR_HPUX_ksem_read 452 -#define __NR_HPUX_ksem_trywait 453 -#define __NR_HPUX_lwp_rwlock_init 454 -#define __NR_HPUX_lwp_rwlock_destroy 455 -#define __NR_HPUX_lwp_rwlock_rdlock_sys 456 -#define __NR_HPUX_lwp_rwlock_wrlock_sys 457 -#define __NR_HPUX_lwp_rwlock_tryrdlock 458 -#define __NR_HPUX_lwp_rwlock_trywrlock 459 -#define __NR_HPUX_lwp_rwlock_unlock 460 -#define __NR_HPUX_ttrace 461 -#define __NR_HPUX_ttrace_wait 462 -#define __NR_HPUX_lf_wire_mem 463 -#define __NR_HPUX_lf_unwire_mem 464 -#define __NR_HPUX_lf_send_pin_map 465 -#define __NR_HPUX_lf_free_buf 466 -#define __NR_HPUX_lf_wait_nq 467 -#define __NR_HPUX_lf_wakeup_conn_q 468 -#define __NR_HPUX_lf_unused 469 -#define __NR_HPUX_lwp_sema_init 470 -#define __NR_HPUX_lwp_sema_post 471 -#define __NR_HPUX_lwp_sema_wait 472 -#define __NR_HPUX_lwp_sema_trywait 473 -#define __NR_HPUX_lwp_sema_destroy 474 -#define __NR_HPUX_statvfs64 475 -#define __NR_HPUX_fstatvfs64 476 -#define __NR_HPUX_msh_register 477 -#define __NR_HPUX_ptrace64 478 -#define __NR_HPUX_sendfile 479 -#define __NR_HPUX_sendpath 480 -#define __NR_HPUX_sendfile64 481 -#define __NR_HPUX_sendpath64 482 -#define __NR_HPUX_modload 483 -#define __NR_HPUX_moduload 484 -#define __NR_HPUX_modpath 485 -#define __NR_HPUX_getksym 486 -#define __NR_HPUX_modadm 487 -#define __NR_HPUX_modstat 488 -#define __NR_HPUX_lwp_detached_exit 489 -#define __NR_HPUX_crashconf 490 -#define __NR_HPUX_siginhibit 491 -#define __NR_HPUX_sigenable 492 -#define __NR_HPUX_spuctl 493 -#define __NR_HPUX_zerokernelsum 494 -#define __NR_HPUX_nfs_kstat 495 -#define __NR_HPUX_aio_read64 496 -#define __NR_HPUX_aio_write64 497 -#define __NR_HPUX_aio_error64 498 -#define __NR_HPUX_aio_return64 499 -#define __NR_HPUX_aio_cancel64 500 -#define __NR_HPUX_aio_suspend64 501 -#define __NR_HPUX_aio_fsync64 502 -#define __NR_HPUX_lio_listio64 503 -#define __NR_HPUX_recv2 504 -#define __NR_HPUX_recvfrom2 505 -#define __NR_HPUX_send2 506 -#define __NR_HPUX_sendto2 507 -#define __NR_HPUX_acl 508 -#define __NR_HPUX___cnx_p2p_ctl 509 -#define __NR_HPUX___cnx_gsched_ctl 510 -#define __NR_HPUX___cnx_pmon_ctl 511 - -#define __NR_HPUX_syscalls 512 - -/* - * Linux system call numbers. - * - * Cary Coutant says that we should just use another syscall gateway - * page to avoid clashing with the HPUX space, and I think he's right: - * it will would keep a branch out of our syscall entry path, at the - * very least. If we decide to change it later, we can ``just'' tweak - * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be - * 1024 or something. Oh, and recompile libc. =) - * - * 64-bit HPUX binaries get the syscall gateway address passed in a register - * from the kernel at startup, which seems a sane strategy. - */ - -#define __NR_Linux 0 -#define __NR_restart_syscall (__NR_Linux + 0) -#define __NR_exit (__NR_Linux + 1) -#define __NR_fork (__NR_Linux + 2) -#define __NR_read (__NR_Linux + 3) -#define __NR_write (__NR_Linux + 4) -#define __NR_open (__NR_Linux + 5) -#define __NR_close (__NR_Linux + 6) -#define __NR_waitpid (__NR_Linux + 7) -#define __NR_creat (__NR_Linux + 8) -#define __NR_link (__NR_Linux + 9) -#define __NR_unlink (__NR_Linux + 10) -#define __NR_execve (__NR_Linux + 11) -#define __NR_chdir (__NR_Linux + 12) -#define __NR_time (__NR_Linux + 13) -#define __NR_mknod (__NR_Linux + 14) -#define __NR_chmod (__NR_Linux + 15) -#define __NR_lchown (__NR_Linux + 16) -#define __NR_socket (__NR_Linux + 17) -#define __NR_stat (__NR_Linux + 18) -#define __NR_lseek (__NR_Linux + 19) -#define __NR_getpid (__NR_Linux + 20) -#define __NR_mount (__NR_Linux + 21) -#define __NR_bind (__NR_Linux + 22) -#define __NR_setuid (__NR_Linux + 23) -#define __NR_getuid (__NR_Linux + 24) -#define __NR_stime (__NR_Linux + 25) -#define __NR_ptrace (__NR_Linux + 26) -#define __NR_alarm (__NR_Linux + 27) -#define __NR_fstat (__NR_Linux + 28) -#define __NR_pause (__NR_Linux + 29) -#define __NR_utime (__NR_Linux + 30) -#define __NR_connect (__NR_Linux + 31) -#define __NR_listen (__NR_Linux + 32) -#define __NR_access (__NR_Linux + 33) -#define __NR_nice (__NR_Linux + 34) -#define __NR_accept (__NR_Linux + 35) -#define __NR_sync (__NR_Linux + 36) -#define __NR_kill (__NR_Linux + 37) -#define __NR_rename (__NR_Linux + 38) -#define __NR_mkdir (__NR_Linux + 39) -#define __NR_rmdir (__NR_Linux + 40) -#define __NR_dup (__NR_Linux + 41) -#define __NR_pipe (__NR_Linux + 42) -#define __NR_times (__NR_Linux + 43) -#define __NR_getsockname (__NR_Linux + 44) -#define __NR_brk (__NR_Linux + 45) -#define __NR_setgid (__NR_Linux + 46) -#define __NR_getgid (__NR_Linux + 47) -#define __NR_signal (__NR_Linux + 48) -#define __NR_geteuid (__NR_Linux + 49) -#define __NR_getegid (__NR_Linux + 50) -#define __NR_acct (__NR_Linux + 51) -#define __NR_umount2 (__NR_Linux + 52) -#define __NR_getpeername (__NR_Linux + 53) -#define __NR_ioctl (__NR_Linux + 54) -#define __NR_fcntl (__NR_Linux + 55) -#define __NR_socketpair (__NR_Linux + 56) -#define __NR_setpgid (__NR_Linux + 57) -#define __NR_send (__NR_Linux + 58) -#define __NR_uname (__NR_Linux + 59) -#define __NR_umask (__NR_Linux + 60) -#define __NR_chroot (__NR_Linux + 61) -#define __NR_ustat (__NR_Linux + 62) -#define __NR_dup2 (__NR_Linux + 63) -#define __NR_getppid (__NR_Linux + 64) -#define __NR_getpgrp (__NR_Linux + 65) -#define __NR_setsid (__NR_Linux + 66) -#define __NR_pivot_root (__NR_Linux + 67) -#define __NR_sgetmask (__NR_Linux + 68) -#define __NR_ssetmask (__NR_Linux + 69) -#define __NR_setreuid (__NR_Linux + 70) -#define __NR_setregid (__NR_Linux + 71) -#define __NR_mincore (__NR_Linux + 72) -#define __NR_sigpending (__NR_Linux + 73) -#define __NR_sethostname (__NR_Linux + 74) -#define __NR_setrlimit (__NR_Linux + 75) -#define __NR_getrlimit (__NR_Linux + 76) -#define __NR_getrusage (__NR_Linux + 77) -#define __NR_gettimeofday (__NR_Linux + 78) -#define __NR_settimeofday (__NR_Linux + 79) -#define __NR_getgroups (__NR_Linux + 80) -#define __NR_setgroups (__NR_Linux + 81) -#define __NR_sendto (__NR_Linux + 82) -#define __NR_symlink (__NR_Linux + 83) -#define __NR_lstat (__NR_Linux + 84) -#define __NR_readlink (__NR_Linux + 85) -#define __NR_uselib (__NR_Linux + 86) -#define __NR_swapon (__NR_Linux + 87) -#define __NR_reboot (__NR_Linux + 88) -#define __NR_mmap2 (__NR_Linux + 89) -#define __NR_mmap (__NR_Linux + 90) -#define __NR_munmap (__NR_Linux + 91) -#define __NR_truncate (__NR_Linux + 92) -#define __NR_ftruncate (__NR_Linux + 93) -#define __NR_fchmod (__NR_Linux + 94) -#define __NR_fchown (__NR_Linux + 95) -#define __NR_getpriority (__NR_Linux + 96) -#define __NR_setpriority (__NR_Linux + 97) -#define __NR_recv (__NR_Linux + 98) -#define __NR_statfs (__NR_Linux + 99) -#define __NR_fstatfs (__NR_Linux + 100) -#define __NR_stat64 (__NR_Linux + 101) -/* #define __NR_socketcall (__NR_Linux + 102) */ -#define __NR_syslog (__NR_Linux + 103) -#define __NR_setitimer (__NR_Linux + 104) -#define __NR_getitimer (__NR_Linux + 105) -#define __NR_capget (__NR_Linux + 106) -#define __NR_capset (__NR_Linux + 107) -#define __NR_pread64 (__NR_Linux + 108) -#define __NR_pwrite64 (__NR_Linux + 109) -#define __NR_getcwd (__NR_Linux + 110) -#define __NR_vhangup (__NR_Linux + 111) -#define __NR_fstat64 (__NR_Linux + 112) -#define __NR_vfork (__NR_Linux + 113) -#define __NR_wait4 (__NR_Linux + 114) -#define __NR_swapoff (__NR_Linux + 115) -#define __NR_sysinfo (__NR_Linux + 116) -#define __NR_shutdown (__NR_Linux + 117) -#define __NR_fsync (__NR_Linux + 118) -#define __NR_madvise (__NR_Linux + 119) -#define __NR_clone (__NR_Linux + 120) -#define __NR_setdomainname (__NR_Linux + 121) -#define __NR_sendfile (__NR_Linux + 122) -#define __NR_recvfrom (__NR_Linux + 123) -#define __NR_adjtimex (__NR_Linux + 124) -#define __NR_mprotect (__NR_Linux + 125) -#define __NR_sigprocmask (__NR_Linux + 126) -#define __NR_create_module (__NR_Linux + 127) -#define __NR_init_module (__NR_Linux + 128) -#define __NR_delete_module (__NR_Linux + 129) -#define __NR_get_kernel_syms (__NR_Linux + 130) -#define __NR_quotactl (__NR_Linux + 131) -#define __NR_getpgid (__NR_Linux + 132) -#define __NR_fchdir (__NR_Linux + 133) -#define __NR_bdflush (__NR_Linux + 134) -#define __NR_sysfs (__NR_Linux + 135) -#define __NR_personality (__NR_Linux + 136) -#define __NR_afs_syscall (__NR_Linux + 137) /* Syscall for Andrew File System */ -#define __NR_setfsuid (__NR_Linux + 138) -#define __NR_setfsgid (__NR_Linux + 139) -#define __NR__llseek (__NR_Linux + 140) -#define __NR_getdents (__NR_Linux + 141) -#define __NR__newselect (__NR_Linux + 142) -#define __NR_flock (__NR_Linux + 143) -#define __NR_msync (__NR_Linux + 144) -#define __NR_readv (__NR_Linux + 145) -#define __NR_writev (__NR_Linux + 146) -#define __NR_getsid (__NR_Linux + 147) -#define __NR_fdatasync (__NR_Linux + 148) -#define __NR__sysctl (__NR_Linux + 149) -#define __NR_mlock (__NR_Linux + 150) -#define __NR_munlock (__NR_Linux + 151) -#define __NR_mlockall (__NR_Linux + 152) -#define __NR_munlockall (__NR_Linux + 153) -#define __NR_sched_setparam (__NR_Linux + 154) -#define __NR_sched_getparam (__NR_Linux + 155) -#define __NR_sched_setscheduler (__NR_Linux + 156) -#define __NR_sched_getscheduler (__NR_Linux + 157) -#define __NR_sched_yield (__NR_Linux + 158) -#define __NR_sched_get_priority_max (__NR_Linux + 159) -#define __NR_sched_get_priority_min (__NR_Linux + 160) -#define __NR_sched_rr_get_interval (__NR_Linux + 161) -#define __NR_nanosleep (__NR_Linux + 162) -#define __NR_mremap (__NR_Linux + 163) -#define __NR_setresuid (__NR_Linux + 164) -#define __NR_getresuid (__NR_Linux + 165) -#define __NR_sigaltstack (__NR_Linux + 166) -#define __NR_query_module (__NR_Linux + 167) -#define __NR_poll (__NR_Linux + 168) -#define __NR_nfsservctl (__NR_Linux + 169) -#define __NR_setresgid (__NR_Linux + 170) -#define __NR_getresgid (__NR_Linux + 171) -#define __NR_prctl (__NR_Linux + 172) -#define __NR_rt_sigreturn (__NR_Linux + 173) -#define __NR_rt_sigaction (__NR_Linux + 174) -#define __NR_rt_sigprocmask (__NR_Linux + 175) -#define __NR_rt_sigpending (__NR_Linux + 176) -#define __NR_rt_sigtimedwait (__NR_Linux + 177) -#define __NR_rt_sigqueueinfo (__NR_Linux + 178) -#define __NR_rt_sigsuspend (__NR_Linux + 179) -#define __NR_chown (__NR_Linux + 180) -#define __NR_setsockopt (__NR_Linux + 181) -#define __NR_getsockopt (__NR_Linux + 182) -#define __NR_sendmsg (__NR_Linux + 183) -#define __NR_recvmsg (__NR_Linux + 184) -#define __NR_semop (__NR_Linux + 185) -#define __NR_semget (__NR_Linux + 186) -#define __NR_semctl (__NR_Linux + 187) -#define __NR_msgsnd (__NR_Linux + 188) -#define __NR_msgrcv (__NR_Linux + 189) -#define __NR_msgget (__NR_Linux + 190) -#define __NR_msgctl (__NR_Linux + 191) -#define __NR_shmat (__NR_Linux + 192) -#define __NR_shmdt (__NR_Linux + 193) -#define __NR_shmget (__NR_Linux + 194) -#define __NR_shmctl (__NR_Linux + 195) - -#define __NR_getpmsg (__NR_Linux + 196) /* Somebody *wants* streams? */ -#define __NR_putpmsg (__NR_Linux + 197) - -#define __NR_lstat64 (__NR_Linux + 198) -#define __NR_truncate64 (__NR_Linux + 199) -#define __NR_ftruncate64 (__NR_Linux + 200) -#define __NR_getdents64 (__NR_Linux + 201) -#define __NR_fcntl64 (__NR_Linux + 202) -#define __NR_attrctl (__NR_Linux + 203) -#define __NR_acl_get (__NR_Linux + 204) -#define __NR_acl_set (__NR_Linux + 205) -#define __NR_gettid (__NR_Linux + 206) -#define __NR_readahead (__NR_Linux + 207) -#define __NR_tkill (__NR_Linux + 208) -#define __NR_sendfile64 (__NR_Linux + 209) -#define __NR_futex (__NR_Linux + 210) -#define __NR_sched_setaffinity (__NR_Linux + 211) -#define __NR_sched_getaffinity (__NR_Linux + 212) -#define __NR_set_thread_area (__NR_Linux + 213) -#define __NR_get_thread_area (__NR_Linux + 214) -#define __NR_io_setup (__NR_Linux + 215) -#define __NR_io_destroy (__NR_Linux + 216) -#define __NR_io_getevents (__NR_Linux + 217) -#define __NR_io_submit (__NR_Linux + 218) -#define __NR_io_cancel (__NR_Linux + 219) -#define __NR_alloc_hugepages (__NR_Linux + 220) -#define __NR_free_hugepages (__NR_Linux + 221) -#define __NR_exit_group (__NR_Linux + 222) -#define __NR_lookup_dcookie (__NR_Linux + 223) -#define __NR_epoll_create (__NR_Linux + 224) -#define __NR_epoll_ctl (__NR_Linux + 225) -#define __NR_epoll_wait (__NR_Linux + 226) -#define __NR_remap_file_pages (__NR_Linux + 227) -#define __NR_semtimedop (__NR_Linux + 228) -#define __NR_mq_open (__NR_Linux + 229) -#define __NR_mq_unlink (__NR_Linux + 230) -#define __NR_mq_timedsend (__NR_Linux + 231) -#define __NR_mq_timedreceive (__NR_Linux + 232) -#define __NR_mq_notify (__NR_Linux + 233) -#define __NR_mq_getsetattr (__NR_Linux + 234) -#define __NR_waitid (__NR_Linux + 235) -#define __NR_fadvise64_64 (__NR_Linux + 236) -#define __NR_set_tid_address (__NR_Linux + 237) -#define __NR_setxattr (__NR_Linux + 238) -#define __NR_lsetxattr (__NR_Linux + 239) -#define __NR_fsetxattr (__NR_Linux + 240) -#define __NR_getxattr (__NR_Linux + 241) -#define __NR_lgetxattr (__NR_Linux + 242) -#define __NR_fgetxattr (__NR_Linux + 243) -#define __NR_listxattr (__NR_Linux + 244) -#define __NR_llistxattr (__NR_Linux + 245) -#define __NR_flistxattr (__NR_Linux + 246) -#define __NR_removexattr (__NR_Linux + 247) -#define __NR_lremovexattr (__NR_Linux + 248) -#define __NR_fremovexattr (__NR_Linux + 249) -#define __NR_timer_create (__NR_Linux + 250) -#define __NR_timer_settime (__NR_Linux + 251) -#define __NR_timer_gettime (__NR_Linux + 252) -#define __NR_timer_getoverrun (__NR_Linux + 253) -#define __NR_timer_delete (__NR_Linux + 254) -#define __NR_clock_settime (__NR_Linux + 255) -#define __NR_clock_gettime (__NR_Linux + 256) -#define __NR_clock_getres (__NR_Linux + 257) -#define __NR_clock_nanosleep (__NR_Linux + 258) -#define __NR_tgkill (__NR_Linux + 259) -#define __NR_mbind (__NR_Linux + 260) -#define __NR_get_mempolicy (__NR_Linux + 261) -#define __NR_set_mempolicy (__NR_Linux + 262) -#define __NR_vserver (__NR_Linux + 263) -#define __NR_add_key (__NR_Linux + 264) -#define __NR_request_key (__NR_Linux + 265) -#define __NR_keyctl (__NR_Linux + 266) -#define __NR_ioprio_set (__NR_Linux + 267) -#define __NR_ioprio_get (__NR_Linux + 268) -#define __NR_inotify_init (__NR_Linux + 269) -#define __NR_inotify_add_watch (__NR_Linux + 270) -#define __NR_inotify_rm_watch (__NR_Linux + 271) -#define __NR_migrate_pages (__NR_Linux + 272) -#define __NR_pselect6 (__NR_Linux + 273) -#define __NR_ppoll (__NR_Linux + 274) -#define __NR_openat (__NR_Linux + 275) -#define __NR_mkdirat (__NR_Linux + 276) -#define __NR_mknodat (__NR_Linux + 277) -#define __NR_fchownat (__NR_Linux + 278) -#define __NR_futimesat (__NR_Linux + 279) -#define __NR_fstatat64 (__NR_Linux + 280) -#define __NR_unlinkat (__NR_Linux + 281) -#define __NR_renameat (__NR_Linux + 282) -#define __NR_linkat (__NR_Linux + 283) -#define __NR_symlinkat (__NR_Linux + 284) -#define __NR_readlinkat (__NR_Linux + 285) -#define __NR_fchmodat (__NR_Linux + 286) -#define __NR_faccessat (__NR_Linux + 287) -#define __NR_unshare (__NR_Linux + 288) -#define __NR_set_robust_list (__NR_Linux + 289) -#define __NR_get_robust_list (__NR_Linux + 290) -#define __NR_splice (__NR_Linux + 291) -#define __NR_sync_file_range (__NR_Linux + 292) -#define __NR_tee (__NR_Linux + 293) -#define __NR_vmsplice (__NR_Linux + 294) -#define __NR_move_pages (__NR_Linux + 295) -#define __NR_getcpu (__NR_Linux + 296) -#define __NR_epoll_pwait (__NR_Linux + 297) -#define __NR_statfs64 (__NR_Linux + 298) -#define __NR_fstatfs64 (__NR_Linux + 299) -#define __NR_kexec_load (__NR_Linux + 300) -#define __NR_utimensat (__NR_Linux + 301) -#define __NR_signalfd (__NR_Linux + 302) -#define __NR_timerfd (__NR_Linux + 303) -#define __NR_eventfd (__NR_Linux + 304) -#define __NR_fallocate (__NR_Linux + 305) -#define __NR_timerfd_create (__NR_Linux + 306) -#define __NR_timerfd_settime (__NR_Linux + 307) -#define __NR_timerfd_gettime (__NR_Linux + 308) -#define __NR_signalfd4 (__NR_Linux + 309) -#define __NR_eventfd2 (__NR_Linux + 310) -#define __NR_epoll_create1 (__NR_Linux + 311) -#define __NR_dup3 (__NR_Linux + 312) -#define __NR_pipe2 (__NR_Linux + 313) -#define __NR_inotify_init1 (__NR_Linux + 314) -#define __NR_preadv (__NR_Linux + 315) -#define __NR_pwritev (__NR_Linux + 316) -#define __NR_rt_tgsigqueueinfo (__NR_Linux + 317) -#define __NR_perf_event_open (__NR_Linux + 318) -#define __NR_recvmmsg (__NR_Linux + 319) -#define __NR_accept4 (__NR_Linux + 320) -#define __NR_prlimit64 (__NR_Linux + 321) -#define __NR_fanotify_init (__NR_Linux + 322) -#define __NR_fanotify_mark (__NR_Linux + 323) -#define __NR_clock_adjtime (__NR_Linux + 324) -#define __NR_name_to_handle_at (__NR_Linux + 325) -#define __NR_open_by_handle_at (__NR_Linux + 326) -#define __NR_syncfs (__NR_Linux + 327) -#define __NR_setns (__NR_Linux + 328) -#define __NR_sendmmsg (__NR_Linux + 329) - -#define __NR_Linux_syscalls (__NR_sendmmsg + 1) - - -#define __IGNORE_select /* newselect */ -#define __IGNORE_fadvise64 /* fadvise64_64 */ -#define __IGNORE_utimes /* utime */ - - -#define HPUX_GATEWAY_ADDR 0xC0000004 -#define LINUX_GATEWAY_ADDR 0x100 +#include <uapi/asm/unistd.h> -#ifdef __KERNEL__ #ifndef __ASSEMBLY__ #define SYS_ify(syscall_name) __NR_##syscall_name @@ -1008,5 +176,4 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif /* __KERNEL__ */ #endif /* _ASM_PARISC_UNISTD_H_ */ diff --git a/arch/parisc/include/asm/user.h b/arch/parisc/include/asm/user.h deleted file mode 100644 index 80224753e508..000000000000 --- a/arch/parisc/include/asm/user.h +++ /dev/null @@ -1,5 +0,0 @@ -/* This file should not exist, but lots of generic code still includes - it. It's a hangover from old a.out days and the traditional core - dump format. We are ELF-only, and so are our core dumps. If we - need to support HP/UX core format then we'll do it here - eventually. */ diff --git a/arch/parisc/include/asm/vga.h b/arch/parisc/include/asm/vga.h deleted file mode 100644 index 171399a88ca6..000000000000 --- a/arch/parisc/include/asm/vga.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_PARISC_VGA_H__ -#define __ASM_PARISC_VGA_H__ - -/* nothing */ - -#endif /* __ASM_PARISC_VGA_H__ */ diff --git a/arch/parisc/include/asm/xor.h b/arch/parisc/include/asm/xor.h deleted file mode 100644 index c82eb12a5b18..000000000000 --- a/arch/parisc/include/asm/xor.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/xor.h> diff --git a/arch/parisc/include/uapi/asm/Kbuild b/arch/parisc/include/uapi/asm/Kbuild index baebb3da1d44..a580642555b6 100644 --- a/arch/parisc/include/uapi/asm/Kbuild +++ b/arch/parisc/include/uapi/asm/Kbuild @@ -1,3 +1,31 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +header-y += bitsperlong.h +header-y += byteorder.h +header-y += errno.h +header-y += fcntl.h +header-y += ioctl.h +header-y += ioctls.h +header-y += ipcbuf.h +header-y += mman.h +header-y += msgbuf.h +header-y += pdc.h +header-y += posix_types.h +header-y += ptrace.h +header-y += resource.h +header-y += sembuf.h +header-y += setup.h +header-y += shmbuf.h +header-y += sigcontext.h +header-y += siginfo.h +header-y += signal.h +header-y += socket.h +header-y += sockios.h +header-y += stat.h +header-y += statfs.h +header-y += swab.h +header-y += termbits.h +header-y += termios.h +header-y += types.h +header-y += unistd.h diff --git a/arch/parisc/include/asm/bitsperlong.h b/arch/parisc/include/uapi/asm/bitsperlong.h index 75196b415d3f..75196b415d3f 100644 --- a/arch/parisc/include/asm/bitsperlong.h +++ b/arch/parisc/include/uapi/asm/bitsperlong.h diff --git a/arch/parisc/include/asm/byteorder.h b/arch/parisc/include/uapi/asm/byteorder.h index 58af2c5f5d61..58af2c5f5d61 100644 --- a/arch/parisc/include/asm/byteorder.h +++ b/arch/parisc/include/uapi/asm/byteorder.h diff --git a/arch/parisc/include/asm/errno.h b/arch/parisc/include/uapi/asm/errno.h index 135ad6047e51..135ad6047e51 100644 --- a/arch/parisc/include/asm/errno.h +++ b/arch/parisc/include/uapi/asm/errno.h diff --git a/arch/parisc/include/asm/fcntl.h b/arch/parisc/include/uapi/asm/fcntl.h index 0304b92ccfea..0304b92ccfea 100644 --- a/arch/parisc/include/asm/fcntl.h +++ b/arch/parisc/include/uapi/asm/fcntl.h diff --git a/arch/parisc/include/asm/ioctl.h b/arch/parisc/include/uapi/asm/ioctl.h index ec8efa02beda..ec8efa02beda 100644 --- a/arch/parisc/include/asm/ioctl.h +++ b/arch/parisc/include/uapi/asm/ioctl.h diff --git a/arch/parisc/include/asm/ioctls.h b/arch/parisc/include/uapi/asm/ioctls.h index 054ec06f9e23..054ec06f9e23 100644 --- a/arch/parisc/include/asm/ioctls.h +++ b/arch/parisc/include/uapi/asm/ioctls.h diff --git a/arch/parisc/include/asm/ipcbuf.h b/arch/parisc/include/uapi/asm/ipcbuf.h index bd956c425785..bd956c425785 100644 --- a/arch/parisc/include/asm/ipcbuf.h +++ b/arch/parisc/include/uapi/asm/ipcbuf.h diff --git a/arch/parisc/include/asm/mman.h b/arch/parisc/include/uapi/asm/mman.h index 12219ebce869..12219ebce869 100644 --- a/arch/parisc/include/asm/mman.h +++ b/arch/parisc/include/uapi/asm/mman.h diff --git a/arch/parisc/include/asm/msgbuf.h b/arch/parisc/include/uapi/asm/msgbuf.h index fe88f2649418..fe88f2649418 100644 --- a/arch/parisc/include/asm/msgbuf.h +++ b/arch/parisc/include/uapi/asm/msgbuf.h diff --git a/arch/parisc/include/uapi/asm/pdc.h b/arch/parisc/include/uapi/asm/pdc.h new file mode 100644 index 000000000000..702498f7705b --- /dev/null +++ b/arch/parisc/include/uapi/asm/pdc.h @@ -0,0 +1,427 @@ +#ifndef _UAPI_PARISC_PDC_H +#define _UAPI_PARISC_PDC_H + +/* + * PDC return values ... + * All PDC calls return a subset of these errors. + */ + +#define PDC_WARN 3 /* Call completed with a warning */ +#define PDC_REQ_ERR_1 2 /* See above */ +#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */ +#define PDC_OK 0 /* Call completed successfully */ +#define PDC_BAD_PROC -1 /* Called non-existent procedure*/ +#define PDC_BAD_OPTION -2 /* Called with non-existent option */ +#define PDC_ERROR -3 /* Call could not complete without an error */ +#define PDC_NE_MOD -5 /* Module not found */ +#define PDC_NE_CELL_MOD -7 /* Cell module not found */ +#define PDC_INVALID_ARG -10 /* Called with an invalid argument */ +#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */ +#define PDC_NOT_NARROW -17 /* Narrow mode not supported */ + +/* + * PDC entry points... + */ + +#define PDC_POW_FAIL 1 /* perform a power-fail */ +#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */ + +#define PDC_CHASSIS 2 /* PDC-chassis functions */ +#define PDC_CHASSIS_DISP 0 /* update chassis display */ +#define PDC_CHASSIS_WARN 1 /* return chassis warnings */ +#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */ +#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */ + +#define PDC_PIM 3 /* Get PIM data */ +#define PDC_PIM_HPMC 0 /* Transfer HPMC data */ +#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/ +#define PDC_PIM_LPMC 2 /* Transfer HPMC data */ +#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */ +#define PDC_PIM_TOC 4 /* Transfer TOC data */ + +#define PDC_MODEL 4 /* PDC model information call */ +#define PDC_MODEL_INFO 0 /* returns information */ +#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */ +#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/ +#define PDC_MODEL_SYSMODEL 3 /* return system model info */ +#define PDC_MODEL_ENSPEC 4 /* enable specific option */ +#define PDC_MODEL_DISPEC 5 /* disable specific option */ +#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */ +#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */ +/* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */ +#define PDC_MODEL_OS64 (1 << 0) +#define PDC_MODEL_OS32 (1 << 1) +#define PDC_MODEL_IOPDIR_FDC (1 << 2) +#define PDC_MODEL_NVA_MASK (3 << 4) +#define PDC_MODEL_NVA_SUPPORTED (0 << 4) +#define PDC_MODEL_NVA_SLOW (1 << 4) +#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4) +#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */ +#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */ + +#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */ +#define PA90_INSTRUCTION_SET 0x8 + +#define PDC_CACHE 5 /* return/set cache (& TLB) info*/ +#define PDC_CACHE_INFO 0 /* returns information */ +#define PDC_CACHE_SET_COH 1 /* set coherence state */ +#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */ + +#define PDC_HPA 6 /* return HPA of processor */ +#define PDC_HPA_PROCESSOR 0 +#define PDC_HPA_MODULES 1 + +#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */ +#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */ + +#define PDC_IODC 8 /* talk to IODC */ +#define PDC_IODC_READ 0 /* read IODC entry point */ +/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */ +#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */ +/* 1, 2 obsolete - HVERSION dependent*/ +#define PDC_IODC_RI_INIT 3 /* Initialize module */ +#define PDC_IODC_RI_IO 4 /* Module input/output */ +#define PDC_IODC_RI_SPA 5 /* Module input/output */ +#define PDC_IODC_RI_CONFIG 6 /* Module input/output */ +/* 7 obsolete - HVERSION dependent */ +#define PDC_IODC_RI_TEST 8 /* Module input/output */ +#define PDC_IODC_RI_TLB 9 /* Module input/output */ +#define PDC_IODC_NINIT 2 /* non-destructive init */ +#define PDC_IODC_DINIT 3 /* destructive init */ +#define PDC_IODC_MEMERR 4 /* check for memory errors */ +#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */ +#define PDC_IODC_BUS_ERROR -4 /* bus error return value */ +#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */ +#define PDC_IODC_COUNT -6 /* count is too small */ + +#define PDC_TOD 9 /* time-of-day clock (TOD) */ +#define PDC_TOD_READ 0 /* read TOD */ +#define PDC_TOD_WRITE 1 /* write TOD */ + + +#define PDC_STABLE 10 /* stable storage (sprockets) */ +#define PDC_STABLE_READ 0 +#define PDC_STABLE_WRITE 1 +#define PDC_STABLE_RETURN_SIZE 2 +#define PDC_STABLE_VERIFY_CONTENTS 3 +#define PDC_STABLE_INITIALIZE 4 + +#define PDC_NVOLATILE 11 /* often not implemented */ + +#define PDC_ADD_VALID 12 /* Memory validation PDC call */ +#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */ + +#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */ + +#define PDC_PROC 16 /* (sprockets) */ + +#define PDC_CONFIG 16 /* (sprockets) */ +#define PDC_CONFIG_DECONFIG 0 +#define PDC_CONFIG_DRECONFIG 1 +#define PDC_CONFIG_DRETURN_CONFIG 2 + +#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */ +#define PDC_BTLB_INFO 0 /* returns parameter */ +#define PDC_BTLB_INSERT 1 /* insert BTLB entry */ +#define PDC_BTLB_PURGE 2 /* purge BTLB entries */ +#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */ + +#define PDC_TLB 19 /* manage hardware TLB miss handling */ +#define PDC_TLB_INFO 0 /* returns parameter */ +#define PDC_TLB_SETUP 1 /* set up miss handling */ + +#define PDC_MEM 20 /* Manage memory */ +#define PDC_MEM_MEMINFO 0 +#define PDC_MEM_ADD_PAGE 1 +#define PDC_MEM_CLEAR_PDT 2 +#define PDC_MEM_READ_PDT 3 +#define PDC_MEM_RESET_CLEAR 4 +#define PDC_MEM_GOODMEM 5 +#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */ +#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE +#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131 +#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132 +#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133 + +#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */ +#define PDC_MEM_RET_DUPLICATE_ENTRY 4 +#define PDC_MEM_RET_BUF_SIZE_SMALL 1 +#define PDC_MEM_RET_PDT_FULL -11 +#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL + +#define PDC_PSW 21 /* Get/Set default System Mask */ +#define PDC_PSW_MASK 0 /* Return mask */ +#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */ +#define PDC_PSW_SET_DEFAULTS 2 /* Set default */ +#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */ +#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */ + +#define PDC_SYSTEM_MAP 22 /* find system modules */ +#define PDC_FIND_MODULE 0 +#define PDC_FIND_ADDRESS 1 +#define PDC_TRANSLATE_PATH 2 + +#define PDC_SOFT_POWER 23 /* soft power switch */ +#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */ +#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */ + + +/* HVERSION dependent */ + +/* The PDC_MEM_MAP calls */ +#define PDC_MEM_MAP 128 /* on s700: return page info */ +#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */ + +#define PDC_EEPROM 129 /* EEPROM access */ +#define PDC_EEPROM_READ_WORD 0 +#define PDC_EEPROM_WRITE_WORD 1 +#define PDC_EEPROM_READ_BYTE 2 +#define PDC_EEPROM_WRITE_BYTE 3 +#define PDC_EEPROM_EEPROM_PASSWORD -1000 + +#define PDC_NVM 130 /* NVM (non-volatile memory) access */ +#define PDC_NVM_READ_WORD 0 +#define PDC_NVM_WRITE_WORD 1 +#define PDC_NVM_READ_BYTE 2 +#define PDC_NVM_WRITE_BYTE 3 + +#define PDC_SEED_ERROR 132 /* (sprockets) */ + +#define PDC_IO 135 /* log error info, reset IO system */ +#define PDC_IO_READ_AND_CLEAR_ERRORS 0 +#define PDC_IO_RESET 1 +#define PDC_IO_RESET_DEVICES 2 +/* sets bits 6&7 (little endian) of the HcControl Register */ +#define PDC_IO_USB_SUSPEND 0xC000000000000000 +#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */ +#define PDC_IO_NO_SUSPEND -6 /* return value */ + +#define PDC_BROADCAST_RESET 136 /* reset all processors */ +#define PDC_DO_RESET 0 /* option: perform a broadcast reset */ +#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */ +#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */ +#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */ + +#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */ +#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */ + +#define PDC_LAN_STATION_ID_SIZE 6 + +#define PDC_CHECK_RANGES 139 /* (sprockets) */ + +#define PDC_NV_SECTIONS 141 /* (sprockets) */ + +#define PDC_PERFORMANCE 142 /* performance monitoring */ + +#define PDC_SYSTEM_INFO 143 /* system information */ +#define PDC_SYSINFO_RETURN_INFO_SIZE 0 +#define PDC_SYSINFO_RRETURN_SYS_INFO 1 +#define PDC_SYSINFO_RRETURN_ERRORS 2 +#define PDC_SYSINFO_RRETURN_WARNINGS 3 +#define PDC_SYSINFO_RETURN_REVISIONS 4 +#define PDC_SYSINFO_RRETURN_DIAGNOSE 5 +#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005 + +#define PDC_RDR 144 /* (sprockets) */ +#define PDC_RDR_READ_BUFFER 0 +#define PDC_RDR_READ_SINGLE 1 +#define PDC_RDR_WRITE_SINGLE 2 + +#define PDC_INTRIGUE 145 /* (sprockets) */ +#define PDC_INTRIGUE_WRITE_BUFFER 0 +#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1 +#define PDC_INTRIGUE_START_CPU_COUNTERS 2 +#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3 + +#define PDC_STI 146 /* STI access */ +/* same as PDC_PCI_XXX values (see below) */ + +/* Legacy PDC definitions for same stuff */ +#define PDC_PCI_INDEX 147 +#define PDC_PCI_INTERFACE_INFO 0 +#define PDC_PCI_SLOT_INFO 1 +#define PDC_PCI_INFLIGHT_BYTES 2 +#define PDC_PCI_READ_CONFIG 3 +#define PDC_PCI_WRITE_CONFIG 4 +#define PDC_PCI_READ_PCI_IO 5 +#define PDC_PCI_WRITE_PCI_IO 6 +#define PDC_PCI_READ_CONFIG_DELAY 7 +#define PDC_PCI_UPDATE_CONFIG_DELAY 8 +#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9 +#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10 +#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11 +#define PDC_PCI_PCI_RESERVED 12 +#define PDC_PCI_PCI_INT_ROUTE_SIZE 13 +#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE +#define PDC_PCI_PCI_INT_ROUTE 14 +#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE +#define PDC_PCI_READ_MON_TYPE 15 +#define PDC_PCI_WRITE_MON_TYPE 16 + + +/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */ +#define PDC_INITIATOR 163 +#define PDC_GET_INITIATOR 0 +#define PDC_SET_INITIATOR 1 +#define PDC_DELETE_INITIATOR 2 +#define PDC_RETURN_TABLE_SIZE 3 +#define PDC_RETURN_TABLE 4 + +#define PDC_LINK 165 /* (sprockets) */ +#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */ +#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */ + +/* cl_class + * page 3-33 of IO-Firmware ARS + * IODC ENTRY_INIT(Search first) RET[1] + */ +#define CL_NULL 0 /* invalid */ +#define CL_RANDOM 1 /* random access (as disk) */ +#define CL_SEQU 2 /* sequential access (as tape) */ +#define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */ +#define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */ +#define CL_DISPL 9 /* half-duplex console (display) */ +#define CL_FC 10 /* FiberChannel access media */ + +/* IODC ENTRY_INIT() */ +#define ENTRY_INIT_SRCH_FRST 2 +#define ENTRY_INIT_SRCH_NEXT 3 +#define ENTRY_INIT_MOD_DEV 4 +#define ENTRY_INIT_DEV 5 +#define ENTRY_INIT_MOD 6 +#define ENTRY_INIT_MSG 9 + +/* IODC ENTRY_IO() */ +#define ENTRY_IO_BOOTIN 0 +#define ENTRY_IO_BOOTOUT 1 +#define ENTRY_IO_CIN 2 +#define ENTRY_IO_COUT 3 +#define ENTRY_IO_CLOSE 4 +#define ENTRY_IO_GETMSG 9 +#define ENTRY_IO_BBLOCK_IN 16 +#define ENTRY_IO_BBLOCK_OUT 17 + +/* IODC ENTRY_SPA() */ + +/* IODC ENTRY_CONFIG() */ + +/* IODC ENTRY_TEST() */ + +/* IODC ENTRY_TLB() */ + +/* constants for OS (NVM...) */ +#define OS_ID_NONE 0 /* Undefined OS ID */ +#define OS_ID_HPUX 1 /* HP-UX OS */ +#define OS_ID_MPEXL 2 /* MPE XL OS */ +#define OS_ID_OSF 3 /* OSF OS */ +#define OS_ID_HPRT 4 /* HP-RT OS */ +#define OS_ID_NOVEL 5 /* NOVELL OS */ +#define OS_ID_LINUX 6 /* Linux */ + + +/* constants for PDC_CHASSIS */ +#define OSTAT_OFF 0 +#define OSTAT_FLT 1 +#define OSTAT_TEST 2 +#define OSTAT_INIT 3 +#define OSTAT_SHUT 4 +#define OSTAT_WARN 5 +#define OSTAT_RUN 6 +#define OSTAT_ON 7 + +/* Page Zero constant offsets used by the HPMC handler */ +#define BOOT_CONSOLE_HPA_OFFSET 0x3c0 +#define BOOT_CONSOLE_SPA_OFFSET 0x3c4 +#define BOOT_CONSOLE_PATH_OFFSET 0x3a8 + +/* size of the pdc_result buffer for firmware.c */ +#define NUM_PDC_RESULT 32 + +#if !defined(__ASSEMBLY__) + +#include <linux/types.h> + + +/* flags of the device_path */ +#define PF_AUTOBOOT 0x80 +#define PF_AUTOSEARCH 0x40 +#define PF_TIMER 0x0F + +struct device_path { /* page 1-69 */ + unsigned char flags; /* flags see above! */ + unsigned char bc[6]; /* bus converter routing info */ + unsigned char mod; + unsigned int layers[6];/* device-specific layer-info */ +} __attribute__((aligned(8))) ; + +struct pz_device { + struct device_path dp; /* see above */ + /* struct iomod *hpa; */ + unsigned int hpa; /* HPA base address */ + /* char *spa; */ + unsigned int spa; /* SPA base address */ + /* int (*iodc_io)(struct iomod*, ...); */ + unsigned int iodc_io; /* device entry point */ + short pad; /* reserved */ + unsigned short cl_class;/* see below */ +} __attribute__((aligned(8))) ; + +struct zeropage { + /* [0x000] initialize vectors (VEC) */ + unsigned int vec_special; /* must be zero */ + /* int (*vec_pow_fail)(void);*/ + unsigned int vec_pow_fail; /* power failure handler */ + /* int (*vec_toc)(void); */ + unsigned int vec_toc; + unsigned int vec_toclen; + /* int (*vec_rendz)(void); */ + unsigned int vec_rendz; + int vec_pow_fail_flen; + int vec_pad[10]; + + /* [0x040] reserved processor dependent */ + int pad0[112]; + + /* [0x200] reserved */ + int pad1[84]; + + /* [0x350] memory configuration (MC) */ + int memc_cont; /* contiguous mem size (bytes) */ + int memc_phsize; /* physical memory size */ + int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */ + unsigned int mem_pdc_hi; /* used for 64-bit */ + + /* [0x360] various parameters for the boot-CPU */ + /* unsigned int *mem_booterr[8]; */ + unsigned int mem_booterr[8]; /* ptr to boot errors */ + unsigned int mem_free; /* first location, where OS can be loaded */ + /* struct iomod *mem_hpa; */ + unsigned int mem_hpa; /* HPA of the boot-CPU */ + /* int (*mem_pdc)(int, ...); */ + unsigned int mem_pdc; /* PDC entry point */ + unsigned int mem_10msec; /* number of clock ticks in 10msec */ + + /* [0x390] initial memory module (IMM) */ + /* struct iomod *imm_hpa; */ + unsigned int imm_hpa; /* HPA of the IMM */ + int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */ + unsigned int imm_spa_size; /* SPA size of the IMM in bytes */ + unsigned int imm_max_mem; /* bytes of mem in IMM */ + + /* [0x3A0] boot console, display device and keyboard */ + struct pz_device mem_cons; /* description of console device */ + struct pz_device mem_boot; /* description of boot device */ + struct pz_device mem_kbd; /* description of keyboard device */ + + /* [0x430] reserved */ + int pad430[116]; + + /* [0x600] processor dependent */ + __u32 pad600[1]; + __u32 proc_sti; /* pointer to STI ROM */ + __u32 pad608[126]; +}; + +#endif /* !defined(__ASSEMBLY__) */ + +#endif /* _UAPI_PARISC_PDC_H */ diff --git a/arch/parisc/include/asm/posix_types.h b/arch/parisc/include/uapi/asm/posix_types.h index b9344256f76b..b9344256f76b 100644 --- a/arch/parisc/include/asm/posix_types.h +++ b/arch/parisc/include/uapi/asm/posix_types.h diff --git a/arch/parisc/include/uapi/asm/ptrace.h b/arch/parisc/include/uapi/asm/ptrace.h new file mode 100644 index 000000000000..c4fa6c8b9ad9 --- /dev/null +++ b/arch/parisc/include/uapi/asm/ptrace.h @@ -0,0 +1,47 @@ +/* written by Philipp Rumpf, Copyright (C) 1999 SuSE GmbH Nuernberg +** Copyright (C) 2000 Grant Grundler, Hewlett-Packard +*/ +#ifndef _UAPI_PARISC_PTRACE_H +#define _UAPI_PARISC_PTRACE_H + + +#include <linux/types.h> + +/* This struct defines the way the registers are stored on the + * stack during a system call. + * + * N.B. gdb/strace care about the size and offsets within this + * structure. If you change things, you may break object compatibility + * for those applications. + */ + +struct pt_regs { + unsigned long gr[32]; /* PSW is in gr[0] */ + __u64 fr[32]; + unsigned long sr[ 8]; + unsigned long iasq[2]; + unsigned long iaoq[2]; + unsigned long cr27; + unsigned long pad0; /* available for other uses */ + unsigned long orig_r28; + unsigned long ksp; + unsigned long kpc; + unsigned long sar; /* CR11 */ + unsigned long iir; /* CR19 */ + unsigned long isr; /* CR20 */ + unsigned long ior; /* CR21 */ + unsigned long ipsw; /* CR22 */ +}; + +/* + * The numbers chosen here are somewhat arbitrary but absolutely MUST + * not overlap with any of the number assigned in <linux/ptrace.h>. + * + * These ones are taken from IA-64 on the assumption that theirs are + * the most correct (and we also want to support PTRACE_SINGLEBLOCK + * since we have taken branch traps too) + */ +#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */ + + +#endif /* _UAPI_PARISC_PTRACE_H */ diff --git a/arch/parisc/include/asm/resource.h b/arch/parisc/include/uapi/asm/resource.h index 8b06343b62ed..8b06343b62ed 100644 --- a/arch/parisc/include/asm/resource.h +++ b/arch/parisc/include/uapi/asm/resource.h diff --git a/arch/parisc/include/asm/sembuf.h b/arch/parisc/include/uapi/asm/sembuf.h index 1e59ffd3bd1e..1e59ffd3bd1e 100644 --- a/arch/parisc/include/asm/sembuf.h +++ b/arch/parisc/include/uapi/asm/sembuf.h diff --git a/arch/parisc/include/asm/setup.h b/arch/parisc/include/uapi/asm/setup.h index 7da2e5b8747e..7da2e5b8747e 100644 --- a/arch/parisc/include/asm/setup.h +++ b/arch/parisc/include/uapi/asm/setup.h diff --git a/arch/parisc/include/asm/shmbuf.h b/arch/parisc/include/uapi/asm/shmbuf.h index 0a3eada1863b..0a3eada1863b 100644 --- a/arch/parisc/include/asm/shmbuf.h +++ b/arch/parisc/include/uapi/asm/shmbuf.h diff --git a/arch/parisc/include/asm/sigcontext.h b/arch/parisc/include/uapi/asm/sigcontext.h index 27ef31bb3b6e..27ef31bb3b6e 100644 --- a/arch/parisc/include/asm/sigcontext.h +++ b/arch/parisc/include/uapi/asm/sigcontext.h diff --git a/arch/parisc/include/asm/siginfo.h b/arch/parisc/include/uapi/asm/siginfo.h index d7034728f377..d7034728f377 100644 --- a/arch/parisc/include/asm/siginfo.h +++ b/arch/parisc/include/uapi/asm/siginfo.h diff --git a/arch/parisc/include/uapi/asm/signal.h b/arch/parisc/include/uapi/asm/signal.h new file mode 100644 index 000000000000..b1ddaa243376 --- /dev/null +++ b/arch/parisc/include/uapi/asm/signal.h @@ -0,0 +1,118 @@ +#ifndef _UAPI_ASM_PARISC_SIGNAL_H +#define _UAPI_ASM_PARISC_SIGNAL_H + +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 +#define SIGEMT 7 +#define SIGFPE 8 +#define SIGKILL 9 +#define SIGBUS 10 +#define SIGSEGV 11 +#define SIGSYS 12 /* Linux doesn't use this */ +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGUSR1 16 +#define SIGUSR2 17 +#define SIGCHLD 18 +#define SIGPWR 19 +#define SIGVTALRM 20 +#define SIGPROF 21 +#define SIGIO 22 +#define SIGPOLL SIGIO +#define SIGWINCH 23 +#define SIGSTOP 24 +#define SIGTSTP 25 +#define SIGCONT 26 +#define SIGTTIN 27 +#define SIGTTOU 28 +#define SIGURG 29 +#define SIGLOST 30 /* Linux doesn't use this either */ +#define SIGUNUSED 31 +#define SIGRESERVE SIGUNUSED + +#define SIGXCPU 33 +#define SIGXFSZ 34 +#define SIGSTKFLT 36 + +/* These should not be considered constants from userland. */ +#define SIGRTMIN 37 +#define SIGRTMAX _NSIG /* it's 44 under HP/UX */ + +/* + * SA_FLAGS values: + * + * SA_ONSTACK indicates that a registered stack_t will be used. + * SA_RESTART flag to get restarting signals (which were the default long ago) + * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. + * SA_RESETHAND clears the handler when the signal is delivered. + * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. + * SA_NODEFER prevents the current signal from being masked in the handler. + * + * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single + * Unix names RESETHAND and NODEFER respectively. + */ +#define SA_ONSTACK 0x00000001 +#define SA_RESETHAND 0x00000004 +#define SA_NOCLDSTOP 0x00000008 +#define SA_SIGINFO 0x00000010 +#define SA_NODEFER 0x00000020 +#define SA_RESTART 0x00000040 +#define SA_NOCLDWAIT 0x00000080 +#define _SA_SIGGFAULT 0x00000100 /* HPUX */ + +#define SA_NOMASK SA_NODEFER +#define SA_ONESHOT SA_RESETHAND + +#define SA_RESTORER 0x04000000 /* obsolete -- ignored */ + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 2048 +#define SIGSTKSZ 8192 + + +#define SIG_BLOCK 0 /* for blocking signals */ +#define SIG_UNBLOCK 1 /* for unblocking signals */ +#define SIG_SETMASK 2 /* for setting the signal mask */ + +#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ +#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ +#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ + +# ifndef __ASSEMBLY__ + +# include <linux/types.h> + +/* Avoid too many header ordering problems. */ +struct siginfo; + +/* Type of a signal handler. */ +#ifdef CONFIG_64BIT +/* function pointers on 64-bit parisc are pointers to little structs and the + * compiler doesn't support code which changes or tests the address of + * the function in the little struct. This is really ugly -PB + */ +typedef char __user *__sighandler_t; +#else +typedef void __signalfn_t(int); +typedef __signalfn_t __user *__sighandler_t; +#endif + +typedef struct sigaltstack { + void __user *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#endif /* !__ASSEMBLY */ +#endif /* _UAPI_ASM_PARISC_SIGNAL_H */ diff --git a/arch/parisc/include/asm/socket.h b/arch/parisc/include/uapi/asm/socket.h index 1b52c2c31a7a..1b52c2c31a7a 100644 --- a/arch/parisc/include/asm/socket.h +++ b/arch/parisc/include/uapi/asm/socket.h diff --git a/arch/parisc/include/asm/sockios.h b/arch/parisc/include/uapi/asm/sockios.h index dabfbc7483f6..dabfbc7483f6 100644 --- a/arch/parisc/include/asm/sockios.h +++ b/arch/parisc/include/uapi/asm/sockios.h diff --git a/arch/parisc/include/asm/stat.h b/arch/parisc/include/uapi/asm/stat.h index d76fbda5d62c..d76fbda5d62c 100644 --- a/arch/parisc/include/asm/stat.h +++ b/arch/parisc/include/uapi/asm/stat.h diff --git a/arch/parisc/include/asm/statfs.h b/arch/parisc/include/uapi/asm/statfs.h index 324bea905dc6..324bea905dc6 100644 --- a/arch/parisc/include/asm/statfs.h +++ b/arch/parisc/include/uapi/asm/statfs.h diff --git a/arch/parisc/include/asm/swab.h b/arch/parisc/include/uapi/asm/swab.h index e78403b129ef..e78403b129ef 100644 --- a/arch/parisc/include/asm/swab.h +++ b/arch/parisc/include/uapi/asm/swab.h diff --git a/arch/parisc/include/asm/termbits.h b/arch/parisc/include/uapi/asm/termbits.h index d1ab92177a5c..d1ab92177a5c 100644 --- a/arch/parisc/include/asm/termbits.h +++ b/arch/parisc/include/uapi/asm/termbits.h diff --git a/arch/parisc/include/uapi/asm/termios.h b/arch/parisc/include/uapi/asm/termios.h new file mode 100644 index 000000000000..f3377395070d --- /dev/null +++ b/arch/parisc/include/uapi/asm/termios.h @@ -0,0 +1,43 @@ +#ifndef _UAPI_PARISC_TERMIOS_H +#define _UAPI_PARISC_TERMIOS_H + +#include <asm/termbits.h> +#include <asm/ioctls.h> + +struct winsize { + unsigned short ws_row; + unsigned short ws_col; + unsigned short ws_xpixel; + unsigned short ws_ypixel; +}; + +#define NCC 8 +struct termio { + unsigned short c_iflag; /* input mode flags */ + unsigned short c_oflag; /* output mode flags */ + unsigned short c_cflag; /* control mode flags */ + unsigned short c_lflag; /* local mode flags */ + unsigned char c_line; /* line discipline */ + unsigned char c_cc[NCC]; /* control characters */ +}; + +/* modem lines */ +#define TIOCM_LE 0x001 +#define TIOCM_DTR 0x002 +#define TIOCM_RTS 0x004 +#define TIOCM_ST 0x008 +#define TIOCM_SR 0x010 +#define TIOCM_CTS 0x020 +#define TIOCM_CAR 0x040 +#define TIOCM_RNG 0x080 +#define TIOCM_DSR 0x100 +#define TIOCM_CD TIOCM_CAR +#define TIOCM_RI TIOCM_RNG +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 + +/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ + + +#endif /* _UAPI_PARISC_TERMIOS_H */ diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/uapi/asm/types.h index 8866f9bbdeaf..8866f9bbdeaf 100644 --- a/arch/parisc/include/asm/types.h +++ b/arch/parisc/include/uapi/asm/types.h diff --git a/arch/parisc/include/uapi/asm/unistd.h b/arch/parisc/include/uapi/asm/unistd.h new file mode 100644 index 000000000000..e178f30f2ccc --- /dev/null +++ b/arch/parisc/include/uapi/asm/unistd.h @@ -0,0 +1,837 @@ +#ifndef _UAPI_ASM_PARISC_UNISTD_H_ +#define _UAPI_ASM_PARISC_UNISTD_H_ + +/* + * This file contains the system call numbers. + */ + +/* + * HP-UX system calls get their native numbers for binary compatibility. + */ + +#define __NR_HPUX_exit 1 +#define __NR_HPUX_fork 2 +#define __NR_HPUX_read 3 +#define __NR_HPUX_write 4 +#define __NR_HPUX_open 5 +#define __NR_HPUX_close 6 +#define __NR_HPUX_wait 7 +#define __NR_HPUX_creat 8 +#define __NR_HPUX_link 9 +#define __NR_HPUX_unlink 10 +#define __NR_HPUX_execv 11 +#define __NR_HPUX_chdir 12 +#define __NR_HPUX_time 13 +#define __NR_HPUX_mknod 14 +#define __NR_HPUX_chmod 15 +#define __NR_HPUX_chown 16 +#define __NR_HPUX_break 17 +#define __NR_HPUX_lchmod 18 +#define __NR_HPUX_lseek 19 +#define __NR_HPUX_getpid 20 +#define __NR_HPUX_mount 21 +#define __NR_HPUX_umount 22 +#define __NR_HPUX_setuid 23 +#define __NR_HPUX_getuid 24 +#define __NR_HPUX_stime 25 +#define __NR_HPUX_ptrace 26 +#define __NR_HPUX_alarm 27 +#define __NR_HPUX_oldfstat 28 +#define __NR_HPUX_pause 29 +#define __NR_HPUX_utime 30 +#define __NR_HPUX_stty 31 +#define __NR_HPUX_gtty 32 +#define __NR_HPUX_access 33 +#define __NR_HPUX_nice 34 +#define __NR_HPUX_ftime 35 +#define __NR_HPUX_sync 36 +#define __NR_HPUX_kill 37 +#define __NR_HPUX_stat 38 +#define __NR_HPUX_setpgrp3 39 +#define __NR_HPUX_lstat 40 +#define __NR_HPUX_dup 41 +#define __NR_HPUX_pipe 42 +#define __NR_HPUX_times 43 +#define __NR_HPUX_profil 44 +#define __NR_HPUX_ki_call 45 +#define __NR_HPUX_setgid 46 +#define __NR_HPUX_getgid 47 +#define __NR_HPUX_sigsys 48 +#define __NR_HPUX_reserved1 49 +#define __NR_HPUX_reserved2 50 +#define __NR_HPUX_acct 51 +#define __NR_HPUX_set_userthreadid 52 +#define __NR_HPUX_oldlock 53 +#define __NR_HPUX_ioctl 54 +#define __NR_HPUX_reboot 55 +#define __NR_HPUX_symlink 56 +#define __NR_HPUX_utssys 57 +#define __NR_HPUX_readlink 58 +#define __NR_HPUX_execve 59 +#define __NR_HPUX_umask 60 +#define __NR_HPUX_chroot 61 +#define __NR_HPUX_fcntl 62 +#define __NR_HPUX_ulimit 63 +#define __NR_HPUX_getpagesize 64 +#define __NR_HPUX_mremap 65 +#define __NR_HPUX_vfork 66 +#define __NR_HPUX_vread 67 +#define __NR_HPUX_vwrite 68 +#define __NR_HPUX_sbrk 69 +#define __NR_HPUX_sstk 70 +#define __NR_HPUX_mmap 71 +#define __NR_HPUX_vadvise 72 +#define __NR_HPUX_munmap 73 +#define __NR_HPUX_mprotect 74 +#define __NR_HPUX_madvise 75 +#define __NR_HPUX_vhangup 76 +#define __NR_HPUX_swapoff 77 +#define __NR_HPUX_mincore 78 +#define __NR_HPUX_getgroups 79 +#define __NR_HPUX_setgroups 80 +#define __NR_HPUX_getpgrp2 81 +#define __NR_HPUX_setpgrp2 82 +#define __NR_HPUX_setitimer 83 +#define __NR_HPUX_wait3 84 +#define __NR_HPUX_swapon 85 +#define __NR_HPUX_getitimer 86 +#define __NR_HPUX_gethostname42 87 +#define __NR_HPUX_sethostname42 88 +#define __NR_HPUX_getdtablesize 89 +#define __NR_HPUX_dup2 90 +#define __NR_HPUX_getdopt 91 +#define __NR_HPUX_fstat 92 +#define __NR_HPUX_select 93 +#define __NR_HPUX_setdopt 94 +#define __NR_HPUX_fsync 95 +#define __NR_HPUX_setpriority 96 +#define __NR_HPUX_socket_old 97 +#define __NR_HPUX_connect_old 98 +#define __NR_HPUX_accept_old 99 +#define __NR_HPUX_getpriority 100 +#define __NR_HPUX_send_old 101 +#define __NR_HPUX_recv_old 102 +#define __NR_HPUX_socketaddr_old 103 +#define __NR_HPUX_bind_old 104 +#define __NR_HPUX_setsockopt_old 105 +#define __NR_HPUX_listen_old 106 +#define __NR_HPUX_vtimes_old 107 +#define __NR_HPUX_sigvector 108 +#define __NR_HPUX_sigblock 109 +#define __NR_HPUX_siggetmask 110 +#define __NR_HPUX_sigpause 111 +#define __NR_HPUX_sigstack 112 +#define __NR_HPUX_recvmsg_old 113 +#define __NR_HPUX_sendmsg_old 114 +#define __NR_HPUX_vtrace_old 115 +#define __NR_HPUX_gettimeofday 116 +#define __NR_HPUX_getrusage 117 +#define __NR_HPUX_getsockopt_old 118 +#define __NR_HPUX_resuba_old 119 +#define __NR_HPUX_readv 120 +#define __NR_HPUX_writev 121 +#define __NR_HPUX_settimeofday 122 +#define __NR_HPUX_fchown 123 +#define __NR_HPUX_fchmod 124 +#define __NR_HPUX_recvfrom_old 125 +#define __NR_HPUX_setresuid 126 +#define __NR_HPUX_setresgid 127 +#define __NR_HPUX_rename 128 +#define __NR_HPUX_truncate 129 +#define __NR_HPUX_ftruncate 130 +#define __NR_HPUX_flock_old 131 +#define __NR_HPUX_sysconf 132 +#define __NR_HPUX_sendto_old 133 +#define __NR_HPUX_shutdown_old 134 +#define __NR_HPUX_socketpair_old 135 +#define __NR_HPUX_mkdir 136 +#define __NR_HPUX_rmdir 137 +#define __NR_HPUX_utimes_old 138 +#define __NR_HPUX_sigcleanup_old 139 +#define __NR_HPUX_setcore 140 +#define __NR_HPUX_getpeername_old 141 +#define __NR_HPUX_gethostid 142 +#define __NR_HPUX_sethostid 143 +#define __NR_HPUX_getrlimit 144 +#define __NR_HPUX_setrlimit 145 +#define __NR_HPUX_killpg_old 146 +#define __NR_HPUX_cachectl 147 +#define __NR_HPUX_quotactl 148 +#define __NR_HPUX_get_sysinfo 149 +#define __NR_HPUX_getsockname_old 150 +#define __NR_HPUX_privgrp 151 +#define __NR_HPUX_rtprio 152 +#define __NR_HPUX_plock 153 +#define __NR_HPUX_reserved3 154 +#define __NR_HPUX_lockf 155 +#define __NR_HPUX_semget 156 +#define __NR_HPUX_osemctl 157 +#define __NR_HPUX_semop 158 +#define __NR_HPUX_msgget 159 +#define __NR_HPUX_omsgctl 160 +#define __NR_HPUX_msgsnd 161 +#define __NR_HPUX_msgrecv 162 +#define __NR_HPUX_shmget 163 +#define __NR_HPUX_oshmctl 164 +#define __NR_HPUX_shmat 165 +#define __NR_HPUX_shmdt 166 +#define __NR_HPUX_m68020_advise 167 +/* [168,189] are for Discless/DUX */ +#define __NR_HPUX_csp 168 +#define __NR_HPUX_cluster 169 +#define __NR_HPUX_mkrnod 170 +#define __NR_HPUX_test 171 +#define __NR_HPUX_unsp_open 172 +#define __NR_HPUX_reserved4 173 +#define __NR_HPUX_getcontext_old 174 +#define __NR_HPUX_osetcontext 175 +#define __NR_HPUX_bigio 176 +#define __NR_HPUX_pipenode 177 +#define __NR_HPUX_lsync 178 +#define __NR_HPUX_getmachineid 179 +#define __NR_HPUX_cnodeid 180 +#define __NR_HPUX_cnodes 181 +#define __NR_HPUX_swapclients 182 +#define __NR_HPUX_rmt_process 183 +#define __NR_HPUX_dskless_stats 184 +#define __NR_HPUX_sigprocmask 185 +#define __NR_HPUX_sigpending 186 +#define __NR_HPUX_sigsuspend 187 +#define __NR_HPUX_sigaction 188 +#define __NR_HPUX_reserved5 189 +#define __NR_HPUX_nfssvc 190 +#define __NR_HPUX_getfh 191 +#define __NR_HPUX_getdomainname 192 +#define __NR_HPUX_setdomainname 193 +#define __NR_HPUX_async_daemon 194 +#define __NR_HPUX_getdirentries 195 +#define __NR_HPUX_statfs 196 +#define __NR_HPUX_fstatfs 197 +#define __NR_HPUX_vfsmount 198 +#define __NR_HPUX_reserved6 199 +#define __NR_HPUX_waitpid 200 +/* 201 - 223 missing */ +#define __NR_HPUX_sigsetreturn 224 +#define __NR_HPUX_sigsetstatemask 225 +/* 226 missing */ +#define __NR_HPUX_cs 227 +#define __NR_HPUX_cds 228 +#define __NR_HPUX_set_no_trunc 229 +#define __NR_HPUX_pathconf 230 +#define __NR_HPUX_fpathconf 231 +/* 232, 233 missing */ +#define __NR_HPUX_nfs_fcntl 234 +#define __NR_HPUX_ogetacl 235 +#define __NR_HPUX_ofgetacl 236 +#define __NR_HPUX_osetacl 237 +#define __NR_HPUX_ofsetacl 238 +#define __NR_HPUX_pstat 239 +#define __NR_HPUX_getaudid 240 +#define __NR_HPUX_setaudid 241 +#define __NR_HPUX_getaudproc 242 +#define __NR_HPUX_setaudproc 243 +#define __NR_HPUX_getevent 244 +#define __NR_HPUX_setevent 245 +#define __NR_HPUX_audwrite 246 +#define __NR_HPUX_audswitch 247 +#define __NR_HPUX_audctl 248 +#define __NR_HPUX_ogetaccess 249 +#define __NR_HPUX_fsctl 250 +/* 251 - 258 missing */ +#define __NR_HPUX_swapfs 259 +#define __NR_HPUX_fss 260 +/* 261 - 266 missing */ +#define __NR_HPUX_tsync 267 +#define __NR_HPUX_getnumfds 268 +#define __NR_HPUX_poll 269 +#define __NR_HPUX_getmsg 270 +#define __NR_HPUX_putmsg 271 +#define __NR_HPUX_fchdir 272 +#define __NR_HPUX_getmount_cnt 273 +#define __NR_HPUX_getmount_entry 274 +#define __NR_HPUX_accept 275 +#define __NR_HPUX_bind 276 +#define __NR_HPUX_connect 277 +#define __NR_HPUX_getpeername 278 +#define __NR_HPUX_getsockname 279 +#define __NR_HPUX_getsockopt 280 +#define __NR_HPUX_listen 281 +#define __NR_HPUX_recv 282 +#define __NR_HPUX_recvfrom 283 +#define __NR_HPUX_recvmsg 284 +#define __NR_HPUX_send 285 +#define __NR_HPUX_sendmsg 286 +#define __NR_HPUX_sendto 287 +#define __NR_HPUX_setsockopt 288 +#define __NR_HPUX_shutdown 289 +#define __NR_HPUX_socket 290 +#define __NR_HPUX_socketpair 291 +#define __NR_HPUX_proc_open 292 +#define __NR_HPUX_proc_close 293 +#define __NR_HPUX_proc_send 294 +#define __NR_HPUX_proc_recv 295 +#define __NR_HPUX_proc_sendrecv 296 +#define __NR_HPUX_proc_syscall 297 +/* 298 - 311 missing */ +#define __NR_HPUX_semctl 312 +#define __NR_HPUX_msgctl 313 +#define __NR_HPUX_shmctl 314 +#define __NR_HPUX_mpctl 315 +#define __NR_HPUX_exportfs 316 +#define __NR_HPUX_getpmsg 317 +#define __NR_HPUX_putpmsg 318 +/* 319 missing */ +#define __NR_HPUX_msync 320 +#define __NR_HPUX_msleep 321 +#define __NR_HPUX_mwakeup 322 +#define __NR_HPUX_msem_init 323 +#define __NR_HPUX_msem_remove 324 +#define __NR_HPUX_adjtime 325 +#define __NR_HPUX_kload 326 +#define __NR_HPUX_fattach 327 +#define __NR_HPUX_fdetach 328 +#define __NR_HPUX_serialize 329 +#define __NR_HPUX_statvfs 330 +#define __NR_HPUX_fstatvfs 331 +#define __NR_HPUX_lchown 332 +#define __NR_HPUX_getsid 333 +#define __NR_HPUX_sysfs 334 +/* 335, 336 missing */ +#define __NR_HPUX_sched_setparam 337 +#define __NR_HPUX_sched_getparam 338 +#define __NR_HPUX_sched_setscheduler 339 +#define __NR_HPUX_sched_getscheduler 340 +#define __NR_HPUX_sched_yield 341 +#define __NR_HPUX_sched_get_priority_max 342 +#define __NR_HPUX_sched_get_priority_min 343 +#define __NR_HPUX_sched_rr_get_interval 344 +#define __NR_HPUX_clock_settime 345 +#define __NR_HPUX_clock_gettime 346 +#define __NR_HPUX_clock_getres 347 +#define __NR_HPUX_timer_create 348 +#define __NR_HPUX_timer_delete 349 +#define __NR_HPUX_timer_settime 350 +#define __NR_HPUX_timer_gettime 351 +#define __NR_HPUX_timer_getoverrun 352 +#define __NR_HPUX_nanosleep 353 +#define __NR_HPUX_toolbox 354 +/* 355 missing */ +#define __NR_HPUX_getdents 356 +#define __NR_HPUX_getcontext 357 +#define __NR_HPUX_sysinfo 358 +#define __NR_HPUX_fcntl64 359 +#define __NR_HPUX_ftruncate64 360 +#define __NR_HPUX_fstat64 361 +#define __NR_HPUX_getdirentries64 362 +#define __NR_HPUX_getrlimit64 363 +#define __NR_HPUX_lockf64 364 +#define __NR_HPUX_lseek64 365 +#define __NR_HPUX_lstat64 366 +#define __NR_HPUX_mmap64 367 +#define __NR_HPUX_setrlimit64 368 +#define __NR_HPUX_stat64 369 +#define __NR_HPUX_truncate64 370 +#define __NR_HPUX_ulimit64 371 +#define __NR_HPUX_pread 372 +#define __NR_HPUX_preadv 373 +#define __NR_HPUX_pwrite 374 +#define __NR_HPUX_pwritev 375 +#define __NR_HPUX_pread64 376 +#define __NR_HPUX_preadv64 377 +#define __NR_HPUX_pwrite64 378 +#define __NR_HPUX_pwritev64 379 +#define __NR_HPUX_setcontext 380 +#define __NR_HPUX_sigaltstack 381 +#define __NR_HPUX_waitid 382 +#define __NR_HPUX_setpgrp 383 +#define __NR_HPUX_recvmsg2 384 +#define __NR_HPUX_sendmsg2 385 +#define __NR_HPUX_socket2 386 +#define __NR_HPUX_socketpair2 387 +#define __NR_HPUX_setregid 388 +#define __NR_HPUX_lwp_create 389 +#define __NR_HPUX_lwp_terminate 390 +#define __NR_HPUX_lwp_wait 391 +#define __NR_HPUX_lwp_suspend 392 +#define __NR_HPUX_lwp_resume 393 +/* 394 missing */ +#define __NR_HPUX_lwp_abort_syscall 395 +#define __NR_HPUX_lwp_info 396 +#define __NR_HPUX_lwp_kill 397 +#define __NR_HPUX_ksleep 398 +#define __NR_HPUX_kwakeup 399 +/* 400 missing */ +#define __NR_HPUX_pstat_getlwp 401 +#define __NR_HPUX_lwp_exit 402 +#define __NR_HPUX_lwp_continue 403 +#define __NR_HPUX_getacl 404 +#define __NR_HPUX_fgetacl 405 +#define __NR_HPUX_setacl 406 +#define __NR_HPUX_fsetacl 407 +#define __NR_HPUX_getaccess 408 +#define __NR_HPUX_lwp_mutex_init 409 +#define __NR_HPUX_lwp_mutex_lock_sys 410 +#define __NR_HPUX_lwp_mutex_unlock 411 +#define __NR_HPUX_lwp_cond_init 412 +#define __NR_HPUX_lwp_cond_signal 413 +#define __NR_HPUX_lwp_cond_broadcast 414 +#define __NR_HPUX_lwp_cond_wait_sys 415 +#define __NR_HPUX_lwp_getscheduler 416 +#define __NR_HPUX_lwp_setscheduler 417 +#define __NR_HPUX_lwp_getstate 418 +#define __NR_HPUX_lwp_setstate 419 +#define __NR_HPUX_lwp_detach 420 +#define __NR_HPUX_mlock 421 +#define __NR_HPUX_munlock 422 +#define __NR_HPUX_mlockall 423 +#define __NR_HPUX_munlockall 424 +#define __NR_HPUX_shm_open 425 +#define __NR_HPUX_shm_unlink 426 +#define __NR_HPUX_sigqueue 427 +#define __NR_HPUX_sigwaitinfo 428 +#define __NR_HPUX_sigtimedwait 429 +#define __NR_HPUX_sigwait 430 +#define __NR_HPUX_aio_read 431 +#define __NR_HPUX_aio_write 432 +#define __NR_HPUX_lio_listio 433 +#define __NR_HPUX_aio_error 434 +#define __NR_HPUX_aio_return 435 +#define __NR_HPUX_aio_cancel 436 +#define __NR_HPUX_aio_suspend 437 +#define __NR_HPUX_aio_fsync 438 +#define __NR_HPUX_mq_open 439 +#define __NR_HPUX_mq_close 440 +#define __NR_HPUX_mq_unlink 441 +#define __NR_HPUX_mq_send 442 +#define __NR_HPUX_mq_receive 443 +#define __NR_HPUX_mq_notify 444 +#define __NR_HPUX_mq_setattr 445 +#define __NR_HPUX_mq_getattr 446 +#define __NR_HPUX_ksem_open 447 +#define __NR_HPUX_ksem_unlink 448 +#define __NR_HPUX_ksem_close 449 +#define __NR_HPUX_ksem_post 450 +#define __NR_HPUX_ksem_wait 451 +#define __NR_HPUX_ksem_read 452 +#define __NR_HPUX_ksem_trywait 453 +#define __NR_HPUX_lwp_rwlock_init 454 +#define __NR_HPUX_lwp_rwlock_destroy 455 +#define __NR_HPUX_lwp_rwlock_rdlock_sys 456 +#define __NR_HPUX_lwp_rwlock_wrlock_sys 457 +#define __NR_HPUX_lwp_rwlock_tryrdlock 458 +#define __NR_HPUX_lwp_rwlock_trywrlock 459 +#define __NR_HPUX_lwp_rwlock_unlock 460 +#define __NR_HPUX_ttrace 461 +#define __NR_HPUX_ttrace_wait 462 +#define __NR_HPUX_lf_wire_mem 463 +#define __NR_HPUX_lf_unwire_mem 464 +#define __NR_HPUX_lf_send_pin_map 465 +#define __NR_HPUX_lf_free_buf 466 +#define __NR_HPUX_lf_wait_nq 467 +#define __NR_HPUX_lf_wakeup_conn_q 468 +#define __NR_HPUX_lf_unused 469 +#define __NR_HPUX_lwp_sema_init 470 +#define __NR_HPUX_lwp_sema_post 471 +#define __NR_HPUX_lwp_sema_wait 472 +#define __NR_HPUX_lwp_sema_trywait 473 +#define __NR_HPUX_lwp_sema_destroy 474 +#define __NR_HPUX_statvfs64 475 +#define __NR_HPUX_fstatvfs64 476 +#define __NR_HPUX_msh_register 477 +#define __NR_HPUX_ptrace64 478 +#define __NR_HPUX_sendfile 479 +#define __NR_HPUX_sendpath 480 +#define __NR_HPUX_sendfile64 481 +#define __NR_HPUX_sendpath64 482 +#define __NR_HPUX_modload 483 +#define __NR_HPUX_moduload 484 +#define __NR_HPUX_modpath 485 +#define __NR_HPUX_getksym 486 +#define __NR_HPUX_modadm 487 +#define __NR_HPUX_modstat 488 +#define __NR_HPUX_lwp_detached_exit 489 +#define __NR_HPUX_crashconf 490 +#define __NR_HPUX_siginhibit 491 +#define __NR_HPUX_sigenable 492 +#define __NR_HPUX_spuctl 493 +#define __NR_HPUX_zerokernelsum 494 +#define __NR_HPUX_nfs_kstat 495 +#define __NR_HPUX_aio_read64 496 +#define __NR_HPUX_aio_write64 497 +#define __NR_HPUX_aio_error64 498 +#define __NR_HPUX_aio_return64 499 +#define __NR_HPUX_aio_cancel64 500 +#define __NR_HPUX_aio_suspend64 501 +#define __NR_HPUX_aio_fsync64 502 +#define __NR_HPUX_lio_listio64 503 +#define __NR_HPUX_recv2 504 +#define __NR_HPUX_recvfrom2 505 +#define __NR_HPUX_send2 506 +#define __NR_HPUX_sendto2 507 +#define __NR_HPUX_acl 508 +#define __NR_HPUX___cnx_p2p_ctl 509 +#define __NR_HPUX___cnx_gsched_ctl 510 +#define __NR_HPUX___cnx_pmon_ctl 511 + +#define __NR_HPUX_syscalls 512 + +/* + * Linux system call numbers. + * + * Cary Coutant says that we should just use another syscall gateway + * page to avoid clashing with the HPUX space, and I think he's right: + * it will would keep a branch out of our syscall entry path, at the + * very least. If we decide to change it later, we can ``just'' tweak + * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be + * 1024 or something. Oh, and recompile libc. =) + * + * 64-bit HPUX binaries get the syscall gateway address passed in a register + * from the kernel at startup, which seems a sane strategy. + */ + +#define __NR_Linux 0 +#define __NR_restart_syscall (__NR_Linux + 0) +#define __NR_exit (__NR_Linux + 1) +#define __NR_fork (__NR_Linux + 2) +#define __NR_read (__NR_Linux + 3) +#define __NR_write (__NR_Linux + 4) +#define __NR_open (__NR_Linux + 5) +#define __NR_close (__NR_Linux + 6) +#define __NR_waitpid (__NR_Linux + 7) +#define __NR_creat (__NR_Linux + 8) +#define __NR_link (__NR_Linux + 9) +#define __NR_unlink (__NR_Linux + 10) +#define __NR_execve (__NR_Linux + 11) +#define __NR_chdir (__NR_Linux + 12) +#define __NR_time (__NR_Linux + 13) +#define __NR_mknod (__NR_Linux + 14) +#define __NR_chmod (__NR_Linux + 15) +#define __NR_lchown (__NR_Linux + 16) +#define __NR_socket (__NR_Linux + 17) +#define __NR_stat (__NR_Linux + 18) +#define __NR_lseek (__NR_Linux + 19) +#define __NR_getpid (__NR_Linux + 20) +#define __NR_mount (__NR_Linux + 21) +#define __NR_bind (__NR_Linux + 22) +#define __NR_setuid (__NR_Linux + 23) +#define __NR_getuid (__NR_Linux + 24) +#define __NR_stime (__NR_Linux + 25) +#define __NR_ptrace (__NR_Linux + 26) +#define __NR_alarm (__NR_Linux + 27) +#define __NR_fstat (__NR_Linux + 28) +#define __NR_pause (__NR_Linux + 29) +#define __NR_utime (__NR_Linux + 30) +#define __NR_connect (__NR_Linux + 31) +#define __NR_listen (__NR_Linux + 32) +#define __NR_access (__NR_Linux + 33) +#define __NR_nice (__NR_Linux + 34) +#define __NR_accept (__NR_Linux + 35) +#define __NR_sync (__NR_Linux + 36) +#define __NR_kill (__NR_Linux + 37) +#define __NR_rename (__NR_Linux + 38) +#define __NR_mkdir (__NR_Linux + 39) +#define __NR_rmdir (__NR_Linux + 40) +#define __NR_dup (__NR_Linux + 41) +#define __NR_pipe (__NR_Linux + 42) +#define __NR_times (__NR_Linux + 43) +#define __NR_getsockname (__NR_Linux + 44) +#define __NR_brk (__NR_Linux + 45) +#define __NR_setgid (__NR_Linux + 46) +#define __NR_getgid (__NR_Linux + 47) +#define __NR_signal (__NR_Linux + 48) +#define __NR_geteuid (__NR_Linux + 49) +#define __NR_getegid (__NR_Linux + 50) +#define __NR_acct (__NR_Linux + 51) +#define __NR_umount2 (__NR_Linux + 52) +#define __NR_getpeername (__NR_Linux + 53) +#define __NR_ioctl (__NR_Linux + 54) +#define __NR_fcntl (__NR_Linux + 55) +#define __NR_socketpair (__NR_Linux + 56) +#define __NR_setpgid (__NR_Linux + 57) +#define __NR_send (__NR_Linux + 58) +#define __NR_uname (__NR_Linux + 59) +#define __NR_umask (__NR_Linux + 60) +#define __NR_chroot (__NR_Linux + 61) +#define __NR_ustat (__NR_Linux + 62) +#define __NR_dup2 (__NR_Linux + 63) +#define __NR_getppid (__NR_Linux + 64) +#define __NR_getpgrp (__NR_Linux + 65) +#define __NR_setsid (__NR_Linux + 66) +#define __NR_pivot_root (__NR_Linux + 67) +#define __NR_sgetmask (__NR_Linux + 68) +#define __NR_ssetmask (__NR_Linux + 69) +#define __NR_setreuid (__NR_Linux + 70) +#define __NR_setregid (__NR_Linux + 71) +#define __NR_mincore (__NR_Linux + 72) +#define __NR_sigpending (__NR_Linux + 73) +#define __NR_sethostname (__NR_Linux + 74) +#define __NR_setrlimit (__NR_Linux + 75) +#define __NR_getrlimit (__NR_Linux + 76) +#define __NR_getrusage (__NR_Linux + 77) +#define __NR_gettimeofday (__NR_Linux + 78) +#define __NR_settimeofday (__NR_Linux + 79) +#define __NR_getgroups (__NR_Linux + 80) +#define __NR_setgroups (__NR_Linux + 81) +#define __NR_sendto (__NR_Linux + 82) +#define __NR_symlink (__NR_Linux + 83) +#define __NR_lstat (__NR_Linux + 84) +#define __NR_readlink (__NR_Linux + 85) +#define __NR_uselib (__NR_Linux + 86) +#define __NR_swapon (__NR_Linux + 87) +#define __NR_reboot (__NR_Linux + 88) +#define __NR_mmap2 (__NR_Linux + 89) +#define __NR_mmap (__NR_Linux + 90) +#define __NR_munmap (__NR_Linux + 91) +#define __NR_truncate (__NR_Linux + 92) +#define __NR_ftruncate (__NR_Linux + 93) +#define __NR_fchmod (__NR_Linux + 94) +#define __NR_fchown (__NR_Linux + 95) +#define __NR_getpriority (__NR_Linux + 96) +#define __NR_setpriority (__NR_Linux + 97) +#define __NR_recv (__NR_Linux + 98) +#define __NR_statfs (__NR_Linux + 99) +#define __NR_fstatfs (__NR_Linux + 100) +#define __NR_stat64 (__NR_Linux + 101) +/* #define __NR_socketcall (__NR_Linux + 102) */ +#define __NR_syslog (__NR_Linux + 103) +#define __NR_setitimer (__NR_Linux + 104) +#define __NR_getitimer (__NR_Linux + 105) +#define __NR_capget (__NR_Linux + 106) +#define __NR_capset (__NR_Linux + 107) +#define __NR_pread64 (__NR_Linux + 108) +#define __NR_pwrite64 (__NR_Linux + 109) +#define __NR_getcwd (__NR_Linux + 110) +#define __NR_vhangup (__NR_Linux + 111) +#define __NR_fstat64 (__NR_Linux + 112) +#define __NR_vfork (__NR_Linux + 113) +#define __NR_wait4 (__NR_Linux + 114) +#define __NR_swapoff (__NR_Linux + 115) +#define __NR_sysinfo (__NR_Linux + 116) +#define __NR_shutdown (__NR_Linux + 117) +#define __NR_fsync (__NR_Linux + 118) +#define __NR_madvise (__NR_Linux + 119) +#define __NR_clone (__NR_Linux + 120) +#define __NR_setdomainname (__NR_Linux + 121) +#define __NR_sendfile (__NR_Linux + 122) +#define __NR_recvfrom (__NR_Linux + 123) +#define __NR_adjtimex (__NR_Linux + 124) +#define __NR_mprotect (__NR_Linux + 125) +#define __NR_sigprocmask (__NR_Linux + 126) +#define __NR_create_module (__NR_Linux + 127) +#define __NR_init_module (__NR_Linux + 128) +#define __NR_delete_module (__NR_Linux + 129) +#define __NR_get_kernel_syms (__NR_Linux + 130) +#define __NR_quotactl (__NR_Linux + 131) +#define __NR_getpgid (__NR_Linux + 132) +#define __NR_fchdir (__NR_Linux + 133) +#define __NR_bdflush (__NR_Linux + 134) +#define __NR_sysfs (__NR_Linux + 135) +#define __NR_personality (__NR_Linux + 136) +#define __NR_afs_syscall (__NR_Linux + 137) /* Syscall for Andrew File System */ +#define __NR_setfsuid (__NR_Linux + 138) +#define __NR_setfsgid (__NR_Linux + 139) +#define __NR__llseek (__NR_Linux + 140) +#define __NR_getdents (__NR_Linux + 141) +#define __NR__newselect (__NR_Linux + 142) +#define __NR_flock (__NR_Linux + 143) +#define __NR_msync (__NR_Linux + 144) +#define __NR_readv (__NR_Linux + 145) +#define __NR_writev (__NR_Linux + 146) +#define __NR_getsid (__NR_Linux + 147) +#define __NR_fdatasync (__NR_Linux + 148) +#define __NR__sysctl (__NR_Linux + 149) +#define __NR_mlock (__NR_Linux + 150) +#define __NR_munlock (__NR_Linux + 151) +#define __NR_mlockall (__NR_Linux + 152) +#define __NR_munlockall (__NR_Linux + 153) +#define __NR_sched_setparam (__NR_Linux + 154) +#define __NR_sched_getparam (__NR_Linux + 155) +#define __NR_sched_setscheduler (__NR_Linux + 156) +#define __NR_sched_getscheduler (__NR_Linux + 157) +#define __NR_sched_yield (__NR_Linux + 158) +#define __NR_sched_get_priority_max (__NR_Linux + 159) +#define __NR_sched_get_priority_min (__NR_Linux + 160) +#define __NR_sched_rr_get_interval (__NR_Linux + 161) +#define __NR_nanosleep (__NR_Linux + 162) +#define __NR_mremap (__NR_Linux + 163) +#define __NR_setresuid (__NR_Linux + 164) +#define __NR_getresuid (__NR_Linux + 165) +#define __NR_sigaltstack (__NR_Linux + 166) +#define __NR_query_module (__NR_Linux + 167) +#define __NR_poll (__NR_Linux + 168) +#define __NR_nfsservctl (__NR_Linux + 169) +#define __NR_setresgid (__NR_Linux + 170) +#define __NR_getresgid (__NR_Linux + 171) +#define __NR_prctl (__NR_Linux + 172) +#define __NR_rt_sigreturn (__NR_Linux + 173) +#define __NR_rt_sigaction (__NR_Linux + 174) +#define __NR_rt_sigprocmask (__NR_Linux + 175) +#define __NR_rt_sigpending (__NR_Linux + 176) +#define __NR_rt_sigtimedwait (__NR_Linux + 177) +#define __NR_rt_sigqueueinfo (__NR_Linux + 178) +#define __NR_rt_sigsuspend (__NR_Linux + 179) +#define __NR_chown (__NR_Linux + 180) +#define __NR_setsockopt (__NR_Linux + 181) +#define __NR_getsockopt (__NR_Linux + 182) +#define __NR_sendmsg (__NR_Linux + 183) +#define __NR_recvmsg (__NR_Linux + 184) +#define __NR_semop (__NR_Linux + 185) +#define __NR_semget (__NR_Linux + 186) +#define __NR_semctl (__NR_Linux + 187) +#define __NR_msgsnd (__NR_Linux + 188) +#define __NR_msgrcv (__NR_Linux + 189) +#define __NR_msgget (__NR_Linux + 190) +#define __NR_msgctl (__NR_Linux + 191) +#define __NR_shmat (__NR_Linux + 192) +#define __NR_shmdt (__NR_Linux + 193) +#define __NR_shmget (__NR_Linux + 194) +#define __NR_shmctl (__NR_Linux + 195) + +#define __NR_getpmsg (__NR_Linux + 196) /* Somebody *wants* streams? */ +#define __NR_putpmsg (__NR_Linux + 197) + +#define __NR_lstat64 (__NR_Linux + 198) +#define __NR_truncate64 (__NR_Linux + 199) +#define __NR_ftruncate64 (__NR_Linux + 200) +#define __NR_getdents64 (__NR_Linux + 201) +#define __NR_fcntl64 (__NR_Linux + 202) +#define __NR_attrctl (__NR_Linux + 203) +#define __NR_acl_get (__NR_Linux + 204) +#define __NR_acl_set (__NR_Linux + 205) +#define __NR_gettid (__NR_Linux + 206) +#define __NR_readahead (__NR_Linux + 207) +#define __NR_tkill (__NR_Linux + 208) +#define __NR_sendfile64 (__NR_Linux + 209) +#define __NR_futex (__NR_Linux + 210) +#define __NR_sched_setaffinity (__NR_Linux + 211) +#define __NR_sched_getaffinity (__NR_Linux + 212) +#define __NR_set_thread_area (__NR_Linux + 213) +#define __NR_get_thread_area (__NR_Linux + 214) +#define __NR_io_setup (__NR_Linux + 215) +#define __NR_io_destroy (__NR_Linux + 216) +#define __NR_io_getevents (__NR_Linux + 217) +#define __NR_io_submit (__NR_Linux + 218) +#define __NR_io_cancel (__NR_Linux + 219) +#define __NR_alloc_hugepages (__NR_Linux + 220) +#define __NR_free_hugepages (__NR_Linux + 221) +#define __NR_exit_group (__NR_Linux + 222) +#define __NR_lookup_dcookie (__NR_Linux + 223) +#define __NR_epoll_create (__NR_Linux + 224) +#define __NR_epoll_ctl (__NR_Linux + 225) +#define __NR_epoll_wait (__NR_Linux + 226) +#define __NR_remap_file_pages (__NR_Linux + 227) +#define __NR_semtimedop (__NR_Linux + 228) +#define __NR_mq_open (__NR_Linux + 229) +#define __NR_mq_unlink (__NR_Linux + 230) +#define __NR_mq_timedsend (__NR_Linux + 231) +#define __NR_mq_timedreceive (__NR_Linux + 232) +#define __NR_mq_notify (__NR_Linux + 233) +#define __NR_mq_getsetattr (__NR_Linux + 234) +#define __NR_waitid (__NR_Linux + 235) +#define __NR_fadvise64_64 (__NR_Linux + 236) +#define __NR_set_tid_address (__NR_Linux + 237) +#define __NR_setxattr (__NR_Linux + 238) +#define __NR_lsetxattr (__NR_Linux + 239) +#define __NR_fsetxattr (__NR_Linux + 240) +#define __NR_getxattr (__NR_Linux + 241) +#define __NR_lgetxattr (__NR_Linux + 242) +#define __NR_fgetxattr (__NR_Linux + 243) +#define __NR_listxattr (__NR_Linux + 244) +#define __NR_llistxattr (__NR_Linux + 245) +#define __NR_flistxattr (__NR_Linux + 246) +#define __NR_removexattr (__NR_Linux + 247) +#define __NR_lremovexattr (__NR_Linux + 248) +#define __NR_fremovexattr (__NR_Linux + 249) +#define __NR_timer_create (__NR_Linux + 250) +#define __NR_timer_settime (__NR_Linux + 251) +#define __NR_timer_gettime (__NR_Linux + 252) +#define __NR_timer_getoverrun (__NR_Linux + 253) +#define __NR_timer_delete (__NR_Linux + 254) +#define __NR_clock_settime (__NR_Linux + 255) +#define __NR_clock_gettime (__NR_Linux + 256) +#define __NR_clock_getres (__NR_Linux + 257) +#define __NR_clock_nanosleep (__NR_Linux + 258) +#define __NR_tgkill (__NR_Linux + 259) +#define __NR_mbind (__NR_Linux + 260) +#define __NR_get_mempolicy (__NR_Linux + 261) +#define __NR_set_mempolicy (__NR_Linux + 262) +#define __NR_vserver (__NR_Linux + 263) +#define __NR_add_key (__NR_Linux + 264) +#define __NR_request_key (__NR_Linux + 265) +#define __NR_keyctl (__NR_Linux + 266) +#define __NR_ioprio_set (__NR_Linux + 267) +#define __NR_ioprio_get (__NR_Linux + 268) +#define __NR_inotify_init (__NR_Linux + 269) +#define __NR_inotify_add_watch (__NR_Linux + 270) +#define __NR_inotify_rm_watch (__NR_Linux + 271) +#define __NR_migrate_pages (__NR_Linux + 272) +#define __NR_pselect6 (__NR_Linux + 273) +#define __NR_ppoll (__NR_Linux + 274) +#define __NR_openat (__NR_Linux + 275) +#define __NR_mkdirat (__NR_Linux + 276) +#define __NR_mknodat (__NR_Linux + 277) +#define __NR_fchownat (__NR_Linux + 278) +#define __NR_futimesat (__NR_Linux + 279) +#define __NR_fstatat64 (__NR_Linux + 280) +#define __NR_unlinkat (__NR_Linux + 281) +#define __NR_renameat (__NR_Linux + 282) +#define __NR_linkat (__NR_Linux + 283) +#define __NR_symlinkat (__NR_Linux + 284) +#define __NR_readlinkat (__NR_Linux + 285) +#define __NR_fchmodat (__NR_Linux + 286) +#define __NR_faccessat (__NR_Linux + 287) +#define __NR_unshare (__NR_Linux + 288) +#define __NR_set_robust_list (__NR_Linux + 289) +#define __NR_get_robust_list (__NR_Linux + 290) +#define __NR_splice (__NR_Linux + 291) +#define __NR_sync_file_range (__NR_Linux + 292) +#define __NR_tee (__NR_Linux + 293) +#define __NR_vmsplice (__NR_Linux + 294) +#define __NR_move_pages (__NR_Linux + 295) +#define __NR_getcpu (__NR_Linux + 296) +#define __NR_epoll_pwait (__NR_Linux + 297) +#define __NR_statfs64 (__NR_Linux + 298) +#define __NR_fstatfs64 (__NR_Linux + 299) +#define __NR_kexec_load (__NR_Linux + 300) +#define __NR_utimensat (__NR_Linux + 301) +#define __NR_signalfd (__NR_Linux + 302) +#define __NR_timerfd (__NR_Linux + 303) +#define __NR_eventfd (__NR_Linux + 304) +#define __NR_fallocate (__NR_Linux + 305) +#define __NR_timerfd_create (__NR_Linux + 306) +#define __NR_timerfd_settime (__NR_Linux + 307) +#define __NR_timerfd_gettime (__NR_Linux + 308) +#define __NR_signalfd4 (__NR_Linux + 309) +#define __NR_eventfd2 (__NR_Linux + 310) +#define __NR_epoll_create1 (__NR_Linux + 311) +#define __NR_dup3 (__NR_Linux + 312) +#define __NR_pipe2 (__NR_Linux + 313) +#define __NR_inotify_init1 (__NR_Linux + 314) +#define __NR_preadv (__NR_Linux + 315) +#define __NR_pwritev (__NR_Linux + 316) +#define __NR_rt_tgsigqueueinfo (__NR_Linux + 317) +#define __NR_perf_event_open (__NR_Linux + 318) +#define __NR_recvmmsg (__NR_Linux + 319) +#define __NR_accept4 (__NR_Linux + 320) +#define __NR_prlimit64 (__NR_Linux + 321) +#define __NR_fanotify_init (__NR_Linux + 322) +#define __NR_fanotify_mark (__NR_Linux + 323) +#define __NR_clock_adjtime (__NR_Linux + 324) +#define __NR_name_to_handle_at (__NR_Linux + 325) +#define __NR_open_by_handle_at (__NR_Linux + 326) +#define __NR_syncfs (__NR_Linux + 327) +#define __NR_setns (__NR_Linux + 328) +#define __NR_sendmmsg (__NR_Linux + 329) + +#define __NR_Linux_syscalls (__NR_sendmmsg + 1) + + +#define __IGNORE_select /* newselect */ +#define __IGNORE_fadvise64 /* fadvise64_64 */ +#define __IGNORE_utimes /* utime */ + + +#define HPUX_GATEWAY_ADDR 0xC0000004 +#define LINUX_GATEWAY_ADDR 0x100 + +#endif /* _UAPI_ASM_PARISC_UNISTD_H_ */ diff --git a/arch/powerpc/include/asm/kvm_book3s_32.h b/arch/powerpc/include/asm/kvm_book3s_32.h index 38040ff82063..ce0ef6ce8f86 100644 --- a/arch/powerpc/include/asm/kvm_book3s_32.h +++ b/arch/powerpc/include/asm/kvm_book3s_32.h @@ -42,5 +42,6 @@ static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu *svcpu) #define SID_SHIFT 28 #define ESID_MASK 0xf0000000 #define VSID_MASK 0x00fffffff0000000ULL +#define VPN_SHIFT 12 #endif /* __ASM_KVM_BOOK3S_32_H__ */ diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 8734b3855272..87502046c0dc 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -388,9 +388,9 @@ extern int powersave_nap; /* set if nap mode can be used in idle loop */ extern void power7_nap(void); #ifdef CONFIG_PSERIES_IDLE -extern void update_smt_snooze_delay(int snooze); +extern void update_smt_snooze_delay(int cpu, int residency); #else -static inline void update_smt_snooze_delay(int snooze) {} +static inline void update_smt_snooze_delay(int cpu, int residency) {} #endif extern void flush_instruction_cache(void); diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index 8302af649219..cf357a059ddb 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c @@ -50,7 +50,7 @@ static ssize_t store_smt_snooze_delay(struct device *dev, return -EINVAL; per_cpu(smt_snooze_delay, cpu->dev.id) = snooze; - update_smt_snooze_delay(snooze); + update_smt_snooze_delay(cpu->dev.id, snooze); return count; } diff --git a/arch/powerpc/kvm/book3s_32_mmu_host.c b/arch/powerpc/kvm/book3s_32_mmu_host.c index 00aa61268e0d..b0f625a33345 100644 --- a/arch/powerpc/kvm/book3s_32_mmu_host.c +++ b/arch/powerpc/kvm/book3s_32_mmu_host.c @@ -173,8 +173,8 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte) BUG_ON(!map); vsid = map->host_vsid; - vpn = (vsid << (SID_SHIFT - VPN_SHIFT)) | ((eaddr & ~ESID_MASK) >> VPN_SHIFT) - + vpn = (vsid << (SID_SHIFT - VPN_SHIFT)) | + ((eaddr & ~ESID_MASK) >> VPN_SHIFT); next_pteg: if (rr == 16) { primary = !primary; diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index 0db88f501f91..aa2465e21f1a 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -1463,7 +1463,7 @@ static void perf_event_interrupt(struct pt_regs *regs) if (!event->hw.idx || is_limited_pmc(event->hw.idx)) continue; val = read_pmc(event->hw.idx); - if (pmc_overflow(val)) { + if ((int)val < 0) { /* event has overflowed */ found = 1; record_and_restart(event, val, regs); diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c index 455760b1fe6e..45d00e5fe14d 100644 --- a/arch/powerpc/platforms/pseries/processor_idle.c +++ b/arch/powerpc/platforms/pseries/processor_idle.c @@ -33,13 +33,6 @@ static int max_idle_state = MAX_IDLE_STATE_COUNT - 1; static struct cpuidle_device __percpu *pseries_cpuidle_devices; static struct cpuidle_state *cpuidle_state_table; -void update_smt_snooze_delay(int snooze) -{ - struct cpuidle_driver *drv = cpuidle_get_driver(); - if (drv) - drv->states[0].target_residency = snooze; -} - static inline void idle_loop_prolog(unsigned long *in_purr, ktime_t *kt_before) { @@ -66,32 +59,22 @@ static int snooze_loop(struct cpuidle_device *dev, { unsigned long in_purr; ktime_t kt_before; - unsigned long start_snooze; - long snooze = drv->states[0].target_residency; + int cpu = dev->cpu; idle_loop_prolog(&in_purr, &kt_before); + local_irq_enable(); + set_thread_flag(TIF_POLLING_NRFLAG); - if (snooze) { - start_snooze = get_tb() + snooze * tb_ticks_per_usec; - local_irq_enable(); - set_thread_flag(TIF_POLLING_NRFLAG); - - while ((snooze < 0) || (get_tb() < start_snooze)) { - if (need_resched() || cpu_is_offline(dev->cpu)) - goto out; - ppc64_runlatch_off(); - HMT_low(); - HMT_very_low(); - } - - HMT_medium(); - clear_thread_flag(TIF_POLLING_NRFLAG); - smp_mb(); - local_irq_disable(); + while ((!need_resched()) && cpu_online(cpu)) { + ppc64_runlatch_off(); + HMT_low(); + HMT_very_low(); } -out: HMT_medium(); + clear_thread_flag(TIF_POLLING_NRFLAG); + smp_mb(); + dev->last_residency = (int)idle_loop_epilog(in_purr, kt_before); return index; @@ -172,8 +155,8 @@ static struct cpuidle_state dedicated_states[MAX_IDLE_STATE_COUNT] = { .name = "CEDE", .desc = "CEDE", .flags = CPUIDLE_FLAG_TIME_VALID, - .exit_latency = 1, - .target_residency = 10, + .exit_latency = 10, + .target_residency = 100, .enter = &dedicated_cede_loop }, }; @@ -190,6 +173,23 @@ static struct cpuidle_state shared_states[MAX_IDLE_STATE_COUNT] = { .enter = &shared_cede_loop }, }; +void update_smt_snooze_delay(int cpu, int residency) +{ + struct cpuidle_driver *drv = cpuidle_get_driver(); + struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); + + if (cpuidle_state_table != dedicated_states) + return; + + if (residency < 0) { + /* Disable the Nap state on that cpu */ + if (dev) + dev->states_usage[1].disable = 1; + } else + if (drv) + drv->states[1].target_residency = residency; +} + static int pseries_cpuidle_add_cpu_notifier(struct notifier_block *n, unsigned long action, void *hcpu) { @@ -246,10 +246,6 @@ static int pseries_cpuidle_driver_init(void) drv->states[drv->state_count] = /* structure copy */ cpuidle_state_table[idle_state]; - if (cpuidle_state_table == dedicated_states) - drv->states[drv->state_count].target_residency = - __get_cpu_var(smt_snooze_delay); - drv->state_count += 1; } diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 3f3d9ca7a5b6..5dba755a43e6 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -130,6 +130,7 @@ config S390 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE select HAVE_UID16 if 32BIT select ARCH_WANT_IPC_PARSE_VERSION + select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT select GENERIC_SMP_IDLE_THREAD select GENERIC_TIME_VSYSCALL_OLD select GENERIC_CLOCKEVENTS diff --git a/arch/s390/boot/compressed/vmlinux.lds.S b/arch/s390/boot/compressed/vmlinux.lds.S index d80f79d8dd9c..8e1fb8239287 100644 --- a/arch/s390/boot/compressed/vmlinux.lds.S +++ b/arch/s390/boot/compressed/vmlinux.lds.S @@ -5,7 +5,7 @@ OUTPUT_FORMAT("elf64-s390", "elf64-s390", "elf64-s390") OUTPUT_ARCH(s390:64-bit) #else OUTPUT_FORMAT("elf32-s390", "elf32-s390", "elf32-s390") -OUTPUT_ARCH(s390) +OUTPUT_ARCH(s390:31-bit) #endif ENTRY(startup) diff --git a/arch/s390/include/asm/perf_event.h b/arch/s390/include/asm/perf_event.h index 7941968e12b4..5f0173a31693 100644 --- a/arch/s390/include/asm/perf_event.h +++ b/arch/s390/include/asm/perf_event.h @@ -9,7 +9,7 @@ #include <asm/cpu_mf.h> /* CPU-measurement counter facility */ -#define PERF_CPUM_CF_MAX_CTR 160 +#define PERF_CPUM_CF_MAX_CTR 256 /* Per-CPU flags for PMU states */ #define PMU_F_RESERVED 0x1000 diff --git a/arch/s390/include/uapi/asm/chpid.h b/arch/s390/include/uapi/asm/chpid.h index 581992dfae27..6b4fb29cc197 100644 --- a/arch/s390/include/uapi/asm/chpid.h +++ b/arch/s390/include/uapi/asm/chpid.h @@ -1,5 +1,5 @@ /* - * Copyright IBM Corp. 2007 + * Copyright IBM Corp. 2007, 2012 * Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com> */ @@ -12,10 +12,10 @@ #define __MAX_CHPID 255 struct chp_id { - u8 reserved1; - u8 cssid; - u8 reserved2; - u8 id; + __u8 reserved1; + __u8 cssid; + __u8 reserved2; + __u8 id; } __attribute__((packed)); diff --git a/arch/s390/include/uapi/asm/kvm_para.h b/arch/s390/include/uapi/asm/kvm_para.h index e69de29bb2d1..ff1f4e7b3015 100644 --- a/arch/s390/include/uapi/asm/kvm_para.h +++ b/arch/s390/include/uapi/asm/kvm_para.h @@ -0,0 +1,11 @@ +/* + * User API definitions for paravirtual devices on s390 + * + * Copyright IBM Corp. 2008 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License (version 2 only) + * as published by the Free Software Foundation. + * + * Author(s): Christian Borntraeger <borntraeger@de.ibm.com> + */ diff --git a/arch/s390/kernel/cache.c b/arch/s390/kernel/cache.c index 8df8d8a19c98..64b24650e4f8 100644 --- a/arch/s390/kernel/cache.c +++ b/arch/s390/kernel/cache.c @@ -59,8 +59,8 @@ enum { enum { CACHE_TI_UNIFIED = 0, - CACHE_TI_INSTRUCTION = 0, - CACHE_TI_DATA, + CACHE_TI_DATA = 0, + CACHE_TI_INSTRUCTION, }; struct cache_info { @@ -121,7 +121,10 @@ static int __init cache_add(int level, int private, int type) cache = kzalloc(sizeof(*cache), GFP_KERNEL); if (!cache) return -ENOMEM; - ti = type == CACHE_TYPE_DATA ? CACHE_TI_DATA : CACHE_TI_UNIFIED; + if (type == CACHE_TYPE_INSTRUCTION) + ti = CACHE_TI_INSTRUCTION; + else + ti = CACHE_TI_UNIFIED; cache->size = ecag(EXTRACT_SIZE, level, ti); cache->line_size = ecag(EXTRACT_LINE_SIZE, level, ti); cache->associativity = ecag(EXTRACT_ASSOCIATIVITY, level, ti); diff --git a/arch/s390/kernel/head_kdump.S b/arch/s390/kernel/head_kdump.S index acaaaf4b7055..085a95eb315f 100644 --- a/arch/s390/kernel/head_kdump.S +++ b/arch/s390/kernel/head_kdump.S @@ -85,16 +85,10 @@ .align 2 startup_kdump_relocated: basr %r13,0 -0: - mvc 0(8,%r0),.Lrestart_psw-0b(%r13) # Setup restart PSW - sam31 # Switch to 31 bit addr mode - sr %r1,%r1 # Erase register r1 - sr %r2,%r2 # Erase register r2 - sigp %r1,%r2,SIGP_SET_ARCHITECTURE # Switch to 31 bit arch mode - lpsw 0 # Start new kernel... +0: lpswe .Lrestart_psw-0b(%r13) # Start new kernel... .align 8 .Lrestart_psw: - .long 0x00080000,0x80000000 + startup + .quad 0x0000000080000000,0x0000000000000000 + startup #else .align 2 .Lep_startup_kdump: diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c index 9871b1971ed7..c4e7269d4a09 100644 --- a/arch/s390/kernel/perf_cpum_cf.c +++ b/arch/s390/kernel/perf_cpum_cf.c @@ -94,7 +94,7 @@ static int get_counter_set(u64 event) set = CPUMF_CTR_SET_USER; else if (event < 128) set = CPUMF_CTR_SET_CRYPTO; - else if (event < 160) + else if (event < 256) set = CPUMF_CTR_SET_EXT; return set; @@ -138,6 +138,10 @@ static int validate_ctr_version(const struct hw_perf_event *hwc) case CPUMF_CTR_SET_EXT: if (cpuhw->info.csvn < 1) err = -EOPNOTSUPP; + if ((cpuhw->info.csvn == 1 && hwc->config > 159) || + (cpuhw->info.csvn == 2 && hwc->config > 175) || + (cpuhw->info.csvn > 2 && hwc->config > 255)) + err = -EOPNOTSUPP; break; } diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S index de8fa9bbd35e..79cb51adc741 100644 --- a/arch/s390/kernel/vmlinux.lds.S +++ b/arch/s390/kernel/vmlinux.lds.S @@ -8,7 +8,7 @@ #ifndef CONFIG_64BIT OUTPUT_FORMAT("elf32-s390", "elf32-s390", "elf32-s390") -OUTPUT_ARCH(s390) +OUTPUT_ARCH(s390:31-bit) ENTRY(startup) jiffies = jiffies_64 + 4; #else diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild index 86eadceff097..29f83beeef7a 100644 --- a/arch/sh/include/asm/Kbuild +++ b/arch/sh/include/asm/Kbuild @@ -1,4 +1,3 @@ -include include/asm-generic/Kbuild.asm generic-y += bitsperlong.h generic-y += cputime.h @@ -34,13 +33,3 @@ generic-y += termbits.h generic-y += termios.h generic-y += ucontext.h generic-y += xor.h - -header-y += cachectl.h -header-y += cpu-features.h -header-y += hw_breakpoint.h -header-y += posix_types_32.h -header-y += posix_types_64.h -header-y += ptrace_32.h -header-y += ptrace_64.h -header-y += unistd_32.h -header-y += unistd_64.h diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h index 89890f61a7b9..ec9ad593c3da 100644 --- a/arch/sh/include/asm/hw_breakpoint.h +++ b/arch/sh/include/asm/hw_breakpoint.h @@ -1,7 +1,8 @@ #ifndef __ASM_SH_HW_BREAKPOINT_H #define __ASM_SH_HW_BREAKPOINT_H -#ifdef __KERNEL__ +#include <uapi/asm/hw_breakpoint.h> + #define __ARCH_HW_BREAKPOINT_H #include <linux/kdebug.h> @@ -66,5 +67,4 @@ extern int register_sh_ubc(struct sh_ubc *); extern struct pmu perf_ops_bp; -#endif /* __KERNEL__ */ #endif /* __ASM_SH_HW_BREAKPOINT_H */ diff --git a/arch/sh/include/asm/posix_types.h b/arch/sh/include/asm/posix_types.h index f08449bcbde7..1aa781079b1e 100644 --- a/arch/sh/include/asm/posix_types.h +++ b/arch/sh/include/asm/posix_types.h @@ -1,13 +1,5 @@ -#ifdef __KERNEL__ # ifdef CONFIG_SUPERH32 # include <asm/posix_types_32.h> # else # include <asm/posix_types_64.h> # endif -#else -# ifdef __SH5__ -# include <asm/posix_types_64.h> -# else -# include <asm/posix_types_32.h> -# endif -#endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index a4a38dff997a..2506c7db76b7 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h @@ -1,42 +1,16 @@ -#ifndef __ASM_SH_PTRACE_H -#define __ASM_SH_PTRACE_H - /* * Copyright (C) 1999, 2000 Niibe Yutaka */ +#ifndef __ASM_SH_PTRACE_H +#define __ASM_SH_PTRACE_H -#define PTRACE_GETREGS 12 /* General registers */ -#define PTRACE_SETREGS 13 - -#define PTRACE_GETFPREGS 14 /* FPU registers */ -#define PTRACE_SETFPREGS 15 - -#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ - -#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ -#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ - -#define PTRACE_GETDSPREGS 55 /* DSP registers */ -#define PTRACE_SETDSPREGS 56 - -#define PT_TEXT_END_ADDR 240 -#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */ -#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ -#define PT_TEXT_LEN 252 - -#if defined(__SH5__) || defined(CONFIG_CPU_SH5) -#include <asm/ptrace_64.h> -#else -#include <asm/ptrace_32.h> -#endif - -#ifdef __KERNEL__ #include <linux/stringify.h> #include <linux/stddef.h> #include <linux/thread_info.h> #include <asm/addrspace.h> #include <asm/page.h> +#include <uapi/asm/ptrace.h> #define user_mode(regs) (((regs)->sr & 0x40000000)==0) #define kernel_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15]) @@ -140,6 +114,4 @@ static inline unsigned long profile_pc(struct pt_regs *regs) #define profile_pc profile_pc #include <asm-generic/ptrace.h> -#endif /* __KERNEL__ */ - #endif /* __ASM_SH_PTRACE_H */ diff --git a/arch/sh/include/asm/ptrace_32.h b/arch/sh/include/asm/ptrace_32.h index 2d3e906aa722..1dd4480c5363 100644 --- a/arch/sh/include/asm/ptrace_32.h +++ b/arch/sh/include/asm/ptrace_32.h @@ -1,79 +1,8 @@ #ifndef __ASM_SH_PTRACE_32_H #define __ASM_SH_PTRACE_32_H -/* - * GCC defines register number like this: - * ----------------------------- - * 0 - 15 are integer registers - * 17 - 22 are control/special registers - * 24 - 39 fp registers - * 40 - 47 xd registers - * 48 - fpscr register - * ----------------------------- - * - * We follows above, except: - * 16 --- program counter (PC) - * 22 --- syscall # - * 23 --- floating point communication register - */ -#define REG_REG0 0 -#define REG_REG15 15 +#include <uapi/asm/ptrace_32.h> -#define REG_PC 16 - -#define REG_PR 17 -#define REG_SR 18 -#define REG_GBR 19 -#define REG_MACH 20 -#define REG_MACL 21 - -#define REG_SYSCALL 22 - -#define REG_FPREG0 23 -#define REG_FPREG15 38 -#define REG_XFREG0 39 -#define REG_XFREG15 54 - -#define REG_FPSCR 55 -#define REG_FPUL 56 - -/* - * This struct defines the way the registers are stored on the - * kernel stack during a system call or other kernel entry. - */ -struct pt_regs { - unsigned long regs[16]; - unsigned long pc; - unsigned long pr; - unsigned long sr; - unsigned long gbr; - unsigned long mach; - unsigned long macl; - long tra; -}; - -/* - * This struct defines the way the DSP registers are stored on the - * kernel stack during a system call or other kernel entry. - */ -struct pt_dspregs { - unsigned long a1; - unsigned long a0g; - unsigned long a1g; - unsigned long m0; - unsigned long m1; - unsigned long a0; - unsigned long x0; - unsigned long x1; - unsigned long y0; - unsigned long y1; - unsigned long dsr; - unsigned long rs; - unsigned long re; - unsigned long mod; -}; - -#ifdef __KERNEL__ #define MAX_REG_OFFSET offsetof(struct pt_regs, tra) static inline long regs_return_value(struct pt_regs *regs) @@ -81,6 +10,4 @@ static inline long regs_return_value(struct pt_regs *regs) return regs->regs[0]; } -#endif /* __KERNEL__ */ - #endif /* __ASM_SH_PTRACE_32_H */ diff --git a/arch/sh/include/asm/ptrace_64.h b/arch/sh/include/asm/ptrace_64.h index eb3fcceaf64b..97f4b5660f2c 100644 --- a/arch/sh/include/asm/ptrace_64.h +++ b/arch/sh/include/asm/ptrace_64.h @@ -1,16 +1,8 @@ #ifndef __ASM_SH_PTRACE_64_H #define __ASM_SH_PTRACE_64_H -struct pt_regs { - unsigned long long pc; - unsigned long long sr; - long long syscall_nr; - unsigned long long regs[63]; - unsigned long long tregs[8]; - unsigned long long pad[2]; -}; +#include <uapi/asm/ptrace_64.h> -#ifdef __KERNEL__ #define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7]) static inline long regs_return_value(struct pt_regs *regs) @@ -18,6 +10,4 @@ static inline long regs_return_value(struct pt_regs *regs) return regs->regs[3]; } -#endif /* __KERNEL__ */ - #endif /* __ASM_SH_PTRACE_64_H */ diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h index 465a22df8fd0..99238108e7a5 100644 --- a/arch/sh/include/asm/setup.h +++ b/arch/sh/include/asm/setup.h @@ -1,9 +1,8 @@ #ifndef _SH_SETUP_H #define _SH_SETUP_H -#include <asm-generic/setup.h> +#include <uapi/asm/setup.h> -#ifdef __KERNEL__ /* * This is set up by the setup-routine at boot-time */ @@ -22,6 +21,4 @@ void sh_mv_setup(void); void check_for_initrd(void); void per_cpu_trap_init(void); -#endif /* __KERNEL__ */ - #endif /* _SH_SETUP_H */ diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h index f8421f7ad63a..6a31053fa5e3 100644 --- a/arch/sh/include/asm/types.h +++ b/arch/sh/include/asm/types.h @@ -1,12 +1,11 @@ #ifndef __ASM_SH_TYPES_H #define __ASM_SH_TYPES_H -#include <asm-generic/types.h> +#include <uapi/asm/types.h> /* * These aren't exported outside the kernel to avoid name space clashes */ -#ifdef __KERNEL__ #ifndef __ASSEMBLY__ #ifdef CONFIG_SUPERH32 @@ -18,6 +17,4 @@ typedef u64 reg_size_t; #endif #endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ - #endif /* __ASM_SH_TYPES_H */ diff --git a/arch/sh/include/asm/unistd.h b/arch/sh/include/asm/unistd.h index 307201a854f3..38956dfa76f7 100644 --- a/arch/sh/include/asm/unistd.h +++ b/arch/sh/include/asm/unistd.h @@ -1,4 +1,3 @@ -#ifdef __KERNEL__ # ifdef CONFIG_SUPERH32 # include <asm/unistd_32.h> # else @@ -38,10 +37,4 @@ */ # define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#else -# ifdef __SH5__ -# include <asm/unistd_64.h> -# else -# include <asm/unistd_32.h> -# endif -#endif +#include <uapi/asm/unistd.h> diff --git a/arch/sh/include/uapi/asm/Kbuild b/arch/sh/include/uapi/asm/Kbuild index baebb3da1d44..60613ae78513 100644 --- a/arch/sh/include/uapi/asm/Kbuild +++ b/arch/sh/include/uapi/asm/Kbuild @@ -1,3 +1,25 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +header-y += auxvec.h +header-y += byteorder.h +header-y += cachectl.h +header-y += cpu-features.h +header-y += hw_breakpoint.h +header-y += ioctls.h +header-y += posix_types.h +header-y += posix_types_32.h +header-y += posix_types_64.h +header-y += ptrace.h +header-y += ptrace_32.h +header-y += ptrace_64.h +header-y += setup.h +header-y += sigcontext.h +header-y += signal.h +header-y += sockios.h +header-y += stat.h +header-y += swab.h +header-y += types.h +header-y += unistd.h +header-y += unistd_32.h +header-y += unistd_64.h diff --git a/arch/sh/include/asm/auxvec.h b/arch/sh/include/uapi/asm/auxvec.h index 8bcc51af9367..8bcc51af9367 100644 --- a/arch/sh/include/asm/auxvec.h +++ b/arch/sh/include/uapi/asm/auxvec.h diff --git a/arch/sh/include/asm/byteorder.h b/arch/sh/include/uapi/asm/byteorder.h index db2f5d7cb17d..db2f5d7cb17d 100644 --- a/arch/sh/include/asm/byteorder.h +++ b/arch/sh/include/uapi/asm/byteorder.h diff --git a/arch/sh/include/asm/cachectl.h b/arch/sh/include/uapi/asm/cachectl.h index 6ffb4b7a212e..6ffb4b7a212e 100644 --- a/arch/sh/include/asm/cachectl.h +++ b/arch/sh/include/uapi/asm/cachectl.h diff --git a/arch/sh/include/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h index 694abe490edb..694abe490edb 100644 --- a/arch/sh/include/asm/cpu-features.h +++ b/arch/sh/include/uapi/asm/cpu-features.h diff --git a/arch/sh/include/uapi/asm/hw_breakpoint.h b/arch/sh/include/uapi/asm/hw_breakpoint.h new file mode 100644 index 000000000000..ae5704fa77ad --- /dev/null +++ b/arch/sh/include/uapi/asm/hw_breakpoint.h @@ -0,0 +1,4 @@ +/* + * There isn't anything here anymore, but the file must not be empty or patch + * will delete it. + */ diff --git a/arch/sh/include/asm/ioctls.h b/arch/sh/include/uapi/asm/ioctls.h index a6769f352bf6..a6769f352bf6 100644 --- a/arch/sh/include/asm/ioctls.h +++ b/arch/sh/include/uapi/asm/ioctls.h diff --git a/arch/sh/include/uapi/asm/posix_types.h b/arch/sh/include/uapi/asm/posix_types.h new file mode 100644 index 000000000000..dc55e5adfe1e --- /dev/null +++ b/arch/sh/include/uapi/asm/posix_types.h @@ -0,0 +1,7 @@ +#ifndef __KERNEL__ +# ifdef __SH5__ +# include <asm/posix_types_64.h> +# else +# include <asm/posix_types_32.h> +# endif +#endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/posix_types_32.h b/arch/sh/include/uapi/asm/posix_types_32.h index ba0bdc423b07..ba0bdc423b07 100644 --- a/arch/sh/include/asm/posix_types_32.h +++ b/arch/sh/include/uapi/asm/posix_types_32.h diff --git a/arch/sh/include/asm/posix_types_64.h b/arch/sh/include/uapi/asm/posix_types_64.h index 244f7e950e17..244f7e950e17 100644 --- a/arch/sh/include/asm/posix_types_64.h +++ b/arch/sh/include/uapi/asm/posix_types_64.h diff --git a/arch/sh/include/uapi/asm/ptrace.h b/arch/sh/include/uapi/asm/ptrace.h new file mode 100644 index 000000000000..8b8c5aca9c28 --- /dev/null +++ b/arch/sh/include/uapi/asm/ptrace.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 1999, 2000 Niibe Yutaka + */ +#ifndef _UAPI__ASM_SH_PTRACE_H +#define _UAPI__ASM_SH_PTRACE_H + + +#define PTRACE_GETREGS 12 /* General registers */ +#define PTRACE_SETREGS 13 + +#define PTRACE_GETFPREGS 14 /* FPU registers */ +#define PTRACE_SETFPREGS 15 + +#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ + +#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ +#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ + +#define PTRACE_GETDSPREGS 55 /* DSP registers */ +#define PTRACE_SETDSPREGS 56 + +#define PT_TEXT_END_ADDR 240 +#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */ +#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ +#define PT_TEXT_LEN 252 + +#if defined(__SH5__) || defined(CONFIG_CPU_SH5) +#include <asm/ptrace_64.h> +#else +#include <asm/ptrace_32.h> +#endif + + +#endif /* _UAPI__ASM_SH_PTRACE_H */ diff --git a/arch/sh/include/uapi/asm/ptrace_32.h b/arch/sh/include/uapi/asm/ptrace_32.h new file mode 100644 index 000000000000..926e0cefc2bb --- /dev/null +++ b/arch/sh/include/uapi/asm/ptrace_32.h @@ -0,0 +1,77 @@ +#ifndef _UAPI__ASM_SH_PTRACE_32_H +#define _UAPI__ASM_SH_PTRACE_32_H + +/* + * GCC defines register number like this: + * ----------------------------- + * 0 - 15 are integer registers + * 17 - 22 are control/special registers + * 24 - 39 fp registers + * 40 - 47 xd registers + * 48 - fpscr register + * ----------------------------- + * + * We follows above, except: + * 16 --- program counter (PC) + * 22 --- syscall # + * 23 --- floating point communication register + */ +#define REG_REG0 0 +#define REG_REG15 15 + +#define REG_PC 16 + +#define REG_PR 17 +#define REG_SR 18 +#define REG_GBR 19 +#define REG_MACH 20 +#define REG_MACL 21 + +#define REG_SYSCALL 22 + +#define REG_FPREG0 23 +#define REG_FPREG15 38 +#define REG_XFREG0 39 +#define REG_XFREG15 54 + +#define REG_FPSCR 55 +#define REG_FPUL 56 + +/* + * This struct defines the way the registers are stored on the + * kernel stack during a system call or other kernel entry. + */ +struct pt_regs { + unsigned long regs[16]; + unsigned long pc; + unsigned long pr; + unsigned long sr; + unsigned long gbr; + unsigned long mach; + unsigned long macl; + long tra; +}; + +/* + * This struct defines the way the DSP registers are stored on the + * kernel stack during a system call or other kernel entry. + */ +struct pt_dspregs { + unsigned long a1; + unsigned long a0g; + unsigned long a1g; + unsigned long m0; + unsigned long m1; + unsigned long a0; + unsigned long x0; + unsigned long x1; + unsigned long y0; + unsigned long y1; + unsigned long dsr; + unsigned long rs; + unsigned long re; + unsigned long mod; +}; + + +#endif /* _UAPI__ASM_SH_PTRACE_32_H */ diff --git a/arch/sh/include/uapi/asm/ptrace_64.h b/arch/sh/include/uapi/asm/ptrace_64.h new file mode 100644 index 000000000000..0e52ee83e946 --- /dev/null +++ b/arch/sh/include/uapi/asm/ptrace_64.h @@ -0,0 +1,14 @@ +#ifndef _UAPI__ASM_SH_PTRACE_64_H +#define _UAPI__ASM_SH_PTRACE_64_H + +struct pt_regs { + unsigned long long pc; + unsigned long long sr; + long long syscall_nr; + unsigned long long regs[63]; + unsigned long long tregs[8]; + unsigned long long pad[2]; +}; + + +#endif /* _UAPI__ASM_SH_PTRACE_64_H */ diff --git a/arch/sh/include/uapi/asm/setup.h b/arch/sh/include/uapi/asm/setup.h new file mode 100644 index 000000000000..552df83f1a49 --- /dev/null +++ b/arch/sh/include/uapi/asm/setup.h @@ -0,0 +1 @@ +#include <asm-generic/setup.h> diff --git a/arch/sh/include/asm/sigcontext.h b/arch/sh/include/uapi/asm/sigcontext.h index 8ce1435bc0bf..8ce1435bc0bf 100644 --- a/arch/sh/include/asm/sigcontext.h +++ b/arch/sh/include/uapi/asm/sigcontext.h diff --git a/arch/sh/include/asm/signal.h b/arch/sh/include/uapi/asm/signal.h index 9ac530a90bce..9ac530a90bce 100644 --- a/arch/sh/include/asm/signal.h +++ b/arch/sh/include/uapi/asm/signal.h diff --git a/arch/sh/include/asm/sockios.h b/arch/sh/include/uapi/asm/sockios.h index cf8b96b1f9ab..cf8b96b1f9ab 100644 --- a/arch/sh/include/asm/sockios.h +++ b/arch/sh/include/uapi/asm/sockios.h diff --git a/arch/sh/include/asm/stat.h b/arch/sh/include/uapi/asm/stat.h index e1810cc6e3da..e1810cc6e3da 100644 --- a/arch/sh/include/asm/stat.h +++ b/arch/sh/include/uapi/asm/stat.h diff --git a/arch/sh/include/asm/swab.h b/arch/sh/include/uapi/asm/swab.h index 1cd09767a7a3..1cd09767a7a3 100644 --- a/arch/sh/include/asm/swab.h +++ b/arch/sh/include/uapi/asm/swab.h diff --git a/arch/sh/include/uapi/asm/types.h b/arch/sh/include/uapi/asm/types.h new file mode 100644 index 000000000000..b9e79bc580dd --- /dev/null +++ b/arch/sh/include/uapi/asm/types.h @@ -0,0 +1 @@ +#include <asm-generic/types.h> diff --git a/arch/sh/include/uapi/asm/unistd.h b/arch/sh/include/uapi/asm/unistd.h new file mode 100644 index 000000000000..eeef88dd53ce --- /dev/null +++ b/arch/sh/include/uapi/asm/unistd.h @@ -0,0 +1,7 @@ +#ifndef __KERNEL__ +# ifdef __SH5__ +# include <asm/unistd_64.h> +# else +# include <asm/unistd_32.h> +# endif +#endif diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/uapi/asm/unistd_32.h index 72fd1e061006..9e465f246dc1 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/uapi/asm/unistd_32.h @@ -378,7 +378,8 @@ #define __NR_setns 364 #define __NR_process_vm_readv 365 #define __NR_process_vm_writev 366 +#define __NR_kcmp 367 -#define NR_syscalls 367 +#define NR_syscalls 368 #endif /* __ASM_SH_UNISTD_32_H */ diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/uapi/asm/unistd_64.h index a28edc329692..8e3a2edd284e 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/uapi/asm/unistd_64.h @@ -398,7 +398,8 @@ #define __NR_setns 375 #define __NR_process_vm_readv 376 #define __NR_process_vm_writev 377 +#define __NR_kcmp 378 -#define NR_syscalls 378 +#define NR_syscalls 379 #endif /* __ASM_SH_UNISTD_64_H */ diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S index 4b68f0f79761..fe97ae5e56f1 100644 --- a/arch/sh/kernel/syscalls_32.S +++ b/arch/sh/kernel/syscalls_32.S @@ -384,3 +384,4 @@ ENTRY(sys_call_table) .long sys_setns .long sys_process_vm_readv /* 365 */ .long sys_process_vm_writev + .long sys_kcmp diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S index 0956345b36ef..5c7b1c67bdc1 100644 --- a/arch/sh/kernel/syscalls_64.S +++ b/arch/sh/kernel/syscalls_64.S @@ -404,3 +404,4 @@ sys_call_table: .long sys_setns /* 375 */ .long sys_process_vm_readv .long sys_process_vm_writev + .long sys_kcmp diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h index 0c6f6b068289..da43bdc62294 100644 --- a/arch/sparc/include/asm/ptrace.h +++ b/arch/sparc/include/asm/ptrace.h @@ -42,7 +42,18 @@ struct global_reg_snapshot { struct thread_info *thread; unsigned long pad1; }; -extern struct global_reg_snapshot global_reg_snapshot[NR_CPUS]; + +struct global_pmu_snapshot { + unsigned long pcr[4]; + unsigned long pic[4]; +}; + +union global_cpu_snapshot { + struct global_reg_snapshot reg; + struct global_pmu_snapshot pmu; +}; + +extern union global_cpu_snapshot global_cpu_snapshot[NR_CPUS]; #define force_successful_syscall_return() \ do { current_thread_info()->syscall_noerror = 1; \ diff --git a/arch/sparc/include/asm/smp_64.h b/arch/sparc/include/asm/smp_64.h index 29862a9e9065..dd3bef4b9896 100644 --- a/arch/sparc/include/asm/smp_64.h +++ b/arch/sparc/include/asm/smp_64.h @@ -48,6 +48,7 @@ extern void smp_fill_in_sib_core_maps(void); extern void cpu_play_dead(void); extern void smp_fetch_global_regs(void); +extern void smp_fetch_global_pmu(void); struct seq_file; void smp_bogo(struct seq_file *); @@ -65,6 +66,7 @@ extern void __cpu_die(unsigned int cpu); #define hard_smp_processor_id() 0 #define smp_fill_in_sib_core_maps() do { } while (0) #define smp_fetch_global_regs() do { } while (0) +#define smp_fetch_global_pmu() do { } while (0) #endif /* !(CONFIG_SMP) */ diff --git a/arch/sparc/include/uapi/asm/sigcontext.h b/arch/sparc/include/uapi/asm/sigcontext.h index e69de29bb2d1..ae5704fa77ad 100644 --- a/arch/sparc/include/uapi/asm/sigcontext.h +++ b/arch/sparc/include/uapi/asm/sigcontext.h @@ -0,0 +1,4 @@ +/* + * There isn't anything here anymore, but the file must not be empty or patch + * will delete it. + */ diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index e48651dace1b..885a8af74064 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c @@ -817,15 +817,17 @@ static u64 nop_for_index(int idx) static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, int idx) { - u64 val, mask = mask_for_index(idx); + u64 enc, val, mask = mask_for_index(idx); int pcr_index = 0; if (sparc_pmu->num_pcrs > 1) pcr_index = idx; + enc = perf_event_get_enc(cpuc->events[idx]); + val = cpuc->pcr[pcr_index]; val &= ~mask; - val |= hwc->config; + val |= event_encoding(enc, idx); cpuc->pcr[pcr_index] = val; pcr_ops->write_pcr(pcr_index, cpuc->pcr[pcr_index]); @@ -1738,8 +1740,6 @@ static void perf_callchain_user_64(struct perf_callchain_entry *entry, { unsigned long ufp; - perf_callchain_store(entry, regs->tpc); - ufp = regs->u_regs[UREG_I6] + STACK_BIAS; do { struct sparc_stackf *usf, sf; @@ -1760,8 +1760,6 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry, { unsigned long ufp; - perf_callchain_store(entry, regs->tpc); - ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; do { struct sparc_stackf32 *usf, sf; @@ -1780,6 +1778,11 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry, void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs) { + perf_callchain_store(entry, regs->tpc); + + if (!current->mm) + return; + flushw_user(); if (test_thread_flag(TIF_32BIT)) perf_callchain_user_32(entry, regs); diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c index fcaa59421126..d778248ef3f8 100644 --- a/arch/sparc/kernel/process_64.c +++ b/arch/sparc/kernel/process_64.c @@ -27,6 +27,7 @@ #include <linux/tick.h> #include <linux/init.h> #include <linux/cpu.h> +#include <linux/perf_event.h> #include <linux/elfcore.h> #include <linux/sysrq.h> #include <linux/nmi.h> @@ -47,6 +48,7 @@ #include <asm/syscalls.h> #include <asm/irq_regs.h> #include <asm/smp.h> +#include <asm/pcr.h> #include "kstack.h" @@ -204,18 +206,22 @@ void show_regs(struct pt_regs *regs) show_stack(current, (unsigned long *) regs->u_regs[UREG_FP]); } -struct global_reg_snapshot global_reg_snapshot[NR_CPUS]; -static DEFINE_SPINLOCK(global_reg_snapshot_lock); +union global_cpu_snapshot global_cpu_snapshot[NR_CPUS]; +static DEFINE_SPINLOCK(global_cpu_snapshot_lock); static void __global_reg_self(struct thread_info *tp, struct pt_regs *regs, int this_cpu) { + struct global_reg_snapshot *rp; + flushw_all(); - global_reg_snapshot[this_cpu].tstate = regs->tstate; - global_reg_snapshot[this_cpu].tpc = regs->tpc; - global_reg_snapshot[this_cpu].tnpc = regs->tnpc; - global_reg_snapshot[this_cpu].o7 = regs->u_regs[UREG_I7]; + rp = &global_cpu_snapshot[this_cpu].reg; + + rp->tstate = regs->tstate; + rp->tpc = regs->tpc; + rp->tnpc = regs->tnpc; + rp->o7 = regs->u_regs[UREG_I7]; if (regs->tstate & TSTATE_PRIV) { struct reg_window *rw; @@ -223,17 +229,17 @@ static void __global_reg_self(struct thread_info *tp, struct pt_regs *regs, rw = (struct reg_window *) (regs->u_regs[UREG_FP] + STACK_BIAS); if (kstack_valid(tp, (unsigned long) rw)) { - global_reg_snapshot[this_cpu].i7 = rw->ins[7]; + rp->i7 = rw->ins[7]; rw = (struct reg_window *) (rw->ins[6] + STACK_BIAS); if (kstack_valid(tp, (unsigned long) rw)) - global_reg_snapshot[this_cpu].rpc = rw->ins[7]; + rp->rpc = rw->ins[7]; } } else { - global_reg_snapshot[this_cpu].i7 = 0; - global_reg_snapshot[this_cpu].rpc = 0; + rp->i7 = 0; + rp->rpc = 0; } - global_reg_snapshot[this_cpu].thread = tp; + rp->thread = tp; } /* In order to avoid hangs we do not try to synchronize with the @@ -261,9 +267,9 @@ void arch_trigger_all_cpu_backtrace(void) if (!regs) regs = tp->kregs; - spin_lock_irqsave(&global_reg_snapshot_lock, flags); + spin_lock_irqsave(&global_cpu_snapshot_lock, flags); - memset(global_reg_snapshot, 0, sizeof(global_reg_snapshot)); + memset(global_cpu_snapshot, 0, sizeof(global_cpu_snapshot)); this_cpu = raw_smp_processor_id(); @@ -272,7 +278,7 @@ void arch_trigger_all_cpu_backtrace(void) smp_fetch_global_regs(); for_each_online_cpu(cpu) { - struct global_reg_snapshot *gp = &global_reg_snapshot[cpu]; + struct global_reg_snapshot *gp = &global_cpu_snapshot[cpu].reg; __global_reg_poll(gp); @@ -295,9 +301,9 @@ void arch_trigger_all_cpu_backtrace(void) } } - memset(global_reg_snapshot, 0, sizeof(global_reg_snapshot)); + memset(global_cpu_snapshot, 0, sizeof(global_cpu_snapshot)); - spin_unlock_irqrestore(&global_reg_snapshot_lock, flags); + spin_unlock_irqrestore(&global_cpu_snapshot_lock, flags); } #ifdef CONFIG_MAGIC_SYSRQ @@ -309,16 +315,90 @@ static void sysrq_handle_globreg(int key) static struct sysrq_key_op sparc_globalreg_op = { .handler = sysrq_handle_globreg, - .help_msg = "Globalregs", + .help_msg = "global-regs(Y)", .action_msg = "Show Global CPU Regs", }; -static int __init sparc_globreg_init(void) +static void __global_pmu_self(int this_cpu) +{ + struct global_pmu_snapshot *pp; + int i, num; + + pp = &global_cpu_snapshot[this_cpu].pmu; + + num = 1; + if (tlb_type == hypervisor && + sun4v_chip_type >= SUN4V_CHIP_NIAGARA4) + num = 4; + + for (i = 0; i < num; i++) { + pp->pcr[i] = pcr_ops->read_pcr(i); + pp->pic[i] = pcr_ops->read_pic(i); + } +} + +static void __global_pmu_poll(struct global_pmu_snapshot *pp) +{ + int limit = 0; + + while (!pp->pcr[0] && ++limit < 100) { + barrier(); + udelay(1); + } +} + +static void pmu_snapshot_all_cpus(void) { - return register_sysrq_key('y', &sparc_globalreg_op); + unsigned long flags; + int this_cpu, cpu; + + spin_lock_irqsave(&global_cpu_snapshot_lock, flags); + + memset(global_cpu_snapshot, 0, sizeof(global_cpu_snapshot)); + + this_cpu = raw_smp_processor_id(); + + __global_pmu_self(this_cpu); + + smp_fetch_global_pmu(); + + for_each_online_cpu(cpu) { + struct global_pmu_snapshot *pp = &global_cpu_snapshot[cpu].pmu; + + __global_pmu_poll(pp); + + printk("%c CPU[%3d]: PCR[%08lx:%08lx:%08lx:%08lx] PIC[%08lx:%08lx:%08lx:%08lx]\n", + (cpu == this_cpu ? '*' : ' '), cpu, + pp->pcr[0], pp->pcr[1], pp->pcr[2], pp->pcr[3], + pp->pic[0], pp->pic[1], pp->pic[2], pp->pic[3]); + } + + memset(global_cpu_snapshot, 0, sizeof(global_cpu_snapshot)); + + spin_unlock_irqrestore(&global_cpu_snapshot_lock, flags); +} + +static void sysrq_handle_globpmu(int key) +{ + pmu_snapshot_all_cpus(); +} + +static struct sysrq_key_op sparc_globalpmu_op = { + .handler = sysrq_handle_globpmu, + .help_msg = "global-pmu(X)", + .action_msg = "Show Global PMU Regs", +}; + +static int __init sparc_sysrq_init(void) +{ + int ret = register_sysrq_key('y', &sparc_globalreg_op); + + if (!ret) + ret = register_sysrq_key('x', &sparc_globalpmu_op); + return ret; } -core_initcall(sparc_globreg_init); +core_initcall(sparc_sysrq_init); #endif diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c index 781bcb10b8bd..d94b878577b7 100644 --- a/arch/sparc/kernel/smp_64.c +++ b/arch/sparc/kernel/smp_64.c @@ -852,6 +852,8 @@ extern unsigned long xcall_flush_tlb_mm; extern unsigned long xcall_flush_tlb_pending; extern unsigned long xcall_flush_tlb_kernel_range; extern unsigned long xcall_fetch_glob_regs; +extern unsigned long xcall_fetch_glob_pmu; +extern unsigned long xcall_fetch_glob_pmu_n4; extern unsigned long xcall_receive_signal; extern unsigned long xcall_new_mmu_context_version; #ifdef CONFIG_KGDB @@ -1000,6 +1002,15 @@ void smp_fetch_global_regs(void) smp_cross_call(&xcall_fetch_glob_regs, 0, 0, 0); } +void smp_fetch_global_pmu(void) +{ + if (tlb_type == hypervisor && + sun4v_chip_type >= SUN4V_CHIP_NIAGARA4) + smp_cross_call(&xcall_fetch_glob_pmu_n4, 0, 0, 0); + else + smp_cross_call(&xcall_fetch_glob_pmu, 0, 0, 0); +} + /* We know that the window frames of the user have been flushed * to the stack before we get here because all callers of us * are flush_tlb_*() routines, and these run after flush_cache_*() diff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S index 874162a11ceb..f8e13d421fcb 100644 --- a/arch/sparc/mm/ultra.S +++ b/arch/sparc/mm/ultra.S @@ -481,8 +481,8 @@ xcall_sync_tick: .globl xcall_fetch_glob_regs xcall_fetch_glob_regs: - sethi %hi(global_reg_snapshot), %g1 - or %g1, %lo(global_reg_snapshot), %g1 + sethi %hi(global_cpu_snapshot), %g1 + or %g1, %lo(global_cpu_snapshot), %g1 __GET_CPUID(%g2) sllx %g2, 6, %g3 add %g1, %g3, %g1 @@ -509,6 +509,66 @@ xcall_fetch_glob_regs: stx %g3, [%g1 + GR_SNAP_THREAD] retry + .globl xcall_fetch_glob_pmu +xcall_fetch_glob_pmu: + sethi %hi(global_cpu_snapshot), %g1 + or %g1, %lo(global_cpu_snapshot), %g1 + __GET_CPUID(%g2) + sllx %g2, 6, %g3 + add %g1, %g3, %g1 + rd %pic, %g7 + stx %g7, [%g1 + (4 * 8)] + rd %pcr, %g7 + stx %g7, [%g1 + (0 * 8)] + retry + + .globl xcall_fetch_glob_pmu_n4 +xcall_fetch_glob_pmu_n4: + sethi %hi(global_cpu_snapshot), %g1 + or %g1, %lo(global_cpu_snapshot), %g1 + __GET_CPUID(%g2) + sllx %g2, 6, %g3 + add %g1, %g3, %g1 + + ldxa [%g0] ASI_PIC, %g7 + stx %g7, [%g1 + (4 * 8)] + mov 0x08, %g3 + ldxa [%g3] ASI_PIC, %g7 + stx %g7, [%g1 + (5 * 8)] + mov 0x10, %g3 + ldxa [%g3] ASI_PIC, %g7 + stx %g7, [%g1 + (6 * 8)] + mov 0x18, %g3 + ldxa [%g3] ASI_PIC, %g7 + stx %g7, [%g1 + (7 * 8)] + + mov %o0, %g2 + mov %o1, %g3 + mov %o5, %g7 + + mov HV_FAST_VT_GET_PERFREG, %o5 + mov 3, %o0 + ta HV_FAST_TRAP + stx %o1, [%g1 + (3 * 8)] + mov HV_FAST_VT_GET_PERFREG, %o5 + mov 2, %o0 + ta HV_FAST_TRAP + stx %o1, [%g1 + (2 * 8)] + mov HV_FAST_VT_GET_PERFREG, %o5 + mov 1, %o0 + ta HV_FAST_TRAP + stx %o1, [%g1 + (1 * 8)] + mov HV_FAST_VT_GET_PERFREG, %o5 + mov 0, %o0 + ta HV_FAST_TRAP + stx %o1, [%g1 + (0 * 8)] + + mov %g2, %o0 + mov %g3, %o1 + mov %g7, %o5 + + retry + #ifdef DCACHE_ALIASING_POSSIBLE .align 32 .globl xcall_flush_dcache_page_cheetah diff --git a/arch/tile/Makefile b/arch/tile/Makefile index 55640cf92597..3d15364c6071 100644 --- a/arch/tile/Makefile +++ b/arch/tile/Makefile @@ -26,6 +26,10 @@ $(error Set TILERA_ROOT or CROSS_COMPILE when building $(ARCH) on $(HOST_ARCH)) endif endif +# The tile compiler may emit .eh_frame information for backtracing. +# In kernel modules, this causes load failures due to unsupported relocations. +KBUILD_CFLAGS += -fno-asynchronous-unwind-tables + ifneq ($(CONFIG_DEBUG_EXTRA_FLAGS),"") KBUILD_CFLAGS += $(CONFIG_DEBUG_EXTRA_FLAGS) endif diff --git a/arch/tile/include/arch/Kbuild b/arch/tile/include/arch/Kbuild index e69de29bb2d1..3751c9fabcf2 100644 --- a/arch/tile/include/arch/Kbuild +++ b/arch/tile/include/arch/Kbuild @@ -0,0 +1 @@ +# Tile arch headers diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild index c68808a09da7..6948015e08a2 100644 --- a/arch/tile/include/asm/Kbuild +++ b/arch/tile/include/asm/Kbuild @@ -1,8 +1,6 @@ header-y += ../arch/ -header-y += ucontext.h - generic-y += bug.h generic-y += bugs.h generic-y += clkdev.h @@ -37,5 +35,4 @@ generic-y += statfs.h generic-y += termbits.h generic-y += termios.h generic-y += types.h -generic-y += ucontext.h generic-y += xor.h diff --git a/arch/tile/include/uapi/asm/Kbuild b/arch/tile/include/uapi/asm/Kbuild index 5c6915fd30b5..c20db8e428bf 100644 --- a/arch/tile/include/uapi/asm/Kbuild +++ b/arch/tile/include/uapi/asm/Kbuild @@ -15,4 +15,7 @@ header-y += siginfo.h header-y += signal.h header-y += stat.h header-y += swab.h +header-y += ucontext.h header-y += unistd.h + +generic-y += ucontext.h diff --git a/arch/tile/kernel/module.c b/arch/tile/kernel/module.c index 001cbfa10ac6..243ffebe38d6 100644 --- a/arch/tile/kernel/module.c +++ b/arch/tile/kernel/module.c @@ -24,16 +24,6 @@ #include <asm/homecache.h> #include <arch/opcode.h> -#ifdef __tilegx__ -# define Elf_Rela Elf64_Rela -# define ELF_R_SYM ELF64_R_SYM -# define ELF_R_TYPE ELF64_R_TYPE -#else -# define Elf_Rela Elf32_Rela -# define ELF_R_SYM ELF32_R_SYM -# define ELF_R_TYPE ELF32_R_TYPE -#endif - #ifdef MODULE_DEBUG #define DEBUGP printk #else diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 58790bd85c1d..05afcca66de6 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -142,7 +142,7 @@ KBUILD_CFLAGS += $(call cc-option,-mno-avx,) KBUILD_CFLAGS += $(mflags-y) KBUILD_AFLAGS += $(mflags-y) -archscripts: +archscripts: scripts_basic $(Q)$(MAKE) $(build)=arch/x86/tools relocs ### diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c index 7c04d0da709b..1b9c22bea8a7 100644 --- a/arch/x86/crypto/aesni-intel_glue.c +++ b/arch/x86/crypto/aesni-intel_glue.c @@ -515,6 +515,11 @@ static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key, } +static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in) +{ + aesni_enc(ctx, out, in); +} + static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes) { @@ -525,7 +530,7 @@ static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst, .tbuflen = sizeof(buf), .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx), - .tweak_fn = XTS_TWEAK_CAST(aesni_enc), + .tweak_fn = aesni_xts_tweak, .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx), .crypt_fn = lrw_xts_encrypt_callback, }; @@ -550,7 +555,7 @@ static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, .tbuflen = sizeof(buf), .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx), - .tweak_fn = XTS_TWEAK_CAST(aesni_enc), + .tweak_fn = aesni_xts_tweak, .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx), .crypt_fn = lrw_xts_decrypt_callback, }; diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h index c9dcc181d4d1..6e8fdf5ad113 100644 --- a/arch/x86/include/asm/efi.h +++ b/arch/x86/include/asm/efi.h @@ -35,7 +35,7 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...); #define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \ efi_call_virt(f, a1, a2, a3, a4, a5, a6) -#define efi_ioremap(addr, size, type) ioremap_cache(addr, size) +#define efi_ioremap(addr, size, type, attr) ioremap_cache(addr, size) #else /* !CONFIG_X86_32 */ @@ -89,7 +89,7 @@ extern u64 efi_call6(void *fp, u64 arg1, u64 arg2, u64 arg3, (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6)) extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size, - u32 type); + u32 type, u64 attribute); #endif /* CONFIG_X86_32 */ @@ -98,6 +98,8 @@ extern void efi_set_executable(efi_memory_desc_t *md, bool executable); extern int efi_memblock_x86_reserve_range(void); extern void efi_call_phys_prelog(void); extern void efi_call_phys_epilog(void); +extern void efi_unmap_memmap(void); +extern void efi_memory_uc(u64 addr, unsigned long size); #ifndef CONFIG_EFI /* diff --git a/arch/x86/include/asm/xen/interface.h b/arch/x86/include/asm/xen/interface.h index 6d2f75a82a14..54d52ff1304a 100644 --- a/arch/x86/include/asm/xen/interface.h +++ b/arch/x86/include/asm/xen/interface.h @@ -51,14 +51,14 @@ * with Xen so that on ARM we can have one ABI that works for 32 and 64 * bit guests. */ typedef unsigned long xen_pfn_t; +#define PRI_xen_pfn "lx" typedef unsigned long xen_ulong_t; +#define PRI_xen_ulong "lx" /* Guest handles for primitive C types. */ __DEFINE_GUEST_HANDLE(uchar, unsigned char); __DEFINE_GUEST_HANDLE(uint, unsigned int); -__DEFINE_GUEST_HANDLE(ulong, unsigned long); DEFINE_GUEST_HANDLE(char); DEFINE_GUEST_HANDLE(int); -DEFINE_GUEST_HANDLE(long); DEFINE_GUEST_HANDLE(void); DEFINE_GUEST_HANDLE(uint64_t); DEFINE_GUEST_HANDLE(uint32_t); diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index c265593ec2cd..1817fa911024 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -2257,6 +2257,9 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void) continue; cfg = irq_cfg(irq); + if (!cfg) + continue; + raw_spin_lock(&desc->lock); /* diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 9a7c90d80bc4..93c5451bdd52 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c @@ -991,7 +991,7 @@ static struct attribute ** __cpuinit amd_l3_attrs(void) if (attrs) return attrs; - n = sizeof (default_attrs) / sizeof (struct attribute *); + n = ARRAY_SIZE(default_attrs); if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) n += 2; diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 29e87d3b2843..46cbf8689692 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -2209,11 +2209,6 @@ static struct dev_ext_attribute dev_attr_cmci_disabled = { &mce_cmci_disabled }; -static struct dev_ext_attribute dev_attr_bios_cmci_threshold = { - __ATTR(bios_cmci_threshold, 0444, device_show_int, NULL), - &mce_bios_cmci_threshold -}; - static struct device_attribute *mce_device_attrs[] = { &dev_attr_tolerant.attr, &dev_attr_check_interval.attr, @@ -2222,7 +2217,6 @@ static struct device_attribute *mce_device_attrs[] = { &dev_attr_dont_log_ce.attr, &dev_attr_ignore_ce.attr, &dev_attr_cmci_disabled.attr, - &dev_attr_bios_cmci_threshold.attr, NULL }; diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index c4e916d77378..698b6ec12e0f 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c @@ -576,12 +576,10 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) int err = 0; if (shared_bank[bank]) { - nb = node_to_amd_nb(amd_get_nb_id(cpu)); - WARN_ON(!nb); /* threshold descriptor already initialized on this node? */ - if (nb->bank4) { + if (nb && nb->bank4) { /* yes, use it */ b = nb->bank4; err = kobject_add(b->kobj, &dev->kobj, name); @@ -615,8 +613,10 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) atomic_set(&b->cpus, 1); /* nb is already initialized, see above */ - WARN_ON(nb->bank4); - nb->bank4 = b; + if (nb) { + WARN_ON(nb->bank4); + nb->bank4 = b; + } } err = allocate_threshold_blocks(cpu, bank, 0, diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 915b876edd1e..4a3374e61a93 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c @@ -208,12 +208,14 @@ static bool check_hw_exists(void) } /* - * Now write a value and read it back to see if it matches, - * this is needed to detect certain hardware emulators (qemu/kvm) - * that don't trap on the MSR access and always return 0s. + * Read the current value, change it and read it back to see if it + * matches, this is needed to detect certain hardware emulators + * (qemu/kvm) that don't trap on the MSR access and always return 0s. */ - val = 0xabcdUL; reg = x86_pmu_event_addr(0); + if (rdmsrl_safe(reg, &val)) + goto msr_fail; + val ^= 0xffffUL; ret = wrmsrl_safe(reg, val); ret |= rdmsrl_safe(reg, &val_new); if (ret || val != val_new) @@ -338,6 +340,9 @@ int x86_setup_perfctr(struct perf_event *event) /* BTS is currently only allowed for user-mode. */ if (!attr->exclude_kernel) return -EOPNOTSUPP; + + if (!attr->exclude_guest) + return -EOPNOTSUPP; } hwc->config |= config; @@ -380,6 +385,9 @@ int x86_pmu_hw_config(struct perf_event *event) if (event->attr.precise_ip) { int precise = 0; + if (!event->attr.exclude_guest) + return -EOPNOTSUPP; + /* Support for constant skid */ if (x86_pmu.pebs_active && !x86_pmu.pebs_broken) { precise++; diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c index 99d96a4978b5..3cf3d97cce3a 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c @@ -118,22 +118,24 @@ static void snbep_uncore_pci_disable_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; int box_ctl = uncore_pci_box_ctl(box); - u32 config; + u32 config = 0; - pci_read_config_dword(pdev, box_ctl, &config); - config |= SNBEP_PMON_BOX_CTL_FRZ; - pci_write_config_dword(pdev, box_ctl, config); + if (!pci_read_config_dword(pdev, box_ctl, &config)) { + config |= SNBEP_PMON_BOX_CTL_FRZ; + pci_write_config_dword(pdev, box_ctl, config); + } } static void snbep_uncore_pci_enable_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; int box_ctl = uncore_pci_box_ctl(box); - u32 config; + u32 config = 0; - pci_read_config_dword(pdev, box_ctl, &config); - config &= ~SNBEP_PMON_BOX_CTL_FRZ; - pci_write_config_dword(pdev, box_ctl, config); + if (!pci_read_config_dword(pdev, box_ctl, &config)) { + config &= ~SNBEP_PMON_BOX_CTL_FRZ; + pci_write_config_dword(pdev, box_ctl, config); + } } static void snbep_uncore_pci_enable_event(struct intel_uncore_box *box, struct perf_event *event) @@ -156,7 +158,7 @@ static u64 snbep_uncore_pci_read_counter(struct intel_uncore_box *box, struct pe { struct pci_dev *pdev = box->pci_dev; struct hw_perf_event *hwc = &event->hw; - u64 count; + u64 count = 0; pci_read_config_dword(pdev, hwc->event_base, (u32 *)&count); pci_read_config_dword(pdev, hwc->event_base + 4, (u32 *)&count + 1); @@ -603,11 +605,12 @@ static struct pci_driver snbep_uncore_pci_driver = { /* * build pci bus to socket mapping */ -static void snbep_pci2phy_map_init(void) +static int snbep_pci2phy_map_init(void) { struct pci_dev *ubox_dev = NULL; int i, bus, nodeid; - u32 config; + int err = 0; + u32 config = 0; while (1) { /* find the UBOX device */ @@ -618,10 +621,14 @@ static void snbep_pci2phy_map_init(void) break; bus = ubox_dev->bus->number; /* get the Node ID of the local register */ - pci_read_config_dword(ubox_dev, 0x40, &config); + err = pci_read_config_dword(ubox_dev, 0x40, &config); + if (err) + break; nodeid = config; /* get the Node ID mapping */ - pci_read_config_dword(ubox_dev, 0x54, &config); + err = pci_read_config_dword(ubox_dev, 0x54, &config); + if (err) + break; /* * every three bits in the Node ID mapping register maps * to a particular node. @@ -633,7 +640,11 @@ static void snbep_pci2phy_map_init(void) } } }; - return; + + if (ubox_dev) + pci_dev_put(ubox_dev); + + return err ? pcibios_err_to_errno(err) : 0; } /* end of Sandy Bridge-EP uncore support */ @@ -1547,7 +1558,6 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event) { struct hw_perf_event *hwc = &event->hw; struct hw_perf_event_extra *reg1 = &hwc->extra_reg; - int port; /* adjust the main event selector and extra register index */ if (reg1->idx % 2) { @@ -1559,7 +1569,6 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event) } /* adjust extra register config */ - port = reg1->idx / 6 + box->pmu->pmu_idx * 4; switch (reg1->idx % 6) { case 2: /* shift the 8~15 bits to the 0~7 bits */ @@ -2578,9 +2587,11 @@ static int __init uncore_pci_init(void) switch (boot_cpu_data.x86_model) { case 45: /* Sandy Bridge-EP */ + ret = snbep_pci2phy_map_init(); + if (ret) + return ret; pci_uncores = snbep_pci_uncores; uncore_pci_driver = &snbep_uncore_pci_driver; - snbep_pci2phy_map_init(); break; default: return 0; @@ -2926,6 +2937,9 @@ static int __init intel_uncore_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return -ENODEV; + if (cpu_has_hypervisor) + return -ENODEV; + ret = uncore_pci_init(); if (ret) goto fail; diff --git a/arch/x86/kernel/cpu/perf_event_knc.c b/arch/x86/kernel/cpu/perf_event_knc.c index 7c46bfdbc373..4b7731bf23a8 100644 --- a/arch/x86/kernel/cpu/perf_event_knc.c +++ b/arch/x86/kernel/cpu/perf_event_knc.c @@ -3,6 +3,8 @@ #include <linux/perf_event.h> #include <linux/types.h> +#include <asm/hardirq.h> + #include "perf_event.h" static const u64 knc_perfmon_event_map[] = @@ -173,30 +175,100 @@ static void knc_pmu_enable_all(int added) static inline void knc_pmu_disable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val; val = hwc->config; - if (cpuc->enabled) - val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; + val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); } static void knc_pmu_enable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val; val = hwc->config; - if (cpuc->enabled) - val |= ARCH_PERFMON_EVENTSEL_ENABLE; + val |= ARCH_PERFMON_EVENTSEL_ENABLE; (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); } +static inline u64 knc_pmu_get_status(void) +{ + u64 status; + + rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status); + + return status; +} + +static inline void knc_pmu_ack_status(u64 ack) +{ + wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack); +} + +static int knc_pmu_handle_irq(struct pt_regs *regs) +{ + struct perf_sample_data data; + struct cpu_hw_events *cpuc; + int handled = 0; + int bit, loops; + u64 status; + + cpuc = &__get_cpu_var(cpu_hw_events); + + knc_pmu_disable_all(); + + status = knc_pmu_get_status(); + if (!status) { + knc_pmu_enable_all(0); + return handled; + } + + loops = 0; +again: + knc_pmu_ack_status(status); + if (++loops > 100) { + WARN_ONCE(1, "perf: irq loop stuck!\n"); + perf_event_print_debug(); + goto done; + } + + inc_irq_stat(apic_perf_irqs); + + for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) { + struct perf_event *event = cpuc->events[bit]; + + handled++; + + if (!test_bit(bit, cpuc->active_mask)) + continue; + + if (!intel_pmu_save_and_restart(event)) + continue; + + perf_sample_data_init(&data, 0, event->hw.last_period); + + if (perf_event_overflow(event, &data, regs)) + x86_pmu_stop(event, 0); + } + + /* + * Repeat if there is more work to be done: + */ + status = knc_pmu_get_status(); + if (status) + goto again; + +done: + knc_pmu_enable_all(0); + + return handled; +} + + PMU_FORMAT_ATTR(event, "config:0-7" ); PMU_FORMAT_ATTR(umask, "config:8-15" ); PMU_FORMAT_ATTR(edge, "config:18" ); @@ -214,7 +286,7 @@ static struct attribute *intel_knc_formats_attr[] = { static __initconst struct x86_pmu knc_pmu = { .name = "knc", - .handle_irq = x86_pmu_handle_irq, + .handle_irq = knc_pmu_handle_irq, .disable_all = knc_pmu_disable_all, .enable_all = knc_pmu_enable_all, .enable = knc_pmu_enable_event, @@ -226,12 +298,11 @@ static __initconst struct x86_pmu knc_pmu = { .event_map = knc_pmu_event_map, .max_events = ARRAY_SIZE(knc_perfmon_event_map), .apic = 1, - .max_period = (1ULL << 31) - 1, + .max_period = (1ULL << 39) - 1, .version = 0, .num_counters = 2, - /* in theory 40 bits, early silicon is buggy though */ - .cntval_bits = 32, - .cntval_mask = (1ULL << 32) - 1, + .cntval_bits = 40, + .cntval_mask = (1ULL << 40) - 1, .get_event_constraints = x86_get_event_constraints, .event_constraints = knc_event_constraints, .format_attrs = intel_knc_formats_attr, diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c index e4dd0f7a0453..7d0270bd793e 100644 --- a/arch/x86/kernel/cpu/perf_event_p6.c +++ b/arch/x86/kernel/cpu/perf_event_p6.c @@ -8,13 +8,106 @@ */ static const u64 p6_perfmon_event_map[] = { - [PERF_COUNT_HW_CPU_CYCLES] = 0x0079, - [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, - [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0f2e, - [PERF_COUNT_HW_CACHE_MISSES] = 0x012e, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c4, - [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c5, - [PERF_COUNT_HW_BUS_CYCLES] = 0x0062, + [PERF_COUNT_HW_CPU_CYCLES] = 0x0079, /* CPU_CLK_UNHALTED */ + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, /* INST_RETIRED */ + [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0f2e, /* L2_RQSTS:M:E:S:I */ + [PERF_COUNT_HW_CACHE_MISSES] = 0x012e, /* L2_RQSTS:I */ + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c4, /* BR_INST_RETIRED */ + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c5, /* BR_MISS_PRED_RETIRED */ + [PERF_COUNT_HW_BUS_CYCLES] = 0x0062, /* BUS_DRDY_CLOCKS */ + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a2, /* RESOURCE_STALLS */ + +}; + +static __initconst u64 p6_hw_cache_event_ids + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX] = +{ + [ C(L1D) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */ + [ C(RESULT_MISS) ] = 0x0045, /* DCU_LINES_IN */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0x0f29, /* L2_LD:M:E:S:I */ + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(L1I ) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */ + [ C(RESULT_MISS) ] = 0x0f28, /* L2_IFETCH:M:E:S:I */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(LL ) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0x0025, /* L2_M_LINES_INM */ + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(DTLB) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */ + [ C(RESULT_MISS) ] = 0, + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(ITLB) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */ + [ C(RESULT_MISS) ] = 0x0085, /* ITLB_MISS */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + }, + [ C(BPU ) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED */ + [ C(RESULT_MISS) ] = 0x00c5, /* BR_MISS_PRED_RETIRED */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + }, }; static u64 p6_pmu_event_map(int hw_event) @@ -34,7 +127,7 @@ static struct event_constraint p6_event_constraints[] = { INTEL_EVENT_CONSTRAINT(0xc1, 0x1), /* FLOPS */ INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */ - INTEL_EVENT_CONSTRAINT(0x11, 0x1), /* FP_ASSIST */ + INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */ INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */ INTEL_EVENT_CONSTRAINT(0x13, 0x2), /* DIV */ INTEL_EVENT_CONSTRAINT(0x14, 0x1), /* CYCLES_DIV_BUSY */ @@ -64,25 +157,25 @@ static void p6_pmu_enable_all(int added) static inline void p6_pmu_disable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val = P6_NOP_EVENT; - if (cpuc->enabled) - val |= ARCH_PERFMON_EVENTSEL_ENABLE; - (void)wrmsrl_safe(hwc->config_base, val); } static void p6_pmu_enable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val; val = hwc->config; - if (cpuc->enabled) - val |= ARCH_PERFMON_EVENTSEL_ENABLE; + + /* + * p6 only has a global event enable, set on PerfEvtSel0 + * We "disable" events by programming P6_NOP_EVENT + * and we rely on p6_pmu_enable_all() being called + * to actually enable the events. + */ (void)wrmsrl_safe(hwc->config_base, val); } @@ -158,5 +251,9 @@ __init int p6_pmu_init(void) x86_pmu = p6_pmu; + memcpy(hw_cache_event_ids, p6_hw_cache_event_ids, + sizeof(hw_cache_event_ids)); + + return 0; } diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index ed858e9e9a74..df06ade26bef 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c @@ -1077,6 +1077,9 @@ void __init memblock_x86_fill(void) memblock_add(ei->addr, ei->size); } + /* throw away partial pages */ + memblock_trim_memory(PAGE_SIZE); + memblock_dump_all(); } diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index a1193aef6d7d..88b725aa1d52 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -1035,7 +1035,7 @@ ENTRY(xen_sysenter_target) ENTRY(xen_hypervisor_callback) CFI_STARTPROC - pushl_cfi $0 + pushl_cfi $-1 /* orig_ax = -1 => not a system call */ SAVE_ALL TRACE_IRQS_OFF @@ -1077,14 +1077,16 @@ ENTRY(xen_failsafe_callback) 2: mov 8(%esp),%es 3: mov 12(%esp),%fs 4: mov 16(%esp),%gs + /* EAX == 0 => Category 1 (Bad segment) + EAX != 0 => Category 2 (Bad IRET) */ testl %eax,%eax popl_cfi %eax lea 16(%esp),%esp CFI_ADJUST_CFA_OFFSET -16 jz 5f addl $16,%esp - jmp iret_exc # EAX != 0 => Category 2 (Bad IRET) -5: pushl_cfi $0 # EAX == 0 => Category 1 (Bad segment) + jmp iret_exc +5: pushl_cfi $-1 /* orig_ax = -1 => not a system call */ SAVE_ALL jmp ret_from_exception CFI_ENDPROC diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 0c58952d64e8..b51b2c7ee51f 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -1435,7 +1435,7 @@ ENTRY(xen_failsafe_callback) CFI_RESTORE r11 addq $0x30,%rsp CFI_ADJUST_CFA_OFFSET -0x30 - pushq_cfi $0 + pushq_cfi $-1 /* orig_ax = -1 => not a system call */ SAVE_ALL jmp error_exit CFI_ENDPROC diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index b3e5e51bc907..4180a874c764 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -247,7 +247,10 @@ do_async_page_fault(struct pt_regs *regs, unsigned long error_code) break; case KVM_PV_REASON_PAGE_NOT_PRESENT: /* page is swapped out by the host. */ + rcu_irq_enter(); + exit_idle(); kvm_async_pf_task_wait((u32)read_cr2()); + rcu_irq_exit(); break; case KVM_PV_REASON_PAGE_READY: rcu_irq_enter(); diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index 52190a938b4a..4e8ba39eaf0f 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c @@ -358,14 +358,6 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), }, }, - { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ - .callback = set_bios_reboot, - .ident = "CompuLab SBC-FITPC2", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), - DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), - }, - }, { /* Handle problems with rebooting on ASUS P4S800 */ .callback = set_bios_reboot, .ident = "ASUS P4S800", diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index a2bb18e02839..ca45696f30fb 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -920,8 +920,22 @@ void __init setup_arch(char **cmdline_p) #ifdef CONFIG_X86_64 if (max_pfn > max_low_pfn) { - max_pfn_mapped = init_memory_mapping(1UL<<32, - max_pfn<<PAGE_SHIFT); + int i; + unsigned long start, end; + unsigned long start_pfn, end_pfn; + + for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, + NULL) { + + end = PFN_PHYS(end_pfn); + if (end <= (1UL<<32)) + continue; + + start = PFN_PHYS(start_pfn); + max_pfn_mapped = init_memory_mapping( + max((1UL<<32), start), end); + } + /* can we preseve max_low_pfn ?*/ max_low_pfn = max_pfn; } @@ -1035,6 +1049,18 @@ void __init setup_arch(char **cmdline_p) arch_init_ideal_nops(); register_refined_jiffies(CLOCK_TICK_RATE); + +#ifdef CONFIG_EFI + /* Once setup is done above, disable efi_enabled on mismatched + * firmware/kernel archtectures since there is no support for + * runtime services. + */ + if (efi_enabled && IS_ENABLED(CONFIG_X86_64) != efi_64bit) { + pr_info("efi: Setup done, disabling due to 32/64-bit mismatch\n"); + efi_unmap_memmap(); + efi_enabled = 0; + } +#endif } #ifdef CONFIG_X86_32 diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c index 29ad351804e9..70b27ee6118e 100644 --- a/arch/x86/kernel/signal.c +++ b/arch/x86/kernel/signal.c @@ -824,10 +824,8 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags) mce_notify_process(); #endif /* CONFIG_X86_64 && CONFIG_X86_MCE */ - if (thread_info_flags & _TIF_UPROBE) { - clear_thread_flag(TIF_UPROBE); + if (thread_info_flags & _TIF_UPROBE) uprobe_notify_resume(regs); - } /* deal with pending signal delivery */ if (thread_info_flags & _TIF_SIGPENDING) diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c index 9538f00827a9..aafa5557b396 100644 --- a/arch/x86/kernel/uprobes.c +++ b/arch/x86/kernel/uprobes.c @@ -651,31 +651,19 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) /* * Skip these instructions as per the currently known x86 ISA. - * 0x66* { 0x90 | 0x0f 0x1f | 0x0f 0x19 | 0x87 0xc0 } + * rep=0x66*; nop=0x90 */ static bool __skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs) { int i; for (i = 0; i < MAX_UINSN_BYTES; i++) { - if ((auprobe->insn[i] == 0x66)) + if (auprobe->insn[i] == 0x66) continue; if (auprobe->insn[i] == 0x90) return true; - if (i == (MAX_UINSN_BYTES - 1)) - break; - - if ((auprobe->insn[i] == 0x0f) && (auprobe->insn[i+1] == 0x1f)) - return true; - - if ((auprobe->insn[i] == 0x0f) && (auprobe->insn[i+1] == 0x19)) - return true; - - if ((auprobe->insn[i] == 0x87) && (auprobe->insn[i+1] == 0xc0)) - return true; - break; } return false; diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index c6e6b721b6ee..43e9fadca5d0 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1311,7 +1311,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value) vcpu->arch.apic_base = value; if (apic_x2apic_mode(apic)) { u32 id = kvm_apic_id(apic); - u32 ldr = ((id & ~0xf) << 16) | (1 << (id & 0xf)); + u32 ldr = ((id >> 4) << 16) | (1 << (id & 0xf)); kvm_apic_set_ldr(apic, ldr); } apic->base_address = apic->vcpu->arch.apic_base & diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index d289fee1ffb8..6f85fe0bf958 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -2497,8 +2497,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, } } - if (!is_error_pfn(pfn)) - kvm_release_pfn_clean(pfn); + kvm_release_pfn_clean(pfn); } static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index ab1f6a93b527..d7aea41563b3 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -35,40 +35,44 @@ struct map_range { unsigned page_size_mask; }; -static void __init find_early_table_space(struct map_range *mr, unsigned long end, - int use_pse, int use_gbpages) +/* + * First calculate space needed for kernel direct mapping page tables to cover + * mr[0].start to mr[nr_range - 1].end, while accounting for possible 2M and 1GB + * pages. Then find enough contiguous space for those page tables. + */ +static void __init find_early_table_space(struct map_range *mr, int nr_range) { - unsigned long puds, pmds, ptes, tables, start = 0, good_end = end; + int i; + unsigned long puds = 0, pmds = 0, ptes = 0, tables; + unsigned long start = 0, good_end; phys_addr_t base; - puds = (end + PUD_SIZE - 1) >> PUD_SHIFT; - tables = roundup(puds * sizeof(pud_t), PAGE_SIZE); - - if (use_gbpages) { - unsigned long extra; - - extra = end - ((end>>PUD_SHIFT) << PUD_SHIFT); - pmds = (extra + PMD_SIZE - 1) >> PMD_SHIFT; - } else - pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT; + for (i = 0; i < nr_range; i++) { + unsigned long range, extra; - tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE); + range = mr[i].end - mr[i].start; + puds += (range + PUD_SIZE - 1) >> PUD_SHIFT; - if (use_pse) { - unsigned long extra; + if (mr[i].page_size_mask & (1 << PG_LEVEL_1G)) { + extra = range - ((range >> PUD_SHIFT) << PUD_SHIFT); + pmds += (extra + PMD_SIZE - 1) >> PMD_SHIFT; + } else { + pmds += (range + PMD_SIZE - 1) >> PMD_SHIFT; + } - extra = end - ((end>>PMD_SHIFT) << PMD_SHIFT); + if (mr[i].page_size_mask & (1 << PG_LEVEL_2M)) { + extra = range - ((range >> PMD_SHIFT) << PMD_SHIFT); #ifdef CONFIG_X86_32 - extra += PMD_SIZE; + extra += PMD_SIZE; #endif - /* The first 2/4M doesn't use large pages. */ - if (mr->start < PMD_SIZE) - extra += mr->end - mr->start; - - ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT; - } else - ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; + ptes += (extra + PAGE_SIZE - 1) >> PAGE_SHIFT; + } else { + ptes += (range + PAGE_SIZE - 1) >> PAGE_SHIFT; + } + } + tables = roundup(puds * sizeof(pud_t), PAGE_SIZE); + tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE); tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE); #ifdef CONFIG_X86_32 @@ -86,7 +90,7 @@ static void __init find_early_table_space(struct map_range *mr, unsigned long en pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT); printk(KERN_DEBUG "kernel direct mapping tables up to %#lx @ [mem %#010lx-%#010lx]\n", - end - 1, pgt_buf_start << PAGE_SHIFT, + mr[nr_range - 1].end - 1, pgt_buf_start << PAGE_SHIFT, (pgt_buf_top << PAGE_SHIFT) - 1); } @@ -267,7 +271,7 @@ unsigned long __init_refok init_memory_mapping(unsigned long start, * nodes are discovered. */ if (!after_bootmem) - find_early_table_space(&mr[0], end, use_pse, use_gbpages); + find_early_table_space(mr, nr_range); for (i = 0; i < nr_range; i++) ret = kernel_physical_mapping_init(mr[i].start, mr[i].end, diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index 2b6b4a3c8beb..3baff255adac 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -386,7 +386,8 @@ phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end, * these mappings are more intelligent. */ if (pte_val(*pte)) { - pages++; + if (!after_bootmem) + pages++; continue; } @@ -451,6 +452,8 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end, * attributes. */ if (page_size_mask & (1 << PG_LEVEL_2M)) { + if (!after_bootmem) + pages++; last_map_addr = next; continue; } @@ -526,6 +529,8 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end, * attributes. */ if (page_size_mask & (1 << PG_LEVEL_1G)) { + if (!after_bootmem) + pages++; last_map_addr = next; continue; } diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c index 26b8a8514ee5..48768df2471a 100644 --- a/arch/x86/oprofile/nmi_int.c +++ b/arch/x86/oprofile/nmi_int.c @@ -55,7 +55,7 @@ u64 op_x86_get_ctrl(struct op_x86_model_spec const *model, val |= counter_config->extra; event &= model->event_mask ? model->event_mask : 0xFF; val |= event & 0xFF; - val |= (event & 0x0F00) << 24; + val |= (u64)(event & 0x0F00) << 24; return val; } diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c index aded2a91162a..ad4439145f85 100644 --- a/arch/x86/platform/efi/efi.c +++ b/arch/x86/platform/efi/efi.c @@ -70,11 +70,15 @@ EXPORT_SYMBOL(efi); struct efi_memory_map memmap; bool efi_64bit; -static bool efi_native; static struct efi efi_phys __initdata; static efi_system_table_t efi_systab __initdata; +static inline bool efi_is_native(void) +{ + return IS_ENABLED(CONFIG_X86_64) == efi_64bit; +} + static int __init setup_noefi(char *arg) { efi_enabled = 0; @@ -420,7 +424,7 @@ void __init efi_reserve_boot_services(void) } } -static void __init efi_unmap_memmap(void) +void __init efi_unmap_memmap(void) { if (memmap.map) { early_iounmap(memmap.map, memmap.nr_map * memmap.desc_size); @@ -432,7 +436,7 @@ void __init efi_free_boot_services(void) { void *p; - if (!efi_native) + if (!efi_is_native()) return; for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { @@ -684,12 +688,10 @@ void __init efi_init(void) return; } efi_phys.systab = (efi_system_table_t *)boot_params.efi_info.efi_systab; - efi_native = !efi_64bit; #else efi_phys.systab = (efi_system_table_t *) (boot_params.efi_info.efi_systab | ((__u64)boot_params.efi_info.efi_systab_hi<<32)); - efi_native = efi_64bit; #endif if (efi_systab_init(efi_phys.systab)) { @@ -723,7 +725,7 @@ void __init efi_init(void) * that doesn't match the kernel 32/64-bit mode. */ - if (!efi_native) + if (!efi_is_native()) pr_info("No EFI runtime due to 32/64-bit mismatch with kernel\n"); else if (efi_runtime_init()) { efi_enabled = 0; @@ -735,7 +737,7 @@ void __init efi_init(void) return; } #ifdef CONFIG_X86_32 - if (efi_native) { + if (efi_is_native()) { x86_platform.get_wallclock = efi_get_time; x86_platform.set_wallclock = efi_set_rtc_mmss; } @@ -810,6 +812,16 @@ void __iomem *efi_lookup_mapped_addr(u64 phys_addr) return NULL; } +void efi_memory_uc(u64 addr, unsigned long size) +{ + unsigned long page_shift = 1UL << EFI_PAGE_SHIFT; + u64 npages; + + npages = round_up(size, page_shift) / page_shift; + memrange_efi_to_native(&addr, &npages); + set_memory_uc(addr, npages); +} + /* * This function will switch the EFI runtime services to virtual mode. * Essentially, look through the EFI memmap and map every region that @@ -823,7 +835,7 @@ void __init efi_enter_virtual_mode(void) efi_memory_desc_t *md, *prev_md = NULL; efi_status_t status; unsigned long size; - u64 end, systab, addr, npages, end_pfn; + u64 end, systab, end_pfn; void *p, *va, *new_memmap = NULL; int count = 0; @@ -834,7 +846,7 @@ void __init efi_enter_virtual_mode(void) * non-native EFI */ - if (!efi_native) { + if (!efi_is_native()) { efi_unmap_memmap(); return; } @@ -879,10 +891,14 @@ void __init efi_enter_virtual_mode(void) end_pfn = PFN_UP(end); if (end_pfn <= max_low_pfn_mapped || (end_pfn > (1UL << (32 - PAGE_SHIFT)) - && end_pfn <= max_pfn_mapped)) + && end_pfn <= max_pfn_mapped)) { va = __va(md->phys_addr); - else - va = efi_ioremap(md->phys_addr, size, md->type); + + if (!(md->attribute & EFI_MEMORY_WB)) + efi_memory_uc((u64)(unsigned long)va, size); + } else + va = efi_ioremap(md->phys_addr, size, + md->type, md->attribute); md->virt_addr = (u64) (unsigned long) va; @@ -892,13 +908,6 @@ void __init efi_enter_virtual_mode(void) continue; } - if (!(md->attribute & EFI_MEMORY_WB)) { - addr = md->virt_addr; - npages = md->num_pages; - memrange_efi_to_native(&addr, &npages); - set_memory_uc(addr, npages); - } - systab = (u64) (unsigned long) efi_phys.systab; if (md->phys_addr <= systab && systab < end) { systab += md->virt_addr - md->phys_addr; diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c index ac3aa54e2654..95fd505dfeb6 100644 --- a/arch/x86/platform/efi/efi_64.c +++ b/arch/x86/platform/efi/efi_64.c @@ -82,7 +82,7 @@ void __init efi_call_phys_epilog(void) } void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size, - u32 type) + u32 type, u64 attribute) { unsigned long last_map_pfn; @@ -92,8 +92,11 @@ void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size, last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size); if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size) { unsigned long top = last_map_pfn << PAGE_SHIFT; - efi_ioremap(top, size - (top - phys_addr), type); + efi_ioremap(top, size - (top - phys_addr), type, attribute); } + if (!(attribute & EFI_MEMORY_WB)) + efi_memory_uc((u64)(unsigned long)__va(phys_addr), size); + return (void __iomem *)__va(phys_addr); } diff --git a/arch/x86/realmode/rm/wakeup_asm.S b/arch/x86/realmode/rm/wakeup_asm.S index e56479e58053..9e7e14797a72 100644 --- a/arch/x86/realmode/rm/wakeup_asm.S +++ b/arch/x86/realmode/rm/wakeup_asm.S @@ -74,18 +74,9 @@ ENTRY(wakeup_start) lidtl wakeup_idt - /* Clear the EFLAGS but remember if we have EFLAGS.ID */ - movl $X86_EFLAGS_ID, %ecx - pushl %ecx - popfl - pushfl - popl %edi + /* Clear the EFLAGS */ pushl $0 popfl - pushfl - popl %edx - xorl %edx, %edi - andl %ecx, %edi /* %edi is zero iff CPUID & %cr4 are missing */ /* Check header signature... */ movl signature, %eax @@ -120,12 +111,12 @@ ENTRY(wakeup_start) movl %eax, %cr3 btl $WAKEUP_BEHAVIOR_RESTORE_CR4, %edi - jz 1f + jnc 1f movl pmode_cr4, %eax movl %eax, %cr4 1: btl $WAKEUP_BEHAVIOR_RESTORE_EFER, %edi - jz 1f + jnc 1f movl pmode_efer, %eax movl pmode_efer + 4, %edx movl $MSR_EFER, %ecx diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index e3497f240eab..586d83812b67 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c @@ -81,8 +81,6 @@ #include "smp.h" #include "multicalls.h" -#include <xen/events.h> - EXPORT_SYMBOL_GPL(hypercall_page); DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); diff --git a/arch/xtensa/boot/boot-redboot/bootstrap.S b/arch/xtensa/boot/boot-redboot/bootstrap.S index 4c316cd28a54..86c34dbc9cd0 100644 --- a/arch/xtensa/boot/boot-redboot/bootstrap.S +++ b/arch/xtensa/boot/boot-redboot/bootstrap.S @@ -51,17 +51,17 @@ _start: /* 'reset' window registers */ movi a4, 1 - wsr a4, PS + wsr a4, ps rsync - rsr a5, WINDOWBASE + rsr a5, windowbase ssl a5 sll a4, a4 - wsr a4, WINDOWSTART + wsr a4, windowstart rsync movi a4, 0x00040000 - wsr a4, PS + wsr a4, ps rsync /* copy the loader to its address diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild index fccd81eddff1..6d1302789995 100644 --- a/arch/xtensa/include/asm/Kbuild +++ b/arch/xtensa/include/asm/Kbuild @@ -1,4 +1,28 @@ -include include/asm-generic/Kbuild.asm - +generic-y += bitsperlong.h +generic-y += bug.h generic-y += clkdev.h +generic-y += cputime.h +generic-y += device.h +generic-y += div64.h +generic-y += emergency-restart.h +generic-y += errno.h generic-y += exec.h +generic-y += fcntl.h +generic-y += futex.h +generic-y += hardirq.h +generic-y += ioctl.h +generic-y += irq_regs.h +generic-y += kdebug.h +generic-y += kmap_types.h +generic-y += kvm_para.h +generic-y += local.h +generic-y += local64.h +generic-y += percpu.h +generic-y += resource.h +generic-y += scatterlist.h +generic-y += sections.h +generic-y += siginfo.h +generic-y += statfs.h +generic-y += termios.h +generic-y += topology.h +generic-y += xor.h diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h index b40989308775..24f50cada70c 100644 --- a/arch/xtensa/include/asm/atomic.h +++ b/arch/xtensa/include/asm/atomic.h @@ -73,7 +73,7 @@ static inline void atomic_add(int i, atomic_t * v) "l32i %0, %2, 0 \n\t" "add %0, %0, %1 \n\t" "s32i %0, %2, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n" : "=&a" (vval) : "a" (i), "a" (v) @@ -97,7 +97,7 @@ static inline void atomic_sub(int i, atomic_t *v) "l32i %0, %2, 0 \n\t" "sub %0, %0, %1 \n\t" "s32i %0, %2, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n" : "=&a" (vval) : "a" (i), "a" (v) @@ -118,7 +118,7 @@ static inline int atomic_add_return(int i, atomic_t * v) "l32i %0, %2, 0 \n\t" "add %0, %0, %1 \n\t" "s32i %0, %2, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n" : "=&a" (vval) : "a" (i), "a" (v) @@ -137,7 +137,7 @@ static inline int atomic_sub_return(int i, atomic_t * v) "l32i %0, %2, 0 \n\t" "sub %0, %0, %1 \n\t" "s32i %0, %2, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n" : "=&a" (vval) : "a" (i), "a" (v) @@ -260,7 +260,7 @@ static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) "xor %1, %4, %3 \n\t" "and %0, %0, %4 \n\t" "s32i %0, %2, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n" : "=&a" (vval), "=a" (mask) : "a" (v), "a" (all_f), "1" (mask) @@ -277,7 +277,7 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v) "l32i %0, %2, 0 \n\t" "or %0, %0, %1 \n\t" "s32i %0, %2, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n" : "=&a" (vval) : "a" (mask), "a" (v) diff --git a/arch/xtensa/include/asm/bitsperlong.h b/arch/xtensa/include/asm/bitsperlong.h deleted file mode 100644 index 6dc0bb0c13b2..000000000000 --- a/arch/xtensa/include/asm/bitsperlong.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/bitsperlong.h> diff --git a/arch/xtensa/include/asm/bug.h b/arch/xtensa/include/asm/bug.h deleted file mode 100644 index 3e52d72712f1..000000000000 --- a/arch/xtensa/include/asm/bug.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * include/asm-xtensa/bug.h - * - * Macros to cause a 'bug' message. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_BUG_H -#define _XTENSA_BUG_H - -#include <asm-generic/bug.h> - -#endif /* _XTENSA_BUG_H */ diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h index 376cd9d5f455..569fec4f9a20 100644 --- a/arch/xtensa/include/asm/cacheflush.h +++ b/arch/xtensa/include/asm/cacheflush.h @@ -165,7 +165,7 @@ extern void copy_from_user_page(struct vm_area_struct*, struct page*, static inline u32 xtensa_get_cacheattr(void) { u32 r; - asm volatile(" rsr %0, CACHEATTR" : "=a"(r)); + asm volatile(" rsr %0, cacheattr" : "=a"(r)); return r; } diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cmpxchg.h index e32149063d83..64dad04a9d27 100644 --- a/arch/xtensa/include/asm/cmpxchg.h +++ b/arch/xtensa/include/asm/cmpxchg.h @@ -27,7 +27,7 @@ __cmpxchg_u32(volatile int *p, int old, int new) "bne %0, %2, 1f \n\t" "s32i %3, %1, 0 \n\t" "1: \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n\t" : "=&a" (old) : "a" (p), "a" (old), "r" (new) @@ -97,7 +97,7 @@ static inline unsigned long xchg_u32(volatile int * m, unsigned long val) __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" "l32i %0, %1, 0 \n\t" "s32i %2, %1, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n\t" : "=&a" (tmp) : "a" (m), "a" (val) diff --git a/arch/xtensa/include/asm/coprocessor.h b/arch/xtensa/include/asm/coprocessor.h index 75c94a1658b0..677501b32dfc 100644 --- a/arch/xtensa/include/asm/coprocessor.h +++ b/arch/xtensa/include/asm/coprocessor.h @@ -94,11 +94,10 @@ #if XCHAL_HAVE_CP #define RSR_CPENABLE(x) do { \ - __asm__ __volatile__("rsr %0," __stringify(CPENABLE) : "=a" (x)); \ + __asm__ __volatile__("rsr %0, cpenable" : "=a" (x)); \ } while(0); #define WSR_CPENABLE(x) do { \ - __asm__ __volatile__("wsr %0," __stringify(CPENABLE) "; rsync" \ - :: "a" (x)); \ + __asm__ __volatile__("wsr %0, cpenable; rsync" :: "a" (x)); \ } while(0); #endif /* XCHAL_HAVE_CP */ diff --git a/arch/xtensa/include/asm/cputime.h b/arch/xtensa/include/asm/cputime.h deleted file mode 100644 index a7fb864a50ae..000000000000 --- a/arch/xtensa/include/asm/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _XTENSA_CPUTIME_H -#define _XTENSA_CPUTIME_H - -#include <asm-generic/cputime.h> - -#endif /* _XTENSA_CPUTIME_H */ diff --git a/arch/xtensa/include/asm/delay.h b/arch/xtensa/include/asm/delay.h index e1d8c9e010c1..58c0a4fd4003 100644 --- a/arch/xtensa/include/asm/delay.h +++ b/arch/xtensa/include/asm/delay.h @@ -27,7 +27,7 @@ static inline void __delay(unsigned long loops) static __inline__ u32 xtensa_get_ccount(void) { u32 ccount; - asm volatile ("rsr %0, 234; # CCOUNT\n" : "=r" (ccount)); + asm volatile ("rsr %0, ccount\n" : "=r" (ccount)); return ccount; } diff --git a/arch/xtensa/include/asm/device.h b/arch/xtensa/include/asm/device.h deleted file mode 100644 index d8f9872b0e2d..000000000000 --- a/arch/xtensa/include/asm/device.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#include <asm-generic/device.h> - diff --git a/arch/xtensa/include/asm/div64.h b/arch/xtensa/include/asm/div64.h deleted file mode 100644 index f35678cb0a9b..000000000000 --- a/arch/xtensa/include/asm/div64.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/div64.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2007 Tensilica Inc. - */ - -#ifndef _XTENSA_DIV64_H -#define _XTENSA_DIV64_H - -#include <asm-generic/div64.h> - -#endif /* _XTENSA_DIV64_H */ diff --git a/arch/xtensa/include/asm/emergency-restart.h b/arch/xtensa/include/asm/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/arch/xtensa/include/asm/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include <asm-generic/emergency-restart.h> - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/arch/xtensa/include/asm/errno.h b/arch/xtensa/include/asm/errno.h deleted file mode 100644 index a0f3b96b79b4..000000000000 --- a/arch/xtensa/include/asm/errno.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/errno.h - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file "COPYING" in the main directory of - * this archive for more details. - * - * Copyright (C) 2002 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_ERRNO_H -#define _XTENSA_ERRNO_H - -#include <asm-generic/errno.h> - -#endif /* _XTENSA_ERRNO_H */ diff --git a/arch/xtensa/include/asm/fcntl.h b/arch/xtensa/include/asm/fcntl.h deleted file mode 100644 index 46ab12db5739..000000000000 --- a/arch/xtensa/include/asm/fcntl.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/fcntl.h> diff --git a/arch/xtensa/include/asm/futex.h b/arch/xtensa/include/asm/futex.h deleted file mode 100644 index 0b745828f42b..000000000000 --- a/arch/xtensa/include/asm/futex.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/futex.h> diff --git a/arch/xtensa/include/asm/hardirq.h b/arch/xtensa/include/asm/hardirq.h deleted file mode 100644 index 91695a135498..000000000000 --- a/arch/xtensa/include/asm/hardirq.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/hardirq.h - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file "COPYING" in the main directory of - * this archive for more details. - * - * Copyright (C) 2002 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_HARDIRQ_H -#define _XTENSA_HARDIRQ_H - -#include <asm-generic/hardirq.h> - -#endif /* _XTENSA_HARDIRQ_H */ diff --git a/arch/xtensa/include/asm/ioctl.h b/arch/xtensa/include/asm/ioctl.h deleted file mode 100644 index b279fe06dfe5..000000000000 --- a/arch/xtensa/include/asm/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/ioctl.h> diff --git a/arch/xtensa/include/asm/irq_regs.h b/arch/xtensa/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/arch/xtensa/include/asm/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/irq_regs.h> diff --git a/arch/xtensa/include/asm/irqflags.h b/arch/xtensa/include/asm/irqflags.h index dae9a8bdcb17..f865b1c1eae4 100644 --- a/arch/xtensa/include/asm/irqflags.h +++ b/arch/xtensa/include/asm/irqflags.h @@ -16,7 +16,7 @@ static inline unsigned long arch_local_save_flags(void) { unsigned long flags; - asm volatile("rsr %0,"__stringify(PS) : "=a" (flags)); + asm volatile("rsr %0, ps" : "=a" (flags)); return flags; } @@ -41,7 +41,7 @@ static inline void arch_local_irq_enable(void) static inline void arch_local_irq_restore(unsigned long flags) { - asm volatile("wsr %0, "__stringify(PS)" ; rsync" + asm volatile("wsr %0, ps; rsync" :: "a" (flags) : "memory"); } diff --git a/arch/xtensa/include/asm/kdebug.h b/arch/xtensa/include/asm/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/arch/xtensa/include/asm/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/kdebug.h> diff --git a/arch/xtensa/include/asm/kmap_types.h b/arch/xtensa/include/asm/kmap_types.h deleted file mode 100644 index 11c687e527f1..000000000000 --- a/arch/xtensa/include/asm/kmap_types.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _XTENSA_KMAP_TYPES_H -#define _XTENSA_KMAP_TYPES_H - -#include <asm-generic/kmap_types.h> - -#endif /* _XTENSA_KMAP_TYPES_H */ diff --git a/arch/xtensa/include/asm/kvm_para.h b/arch/xtensa/include/asm/kvm_para.h deleted file mode 100644 index 14fab8f0b957..000000000000 --- a/arch/xtensa/include/asm/kvm_para.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/kvm_para.h> diff --git a/arch/xtensa/include/asm/local.h b/arch/xtensa/include/asm/local.h deleted file mode 100644 index 48723e550d14..000000000000 --- a/arch/xtensa/include/asm/local.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/local.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_LOCAL_H -#define _XTENSA_LOCAL_H - -#include <asm-generic/local.h> - -#endif /* _XTENSA_LOCAL_H */ diff --git a/arch/xtensa/include/asm/local64.h b/arch/xtensa/include/asm/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/arch/xtensa/include/asm/local64.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/local64.h> diff --git a/arch/xtensa/include/asm/mmu_context.h b/arch/xtensa/include/asm/mmu_context.h index dbd8731a876a..feb10af96519 100644 --- a/arch/xtensa/include/asm/mmu_context.h +++ b/arch/xtensa/include/asm/mmu_context.h @@ -51,14 +51,14 @@ extern unsigned long asid_cache; static inline void set_rasid_register (unsigned long val) { - __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t" + __asm__ __volatile__ (" wsr %0, rasid\n\t" " isync\n" : : "a" (val)); } static inline unsigned long get_rasid_register (void) { unsigned long tmp; - __asm__ __volatile__ (" rsr %0,"__stringify(RASID)"\n\t" : "=a" (tmp)); + __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp)); return tmp; } diff --git a/arch/xtensa/include/asm/param.h b/arch/xtensa/include/asm/param.h index ba03d5aeab6b..0a70e780ef2a 100644 --- a/arch/xtensa/include/asm/param.h +++ b/arch/xtensa/include/asm/param.h @@ -7,28 +7,12 @@ * * Copyright (C) 2001 - 2005 Tensilica Inc. */ - #ifndef _XTENSA_PARAM_H #define _XTENSA_PARAM_H -#ifdef __KERNEL__ +#include <uapi/asm/param.h> + # define HZ CONFIG_HZ /* internal timer frequency */ # define USER_HZ 100 /* for user interfaces in "ticks" */ # define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */ -#else -# define HZ 100 -#endif - -#define EXEC_PAGESIZE 4096 - -#ifndef NGROUPS -#define NGROUPS 32 -#endif - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - #endif /* _XTENSA_PARAM_H */ diff --git a/arch/xtensa/include/asm/percpu.h b/arch/xtensa/include/asm/percpu.h deleted file mode 100644 index 6d2bc2ada9d1..000000000000 --- a/arch/xtensa/include/asm/percpu.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * linux/include/asm-xtensa/percpu.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_PERCPU__ -#define _XTENSA_PERCPU__ - -#include <asm-generic/percpu.h> - -#endif /* _XTENSA_PERCPU__ */ diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h index d85d38da8eec..da21c17f23aa 100644 --- a/arch/xtensa/include/asm/ptrace.h +++ b/arch/xtensa/include/asm/ptrace.h @@ -7,73 +7,11 @@ * * Copyright (C) 2001 - 2005 Tensilica Inc. */ - #ifndef _XTENSA_PTRACE_H #define _XTENSA_PTRACE_H -/* - * Kernel stack - * - * +-----------------------+ -------- STACK_SIZE - * | register file | | - * +-----------------------+ | - * | struct pt_regs | | - * +-----------------------+ | ------ PT_REGS_OFFSET - * double : 16 bytes spill area : | ^ - * excetion :- - - - - - - - - - - -: | | - * frame : struct pt_regs : | | - * :- - - - - - - - - - - -: | | - * | | | | - * | memory stack | | | - * | | | | - * ~ ~ ~ ~ - * ~ ~ ~ ~ - * | | | | - * | | | | - * +-----------------------+ | | --- STACK_BIAS - * | struct task_struct | | | ^ - * current --> +-----------------------+ | | | - * | struct thread_info | | | | - * +-----------------------+ -------- - */ - -#define KERNEL_STACK_SIZE (2 * PAGE_SIZE) - -/* Offsets for exception_handlers[] (3 x 64-entries x 4-byte tables). */ - -#define EXC_TABLE_KSTK 0x004 /* Kernel Stack */ -#define EXC_TABLE_DOUBLE_SAVE 0x008 /* Double exception save area for a0 */ -#define EXC_TABLE_FIXUP 0x00c /* Fixup handler */ -#define EXC_TABLE_PARAM 0x010 /* For passing a parameter to fixup */ -#define EXC_TABLE_SYSCALL_SAVE 0x014 /* For fast syscall handler */ -#define EXC_TABLE_FAST_USER 0x100 /* Fast user exception handler */ -#define EXC_TABLE_FAST_KERNEL 0x200 /* Fast kernel exception handler */ -#define EXC_TABLE_DEFAULT 0x300 /* Default C-Handler */ -#define EXC_TABLE_SIZE 0x400 +#include <uapi/asm/ptrace.h> -/* Registers used by strace */ - -#define REG_A_BASE 0x0000 -#define REG_AR_BASE 0x0100 -#define REG_PC 0x0020 -#define REG_PS 0x02e6 -#define REG_WB 0x0248 -#define REG_WS 0x0249 -#define REG_LBEG 0x0200 -#define REG_LEND 0x0201 -#define REG_LCOUNT 0x0202 -#define REG_SAR 0x0203 - -#define SYSCALL_NR 0x00ff - -/* Other PTRACE_ values defined in <linux/ptrace.h> using values 0-9,16,17,24 */ - -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETXTREGS 18 -#define PTRACE_SETXTREGS 19 - -#ifdef __KERNEL__ #ifndef __ASSEMBLY__ @@ -132,6 +70,4 @@ struct pt_regs { #endif /* !__ASSEMBLY__ */ -#endif /* __KERNEL__ */ - #endif /* _XTENSA_PTRACE_H */ diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h index a3075b12aff1..8a8aa61ccc8d 100644 --- a/arch/xtensa/include/asm/regs.h +++ b/arch/xtensa/include/asm/regs.h @@ -27,52 +27,15 @@ /* Special registers. */ -#define LBEG 0 -#define LEND 1 -#define LCOUNT 2 -#define SAR 3 -#define BR 4 -#define SCOMPARE1 12 -#define ACCHI 16 -#define ACCLO 17 -#define MR 32 -#define WINDOWBASE 72 -#define WINDOWSTART 73 -#define PTEVADDR 83 -#define RASID 90 -#define ITLBCFG 91 -#define DTLBCFG 92 -#define IBREAKENABLE 96 -#define DDR 104 -#define IBREAKA 128 -#define DBREAKA 144 -#define DBREAKC 160 -#define EPC 176 -#define EPC_1 177 -#define DEPC 192 -#define EPS 192 -#define EPS_1 193 -#define EXCSAVE 208 -#define EXCSAVE_1 209 -#define INTERRUPT 226 -#define INTENABLE 228 -#define PS 230 -#define THREADPTR 231 -#define EXCCAUSE 232 -#define DEBUGCAUSE 233 -#define CCOUNT 234 -#define PRID 235 -#define ICOUNT 236 -#define ICOUNTLEVEL 237 -#define EXCVADDR 238 -#define CCOMPARE 240 -#define MISC_SR 244 - -/* Special names for read-only and write-only interrupt registers. */ - -#define INTREAD 226 -#define INTSET 226 -#define INTCLEAR 227 +#define SREG_MR 32 +#define SREG_IBREAKA 128 +#define SREG_DBREAKA 144 +#define SREG_DBREAKC 160 +#define SREG_EPC 176 +#define SREG_EPS 192 +#define SREG_EXCSAVE 208 +#define SREG_CCOMPARE 240 +#define SREG_MISC 244 /* EXCCAUSE register fields */ diff --git a/arch/xtensa/include/asm/resource.h b/arch/xtensa/include/asm/resource.h deleted file mode 100644 index 17b5ab311771..000000000000 --- a/arch/xtensa/include/asm/resource.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/resource.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_RESOURCE_H -#define _XTENSA_RESOURCE_H - -#include <asm-generic/resource.h> - -#endif /* _XTENSA_RESOURCE_H */ diff --git a/arch/xtensa/include/asm/scatterlist.h b/arch/xtensa/include/asm/scatterlist.h deleted file mode 100644 index a0421a61d9e1..000000000000 --- a/arch/xtensa/include/asm/scatterlist.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/scatterlist.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_SCATTERLIST_H -#define _XTENSA_SCATTERLIST_H - -#include <asm-generic/scatterlist.h> - -#endif /* _XTENSA_SCATTERLIST_H */ diff --git a/arch/xtensa/include/asm/sections.h b/arch/xtensa/include/asm/sections.h deleted file mode 100644 index 40b5191b55a2..000000000000 --- a/arch/xtensa/include/asm/sections.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/sections.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_SECTIONS_H -#define _XTENSA_SECTIONS_H - -#include <asm-generic/sections.h> - -#endif /* _XTENSA_SECTIONS_H */ diff --git a/arch/xtensa/include/asm/siginfo.h b/arch/xtensa/include/asm/siginfo.h deleted file mode 100644 index 6916248295df..000000000000 --- a/arch/xtensa/include/asm/siginfo.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/siginfo.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_SIGINFO_H -#define _XTENSA_SIGINFO_H - -#include <asm-generic/siginfo.h> - -#endif /* _XTENSA_SIGINFO_H */ diff --git a/arch/xtensa/include/asm/signal.h b/arch/xtensa/include/asm/signal.h index 7f201b9d4195..72fd44c85b70 100644 --- a/arch/xtensa/include/asm/signal.h +++ b/arch/xtensa/include/asm/signal.h @@ -9,117 +9,12 @@ * * Copyright (C) 2001 - 2005 Tensilica Inc. */ - #ifndef _XTENSA_SIGNAL_H #define _XTENSA_SIGNAL_H - -#define _NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -#ifndef __ASSEMBLY__ - -#include <linux/types.h> - -/* Avoid too many header ordering problems. */ -struct siginfo; -typedef unsigned long old_sigset_t; /* at least 32 bits */ -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#endif - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* #define SIGLOST 29 */ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX (_NSIG-1) - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 /* not supported yet */ -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -#define SA_RESTORER 0x04000000 - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 +#include <uapi/asm/signal.h> #ifndef __ASSEMBLY__ - -#define SIG_BLOCK 0 /* for blocking signals */ -#define SIG_UNBLOCK 1 /* for unblocking signals */ -#define SIG_SETMASK 2 /* for setting the signal mask */ - -/* Type of a signal handler. */ -typedef void (*__sighandler_t)(int); - -#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ -#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ -#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ - -#ifdef __KERNEL__ struct sigaction { __sighandler_t sa_handler; unsigned long sa_flags; @@ -131,35 +26,8 @@ struct k_sigaction { struct sigaction sa; }; -#else - -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ #include <asm/sigcontext.h> #define ptrace_signal_deliver(regs, cookie) do { } while (0) -#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ #endif /* _XTENSA_SIGNAL_H */ diff --git a/arch/xtensa/include/asm/statfs.h b/arch/xtensa/include/asm/statfs.h deleted file mode 100644 index 9c3d1a213136..000000000000 --- a/arch/xtensa/include/asm/statfs.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * include/asm-xtensa/statfs.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_STATFS_H -#define _XTENSA_STATFS_H - -#include <asm-generic/statfs.h> - -#endif /* _XTENSA_STATFS_H */ - diff --git a/arch/xtensa/include/asm/termios.h b/arch/xtensa/include/asm/termios.h deleted file mode 100644 index 4673f42f88a7..000000000000 --- a/arch/xtensa/include/asm/termios.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * include/asm-xtensa/termios.h - * - * Copied from SH. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_TERMIOS_H -#define _XTENSA_TERMIOS_H - -#include <asm/termbits.h> -#include <asm/ioctls.h> - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* Modem lines */ - -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ - -/* intr=^C quit=^\ erase=del kill=^U - eof=^D vtime=\0 vmin=\1 sxtc=\0 - start=^Q stop=^S susp=^Z eol=\0 - reprint=^R discard=^U werase=^W lnext=^V - eol2=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" - -/* - * Translate a "termio" structure into a "termios". Ugh. - */ - -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - *(unsigned short *) &(termios)->x = __tmp; \ -} - -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ - copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - */ - -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - put_user((termios)->c_iflag, &(termio)->c_iflag); \ - put_user((termios)->c_oflag, &(termio)->c_oflag); \ - put_user((termios)->c_cflag, &(termio)->c_cflag); \ - put_user((termios)->c_lflag, &(termio)->c_lflag); \ - put_user((termios)->c_line, &(termio)->c_line); \ - copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ -}) - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) -#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) - -#endif /* __KERNEL__ */ - -#endif /* _XTENSA_TERMIOS_H */ diff --git a/arch/xtensa/include/asm/timex.h b/arch/xtensa/include/asm/timex.h index 053bc4272106..175b3d5e1b01 100644 --- a/arch/xtensa/include/asm/timex.h +++ b/arch/xtensa/include/asm/timex.h @@ -63,10 +63,10 @@ extern cycles_t cacheflush_time; * Register access. */ -#define WSR_CCOUNT(r) asm volatile ("wsr %0,"__stringify(CCOUNT) :: "a" (r)) -#define RSR_CCOUNT(r) asm volatile ("rsr %0,"__stringify(CCOUNT) : "=a" (r)) -#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(CCOMPARE)"+"__stringify(x) :: "a"(r)) -#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(CCOMPARE)"+"__stringify(x) : "=a"(r)) +#define WSR_CCOUNT(r) asm volatile ("wsr %0, ccount" :: "a" (r)) +#define RSR_CCOUNT(r) asm volatile ("rsr %0, ccount" : "=a" (r)) +#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) :: "a"(r)) +#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) : "=a"(r)) static inline unsigned long get_ccount (void) { diff --git a/arch/xtensa/include/asm/tlbflush.h b/arch/xtensa/include/asm/tlbflush.h index 46d240074f74..43dd348a5a47 100644 --- a/arch/xtensa/include/asm/tlbflush.h +++ b/arch/xtensa/include/asm/tlbflush.h @@ -86,26 +86,26 @@ static inline void invalidate_dtlb_entry_no_isync (unsigned entry) static inline void set_itlbcfg_register (unsigned long val) { - __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t" + __asm__ __volatile__("wsr %0, itlbcfg\n\t" "isync\n\t" : : "a" (val)); } static inline void set_dtlbcfg_register (unsigned long val) { - __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t" + __asm__ __volatile__("wsr %0, dtlbcfg; dsync\n\t" : : "a" (val)); } static inline void set_ptevaddr_register (unsigned long val) { - __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n" + __asm__ __volatile__(" wsr %0, ptevaddr; isync\n" : : "a" (val)); } static inline unsigned long read_ptevaddr_register (void) { unsigned long tmp; - __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp)); + __asm__ __volatile__("rsr %0, ptevaddr\n\t" : "=a" (tmp)); return tmp; } diff --git a/arch/xtensa/include/asm/topology.h b/arch/xtensa/include/asm/topology.h deleted file mode 100644 index 7309e38a0ccb..000000000000 --- a/arch/xtensa/include/asm/topology.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/topology.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_TOPOLOGY_H -#define _XTENSA_TOPOLOGY_H - -#include <asm-generic/topology.h> - -#endif /* _XTENSA_TOPOLOGY_H */ diff --git a/arch/xtensa/include/asm/types.h b/arch/xtensa/include/asm/types.h index 6d4db7e8ffac..2b410b8c7f79 100644 --- a/arch/xtensa/include/asm/types.h +++ b/arch/xtensa/include/asm/types.h @@ -7,30 +7,17 @@ * * Copyright (C) 2001 - 2005 Tensilica Inc. */ - #ifndef _XTENSA_TYPES_H #define _XTENSA_TYPES_H -#include <asm-generic/int-ll64.h> - -#ifdef __ASSEMBLY__ -# define __XTENSA_UL(x) (x) -# define __XTENSA_UL_CONST(x) x -#else -# define __XTENSA_UL(x) ((unsigned long)(x)) -# define __XTENSA_UL_CONST(x) x##UL -#endif +#include <uapi/asm/types.h> #ifndef __ASSEMBLY__ - /* * These aren't exported outside the kernel to avoid name space clashes */ -#ifdef __KERNEL__ #define BITS_PER_LONG 32 -#endif /* __KERNEL__ */ #endif - #endif /* _XTENSA_TYPES_H */ diff --git a/arch/xtensa/include/asm/unistd.h b/arch/xtensa/include/asm/unistd.h index bc7e005faa60..9ef1c31d2c83 100644 --- a/arch/xtensa/include/asm/unistd.h +++ b/arch/xtensa/include/asm/unistd.h @@ -8,705 +8,8 @@ * Copyright (C) 2001 - 2005 Tensilica Inc. */ -#ifndef _XTENSA_UNISTD_H -#define _XTENSA_UNISTD_H +#include <uapi/asm/unistd.h> -#ifndef __SYSCALL -# define __SYSCALL(nr,func,nargs) -#endif - -#define __NR_spill 0 -__SYSCALL( 0, sys_ni_syscall, 0) -#define __NR_xtensa 1 -__SYSCALL( 1, sys_ni_syscall, 0) -#define __NR_available4 2 -__SYSCALL( 2, sys_ni_syscall, 0) -#define __NR_available5 3 -__SYSCALL( 3, sys_ni_syscall, 0) -#define __NR_available6 4 -__SYSCALL( 4, sys_ni_syscall, 0) -#define __NR_available7 5 -__SYSCALL( 5, sys_ni_syscall, 0) -#define __NR_available8 6 -__SYSCALL( 6, sys_ni_syscall, 0) -#define __NR_available9 7 -__SYSCALL( 7, sys_ni_syscall, 0) - -/* File Operations */ - -#define __NR_open 8 -__SYSCALL( 8, sys_open, 3) -#define __NR_close 9 -__SYSCALL( 9, sys_close, 1) -#define __NR_dup 10 -__SYSCALL( 10, sys_dup, 1) -#define __NR_dup2 11 -__SYSCALL( 11, sys_dup2, 2) -#define __NR_read 12 -__SYSCALL( 12, sys_read, 3) -#define __NR_write 13 -__SYSCALL( 13, sys_write, 3) -#define __NR_select 14 -__SYSCALL( 14, sys_select, 5) -#define __NR_lseek 15 -__SYSCALL( 15, sys_lseek, 3) -#define __NR_poll 16 -__SYSCALL( 16, sys_poll, 3) -#define __NR__llseek 17 -__SYSCALL( 17, sys_llseek, 5) -#define __NR_epoll_wait 18 -__SYSCALL( 18, sys_epoll_wait, 4) -#define __NR_epoll_ctl 19 -__SYSCALL( 19, sys_epoll_ctl, 4) -#define __NR_epoll_create 20 -__SYSCALL( 20, sys_epoll_create, 1) -#define __NR_creat 21 -__SYSCALL( 21, sys_creat, 2) -#define __NR_truncate 22 -__SYSCALL( 22, sys_truncate, 2) -#define __NR_ftruncate 23 -__SYSCALL( 23, sys_ftruncate, 2) -#define __NR_readv 24 -__SYSCALL( 24, sys_readv, 3) -#define __NR_writev 25 -__SYSCALL( 25, sys_writev, 3) -#define __NR_fsync 26 -__SYSCALL( 26, sys_fsync, 1) -#define __NR_fdatasync 27 -__SYSCALL( 27, sys_fdatasync, 1) -#define __NR_truncate64 28 -__SYSCALL( 28, sys_truncate64, 2) -#define __NR_ftruncate64 29 -__SYSCALL( 29, sys_ftruncate64, 2) -#define __NR_pread64 30 -__SYSCALL( 30, sys_pread64, 6) -#define __NR_pwrite64 31 -__SYSCALL( 31, sys_pwrite64, 6) - -#define __NR_link 32 -__SYSCALL( 32, sys_link, 2) -#define __NR_rename 33 -__SYSCALL( 33, sys_rename, 2) -#define __NR_symlink 34 -__SYSCALL( 34, sys_symlink, 2) -#define __NR_readlink 35 -__SYSCALL( 35, sys_readlink, 3) -#define __NR_mknod 36 -__SYSCALL( 36, sys_mknod, 3) -#define __NR_pipe 37 -__SYSCALL( 37, sys_pipe, 1) -#define __NR_unlink 38 -__SYSCALL( 38, sys_unlink, 1) -#define __NR_rmdir 39 -__SYSCALL( 39, sys_rmdir, 1) - -#define __NR_mkdir 40 -__SYSCALL( 40, sys_mkdir, 2) -#define __NR_chdir 41 -__SYSCALL( 41, sys_chdir, 1) -#define __NR_fchdir 42 -__SYSCALL( 42, sys_fchdir, 1) -#define __NR_getcwd 43 -__SYSCALL( 43, sys_getcwd, 2) - -#define __NR_chmod 44 -__SYSCALL( 44, sys_chmod, 2) -#define __NR_chown 45 -__SYSCALL( 45, sys_chown, 3) -#define __NR_stat 46 -__SYSCALL( 46, sys_newstat, 2) -#define __NR_stat64 47 -__SYSCALL( 47, sys_stat64, 2) - -#define __NR_lchown 48 -__SYSCALL( 48, sys_lchown, 3) -#define __NR_lstat 49 -__SYSCALL( 49, sys_newlstat, 2) -#define __NR_lstat64 50 -__SYSCALL( 50, sys_lstat64, 2) -#define __NR_available51 51 -__SYSCALL( 51, sys_ni_syscall, 0) - -#define __NR_fchmod 52 -__SYSCALL( 52, sys_fchmod, 2) -#define __NR_fchown 53 -__SYSCALL( 53, sys_fchown, 3) -#define __NR_fstat 54 -__SYSCALL( 54, sys_newfstat, 2) -#define __NR_fstat64 55 -__SYSCALL( 55, sys_fstat64, 2) - -#define __NR_flock 56 -__SYSCALL( 56, sys_flock, 2) -#define __NR_access 57 -__SYSCALL( 57, sys_access, 2) -#define __NR_umask 58 -__SYSCALL( 58, sys_umask, 1) -#define __NR_getdents 59 -__SYSCALL( 59, sys_getdents, 3) -#define __NR_getdents64 60 -__SYSCALL( 60, sys_getdents64, 3) -#define __NR_fcntl64 61 -__SYSCALL( 61, sys_fcntl64, 3) -#define __NR_available62 62 -__SYSCALL( 62, sys_ni_syscall, 0) -#define __NR_fadvise64_64 63 -__SYSCALL( 63, xtensa_fadvise64_64, 6) -#define __NR_utime 64 /* glibc 2.3.3 ?? */ -__SYSCALL( 64, sys_utime, 2) -#define __NR_utimes 65 -__SYSCALL( 65, sys_utimes, 2) -#define __NR_ioctl 66 -__SYSCALL( 66, sys_ioctl, 3) -#define __NR_fcntl 67 -__SYSCALL( 67, sys_fcntl, 3) - -#define __NR_setxattr 68 -__SYSCALL( 68, sys_setxattr, 5) -#define __NR_getxattr 69 -__SYSCALL( 69, sys_getxattr, 4) -#define __NR_listxattr 70 -__SYSCALL( 70, sys_listxattr, 3) -#define __NR_removexattr 71 -__SYSCALL( 71, sys_removexattr, 2) -#define __NR_lsetxattr 72 -__SYSCALL( 72, sys_lsetxattr, 5) -#define __NR_lgetxattr 73 -__SYSCALL( 73, sys_lgetxattr, 4) -#define __NR_llistxattr 74 -__SYSCALL( 74, sys_llistxattr, 3) -#define __NR_lremovexattr 75 -__SYSCALL( 75, sys_lremovexattr, 2) -#define __NR_fsetxattr 76 -__SYSCALL( 76, sys_fsetxattr, 5) -#define __NR_fgetxattr 77 -__SYSCALL( 77, sys_fgetxattr, 4) -#define __NR_flistxattr 78 -__SYSCALL( 78, sys_flistxattr, 3) -#define __NR_fremovexattr 79 -__SYSCALL( 79, sys_fremovexattr, 2) - -/* File Map / Shared Memory Operations */ - -#define __NR_mmap2 80 -__SYSCALL( 80, sys_mmap_pgoff, 6) -#define __NR_munmap 81 -__SYSCALL( 81, sys_munmap, 2) -#define __NR_mprotect 82 -__SYSCALL( 82, sys_mprotect, 3) -#define __NR_brk 83 -__SYSCALL( 83, sys_brk, 1) -#define __NR_mlock 84 -__SYSCALL( 84, sys_mlock, 2) -#define __NR_munlock 85 -__SYSCALL( 85, sys_munlock, 2) -#define __NR_mlockall 86 -__SYSCALL( 86, sys_mlockall, 1) -#define __NR_munlockall 87 -__SYSCALL( 87, sys_munlockall, 0) -#define __NR_mremap 88 -__SYSCALL( 88, sys_mremap, 4) -#define __NR_msync 89 -__SYSCALL( 89, sys_msync, 3) -#define __NR_mincore 90 -__SYSCALL( 90, sys_mincore, 3) -#define __NR_madvise 91 -__SYSCALL( 91, sys_madvise, 3) -#define __NR_shmget 92 -__SYSCALL( 92, sys_shmget, 4) -#define __NR_shmat 93 -__SYSCALL( 93, xtensa_shmat, 4) -#define __NR_shmctl 94 -__SYSCALL( 94, sys_shmctl, 4) -#define __NR_shmdt 95 -__SYSCALL( 95, sys_shmdt, 4) - -/* Socket Operations */ - -#define __NR_socket 96 -__SYSCALL( 96, sys_socket, 3) -#define __NR_setsockopt 97 -__SYSCALL( 97, sys_setsockopt, 5) -#define __NR_getsockopt 98 -__SYSCALL( 98, sys_getsockopt, 5) -#define __NR_shutdown 99 -__SYSCALL( 99, sys_shutdown, 2) - -#define __NR_bind 100 -__SYSCALL(100, sys_bind, 3) -#define __NR_connect 101 -__SYSCALL(101, sys_connect, 3) -#define __NR_listen 102 -__SYSCALL(102, sys_listen, 2) -#define __NR_accept 103 -__SYSCALL(103, sys_accept, 3) - -#define __NR_getsockname 104 -__SYSCALL(104, sys_getsockname, 3) -#define __NR_getpeername 105 -__SYSCALL(105, sys_getpeername, 3) -#define __NR_sendmsg 106 -__SYSCALL(106, sys_sendmsg, 3) -#define __NR_recvmsg 107 -__SYSCALL(107, sys_recvmsg, 3) -#define __NR_send 108 -__SYSCALL(108, sys_send, 4) -#define __NR_recv 109 -__SYSCALL(109, sys_recv, 4) -#define __NR_sendto 110 -__SYSCALL(110, sys_sendto, 6) -#define __NR_recvfrom 111 -__SYSCALL(111, sys_recvfrom, 6) - -#define __NR_socketpair 112 -__SYSCALL(112, sys_socketpair, 4) -#define __NR_sendfile 113 -__SYSCALL(113, sys_sendfile, 4) -#define __NR_sendfile64 114 -__SYSCALL(114, sys_sendfile64, 4) -#define __NR_available115 115 -__SYSCALL(115, sys_ni_syscall, 0) - -/* Process Operations */ - -#define __NR_clone 116 -__SYSCALL(116, xtensa_clone, 5) -#define __NR_execve 117 -__SYSCALL(117, xtensa_execve, 3) -#define __NR_exit 118 -__SYSCALL(118, sys_exit, 1) -#define __NR_exit_group 119 -__SYSCALL(119, sys_exit_group, 1) -#define __NR_getpid 120 -__SYSCALL(120, sys_getpid, 0) -#define __NR_wait4 121 -__SYSCALL(121, sys_wait4, 4) -#define __NR_waitid 122 -__SYSCALL(122, sys_waitid, 5) -#define __NR_kill 123 -__SYSCALL(123, sys_kill, 2) -#define __NR_tkill 124 -__SYSCALL(124, sys_tkill, 2) -#define __NR_tgkill 125 -__SYSCALL(125, sys_tgkill, 3) -#define __NR_set_tid_address 126 -__SYSCALL(126, sys_set_tid_address, 1) -#define __NR_gettid 127 -__SYSCALL(127, sys_gettid, 0) -#define __NR_setsid 128 -__SYSCALL(128, sys_setsid, 0) -#define __NR_getsid 129 -__SYSCALL(129, sys_getsid, 1) -#define __NR_prctl 130 -__SYSCALL(130, sys_prctl, 5) -#define __NR_personality 131 -__SYSCALL(131, sys_personality, 1) -#define __NR_getpriority 132 -__SYSCALL(132, sys_getpriority, 2) -#define __NR_setpriority 133 -__SYSCALL(133, sys_setpriority, 3) -#define __NR_setitimer 134 -__SYSCALL(134, sys_setitimer, 3) -#define __NR_getitimer 135 -__SYSCALL(135, sys_getitimer, 2) -#define __NR_setuid 136 -__SYSCALL(136, sys_setuid, 1) -#define __NR_getuid 137 -__SYSCALL(137, sys_getuid, 0) -#define __NR_setgid 138 -__SYSCALL(138, sys_setgid, 1) -#define __NR_getgid 139 -__SYSCALL(139, sys_getgid, 0) -#define __NR_geteuid 140 -__SYSCALL(140, sys_geteuid, 0) -#define __NR_getegid 141 -__SYSCALL(141, sys_getegid, 0) -#define __NR_setreuid 142 -__SYSCALL(142, sys_setreuid, 2) -#define __NR_setregid 143 -__SYSCALL(143, sys_setregid, 2) -#define __NR_setresuid 144 -__SYSCALL(144, sys_setresuid, 3) -#define __NR_getresuid 145 -__SYSCALL(145, sys_getresuid, 3) -#define __NR_setresgid 146 -__SYSCALL(146, sys_setresgid, 3) -#define __NR_getresgid 147 -__SYSCALL(147, sys_getresgid, 3) -#define __NR_setpgid 148 -__SYSCALL(148, sys_setpgid, 2) -#define __NR_getpgid 149 -__SYSCALL(149, sys_getpgid, 1) -#define __NR_getppid 150 -__SYSCALL(150, sys_getppid, 0) -#define __NR_getpgrp 151 -__SYSCALL(151, sys_getpgrp, 0) - -#define __NR_reserved152 152 /* set_thread_area */ -__SYSCALL(152, sys_ni_syscall, 0) -#define __NR_reserved153 153 /* get_thread_area */ -__SYSCALL(153, sys_ni_syscall, 0) -#define __NR_times 154 -__SYSCALL(154, sys_times, 1) -#define __NR_acct 155 -__SYSCALL(155, sys_acct, 1) -#define __NR_sched_setaffinity 156 -__SYSCALL(156, sys_sched_setaffinity, 3) -#define __NR_sched_getaffinity 157 -__SYSCALL(157, sys_sched_getaffinity, 3) -#define __NR_capget 158 -__SYSCALL(158, sys_capget, 2) -#define __NR_capset 159 -__SYSCALL(159, sys_capset, 2) -#define __NR_ptrace 160 -__SYSCALL(160, sys_ptrace, 4) -#define __NR_semtimedop 161 -__SYSCALL(161, sys_semtimedop, 5) -#define __NR_semget 162 -__SYSCALL(162, sys_semget, 4) -#define __NR_semop 163 -__SYSCALL(163, sys_semop, 4) -#define __NR_semctl 164 -__SYSCALL(164, sys_semctl, 4) -#define __NR_available165 165 -__SYSCALL(165, sys_ni_syscall, 0) -#define __NR_msgget 166 -__SYSCALL(166, sys_msgget, 4) -#define __NR_msgsnd 167 -__SYSCALL(167, sys_msgsnd, 4) -#define __NR_msgrcv 168 -__SYSCALL(168, sys_msgrcv, 4) -#define __NR_msgctl 169 -__SYSCALL(169, sys_msgctl, 4) -#define __NR_available170 170 -__SYSCALL(170, sys_ni_syscall, 0) -#define __NR_available171 171 -__SYSCALL(171, sys_ni_syscall, 0) - -/* File System */ - -#define __NR_mount 172 -__SYSCALL(172, sys_mount, 5) -#define __NR_swapon 173 -__SYSCALL(173, sys_swapon, 2) -#define __NR_chroot 174 -__SYSCALL(174, sys_chroot, 1) -#define __NR_pivot_root 175 -__SYSCALL(175, sys_pivot_root, 2) -#define __NR_umount 176 -__SYSCALL(176, sys_umount, 2) -#define __NR_swapoff 177 -__SYSCALL(177, sys_swapoff, 1) -#define __NR_sync 178 -__SYSCALL(178, sys_sync, 0) -#define __NR_available179 179 -__SYSCALL(179, sys_ni_syscall, 0) -#define __NR_setfsuid 180 -__SYSCALL(180, sys_setfsuid, 1) -#define __NR_setfsgid 181 -__SYSCALL(181, sys_setfsgid, 1) -#define __NR_sysfs 182 -__SYSCALL(182, sys_sysfs, 3) -#define __NR_ustat 183 -__SYSCALL(183, sys_ustat, 2) -#define __NR_statfs 184 -__SYSCALL(184, sys_statfs, 2) -#define __NR_fstatfs 185 -__SYSCALL(185, sys_fstatfs, 2) -#define __NR_statfs64 186 -__SYSCALL(186, sys_statfs64, 3) -#define __NR_fstatfs64 187 -__SYSCALL(187, sys_fstatfs64, 3) - -/* System */ - -#define __NR_setrlimit 188 -__SYSCALL(188, sys_setrlimit, 2) -#define __NR_getrlimit 189 -__SYSCALL(189, sys_getrlimit, 2) -#define __NR_getrusage 190 -__SYSCALL(190, sys_getrusage, 2) -#define __NR_futex 191 -__SYSCALL(191, sys_futex, 5) -#define __NR_gettimeofday 192 -__SYSCALL(192, sys_gettimeofday, 2) -#define __NR_settimeofday 193 -__SYSCALL(193, sys_settimeofday, 2) -#define __NR_adjtimex 194 -__SYSCALL(194, sys_adjtimex, 1) -#define __NR_nanosleep 195 -__SYSCALL(195, sys_nanosleep, 2) -#define __NR_getgroups 196 -__SYSCALL(196, sys_getgroups, 2) -#define __NR_setgroups 197 -__SYSCALL(197, sys_setgroups, 2) -#define __NR_sethostname 198 -__SYSCALL(198, sys_sethostname, 2) -#define __NR_setdomainname 199 -__SYSCALL(199, sys_setdomainname, 2) -#define __NR_syslog 200 -__SYSCALL(200, sys_syslog, 3) -#define __NR_vhangup 201 -__SYSCALL(201, sys_vhangup, 0) -#define __NR_uselib 202 -__SYSCALL(202, sys_uselib, 1) -#define __NR_reboot 203 -__SYSCALL(203, sys_reboot, 3) -#define __NR_quotactl 204 -__SYSCALL(204, sys_quotactl, 4) -#define __NR_nfsservctl 205 -__SYSCALL(205, sys_ni_syscall, 0) -#define __NR__sysctl 206 -__SYSCALL(206, sys_sysctl, 1) -#define __NR_bdflush 207 -__SYSCALL(207, sys_bdflush, 2) -#define __NR_uname 208 -__SYSCALL(208, sys_newuname, 1) -#define __NR_sysinfo 209 -__SYSCALL(209, sys_sysinfo, 1) -#define __NR_init_module 210 -__SYSCALL(210, sys_init_module, 2) -#define __NR_delete_module 211 -__SYSCALL(211, sys_delete_module, 1) - -#define __NR_sched_setparam 212 -__SYSCALL(212, sys_sched_setparam, 2) -#define __NR_sched_getparam 213 -__SYSCALL(213, sys_sched_getparam, 2) -#define __NR_sched_setscheduler 214 -__SYSCALL(214, sys_sched_setscheduler, 3) -#define __NR_sched_getscheduler 215 -__SYSCALL(215, sys_sched_getscheduler, 1) -#define __NR_sched_get_priority_max 216 -__SYSCALL(216, sys_sched_get_priority_max, 1) -#define __NR_sched_get_priority_min 217 -__SYSCALL(217, sys_sched_get_priority_min, 1) -#define __NR_sched_rr_get_interval 218 -__SYSCALL(218, sys_sched_rr_get_interval, 2) -#define __NR_sched_yield 219 -__SYSCALL(219, sys_sched_yield, 0) -#define __NR_available222 222 -__SYSCALL(222, sys_ni_syscall, 0) - -/* Signal Handling */ - -#define __NR_restart_syscall 223 -__SYSCALL(223, sys_restart_syscall, 0) -#define __NR_sigaltstack 224 -__SYSCALL(224, xtensa_sigaltstack, 2) -#define __NR_rt_sigreturn 225 -__SYSCALL(225, xtensa_rt_sigreturn, 1) -#define __NR_rt_sigaction 226 -__SYSCALL(226, sys_rt_sigaction, 4) -#define __NR_rt_sigprocmask 227 -__SYSCALL(227, sys_rt_sigprocmask, 4) -#define __NR_rt_sigpending 228 -__SYSCALL(228, sys_rt_sigpending, 2) -#define __NR_rt_sigtimedwait 229 -__SYSCALL(229, sys_rt_sigtimedwait, 4) -#define __NR_rt_sigqueueinfo 230 -__SYSCALL(230, sys_rt_sigqueueinfo, 3) -#define __NR_rt_sigsuspend 231 -__SYSCALL(231, sys_rt_sigsuspend, 2) - -/* Message */ - -#define __NR_mq_open 232 -__SYSCALL(232, sys_mq_open, 4) -#define __NR_mq_unlink 233 -__SYSCALL(233, sys_mq_unlink, 1) -#define __NR_mq_timedsend 234 -__SYSCALL(234, sys_mq_timedsend, 5) -#define __NR_mq_timedreceive 235 -__SYSCALL(235, sys_mq_timedreceive, 5) -#define __NR_mq_notify 236 -__SYSCALL(236, sys_mq_notify, 2) -#define __NR_mq_getsetattr 237 -__SYSCALL(237, sys_mq_getsetattr, 3) -#define __NR_available238 238 -__SYSCALL(238, sys_ni_syscall, 0) - -/* IO */ - -#define __NR_io_setup 239 -__SYSCALL(239, sys_io_setup, 2) -#define __NR_io_destroy 240 -__SYSCALL(240, sys_io_destroy, 1) -#define __NR_io_submit 241 -__SYSCALL(241, sys_io_submit, 3) -#define __NR_io_getevents 242 -__SYSCALL(242, sys_io_getevents, 5) -#define __NR_io_cancel 243 -__SYSCALL(243, sys_io_cancel, 3) -#define __NR_clock_settime 244 -__SYSCALL(244, sys_clock_settime, 2) -#define __NR_clock_gettime 245 -__SYSCALL(245, sys_clock_gettime, 2) -#define __NR_clock_getres 246 -__SYSCALL(246, sys_clock_getres, 2) -#define __NR_clock_nanosleep 247 -__SYSCALL(247, sys_clock_nanosleep, 4) - -/* Timer */ - -#define __NR_timer_create 248 -__SYSCALL(248, sys_timer_create, 3) -#define __NR_timer_delete 249 -__SYSCALL(249, sys_timer_delete, 1) -#define __NR_timer_settime 250 -__SYSCALL(250, sys_timer_settime, 4) -#define __NR_timer_gettime 251 -__SYSCALL(251, sys_timer_gettime, 2) -#define __NR_timer_getoverrun 252 -__SYSCALL(252, sys_timer_getoverrun, 1) - -/* System */ - -#define __NR_reserved244 253 -__SYSCALL(253, sys_ni_syscall, 0) -#define __NR_lookup_dcookie 254 -__SYSCALL(254, sys_lookup_dcookie, 4) -#define __NR_available255 255 -__SYSCALL(255, sys_ni_syscall, 0) -#define __NR_add_key 256 -__SYSCALL(256, sys_add_key, 5) -#define __NR_request_key 257 -__SYSCALL(257, sys_request_key, 5) -#define __NR_keyctl 258 -__SYSCALL(258, sys_keyctl, 5) -#define __NR_available259 259 -__SYSCALL(259, sys_ni_syscall, 0) - - -#define __NR_readahead 260 -__SYSCALL(260, sys_readahead, 5) -#define __NR_remap_file_pages 261 -__SYSCALL(261, sys_remap_file_pages, 5) -#define __NR_migrate_pages 262 -__SYSCALL(262, sys_migrate_pages, 0) -#define __NR_mbind 263 -__SYSCALL(263, sys_mbind, 6) -#define __NR_get_mempolicy 264 -__SYSCALL(264, sys_get_mempolicy, 5) -#define __NR_set_mempolicy 265 -__SYSCALL(265, sys_set_mempolicy, 3) -#define __NR_unshare 266 -__SYSCALL(266, sys_unshare, 1) -#define __NR_move_pages 267 -__SYSCALL(267, sys_move_pages, 0) -#define __NR_splice 268 -__SYSCALL(268, sys_splice, 0) -#define __NR_tee 269 -__SYSCALL(269, sys_tee, 0) -#define __NR_vmsplice 270 -__SYSCALL(270, sys_vmsplice, 0) -#define __NR_available271 271 -__SYSCALL(271, sys_ni_syscall, 0) - -#define __NR_pselect6 272 -__SYSCALL(272, sys_pselect6, 0) -#define __NR_ppoll 273 -__SYSCALL(273, sys_ppoll, 0) -#define __NR_epoll_pwait 274 -__SYSCALL(274, sys_epoll_pwait, 0) -#define __NR_available275 275 -__SYSCALL(275, sys_ni_syscall, 0) - -#define __NR_inotify_init 276 -__SYSCALL(276, sys_inotify_init, 0) -#define __NR_inotify_add_watch 277 -__SYSCALL(277, sys_inotify_add_watch, 3) -#define __NR_inotify_rm_watch 278 -__SYSCALL(278, sys_inotify_rm_watch, 2) -#define __NR_available279 279 -__SYSCALL(279, sys_ni_syscall, 0) - -#define __NR_getcpu 280 -__SYSCALL(280, sys_getcpu, 0) -#define __NR_kexec_load 281 -__SYSCALL(281, sys_ni_syscall, 0) - -#define __NR_ioprio_set 282 -__SYSCALL(282, sys_ioprio_set, 2) -#define __NR_ioprio_get 283 -__SYSCALL(283, sys_ioprio_get, 3) - -#define __NR_set_robust_list 284 -__SYSCALL(284, sys_set_robust_list, 3) -#define __NR_get_robust_list 285 -__SYSCALL(285, sys_get_robust_list, 3) -#define __NR_reserved286 286 /* sync_file_rangeX */ -__SYSCALL(286, sys_ni_syscall, 3) -#define __NR_available287 287 -__SYSCALL(287, sys_faccessat, 0) - -/* Relative File Operations */ - -#define __NR_openat 288 -__SYSCALL(288, sys_openat, 4) -#define __NR_mkdirat 289 -__SYSCALL(289, sys_mkdirat, 3) -#define __NR_mknodat 290 -__SYSCALL(290, sys_mknodat, 4) -#define __NR_unlinkat 291 -__SYSCALL(291, sys_unlinkat, 3) -#define __NR_renameat 292 -__SYSCALL(292, sys_renameat, 4) -#define __NR_linkat 293 -__SYSCALL(293, sys_linkat, 5) -#define __NR_symlinkat 294 -__SYSCALL(294, sys_symlinkat, 3) -#define __NR_readlinkat 295 -__SYSCALL(295, sys_readlinkat, 4) -#define __NR_utimensat 296 -__SYSCALL(296, sys_utimensat, 0) -#define __NR_fchownat 297 -__SYSCALL(297, sys_fchownat, 5) -#define __NR_futimesat 298 -__SYSCALL(298, sys_futimesat, 4) -#define __NR_fstatat64 299 -__SYSCALL(299, sys_fstatat64, 0) -#define __NR_fchmodat 300 -__SYSCALL(300, sys_fchmodat, 4) -#define __NR_faccessat 301 -__SYSCALL(301, sys_faccessat, 4) -#define __NR_available302 302 -__SYSCALL(302, sys_ni_syscall, 0) -#define __NR_available303 303 -__SYSCALL(303, sys_ni_syscall, 0) - -#define __NR_signalfd 304 -__SYSCALL(304, sys_signalfd, 3) -/* 305 was __NR_timerfd */ -__SYSCALL(305, sys_ni_syscall, 0) -#define __NR_eventfd 306 -__SYSCALL(306, sys_eventfd, 1) -#define __NR_recvmmsg 307 -__SYSCALL(307, sys_recvmmsg, 5) -#define __NR_setns 308 -__SYSCALL(308, sys_setns, 2) - -#define __NR_syscall_count 309 - -/* - * sysxtensa syscall handler - * - * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused); - * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused); - * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused); - * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval); - * a2 a6 a3 a4 a5 - */ - -#define SYS_XTENSA_RESERVED 0 /* don't use this */ -#define SYS_XTENSA_ATOMIC_SET 1 /* set variable */ -#define SYS_XTENSA_ATOMIC_EXG_ADD 2 /* exchange memory and add */ -#define SYS_XTENSA_ATOMIC_ADD 3 /* add to memory */ -#define SYS_XTENSA_ATOMIC_CMP_SWP 4 /* compare and swap */ - -#define SYS_XTENSA_COUNT 5 /* count */ - -#ifdef __KERNEL__ /* * "Conditional" syscalls @@ -734,6 +37,3 @@ __SYSCALL(308, sys_setns, 2) #define __IGNORE_mmap /* use mmap2 */ #define __IGNORE_vfork /* use clone */ #define __IGNORE_fadvise64 /* use fadvise64_64 */ - -#endif /* __KERNEL__ */ -#endif /* _XTENSA_UNISTD_H */ diff --git a/arch/xtensa/include/asm/xor.h b/arch/xtensa/include/asm/xor.h deleted file mode 100644 index e7b1f083991d..000000000000 --- a/arch/xtensa/include/asm/xor.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-xtensa/xor.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_XOR_H -#define _XTENSA_XOR_H - -#include <asm-generic/xor.h> - -#endif diff --git a/arch/xtensa/include/uapi/asm/Kbuild b/arch/xtensa/include/uapi/asm/Kbuild index baebb3da1d44..56aad54e7fb7 100644 --- a/arch/xtensa/include/uapi/asm/Kbuild +++ b/arch/xtensa/include/uapi/asm/Kbuild @@ -1,3 +1,25 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +header-y += auxvec.h +header-y += byteorder.h +header-y += ioctls.h +header-y += ipcbuf.h +header-y += mman.h +header-y += msgbuf.h +header-y += param.h +header-y += poll.h +header-y += posix_types.h +header-y += ptrace.h +header-y += sembuf.h +header-y += setup.h +header-y += shmbuf.h +header-y += sigcontext.h +header-y += signal.h +header-y += socket.h +header-y += sockios.h +header-y += stat.h +header-y += swab.h +header-y += termbits.h +header-y += types.h +header-y += unistd.h diff --git a/arch/xtensa/include/asm/auxvec.h b/arch/xtensa/include/uapi/asm/auxvec.h index 257dec75c5af..257dec75c5af 100644 --- a/arch/xtensa/include/asm/auxvec.h +++ b/arch/xtensa/include/uapi/asm/auxvec.h diff --git a/arch/xtensa/include/asm/byteorder.h b/arch/xtensa/include/uapi/asm/byteorder.h index 54eb6315349c..54eb6315349c 100644 --- a/arch/xtensa/include/asm/byteorder.h +++ b/arch/xtensa/include/uapi/asm/byteorder.h diff --git a/arch/xtensa/include/asm/ioctls.h b/arch/xtensa/include/uapi/asm/ioctls.h index 2aa4cd9f0cec..2aa4cd9f0cec 100644 --- a/arch/xtensa/include/asm/ioctls.h +++ b/arch/xtensa/include/uapi/asm/ioctls.h diff --git a/arch/xtensa/include/asm/ipcbuf.h b/arch/xtensa/include/uapi/asm/ipcbuf.h index c33aa6a42145..c33aa6a42145 100644 --- a/arch/xtensa/include/asm/ipcbuf.h +++ b/arch/xtensa/include/uapi/asm/ipcbuf.h diff --git a/arch/xtensa/include/asm/mman.h b/arch/xtensa/include/uapi/asm/mman.h index 25bc6c1309c3..25bc6c1309c3 100644 --- a/arch/xtensa/include/asm/mman.h +++ b/arch/xtensa/include/uapi/asm/mman.h diff --git a/arch/xtensa/include/asm/msgbuf.h b/arch/xtensa/include/uapi/asm/msgbuf.h index 693c96755280..693c96755280 100644 --- a/arch/xtensa/include/asm/msgbuf.h +++ b/arch/xtensa/include/uapi/asm/msgbuf.h diff --git a/arch/xtensa/include/uapi/asm/param.h b/arch/xtensa/include/uapi/asm/param.h new file mode 100644 index 000000000000..87bc2eae630e --- /dev/null +++ b/arch/xtensa/include/uapi/asm/param.h @@ -0,0 +1,30 @@ +/* + * include/asm-xtensa/param.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 - 2005 Tensilica Inc. + */ + +#ifndef _UAPI_XTENSA_PARAM_H +#define _UAPI_XTENSA_PARAM_H + +#ifndef __KERNEL__ +# define HZ 100 +#endif + +#define EXEC_PAGESIZE 4096 + +#ifndef NGROUPS +#define NGROUPS 32 +#endif + +#ifndef NOGROUP +#define NOGROUP (-1) +#endif + +#define MAXHOSTNAMELEN 64 /* max length of hostname */ + +#endif /* _UAPI_XTENSA_PARAM_H */ diff --git a/arch/xtensa/include/asm/poll.h b/arch/xtensa/include/uapi/asm/poll.h index 9d2d5993f068..9d2d5993f068 100644 --- a/arch/xtensa/include/asm/poll.h +++ b/arch/xtensa/include/uapi/asm/poll.h diff --git a/arch/xtensa/include/asm/posix_types.h b/arch/xtensa/include/uapi/asm/posix_types.h index 6e96be0d02d3..6e96be0d02d3 100644 --- a/arch/xtensa/include/asm/posix_types.h +++ b/arch/xtensa/include/uapi/asm/posix_types.h diff --git a/arch/xtensa/include/uapi/asm/ptrace.h b/arch/xtensa/include/uapi/asm/ptrace.h new file mode 100644 index 000000000000..ee17aa842fdf --- /dev/null +++ b/arch/xtensa/include/uapi/asm/ptrace.h @@ -0,0 +1,77 @@ +/* + * include/asm-xtensa/ptrace.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 - 2005 Tensilica Inc. + */ + +#ifndef _UAPI_XTENSA_PTRACE_H +#define _UAPI_XTENSA_PTRACE_H + +/* + * Kernel stack + * + * +-----------------------+ -------- STACK_SIZE + * | register file | | + * +-----------------------+ | + * | struct pt_regs | | + * +-----------------------+ | ------ PT_REGS_OFFSET + * double : 16 bytes spill area : | ^ + * excetion :- - - - - - - - - - - -: | | + * frame : struct pt_regs : | | + * :- - - - - - - - - - - -: | | + * | | | | + * | memory stack | | | + * | | | | + * ~ ~ ~ ~ + * ~ ~ ~ ~ + * | | | | + * | | | | + * +-----------------------+ | | --- STACK_BIAS + * | struct task_struct | | | ^ + * current --> +-----------------------+ | | | + * | struct thread_info | | | | + * +-----------------------+ -------- + */ + +#define KERNEL_STACK_SIZE (2 * PAGE_SIZE) + +/* Offsets for exception_handlers[] (3 x 64-entries x 4-byte tables). */ + +#define EXC_TABLE_KSTK 0x004 /* Kernel Stack */ +#define EXC_TABLE_DOUBLE_SAVE 0x008 /* Double exception save area for a0 */ +#define EXC_TABLE_FIXUP 0x00c /* Fixup handler */ +#define EXC_TABLE_PARAM 0x010 /* For passing a parameter to fixup */ +#define EXC_TABLE_SYSCALL_SAVE 0x014 /* For fast syscall handler */ +#define EXC_TABLE_FAST_USER 0x100 /* Fast user exception handler */ +#define EXC_TABLE_FAST_KERNEL 0x200 /* Fast kernel exception handler */ +#define EXC_TABLE_DEFAULT 0x300 /* Default C-Handler */ +#define EXC_TABLE_SIZE 0x400 + +/* Registers used by strace */ + +#define REG_A_BASE 0x0000 +#define REG_AR_BASE 0x0100 +#define REG_PC 0x0020 +#define REG_PS 0x02e6 +#define REG_WB 0x0248 +#define REG_WS 0x0249 +#define REG_LBEG 0x0200 +#define REG_LEND 0x0201 +#define REG_LCOUNT 0x0202 +#define REG_SAR 0x0203 + +#define SYSCALL_NR 0x00ff + +/* Other PTRACE_ values defined in <linux/ptrace.h> using values 0-9,16,17,24 */ + +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETXTREGS 18 +#define PTRACE_SETXTREGS 19 + + +#endif /* _UAPI_XTENSA_PTRACE_H */ diff --git a/arch/xtensa/include/asm/sembuf.h b/arch/xtensa/include/uapi/asm/sembuf.h index c15870493b33..c15870493b33 100644 --- a/arch/xtensa/include/asm/sembuf.h +++ b/arch/xtensa/include/uapi/asm/sembuf.h diff --git a/arch/xtensa/include/asm/setup.h b/arch/xtensa/include/uapi/asm/setup.h index 9fa8ad979361..9fa8ad979361 100644 --- a/arch/xtensa/include/asm/setup.h +++ b/arch/xtensa/include/uapi/asm/setup.h diff --git a/arch/xtensa/include/asm/shmbuf.h b/arch/xtensa/include/uapi/asm/shmbuf.h index ad4b0121782c..ad4b0121782c 100644 --- a/arch/xtensa/include/asm/shmbuf.h +++ b/arch/xtensa/include/uapi/asm/shmbuf.h diff --git a/arch/xtensa/include/asm/sigcontext.h b/arch/xtensa/include/uapi/asm/sigcontext.h index 03383af8c3b7..03383af8c3b7 100644 --- a/arch/xtensa/include/asm/sigcontext.h +++ b/arch/xtensa/include/uapi/asm/sigcontext.h diff --git a/arch/xtensa/include/uapi/asm/signal.h b/arch/xtensa/include/uapi/asm/signal.h new file mode 100644 index 000000000000..b88ce96f2af9 --- /dev/null +++ b/arch/xtensa/include/uapi/asm/signal.h @@ -0,0 +1,148 @@ +/* + * include/asm-xtensa/signal.h + * + * Swiped from SH. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 - 2005 Tensilica Inc. + */ + +#ifndef _UAPI_XTENSA_SIGNAL_H +#define _UAPI_XTENSA_SIGNAL_H + + +#define _NSIG 64 +#define _NSIG_BPW 32 +#define _NSIG_WORDS (_NSIG / _NSIG_BPW) + +#ifndef __ASSEMBLY__ + +#include <linux/types.h> + +/* Avoid too many header ordering problems. */ +struct siginfo; +typedef unsigned long old_sigset_t; /* at least 32 bits */ +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} sigset_t; + +#endif + +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 +#define SIGBUS 7 +#define SIGFPE 8 +#define SIGKILL 9 +#define SIGUSR1 10 +#define SIGSEGV 11 +#define SIGUSR2 12 +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGSTKFLT 16 +#define SIGCHLD 17 +#define SIGCONT 18 +#define SIGSTOP 19 +#define SIGTSTP 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGURG 23 +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGIO 29 +#define SIGPOLL SIGIO +/* #define SIGLOST 29 */ +#define SIGPWR 30 +#define SIGSYS 31 +#define SIGUNUSED 31 + +/* These should not be considered constants from userland. */ +#define SIGRTMIN 32 +#define SIGRTMAX (_NSIG-1) + +/* + * SA_FLAGS values: + * + * SA_ONSTACK indicates that a registered stack_t will be used. + * SA_RESTART flag to get restarting signals (which were the default long ago) + * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. + * SA_RESETHAND clears the handler when the signal is delivered. + * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. + * SA_NODEFER prevents the current signal from being masked in the handler. + * + * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single + * Unix names RESETHAND and NODEFER respectively. + */ +#define SA_NOCLDSTOP 0x00000001 +#define SA_NOCLDWAIT 0x00000002 /* not supported yet */ +#define SA_SIGINFO 0x00000004 +#define SA_ONSTACK 0x08000000 +#define SA_RESTART 0x10000000 +#define SA_NODEFER 0x40000000 +#define SA_RESETHAND 0x80000000 + +#define SA_NOMASK SA_NODEFER +#define SA_ONESHOT SA_RESETHAND + +#define SA_RESTORER 0x04000000 + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 2048 +#define SIGSTKSZ 8192 + +#ifndef __ASSEMBLY__ + +#define SIG_BLOCK 0 /* for blocking signals */ +#define SIG_UNBLOCK 1 /* for unblocking signals */ +#define SIG_SETMASK 2 /* for setting the signal mask */ + +/* Type of a signal handler. */ +typedef void (*__sighandler_t)(int); + +#define SIG_DFL ((__sighandler_t)0) /* default signal handling */ +#define SIG_IGN ((__sighandler_t)1) /* ignore signal */ +#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ + +#ifndef __KERNEL__ + +/* Here we must cater to libcs that poke about in kernel headers. */ + +struct sigaction { + union { + __sighandler_t _sa_handler; + void (*_sa_sigaction)(int, struct siginfo *, void *); + } _u; + sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); +}; + +#define sa_handler _u._sa_handler +#define sa_sigaction _u._sa_sigaction + +#endif /* __KERNEL__ */ + +typedef struct sigaltstack { + void *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#endif /* __ASSEMBLY__ */ +#endif /* _UAPI_XTENSA_SIGNAL_H */ diff --git a/arch/xtensa/include/asm/socket.h b/arch/xtensa/include/uapi/asm/socket.h index e36c68184920..e36c68184920 100644 --- a/arch/xtensa/include/asm/socket.h +++ b/arch/xtensa/include/uapi/asm/socket.h diff --git a/arch/xtensa/include/asm/sockios.h b/arch/xtensa/include/uapi/asm/sockios.h index efe0af379f01..efe0af379f01 100644 --- a/arch/xtensa/include/asm/sockios.h +++ b/arch/xtensa/include/uapi/asm/sockios.h diff --git a/arch/xtensa/include/asm/stat.h b/arch/xtensa/include/uapi/asm/stat.h index c4992038cee0..c4992038cee0 100644 --- a/arch/xtensa/include/asm/stat.h +++ b/arch/xtensa/include/uapi/asm/stat.h diff --git a/arch/xtensa/include/asm/swab.h b/arch/xtensa/include/uapi/asm/swab.h index 226a39162310..226a39162310 100644 --- a/arch/xtensa/include/asm/swab.h +++ b/arch/xtensa/include/uapi/asm/swab.h diff --git a/arch/xtensa/include/asm/termbits.h b/arch/xtensa/include/uapi/asm/termbits.h index 0d6c8715b24f..0d6c8715b24f 100644 --- a/arch/xtensa/include/asm/termbits.h +++ b/arch/xtensa/include/uapi/asm/termbits.h diff --git a/arch/xtensa/include/uapi/asm/types.h b/arch/xtensa/include/uapi/asm/types.h new file mode 100644 index 000000000000..87ec7ae73cb1 --- /dev/null +++ b/arch/xtensa/include/uapi/asm/types.h @@ -0,0 +1,28 @@ +/* + * include/asm-xtensa/types.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 - 2005 Tensilica Inc. + */ + +#ifndef _UAPI_XTENSA_TYPES_H +#define _UAPI_XTENSA_TYPES_H + +#include <asm-generic/int-ll64.h> + +#ifdef __ASSEMBLY__ +# define __XTENSA_UL(x) (x) +# define __XTENSA_UL_CONST(x) x +#else +# define __XTENSA_UL(x) ((unsigned long)(x)) +# define __XTENSA_UL_CONST(x) x##UL +#endif + +#ifndef __ASSEMBLY__ + +#endif + +#endif /* _UAPI_XTENSA_TYPES_H */ diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h new file mode 100644 index 000000000000..479abaea5aae --- /dev/null +++ b/arch/xtensa/include/uapi/asm/unistd.h @@ -0,0 +1,762 @@ +/* + * include/asm-xtensa/unistd.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 - 2012 Tensilica Inc. + */ + +#ifndef _UAPI_XTENSA_UNISTD_H +#define _UAPI_XTENSA_UNISTD_H + +#ifndef __SYSCALL +# define __SYSCALL(nr,func,nargs) +#endif + +#define __NR_spill 0 +__SYSCALL( 0, sys_ni_syscall, 0) +#define __NR_xtensa 1 +__SYSCALL( 1, sys_ni_syscall, 0) +#define __NR_available4 2 +__SYSCALL( 2, sys_ni_syscall, 0) +#define __NR_available5 3 +__SYSCALL( 3, sys_ni_syscall, 0) +#define __NR_available6 4 +__SYSCALL( 4, sys_ni_syscall, 0) +#define __NR_available7 5 +__SYSCALL( 5, sys_ni_syscall, 0) +#define __NR_available8 6 +__SYSCALL( 6, sys_ni_syscall, 0) +#define __NR_available9 7 +__SYSCALL( 7, sys_ni_syscall, 0) + +/* File Operations */ + +#define __NR_open 8 +__SYSCALL( 8, sys_open, 3) +#define __NR_close 9 +__SYSCALL( 9, sys_close, 1) +#define __NR_dup 10 +__SYSCALL( 10, sys_dup, 1) +#define __NR_dup2 11 +__SYSCALL( 11, sys_dup2, 2) +#define __NR_read 12 +__SYSCALL( 12, sys_read, 3) +#define __NR_write 13 +__SYSCALL( 13, sys_write, 3) +#define __NR_select 14 +__SYSCALL( 14, sys_select, 5) +#define __NR_lseek 15 +__SYSCALL( 15, sys_lseek, 3) +#define __NR_poll 16 +__SYSCALL( 16, sys_poll, 3) +#define __NR__llseek 17 +__SYSCALL( 17, sys_llseek, 5) +#define __NR_epoll_wait 18 +__SYSCALL( 18, sys_epoll_wait, 4) +#define __NR_epoll_ctl 19 +__SYSCALL( 19, sys_epoll_ctl, 4) +#define __NR_epoll_create 20 +__SYSCALL( 20, sys_epoll_create, 1) +#define __NR_creat 21 +__SYSCALL( 21, sys_creat, 2) +#define __NR_truncate 22 +__SYSCALL( 22, sys_truncate, 2) +#define __NR_ftruncate 23 +__SYSCALL( 23, sys_ftruncate, 2) +#define __NR_readv 24 +__SYSCALL( 24, sys_readv, 3) +#define __NR_writev 25 +__SYSCALL( 25, sys_writev, 3) +#define __NR_fsync 26 +__SYSCALL( 26, sys_fsync, 1) +#define __NR_fdatasync 27 +__SYSCALL( 27, sys_fdatasync, 1) +#define __NR_truncate64 28 +__SYSCALL( 28, sys_truncate64, 2) +#define __NR_ftruncate64 29 +__SYSCALL( 29, sys_ftruncate64, 2) +#define __NR_pread64 30 +__SYSCALL( 30, sys_pread64, 6) +#define __NR_pwrite64 31 +__SYSCALL( 31, sys_pwrite64, 6) + +#define __NR_link 32 +__SYSCALL( 32, sys_link, 2) +#define __NR_rename 33 +__SYSCALL( 33, sys_rename, 2) +#define __NR_symlink 34 +__SYSCALL( 34, sys_symlink, 2) +#define __NR_readlink 35 +__SYSCALL( 35, sys_readlink, 3) +#define __NR_mknod 36 +__SYSCALL( 36, sys_mknod, 3) +#define __NR_pipe 37 +__SYSCALL( 37, sys_pipe, 1) +#define __NR_unlink 38 +__SYSCALL( 38, sys_unlink, 1) +#define __NR_rmdir 39 +__SYSCALL( 39, sys_rmdir, 1) + +#define __NR_mkdir 40 +__SYSCALL( 40, sys_mkdir, 2) +#define __NR_chdir 41 +__SYSCALL( 41, sys_chdir, 1) +#define __NR_fchdir 42 +__SYSCALL( 42, sys_fchdir, 1) +#define __NR_getcwd 43 +__SYSCALL( 43, sys_getcwd, 2) + +#define __NR_chmod 44 +__SYSCALL( 44, sys_chmod, 2) +#define __NR_chown 45 +__SYSCALL( 45, sys_chown, 3) +#define __NR_stat 46 +__SYSCALL( 46, sys_newstat, 2) +#define __NR_stat64 47 +__SYSCALL( 47, sys_stat64, 2) + +#define __NR_lchown 48 +__SYSCALL( 48, sys_lchown, 3) +#define __NR_lstat 49 +__SYSCALL( 49, sys_newlstat, 2) +#define __NR_lstat64 50 +__SYSCALL( 50, sys_lstat64, 2) +#define __NR_available51 51 +__SYSCALL( 51, sys_ni_syscall, 0) + +#define __NR_fchmod 52 +__SYSCALL( 52, sys_fchmod, 2) +#define __NR_fchown 53 +__SYSCALL( 53, sys_fchown, 3) +#define __NR_fstat 54 +__SYSCALL( 54, sys_newfstat, 2) +#define __NR_fstat64 55 +__SYSCALL( 55, sys_fstat64, 2) + +#define __NR_flock 56 +__SYSCALL( 56, sys_flock, 2) +#define __NR_access 57 +__SYSCALL( 57, sys_access, 2) +#define __NR_umask 58 +__SYSCALL( 58, sys_umask, 1) +#define __NR_getdents 59 +__SYSCALL( 59, sys_getdents, 3) +#define __NR_getdents64 60 +__SYSCALL( 60, sys_getdents64, 3) +#define __NR_fcntl64 61 +__SYSCALL( 61, sys_fcntl64, 3) +#define __NR_fallocate 62 +__SYSCALL( 62, sys_fallocate, 6) +#define __NR_fadvise64_64 63 +__SYSCALL( 63, xtensa_fadvise64_64, 6) +#define __NR_utime 64 /* glibc 2.3.3 ?? */ +__SYSCALL( 64, sys_utime, 2) +#define __NR_utimes 65 +__SYSCALL( 65, sys_utimes, 2) +#define __NR_ioctl 66 +__SYSCALL( 66, sys_ioctl, 3) +#define __NR_fcntl 67 +__SYSCALL( 67, sys_fcntl, 3) + +#define __NR_setxattr 68 +__SYSCALL( 68, sys_setxattr, 5) +#define __NR_getxattr 69 +__SYSCALL( 69, sys_getxattr, 4) +#define __NR_listxattr 70 +__SYSCALL( 70, sys_listxattr, 3) +#define __NR_removexattr 71 +__SYSCALL( 71, sys_removexattr, 2) +#define __NR_lsetxattr 72 +__SYSCALL( 72, sys_lsetxattr, 5) +#define __NR_lgetxattr 73 +__SYSCALL( 73, sys_lgetxattr, 4) +#define __NR_llistxattr 74 +__SYSCALL( 74, sys_llistxattr, 3) +#define __NR_lremovexattr 75 +__SYSCALL( 75, sys_lremovexattr, 2) +#define __NR_fsetxattr 76 +__SYSCALL( 76, sys_fsetxattr, 5) +#define __NR_fgetxattr 77 +__SYSCALL( 77, sys_fgetxattr, 4) +#define __NR_flistxattr 78 +__SYSCALL( 78, sys_flistxattr, 3) +#define __NR_fremovexattr 79 +__SYSCALL( 79, sys_fremovexattr, 2) + +/* File Map / Shared Memory Operations */ + +#define __NR_mmap2 80 +__SYSCALL( 80, sys_mmap_pgoff, 6) +#define __NR_munmap 81 +__SYSCALL( 81, sys_munmap, 2) +#define __NR_mprotect 82 +__SYSCALL( 82, sys_mprotect, 3) +#define __NR_brk 83 +__SYSCALL( 83, sys_brk, 1) +#define __NR_mlock 84 +__SYSCALL( 84, sys_mlock, 2) +#define __NR_munlock 85 +__SYSCALL( 85, sys_munlock, 2) +#define __NR_mlockall 86 +__SYSCALL( 86, sys_mlockall, 1) +#define __NR_munlockall 87 +__SYSCALL( 87, sys_munlockall, 0) +#define __NR_mremap 88 +__SYSCALL( 88, sys_mremap, 4) +#define __NR_msync 89 +__SYSCALL( 89, sys_msync, 3) +#define __NR_mincore 90 +__SYSCALL( 90, sys_mincore, 3) +#define __NR_madvise 91 +__SYSCALL( 91, sys_madvise, 3) +#define __NR_shmget 92 +__SYSCALL( 92, sys_shmget, 4) +#define __NR_shmat 93 +__SYSCALL( 93, xtensa_shmat, 4) +#define __NR_shmctl 94 +__SYSCALL( 94, sys_shmctl, 4) +#define __NR_shmdt 95 +__SYSCALL( 95, sys_shmdt, 4) + +/* Socket Operations */ + +#define __NR_socket 96 +__SYSCALL( 96, sys_socket, 3) +#define __NR_setsockopt 97 +__SYSCALL( 97, sys_setsockopt, 5) +#define __NR_getsockopt 98 +__SYSCALL( 98, sys_getsockopt, 5) +#define __NR_shutdown 99 +__SYSCALL( 99, sys_shutdown, 2) + +#define __NR_bind 100 +__SYSCALL(100, sys_bind, 3) +#define __NR_connect 101 +__SYSCALL(101, sys_connect, 3) +#define __NR_listen 102 +__SYSCALL(102, sys_listen, 2) +#define __NR_accept 103 +__SYSCALL(103, sys_accept, 3) + +#define __NR_getsockname 104 +__SYSCALL(104, sys_getsockname, 3) +#define __NR_getpeername 105 +__SYSCALL(105, sys_getpeername, 3) +#define __NR_sendmsg 106 +__SYSCALL(106, sys_sendmsg, 3) +#define __NR_recvmsg 107 +__SYSCALL(107, sys_recvmsg, 3) +#define __NR_send 108 +__SYSCALL(108, sys_send, 4) +#define __NR_recv 109 +__SYSCALL(109, sys_recv, 4) +#define __NR_sendto 110 +__SYSCALL(110, sys_sendto, 6) +#define __NR_recvfrom 111 +__SYSCALL(111, sys_recvfrom, 6) + +#define __NR_socketpair 112 +__SYSCALL(112, sys_socketpair, 4) +#define __NR_sendfile 113 +__SYSCALL(113, sys_sendfile, 4) +#define __NR_sendfile64 114 +__SYSCALL(114, sys_sendfile64, 4) +#define __NR_sendmmsg 115 +__SYSCALL(115, sys_sendmmsg, 4) + +/* Process Operations */ + +#define __NR_clone 116 +__SYSCALL(116, xtensa_clone, 5) +#define __NR_execve 117 +__SYSCALL(117, xtensa_execve, 3) +#define __NR_exit 118 +__SYSCALL(118, sys_exit, 1) +#define __NR_exit_group 119 +__SYSCALL(119, sys_exit_group, 1) +#define __NR_getpid 120 +__SYSCALL(120, sys_getpid, 0) +#define __NR_wait4 121 +__SYSCALL(121, sys_wait4, 4) +#define __NR_waitid 122 +__SYSCALL(122, sys_waitid, 5) +#define __NR_kill 123 +__SYSCALL(123, sys_kill, 2) +#define __NR_tkill 124 +__SYSCALL(124, sys_tkill, 2) +#define __NR_tgkill 125 +__SYSCALL(125, sys_tgkill, 3) +#define __NR_set_tid_address 126 +__SYSCALL(126, sys_set_tid_address, 1) +#define __NR_gettid 127 +__SYSCALL(127, sys_gettid, 0) +#define __NR_setsid 128 +__SYSCALL(128, sys_setsid, 0) +#define __NR_getsid 129 +__SYSCALL(129, sys_getsid, 1) +#define __NR_prctl 130 +__SYSCALL(130, sys_prctl, 5) +#define __NR_personality 131 +__SYSCALL(131, sys_personality, 1) +#define __NR_getpriority 132 +__SYSCALL(132, sys_getpriority, 2) +#define __NR_setpriority 133 +__SYSCALL(133, sys_setpriority, 3) +#define __NR_setitimer 134 +__SYSCALL(134, sys_setitimer, 3) +#define __NR_getitimer 135 +__SYSCALL(135, sys_getitimer, 2) +#define __NR_setuid 136 +__SYSCALL(136, sys_setuid, 1) +#define __NR_getuid 137 +__SYSCALL(137, sys_getuid, 0) +#define __NR_setgid 138 +__SYSCALL(138, sys_setgid, 1) +#define __NR_getgid 139 +__SYSCALL(139, sys_getgid, 0) +#define __NR_geteuid 140 +__SYSCALL(140, sys_geteuid, 0) +#define __NR_getegid 141 +__SYSCALL(141, sys_getegid, 0) +#define __NR_setreuid 142 +__SYSCALL(142, sys_setreuid, 2) +#define __NR_setregid 143 +__SYSCALL(143, sys_setregid, 2) +#define __NR_setresuid 144 +__SYSCALL(144, sys_setresuid, 3) +#define __NR_getresuid 145 +__SYSCALL(145, sys_getresuid, 3) +#define __NR_setresgid 146 +__SYSCALL(146, sys_setresgid, 3) +#define __NR_getresgid 147 +__SYSCALL(147, sys_getresgid, 3) +#define __NR_setpgid 148 +__SYSCALL(148, sys_setpgid, 2) +#define __NR_getpgid 149 +__SYSCALL(149, sys_getpgid, 1) +#define __NR_getppid 150 +__SYSCALL(150, sys_getppid, 0) +#define __NR_getpgrp 151 +__SYSCALL(151, sys_getpgrp, 0) + +#define __NR_reserved152 152 /* set_thread_area */ +__SYSCALL(152, sys_ni_syscall, 0) +#define __NR_reserved153 153 /* get_thread_area */ +__SYSCALL(153, sys_ni_syscall, 0) +#define __NR_times 154 +__SYSCALL(154, sys_times, 1) +#define __NR_acct 155 +__SYSCALL(155, sys_acct, 1) +#define __NR_sched_setaffinity 156 +__SYSCALL(156, sys_sched_setaffinity, 3) +#define __NR_sched_getaffinity 157 +__SYSCALL(157, sys_sched_getaffinity, 3) +#define __NR_capget 158 +__SYSCALL(158, sys_capget, 2) +#define __NR_capset 159 +__SYSCALL(159, sys_capset, 2) +#define __NR_ptrace 160 +__SYSCALL(160, sys_ptrace, 4) +#define __NR_semtimedop 161 +__SYSCALL(161, sys_semtimedop, 5) +#define __NR_semget 162 +__SYSCALL(162, sys_semget, 4) +#define __NR_semop 163 +__SYSCALL(163, sys_semop, 4) +#define __NR_semctl 164 +__SYSCALL(164, sys_semctl, 4) +#define __NR_available165 165 +__SYSCALL(165, sys_ni_syscall, 0) +#define __NR_msgget 166 +__SYSCALL(166, sys_msgget, 4) +#define __NR_msgsnd 167 +__SYSCALL(167, sys_msgsnd, 4) +#define __NR_msgrcv 168 +__SYSCALL(168, sys_msgrcv, 4) +#define __NR_msgctl 169 +__SYSCALL(169, sys_msgctl, 4) +#define __NR_available170 170 +__SYSCALL(170, sys_ni_syscall, 0) + +/* File System */ + +#define __NR_umount2 171 +__SYSCALL(171, sys_umount, 2) +#define __NR_mount 172 +__SYSCALL(172, sys_mount, 5) +#define __NR_swapon 173 +__SYSCALL(173, sys_swapon, 2) +#define __NR_chroot 174 +__SYSCALL(174, sys_chroot, 1) +#define __NR_pivot_root 175 +__SYSCALL(175, sys_pivot_root, 2) +#define __NR_umount 176 +__SYSCALL(176, sys_umount, 2) +#define __NR_swapoff 177 +__SYSCALL(177, sys_swapoff, 1) +#define __NR_sync 178 +__SYSCALL(178, sys_sync, 0) +#define __NR_syncfs 179 +__SYSCALL(179, sys_syncfs, 1) +#define __NR_setfsuid 180 +__SYSCALL(180, sys_setfsuid, 1) +#define __NR_setfsgid 181 +__SYSCALL(181, sys_setfsgid, 1) +#define __NR_sysfs 182 +__SYSCALL(182, sys_sysfs, 3) +#define __NR_ustat 183 +__SYSCALL(183, sys_ustat, 2) +#define __NR_statfs 184 +__SYSCALL(184, sys_statfs, 2) +#define __NR_fstatfs 185 +__SYSCALL(185, sys_fstatfs, 2) +#define __NR_statfs64 186 +__SYSCALL(186, sys_statfs64, 3) +#define __NR_fstatfs64 187 +__SYSCALL(187, sys_fstatfs64, 3) + +/* System */ + +#define __NR_setrlimit 188 +__SYSCALL(188, sys_setrlimit, 2) +#define __NR_getrlimit 189 +__SYSCALL(189, sys_getrlimit, 2) +#define __NR_getrusage 190 +__SYSCALL(190, sys_getrusage, 2) +#define __NR_futex 191 +__SYSCALL(191, sys_futex, 5) +#define __NR_gettimeofday 192 +__SYSCALL(192, sys_gettimeofday, 2) +#define __NR_settimeofday 193 +__SYSCALL(193, sys_settimeofday, 2) +#define __NR_adjtimex 194 +__SYSCALL(194, sys_adjtimex, 1) +#define __NR_nanosleep 195 +__SYSCALL(195, sys_nanosleep, 2) +#define __NR_getgroups 196 +__SYSCALL(196, sys_getgroups, 2) +#define __NR_setgroups 197 +__SYSCALL(197, sys_setgroups, 2) +#define __NR_sethostname 198 +__SYSCALL(198, sys_sethostname, 2) +#define __NR_setdomainname 199 +__SYSCALL(199, sys_setdomainname, 2) +#define __NR_syslog 200 +__SYSCALL(200, sys_syslog, 3) +#define __NR_vhangup 201 +__SYSCALL(201, sys_vhangup, 0) +#define __NR_uselib 202 +__SYSCALL(202, sys_uselib, 1) +#define __NR_reboot 203 +__SYSCALL(203, sys_reboot, 3) +#define __NR_quotactl 204 +__SYSCALL(204, sys_quotactl, 4) +#define __NR_nfsservctl 205 +__SYSCALL(205, sys_ni_syscall, 0) /* old nfsservctl */ +#define __NR__sysctl 206 +__SYSCALL(206, sys_sysctl, 1) +#define __NR_bdflush 207 +__SYSCALL(207, sys_bdflush, 2) +#define __NR_uname 208 +__SYSCALL(208, sys_newuname, 1) +#define __NR_sysinfo 209 +__SYSCALL(209, sys_sysinfo, 1) +#define __NR_init_module 210 +__SYSCALL(210, sys_init_module, 2) +#define __NR_delete_module 211 +__SYSCALL(211, sys_delete_module, 1) + +#define __NR_sched_setparam 212 +__SYSCALL(212, sys_sched_setparam, 2) +#define __NR_sched_getparam 213 +__SYSCALL(213, sys_sched_getparam, 2) +#define __NR_sched_setscheduler 214 +__SYSCALL(214, sys_sched_setscheduler, 3) +#define __NR_sched_getscheduler 215 +__SYSCALL(215, sys_sched_getscheduler, 1) +#define __NR_sched_get_priority_max 216 +__SYSCALL(216, sys_sched_get_priority_max, 1) +#define __NR_sched_get_priority_min 217 +__SYSCALL(217, sys_sched_get_priority_min, 1) +#define __NR_sched_rr_get_interval 218 +__SYSCALL(218, sys_sched_rr_get_interval, 2) +#define __NR_sched_yield 219 +__SYSCALL(219, sys_sched_yield, 0) +#define __NR_available222 222 +__SYSCALL(222, sys_ni_syscall, 0) + +/* Signal Handling */ + +#define __NR_restart_syscall 223 +__SYSCALL(223, sys_restart_syscall, 0) +#define __NR_sigaltstack 224 +__SYSCALL(224, xtensa_sigaltstack, 2) +#define __NR_rt_sigreturn 225 +__SYSCALL(225, xtensa_rt_sigreturn, 1) +#define __NR_rt_sigaction 226 +__SYSCALL(226, sys_rt_sigaction, 4) +#define __NR_rt_sigprocmask 227 +__SYSCALL(227, sys_rt_sigprocmask, 4) +#define __NR_rt_sigpending 228 +__SYSCALL(228, sys_rt_sigpending, 2) +#define __NR_rt_sigtimedwait 229 +__SYSCALL(229, sys_rt_sigtimedwait, 4) +#define __NR_rt_sigqueueinfo 230 +__SYSCALL(230, sys_rt_sigqueueinfo, 3) +#define __NR_rt_sigsuspend 231 +__SYSCALL(231, sys_rt_sigsuspend, 2) + +/* Message */ + +#define __NR_mq_open 232 +__SYSCALL(232, sys_mq_open, 4) +#define __NR_mq_unlink 233 +__SYSCALL(233, sys_mq_unlink, 1) +#define __NR_mq_timedsend 234 +__SYSCALL(234, sys_mq_timedsend, 5) +#define __NR_mq_timedreceive 235 +__SYSCALL(235, sys_mq_timedreceive, 5) +#define __NR_mq_notify 236 +__SYSCALL(236, sys_mq_notify, 2) +#define __NR_mq_getsetattr 237 +__SYSCALL(237, sys_mq_getsetattr, 3) +#define __NR_available238 238 +__SYSCALL(238, sys_ni_syscall, 0) + +/* IO */ + +#define __NR_io_setup 239 +__SYSCALL(239, sys_io_setup, 2) +#define __NR_io_destroy 240 +__SYSCALL(240, sys_io_destroy, 1) +#define __NR_io_submit 241 +__SYSCALL(241, sys_io_submit, 3) +#define __NR_io_getevents 242 +__SYSCALL(242, sys_io_getevents, 5) +#define __NR_io_cancel 243 +__SYSCALL(243, sys_io_cancel, 3) +#define __NR_clock_settime 244 +__SYSCALL(244, sys_clock_settime, 2) +#define __NR_clock_gettime 245 +__SYSCALL(245, sys_clock_gettime, 2) +#define __NR_clock_getres 246 +__SYSCALL(246, sys_clock_getres, 2) +#define __NR_clock_nanosleep 247 +__SYSCALL(247, sys_clock_nanosleep, 4) + +/* Timer */ + +#define __NR_timer_create 248 +__SYSCALL(248, sys_timer_create, 3) +#define __NR_timer_delete 249 +__SYSCALL(249, sys_timer_delete, 1) +#define __NR_timer_settime 250 +__SYSCALL(250, sys_timer_settime, 4) +#define __NR_timer_gettime 251 +__SYSCALL(251, sys_timer_gettime, 2) +#define __NR_timer_getoverrun 252 +__SYSCALL(252, sys_timer_getoverrun, 1) + +/* System */ + +#define __NR_reserved253 253 +__SYSCALL(253, sys_ni_syscall, 0) +#define __NR_lookup_dcookie 254 +__SYSCALL(254, sys_lookup_dcookie, 4) +#define __NR_available255 255 +__SYSCALL(255, sys_ni_syscall, 0) +#define __NR_add_key 256 +__SYSCALL(256, sys_add_key, 5) +#define __NR_request_key 257 +__SYSCALL(257, sys_request_key, 5) +#define __NR_keyctl 258 +__SYSCALL(258, sys_keyctl, 5) +#define __NR_available259 259 +__SYSCALL(259, sys_ni_syscall, 0) + + +#define __NR_readahead 260 +__SYSCALL(260, sys_readahead, 5) +#define __NR_remap_file_pages 261 +__SYSCALL(261, sys_remap_file_pages, 5) +#define __NR_migrate_pages 262 +__SYSCALL(262, sys_migrate_pages, 0) +#define __NR_mbind 263 +__SYSCALL(263, sys_mbind, 6) +#define __NR_get_mempolicy 264 +__SYSCALL(264, sys_get_mempolicy, 5) +#define __NR_set_mempolicy 265 +__SYSCALL(265, sys_set_mempolicy, 3) +#define __NR_unshare 266 +__SYSCALL(266, sys_unshare, 1) +#define __NR_move_pages 267 +__SYSCALL(267, sys_move_pages, 0) +#define __NR_splice 268 +__SYSCALL(268, sys_splice, 0) +#define __NR_tee 269 +__SYSCALL(269, sys_tee, 0) +#define __NR_vmsplice 270 +__SYSCALL(270, sys_vmsplice, 0) +#define __NR_available271 271 +__SYSCALL(271, sys_ni_syscall, 0) + +#define __NR_pselect6 272 +__SYSCALL(272, sys_pselect6, 0) +#define __NR_ppoll 273 +__SYSCALL(273, sys_ppoll, 0) +#define __NR_epoll_pwait 274 +__SYSCALL(274, sys_epoll_pwait, 0) +#define __NR_epoll_create1 275 +__SYSCALL(275, sys_epoll_create1, 1) + +#define __NR_inotify_init 276 +__SYSCALL(276, sys_inotify_init, 0) +#define __NR_inotify_add_watch 277 +__SYSCALL(277, sys_inotify_add_watch, 3) +#define __NR_inotify_rm_watch 278 +__SYSCALL(278, sys_inotify_rm_watch, 2) +#define __NR_inotify_init1 279 +__SYSCALL(279, sys_inotify_init1, 1) + +#define __NR_getcpu 280 +__SYSCALL(280, sys_getcpu, 0) +#define __NR_kexec_load 281 +__SYSCALL(281, sys_ni_syscall, 0) + +#define __NR_ioprio_set 282 +__SYSCALL(282, sys_ioprio_set, 2) +#define __NR_ioprio_get 283 +__SYSCALL(283, sys_ioprio_get, 3) + +#define __NR_set_robust_list 284 +__SYSCALL(284, sys_set_robust_list, 3) +#define __NR_get_robust_list 285 +__SYSCALL(285, sys_get_robust_list, 3) +#define __NR_available286 286 +__SYSCALL(286, sys_ni_syscall, 0) +#define __NR_available287 287 +__SYSCALL(287, sys_ni_syscall, 0) + +/* Relative File Operations */ + +#define __NR_openat 288 +__SYSCALL(288, sys_openat, 4) +#define __NR_mkdirat 289 +__SYSCALL(289, sys_mkdirat, 3) +#define __NR_mknodat 290 +__SYSCALL(290, sys_mknodat, 4) +#define __NR_unlinkat 291 +__SYSCALL(291, sys_unlinkat, 3) +#define __NR_renameat 292 +__SYSCALL(292, sys_renameat, 4) +#define __NR_linkat 293 +__SYSCALL(293, sys_linkat, 5) +#define __NR_symlinkat 294 +__SYSCALL(294, sys_symlinkat, 3) +#define __NR_readlinkat 295 +__SYSCALL(295, sys_readlinkat, 4) +#define __NR_utimensat 296 +__SYSCALL(296, sys_utimensat, 0) +#define __NR_fchownat 297 +__SYSCALL(297, sys_fchownat, 5) +#define __NR_futimesat 298 +__SYSCALL(298, sys_futimesat, 4) +#define __NR_fstatat64 299 +__SYSCALL(299, sys_fstatat64, 0) +#define __NR_fchmodat 300 +__SYSCALL(300, sys_fchmodat, 4) +#define __NR_faccessat 301 +__SYSCALL(301, sys_faccessat, 4) +#define __NR_available302 302 +__SYSCALL(302, sys_ni_syscall, 0) +#define __NR_available303 303 +__SYSCALL(303, sys_ni_syscall, 0) + +#define __NR_signalfd 304 +__SYSCALL(304, sys_signalfd, 3) +/* 305 was __NR_timerfd */ +__SYSCALL(305, sys_ni_syscall, 0) +#define __NR_eventfd 306 +__SYSCALL(306, sys_eventfd, 1) +#define __NR_recvmmsg 307 +__SYSCALL(307, sys_recvmmsg, 5) + +#define __NR_setns 308 +__SYSCALL(308, sys_setns, 2) +#define __NR_signalfd4 309 +__SYSCALL(309, sys_signalfd4, 4) +#define __NR_dup3 310 +__SYSCALL(310, sys_dup3, 3) +#define __NR_pipe2 311 +__SYSCALL(311, sys_pipe2, 2) + +#define __NR_timerfd_create 312 +__SYSCALL(312, sys_timerfd_create, 2) +#define __NR_timerfd_settime 313 +__SYSCALL(313, sys_timerfd_settime, 4) +#define __NR_timerfd_gettime 314 +__SYSCALL(314, sys_timerfd_gettime, 2) +#define __NR_available315 315 +__SYSCALL(315, sys_ni_syscall, 0) + +#define __NR_eventfd2 316 +__SYSCALL(316, sys_eventfd2, 2) +#define __NR_preadv 317 +__SYSCALL(317, sys_preadv, 5) +#define __NR_pwritev 318 +__SYSCALL(318, sys_pwritev, 5) +#define __NR_available319 319 +__SYSCALL(319, sys_ni_syscall, 0) + +#define __NR_fanotify_init 320 +__SYSCALL(320, sys_fanotify_init, 2) +#define __NR_fanotify_mark 321 +__SYSCALL(321, sys_fanotify_mark, 6) +#define __NR_process_vm_readv 322 +__SYSCALL(322, sys_process_vm_readv, 6) +#define __NR_process_vm_writev 323 +__SYSCALL(323, sys_process_vm_writev, 6) + +#define __NR_name_to_handle_at 324 +__SYSCALL(324, sys_name_to_handle_at, 5) +#define __NR_open_by_handle_at 325 +__SYSCALL(325, sys_open_by_handle_at, 3) +#define __NR_sync_file_range 326 +__SYSCALL(326, sys_sync_file_range2, 6) +#define __NR_perf_event_open 327 +__SYSCALL(327, sys_perf_event_open, 5) + +#define __NR_rt_tgsigqueueinfo 328 +__SYSCALL(328, sys_rt_tgsigqueueinfo, 4) +#define __NR_clock_adjtime 329 +__SYSCALL(329, sys_clock_adjtime, 2) +#define __NR_prlimit64 330 +__SYSCALL(330, sys_prlimit64, 4) +#define __NR_kcmp 331 +__SYSCALL(331, sys_kcmp, 5) + + +#define __NR_syscall_count 332 + +/* + * sysxtensa syscall handler + * + * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused); + * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused); + * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused); + * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval); + * a2 a6 a3 a4 a5 + */ + +#define SYS_XTENSA_RESERVED 0 /* don't use this */ +#define SYS_XTENSA_ATOMIC_SET 1 /* set variable */ +#define SYS_XTENSA_ATOMIC_EXG_ADD 2 /* exchange memory and add */ +#define SYS_XTENSA_ATOMIC_ADD 3 /* add to memory */ +#define SYS_XTENSA_ATOMIC_CMP_SWP 4 /* compare and swap */ + +#define SYS_XTENSA_COUNT 5 /* count */ + +#endif /* _UAPI_XTENSA_UNISTD_H */ diff --git a/arch/xtensa/kernel/align.S b/arch/xtensa/kernel/align.S index 33d6e9d2e83c..934ae58e2c79 100644 --- a/arch/xtensa/kernel/align.S +++ b/arch/xtensa/kernel/align.S @@ -170,15 +170,15 @@ ENTRY(fast_unaligned) s32i a7, a2, PT_AREG7 s32i a8, a2, PT_AREG8 - rsr a0, DEPC - xsr a3, EXCSAVE_1 + rsr a0, depc + xsr a3, excsave1 s32i a0, a2, PT_AREG2 s32i a3, a2, PT_AREG3 /* Keep value of SAR in a0 */ - rsr a0, SAR - rsr a8, EXCVADDR # load unaligned memory address + rsr a0, sar + rsr a8, excvaddr # load unaligned memory address /* Now, identify one of the following load/store instructions. * @@ -197,7 +197,7 @@ ENTRY(fast_unaligned) /* Extract the instruction that caused the unaligned access. */ - rsr a7, EPC_1 # load exception address + rsr a7, epc1 # load exception address movi a3, ~3 and a3, a3, a7 # mask lower bits @@ -275,16 +275,16 @@ ENTRY(fast_unaligned) 1: #if XCHAL_HAVE_LOOPS - rsr a5, LEND # check if we reached LEND + rsr a5, lend # check if we reached LEND bne a7, a5, 1f - rsr a5, LCOUNT # and LCOUNT != 0 + rsr a5, lcount # and LCOUNT != 0 beqz a5, 1f addi a5, a5, -1 # decrement LCOUNT and set - rsr a7, LBEG # set PC to LBEGIN - wsr a5, LCOUNT + rsr a7, lbeg # set PC to LBEGIN + wsr a5, lcount #endif -1: wsr a7, EPC_1 # skip load instruction +1: wsr a7, epc1 # skip load instruction extui a4, a4, INSN_T, 4 # extract target register movi a5, .Lload_table addx8 a4, a4, a5 @@ -355,16 +355,16 @@ ENTRY(fast_unaligned) 1: #if XCHAL_HAVE_LOOPS - rsr a4, LEND # check if we reached LEND + rsr a4, lend # check if we reached LEND bne a7, a4, 1f - rsr a4, LCOUNT # and LCOUNT != 0 + rsr a4, lcount # and LCOUNT != 0 beqz a4, 1f addi a4, a4, -1 # decrement LCOUNT and set - rsr a7, LBEG # set PC to LBEGIN - wsr a4, LCOUNT + rsr a7, lbeg # set PC to LBEGIN + wsr a4, lcount #endif -1: wsr a7, EPC_1 # skip store instruction +1: wsr a7, epc1 # skip store instruction movi a4, ~3 and a4, a4, a8 # align memory address @@ -406,7 +406,7 @@ ENTRY(fast_unaligned) .Lexit: movi a4, 0 - rsr a3, EXCSAVE_1 + rsr a3, excsave1 s32i a4, a3, EXC_TABLE_FIXUP /* Restore working register */ @@ -420,7 +420,7 @@ ENTRY(fast_unaligned) /* restore SAR and return */ - wsr a0, SAR + wsr a0, sar l32i a0, a2, PT_AREG0 l32i a2, a2, PT_AREG2 rfe @@ -438,10 +438,10 @@ ENTRY(fast_unaligned) l32i a6, a2, PT_AREG6 l32i a5, a2, PT_AREG5 l32i a4, a2, PT_AREG4 - wsr a0, SAR + wsr a0, sar mov a1, a2 - rsr a0, PS + rsr a0, ps bbsi.l a2, PS_UM_BIT, 1f # jump if user mode movi a0, _kernel_exception diff --git a/arch/xtensa/kernel/coprocessor.S b/arch/xtensa/kernel/coprocessor.S index 2bc1e145c0a4..54c3be313bfa 100644 --- a/arch/xtensa/kernel/coprocessor.S +++ b/arch/xtensa/kernel/coprocessor.S @@ -43,7 +43,7 @@ /* IO protection is currently unsupported. */ ENTRY(fast_io_protect) - wsr a0, EXCSAVE_1 + wsr a0, excsave1 movi a0, unrecoverable_exception callx0 a0 @@ -220,7 +220,7 @@ ENTRY(coprocessor_restore) */ ENTRY(fast_coprocessor_double) - wsr a0, EXCSAVE_1 + wsr a0, excsave1 movi a0, unrecoverable_exception callx0 a0 @@ -229,13 +229,13 @@ ENTRY(fast_coprocessor) /* Save remaining registers a1-a3 and SAR */ - xsr a3, EXCSAVE_1 + xsr a3, excsave1 s32i a3, a2, PT_AREG3 - rsr a3, SAR + rsr a3, sar s32i a1, a2, PT_AREG1 s32i a3, a2, PT_SAR mov a1, a2 - rsr a2, DEPC + rsr a2, depc s32i a2, a1, PT_AREG2 /* @@ -248,17 +248,17 @@ ENTRY(fast_coprocessor) /* Find coprocessor number. Subtract first CP EXCCAUSE from EXCCAUSE */ - rsr a3, EXCCAUSE + rsr a3, exccause addi a3, a3, -EXCCAUSE_COPROCESSOR0_DISABLED /* Set corresponding CPENABLE bit -> (sar:cp-index, a3: 1<<cp-index)*/ ssl a3 # SAR: 32 - coprocessor_number movi a2, 1 - rsr a0, CPENABLE + rsr a0, cpenable sll a2, a2 or a0, a0, a2 - wsr a0, CPENABLE + wsr a0, cpenable rsync /* Retrieve previous owner. (a3 still holds CP number) */ @@ -291,7 +291,7 @@ ENTRY(fast_coprocessor) /* Note that only a0 and a1 were preserved. */ -2: rsr a3, EXCCAUSE +2: rsr a3, exccause addi a3, a3, -EXCCAUSE_COPROCESSOR0_DISABLED movi a0, coprocessor_owner addx4 a0, a3, a0 @@ -321,7 +321,7 @@ ENTRY(fast_coprocessor) l32i a0, a1, PT_SAR l32i a3, a1, PT_AREG3 l32i a2, a1, PT_AREG2 - wsr a0, SAR + wsr a0, sar l32i a0, a1, PT_AREG0 l32i a1, a1, PT_AREG1 diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 7e6236073397..18453067c258 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -112,8 +112,8 @@ ENTRY(user_exception) /* Save a2, a3, and depc, restore excsave_1 and set SP. */ - xsr a3, EXCSAVE_1 - rsr a0, DEPC + xsr a3, excsave1 + rsr a0, depc s32i a1, a2, PT_AREG1 s32i a0, a2, PT_AREG2 s32i a3, a2, PT_AREG3 @@ -125,16 +125,16 @@ _user_exception: /* Save SAR and turn off single stepping */ movi a2, 0 - rsr a3, SAR - xsr a2, ICOUNTLEVEL + rsr a3, sar + xsr a2, icountlevel s32i a3, a1, PT_SAR s32i a2, a1, PT_ICOUNTLEVEL /* Rotate ws so that the current windowbase is at bit0. */ /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ - rsr a2, WINDOWBASE - rsr a3, WINDOWSTART + rsr a2, windowbase + rsr a3, windowstart ssr a2 s32i a2, a1, PT_WINDOWBASE s32i a3, a1, PT_WINDOWSTART @@ -205,12 +205,12 @@ _user_exception: /* WINDOWBASE still in SAR! */ - rsr a2, SAR # original WINDOWBASE + rsr a2, sar # original WINDOWBASE movi a3, 1 ssl a2 sll a3, a3 - wsr a3, WINDOWSTART # set corresponding WINDOWSTART bit - wsr a2, WINDOWBASE # and WINDOWSTART + wsr a3, windowstart # set corresponding WINDOWSTART bit + wsr a2, windowbase # and WINDOWSTART rsync /* We are back to the original stack pointer (a1) */ @@ -252,8 +252,8 @@ ENTRY(kernel_exception) /* Save a0, a2, a3, DEPC and set SP. */ - xsr a3, EXCSAVE_1 # restore a3, excsave_1 - rsr a0, DEPC # get a2 + xsr a3, excsave1 # restore a3, excsave_1 + rsr a0, depc # get a2 s32i a1, a2, PT_AREG1 s32i a0, a2, PT_AREG2 s32i a3, a2, PT_AREG3 @@ -265,16 +265,16 @@ _kernel_exception: /* Save SAR and turn off single stepping */ movi a2, 0 - rsr a3, SAR - xsr a2, ICOUNTLEVEL + rsr a3, sar + xsr a2, icountlevel s32i a3, a1, PT_SAR s32i a2, a1, PT_ICOUNTLEVEL /* Rotate ws so that the current windowbase is at bit0. */ /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ - rsr a2, WINDOWBASE # don't need to save these, we only - rsr a3, WINDOWSTART # need shifted windowstart: windowmask + rsr a2, windowbase # don't need to save these, we only + rsr a3, windowstart # need shifted windowstart: windowmask ssr a2 slli a2, a3, 32-WSBITS src a2, a3, a2 @@ -323,24 +323,24 @@ common_exception: /* Save some registers, disable loops and clear the syscall flag. */ - rsr a2, DEBUGCAUSE - rsr a3, EPC_1 + rsr a2, debugcause + rsr a3, epc1 s32i a2, a1, PT_DEBUGCAUSE s32i a3, a1, PT_PC movi a2, -1 - rsr a3, EXCVADDR + rsr a3, excvaddr s32i a2, a1, PT_SYSCALL movi a2, 0 s32i a3, a1, PT_EXCVADDR - xsr a2, LCOUNT + xsr a2, lcount s32i a2, a1, PT_LCOUNT /* It is now save to restore the EXC_TABLE_FIXUP variable. */ - rsr a0, EXCCAUSE + rsr a0, exccause movi a3, 0 - rsr a2, EXCSAVE_1 + rsr a2, excsave1 s32i a0, a1, PT_EXCCAUSE s32i a3, a2, EXC_TABLE_FIXUP @@ -352,22 +352,22 @@ common_exception: * (interrupts disabled) and if this exception is not an interrupt. */ - rsr a3, PS + rsr a3, ps addi a0, a0, -4 movi a2, 1 extui a3, a3, 0, 1 # a3 = PS.INTLEVEL[0] moveqz a3, a2, a0 # a3 = 1 iff interrupt exception movi a2, 1 << PS_WOE_BIT or a3, a3, a2 - rsr a0, EXCCAUSE - xsr a3, PS + rsr a0, exccause + xsr a3, ps s32i a3, a1, PT_PS # save ps - /* Save LBEG, LEND */ + /* Save lbeg, lend */ - rsr a2, LBEG - rsr a3, LEND + rsr a2, lbeg + rsr a3, lend s32i a2, a1, PT_LBEG s32i a3, a1, PT_LEND @@ -432,7 +432,7 @@ common_exception_return: load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT - wsr a3, PS /* disable interrupts */ + wsr a3, ps /* disable interrupts */ _bbci.l a3, PS_UM_BIT, kernel_exception_exit @@ -444,12 +444,12 @@ user_exception_exit: l32i a2, a1, PT_WINDOWBASE l32i a3, a1, PT_WINDOWSTART - wsr a1, DEPC # use DEPC as temp storage - wsr a3, WINDOWSTART # restore WINDOWSTART + wsr a1, depc # use DEPC as temp storage + wsr a3, windowstart # restore WINDOWSTART ssr a2 # preserve user's WB in the SAR - wsr a2, WINDOWBASE # switch to user's saved WB + wsr a2, windowbase # switch to user's saved WB rsync - rsr a1, DEPC # restore stack pointer + rsr a1, depc # restore stack pointer l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9) rotw -1 # we restore a4..a7 _bltui a6, 16, 1f # only have to restore current window? @@ -475,8 +475,8 @@ user_exception_exit: /* Clear unrestored registers (don't leak anything to user-land */ -1: rsr a0, WINDOWBASE - rsr a3, SAR +1: rsr a0, windowbase + rsr a3, sar sub a3, a0, a3 beqz a3, 2f extui a3, a3, 0, WBBITS @@ -556,7 +556,7 @@ kernel_exception_exit: /* Test WINDOWSTART now. If spilled, do the movsp */ - rsr a3, WINDOWSTART + rsr a3, windowstart addi a0, a3, -1 and a3, a3, a0 _bnez a3, common_exception_exit @@ -604,24 +604,24 @@ common_exception_exit: 1: l32i a2, a1, PT_PC l32i a3, a1, PT_SAR - wsr a2, EPC_1 - wsr a3, SAR + wsr a2, epc1 + wsr a3, sar /* Restore LBEG, LEND, LCOUNT */ l32i a2, a1, PT_LBEG l32i a3, a1, PT_LEND - wsr a2, LBEG + wsr a2, lbeg l32i a2, a1, PT_LCOUNT - wsr a3, LEND - wsr a2, LCOUNT + wsr a3, lend + wsr a2, lcount /* We control single stepping through the ICOUNTLEVEL register. */ l32i a2, a1, PT_ICOUNTLEVEL movi a3, -2 - wsr a2, ICOUNTLEVEL - wsr a3, ICOUNT + wsr a2, icountlevel + wsr a3, icount /* Check if it was double exception. */ @@ -636,7 +636,7 @@ common_exception_exit: l32i a1, a1, PT_AREG1 rfe -1: wsr a0, DEPC +1: wsr a0, depc l32i a0, a1, PT_AREG0 l32i a1, a1, PT_AREG1 rfde @@ -651,25 +651,25 @@ common_exception_exit: ENTRY(debug_exception) - rsr a0, EPS + XCHAL_DEBUGLEVEL + rsr a0, SREG_EPS + XCHAL_DEBUGLEVEL bbsi.l a0, PS_EXCM_BIT, 1f # exception mode - /* Set EPC_1 and EXCCAUSE */ + /* Set EPC1 and EXCCAUSE */ - wsr a2, DEPC # save a2 temporarily - rsr a2, EPC + XCHAL_DEBUGLEVEL - wsr a2, EPC_1 + wsr a2, depc # save a2 temporarily + rsr a2, SREG_EPC + XCHAL_DEBUGLEVEL + wsr a2, epc1 movi a2, EXCCAUSE_MAPPED_DEBUG - wsr a2, EXCCAUSE + wsr a2, exccause /* Restore PS to the value before the debug exc but with PS.EXCM set.*/ movi a2, 1 << PS_EXCM_BIT or a2, a0, a2 movi a0, debug_exception # restore a3, debug jump vector - wsr a2, PS - xsr a0, EXCSAVE + XCHAL_DEBUGLEVEL + wsr a2, ps + xsr a0, SREG_EXCSAVE + XCHAL_DEBUGLEVEL /* Switch to kernel/user stack, restore jump vector, and save a0 */ @@ -680,19 +680,19 @@ ENTRY(debug_exception) movi a0, 0 s32i a1, a2, PT_AREG1 s32i a0, a2, PT_DEPC # mark it as a regular exception - xsr a0, DEPC + xsr a0, depc s32i a3, a2, PT_AREG3 s32i a0, a2, PT_AREG2 mov a1, a2 j _kernel_exception -2: rsr a2, EXCSAVE_1 +2: rsr a2, excsave1 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer s32i a0, a2, PT_AREG0 movi a0, 0 s32i a1, a2, PT_AREG1 s32i a0, a2, PT_DEPC - xsr a0, DEPC + xsr a0, depc s32i a3, a2, PT_AREG3 s32i a0, a2, PT_AREG2 mov a1, a2 @@ -732,12 +732,12 @@ ENTRY(unrecoverable_exception) movi a0, 1 movi a1, 0 - wsr a0, WINDOWSTART - wsr a1, WINDOWBASE + wsr a0, windowstart + wsr a1, windowbase rsync movi a1, (1 << PS_WOE_BIT) | 1 - wsr a1, PS + wsr a1, ps rsync movi a1, init_task @@ -793,7 +793,7 @@ ENTRY(fast_alloca) l32i a0, a2, PT_DEPC _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double - rsr a0, DEPC # get a2 + rsr a0, depc # get a2 s32i a4, a2, PT_AREG4 # save a4 and s32i a0, a2, PT_AREG2 # a2 to stack @@ -804,8 +804,8 @@ ENTRY(fast_alloca) /* Restore a3, excsave_1 */ - xsr a3, EXCSAVE_1 # make sure excsave_1 is valid for dbl. - rsr a4, EPC_1 # get exception address + xsr a3, excsave1 # make sure excsave_1 is valid for dbl. + rsr a4, epc1 # get exception address s32i a3, a2, PT_AREG3 # save a3 to stack #ifdef ALLOCA_EXCEPTION_IN_IRAM @@ -820,7 +820,7 @@ ENTRY(fast_alloca) jx a3 .Lunhandled_double: - wsr a0, EXCSAVE_1 + wsr a0, excsave1 movi a0, unrecoverable_exception callx0 a0 @@ -852,7 +852,7 @@ ENTRY(fast_alloca) #endif addi a4, a4, 3 # step over movsp _EXTUI_MOVSP_DST(a0) # extract destination register - wsr a4, EPC_1 # save new epc_1 + wsr a4, epc1 # save new epc_1 _bnei a0, 1, 1f # no 'movsp a1, ax': jump @@ -953,14 +953,14 @@ ENTRY(fast_syscall_kernel) /* Skip syscall. */ - rsr a0, EPC_1 + rsr a0, epc1 addi a0, a0, 3 - wsr a0, EPC_1 + wsr a0, epc1 l32i a0, a2, PT_DEPC bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable - rsr a0, DEPC # get syscall-nr + rsr a0, depc # get syscall-nr _beqz a0, fast_syscall_spill_registers _beqi a0, __NR_xtensa, fast_syscall_xtensa @@ -970,14 +970,14 @@ ENTRY(fast_syscall_user) /* Skip syscall. */ - rsr a0, EPC_1 + rsr a0, epc1 addi a0, a0, 3 - wsr a0, EPC_1 + wsr a0, epc1 l32i a0, a2, PT_DEPC bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable - rsr a0, DEPC # get syscall-nr + rsr a0, depc # get syscall-nr _beqz a0, fast_syscall_spill_registers _beqi a0, __NR_xtensa, fast_syscall_xtensa @@ -988,10 +988,10 @@ ENTRY(fast_syscall_unrecoverable) /* Restore all states. */ l32i a0, a2, PT_AREG0 # restore a0 - xsr a2, DEPC # restore a2, depc - rsr a3, EXCSAVE_1 + xsr a2, depc # restore a2, depc + rsr a3, excsave1 - wsr a0, EXCSAVE_1 + wsr a0, excsave1 movi a0, unrecoverable_exception callx0 a0 @@ -1047,7 +1047,7 @@ ENTRY(fast_syscall_unrecoverable) ENTRY(fast_syscall_xtensa) - xsr a3, EXCSAVE_1 # restore a3, excsave1 + xsr a3, excsave1 # restore a3, excsave1 s32i a7, a2, PT_AREG7 # we need an additional register movi a7, 4 # sizeof(unsigned int) @@ -1124,13 +1124,13 @@ ENTRY(fast_syscall_spill_registers) movi a0, fast_syscall_spill_registers_fixup s32i a0, a3, EXC_TABLE_FIXUP - rsr a0, WINDOWBASE + rsr a0, windowbase s32i a0, a3, EXC_TABLE_PARAM /* Save a3 and SAR on stack. */ - rsr a0, SAR - xsr a3, EXCSAVE_1 # restore a3 and excsave_1 + rsr a0, sar + xsr a3, excsave1 # restore a3 and excsave_1 s32i a3, a2, PT_AREG3 s32i a4, a2, PT_AREG4 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5 @@ -1148,7 +1148,7 @@ ENTRY(fast_syscall_spill_registers) l32i a3, a2, PT_AREG5 l32i a4, a2, PT_AREG4 l32i a0, a2, PT_AREG0 - wsr a3, SAR + wsr a3, sar l32i a3, a2, PT_AREG3 /* Restore clobbered registers. */ @@ -1173,8 +1173,8 @@ ENTRY(fast_syscall_spill_registers) fast_syscall_spill_registers_fixup: - rsr a2, WINDOWBASE # get current windowbase (a2 is saved) - xsr a0, DEPC # restore depc and a0 + rsr a2, windowbase # get current windowbase (a2 is saved) + xsr a0, depc # restore depc and a0 ssl a2 # set shift (32 - WB) /* We need to make sure the current registers (a0-a3) are preserved. @@ -1182,12 +1182,12 @@ fast_syscall_spill_registers_fixup: * in WS, so that the exception handlers save them to the task stack. */ - rsr a3, EXCSAVE_1 # get spill-mask + rsr a3, excsave1 # get spill-mask slli a2, a3, 1 # shift left by one slli a3, a2, 32-WSBITS src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy...... - wsr a2, WINDOWSTART # set corrected windowstart + wsr a2, windowstart # set corrected windowstart movi a3, exc_table l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2 @@ -1201,7 +1201,7 @@ fast_syscall_spill_registers_fixup: * excsave_1: a3 */ - wsr a3, WINDOWBASE + wsr a3, windowbase rsync /* We are now in the original frame when we entered _spill_registers: @@ -1227,7 +1227,7 @@ fast_syscall_spill_registers_fixup: /* Jump to the exception handler. */ movi a3, exc_table - rsr a0, EXCCAUSE + rsr a0, exccause addx4 a0, a0, a3 # find entry in table l32i a0, a0, EXC_TABLE_FAST_USER # load handler jx a0 @@ -1236,28 +1236,28 @@ fast_syscall_spill_registers_fixup_return: /* When we return here, all registers have been restored (a2: DEPC) */ - wsr a2, DEPC # exception address + wsr a2, depc # exception address /* Restore fixup handler. */ - xsr a3, EXCSAVE_1 + xsr a3, excsave1 movi a2, fast_syscall_spill_registers_fixup s32i a2, a3, EXC_TABLE_FIXUP - rsr a2, WINDOWBASE + rsr a2, windowbase s32i a2, a3, EXC_TABLE_PARAM l32i a2, a3, EXC_TABLE_KSTK /* Load WB at the time the exception occurred. */ - rsr a3, SAR # WB is still in SAR + rsr a3, sar # WB is still in SAR neg a3, a3 - wsr a3, WINDOWBASE + wsr a3, windowbase rsync /* Restore a3 and return. */ movi a3, exc_table - xsr a3, EXCSAVE_1 + xsr a3, excsave1 rfde @@ -1283,8 +1283,8 @@ ENTRY(_spill_registers) * Rotate ws right so that a4 = yyxxxwww1. */ - rsr a4, WINDOWBASE - rsr a3, WINDOWSTART # a3 = xxxwww1yy + rsr a4, windowbase + rsr a3, windowstart # a3 = xxxwww1yy ssr a4 # holds WB slli a4, a3, WSBITS or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy @@ -1302,7 +1302,7 @@ ENTRY(_spill_registers) /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */ - wsr a3, WINDOWSTART # save shifted windowstart + wsr a3, windowstart # save shifted windowstart neg a4, a3 and a3, a4, a3 # first bit set from right: 000010000 @@ -1311,12 +1311,12 @@ ENTRY(_spill_registers) sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right ssr a4 # save in SAR for later. - rsr a3, WINDOWBASE + rsr a3, windowbase add a3, a3, a4 - wsr a3, WINDOWBASE + wsr a3, windowbase rsync - rsr a3, WINDOWSTART + rsr a3, windowstart srl a3, a3 # shift windowstart /* WB is now just one frame below the oldest frame in the register @@ -1364,11 +1364,11 @@ ENTRY(_spill_registers) .Lexit: /* Done. Do the final rotation, set WS, and return. */ rotw 1 - rsr a3, WINDOWBASE + rsr a3, windowbase ssl a3 movi a3, 1 sll a3, a3 - wsr a3, WINDOWSTART + wsr a3, windowstart ret .Lc4: s32e a4, a9, -16 @@ -1429,7 +1429,7 @@ ENTRY(_spill_registers) * however, this condition is unrecoverable in kernel space. */ - rsr a0, PS + rsr a0, ps _bbci.l a0, PS_UM_BIT, 1f /* User space: Setup a dummy frame and kill application. @@ -1439,18 +1439,18 @@ ENTRY(_spill_registers) movi a0, 1 movi a1, 0 - wsr a0, WINDOWSTART - wsr a1, WINDOWBASE + wsr a0, windowstart + wsr a1, windowbase rsync movi a0, 0 movi a3, exc_table l32i a1, a3, EXC_TABLE_KSTK - wsr a3, EXCSAVE_1 + wsr a3, excsave1 movi a4, (1 << PS_WOE_BIT) | 1 - wsr a4, PS + wsr a4, ps rsync movi a6, SIGSEGV @@ -1459,7 +1459,7 @@ ENTRY(_spill_registers) 1: /* Kernel space: PANIC! */ - wsr a0, EXCSAVE_1 + wsr a0, excsave1 movi a0, unrecoverable_exception callx0 a0 # should not return 1: j 1b @@ -1524,7 +1524,7 @@ ENTRY(fast_second_level_miss) /* We deliberately destroy a3 that holds the exception table. */ -8: rsr a3, EXCVADDR # fault address +8: rsr a3, excvaddr # fault address _PGD_OFFSET(a0, a3, a1) l32i a0, a0, 0 # read pmdval beqz a0, 2f @@ -1542,7 +1542,7 @@ ENTRY(fast_second_level_miss) * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY */ - movi a1, -PAGE_OFFSET + movi a1, (-PAGE_OFFSET) & 0xffffffff add a0, a0, a1 # pmdval - PAGE_OFFSET extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK xor a0, a0, a1 @@ -1561,7 +1561,7 @@ ENTRY(fast_second_level_miss) */ extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3 - rsr a1, PTEVADDR + rsr a1, ptevaddr addx2 a3, a3, a3 # -> 0,3,6,9 srli a1, a1, PAGE_SHIFT extui a3, a3, 2, 2 # -> 0,0,1,2 @@ -1583,18 +1583,18 @@ ENTRY(fast_second_level_miss) l32i a0, a2, PT_AREG0 l32i a1, a2, PT_AREG1 l32i a2, a2, PT_DEPC - xsr a3, EXCSAVE_1 + xsr a3, excsave1 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f /* Restore excsave1 and return. */ - rsr a2, DEPC + rsr a2, depc rfe /* Return from double exception. */ -1: xsr a2, DEPC +1: xsr a2, depc esync rfde @@ -1618,7 +1618,7 @@ ENTRY(fast_second_level_miss) /* Make sure the exception originated in the special functions */ movi a0, __tlbtemp_mapping_start - rsr a3, EPC_1 + rsr a3, epc1 bltu a3, a0, 2f movi a0, __tlbtemp_mapping_end bgeu a3, a0, 2f @@ -1626,7 +1626,7 @@ ENTRY(fast_second_level_miss) /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */ movi a3, TLBTEMP_BASE_1 - rsr a0, EXCVADDR + rsr a0, excvaddr bltu a0, a3, 2f addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT)) @@ -1635,7 +1635,7 @@ ENTRY(fast_second_level_miss) /* Check if we have to restore an ITLB mapping. */ movi a1, __tlbtemp_mapping_itlb - rsr a3, EPC_1 + rsr a3, epc1 sub a3, a3, a1 /* Calculate VPN */ @@ -1671,13 +1671,13 @@ ENTRY(fast_second_level_miss) 2: /* Invalid PGD, default exception handling */ movi a3, exc_table - rsr a1, DEPC - xsr a3, EXCSAVE_1 + rsr a1, depc + xsr a3, excsave1 s32i a1, a2, PT_AREG2 s32i a3, a2, PT_AREG3 mov a1, a2 - rsr a2, PS + rsr a2, ps bbsi.l a2, PS_UM_BIT, 1f j _kernel_exception 1: j _user_exception @@ -1712,7 +1712,7 @@ ENTRY(fast_store_prohibited) l32i a0, a1, TASK_MM # tsk->mm beqz a0, 9f -8: rsr a1, EXCVADDR # fault address +8: rsr a1, excvaddr # fault address _PGD_OFFSET(a0, a1, a4) l32i a0, a0, 0 beqz a0, 2f @@ -1725,7 +1725,7 @@ ENTRY(fast_store_prohibited) movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE or a4, a4, a1 - rsr a1, EXCVADDR + rsr a1, excvaddr s32i a4, a0, 0 /* We need to flush the cache if we have page coloring. */ @@ -1749,15 +1749,15 @@ ENTRY(fast_store_prohibited) /* Restore excsave1 and a3. */ - xsr a3, EXCSAVE_1 + xsr a3, excsave1 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f - rsr a2, DEPC + rsr a2, depc rfe /* Double exception. Restore FIXUP handler and return. */ -1: xsr a2, DEPC +1: xsr a2, depc esync rfde @@ -1766,14 +1766,14 @@ ENTRY(fast_store_prohibited) 2: /* If there was a problem, handle fault in C */ - rsr a4, DEPC # still holds a2 - xsr a3, EXCSAVE_1 + rsr a4, depc # still holds a2 + xsr a3, excsave1 s32i a4, a2, PT_AREG2 s32i a3, a2, PT_AREG3 l32i a4, a2, PT_AREG4 mov a1, a2 - rsr a2, PS + rsr a2, ps bbsi.l a2, PS_UM_BIT, 1f j _kernel_exception 1: j _user_exception @@ -1901,8 +1901,8 @@ ENTRY(_switch_to) /* Disable ints while we manipulate the stack pointer. */ movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL - xsr a14, PS - rsr a3, EXCSAVE_1 + xsr a14, ps + rsr a3, excsave1 rsync s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */ @@ -1910,7 +1910,7 @@ ENTRY(_switch_to) #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) l32i a3, a5, THREAD_CPENABLE - xsr a3, CPENABLE + xsr a3, cpenable s32i a3, a4, THREAD_CPENABLE #endif @@ -1924,7 +1924,7 @@ ENTRY(_switch_to) * we return from kernel space. */ - rsr a3, EXCSAVE_1 # exc_table + rsr a3, excsave1 # exc_table movi a6, 0 addi a7, a5, PT_REGS_OFFSET s32i a6, a3, EXC_TABLE_FIXUP @@ -1937,7 +1937,7 @@ ENTRY(_switch_to) load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER - wsr a14, PS + wsr a14, ps mov a2, a12 # return 'prev' rsync diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S index 3ef91a73652d..bdc50788f35e 100644 --- a/arch/xtensa/kernel/head.S +++ b/arch/xtensa/kernel/head.S @@ -61,18 +61,18 @@ _startup: /* Disable interrupts and exceptions. */ movi a0, LOCKLEVEL - wsr a0, PS + wsr a0, ps /* Preserve the pointer to the boot parameter list in EXCSAVE_1 */ - wsr a2, EXCSAVE_1 + wsr a2, excsave1 /* Start with a fresh windowbase and windowstart. */ movi a1, 1 movi a0, 0 - wsr a1, WINDOWSTART - wsr a0, WINDOWBASE + wsr a1, windowstart + wsr a0, windowbase rsync /* Set a0 to 0 for the remaining initialization. */ @@ -82,46 +82,46 @@ _startup: /* Clear debugging registers. */ #if XCHAL_HAVE_DEBUG - wsr a0, IBREAKENABLE - wsr a0, ICOUNT + wsr a0, ibreakenable + wsr a0, icount movi a1, 15 - wsr a0, ICOUNTLEVEL + wsr a0, icountlevel .set _index, 0 .rept XCHAL_NUM_DBREAK - 1 - wsr a0, DBREAKC + _index + wsr a0, SREG_DBREAKC + _index .set _index, _index + 1 .endr #endif /* Clear CCOUNT (not really necessary, but nice) */ - wsr a0, CCOUNT # not really necessary, but nice + wsr a0, ccount # not really necessary, but nice /* Disable zero-loops. */ #if XCHAL_HAVE_LOOPS - wsr a0, LCOUNT + wsr a0, lcount #endif /* Disable all timers. */ .set _index, 0 .rept XCHAL_NUM_TIMERS - 1 - wsr a0, CCOMPARE + _index + wsr a0, SREG_CCOMPARE + _index .set _index, _index + 1 .endr /* Interrupt initialization. */ movi a2, XCHAL_INTTYPE_MASK_SOFTWARE | XCHAL_INTTYPE_MASK_EXTERN_EDGE - wsr a0, INTENABLE - wsr a2, INTCLEAR + wsr a0, intenable + wsr a2, intclear /* Disable coprocessors. */ #if XCHAL_CP_NUM > 0 - wsr a0, CPENABLE + wsr a0, cpenable #endif /* Set PS.INTLEVEL=1, PS.WOE=0, kernel stack, PS.EXCM=0 @@ -132,7 +132,7 @@ _startup: */ movi a1, 1 - wsr a1, PS + wsr a1, ps rsync /* Initialize the caches. @@ -206,18 +206,18 @@ _startup: addi a1, a1, KERNEL_STACK_SIZE movi a2, 0x00040001 # WOE=1, INTLEVEL=1, UM=0 - wsr a2, PS # (enable reg-windows; progmode stack) + wsr a2, ps # (enable reg-windows; progmode stack) rsync /* Set up EXCSAVE[DEBUGLEVEL] to point to the Debug Exception Handler.*/ movi a2, debug_exception - wsr a2, EXCSAVE + XCHAL_DEBUGLEVEL + wsr a2, SREG_EXCSAVE + XCHAL_DEBUGLEVEL /* Set up EXCSAVE[1] to point to the exc_table. */ movi a6, exc_table - xsr a6, EXCSAVE_1 + xsr a6, excsave1 /* init_arch kick-starts the linux kernel */ diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index 98e77c3ef1c3..a6ce3e563739 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c @@ -72,13 +72,13 @@ int arch_show_interrupts(struct seq_file *p, int prec) static void xtensa_irq_mask(struct irq_data *d) { cached_irq_mask &= ~(1 << d->irq); - set_sr (cached_irq_mask, INTENABLE); + set_sr (cached_irq_mask, intenable); } static void xtensa_irq_unmask(struct irq_data *d) { cached_irq_mask |= 1 << d->irq; - set_sr (cached_irq_mask, INTENABLE); + set_sr (cached_irq_mask, intenable); } static void xtensa_irq_enable(struct irq_data *d) @@ -95,7 +95,7 @@ static void xtensa_irq_disable(struct irq_data *d) static void xtensa_irq_ack(struct irq_data *d) { - set_sr(1 << d->irq, INTCLEAR); + set_sr(1 << d->irq, intclear); } static int xtensa_irq_retrigger(struct irq_data *d) diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c index bc020825cce5..1908f6642d31 100644 --- a/arch/xtensa/kernel/process.c +++ b/arch/xtensa/kernel/process.c @@ -173,6 +173,16 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) * * Note: This is a pristine frame, so we don't need any spill region on top of * childregs. + * + * The fun part: if we're keeping the same VM (i.e. cloning a thread, + * not an entire process), we're normally given a new usp, and we CANNOT share + * any live address register windows. If we just copy those live frames over, + * the two threads (parent and child) will overflow the same frames onto the + * parent stack at different times, likely corrupting the parent stack (esp. + * if the parent returns from functions that called clone() and calls new + * ones, before the child overflows its now old copies of its parent windows). + * One solution is to spill windows to the parent stack, but that's fairly + * involved. Much simpler to just not copy those live frames across. */ int copy_thread(unsigned long clone_flags, unsigned long usp, @@ -180,10 +190,13 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, struct task_struct * p, struct pt_regs * regs) { struct pt_regs *childregs; - struct thread_info *ti; unsigned long tos; int user_mode = user_mode(regs); +#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) + struct thread_info *ti; +#endif + /* Set up new TSS. */ tos = (unsigned long)task_stack_page(p) + THREAD_SIZE; if (user_mode) @@ -191,13 +204,14 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, else childregs = (struct pt_regs*)tos - 1; + /* This does not copy all the regs. In a bout of brilliance or madness, + ARs beyond a0-a15 exist past the end of the struct. */ *childregs = *regs; /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */ *((int*)childregs - 3) = (unsigned long)childregs; *((int*)childregs - 4) = 0; - childregs->areg[1] = tos; childregs->areg[2] = 0; p->set_child_tid = p->clear_child_tid = NULL; p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1); @@ -205,10 +219,14 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, if (user_mode(regs)) { - int len = childregs->wmask & ~0xf; childregs->areg[1] = usp; - memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], - ®s->areg[XCHAL_NUM_AREGS - len/4], len); + if (clone_flags & CLONE_VM) { + childregs->wmask = 1; /* can't share live windows */ + } else { + int len = childregs->wmask & ~0xf; + memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], + ®s->areg[XCHAL_NUM_AREGS - len/4], len); + } // FIXME: we need to set THREADPTR in thread_info... if (clone_flags & CLONE_SETTLS) childregs->areg[2] = childregs->areg[6]; @@ -216,6 +234,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, } else { /* In kernel space, we start a new thread with a new stack. */ childregs->wmask = 1; + childregs->areg[1] = tos; } #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index 270360d9806c..b237988ba6d7 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -100,7 +100,7 @@ typedef struct tagtable { } tagtable_t; #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \ - __attribute__((unused, __section__(".taglist"))) = { tag, fn } + __attribute__((used, section(".taglist"))) = { tag, fn } /* parse current tag */ @@ -120,7 +120,7 @@ static int __init parse_tag_mem(const bp_tag_t *tag) } sysmem.bank[sysmem.nr_banks].type = mi->type; sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start); - sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_SIZE; + sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_MASK; sysmem.nr_banks++; return 0; diff --git a/arch/xtensa/kernel/syscall.c b/arch/xtensa/kernel/syscall.c index 05b3f093d5d7..a5c01e74d5d5 100644 --- a/arch/xtensa/kernel/syscall.c +++ b/arch/xtensa/kernel/syscall.c @@ -34,7 +34,6 @@ syscall_t sys_call_table[__NR_syscall_count] /* FIXME __cacheline_aligned */= { #undef __SYSCALL #define __SYSCALL(nr,symbol,nargs) [ nr ] = (syscall_t)symbol, -#undef _XTENSA_UNISTD_H #undef __KERNEL_SYSCALLS__ #include <asm/unistd.h> }; diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index bc1e14cf9369..5caf2b64d43a 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c @@ -97,7 +97,7 @@ static dispatch_init_table_t __initdata dispatch_init_table[] = { /* EXCCAUSE_INTEGER_DIVIDE_BY_ZERO unhandled */ /* EXCCAUSE_PRIVILEGED unhandled */ #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION -#ifdef CONFIG_UNALIGNED_USER +#ifdef CONFIG_XTENSA_UNALIGNED_USER { EXCCAUSE_UNALIGNED, USER, fast_unaligned }, #else { EXCCAUSE_UNALIGNED, 0, do_unaligned_user }, @@ -202,8 +202,8 @@ extern void do_IRQ(int, struct pt_regs *); void do_interrupt (struct pt_regs *regs) { - unsigned long intread = get_sr (INTREAD); - unsigned long intenable = get_sr (INTENABLE); + unsigned long intread = get_sr (interrupt); + unsigned long intenable = get_sr (intenable); int i, mask; /* Handle all interrupts (no priorities). @@ -213,7 +213,7 @@ void do_interrupt (struct pt_regs *regs) for (i=0, mask = 1; i < XCHAL_NUM_INTERRUPTS; i++, mask <<= 1) { if (mask & (intread & intenable)) { - set_sr (mask, INTCLEAR); + set_sr (mask, intclear); do_IRQ (i,regs); } } @@ -244,7 +244,7 @@ do_illegal_instruction(struct pt_regs *regs) */ #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION -#ifndef CONFIG_UNALIGNED_USER +#ifndef CONFIG_XTENSA_UNALIGNED_USER void do_unaligned_user (struct pt_regs *regs) { @@ -339,7 +339,7 @@ void __init trap_init(void) /* Initialize EXCSAVE_1 to hold the address of the exception table. */ i = (unsigned long)exc_table; - __asm__ __volatile__("wsr %0, "__stringify(EXCSAVE_1)"\n" : : "a" (i)); + __asm__ __volatile__("wsr %0, excsave1\n" : : "a" (i)); } /* @@ -386,16 +386,16 @@ static inline void spill_registers(void) unsigned int a0, ps; __asm__ __volatile__ ( - "movi a14," __stringify (PS_EXCM_BIT) " | 1\n\t" + "movi a14, " __stringify(PS_EXCM_BIT | 1) "\n\t" "mov a12, a0\n\t" - "rsr a13," __stringify(SAR) "\n\t" - "xsr a14," __stringify(PS) "\n\t" + "rsr a13, sar\n\t" + "xsr a14, ps\n\t" "movi a0, _spill_registers\n\t" "rsync\n\t" "callx0 a0\n\t" "mov a0, a12\n\t" - "wsr a13," __stringify(SAR) "\n\t" - "wsr a14," __stringify(PS) "\n\t" + "wsr a13, sar\n\t" + "wsr a14, ps\n\t" :: "a" (&a0), "a" (&ps) : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", "memory"); } diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S index 70066e3582d0..4462c1e595c2 100644 --- a/arch/xtensa/kernel/vectors.S +++ b/arch/xtensa/kernel/vectors.S @@ -69,11 +69,11 @@ ENTRY(_UserExceptionVector) - xsr a3, EXCSAVE_1 # save a3 and get dispatch table - wsr a2, DEPC # save a2 + xsr a3, excsave1 # save a3 and get dispatch table + wsr a2, depc # save a2 l32i a2, a3, EXC_TABLE_KSTK # load kernel stack to a2 s32i a0, a2, PT_AREG0 # save a0 to ESF - rsr a0, EXCCAUSE # retrieve exception cause + rsr a0, exccause # retrieve exception cause s32i a0, a2, PT_DEPC # mark it as a regular exception addx4 a0, a0, a3 # find entry in table l32i a0, a0, EXC_TABLE_FAST_USER # load handler @@ -93,11 +93,11 @@ ENTRY(_UserExceptionVector) ENTRY(_KernelExceptionVector) - xsr a3, EXCSAVE_1 # save a3, and get dispatch table - wsr a2, DEPC # save a2 + xsr a3, excsave1 # save a3, and get dispatch table + wsr a2, depc # save a2 addi a2, a1, -16-PT_SIZE # adjust stack pointer s32i a0, a2, PT_AREG0 # save a0 to ESF - rsr a0, EXCCAUSE # retrieve exception cause + rsr a0, exccause # retrieve exception cause s32i a0, a2, PT_DEPC # mark it as a regular exception addx4 a0, a0, a3 # find entry in table l32i a0, a0, EXC_TABLE_FAST_KERNEL # load handler address @@ -205,17 +205,17 @@ ENTRY(_DoubleExceptionVector) /* Deliberately destroy excsave (don't assume it's value was valid). */ - wsr a3, EXCSAVE_1 # save a3 + wsr a3, excsave1 # save a3 /* Check for kernel double exception (usually fatal). */ - rsr a3, PS + rsr a3, ps _bbci.l a3, PS_UM_BIT, .Lksp /* Check if we are currently handling a window exception. */ /* Note: We don't need to indicate that we enter a critical section. */ - xsr a0, DEPC # get DEPC, save a0 + xsr a0, depc # get DEPC, save a0 movi a3, XCHAL_WINDOW_VECTORS_VADDR _bltu a0, a3, .Lfixup @@ -243,21 +243,21 @@ ENTRY(_DoubleExceptionVector) * Note: We can trash the current window frame (a0...a3) and depc! */ - wsr a2, DEPC # save stack pointer temporarily - rsr a0, PS + wsr a2, depc # save stack pointer temporarily + rsr a0, ps extui a0, a0, PS_OWB_SHIFT, 4 - wsr a0, WINDOWBASE + wsr a0, windowbase rsync /* We are now in the previous window frame. Save registers again. */ - xsr a2, DEPC # save a2 and get stack pointer + xsr a2, depc # save a2 and get stack pointer s32i a0, a2, PT_AREG0 - wsr a3, EXCSAVE_1 # save a3 + wsr a3, excsave1 # save a3 movi a3, exc_table - rsr a0, EXCCAUSE + rsr a0, exccause s32i a0, a2, PT_DEPC # mark it as a regular exception addx4 a0, a0, a3 l32i a0, a0, EXC_TABLE_FAST_USER @@ -290,14 +290,14 @@ ENTRY(_DoubleExceptionVector) /* a0: depc, a1: a1, a2: kstk, a3: a2, depc: a0, excsave: a3 */ - xsr a3, DEPC + xsr a3, depc s32i a0, a2, PT_DEPC s32i a3, a2, PT_AREG0 /* a0: avail, a1: a1, a2: kstk, a3: avail, depc: a2, excsave: a3 */ movi a3, exc_table - rsr a0, EXCCAUSE + rsr a0, exccause addx4 a0, a0, a3 l32i a0, a0, EXC_TABLE_FAST_USER jx a0 @@ -312,7 +312,7 @@ ENTRY(_DoubleExceptionVector) .Lksp: /* a0: a0, a1: a1, a2: a2, a3: trashed, depc: depc, excsave: a3 */ - rsr a3, EXCCAUSE + rsr a3, exccause beqi a3, EXCCAUSE_ITLB_MISS, 1f addi a3, a3, -EXCCAUSE_DTLB_MISS bnez a3, .Lunrecoverable @@ -328,11 +328,11 @@ ENTRY(_DoubleExceptionVector) .Lunrecoverable_fixup: l32i a2, a3, EXC_TABLE_DOUBLE_SAVE - xsr a0, DEPC + xsr a0, depc .Lunrecoverable: - rsr a3, EXCSAVE_1 - wsr a0, EXCSAVE_1 + rsr a3, excsave1 + wsr a0, excsave1 movi a0, unrecoverable_exception callx0 a0 @@ -349,7 +349,7 @@ ENTRY(_DoubleExceptionVector) .section .DebugInterruptVector.text, "ax" ENTRY(_DebugInterruptVector) - xsr a0, EXCSAVE + XCHAL_DEBUGLEVEL + xsr a0, SREG_EXCSAVE + XCHAL_DEBUGLEVEL jx a0 diff --git a/arch/xtensa/lib/memcopy.S b/arch/xtensa/lib/memcopy.S index ea59dcd03866..c48b80acb5f0 100644 --- a/arch/xtensa/lib/memcopy.S +++ b/arch/xtensa/lib/memcopy.S @@ -6,7 +6,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2002 - 2005 Tensilica Inc. + * Copyright (C) 2002 - 2012 Tensilica Inc. */ #include <variant/core.h> @@ -27,14 +27,11 @@ #endif .endm - /* * void *memcpy(void *dst, const void *src, size_t len); - * void *memmove(void *dst, const void *src, size_t len); - * void *bcopy(const void *src, void *dst, size_t len); * * This function is intended to do the same thing as the standard - * library function memcpy() (or bcopy()) for most cases. + * library function memcpy() for most cases. * However, where the source and/or destination references * an instruction RAM or ROM or a data RAM or ROM, that * source and/or destination will always be accessed with @@ -45,9 +42,6 @@ * !!!!!!! Handling of IRAM/IROM has not yet * !!!!!!! been implemented. * - * The bcopy version is provided here to avoid the overhead - * of an extra call, for callers that require this convention. - * * The (general case) algorithm is as follows: * If destination is unaligned, align it by conditionally * copying 1 and 2 bytes. @@ -76,17 +70,6 @@ */ .text - .align 4 - .global bcopy - .type bcopy,@function -bcopy: - entry sp, 16 # minimal stack frame - # a2=src, a3=dst, a4=len - mov a5, a3 # copy dst so that a2 is return value - mov a3, a2 - mov a2, a5 - j .Lcommon # go to common code for memcpy+bcopy - /* * Byte by byte copy @@ -107,7 +90,7 @@ bcopy: s8i a6, a5, 0 addi a5, a5, 1 #if !XCHAL_HAVE_LOOPS - blt a3, a7, .Lnextbyte + bne a3, a7, .Lnextbyte # continue loop if $a3:src != $a7:src_end #endif /* !XCHAL_HAVE_LOOPS */ .Lbytecopydone: retw @@ -144,9 +127,6 @@ bcopy: .global memcpy .type memcpy,@function memcpy: - .global memmove - .type memmove,@function -memmove: entry sp, 16 # minimal stack frame # a2/ dst, a3/ src, a4/ len @@ -182,7 +162,7 @@ memmove: s32i a7, a5, 12 addi a5, a5, 16 #if !XCHAL_HAVE_LOOPS - blt a3, a8, .Loop1 + bne a3, a8, .Loop1 # continue loop if a3:src != a8:src_end #endif /* !XCHAL_HAVE_LOOPS */ .Loop1done: bbci.l a4, 3, .L2 @@ -260,7 +240,7 @@ memmove: s32i a9, a5, 12 addi a5, a5, 16 #if !XCHAL_HAVE_LOOPS - blt a3, a10, .Loop2 + bne a3, a10, .Loop2 # continue loop if a3:src != a10:src_end #endif /* !XCHAL_HAVE_LOOPS */ .Loop2done: bbci.l a4, 3, .L12 @@ -305,6 +285,285 @@ memmove: l8ui a6, a3, 0 s8i a6, a5, 0 retw + + +/* + * void bcopy(const void *src, void *dest, size_t n); + */ + .align 4 + .global bcopy + .type bcopy,@function +bcopy: + entry sp, 16 # minimal stack frame + # a2=src, a3=dst, a4=len + mov a5, a3 + mov a3, a2 + mov a2, a5 + j .Lmovecommon # go to common code for memmove+bcopy + +/* + * void *memmove(void *dst, const void *src, size_t len); + * + * This function is intended to do the same thing as the standard + * library function memmove() for most cases. + * However, where the source and/or destination references + * an instruction RAM or ROM or a data RAM or ROM, that + * source and/or destination will always be accessed with + * 32-bit load and store instructions (as required for these + * types of devices). + * + * !!!!!!! XTFIXME: + * !!!!!!! Handling of IRAM/IROM has not yet + * !!!!!!! been implemented. + * + * The (general case) algorithm is as follows: + * If end of source doesn't overlap destination then use memcpy. + * Otherwise do memcpy backwards. + * + * Register use: + * a0/ return address + * a1/ stack pointer + * a2/ return value + * a3/ src + * a4/ length + * a5/ dst + * a6/ tmp + * a7/ tmp + * a8/ tmp + * a9/ tmp + * a10/ tmp + * a11/ tmp + */ + +/* + * Byte by byte copy + */ + .align 4 + .byte 0 # 1 mod 4 alignment for LOOPNEZ + # (0 mod 4 alignment for LBEG) +.Lbackbytecopy: +#if XCHAL_HAVE_LOOPS + loopnez a4, .Lbackbytecopydone +#else /* !XCHAL_HAVE_LOOPS */ + beqz a4, .Lbackbytecopydone + sub a7, a3, a4 # a7 = start address for source +#endif /* !XCHAL_HAVE_LOOPS */ +.Lbacknextbyte: + addi a3, a3, -1 + l8ui a6, a3, 0 + addi a5, a5, -1 + s8i a6, a5, 0 +#if !XCHAL_HAVE_LOOPS + bne a3, a7, .Lbacknextbyte # continue loop if + # $a3:src != $a7:src_start +#endif /* !XCHAL_HAVE_LOOPS */ +.Lbackbytecopydone: + retw + +/* + * Destination is unaligned + */ + + .align 4 +.Lbackdst1mod2: # dst is only byte aligned + _bltui a4, 7, .Lbackbytecopy # do short copies byte by byte + + # copy 1 byte + addi a3, a3, -1 + l8ui a6, a3, 0 + addi a5, a5, -1 + s8i a6, a5, 0 + addi a4, a4, -1 + _bbci.l a5, 1, .Lbackdstaligned # if dst is now aligned, then + # return to main algorithm +.Lbackdst2mod4: # dst 16-bit aligned + # copy 2 bytes + _bltui a4, 6, .Lbackbytecopy # do short copies byte by byte + addi a3, a3, -2 + l8ui a6, a3, 0 + l8ui a7, a3, 1 + addi a5, a5, -2 + s8i a6, a5, 0 + s8i a7, a5, 1 + addi a4, a4, -2 + j .Lbackdstaligned # dst is now aligned, + # return to main algorithm + + .align 4 + .global memmove + .type memmove,@function +memmove: + + entry sp, 16 # minimal stack frame + # a2/ dst, a3/ src, a4/ len + mov a5, a2 # copy dst so that a2 is return value +.Lmovecommon: + sub a6, a5, a3 + bgeu a6, a4, .Lcommon + + add a5, a5, a4 + add a3, a3, a4 + + _bbsi.l a5, 0, .Lbackdst1mod2 # if dst is 1 mod 2 + _bbsi.l a5, 1, .Lbackdst2mod4 # if dst is 2 mod 4 +.Lbackdstaligned: # return here from .Lbackdst?mod? once dst is aligned + srli a7, a4, 4 # number of loop iterations with 16B + # per iteration + movi a8, 3 # if source is not aligned, + _bany a3, a8, .Lbacksrcunaligned # then use shifting copy + /* + * Destination and source are word-aligned, use word copy. + */ + # copy 16 bytes per iteration for word-aligned dst and word-aligned src +#if XCHAL_HAVE_LOOPS + loopnez a7, .backLoop1done +#else /* !XCHAL_HAVE_LOOPS */ + beqz a7, .backLoop1done + slli a8, a7, 4 + sub a8, a3, a8 # a8 = start of first 16B source chunk +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop1: + addi a3, a3, -16 + l32i a7, a3, 12 + l32i a6, a3, 8 + addi a5, a5, -16 + s32i a7, a5, 12 + l32i a7, a3, 4 + s32i a6, a5, 8 + l32i a6, a3, 0 + s32i a7, a5, 4 + s32i a6, a5, 0 +#if !XCHAL_HAVE_LOOPS + bne a3, a8, .backLoop1 # continue loop if a3:src != a8:src_start +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop1done: + bbci.l a4, 3, .Lback2 + # copy 8 bytes + addi a3, a3, -8 + l32i a6, a3, 0 + l32i a7, a3, 4 + addi a5, a5, -8 + s32i a6, a5, 0 + s32i a7, a5, 4 +.Lback2: + bbsi.l a4, 2, .Lback3 + bbsi.l a4, 1, .Lback4 + bbsi.l a4, 0, .Lback5 + retw +.Lback3: + # copy 4 bytes + addi a3, a3, -4 + l32i a6, a3, 0 + addi a5, a5, -4 + s32i a6, a5, 0 + bbsi.l a4, 1, .Lback4 + bbsi.l a4, 0, .Lback5 + retw +.Lback4: + # copy 2 bytes + addi a3, a3, -2 + l16ui a6, a3, 0 + addi a5, a5, -2 + s16i a6, a5, 0 + bbsi.l a4, 0, .Lback5 + retw +.Lback5: + # copy 1 byte + addi a3, a3, -1 + l8ui a6, a3, 0 + addi a5, a5, -1 + s8i a6, a5, 0 + retw + +/* + * Destination is aligned, Source is unaligned + */ + + .align 4 +.Lbacksrcunaligned: + _beqz a4, .Lbackdone # avoid loading anything for zero-length copies + # copy 16 bytes per iteration for word-aligned dst and unaligned src + ssa8 a3 # set shift amount from byte offset +#define SIM_CHECKS_ALIGNMENT 1 /* set to 1 when running on ISS with + * the lint or ferret client, or 0 + * to save a few cycles */ +#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT + and a11, a3, a8 # save unalignment offset for below + sub a3, a3, a11 # align a3 +#endif + l32i a6, a3, 0 # load first word +#if XCHAL_HAVE_LOOPS + loopnez a7, .backLoop2done +#else /* !XCHAL_HAVE_LOOPS */ + beqz a7, .backLoop2done + slli a10, a7, 4 + sub a10, a3, a10 # a10 = start of first 16B source chunk +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop2: + addi a3, a3, -16 + l32i a7, a3, 12 + l32i a8, a3, 8 + addi a5, a5, -16 + src_b a6, a7, a6 + s32i a6, a5, 12 + l32i a9, a3, 4 + src_b a7, a8, a7 + s32i a7, a5, 8 + l32i a6, a3, 0 + src_b a8, a9, a8 + s32i a8, a5, 4 + src_b a9, a6, a9 + s32i a9, a5, 0 +#if !XCHAL_HAVE_LOOPS + bne a3, a10, .backLoop2 # continue loop if a3:src != a10:src_start +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop2done: + bbci.l a4, 3, .Lback12 + # copy 8 bytes + addi a3, a3, -8 + l32i a7, a3, 4 + l32i a8, a3, 0 + addi a5, a5, -8 + src_b a6, a7, a6 + s32i a6, a5, 4 + src_b a7, a8, a7 + s32i a7, a5, 0 + mov a6, a8 +.Lback12: + bbci.l a4, 2, .Lback13 + # copy 4 bytes + addi a3, a3, -4 + l32i a7, a3, 0 + addi a5, a5, -4 + src_b a6, a7, a6 + s32i a6, a5, 0 + mov a6, a7 +.Lback13: +#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT + add a3, a3, a11 # readjust a3 with correct misalignment +#endif + bbsi.l a4, 1, .Lback14 + bbsi.l a4, 0, .Lback15 +.Lbackdone: + retw +.Lback14: + # copy 2 bytes + addi a3, a3, -2 + l8ui a6, a3, 0 + l8ui a7, a3, 1 + addi a5, a5, -2 + s8i a6, a5, 0 + s8i a7, a5, 1 + bbsi.l a4, 0, .Lback15 + retw +.Lback15: + # copy 1 byte + addi a3, a3, -1 + addi a5, a5, -1 + l8ui a6, a3, 0 + s8i a6, a5, 0 + retw + /* * Local Variables: diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c index 2c2f710ed1dc..245b08f7eaf4 100644 --- a/arch/xtensa/mm/fault.c +++ b/arch/xtensa/mm/fault.c @@ -6,7 +6,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2001 - 2005 Tensilica Inc. + * Copyright (C) 2001 - 2010 Tensilica Inc. * * Chris Zankel <chris@zankel.net> * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> @@ -186,6 +186,7 @@ do_sigbus: /* Kernel mode? Handle exceptions or die */ if (!user_mode(regs)) bad_page_fault(regs, address, SIGBUS); + return; vmalloc_fault: { diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c index 8ab47edd7c82..7e74895eee04 100644 --- a/arch/xtensa/platforms/iss/console.c +++ b/arch/xtensa/platforms/iss/console.c @@ -91,7 +91,7 @@ static int rs_write(struct tty_struct * tty, { /* see drivers/char/serialX.c to reference original version */ - __simc (SYS_write, 1, (unsigned long)buf, count, 0, 0); + simc_write(1, buf, count); return count; } @@ -122,12 +122,7 @@ static void rs_poll(unsigned long priv) static int rs_put_char(struct tty_struct *tty, unsigned char ch) { - char buf[2]; - - buf[0] = ch; - buf[1] = '\0'; /* Is this NULL necessary? */ - __simc (SYS_write, 1, (unsigned long) buf, 1, 0, 0); - return 1; + return rs_write(tty, &ch, 1); } static void rs_flush_chars(struct tty_struct *tty) diff --git a/arch/xtensa/platforms/iss/include/platform/simcall.h b/arch/xtensa/platforms/iss/include/platform/simcall.h index 8c43bfea05e1..bd78192e2fc9 100644 --- a/arch/xtensa/platforms/iss/include/platform/simcall.h +++ b/arch/xtensa/platforms/iss/include/platform/simcall.h @@ -78,8 +78,9 @@ static inline int __simc(int a, int b, int c, int d, int e, int f) return ret; } -static inline int simc_open(char *file, int flags, int mode) +static inline int simc_open(const char *file, int flags, int mode) { + wmb(); return __simc(SYS_open, (int) file, flags, mode, 0, 0); } @@ -90,16 +91,19 @@ static inline int simc_close(int fd) static inline int simc_ioctl(int fd, int request, void *arg) { + wmb(); return __simc(SYS_ioctl, fd, request, (int) arg, 0, 0); } static inline int simc_read(int fd, void *buf, size_t count) { + rmb(); return __simc(SYS_read, fd, (int) buf, count, 0, 0); } -static inline int simc_write(int fd, void *buf, size_t count) +static inline int simc_write(int fd, const void *buf, size_t count) { + wmb(); return __simc(SYS_write, fd, (int) buf, count, 0, 0); } @@ -107,6 +111,7 @@ static inline int simc_poll(int fd) { struct timeval tv = { .tv_sec = 0, .tv_usec = 0 }; + wmb(); return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&tv, 0, 0); } diff --git a/arch/xtensa/platforms/iss/setup.c b/arch/xtensa/platforms/iss/setup.c index 927acf378ea3..e1700102f35e 100644 --- a/arch/xtensa/platforms/iss/setup.c +++ b/arch/xtensa/platforms/iss/setup.c @@ -61,13 +61,13 @@ void platform_restart(void) * jump to the reset vector. */ __asm__ __volatile__("movi a2, 15\n\t" - "wsr a2, " __stringify(ICOUNTLEVEL) "\n\t" + "wsr a2, icountlevel\n\t" "movi a2, 0\n\t" - "wsr a2, " __stringify(ICOUNT) "\n\t" - "wsr a2, " __stringify(IBREAKENABLE) "\n\t" - "wsr a2, " __stringify(LCOUNT) "\n\t" + "wsr a2, icount\n\t" + "wsr a2, ibreakenable\n\t" + "wsr a2, lcount\n\t" "movi a2, 0x1f\n\t" - "wsr a2, " __stringify(PS) "\n\t" + "wsr a2, ps\n\t" "isync\n\t" "jx %0\n\t" : diff --git a/arch/xtensa/platforms/xt2000/setup.c b/arch/xtensa/platforms/xt2000/setup.c index 9e83940ac265..c7d90f17886e 100644 --- a/arch/xtensa/platforms/xt2000/setup.c +++ b/arch/xtensa/platforms/xt2000/setup.c @@ -66,13 +66,13 @@ void platform_restart(void) * jump to the reset vector. */ __asm__ __volatile__ ("movi a2, 15\n\t" - "wsr a2, " __stringify(ICOUNTLEVEL) "\n\t" + "wsr a2, icountlevel\n\t" "movi a2, 0\n\t" - "wsr a2, " __stringify(ICOUNT) "\n\t" - "wsr a2, " __stringify(IBREAKENABLE) "\n\t" - "wsr a2, " __stringify(LCOUNT) "\n\t" + "wsr a2, icount\n\t" + "wsr a2, ibreakenable\n\t" + "wsr a2, lcount\n\t" "movi a2, 0x1f\n\t" - "wsr a2, " __stringify(PS) "\n\t" + "wsr a2, ps\n\t" "isync\n\t" "jx %0\n\t" : |