diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/gpcv2.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-imx/imx7d_low_power_idle.S | 4 |
2 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/gpcv2.c b/arch/arm/mach-imx/gpcv2.c index 6ba667678bfc..10bbac5d3bca 100644 --- a/arch/arm/mach-imx/gpcv2.c +++ b/arch/arm/mach-imx/gpcv2.c @@ -332,17 +332,20 @@ void imx_gpcv2_set_cpu_power_gate_in_idle(bool pdn) spin_lock_irqsave(&gpcv2_lock, flags); imx_gpcv2_set_m_core_pgc(pdn, GPC_PGC_C0); - imx_gpcv2_set_m_core_pgc(pdn, GPC_PGC_C1); + if (num_online_cpus() > 1) + imx_gpcv2_set_m_core_pgc(pdn, GPC_PGC_C1); imx_gpcv2_set_m_core_pgc(pdn, GPC_PGC_SCU); imx_gpcv2_set_plat_power_gate_by_lpm(pdn); if (pdn) { imx_gpcv2_set_slot_ack(0, CORE0_A7, false, false); - imx_gpcv2_set_slot_ack(1, CORE1_A7, false, false); + if (num_online_cpus() > 1) + imx_gpcv2_set_slot_ack(1, CORE1_A7, false, false); imx_gpcv2_set_slot_ack(2, SCU_A7, false, true); imx_gpcv2_set_slot_ack(6, SCU_A7, true, false); imx_gpcv2_set_slot_ack(7, CORE0_A7, true, false); - imx_gpcv2_set_slot_ack(8, CORE1_A7, true, true); + if (num_online_cpus() > 1) + imx_gpcv2_set_slot_ack(8, CORE1_A7, true, true); } else { writel_relaxed(0x0, gpc_base + GPC_SLOT0_CFG + 0 * 0x4); writel_relaxed(0x0, gpc_base + GPC_SLOT0_CFG + 1 * 0x4); diff --git a/arch/arm/mach-imx/imx7d_low_power_idle.S b/arch/arm/mach-imx/imx7d_low_power_idle.S index 3bc866243a99..070b457c8fc1 100644 --- a/arch/arm/mach-imx/imx7d_low_power_idle.S +++ b/arch/arm/mach-imx/imx7d_low_power_idle.S @@ -117,6 +117,7 @@ mov pc, r7 pop {r0 - r12, lr} +#ifdef CONFIG_SMP clrex /* Turn off SMP bit. */ @@ -126,6 +127,7 @@ isb dsb +#endif .endm @@ -625,12 +627,14 @@ skip_lpi_flow: tlb_back_to_ddr +#ifdef CONFIG_SMP /* Turn on SMP bit. */ mrc p15, 0, r7, c1, c0, 1 orr r7, r7, #0x40 mcr p15, 0, r7, c1, c0, 1 isb +#endif /* enable d-cache */ mrc p15, 0, r7, c1, c0, 0 |