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path: root/drivers/char/rio/board.h
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Diffstat (limited to 'drivers/char/rio/board.h')
-rw-r--r--drivers/char/rio/board.h58
1 files changed, 27 insertions, 31 deletions
diff --git a/drivers/char/rio/board.h b/drivers/char/rio/board.h
index 29c980204098..bdea633a9076 100644
--- a/drivers/char/rio/board.h
+++ b/drivers/char/rio/board.h
@@ -33,10 +33,6 @@
#ifndef __rio_board_h__
#define __rio_board_h__
-#ifdef SCCS_LABELS
-static char *_board_h_sccs_ = "@(#)board.h 1.2";
-#endif
-
/*
** board.h contains the definitions for the *hardware* of the host cards.
** It describes the memory overlay for the dual port RAM area.
@@ -53,29 +49,29 @@ static char *_board_h_sccs_ = "@(#)board.h 1.2";
** The shape of the Host Control area, at offset 0x7C00, Write Only
*/
struct s_Ctrl {
- BYTE DpCtl; /* 7C00 */
- BYTE Dp_Unused2_[127];
- BYTE DpIntSet; /* 7C80 */
- BYTE Dp_Unused3_[127];
- BYTE DpTpuReset; /* 7D00 */
- BYTE Dp_Unused4_[127];
- BYTE DpIntReset; /* 7D80 */
- BYTE Dp_Unused5_[127];
+ u8 DpCtl; /* 7C00 */
+ u8 Dp_Unused2_[127];
+ u8 DpIntSet; /* 7C80 */
+ u8 Dp_Unused3_[127];
+ u8 DpTpuReset; /* 7D00 */
+ u8 Dp_Unused4_[127];
+ u8 DpIntReset; /* 7D80 */
+ u8 Dp_Unused5_[127];
};
/*
** The PROM data area on the host (0x7C00), Read Only
*/
struct s_Prom {
- WORD DpSlxCode[2];
- WORD DpRev;
- WORD Dp_Unused6_;
- WORD DpUniq[4];
- WORD DpJahre;
- WORD DpWoche;
- WORD DpHwFeature[5];
- WORD DpOemId;
- WORD DpSiggy[16];
+ u16 DpSlxCode[2];
+ u16 DpRev;
+ u16 Dp_Unused6_;
+ u16 DpUniq[4];
+ u16 DpJahre;
+ u16 DpWoche;
+ u16 DpHwFeature[5];
+ u16 DpOemId;
+ u16 DpSiggy[16];
};
/*
@@ -90,19 +86,19 @@ union u_CtrlProm { /* This is the control/PROM area (0x7C00) */
** The top end of memory!
*/
struct s_ParmMapS { /* Area containing Parm Map Pointer */
- BYTE Dp_Unused8_[DP_PARMMAP_ADDR];
- WORD DpParmMapAd;
+ u8 Dp_Unused8_[DP_PARMMAP_ADDR];
+ u16 DpParmMapAd;
};
struct s_StartUpS {
- BYTE Dp_Unused9_[DP_STARTUP_ADDR];
- BYTE Dp_LongJump[0x4];
- BYTE Dp_Unused10_[2];
- BYTE Dp_ShortJump[0x2];
+ u8 Dp_Unused9_[DP_STARTUP_ADDR];
+ u8 Dp_LongJump[0x4];
+ u8 Dp_Unused10_[2];
+ u8 Dp_ShortJump[0x2];
};
union u_Sram2ParmMap { /* This is the top of memory (0x7E00-0x7FFF) */
- BYTE DpSramMem[DP_SRAM2_SIZE];
+ u8 DpSramMem[DP_SRAM2_SIZE];
struct s_ParmMapS DpParmMapS;
struct s_StartUpS DpStartUpS;
};
@@ -111,11 +107,11 @@ union u_Sram2ParmMap { /* This is the top of memory (0x7E00-0x7FFF) */
** This is the DP RAM overlay.
*/
struct DpRam {
- BYTE DpSram1[DP_SRAM1_SIZE]; /* 0000 - 7BFF */
+ u8 DpSram1[DP_SRAM1_SIZE]; /* 0000 - 7BFF */
union u_CtrlProm DpCtrlProm; /* 7C00 - 7DFF */
union u_Sram2ParmMap DpSram2ParmMap; /* 7E00 - 7FFF */
- BYTE DpScratch[DP_SCRATCH_SIZE]; /* 8000 - 8FFF */
- BYTE DpSram3[DP_SRAM3_SIZE]; /* 9000 - FFFF */
+ u8 DpScratch[DP_SCRATCH_SIZE]; /* 8000 - 8FFF */
+ u8 DpSram3[DP_SRAM3_SIZE]; /* 9000 - FFFF */
};
#define DpControl DpCtrlProm.DpCtrl.DpCtl