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-rw-r--r--drivers/iommu/tegra-smmu.c26
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index a674f6473c17..a1673691b83f 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -303,15 +303,21 @@ static const u32 smmu_asid_security_ofs[] = {
SMMU_ASID_SECURITY_7,
};
-static size_t tegra_smmu_get_offset_base(int id)
+static size_t tegra_smmu_get_offset(int id)
{
- if (!(id & BIT(5)))
- return SMMU_SWGRP_ASID_BASE;
-
- if (id & BIT(4))
- return 0xa88 - SWGID_DC12 * sizeof(u32);
+ switch (id) {
+ case SWGID_DC14:
+ return 0x490;
+ case SWGID_DC12:
+ return 0xa88;
+ case SWGID_AFI...SWGID_ISP:
+ case SWGID_MPE...SWGID_PPCS1:
+ return (id - SWGID_AFI) * sizeof(u32) + SMMU_AFI_ASID;
+ case SWGID_SDMMC1A...63:
+ return (id - SWGID_SDMMC1A) * sizeof(u32) + 0xa94;
+ };
- return 0x490 - SWGID_DC14 * sizeof(u32);
+ BUG();
}
/*
@@ -480,7 +486,7 @@ static int __smmu_client_set_hwgrp(struct smmu_client *c, u64 map, int on)
if (i == SWGID_AFI)
continue;
- offs = i * sizeof(u32) + tegra_smmu_get_offset_base(i);
+ offs = tegra_smmu_get_offset(i);
val = smmu_read(smmu, offs);
val &= ~3; /* always overwrite ASID */
@@ -1818,10 +1824,10 @@ static int tegra_smmu_probe(struct platform_device *pdev)
smmu->swgids = 0x0000000001b659fe;
if (IS_ENABLED(CONFIG_ARCH_TEGRA_14x_SOC) &&
(tegra_get_chipid() == TEGRA_CHIPID_TEGRA14))
- smmu->swgids = 0x00000020018659fe;
+ smmu->swgids = 0x0000000001865bfe;
if (IS_ENABLED(CONFIG_ARCH_TEGRA_12x_SOC) &&
(tegra_get_chipid() == TEGRA_CHIPID_TEGRA12)) {
- smmu->swgids = 0x06f9000001ffc9cf;
+ smmu->swgids = 0x00000001fffecdcf;
smmu->num_translation_enable = 4;
smmu->num_asid_security = 8;
smmu->ptc_cache_size = SZ_32K;