summaryrefslogtreecommitdiff
path: root/drivers/net/wireless/ath6kl/include/AR6002/hw4.0/hw/analog_intf_athr_wlan_reg.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/ath6kl/include/AR6002/hw4.0/hw/analog_intf_athr_wlan_reg.h')
-rw-r--r--drivers/net/wireless/ath6kl/include/AR6002/hw4.0/hw/analog_intf_athr_wlan_reg.h3670
1 files changed, 3670 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath6kl/include/AR6002/hw4.0/hw/analog_intf_athr_wlan_reg.h b/drivers/net/wireless/ath6kl/include/AR6002/hw4.0/hw/analog_intf_athr_wlan_reg.h
new file mode 100644
index 000000000000..55ed918fa6ec
--- /dev/null
+++ b/drivers/net/wireless/ath6kl/include/AR6002/hw4.0/hw/analog_intf_athr_wlan_reg.h
@@ -0,0 +1,3670 @@
+// ------------------------------------------------------------------
+// Copyright (c) 2004-2007 Atheros Corporation. All rights reserved.
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License version 2 as
+// published by the Free Software Foundation;
+//
+// Software distributed under the License is distributed on an "AS
+// IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
+// implied. See the License for the specific language governing
+// rights and limitations under the License.
+//
+//
+// ------------------------------------------------------------------
+//===================================================================
+// Author(s): ="Atheros"
+//===================================================================
+
+/* Copyright (C) 2009 Denali Software Inc. All rights reserved */
+/* THIS FILE IS AUTOMATICALLY GENERATED BY DENALI BLUEPRINT, DO NOT EDIT */
+
+
+#ifndef _ANALOG_INTF_ATHR_WLAN_REG_REG_H_
+#define _ANALOG_INTF_ATHR_WLAN_REG_REG_H_
+
+
+/* macros for RXRF_BIAS1 */
+#define PHY_ANALOG_RXRF_BIAS1_ADDRESS 0x00000000
+#define PHY_ANALOG_RXRF_BIAS1_OFFSET 0x00000000
+#define PHY_ANALOG_RXRF_BIAS1_SPARE_MSB 0
+#define PHY_ANALOG_RXRF_BIAS1_SPARE_LSB 0
+#define PHY_ANALOG_RXRF_BIAS1_SPARE_MASK 0x00000001
+#define PHY_ANALOG_RXRF_BIAS1_SPARE_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_RXRF_BIAS1_SPARE_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MSB 3
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_LSB 1
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MASK 0x0000000e
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_GET(x) (((x) & 0x0000000e) >> 1)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_SET(x) (((x) << 1) & 0x0000000e)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MSB 6
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_LSB 4
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MASK 0x00000070
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_GET(x) (((x) & 0x00000070) >> 4)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_SET(x) (((x) << 4) & 0x00000070)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MSB 9
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_LSB 7
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MASK 0x00000380
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_GET(x) (((x) & 0x00000380) >> 7)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_SET(x) (((x) << 7) & 0x00000380)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MSB 12
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_LSB 10
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MASK 0x00001c00
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_GET(x) (((x) & 0x00001c00) >> 10)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_SET(x) (((x) << 10) & 0x00001c00)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MSB 15
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_LSB 13
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MASK 0x0000e000
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_GET(x) (((x) & 0x0000e000) >> 13)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_SET(x) (((x) << 13) & 0x0000e000)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MSB 18
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_LSB 16
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MASK 0x00070000
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_GET(x) (((x) & 0x00070000) >> 16)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_SET(x) (((x) << 16) & 0x00070000)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MSB 21
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_LSB 19
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MASK 0x00380000
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_GET(x) (((x) & 0x00380000) >> 19)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_SET(x) (((x) << 19) & 0x00380000)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MSB 24
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_LSB 22
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MASK 0x01c00000
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_GET(x) (((x) & 0x01c00000) >> 22)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_SET(x) (((x) << 22) & 0x01c00000)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MSB 27
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_LSB 25
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MASK 0x0e000000
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_GET(x) (((x) & 0x0e000000) >> 25)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_SET(x) (((x) << 25) & 0x0e000000)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MSB 30
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_LSB 28
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MASK 0x70000000
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_GET(x) (((x) & 0x70000000) >> 28)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_SET(x) (((x) << 28) & 0x70000000)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MSB 31
+#define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_LSB 31
+#define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MASK 0x80000000
+#define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for RXRF_BIAS2 */
+#define PHY_ANALOG_RXRF_BIAS2_ADDRESS 0x00000004
+#define PHY_ANALOG_RXRF_BIAS2_OFFSET 0x00000004
+#define PHY_ANALOG_RXRF_BIAS2_SPARE_MSB 0
+#define PHY_ANALOG_RXRF_BIAS2_SPARE_LSB 0
+#define PHY_ANALOG_RXRF_BIAS2_SPARE_MASK 0x00000001
+#define PHY_ANALOG_RXRF_BIAS2_SPARE_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_RXRF_BIAS2_SPARE_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_RXRF_BIAS2_PKEN_MSB 3
+#define PHY_ANALOG_RXRF_BIAS2_PKEN_LSB 1
+#define PHY_ANALOG_RXRF_BIAS2_PKEN_MASK 0x0000000e
+#define PHY_ANALOG_RXRF_BIAS2_PKEN_GET(x) (((x) & 0x0000000e) >> 1)
+#define PHY_ANALOG_RXRF_BIAS2_PKEN_SET(x) (((x) << 1) & 0x0000000e)
+#define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MSB 6
+#define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_LSB 4
+#define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MASK 0x00000070
+#define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_GET(x) (((x) & 0x00000070) >> 4)
+#define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_SET(x) (((x) << 4) & 0x00000070)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MSB 7
+#define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_LSB 7
+#define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MASK 0x00000080
+#define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_MSB 10
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_LSB 8
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_MASK 0x00000700
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_GET(x) (((x) & 0x00000700) >> 8)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_SET(x) (((x) << 8) & 0x00000700)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_MSB 13
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_LSB 11
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_MASK 0x00003800
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_MSB 16
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_LSB 14
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_MASK 0x0001c000
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_MSB 19
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_LSB 17
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_MASK 0x000e0000
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_MSB 22
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_LSB 20
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_MASK 0x00700000
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_MSB 25
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_LSB 23
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_MASK 0x03800000
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MSB 28
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_LSB 26
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MASK 0x1c000000
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MSB 31
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_LSB 29
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MASK 0xe0000000
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for RXRF_GAINSTAGES */
+#define PHY_ANALOG_RXRF_GAINSTAGES_ADDRESS 0x00000008
+#define PHY_ANALOG_RXRF_GAINSTAGES_OFFSET 0x00000008
+#define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MSB 0
+#define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_LSB 0
+#define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MASK 0x00000001
+#define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MSB 1
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_LSB 1
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MASK 0x00000002
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MSB 3
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_LSB 2
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MASK 0x0000000c
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_GET(x) (((x) & 0x0000000c) >> 2)
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_SET(x) (((x) << 2) & 0x0000000c)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MSB 5
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_LSB 4
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MASK 0x00000030
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_GET(x) (((x) & 0x00000030) >> 4)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_SET(x) (((x) << 4) & 0x00000030)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MSB 6
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_LSB 6
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MASK 0x00000040
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MSB 7
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_LSB 7
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MASK 0x00000080
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MSB 8
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_LSB 8
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MASK 0x00000100
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MSB 9
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_LSB 9
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MASK 0x00000200
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MSB 10
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_LSB 10
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MASK 0x00000400
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MSB 12
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_LSB 11
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MASK 0x00001800
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_GET(x) (((x) & 0x00001800) >> 11)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_SET(x) (((x) << 11) & 0x00001800)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MSB 13
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_LSB 13
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MASK 0x00002000
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MSB 14
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_LSB 14
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MASK 0x00004000
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MSB 15
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_LSB 15
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MASK 0x00008000
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MSB 16
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_LSB 16
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MASK 0x00010000
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MSB 17
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_LSB 17
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MASK 0x00020000
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_SET(x) (((x) << 17) & 0x00020000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MSB 19
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_LSB 18
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MASK 0x000c0000
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_GET(x) (((x) & 0x000c0000) >> 18)
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_SET(x) (((x) << 18) & 0x000c0000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MSB 22
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_LSB 20
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MASK 0x00700000
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MSB 25
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_LSB 23
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MASK 0x03800000
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MSB 27
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_LSB 26
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MASK 0x0c000000
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_GET(x) (((x) & 0x0c000000) >> 26)
+#define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_SET(x) (((x) << 26) & 0x0c000000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MSB 30
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_LSB 28
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MASK 0x70000000
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_GET(x) (((x) & 0x70000000) >> 28)
+#define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_SET(x) (((x) << 28) & 0x70000000)
+#define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MSB 31
+#define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_LSB 31
+#define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MASK 0x80000000
+#define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for RXRF_AGC */
+#define PHY_ANALOG_RXRF_AGC_ADDRESS 0x0000000c
+#define PHY_ANALOG_RXRF_AGC_OFFSET 0x0000000c
+#define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_MSB 0
+#define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_LSB 0
+#define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_MASK 0x00000001
+#define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_MSB 1
+#define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_LSB 1
+#define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_MASK 0x00000002
+#define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_RXRF_AGC_AGC_OUT_MSB 2
+#define PHY_ANALOG_RXRF_AGC_AGC_OUT_LSB 2
+#define PHY_ANALOG_RXRF_AGC_AGC_OUT_MASK 0x00000004
+#define PHY_ANALOG_RXRF_AGC_AGC_OUT_GET(x) (((x) & 0x00000004) >> 2)
+#define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_MSB 3
+#define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_LSB 3
+#define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_MASK 0x00000008
+#define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_MSB 4
+#define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_LSB 4
+#define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_MASK 0x00000010
+#define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_MSB 5
+#define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_LSB 5
+#define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_MASK 0x00000020
+#define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MSB 8
+#define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_LSB 6
+#define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MASK 0x000001c0
+#define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_GET(x) (((x) & 0x000001c0) >> 6)
+#define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_SET(x) (((x) << 6) & 0x000001c0)
+#define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MSB 14
+#define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_LSB 9
+#define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MASK 0x00007e00
+#define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_GET(x) (((x) & 0x00007e00) >> 9)
+#define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_SET(x) (((x) << 9) & 0x00007e00)
+#define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MSB 18
+#define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_LSB 15
+#define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MASK 0x00078000
+#define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_GET(x) (((x) & 0x00078000) >> 15)
+#define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_SET(x) (((x) << 15) & 0x00078000)
+#define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MSB 24
+#define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_LSB 19
+#define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MASK 0x01f80000
+#define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_GET(x) (((x) & 0x01f80000) >> 19)
+#define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_SET(x) (((x) << 19) & 0x01f80000)
+#define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MSB 28
+#define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_LSB 25
+#define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MASK 0x1e000000
+#define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_GET(x) (((x) & 0x1e000000) >> 25)
+#define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_SET(x) (((x) << 25) & 0x1e000000)
+#define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MSB 29
+#define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_LSB 29
+#define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MASK 0x20000000
+#define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MSB 30
+#define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_LSB 30
+#define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MASK 0x40000000
+#define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MSB 31
+#define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_LSB 31
+#define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MASK 0x80000000
+#define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for TXRF1 */
+#define PHY_ANALOG_TXRF1_ADDRESS 0x00000040
+#define PHY_ANALOG_TXRF1_OFFSET 0x00000040
+#define PHY_ANALOG_TXRF1_PDLOBUF5G_MSB 0
+#define PHY_ANALOG_TXRF1_PDLOBUF5G_LSB 0
+#define PHY_ANALOG_TXRF1_PDLOBUF5G_MASK 0x00000001
+#define PHY_ANALOG_TXRF1_PDLOBUF5G_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_TXRF1_PDLOBUF5G_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_TXRF1_PDLODIV5G_MSB 1
+#define PHY_ANALOG_TXRF1_PDLODIV5G_LSB 1
+#define PHY_ANALOG_TXRF1_PDLODIV5G_MASK 0x00000002
+#define PHY_ANALOG_TXRF1_PDLODIV5G_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_TXRF1_PDLODIV5G_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_TXRF1_LOBUF5GFORCED_MSB 2
+#define PHY_ANALOG_TXRF1_LOBUF5GFORCED_LSB 2
+#define PHY_ANALOG_TXRF1_LOBUF5GFORCED_MASK 0x00000004
+#define PHY_ANALOG_TXRF1_LOBUF5GFORCED_GET(x) (((x) & 0x00000004) >> 2)
+#define PHY_ANALOG_TXRF1_LOBUF5GFORCED_SET(x) (((x) << 2) & 0x00000004)
+#define PHY_ANALOG_TXRF1_LODIV5GFORCED_MSB 3
+#define PHY_ANALOG_TXRF1_LODIV5GFORCED_LSB 3
+#define PHY_ANALOG_TXRF1_LODIV5GFORCED_MASK 0x00000008
+#define PHY_ANALOG_TXRF1_LODIV5GFORCED_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_TXRF1_LODIV5GFORCED_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_TXRF1_PADRV2GN5G_MSB 7
+#define PHY_ANALOG_TXRF1_PADRV2GN5G_LSB 4
+#define PHY_ANALOG_TXRF1_PADRV2GN5G_MASK 0x000000f0
+#define PHY_ANALOG_TXRF1_PADRV2GN5G_GET(x) (((x) & 0x000000f0) >> 4)
+#define PHY_ANALOG_TXRF1_PADRV2GN5G_SET(x) (((x) << 4) & 0x000000f0)
+#define PHY_ANALOG_TXRF1_PADRV3GN5G_MSB 11
+#define PHY_ANALOG_TXRF1_PADRV3GN5G_LSB 8
+#define PHY_ANALOG_TXRF1_PADRV3GN5G_MASK 0x00000f00
+#define PHY_ANALOG_TXRF1_PADRV3GN5G_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_TXRF1_PADRV3GN5G_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_TXRF1_PADRV4GN5G_MSB 15
+#define PHY_ANALOG_TXRF1_PADRV4GN5G_LSB 12
+#define PHY_ANALOG_TXRF1_PADRV4GN5G_MASK 0x0000f000
+#define PHY_ANALOG_TXRF1_PADRV4GN5G_GET(x) (((x) & 0x0000f000) >> 12)
+#define PHY_ANALOG_TXRF1_PADRV4GN5G_SET(x) (((x) << 12) & 0x0000f000)
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_MSB 16
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_LSB 16
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_MASK 0x00010000
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_TXRF1_PDOUT2G_MSB 17
+#define PHY_ANALOG_TXRF1_PDOUT2G_LSB 17
+#define PHY_ANALOG_TXRF1_PDOUT2G_MASK 0x00020000
+#define PHY_ANALOG_TXRF1_PDOUT2G_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_TXRF1_PDOUT2G_SET(x) (((x) << 17) & 0x00020000)
+#define PHY_ANALOG_TXRF1_PDDR2G_MSB 18
+#define PHY_ANALOG_TXRF1_PDDR2G_LSB 18
+#define PHY_ANALOG_TXRF1_PDDR2G_MASK 0x00040000
+#define PHY_ANALOG_TXRF1_PDDR2G_GET(x) (((x) & 0x00040000) >> 18)
+#define PHY_ANALOG_TXRF1_PDDR2G_SET(x) (((x) << 18) & 0x00040000)
+#define PHY_ANALOG_TXRF1_PDMXR2G_MSB 19
+#define PHY_ANALOG_TXRF1_PDMXR2G_LSB 19
+#define PHY_ANALOG_TXRF1_PDMXR2G_MASK 0x00080000
+#define PHY_ANALOG_TXRF1_PDMXR2G_GET(x) (((x) & 0x00080000) >> 19)
+#define PHY_ANALOG_TXRF1_PDMXR2G_SET(x) (((x) << 19) & 0x00080000)
+#define PHY_ANALOG_TXRF1_PDLOBUF2G_MSB 20
+#define PHY_ANALOG_TXRF1_PDLOBUF2G_LSB 20
+#define PHY_ANALOG_TXRF1_PDLOBUF2G_MASK 0x00100000
+#define PHY_ANALOG_TXRF1_PDLOBUF2G_GET(x) (((x) & 0x00100000) >> 20)
+#define PHY_ANALOG_TXRF1_PDLOBUF2G_SET(x) (((x) << 20) & 0x00100000)
+#define PHY_ANALOG_TXRF1_PDLODIV2G_MSB 21
+#define PHY_ANALOG_TXRF1_PDLODIV2G_LSB 21
+#define PHY_ANALOG_TXRF1_PDLODIV2G_MASK 0x00200000
+#define PHY_ANALOG_TXRF1_PDLODIV2G_GET(x) (((x) & 0x00200000) >> 21)
+#define PHY_ANALOG_TXRF1_PDLODIV2G_SET(x) (((x) << 21) & 0x00200000)
+#define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MSB 22
+#define PHY_ANALOG_TXRF1_LOBUF2GFORCED_LSB 22
+#define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MASK 0x00400000
+#define PHY_ANALOG_TXRF1_LOBUF2GFORCED_GET(x) (((x) & 0x00400000) >> 22)
+#define PHY_ANALOG_TXRF1_LOBUF2GFORCED_SET(x) (((x) << 22) & 0x00400000)
+#define PHY_ANALOG_TXRF1_LODIV2GFORCED_MSB 23
+#define PHY_ANALOG_TXRF1_LODIV2GFORCED_LSB 23
+#define PHY_ANALOG_TXRF1_LODIV2GFORCED_MASK 0x00800000
+#define PHY_ANALOG_TXRF1_LODIV2GFORCED_GET(x) (((x) & 0x00800000) >> 23)
+#define PHY_ANALOG_TXRF1_LODIV2GFORCED_SET(x) (((x) << 23) & 0x00800000)
+#define PHY_ANALOG_TXRF1_PADRVGN2G_MSB 30
+#define PHY_ANALOG_TXRF1_PADRVGN2G_LSB 24
+#define PHY_ANALOG_TXRF1_PADRVGN2G_MASK 0x7f000000
+#define PHY_ANALOG_TXRF1_PADRVGN2G_GET(x) (((x) & 0x7f000000) >> 24)
+#define PHY_ANALOG_TXRF1_PADRVGN2G_SET(x) (((x) << 24) & 0x7f000000)
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MSB 31
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_LSB 31
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MASK 0x80000000
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for TXRF2 */
+#define PHY_ANALOG_TXRF2_ADDRESS 0x00000044
+#define PHY_ANALOG_TXRF2_OFFSET 0x00000044
+#define PHY_ANALOG_TXRF2_D3B5G_MSB 2
+#define PHY_ANALOG_TXRF2_D3B5G_LSB 0
+#define PHY_ANALOG_TXRF2_D3B5G_MASK 0x00000007
+#define PHY_ANALOG_TXRF2_D3B5G_GET(x) (((x) & 0x00000007) >> 0)
+#define PHY_ANALOG_TXRF2_D3B5G_SET(x) (((x) << 0) & 0x00000007)
+#define PHY_ANALOG_TXRF2_D4B5G_MSB 5
+#define PHY_ANALOG_TXRF2_D4B5G_LSB 3
+#define PHY_ANALOG_TXRF2_D4B5G_MASK 0x00000038
+#define PHY_ANALOG_TXRF2_D4B5G_GET(x) (((x) & 0x00000038) >> 3)
+#define PHY_ANALOG_TXRF2_D4B5G_SET(x) (((x) << 3) & 0x00000038)
+#define PHY_ANALOG_TXRF2_OCAS2G_MSB 8
+#define PHY_ANALOG_TXRF2_OCAS2G_LSB 6
+#define PHY_ANALOG_TXRF2_OCAS2G_MASK 0x000001c0
+#define PHY_ANALOG_TXRF2_OCAS2G_GET(x) (((x) & 0x000001c0) >> 6)
+#define PHY_ANALOG_TXRF2_OCAS2G_SET(x) (((x) << 6) & 0x000001c0)
+#define PHY_ANALOG_TXRF2_DCAS2G_MSB 11
+#define PHY_ANALOG_TXRF2_DCAS2G_LSB 9
+#define PHY_ANALOG_TXRF2_DCAS2G_MASK 0x00000e00
+#define PHY_ANALOG_TXRF2_DCAS2G_GET(x) (((x) & 0x00000e00) >> 9)
+#define PHY_ANALOG_TXRF2_DCAS2G_SET(x) (((x) << 9) & 0x00000e00)
+#define PHY_ANALOG_TXRF2_OB2G_PALOFF_MSB 14
+#define PHY_ANALOG_TXRF2_OB2G_PALOFF_LSB 12
+#define PHY_ANALOG_TXRF2_OB2G_PALOFF_MASK 0x00007000
+#define PHY_ANALOG_TXRF2_OB2G_PALOFF_GET(x) (((x) & 0x00007000) >> 12)
+#define PHY_ANALOG_TXRF2_OB2G_PALOFF_SET(x) (((x) << 12) & 0x00007000)
+#define PHY_ANALOG_TXRF2_OB2G_QAM_MSB 17
+#define PHY_ANALOG_TXRF2_OB2G_QAM_LSB 15
+#define PHY_ANALOG_TXRF2_OB2G_QAM_MASK 0x00038000
+#define PHY_ANALOG_TXRF2_OB2G_QAM_GET(x) (((x) & 0x00038000) >> 15)
+#define PHY_ANALOG_TXRF2_OB2G_QAM_SET(x) (((x) << 15) & 0x00038000)
+#define PHY_ANALOG_TXRF2_OB2G_PSK_MSB 20
+#define PHY_ANALOG_TXRF2_OB2G_PSK_LSB 18
+#define PHY_ANALOG_TXRF2_OB2G_PSK_MASK 0x001c0000
+#define PHY_ANALOG_TXRF2_OB2G_PSK_GET(x) (((x) & 0x001c0000) >> 18)
+#define PHY_ANALOG_TXRF2_OB2G_PSK_SET(x) (((x) << 18) & 0x001c0000)
+#define PHY_ANALOG_TXRF2_OB2G_CCK_MSB 23
+#define PHY_ANALOG_TXRF2_OB2G_CCK_LSB 21
+#define PHY_ANALOG_TXRF2_OB2G_CCK_MASK 0x00e00000
+#define PHY_ANALOG_TXRF2_OB2G_CCK_GET(x) (((x) & 0x00e00000) >> 21)
+#define PHY_ANALOG_TXRF2_OB2G_CCK_SET(x) (((x) << 21) & 0x00e00000)
+#define PHY_ANALOG_TXRF2_DB2G_MSB 26
+#define PHY_ANALOG_TXRF2_DB2G_LSB 24
+#define PHY_ANALOG_TXRF2_DB2G_MASK 0x07000000
+#define PHY_ANALOG_TXRF2_DB2G_GET(x) (((x) & 0x07000000) >> 24)
+#define PHY_ANALOG_TXRF2_DB2G_SET(x) (((x) << 24) & 0x07000000)
+#define PHY_ANALOG_TXRF2_PDOUT5G_MSB 30
+#define PHY_ANALOG_TXRF2_PDOUT5G_LSB 27
+#define PHY_ANALOG_TXRF2_PDOUT5G_MASK 0x78000000
+#define PHY_ANALOG_TXRF2_PDOUT5G_GET(x) (((x) & 0x78000000) >> 27)
+#define PHY_ANALOG_TXRF2_PDOUT5G_SET(x) (((x) << 27) & 0x78000000)
+#define PHY_ANALOG_TXRF2_PDMXR5G_MSB 31
+#define PHY_ANALOG_TXRF2_PDMXR5G_LSB 31
+#define PHY_ANALOG_TXRF2_PDMXR5G_MASK 0x80000000
+#define PHY_ANALOG_TXRF2_PDMXR5G_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_TXRF2_PDMXR5G_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for TXRF3 */
+#define PHY_ANALOG_TXRF3_ADDRESS 0x00000048
+#define PHY_ANALOG_TXRF3_OFFSET 0x00000048
+#define PHY_ANALOG_TXRF3_FILTR2G_MSB 1
+#define PHY_ANALOG_TXRF3_FILTR2G_LSB 0
+#define PHY_ANALOG_TXRF3_FILTR2G_MASK 0x00000003
+#define PHY_ANALOG_TXRF3_FILTR2G_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_TXRF3_FILTR2G_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_TXRF3_PWDFB2_2G_MSB 2
+#define PHY_ANALOG_TXRF3_PWDFB2_2G_LSB 2
+#define PHY_ANALOG_TXRF3_PWDFB2_2G_MASK 0x00000004
+#define PHY_ANALOG_TXRF3_PWDFB2_2G_GET(x) (((x) & 0x00000004) >> 2)
+#define PHY_ANALOG_TXRF3_PWDFB2_2G_SET(x) (((x) << 2) & 0x00000004)
+#define PHY_ANALOG_TXRF3_PWDFB1_2G_MSB 3
+#define PHY_ANALOG_TXRF3_PWDFB1_2G_LSB 3
+#define PHY_ANALOG_TXRF3_PWDFB1_2G_MASK 0x00000008
+#define PHY_ANALOG_TXRF3_PWDFB1_2G_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_TXRF3_PWDFB1_2G_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_TXRF3_PDFB2G_MSB 4
+#define PHY_ANALOG_TXRF3_PDFB2G_LSB 4
+#define PHY_ANALOG_TXRF3_PDFB2G_MASK 0x00000010
+#define PHY_ANALOG_TXRF3_PDFB2G_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_TXRF3_PDFB2G_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_TXRF3_RDIV5G_MSB 6
+#define PHY_ANALOG_TXRF3_RDIV5G_LSB 5
+#define PHY_ANALOG_TXRF3_RDIV5G_MASK 0x00000060
+#define PHY_ANALOG_TXRF3_RDIV5G_GET(x) (((x) & 0x00000060) >> 5)
+#define PHY_ANALOG_TXRF3_RDIV5G_SET(x) (((x) << 5) & 0x00000060)
+#define PHY_ANALOG_TXRF3_CAPDIV5G_MSB 9
+#define PHY_ANALOG_TXRF3_CAPDIV5G_LSB 7
+#define PHY_ANALOG_TXRF3_CAPDIV5G_MASK 0x00000380
+#define PHY_ANALOG_TXRF3_CAPDIV5G_GET(x) (((x) & 0x00000380) >> 7)
+#define PHY_ANALOG_TXRF3_CAPDIV5G_SET(x) (((x) << 7) & 0x00000380)
+#define PHY_ANALOG_TXRF3_PDPREDIST5G_MSB 10
+#define PHY_ANALOG_TXRF3_PDPREDIST5G_LSB 10
+#define PHY_ANALOG_TXRF3_PDPREDIST5G_MASK 0x00000400
+#define PHY_ANALOG_TXRF3_PDPREDIST5G_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_TXRF3_PDPREDIST5G_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_TXRF3_RDIV2G_MSB 12
+#define PHY_ANALOG_TXRF3_RDIV2G_LSB 11
+#define PHY_ANALOG_TXRF3_RDIV2G_MASK 0x00001800
+#define PHY_ANALOG_TXRF3_RDIV2G_GET(x) (((x) & 0x00001800) >> 11)
+#define PHY_ANALOG_TXRF3_RDIV2G_SET(x) (((x) << 11) & 0x00001800)
+#define PHY_ANALOG_TXRF3_PDPREDIST2G_MSB 13
+#define PHY_ANALOG_TXRF3_PDPREDIST2G_LSB 13
+#define PHY_ANALOG_TXRF3_PDPREDIST2G_MASK 0x00002000
+#define PHY_ANALOG_TXRF3_PDPREDIST2G_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_TXRF3_PDPREDIST2G_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_TXRF3_OCAS5G_MSB 16
+#define PHY_ANALOG_TXRF3_OCAS5G_LSB 14
+#define PHY_ANALOG_TXRF3_OCAS5G_MASK 0x0001c000
+#define PHY_ANALOG_TXRF3_OCAS5G_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_TXRF3_OCAS5G_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_TXRF3_D2CAS5G_MSB 19
+#define PHY_ANALOG_TXRF3_D2CAS5G_LSB 17
+#define PHY_ANALOG_TXRF3_D2CAS5G_MASK 0x000e0000
+#define PHY_ANALOG_TXRF3_D2CAS5G_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_TXRF3_D2CAS5G_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_TXRF3_D3CAS5G_MSB 22
+#define PHY_ANALOG_TXRF3_D3CAS5G_LSB 20
+#define PHY_ANALOG_TXRF3_D3CAS5G_MASK 0x00700000
+#define PHY_ANALOG_TXRF3_D3CAS5G_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_TXRF3_D3CAS5G_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_TXRF3_D4CAS5G_MSB 25
+#define PHY_ANALOG_TXRF3_D4CAS5G_LSB 23
+#define PHY_ANALOG_TXRF3_D4CAS5G_MASK 0x03800000
+#define PHY_ANALOG_TXRF3_D4CAS5G_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_TXRF3_D4CAS5G_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_TXRF3_OB5G_MSB 28
+#define PHY_ANALOG_TXRF3_OB5G_LSB 26
+#define PHY_ANALOG_TXRF3_OB5G_MASK 0x1c000000
+#define PHY_ANALOG_TXRF3_OB5G_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_TXRF3_OB5G_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_TXRF3_D2B5G_MSB 31
+#define PHY_ANALOG_TXRF3_D2B5G_LSB 29
+#define PHY_ANALOG_TXRF3_D2B5G_MASK 0xe0000000
+#define PHY_ANALOG_TXRF3_D2B5G_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_TXRF3_D2B5G_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for TXRF4 */
+#define PHY_ANALOG_TXRF4_ADDRESS 0x0000004c
+#define PHY_ANALOG_TXRF4_OFFSET 0x0000004c
+#define PHY_ANALOG_TXRF4_PK1B2G_CCK_MSB 1
+#define PHY_ANALOG_TXRF4_PK1B2G_CCK_LSB 0
+#define PHY_ANALOG_TXRF4_PK1B2G_CCK_MASK 0x00000003
+#define PHY_ANALOG_TXRF4_PK1B2G_CCK_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_TXRF4_PK1B2G_CCK_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_TXRF4_MIOB2G_QAM_MSB 4
+#define PHY_ANALOG_TXRF4_MIOB2G_QAM_LSB 2
+#define PHY_ANALOG_TXRF4_MIOB2G_QAM_MASK 0x0000001c
+#define PHY_ANALOG_TXRF4_MIOB2G_QAM_GET(x) (((x) & 0x0000001c) >> 2)
+#define PHY_ANALOG_TXRF4_MIOB2G_QAM_SET(x) (((x) << 2) & 0x0000001c)
+#define PHY_ANALOG_TXRF4_MIOB2G_PSK_MSB 7
+#define PHY_ANALOG_TXRF4_MIOB2G_PSK_LSB 5
+#define PHY_ANALOG_TXRF4_MIOB2G_PSK_MASK 0x000000e0
+#define PHY_ANALOG_TXRF4_MIOB2G_PSK_GET(x) (((x) & 0x000000e0) >> 5)
+#define PHY_ANALOG_TXRF4_MIOB2G_PSK_SET(x) (((x) << 5) & 0x000000e0)
+#define PHY_ANALOG_TXRF4_MIOB2G_CCK_MSB 10
+#define PHY_ANALOG_TXRF4_MIOB2G_CCK_LSB 8
+#define PHY_ANALOG_TXRF4_MIOB2G_CCK_MASK 0x00000700
+#define PHY_ANALOG_TXRF4_MIOB2G_CCK_GET(x) (((x) & 0x00000700) >> 8)
+#define PHY_ANALOG_TXRF4_MIOB2G_CCK_SET(x) (((x) << 8) & 0x00000700)
+#define PHY_ANALOG_TXRF4_COMP2G_QAM_MSB 13
+#define PHY_ANALOG_TXRF4_COMP2G_QAM_LSB 11
+#define PHY_ANALOG_TXRF4_COMP2G_QAM_MASK 0x00003800
+#define PHY_ANALOG_TXRF4_COMP2G_QAM_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_TXRF4_COMP2G_QAM_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_TXRF4_COMP2G_PSK_MSB 16
+#define PHY_ANALOG_TXRF4_COMP2G_PSK_LSB 14
+#define PHY_ANALOG_TXRF4_COMP2G_PSK_MASK 0x0001c000
+#define PHY_ANALOG_TXRF4_COMP2G_PSK_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_TXRF4_COMP2G_PSK_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_TXRF4_COMP2G_CCK_MSB 19
+#define PHY_ANALOG_TXRF4_COMP2G_CCK_LSB 17
+#define PHY_ANALOG_TXRF4_COMP2G_CCK_MASK 0x000e0000
+#define PHY_ANALOG_TXRF4_COMP2G_CCK_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_TXRF4_COMP2G_CCK_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MSB 22
+#define PHY_ANALOG_TXRF4_AMP2B2G_QAM_LSB 20
+#define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MASK 0x00700000
+#define PHY_ANALOG_TXRF4_AMP2B2G_QAM_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_TXRF4_AMP2B2G_QAM_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MSB 25
+#define PHY_ANALOG_TXRF4_AMP2B2G_PSK_LSB 23
+#define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MASK 0x03800000
+#define PHY_ANALOG_TXRF4_AMP2B2G_PSK_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_TXRF4_AMP2B2G_PSK_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MSB 28
+#define PHY_ANALOG_TXRF4_AMP2B2G_CCK_LSB 26
+#define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MASK 0x1c000000
+#define PHY_ANALOG_TXRF4_AMP2B2G_CCK_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_TXRF4_AMP2B2G_CCK_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_TXRF4_AMP2CAS2G_MSB 31
+#define PHY_ANALOG_TXRF4_AMP2CAS2G_LSB 29
+#define PHY_ANALOG_TXRF4_AMP2CAS2G_MASK 0xe0000000
+#define PHY_ANALOG_TXRF4_AMP2CAS2G_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_TXRF4_AMP2CAS2G_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for TXRF5 */
+#define PHY_ANALOG_TXRF5_ADDRESS 0x00000050
+#define PHY_ANALOG_TXRF5_OFFSET 0x00000050
+#define PHY_ANALOG_TXRF5_SPARE5_MSB 0
+#define PHY_ANALOG_TXRF5_SPARE5_LSB 0
+#define PHY_ANALOG_TXRF5_SPARE5_MASK 0x00000001
+#define PHY_ANALOG_TXRF5_SPARE5_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_TXRF5_SPARE5_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_TXRF5_PAL_LOCKED_MSB 1
+#define PHY_ANALOG_TXRF5_PAL_LOCKED_LSB 1
+#define PHY_ANALOG_TXRF5_PAL_LOCKED_MASK 0x00000002
+#define PHY_ANALOG_TXRF5_PAL_LOCKED_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_TXRF5_FBHI2G_MSB 2
+#define PHY_ANALOG_TXRF5_FBHI2G_LSB 2
+#define PHY_ANALOG_TXRF5_FBHI2G_MASK 0x00000004
+#define PHY_ANALOG_TXRF5_FBHI2G_GET(x) (((x) & 0x00000004) >> 2)
+#define PHY_ANALOG_TXRF5_FBLO2G_MSB 3
+#define PHY_ANALOG_TXRF5_FBLO2G_LSB 3
+#define PHY_ANALOG_TXRF5_FBLO2G_MASK 0x00000008
+#define PHY_ANALOG_TXRF5_FBLO2G_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_TXRF5_NOPALGAIN2G_MSB 4
+#define PHY_ANALOG_TXRF5_NOPALGAIN2G_LSB 4
+#define PHY_ANALOG_TXRF5_NOPALGAIN2G_MASK 0x00000010
+#define PHY_ANALOG_TXRF5_NOPALGAIN2G_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_TXRF5_NOPALGAIN2G_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_TXRF5_ENPACAL2G_MSB 5
+#define PHY_ANALOG_TXRF5_ENPACAL2G_LSB 5
+#define PHY_ANALOG_TXRF5_ENPACAL2G_MASK 0x00000020
+#define PHY_ANALOG_TXRF5_ENPACAL2G_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_TXRF5_ENPACAL2G_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_TXRF5_OFFSET2G_MSB 12
+#define PHY_ANALOG_TXRF5_OFFSET2G_LSB 6
+#define PHY_ANALOG_TXRF5_OFFSET2G_MASK 0x00001fc0
+#define PHY_ANALOG_TXRF5_OFFSET2G_GET(x) (((x) & 0x00001fc0) >> 6)
+#define PHY_ANALOG_TXRF5_OFFSET2G_SET(x) (((x) << 6) & 0x00001fc0)
+#define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_MSB 13
+#define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_LSB 13
+#define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_MASK 0x00002000
+#define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_TXRF5_REFHI2G_MSB 16
+#define PHY_ANALOG_TXRF5_REFHI2G_LSB 14
+#define PHY_ANALOG_TXRF5_REFHI2G_MASK 0x0001c000
+#define PHY_ANALOG_TXRF5_REFHI2G_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_TXRF5_REFHI2G_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_TXRF5_REFLO2G_MSB 19
+#define PHY_ANALOG_TXRF5_REFLO2G_LSB 17
+#define PHY_ANALOG_TXRF5_REFLO2G_MASK 0x000e0000
+#define PHY_ANALOG_TXRF5_REFLO2G_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_TXRF5_REFLO2G_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_TXRF5_PALCLAMP2G_MSB 21
+#define PHY_ANALOG_TXRF5_PALCLAMP2G_LSB 20
+#define PHY_ANALOG_TXRF5_PALCLAMP2G_MASK 0x00300000
+#define PHY_ANALOG_TXRF5_PALCLAMP2G_GET(x) (((x) & 0x00300000) >> 20)
+#define PHY_ANALOG_TXRF5_PALCLAMP2G_SET(x) (((x) << 20) & 0x00300000)
+#define PHY_ANALOG_TXRF5_PK2B2G_QAM_MSB 23
+#define PHY_ANALOG_TXRF5_PK2B2G_QAM_LSB 22
+#define PHY_ANALOG_TXRF5_PK2B2G_QAM_MASK 0x00c00000
+#define PHY_ANALOG_TXRF5_PK2B2G_QAM_GET(x) (((x) & 0x00c00000) >> 22)
+#define PHY_ANALOG_TXRF5_PK2B2G_QAM_SET(x) (((x) << 22) & 0x00c00000)
+#define PHY_ANALOG_TXRF5_PK2B2G_PSK_MSB 25
+#define PHY_ANALOG_TXRF5_PK2B2G_PSK_LSB 24
+#define PHY_ANALOG_TXRF5_PK2B2G_PSK_MASK 0x03000000
+#define PHY_ANALOG_TXRF5_PK2B2G_PSK_GET(x) (((x) & 0x03000000) >> 24)
+#define PHY_ANALOG_TXRF5_PK2B2G_PSK_SET(x) (((x) << 24) & 0x03000000)
+#define PHY_ANALOG_TXRF5_PK2B2G_CCK_MSB 27
+#define PHY_ANALOG_TXRF5_PK2B2G_CCK_LSB 26
+#define PHY_ANALOG_TXRF5_PK2B2G_CCK_MASK 0x0c000000
+#define PHY_ANALOG_TXRF5_PK2B2G_CCK_GET(x) (((x) & 0x0c000000) >> 26)
+#define PHY_ANALOG_TXRF5_PK2B2G_CCK_SET(x) (((x) << 26) & 0x0c000000)
+#define PHY_ANALOG_TXRF5_PK1B2G_QAM_MSB 29
+#define PHY_ANALOG_TXRF5_PK1B2G_QAM_LSB 28
+#define PHY_ANALOG_TXRF5_PK1B2G_QAM_MASK 0x30000000
+#define PHY_ANALOG_TXRF5_PK1B2G_QAM_GET(x) (((x) & 0x30000000) >> 28)
+#define PHY_ANALOG_TXRF5_PK1B2G_QAM_SET(x) (((x) << 28) & 0x30000000)
+#define PHY_ANALOG_TXRF5_PK1B2G_PSK_MSB 31
+#define PHY_ANALOG_TXRF5_PK1B2G_PSK_LSB 30
+#define PHY_ANALOG_TXRF5_PK1B2G_PSK_MASK 0xc0000000
+#define PHY_ANALOG_TXRF5_PK1B2G_PSK_GET(x) (((x) & 0xc0000000) >> 30)
+#define PHY_ANALOG_TXRF5_PK1B2G_PSK_SET(x) (((x) << 30) & 0xc0000000)
+
+/* macros for TXRF6 */
+#define PHY_ANALOG_TXRF6_ADDRESS 0x00000054
+#define PHY_ANALOG_TXRF6_OFFSET 0x00000054
+#define PHY_ANALOG_TXRF6_PALCLKGATE2G_MSB 0
+#define PHY_ANALOG_TXRF6_PALCLKGATE2G_LSB 0
+#define PHY_ANALOG_TXRF6_PALCLKGATE2G_MASK 0x00000001
+#define PHY_ANALOG_TXRF6_PALCLKGATE2G_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_TXRF6_PALCLKGATE2G_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_MSB 8
+#define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_LSB 1
+#define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_MASK 0x000001fe
+#define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_GET(x) (((x) & 0x000001fe) >> 1)
+#define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_SET(x) (((x) << 1) & 0x000001fe)
+#define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_MSB 10
+#define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_LSB 9
+#define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_MASK 0x00000600
+#define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_GET(x) (((x) & 0x00000600) >> 9)
+#define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_SET(x) (((x) << 9) & 0x00000600)
+#define PHY_ANALOG_TXRF6_PALNOFLUCT2G_MSB 11
+#define PHY_ANALOG_TXRF6_PALNOFLUCT2G_LSB 11
+#define PHY_ANALOG_TXRF6_PALNOFLUCT2G_MASK 0x00000800
+#define PHY_ANALOG_TXRF6_PALNOFLUCT2G_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_TXRF6_PALNOFLUCT2G_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_TXRF6_GAINSTEP2G_MSB 14
+#define PHY_ANALOG_TXRF6_GAINSTEP2G_LSB 12
+#define PHY_ANALOG_TXRF6_GAINSTEP2G_MASK 0x00007000
+#define PHY_ANALOG_TXRF6_GAINSTEP2G_GET(x) (((x) & 0x00007000) >> 12)
+#define PHY_ANALOG_TXRF6_GAINSTEP2G_SET(x) (((x) << 12) & 0x00007000)
+#define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MSB 15
+#define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_LSB 15
+#define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MASK 0x00008000
+#define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_TXRF6_CAPDIV_I2G_MSB 19
+#define PHY_ANALOG_TXRF6_CAPDIV_I2G_LSB 16
+#define PHY_ANALOG_TXRF6_CAPDIV_I2G_MASK 0x000f0000
+#define PHY_ANALOG_TXRF6_CAPDIV_I2G_GET(x) (((x) & 0x000f0000) >> 16)
+#define PHY_ANALOG_TXRF6_CAPDIV_I2G_SET(x) (((x) << 16) & 0x000f0000)
+#define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MSB 23
+#define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_LSB 20
+#define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MASK 0x00f00000
+#define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_GET(x) (((x) & 0x00f00000) >> 20)
+#define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_SET(x) (((x) << 20) & 0x00f00000)
+#define PHY_ANALOG_TXRF6_VCMONDELAY2G_MSB 26
+#define PHY_ANALOG_TXRF6_VCMONDELAY2G_LSB 24
+#define PHY_ANALOG_TXRF6_VCMONDELAY2G_MASK 0x07000000
+#define PHY_ANALOG_TXRF6_VCMONDELAY2G_GET(x) (((x) & 0x07000000) >> 24)
+#define PHY_ANALOG_TXRF6_VCMONDELAY2G_SET(x) (((x) << 24) & 0x07000000)
+#define PHY_ANALOG_TXRF6_CAPDIV2G_MSB 30
+#define PHY_ANALOG_TXRF6_CAPDIV2G_LSB 27
+#define PHY_ANALOG_TXRF6_CAPDIV2G_MASK 0x78000000
+#define PHY_ANALOG_TXRF6_CAPDIV2G_GET(x) (((x) & 0x78000000) >> 27)
+#define PHY_ANALOG_TXRF6_CAPDIV2G_SET(x) (((x) << 27) & 0x78000000)
+#define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MSB 31
+#define PHY_ANALOG_TXRF6_CAPDIV2GOVR_LSB 31
+#define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MASK 0x80000000
+#define PHY_ANALOG_TXRF6_CAPDIV2GOVR_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_TXRF6_CAPDIV2GOVR_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for TXRF7 */
+#define PHY_ANALOG_TXRF7_ADDRESS 0x00000058
+#define PHY_ANALOG_TXRF7_OFFSET 0x00000058
+#define PHY_ANALOG_TXRF7_SPARE7_MSB 1
+#define PHY_ANALOG_TXRF7_SPARE7_LSB 0
+#define PHY_ANALOG_TXRF7_SPARE7_MASK 0x00000003
+#define PHY_ANALOG_TXRF7_SPARE7_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_TXRF7_SPARE7_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MSB 7
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_4_LSB 2
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MASK 0x000000fc
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_4_GET(x) (((x) & 0x000000fc) >> 2)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_4_SET(x) (((x) << 2) & 0x000000fc)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MSB 13
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_3_LSB 8
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MASK 0x00003f00
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_3_GET(x) (((x) & 0x00003f00) >> 8)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_3_SET(x) (((x) << 8) & 0x00003f00)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MSB 19
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_2_LSB 14
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MASK 0x000fc000
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_2_GET(x) (((x) & 0x000fc000) >> 14)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_2_SET(x) (((x) << 14) & 0x000fc000)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MSB 25
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_1_LSB 20
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MASK 0x03f00000
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_1_GET(x) (((x) & 0x03f00000) >> 20)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_1_SET(x) (((x) << 20) & 0x03f00000)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MSB 31
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_0_LSB 26
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MASK 0xfc000000
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_0_GET(x) (((x) & 0xfc000000) >> 26)
+#define PHY_ANALOG_TXRF7_PADRVGNTAB_0_SET(x) (((x) << 26) & 0xfc000000)
+
+/* macros for TXRF8 */
+#define PHY_ANALOG_TXRF8_ADDRESS 0x0000005c
+#define PHY_ANALOG_TXRF8_OFFSET 0x0000005c
+#define PHY_ANALOG_TXRF8_SPARE8_MSB 1
+#define PHY_ANALOG_TXRF8_SPARE8_LSB 0
+#define PHY_ANALOG_TXRF8_SPARE8_MASK 0x00000003
+#define PHY_ANALOG_TXRF8_SPARE8_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_TXRF8_SPARE8_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MSB 7
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_9_LSB 2
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MASK 0x000000fc
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_9_GET(x) (((x) & 0x000000fc) >> 2)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_9_SET(x) (((x) << 2) & 0x000000fc)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MSB 13
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_8_LSB 8
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MASK 0x00003f00
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_8_GET(x) (((x) & 0x00003f00) >> 8)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_8_SET(x) (((x) << 8) & 0x00003f00)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MSB 19
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_7_LSB 14
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MASK 0x000fc000
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_7_GET(x) (((x) & 0x000fc000) >> 14)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_7_SET(x) (((x) << 14) & 0x000fc000)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MSB 25
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_6_LSB 20
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MASK 0x03f00000
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_6_GET(x) (((x) & 0x03f00000) >> 20)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_6_SET(x) (((x) << 20) & 0x03f00000)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MSB 31
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_5_LSB 26
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MASK 0xfc000000
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_5_GET(x) (((x) & 0xfc000000) >> 26)
+#define PHY_ANALOG_TXRF8_PADRVGNTAB_5_SET(x) (((x) << 26) & 0xfc000000)
+
+/* macros for TXRF9 */
+#define PHY_ANALOG_TXRF9_ADDRESS 0x00000060
+#define PHY_ANALOG_TXRF9_OFFSET 0x00000060
+#define PHY_ANALOG_TXRF9_SPARE9_MSB 1
+#define PHY_ANALOG_TXRF9_SPARE9_LSB 0
+#define PHY_ANALOG_TXRF9_SPARE9_MASK 0x00000003
+#define PHY_ANALOG_TXRF9_SPARE9_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_TXRF9_SPARE9_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MSB 7
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_14_LSB 2
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MASK 0x000000fc
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_14_GET(x) (((x) & 0x000000fc) >> 2)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_14_SET(x) (((x) << 2) & 0x000000fc)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MSB 13
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_13_LSB 8
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MASK 0x00003f00
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_13_GET(x) (((x) & 0x00003f00) >> 8)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_13_SET(x) (((x) << 8) & 0x00003f00)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MSB 19
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_12_LSB 14
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MASK 0x000fc000
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_12_GET(x) (((x) & 0x000fc000) >> 14)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_12_SET(x) (((x) << 14) & 0x000fc000)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MSB 25
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_11_LSB 20
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MASK 0x03f00000
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_11_GET(x) (((x) & 0x03f00000) >> 20)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_11_SET(x) (((x) << 20) & 0x03f00000)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MSB 31
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_10_LSB 26
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MASK 0xfc000000
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_10_GET(x) (((x) & 0xfc000000) >> 26)
+#define PHY_ANALOG_TXRF9_PADRVGNTAB_10_SET(x) (((x) << 26) & 0xfc000000)
+
+/* macros for TXRF10 */
+#define PHY_ANALOG_TXRF10_ADDRESS 0x00000064
+#define PHY_ANALOG_TXRF10_OFFSET 0x00000064
+#define PHY_ANALOG_TXRF10_SPARE10_MSB 2
+#define PHY_ANALOG_TXRF10_SPARE10_LSB 0
+#define PHY_ANALOG_TXRF10_SPARE10_MASK 0x00000007
+#define PHY_ANALOG_TXRF10_SPARE10_GET(x) (((x) & 0x00000007) >> 0)
+#define PHY_ANALOG_TXRF10_SPARE10_SET(x) (((x) << 0) & 0x00000007)
+#define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MSB 3
+#define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_LSB 3
+#define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MASK 0x00000008
+#define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_TXRF10_D3B5GCALTX_MSB 6
+#define PHY_ANALOG_TXRF10_D3B5GCALTX_LSB 4
+#define PHY_ANALOG_TXRF10_D3B5GCALTX_MASK 0x00000070
+#define PHY_ANALOG_TXRF10_D3B5GCALTX_GET(x) (((x) & 0x00000070) >> 4)
+#define PHY_ANALOG_TXRF10_D3B5GCALTX_SET(x) (((x) << 4) & 0x00000070)
+#define PHY_ANALOG_TXRF10_D4B5GCALTX_MSB 9
+#define PHY_ANALOG_TXRF10_D4B5GCALTX_LSB 7
+#define PHY_ANALOG_TXRF10_D4B5GCALTX_MASK 0x00000380
+#define PHY_ANALOG_TXRF10_D4B5GCALTX_GET(x) (((x) & 0x00000380) >> 7)
+#define PHY_ANALOG_TXRF10_D4B5GCALTX_SET(x) (((x) << 7) & 0x00000380)
+#define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MSB 16
+#define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_LSB 10
+#define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MASK 0x0001fc00
+#define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_GET(x) (((x) & 0x0001fc00) >> 10)
+#define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_SET(x) (((x) << 10) & 0x0001fc00)
+#define PHY_ANALOG_TXRF10_DB2GCALTX_MSB 19
+#define PHY_ANALOG_TXRF10_DB2GCALTX_LSB 17
+#define PHY_ANALOG_TXRF10_DB2GCALTX_MASK 0x000e0000
+#define PHY_ANALOG_TXRF10_DB2GCALTX_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_TXRF10_DB2GCALTX_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_TXRF10_CALTXSHIFT_MSB 20
+#define PHY_ANALOG_TXRF10_CALTXSHIFT_LSB 20
+#define PHY_ANALOG_TXRF10_CALTXSHIFT_MASK 0x00100000
+#define PHY_ANALOG_TXRF10_CALTXSHIFT_GET(x) (((x) & 0x00100000) >> 20)
+#define PHY_ANALOG_TXRF10_CALTXSHIFT_SET(x) (((x) << 20) & 0x00100000)
+#define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MSB 21
+#define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_LSB 21
+#define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MASK 0x00200000
+#define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_GET(x) (((x) & 0x00200000) >> 21)
+#define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_SET(x) (((x) << 21) & 0x00200000)
+#define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_MSB 27
+#define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_LSB 22
+#define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_MASK 0x0fc00000
+#define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_GET(x) (((x) & 0x0fc00000) >> 22)
+#define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_MSB 31
+#define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_LSB 28
+#define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_MASK 0xf0000000
+#define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_GET(x) (((x) & 0xf0000000) >> 28)
+
+/* macros for TXRF11 */
+#define PHY_ANALOG_TXRF11_ADDRESS 0x00000068
+#define PHY_ANALOG_TXRF11_OFFSET 0x00000068
+#define PHY_ANALOG_TXRF11_SPARE11_MSB 1
+#define PHY_ANALOG_TXRF11_SPARE11_LSB 0
+#define PHY_ANALOG_TXRF11_SPARE11_MASK 0x00000003
+#define PHY_ANALOG_TXRF11_SPARE11_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_TXRF11_SPARE11_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MSB 4
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_LSB 2
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MASK 0x0000001c
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_GET(x) (((x) & 0x0000001c) >> 2)
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_SET(x) (((x) << 2) & 0x0000001c)
+#define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MSB 7
+#define PHY_ANALOG_TXRF11_PWD_IR25PA2G_LSB 5
+#define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MASK 0x000000e0
+#define PHY_ANALOG_TXRF11_PWD_IR25PA2G_GET(x) (((x) & 0x000000e0) >> 5)
+#define PHY_ANALOG_TXRF11_PWD_IR25PA2G_SET(x) (((x) << 5) & 0x000000e0)
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MSB 10
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_LSB 8
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MASK 0x00000700
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_GET(x) (((x) & 0x00000700) >> 8)
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_SET(x) (((x) << 8) & 0x00000700)
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MSB 13
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_LSB 11
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MASK 0x00003800
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_TXRF11_PWD_ICSPARE_MSB 16
+#define PHY_ANALOG_TXRF11_PWD_ICSPARE_LSB 14
+#define PHY_ANALOG_TXRF11_PWD_ICSPARE_MASK 0x0001c000
+#define PHY_ANALOG_TXRF11_PWD_ICSPARE_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_TXRF11_PWD_ICSPARE_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_MSB 19
+#define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_LSB 17
+#define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_MASK 0x000e0000
+#define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MSB 22
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_LSB 20
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MASK 0x00700000
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MSB 25
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_LSB 23
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MASK 0x03800000
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MSB 28
+#define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_LSB 26
+#define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MASK 0x1c000000
+#define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MSB 31
+#define PHY_ANALOG_TXRF11_PWD_IC25PA2G_LSB 29
+#define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MASK 0xe0000000
+#define PHY_ANALOG_TXRF11_PWD_IC25PA2G_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_TXRF11_PWD_IC25PA2G_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for TXRF12 */
+#define PHY_ANALOG_TXRF12_ADDRESS 0x0000006c
+#define PHY_ANALOG_TXRF12_OFFSET 0x0000006c
+#define PHY_ANALOG_TXRF12_SPARE12_2_MSB 7
+#define PHY_ANALOG_TXRF12_SPARE12_2_LSB 0
+#define PHY_ANALOG_TXRF12_SPARE12_2_MASK 0x000000ff
+#define PHY_ANALOG_TXRF12_SPARE12_2_GET(x) (((x) & 0x000000ff) >> 0)
+#define PHY_ANALOG_TXRF12_SPARE12_1_MSB 9
+#define PHY_ANALOG_TXRF12_SPARE12_1_LSB 8
+#define PHY_ANALOG_TXRF12_SPARE12_1_MASK 0x00000300
+#define PHY_ANALOG_TXRF12_SPARE12_1_GET(x) (((x) & 0x00000300) >> 8)
+#define PHY_ANALOG_TXRF12_SPARE12_1_SET(x) (((x) << 8) & 0x00000300)
+#define PHY_ANALOG_TXRF12_ATBSEL5G_MSB 13
+#define PHY_ANALOG_TXRF12_ATBSEL5G_LSB 10
+#define PHY_ANALOG_TXRF12_ATBSEL5G_MASK 0x00003c00
+#define PHY_ANALOG_TXRF12_ATBSEL5G_GET(x) (((x) & 0x00003c00) >> 10)
+#define PHY_ANALOG_TXRF12_ATBSEL5G_SET(x) (((x) << 10) & 0x00003c00)
+#define PHY_ANALOG_TXRF12_ATBSEL2G_MSB 16
+#define PHY_ANALOG_TXRF12_ATBSEL2G_LSB 14
+#define PHY_ANALOG_TXRF12_ATBSEL2G_MASK 0x0001c000
+#define PHY_ANALOG_TXRF12_ATBSEL2G_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_TXRF12_ATBSEL2G_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_TXRF12_PWD_IRSPARE_MSB 19
+#define PHY_ANALOG_TXRF12_PWD_IRSPARE_LSB 17
+#define PHY_ANALOG_TXRF12_PWD_IRSPARE_MASK 0x000e0000
+#define PHY_ANALOG_TXRF12_PWD_IRSPARE_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_TXRF12_PWD_IRSPARE_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_MSB 22
+#define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_LSB 20
+#define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_MASK 0x00700000
+#define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MSB 25
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_LSB 23
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MASK 0x03800000
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MSB 28
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_LSB 26
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MASK 0x1c000000
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_MSB 31
+#define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_LSB 29
+#define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_MASK 0xe0000000
+#define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for SYNTH1 */
+#define PHY_ANALOG_SYNTH1_ADDRESS 0x00000080
+#define PHY_ANALOG_SYNTH1_OFFSET 0x00000080
+#define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MSB 2
+#define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_LSB 0
+#define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MASK 0x00000007
+#define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_GET(x) (((x) & 0x00000007) >> 0)
+#define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_SET(x) (((x) << 0) & 0x00000007)
+#define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MSB 5
+#define PHY_ANALOG_SYNTH1_SEL_VCOABUS_LSB 3
+#define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MASK 0x00000038
+#define PHY_ANALOG_SYNTH1_SEL_VCOABUS_GET(x) (((x) & 0x00000038) >> 3)
+#define PHY_ANALOG_SYNTH1_SEL_VCOABUS_SET(x) (((x) << 3) & 0x00000038)
+#define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MSB 6
+#define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_LSB 6
+#define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MASK 0x00000040
+#define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MSB 7
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_LSB 7
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MASK 0x00000080
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MSB 8
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_LSB 8
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MASK 0x00000100
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MSB 9
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_LSB 9
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MASK 0x00000200
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_SYNTH1_MONITOR_REF_MSB 10
+#define PHY_ANALOG_SYNTH1_MONITOR_REF_LSB 10
+#define PHY_ANALOG_SYNTH1_MONITOR_REF_MASK 0x00000400
+#define PHY_ANALOG_SYNTH1_MONITOR_REF_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_SYNTH1_MONITOR_REF_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_MSB 11
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_LSB 11
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_MASK 0x00000800
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_SYNTH1_MONITOR_FB_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MSB 12
+#define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_LSB 12
+#define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MASK 0x00001000
+#define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_SYNTH1_PWUP_PD_MSB 15
+#define PHY_ANALOG_SYNTH1_PWUP_PD_LSB 13
+#define PHY_ANALOG_SYNTH1_PWUP_PD_MASK 0x0000e000
+#define PHY_ANALOG_SYNTH1_PWUP_PD_GET(x) (((x) & 0x0000e000) >> 13)
+#define PHY_ANALOG_SYNTH1_PWUP_PD_SET(x) (((x) << 13) & 0x0000e000)
+#define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MSB 16
+#define PHY_ANALOG_SYNTH1_PWD_VCOBUF_LSB 16
+#define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MASK 0x00010000
+#define PHY_ANALOG_SYNTH1_PWD_VCOBUF_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_SYNTH1_PWD_VCOBUF_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MSB 18
+#define PHY_ANALOG_SYNTH1_VCOBUFGAIN_LSB 17
+#define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MASK 0x00060000
+#define PHY_ANALOG_SYNTH1_VCOBUFGAIN_GET(x) (((x) & 0x00060000) >> 17)
+#define PHY_ANALOG_SYNTH1_VCOBUFGAIN_SET(x) (((x) << 17) & 0x00060000)
+#define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MSB 20
+#define PHY_ANALOG_SYNTH1_VCOREGLEVEL_LSB 19
+#define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MASK 0x00180000
+#define PHY_ANALOG_SYNTH1_VCOREGLEVEL_GET(x) (((x) & 0x00180000) >> 19)
+#define PHY_ANALOG_SYNTH1_VCOREGLEVEL_SET(x) (((x) << 19) & 0x00180000)
+#define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MSB 21
+#define PHY_ANALOG_SYNTH1_VCOREGBYPASS_LSB 21
+#define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MASK 0x00200000
+#define PHY_ANALOG_SYNTH1_VCOREGBYPASS_GET(x) (((x) & 0x00200000) >> 21)
+#define PHY_ANALOG_SYNTH1_VCOREGBYPASS_SET(x) (((x) << 21) & 0x00200000)
+#define PHY_ANALOG_SYNTH1_PWUP_LOREF_MSB 22
+#define PHY_ANALOG_SYNTH1_PWUP_LOREF_LSB 22
+#define PHY_ANALOG_SYNTH1_PWUP_LOREF_MASK 0x00400000
+#define PHY_ANALOG_SYNTH1_PWUP_LOREF_GET(x) (((x) & 0x00400000) >> 22)
+#define PHY_ANALOG_SYNTH1_PWUP_LOREF_SET(x) (((x) << 22) & 0x00400000)
+#define PHY_ANALOG_SYNTH1_PWD_LOMIX_MSB 23
+#define PHY_ANALOG_SYNTH1_PWD_LOMIX_LSB 23
+#define PHY_ANALOG_SYNTH1_PWD_LOMIX_MASK 0x00800000
+#define PHY_ANALOG_SYNTH1_PWD_LOMIX_GET(x) (((x) & 0x00800000) >> 23)
+#define PHY_ANALOG_SYNTH1_PWD_LOMIX_SET(x) (((x) << 23) & 0x00800000)
+#define PHY_ANALOG_SYNTH1_PWD_LODIV_MSB 24
+#define PHY_ANALOG_SYNTH1_PWD_LODIV_LSB 24
+#define PHY_ANALOG_SYNTH1_PWD_LODIV_MASK 0x01000000
+#define PHY_ANALOG_SYNTH1_PWD_LODIV_GET(x) (((x) & 0x01000000) >> 24)
+#define PHY_ANALOG_SYNTH1_PWD_LODIV_SET(x) (((x) << 24) & 0x01000000)
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MSB 25
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_LSB 25
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MASK 0x02000000
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_GET(x) (((x) & 0x02000000) >> 25)
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_SET(x) (((x) << 25) & 0x02000000)
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MSB 26
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_LSB 26
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MASK 0x04000000
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_GET(x) (((x) & 0x04000000) >> 26)
+#define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_SET(x) (((x) << 26) & 0x04000000)
+#define PHY_ANALOG_SYNTH1_PWD_PRESC_MSB 27
+#define PHY_ANALOG_SYNTH1_PWD_PRESC_LSB 27
+#define PHY_ANALOG_SYNTH1_PWD_PRESC_MASK 0x08000000
+#define PHY_ANALOG_SYNTH1_PWD_PRESC_GET(x) (((x) & 0x08000000) >> 27)
+#define PHY_ANALOG_SYNTH1_PWD_PRESC_SET(x) (((x) << 27) & 0x08000000)
+#define PHY_ANALOG_SYNTH1_PWD_VCO_MSB 28
+#define PHY_ANALOG_SYNTH1_PWD_VCO_LSB 28
+#define PHY_ANALOG_SYNTH1_PWD_VCO_MASK 0x10000000
+#define PHY_ANALOG_SYNTH1_PWD_VCO_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_SYNTH1_PWD_VCO_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_SYNTH1_PWD_VCMON_MSB 29
+#define PHY_ANALOG_SYNTH1_PWD_VCMON_LSB 29
+#define PHY_ANALOG_SYNTH1_PWD_VCMON_MASK 0x20000000
+#define PHY_ANALOG_SYNTH1_PWD_VCMON_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_SYNTH1_PWD_VCMON_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_SYNTH1_PWD_CP_MSB 30
+#define PHY_ANALOG_SYNTH1_PWD_CP_LSB 30
+#define PHY_ANALOG_SYNTH1_PWD_CP_MASK 0x40000000
+#define PHY_ANALOG_SYNTH1_PWD_CP_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_SYNTH1_PWD_CP_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_SYNTH1_PWD_BIAS_MSB 31
+#define PHY_ANALOG_SYNTH1_PWD_BIAS_LSB 31
+#define PHY_ANALOG_SYNTH1_PWD_BIAS_MASK 0x80000000
+#define PHY_ANALOG_SYNTH1_PWD_BIAS_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_SYNTH1_PWD_BIAS_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for SYNTH2 */
+#define PHY_ANALOG_SYNTH2_ADDRESS 0x00000084
+#define PHY_ANALOG_SYNTH2_OFFSET 0x00000084
+#define PHY_ANALOG_SYNTH2_CAPRANGE3_MSB 3
+#define PHY_ANALOG_SYNTH2_CAPRANGE3_LSB 0
+#define PHY_ANALOG_SYNTH2_CAPRANGE3_MASK 0x0000000f
+#define PHY_ANALOG_SYNTH2_CAPRANGE3_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_SYNTH2_CAPRANGE3_SET(x) (((x) << 0) & 0x0000000f)
+#define PHY_ANALOG_SYNTH2_CAPRANGE2_MSB 7
+#define PHY_ANALOG_SYNTH2_CAPRANGE2_LSB 4
+#define PHY_ANALOG_SYNTH2_CAPRANGE2_MASK 0x000000f0
+#define PHY_ANALOG_SYNTH2_CAPRANGE2_GET(x) (((x) & 0x000000f0) >> 4)
+#define PHY_ANALOG_SYNTH2_CAPRANGE2_SET(x) (((x) << 4) & 0x000000f0)
+#define PHY_ANALOG_SYNTH2_CAPRANGE1_MSB 11
+#define PHY_ANALOG_SYNTH2_CAPRANGE1_LSB 8
+#define PHY_ANALOG_SYNTH2_CAPRANGE1_MASK 0x00000f00
+#define PHY_ANALOG_SYNTH2_CAPRANGE1_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_SYNTH2_CAPRANGE1_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_MSB 15
+#define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_LSB 12
+#define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_MASK 0x0000f000
+#define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_GET(x) (((x) & 0x0000f000) >> 12)
+#define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_SET(x) (((x) << 12) & 0x0000f000)
+#define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_MSB 16
+#define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_LSB 16
+#define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_MASK 0x00010000
+#define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MSB 17
+#define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_LSB 17
+#define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MASK 0x00020000
+#define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_SET(x) (((x) << 17) & 0x00020000)
+#define PHY_ANALOG_SYNTH2_CPBIAS_INTN_MSB 19
+#define PHY_ANALOG_SYNTH2_CPBIAS_INTN_LSB 18
+#define PHY_ANALOG_SYNTH2_CPBIAS_INTN_MASK 0x000c0000
+#define PHY_ANALOG_SYNTH2_CPBIAS_INTN_GET(x) (((x) & 0x000c0000) >> 18)
+#define PHY_ANALOG_SYNTH2_CPBIAS_INTN_SET(x) (((x) << 18) & 0x000c0000)
+#define PHY_ANALOG_SYNTH2_VC_LOW_REF_MSB 22
+#define PHY_ANALOG_SYNTH2_VC_LOW_REF_LSB 20
+#define PHY_ANALOG_SYNTH2_VC_LOW_REF_MASK 0x00700000
+#define PHY_ANALOG_SYNTH2_VC_LOW_REF_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_SYNTH2_VC_LOW_REF_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_SYNTH2_VC_MID_REF_MSB 25
+#define PHY_ANALOG_SYNTH2_VC_MID_REF_LSB 23
+#define PHY_ANALOG_SYNTH2_VC_MID_REF_MASK 0x03800000
+#define PHY_ANALOG_SYNTH2_VC_MID_REF_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_SYNTH2_VC_MID_REF_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_SYNTH2_VC_HI_REF_MSB 28
+#define PHY_ANALOG_SYNTH2_VC_HI_REF_LSB 26
+#define PHY_ANALOG_SYNTH2_VC_HI_REF_MASK 0x1c000000
+#define PHY_ANALOG_SYNTH2_VC_HI_REF_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_SYNTH2_VC_HI_REF_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_SYNTH2_VC_CAL_REF_MSB 31
+#define PHY_ANALOG_SYNTH2_VC_CAL_REF_LSB 29
+#define PHY_ANALOG_SYNTH2_VC_CAL_REF_MASK 0xe0000000
+#define PHY_ANALOG_SYNTH2_VC_CAL_REF_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_SYNTH2_VC_CAL_REF_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for SYNTH3 */
+#define PHY_ANALOG_SYNTH3_ADDRESS 0x00000088
+#define PHY_ANALOG_SYNTH3_OFFSET 0x00000088
+#define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MSB 5
+#define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_LSB 0
+#define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MASK 0x0000003f
+#define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_GET(x) (((x) & 0x0000003f) >> 0)
+#define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_SET(x) (((x) << 0) & 0x0000003f)
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MSB 11
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_LSB 6
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MASK 0x00000fc0
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_GET(x) (((x) & 0x00000fc0) >> 6)
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_SET(x) (((x) << 6) & 0x00000fc0)
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MSB 17
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_LSB 12
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MASK 0x0003f000
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_GET(x) (((x) & 0x0003f000) >> 12)
+#define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_SET(x) (((x) << 12) & 0x0003f000)
+#define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MSB 23
+#define PHY_ANALOG_SYNTH3_WAIT_PWRUP_LSB 18
+#define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MASK 0x00fc0000
+#define PHY_ANALOG_SYNTH3_WAIT_PWRUP_GET(x) (((x) & 0x00fc0000) >> 18)
+#define PHY_ANALOG_SYNTH3_WAIT_PWRUP_SET(x) (((x) << 18) & 0x00fc0000)
+#define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MSB 29
+#define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_LSB 24
+#define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MASK 0x3f000000
+#define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_GET(x) (((x) & 0x3f000000) >> 24)
+#define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_SET(x) (((x) << 24) & 0x3f000000)
+#define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MSB 30
+#define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_LSB 30
+#define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MASK 0x40000000
+#define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MSB 31
+#define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_LSB 31
+#define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MASK 0x80000000
+#define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for SYNTH4 */
+#define PHY_ANALOG_SYNTH4_ADDRESS 0x0000008c
+#define PHY_ANALOG_SYNTH4_OFFSET 0x0000008c
+#define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MSB 0
+#define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_LSB 0
+#define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MASK 0x00000001
+#define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MSB 1
+#define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_LSB 1
+#define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MASK 0x00000002
+#define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MSB 3
+#define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_LSB 2
+#define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MASK 0x0000000c
+#define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_GET(x) (((x) & 0x0000000c) >> 2)
+#define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_SET(x) (((x) << 2) & 0x0000000c)
+#define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MSB 4
+#define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_LSB 4
+#define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MASK 0x00000010
+#define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MSB 5
+#define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_LSB 5
+#define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MASK 0x00000020
+#define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_SYNTH4_SDM_DITHER1_MSB 7
+#define PHY_ANALOG_SYNTH4_SDM_DITHER1_LSB 6
+#define PHY_ANALOG_SYNTH4_SDM_DITHER1_MASK 0x000000c0
+#define PHY_ANALOG_SYNTH4_SDM_DITHER1_GET(x) (((x) & 0x000000c0) >> 6)
+#define PHY_ANALOG_SYNTH4_SDM_DITHER1_SET(x) (((x) << 6) & 0x000000c0)
+#define PHY_ANALOG_SYNTH4_SDM_MODE_MSB 8
+#define PHY_ANALOG_SYNTH4_SDM_MODE_LSB 8
+#define PHY_ANALOG_SYNTH4_SDM_MODE_MASK 0x00000100
+#define PHY_ANALOG_SYNTH4_SDM_MODE_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_SYNTH4_SDM_MODE_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_SYNTH4_SDM_DISABLE_MSB 9
+#define PHY_ANALOG_SYNTH4_SDM_DISABLE_LSB 9
+#define PHY_ANALOG_SYNTH4_SDM_DISABLE_MASK 0x00000200
+#define PHY_ANALOG_SYNTH4_SDM_DISABLE_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_SYNTH4_SDM_DISABLE_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_SYNTH4_RESET_PRESC_MSB 10
+#define PHY_ANALOG_SYNTH4_RESET_PRESC_LSB 10
+#define PHY_ANALOG_SYNTH4_RESET_PRESC_MASK 0x00000400
+#define PHY_ANALOG_SYNTH4_RESET_PRESC_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_SYNTH4_RESET_PRESC_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_SYNTH4_PRESCSEL_MSB 12
+#define PHY_ANALOG_SYNTH4_PRESCSEL_LSB 11
+#define PHY_ANALOG_SYNTH4_PRESCSEL_MASK 0x00001800
+#define PHY_ANALOG_SYNTH4_PRESCSEL_GET(x) (((x) & 0x00001800) >> 11)
+#define PHY_ANALOG_SYNTH4_PRESCSEL_SET(x) (((x) << 11) & 0x00001800)
+#define PHY_ANALOG_SYNTH4_PFD_DISABLE_MSB 13
+#define PHY_ANALOG_SYNTH4_PFD_DISABLE_LSB 13
+#define PHY_ANALOG_SYNTH4_PFD_DISABLE_MASK 0x00002000
+#define PHY_ANALOG_SYNTH4_PFD_DISABLE_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_SYNTH4_PFD_DISABLE_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MSB 14
+#define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_LSB 14
+#define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MASK 0x00004000
+#define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MSB 15
+#define PHY_ANALOG_SYNTH4_FORCE_LO_ON_LSB 15
+#define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MASK 0x00008000
+#define PHY_ANALOG_SYNTH4_FORCE_LO_ON_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_SYNTH4_FORCE_LO_ON_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MSB 16
+#define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_LSB 16
+#define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MASK 0x00010000
+#define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MSB 17
+#define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_LSB 17
+#define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MASK 0x00020000
+#define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_SET(x) (((x) << 17) & 0x00020000)
+#define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MSB 25
+#define PHY_ANALOG_SYNTH4_VCOCAP_OVR_LSB 18
+#define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MASK 0x03fc0000
+#define PHY_ANALOG_SYNTH4_VCOCAP_OVR_GET(x) (((x) & 0x03fc0000) >> 18)
+#define PHY_ANALOG_SYNTH4_VCOCAP_OVR_SET(x) (((x) << 18) & 0x03fc0000)
+#define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MSB 26
+#define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_LSB 26
+#define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MASK 0x04000000
+#define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_GET(x) (((x) & 0x04000000) >> 26)
+#define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_SET(x) (((x) << 26) & 0x04000000)
+#define PHY_ANALOG_SYNTH4_FORCE_PINVC_MSB 27
+#define PHY_ANALOG_SYNTH4_FORCE_PINVC_LSB 27
+#define PHY_ANALOG_SYNTH4_FORCE_PINVC_MASK 0x08000000
+#define PHY_ANALOG_SYNTH4_FORCE_PINVC_GET(x) (((x) & 0x08000000) >> 27)
+#define PHY_ANALOG_SYNTH4_FORCE_PINVC_SET(x) (((x) << 27) & 0x08000000)
+#define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MSB 28
+#define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_LSB 28
+#define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MASK 0x10000000
+#define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MSB 29
+#define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_LSB 29
+#define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MASK 0x20000000
+#define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MSB 30
+#define PHY_ANALOG_SYNTH4_DIS_LOSTVC_LSB 30
+#define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MASK 0x40000000
+#define PHY_ANALOG_SYNTH4_DIS_LOSTVC_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_SYNTH4_DIS_LOSTVC_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MSB 31
+#define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_LSB 31
+#define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MASK 0x80000000
+#define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for SYNTH5 */
+#define PHY_ANALOG_SYNTH5_ADDRESS 0x00000090
+#define PHY_ANALOG_SYNTH5_OFFSET 0x00000090
+#define PHY_ANALOG_SYNTH5_VCOBIAS_MSB 1
+#define PHY_ANALOG_SYNTH5_VCOBIAS_LSB 0
+#define PHY_ANALOG_SYNTH5_VCOBIAS_MASK 0x00000003
+#define PHY_ANALOG_SYNTH5_VCOBIAS_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_SYNTH5_VCOBIAS_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MSB 4
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_LSB 2
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MASK 0x0000001c
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_GET(x) (((x) & 0x0000001c) >> 2)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_SET(x) (((x) << 2) & 0x0000001c)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MSB 7
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_LSB 5
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MASK 0x000000e0
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_GET(x) (((x) & 0x000000e0) >> 5)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_SET(x) (((x) << 5) & 0x000000e0)
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MSB 10
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_LSB 8
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MASK 0x00000700
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_GET(x) (((x) & 0x00000700) >> 8)
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_SET(x) (((x) << 8) & 0x00000700)
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MSB 13
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_LSB 11
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MASK 0x00003800
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MSB 14
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_LSB 14
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MASK 0x00004000
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MSB 17
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_LSB 15
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MASK 0x00038000
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_GET(x) (((x) & 0x00038000) >> 15)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_SET(x) (((x) << 15) & 0x00038000)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MSB 20
+#define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_LSB 18
+#define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MASK 0x001c0000
+#define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_GET(x) (((x) & 0x001c0000) >> 18)
+#define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_SET(x) (((x) << 18) & 0x001c0000)
+#define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MSB 23
+#define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_LSB 21
+#define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MASK 0x00e00000
+#define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_GET(x) (((x) & 0x00e00000) >> 21)
+#define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_SET(x) (((x) << 21) & 0x00e00000)
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MSB 26
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_LSB 24
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MASK 0x07000000
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_GET(x) (((x) & 0x07000000) >> 24)
+#define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_SET(x) (((x) << 24) & 0x07000000)
+#define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MSB 29
+#define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_LSB 27
+#define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MASK 0x38000000
+#define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_GET(x) (((x) & 0x38000000) >> 27)
+#define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_SET(x) (((x) << 27) & 0x38000000)
+#define PHY_ANALOG_SYNTH5_SDM_DITHER2_MSB 31
+#define PHY_ANALOG_SYNTH5_SDM_DITHER2_LSB 30
+#define PHY_ANALOG_SYNTH5_SDM_DITHER2_MASK 0xc0000000
+#define PHY_ANALOG_SYNTH5_SDM_DITHER2_GET(x) (((x) & 0xc0000000) >> 30)
+#define PHY_ANALOG_SYNTH5_SDM_DITHER2_SET(x) (((x) << 30) & 0xc0000000)
+
+/* macros for SYNTH6 */
+#define PHY_ANALOG_SYNTH6_ADDRESS 0x00000094
+#define PHY_ANALOG_SYNTH6_OFFSET 0x00000094
+#define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MSB 1
+#define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_LSB 0
+#define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MASK 0x00000003
+#define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_SYNTH6_LOOP_IP_MSB 8
+#define PHY_ANALOG_SYNTH6_LOOP_IP_LSB 2
+#define PHY_ANALOG_SYNTH6_LOOP_IP_MASK 0x000001fc
+#define PHY_ANALOG_SYNTH6_LOOP_IP_GET(x) (((x) & 0x000001fc) >> 2)
+#define PHY_ANALOG_SYNTH6_VC2LOW_MSB 9
+#define PHY_ANALOG_SYNTH6_VC2LOW_LSB 9
+#define PHY_ANALOG_SYNTH6_VC2LOW_MASK 0x00000200
+#define PHY_ANALOG_SYNTH6_VC2LOW_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_SYNTH6_VC2HIGH_MSB 10
+#define PHY_ANALOG_SYNTH6_VC2HIGH_LSB 10
+#define PHY_ANALOG_SYNTH6_VC2HIGH_MASK 0x00000400
+#define PHY_ANALOG_SYNTH6_VC2HIGH_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_SYNTH6_RESET_SDM_B_MSB 11
+#define PHY_ANALOG_SYNTH6_RESET_SDM_B_LSB 11
+#define PHY_ANALOG_SYNTH6_RESET_SDM_B_MASK 0x00000800
+#define PHY_ANALOG_SYNTH6_RESET_SDM_B_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MSB 12
+#define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_LSB 12
+#define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MASK 0x00001000
+#define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_SYNTH6_RESET_PFD_MSB 13
+#define PHY_ANALOG_SYNTH6_RESET_PFD_LSB 13
+#define PHY_ANALOG_SYNTH6_RESET_PFD_MASK 0x00002000
+#define PHY_ANALOG_SYNTH6_RESET_PFD_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_SYNTH6_RESET_RFD_MSB 14
+#define PHY_ANALOG_SYNTH6_RESET_RFD_LSB 14
+#define PHY_ANALOG_SYNTH6_RESET_RFD_MASK 0x00004000
+#define PHY_ANALOG_SYNTH6_RESET_RFD_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_SYNTH6_SHORT_R_MSB 15
+#define PHY_ANALOG_SYNTH6_SHORT_R_LSB 15
+#define PHY_ANALOG_SYNTH6_SHORT_R_MASK 0x00008000
+#define PHY_ANALOG_SYNTH6_SHORT_R_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MSB 23
+#define PHY_ANALOG_SYNTH6_VCO_CAP_ST_LSB 16
+#define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MASK 0x00ff0000
+#define PHY_ANALOG_SYNTH6_VCO_CAP_ST_GET(x) (((x) & 0x00ff0000) >> 16)
+#define PHY_ANALOG_SYNTH6_PIN_VC_MSB 24
+#define PHY_ANALOG_SYNTH6_PIN_VC_LSB 24
+#define PHY_ANALOG_SYNTH6_PIN_VC_MASK 0x01000000
+#define PHY_ANALOG_SYNTH6_PIN_VC_GET(x) (((x) & 0x01000000) >> 24)
+#define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MSB 25
+#define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_LSB 25
+#define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MASK 0x02000000
+#define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_GET(x) (((x) & 0x02000000) >> 25)
+#define PHY_ANALOG_SYNTH6_CAP_SEARCH_MSB 26
+#define PHY_ANALOG_SYNTH6_CAP_SEARCH_LSB 26
+#define PHY_ANALOG_SYNTH6_CAP_SEARCH_MASK 0x04000000
+#define PHY_ANALOG_SYNTH6_CAP_SEARCH_GET(x) (((x) & 0x04000000) >> 26)
+#define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MSB 30
+#define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_LSB 27
+#define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MASK 0x78000000
+#define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_GET(x) (((x) & 0x78000000) >> 27)
+#define PHY_ANALOG_SYNTH6_SYNTH_ON_MSB 31
+#define PHY_ANALOG_SYNTH6_SYNTH_ON_LSB 31
+#define PHY_ANALOG_SYNTH6_SYNTH_ON_MASK 0x80000000
+#define PHY_ANALOG_SYNTH6_SYNTH_ON_GET(x) (((x) & 0x80000000) >> 31)
+
+/* macros for SYNTH7 */
+#define PHY_ANALOG_SYNTH7_ADDRESS 0x00000098
+#define PHY_ANALOG_SYNTH7_OFFSET 0x00000098
+#define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MSB 0
+#define PHY_ANALOG_SYNTH7_OVRCHANDECODER_LSB 0
+#define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MASK 0x00000001
+#define PHY_ANALOG_SYNTH7_OVRCHANDECODER_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_SYNTH7_OVRCHANDECODER_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MSB 1
+#define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_LSB 1
+#define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MASK 0x00000002
+#define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_SYNTH7_CHANFRAC_MSB 18
+#define PHY_ANALOG_SYNTH7_CHANFRAC_LSB 2
+#define PHY_ANALOG_SYNTH7_CHANFRAC_MASK 0x0007fffc
+#define PHY_ANALOG_SYNTH7_CHANFRAC_GET(x) (((x) & 0x0007fffc) >> 2)
+#define PHY_ANALOG_SYNTH7_CHANFRAC_SET(x) (((x) << 2) & 0x0007fffc)
+#define PHY_ANALOG_SYNTH7_CHANSEL_MSB 27
+#define PHY_ANALOG_SYNTH7_CHANSEL_LSB 19
+#define PHY_ANALOG_SYNTH7_CHANSEL_MASK 0x0ff80000
+#define PHY_ANALOG_SYNTH7_CHANSEL_GET(x) (((x) & 0x0ff80000) >> 19)
+#define PHY_ANALOG_SYNTH7_CHANSEL_SET(x) (((x) << 19) & 0x0ff80000)
+#define PHY_ANALOG_SYNTH7_AMODEREFSEL_MSB 29
+#define PHY_ANALOG_SYNTH7_AMODEREFSEL_LSB 28
+#define PHY_ANALOG_SYNTH7_AMODEREFSEL_MASK 0x30000000
+#define PHY_ANALOG_SYNTH7_AMODEREFSEL_GET(x) (((x) & 0x30000000) >> 28)
+#define PHY_ANALOG_SYNTH7_AMODEREFSEL_SET(x) (((x) << 28) & 0x30000000)
+#define PHY_ANALOG_SYNTH7_FRACMODE_MSB 30
+#define PHY_ANALOG_SYNTH7_FRACMODE_LSB 30
+#define PHY_ANALOG_SYNTH7_FRACMODE_MASK 0x40000000
+#define PHY_ANALOG_SYNTH7_FRACMODE_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_SYNTH7_FRACMODE_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MSB 31
+#define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_LSB 31
+#define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MASK 0x80000000
+#define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for SYNTH8 */
+#define PHY_ANALOG_SYNTH8_ADDRESS 0x0000009c
+#define PHY_ANALOG_SYNTH8_OFFSET 0x0000009c
+#define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MSB 0
+#define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_LSB 0
+#define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MASK 0x00000001
+#define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_SYNTH8_LOOP_ICPB_MSB 7
+#define PHY_ANALOG_SYNTH8_LOOP_ICPB_LSB 1
+#define PHY_ANALOG_SYNTH8_LOOP_ICPB_MASK 0x000000fe
+#define PHY_ANALOG_SYNTH8_LOOP_ICPB_GET(x) (((x) & 0x000000fe) >> 1)
+#define PHY_ANALOG_SYNTH8_LOOP_ICPB_SET(x) (((x) << 1) & 0x000000fe)
+#define PHY_ANALOG_SYNTH8_LOOP_CSB_MSB 11
+#define PHY_ANALOG_SYNTH8_LOOP_CSB_LSB 8
+#define PHY_ANALOG_SYNTH8_LOOP_CSB_MASK 0x00000f00
+#define PHY_ANALOG_SYNTH8_LOOP_CSB_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_SYNTH8_LOOP_CSB_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_SYNTH8_LOOP_RSB_MSB 16
+#define PHY_ANALOG_SYNTH8_LOOP_RSB_LSB 12
+#define PHY_ANALOG_SYNTH8_LOOP_RSB_MASK 0x0001f000
+#define PHY_ANALOG_SYNTH8_LOOP_RSB_GET(x) (((x) & 0x0001f000) >> 12)
+#define PHY_ANALOG_SYNTH8_LOOP_RSB_SET(x) (((x) << 12) & 0x0001f000)
+#define PHY_ANALOG_SYNTH8_LOOP_CPB_MSB 21
+#define PHY_ANALOG_SYNTH8_LOOP_CPB_LSB 17
+#define PHY_ANALOG_SYNTH8_LOOP_CPB_MASK 0x003e0000
+#define PHY_ANALOG_SYNTH8_LOOP_CPB_GET(x) (((x) & 0x003e0000) >> 17)
+#define PHY_ANALOG_SYNTH8_LOOP_CPB_SET(x) (((x) << 17) & 0x003e0000)
+#define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MSB 26
+#define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_LSB 22
+#define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MASK 0x07c00000
+#define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_GET(x) (((x) & 0x07c00000) >> 22)
+#define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_SET(x) (((x) << 22) & 0x07c00000)
+#define PHY_ANALOG_SYNTH8_REFDIVB_MSB 31
+#define PHY_ANALOG_SYNTH8_REFDIVB_LSB 27
+#define PHY_ANALOG_SYNTH8_REFDIVB_MASK 0xf8000000
+#define PHY_ANALOG_SYNTH8_REFDIVB_GET(x) (((x) & 0xf8000000) >> 27)
+#define PHY_ANALOG_SYNTH8_REFDIVB_SET(x) (((x) << 27) & 0xf8000000)
+
+/* macros for SYNTH9 */
+#define PHY_ANALOG_SYNTH9_ADDRESS 0x000000a0
+#define PHY_ANALOG_SYNTH9_OFFSET 0x000000a0
+#define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MSB 0
+#define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_LSB 0
+#define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MASK 0x00000001
+#define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MSB 3
+#define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_LSB 1
+#define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MASK 0x0000000e
+#define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_GET(x) (((x) & 0x0000000e) >> 1)
+#define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_SET(x) (((x) << 1) & 0x0000000e)
+#define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MSB 7
+#define PHY_ANALOG_SYNTH9_LOOP_ICPA0_LSB 4
+#define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MASK 0x000000f0
+#define PHY_ANALOG_SYNTH9_LOOP_ICPA0_GET(x) (((x) & 0x000000f0) >> 4)
+#define PHY_ANALOG_SYNTH9_LOOP_ICPA0_SET(x) (((x) << 4) & 0x000000f0)
+#define PHY_ANALOG_SYNTH9_LOOP_CSA0_MSB 11
+#define PHY_ANALOG_SYNTH9_LOOP_CSA0_LSB 8
+#define PHY_ANALOG_SYNTH9_LOOP_CSA0_MASK 0x00000f00
+#define PHY_ANALOG_SYNTH9_LOOP_CSA0_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_SYNTH9_LOOP_CSA0_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_SYNTH9_LOOP_RSA0_MSB 16
+#define PHY_ANALOG_SYNTH9_LOOP_RSA0_LSB 12
+#define PHY_ANALOG_SYNTH9_LOOP_RSA0_MASK 0x0001f000
+#define PHY_ANALOG_SYNTH9_LOOP_RSA0_GET(x) (((x) & 0x0001f000) >> 12)
+#define PHY_ANALOG_SYNTH9_LOOP_RSA0_SET(x) (((x) << 12) & 0x0001f000)
+#define PHY_ANALOG_SYNTH9_LOOP_CPA0_MSB 21
+#define PHY_ANALOG_SYNTH9_LOOP_CPA0_LSB 17
+#define PHY_ANALOG_SYNTH9_LOOP_CPA0_MASK 0x003e0000
+#define PHY_ANALOG_SYNTH9_LOOP_CPA0_GET(x) (((x) & 0x003e0000) >> 17)
+#define PHY_ANALOG_SYNTH9_LOOP_CPA0_SET(x) (((x) << 17) & 0x003e0000)
+#define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MSB 26
+#define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_LSB 22
+#define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MASK 0x07c00000
+#define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_GET(x) (((x) & 0x07c00000) >> 22)
+#define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_SET(x) (((x) << 22) & 0x07c00000)
+#define PHY_ANALOG_SYNTH9_REFDIVA_MSB 31
+#define PHY_ANALOG_SYNTH9_REFDIVA_LSB 27
+#define PHY_ANALOG_SYNTH9_REFDIVA_MASK 0xf8000000
+#define PHY_ANALOG_SYNTH9_REFDIVA_GET(x) (((x) & 0xf8000000) >> 27)
+#define PHY_ANALOG_SYNTH9_REFDIVA_SET(x) (((x) << 27) & 0xf8000000)
+
+/* macros for SYNTH10 */
+#define PHY_ANALOG_SYNTH10_ADDRESS 0x000000a4
+#define PHY_ANALOG_SYNTH10_OFFSET 0x000000a4
+#define PHY_ANALOG_SYNTH10_SPARE10A_MSB 1
+#define PHY_ANALOG_SYNTH10_SPARE10A_LSB 0
+#define PHY_ANALOG_SYNTH10_SPARE10A_MASK 0x00000003
+#define PHY_ANALOG_SYNTH10_SPARE10A_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_SYNTH10_SPARE10A_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MSB 4
+#define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_LSB 2
+#define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MASK 0x0000001c
+#define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_GET(x) (((x) & 0x0000001c) >> 2)
+#define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_SET(x) (((x) << 2) & 0x0000001c)
+#define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MSB 7
+#define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_LSB 5
+#define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MASK 0x000000e0
+#define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_GET(x) (((x) & 0x000000e0) >> 5)
+#define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_SET(x) (((x) << 5) & 0x000000e0)
+#define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MSB 10
+#define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_LSB 8
+#define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MASK 0x00000700
+#define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_GET(x) (((x) & 0x00000700) >> 8)
+#define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_SET(x) (((x) << 8) & 0x00000700)
+#define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MSB 13
+#define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_LSB 11
+#define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MASK 0x00003800
+#define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MSB 17
+#define PHY_ANALOG_SYNTH10_LOOP_ICPA1_LSB 14
+#define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MASK 0x0003c000
+#define PHY_ANALOG_SYNTH10_LOOP_ICPA1_GET(x) (((x) & 0x0003c000) >> 14)
+#define PHY_ANALOG_SYNTH10_LOOP_ICPA1_SET(x) (((x) << 14) & 0x0003c000)
+#define PHY_ANALOG_SYNTH10_LOOP_CSA1_MSB 21
+#define PHY_ANALOG_SYNTH10_LOOP_CSA1_LSB 18
+#define PHY_ANALOG_SYNTH10_LOOP_CSA1_MASK 0x003c0000
+#define PHY_ANALOG_SYNTH10_LOOP_CSA1_GET(x) (((x) & 0x003c0000) >> 18)
+#define PHY_ANALOG_SYNTH10_LOOP_CSA1_SET(x) (((x) << 18) & 0x003c0000)
+#define PHY_ANALOG_SYNTH10_LOOP_RSA1_MSB 26
+#define PHY_ANALOG_SYNTH10_LOOP_RSA1_LSB 22
+#define PHY_ANALOG_SYNTH10_LOOP_RSA1_MASK 0x07c00000
+#define PHY_ANALOG_SYNTH10_LOOP_RSA1_GET(x) (((x) & 0x07c00000) >> 22)
+#define PHY_ANALOG_SYNTH10_LOOP_RSA1_SET(x) (((x) << 22) & 0x07c00000)
+#define PHY_ANALOG_SYNTH10_LOOP_CPA1_MSB 31
+#define PHY_ANALOG_SYNTH10_LOOP_CPA1_LSB 27
+#define PHY_ANALOG_SYNTH10_LOOP_CPA1_MASK 0xf8000000
+#define PHY_ANALOG_SYNTH10_LOOP_CPA1_GET(x) (((x) & 0xf8000000) >> 27)
+#define PHY_ANALOG_SYNTH10_LOOP_CPA1_SET(x) (((x) << 27) & 0xf8000000)
+
+/* macros for SYNTH11 */
+#define PHY_ANALOG_SYNTH11_ADDRESS 0x000000a8
+#define PHY_ANALOG_SYNTH11_OFFSET 0x000000a8
+#define PHY_ANALOG_SYNTH11_SPARE11A_MSB 4
+#define PHY_ANALOG_SYNTH11_SPARE11A_LSB 0
+#define PHY_ANALOG_SYNTH11_SPARE11A_MASK 0x0000001f
+#define PHY_ANALOG_SYNTH11_SPARE11A_GET(x) (((x) & 0x0000001f) >> 0)
+#define PHY_ANALOG_SYNTH11_SPARE11A_SET(x) (((x) << 0) & 0x0000001f)
+#define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MSB 5
+#define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_LSB 5
+#define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MASK 0x00000020
+#define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_SYNTH11_LOREFSEL_MSB 7
+#define PHY_ANALOG_SYNTH11_LOREFSEL_LSB 6
+#define PHY_ANALOG_SYNTH11_LOREFSEL_MASK 0x000000c0
+#define PHY_ANALOG_SYNTH11_LOREFSEL_GET(x) (((x) & 0x000000c0) >> 6)
+#define PHY_ANALOG_SYNTH11_LOREFSEL_SET(x) (((x) << 6) & 0x000000c0)
+#define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MSB 9
+#define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_LSB 8
+#define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MASK 0x00000300
+#define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_GET(x) (((x) & 0x00000300) >> 8)
+#define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_SET(x) (((x) << 8) & 0x00000300)
+#define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MSB 10
+#define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_LSB 10
+#define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MASK 0x00000400
+#define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MSB 13
+#define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_LSB 11
+#define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MASK 0x00003800
+#define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MSB 17
+#define PHY_ANALOG_SYNTH11_LOOP_ICPA2_LSB 14
+#define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MASK 0x0003c000
+#define PHY_ANALOG_SYNTH11_LOOP_ICPA2_GET(x) (((x) & 0x0003c000) >> 14)
+#define PHY_ANALOG_SYNTH11_LOOP_ICPA2_SET(x) (((x) << 14) & 0x0003c000)
+#define PHY_ANALOG_SYNTH11_LOOP_CSA2_MSB 21
+#define PHY_ANALOG_SYNTH11_LOOP_CSA2_LSB 18
+#define PHY_ANALOG_SYNTH11_LOOP_CSA2_MASK 0x003c0000
+#define PHY_ANALOG_SYNTH11_LOOP_CSA2_GET(x) (((x) & 0x003c0000) >> 18)
+#define PHY_ANALOG_SYNTH11_LOOP_CSA2_SET(x) (((x) << 18) & 0x003c0000)
+#define PHY_ANALOG_SYNTH11_LOOP_RSA2_MSB 26
+#define PHY_ANALOG_SYNTH11_LOOP_RSA2_LSB 22
+#define PHY_ANALOG_SYNTH11_LOOP_RSA2_MASK 0x07c00000
+#define PHY_ANALOG_SYNTH11_LOOP_RSA2_GET(x) (((x) & 0x07c00000) >> 22)
+#define PHY_ANALOG_SYNTH11_LOOP_RSA2_SET(x) (((x) << 22) & 0x07c00000)
+#define PHY_ANALOG_SYNTH11_LOOP_CPA2_MSB 31
+#define PHY_ANALOG_SYNTH11_LOOP_CPA2_LSB 27
+#define PHY_ANALOG_SYNTH11_LOOP_CPA2_MASK 0xf8000000
+#define PHY_ANALOG_SYNTH11_LOOP_CPA2_GET(x) (((x) & 0xf8000000) >> 27)
+#define PHY_ANALOG_SYNTH11_LOOP_CPA2_SET(x) (((x) << 27) & 0xf8000000)
+
+/* macros for SYNTH12 */
+#define PHY_ANALOG_SYNTH12_ADDRESS 0x000000ac
+#define PHY_ANALOG_SYNTH12_OFFSET 0x000000ac
+#define PHY_ANALOG_SYNTH12_SPARE12A_MSB 9
+#define PHY_ANALOG_SYNTH12_SPARE12A_LSB 0
+#define PHY_ANALOG_SYNTH12_SPARE12A_MASK 0x000003ff
+#define PHY_ANALOG_SYNTH12_SPARE12A_GET(x) (((x) & 0x000003ff) >> 0)
+#define PHY_ANALOG_SYNTH12_SPARE12A_SET(x) (((x) << 0) & 0x000003ff)
+#define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_MSB 13
+#define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_LSB 10
+#define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_MASK 0x00003c00
+#define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_GET(x) (((x) & 0x00003c00) >> 10)
+#define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_SET(x) (((x) << 10) & 0x00003c00)
+#define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_MSB 14
+#define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_LSB 14
+#define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_MASK 0x00004000
+#define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_MSB 16
+#define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_LSB 15
+#define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_MASK 0x00018000
+#define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_GET(x) (((x) & 0x00018000) >> 15)
+#define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_SET(x) (((x) << 15) & 0x00018000)
+#define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_MSB 17
+#define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_LSB 17
+#define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_MASK 0x00020000
+#define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_SET(x) (((x) << 17) & 0x00020000)
+#define PHY_ANALOG_SYNTH12_STRCONT_MSB 18
+#define PHY_ANALOG_SYNTH12_STRCONT_LSB 18
+#define PHY_ANALOG_SYNTH12_STRCONT_MASK 0x00040000
+#define PHY_ANALOG_SYNTH12_STRCONT_GET(x) (((x) & 0x00040000) >> 18)
+#define PHY_ANALOG_SYNTH12_STRCONT_SET(x) (((x) << 18) & 0x00040000)
+#define PHY_ANALOG_SYNTH12_VREFMUL3_MSB 22
+#define PHY_ANALOG_SYNTH12_VREFMUL3_LSB 19
+#define PHY_ANALOG_SYNTH12_VREFMUL3_MASK 0x00780000
+#define PHY_ANALOG_SYNTH12_VREFMUL3_GET(x) (((x) & 0x00780000) >> 19)
+#define PHY_ANALOG_SYNTH12_VREFMUL3_SET(x) (((x) << 19) & 0x00780000)
+#define PHY_ANALOG_SYNTH12_VREFMUL2_MSB 26
+#define PHY_ANALOG_SYNTH12_VREFMUL2_LSB 23
+#define PHY_ANALOG_SYNTH12_VREFMUL2_MASK 0x07800000
+#define PHY_ANALOG_SYNTH12_VREFMUL2_GET(x) (((x) & 0x07800000) >> 23)
+#define PHY_ANALOG_SYNTH12_VREFMUL2_SET(x) (((x) << 23) & 0x07800000)
+#define PHY_ANALOG_SYNTH12_VREFMUL1_MSB 30
+#define PHY_ANALOG_SYNTH12_VREFMUL1_LSB 27
+#define PHY_ANALOG_SYNTH12_VREFMUL1_MASK 0x78000000
+#define PHY_ANALOG_SYNTH12_VREFMUL1_GET(x) (((x) & 0x78000000) >> 27)
+#define PHY_ANALOG_SYNTH12_VREFMUL1_SET(x) (((x) << 27) & 0x78000000)
+#define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MSB 31
+#define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_LSB 31
+#define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MASK 0x80000000
+#define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for SYNTH13 */
+#define PHY_ANALOG_SYNTH13_ADDRESS 0x000000b0
+#define PHY_ANALOG_SYNTH13_OFFSET 0x000000b0
+#define PHY_ANALOG_SYNTH13_SPARE13A_MSB 0
+#define PHY_ANALOG_SYNTH13_SPARE13A_LSB 0
+#define PHY_ANALOG_SYNTH13_SPARE13A_MASK 0x00000001
+#define PHY_ANALOG_SYNTH13_SPARE13A_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_SYNTH13_SPARE13A_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_MSB 3
+#define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_LSB 1
+#define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_MASK 0x0000000e
+#define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_GET(x) (((x) & 0x0000000e) >> 1)
+#define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_SET(x) (((x) << 1) & 0x0000000e)
+#define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_MSB 7
+#define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_LSB 4
+#define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_MASK 0x000000f0
+#define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_GET(x) (((x) & 0x000000f0) >> 4)
+#define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_SET(x) (((x) << 4) & 0x000000f0)
+#define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_MSB 11
+#define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_LSB 8
+#define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_MASK 0x00000f00
+#define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_MSB 16
+#define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_LSB 12
+#define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_MASK 0x0001f000
+#define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_GET(x) (((x) & 0x0001f000) >> 12)
+#define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_SET(x) (((x) << 12) & 0x0001f000)
+#define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_MSB 21
+#define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_LSB 17
+#define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_MASK 0x003e0000
+#define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_GET(x) (((x) & 0x003e0000) >> 17)
+#define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_SET(x) (((x) << 17) & 0x003e0000)
+#define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_MSB 26
+#define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_LSB 22
+#define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_MASK 0x07c00000
+#define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_GET(x) (((x) & 0x07c00000) >> 22)
+#define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_SET(x) (((x) << 22) & 0x07c00000)
+#define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_MSB 31
+#define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_LSB 27
+#define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_MASK 0xf8000000
+#define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_GET(x) (((x) & 0xf8000000) >> 27)
+#define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_SET(x) (((x) << 27) & 0xf8000000)
+
+/* macros for SYNTH14 */
+#define PHY_ANALOG_SYNTH14_ADDRESS 0x000000b4
+#define PHY_ANALOG_SYNTH14_OFFSET 0x000000b4
+#define PHY_ANALOG_SYNTH14_SPARE14A_MSB 1
+#define PHY_ANALOG_SYNTH14_SPARE14A_LSB 0
+#define PHY_ANALOG_SYNTH14_SPARE14A_MASK 0x00000003
+#define PHY_ANALOG_SYNTH14_SPARE14A_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_SYNTH14_SPARE14A_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_MSB 3
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_LSB 2
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_MASK 0x0000000c
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_GET(x) (((x) & 0x0000000c) >> 2)
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_SET(x) (((x) << 2) & 0x0000000c)
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_MSB 5
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_LSB 4
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_MASK 0x00000030
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_GET(x) (((x) & 0x00000030) >> 4)
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_SET(x) (((x) << 4) & 0x00000030)
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_MSB 7
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_LSB 6
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_MASK 0x000000c0
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_GET(x) (((x) & 0x000000c0) >> 6)
+#define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_SET(x) (((x) << 6) & 0x000000c0)
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_MSB 9
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_LSB 8
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_MASK 0x00000300
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_GET(x) (((x) & 0x00000300) >> 8)
+#define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_SET(x) (((x) << 8) & 0x00000300)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_MSB 10
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_LSB 10
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_MASK 0x00000400
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_MSB 11
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_LSB 11
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_MASK 0x00000800
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_MSB 12
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_LSB 12
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_MASK 0x00001000
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_MSB 13
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_LSB 13
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_MASK 0x00002000
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_SYNTH14_PWUPLO23_PD_MSB 16
+#define PHY_ANALOG_SYNTH14_PWUPLO23_PD_LSB 14
+#define PHY_ANALOG_SYNTH14_PWUPLO23_PD_MASK 0x0001c000
+#define PHY_ANALOG_SYNTH14_PWUPLO23_PD_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_SYNTH14_PWUPLO23_PD_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_MSB 19
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_LSB 17
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_MASK 0x000e0000
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_MSB 22
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_LSB 20
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_MASK 0x00700000
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_MSB 25
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_LSB 23
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_MASK 0x03800000
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_MSB 28
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_LSB 26
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_MASK 0x1c000000
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_MSB 31
+#define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_LSB 29
+#define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_MASK 0xe0000000
+#define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for BIAS1 */
+#define PHY_ANALOG_BIAS1_ADDRESS 0x000000c0
+#define PHY_ANALOG_BIAS1_OFFSET 0x000000c0
+#define PHY_ANALOG_BIAS1_SPARE1_MSB 6
+#define PHY_ANALOG_BIAS1_SPARE1_LSB 0
+#define PHY_ANALOG_BIAS1_SPARE1_MASK 0x0000007f
+#define PHY_ANALOG_BIAS1_SPARE1_GET(x) (((x) & 0x0000007f) >> 0)
+#define PHY_ANALOG_BIAS1_SPARE1_SET(x) (((x) << 0) & 0x0000007f)
+#define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MSB 9
+#define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_LSB 7
+#define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MASK 0x00000380
+#define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_GET(x) (((x) & 0x00000380) >> 7)
+#define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_SET(x) (((x) << 7) & 0x00000380)
+#define PHY_ANALOG_BIAS1_PWD_IC25V2II_MSB 12
+#define PHY_ANALOG_BIAS1_PWD_IC25V2II_LSB 10
+#define PHY_ANALOG_BIAS1_PWD_IC25V2II_MASK 0x00001c00
+#define PHY_ANALOG_BIAS1_PWD_IC25V2II_GET(x) (((x) & 0x00001c00) >> 10)
+#define PHY_ANALOG_BIAS1_PWD_IC25V2II_SET(x) (((x) << 10) & 0x00001c00)
+#define PHY_ANALOG_BIAS1_PWD_IC25BB_MSB 15
+#define PHY_ANALOG_BIAS1_PWD_IC25BB_LSB 13
+#define PHY_ANALOG_BIAS1_PWD_IC25BB_MASK 0x0000e000
+#define PHY_ANALOG_BIAS1_PWD_IC25BB_GET(x) (((x) & 0x0000e000) >> 13)
+#define PHY_ANALOG_BIAS1_PWD_IC25BB_SET(x) (((x) << 13) & 0x0000e000)
+#define PHY_ANALOG_BIAS1_PWD_IC25DAC_MSB 18
+#define PHY_ANALOG_BIAS1_PWD_IC25DAC_LSB 16
+#define PHY_ANALOG_BIAS1_PWD_IC25DAC_MASK 0x00070000
+#define PHY_ANALOG_BIAS1_PWD_IC25DAC_GET(x) (((x) & 0x00070000) >> 16)
+#define PHY_ANALOG_BIAS1_PWD_IC25DAC_SET(x) (((x) << 16) & 0x00070000)
+#define PHY_ANALOG_BIAS1_PWD_IC25FIR_MSB 21
+#define PHY_ANALOG_BIAS1_PWD_IC25FIR_LSB 19
+#define PHY_ANALOG_BIAS1_PWD_IC25FIR_MASK 0x00380000
+#define PHY_ANALOG_BIAS1_PWD_IC25FIR_GET(x) (((x) & 0x00380000) >> 19)
+#define PHY_ANALOG_BIAS1_PWD_IC25FIR_SET(x) (((x) << 19) & 0x00380000)
+#define PHY_ANALOG_BIAS1_PWD_IC25ADC_MSB 24
+#define PHY_ANALOG_BIAS1_PWD_IC25ADC_LSB 22
+#define PHY_ANALOG_BIAS1_PWD_IC25ADC_MASK 0x01c00000
+#define PHY_ANALOG_BIAS1_PWD_IC25ADC_GET(x) (((x) & 0x01c00000) >> 22)
+#define PHY_ANALOG_BIAS1_PWD_IC25ADC_SET(x) (((x) << 22) & 0x01c00000)
+#define PHY_ANALOG_BIAS1_BIAS_SEL_MSB 31
+#define PHY_ANALOG_BIAS1_BIAS_SEL_LSB 25
+#define PHY_ANALOG_BIAS1_BIAS_SEL_MASK 0xfe000000
+#define PHY_ANALOG_BIAS1_BIAS_SEL_GET(x) (((x) & 0xfe000000) >> 25)
+#define PHY_ANALOG_BIAS1_BIAS_SEL_SET(x) (((x) << 25) & 0xfe000000)
+
+/* macros for BIAS2 */
+#define PHY_ANALOG_BIAS2_ADDRESS 0x000000c4
+#define PHY_ANALOG_BIAS2_OFFSET 0x000000c4
+#define PHY_ANALOG_BIAS2_SPARE2_MSB 4
+#define PHY_ANALOG_BIAS2_SPARE2_LSB 0
+#define PHY_ANALOG_BIAS2_SPARE2_MASK 0x0000001f
+#define PHY_ANALOG_BIAS2_SPARE2_GET(x) (((x) & 0x0000001f) >> 0)
+#define PHY_ANALOG_BIAS2_SPARE2_SET(x) (((x) << 0) & 0x0000001f)
+#define PHY_ANALOG_BIAS2_PWD_IC25XPA_MSB 7
+#define PHY_ANALOG_BIAS2_PWD_IC25XPA_LSB 5
+#define PHY_ANALOG_BIAS2_PWD_IC25XPA_MASK 0x000000e0
+#define PHY_ANALOG_BIAS2_PWD_IC25XPA_GET(x) (((x) & 0x000000e0) >> 5)
+#define PHY_ANALOG_BIAS2_PWD_IC25XPA_SET(x) (((x) << 5) & 0x000000e0)
+#define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MSB 10
+#define PHY_ANALOG_BIAS2_PWD_IC25XTAL_LSB 8
+#define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MASK 0x00000700
+#define PHY_ANALOG_BIAS2_PWD_IC25XTAL_GET(x) (((x) & 0x00000700) >> 8)
+#define PHY_ANALOG_BIAS2_PWD_IC25XTAL_SET(x) (((x) << 8) & 0x00000700)
+#define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MSB 13
+#define PHY_ANALOG_BIAS2_PWD_IC25TXRF_LSB 11
+#define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MASK 0x00003800
+#define PHY_ANALOG_BIAS2_PWD_IC25TXRF_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_BIAS2_PWD_IC25TXRF_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MSB 16
+#define PHY_ANALOG_BIAS2_PWD_IC25RXRF_LSB 14
+#define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MASK 0x0001c000
+#define PHY_ANALOG_BIAS2_PWD_IC25RXRF_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_BIAS2_PWD_IC25RXRF_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_MSB 19
+#define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_LSB 17
+#define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_MASK 0x000e0000
+#define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MSB 22
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_LSB 20
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MASK 0x00700000
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MSB 25
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_LSB 23
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MASK 0x03800000
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MSB 28
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_LSB 26
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MASK 0x1c000000
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MSB 31
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_LSB 29
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MASK 0xe0000000
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for BIAS3 */
+#define PHY_ANALOG_BIAS3_ADDRESS 0x000000c8
+#define PHY_ANALOG_BIAS3_OFFSET 0x000000c8
+#define PHY_ANALOG_BIAS3_SPARE3_MSB 1
+#define PHY_ANALOG_BIAS3_SPARE3_LSB 0
+#define PHY_ANALOG_BIAS3_SPARE3_MASK 0x00000003
+#define PHY_ANALOG_BIAS3_SPARE3_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_BIAS3_SPARE3_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_BIAS3_PWD_IR25SAR_MSB 4
+#define PHY_ANALOG_BIAS3_PWD_IR25SAR_LSB 2
+#define PHY_ANALOG_BIAS3_PWD_IR25SAR_MASK 0x0000001c
+#define PHY_ANALOG_BIAS3_PWD_IR25SAR_GET(x) (((x) & 0x0000001c) >> 2)
+#define PHY_ANALOG_BIAS3_PWD_IR25SAR_SET(x) (((x) << 2) & 0x0000001c)
+#define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MSB 7
+#define PHY_ANALOG_BIAS3_PWD_IR25TXRF_LSB 5
+#define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MASK 0x000000e0
+#define PHY_ANALOG_BIAS3_PWD_IR25TXRF_GET(x) (((x) & 0x000000e0) >> 5)
+#define PHY_ANALOG_BIAS3_PWD_IR25TXRF_SET(x) (((x) << 5) & 0x000000e0)
+#define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MSB 10
+#define PHY_ANALOG_BIAS3_PWD_IR25RXRF_LSB 8
+#define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MASK 0x00000700
+#define PHY_ANALOG_BIAS3_PWD_IR25RXRF_GET(x) (((x) & 0x00000700) >> 8)
+#define PHY_ANALOG_BIAS3_PWD_IR25RXRF_SET(x) (((x) << 8) & 0x00000700)
+#define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_MSB 13
+#define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_LSB 11
+#define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_MASK 0x00003800
+#define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MSB 16
+#define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_LSB 14
+#define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MASK 0x0001c000
+#define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_BIAS3_PWD_IR25BB_MSB 19
+#define PHY_ANALOG_BIAS3_PWD_IR25BB_LSB 17
+#define PHY_ANALOG_BIAS3_PWD_IR25BB_MASK 0x000e0000
+#define PHY_ANALOG_BIAS3_PWD_IR25BB_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_BIAS3_PWD_IR25BB_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_BIAS3_PWD_IR50DAC_MSB 22
+#define PHY_ANALOG_BIAS3_PWD_IR50DAC_LSB 20
+#define PHY_ANALOG_BIAS3_PWD_IR50DAC_MASK 0x00700000
+#define PHY_ANALOG_BIAS3_PWD_IR50DAC_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_BIAS3_PWD_IR50DAC_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_BIAS3_PWD_IR25DAC_MSB 25
+#define PHY_ANALOG_BIAS3_PWD_IR25DAC_LSB 23
+#define PHY_ANALOG_BIAS3_PWD_IR25DAC_MASK 0x03800000
+#define PHY_ANALOG_BIAS3_PWD_IR25DAC_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_BIAS3_PWD_IR25DAC_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_BIAS3_PWD_IR25FIR_MSB 28
+#define PHY_ANALOG_BIAS3_PWD_IR25FIR_LSB 26
+#define PHY_ANALOG_BIAS3_PWD_IR25FIR_MASK 0x1c000000
+#define PHY_ANALOG_BIAS3_PWD_IR25FIR_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_BIAS3_PWD_IR25FIR_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_BIAS3_PWD_IR50ADC_MSB 31
+#define PHY_ANALOG_BIAS3_PWD_IR50ADC_LSB 29
+#define PHY_ANALOG_BIAS3_PWD_IR50ADC_MASK 0xe0000000
+#define PHY_ANALOG_BIAS3_PWD_IR50ADC_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_BIAS3_PWD_IR50ADC_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for BIAS4 */
+#define PHY_ANALOG_BIAS4_ADDRESS 0x000000cc
+#define PHY_ANALOG_BIAS4_OFFSET 0x000000cc
+#define PHY_ANALOG_BIAS4_SPARE4_MSB 10
+#define PHY_ANALOG_BIAS4_SPARE4_LSB 0
+#define PHY_ANALOG_BIAS4_SPARE4_MASK 0x000007ff
+#define PHY_ANALOG_BIAS4_SPARE4_GET(x) (((x) & 0x000007ff) >> 0)
+#define PHY_ANALOG_BIAS4_SPARE4_SET(x) (((x) << 0) & 0x000007ff)
+#define PHY_ANALOG_BIAS4_PWD_IR25SPARED_MSB 13
+#define PHY_ANALOG_BIAS4_PWD_IR25SPARED_LSB 11
+#define PHY_ANALOG_BIAS4_PWD_IR25SPARED_MASK 0x00003800
+#define PHY_ANALOG_BIAS4_PWD_IR25SPARED_GET(x) (((x) & 0x00003800) >> 11)
+#define PHY_ANALOG_BIAS4_PWD_IR25SPARED_SET(x) (((x) << 11) & 0x00003800)
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MSB 16
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_LSB 14
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MASK 0x0001c000
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_GET(x) (((x) & 0x0001c000) >> 14)
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_SET(x) (((x) << 14) & 0x0001c000)
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MSB 19
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_LSB 17
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MASK 0x000e0000
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_GET(x) (((x) & 0x000e0000) >> 17)
+#define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_SET(x) (((x) << 17) & 0x000e0000)
+#define PHY_ANALOG_BIAS4_PWD_IR25XPA_MSB 22
+#define PHY_ANALOG_BIAS4_PWD_IR25XPA_LSB 20
+#define PHY_ANALOG_BIAS4_PWD_IR25XPA_MASK 0x00700000
+#define PHY_ANALOG_BIAS4_PWD_IR25XPA_GET(x) (((x) & 0x00700000) >> 20)
+#define PHY_ANALOG_BIAS4_PWD_IR25XPA_SET(x) (((x) << 20) & 0x00700000)
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MSB 25
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_LSB 23
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MASK 0x03800000
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_GET(x) (((x) & 0x03800000) >> 23)
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_SET(x) (((x) << 23) & 0x03800000)
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MSB 28
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_LSB 26
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MASK 0x1c000000
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MSB 31
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_LSB 29
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MASK 0xe0000000
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for RXTX1 */
+#define PHY_ANALOG_RXTX1_ADDRESS 0x00000100
+#define PHY_ANALOG_RXTX1_OFFSET 0x00000100
+#define PHY_ANALOG_RXTX1_SCFIR_GAIN_MSB 0
+#define PHY_ANALOG_RXTX1_SCFIR_GAIN_LSB 0
+#define PHY_ANALOG_RXTX1_SCFIR_GAIN_MASK 0x00000001
+#define PHY_ANALOG_RXTX1_SCFIR_GAIN_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_RXTX1_SCFIR_GAIN_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_RXTX1_MANRXGAIN_MSB 1
+#define PHY_ANALOG_RXTX1_MANRXGAIN_LSB 1
+#define PHY_ANALOG_RXTX1_MANRXGAIN_MASK 0x00000002
+#define PHY_ANALOG_RXTX1_MANRXGAIN_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_RXTX1_MANRXGAIN_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_RXTX1_AGC_DBDAC_MSB 5
+#define PHY_ANALOG_RXTX1_AGC_DBDAC_LSB 2
+#define PHY_ANALOG_RXTX1_AGC_DBDAC_MASK 0x0000003c
+#define PHY_ANALOG_RXTX1_AGC_DBDAC_GET(x) (((x) & 0x0000003c) >> 2)
+#define PHY_ANALOG_RXTX1_AGC_DBDAC_SET(x) (((x) << 2) & 0x0000003c)
+#define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MSB 6
+#define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_LSB 6
+#define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MASK 0x00000040
+#define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_MSB 7
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_LSB 7
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_MASK 0x00000080
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MSB 8
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_LSB 8
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MASK 0x00000100
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MSB 11
+#define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_LSB 9
+#define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MASK 0x00000e00
+#define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_GET(x) (((x) & 0x00000e00) >> 9)
+#define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_SET(x) (((x) << 9) & 0x00000e00)
+#define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MSB 13
+#define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_LSB 12
+#define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MASK 0x00003000
+#define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_GET(x) (((x) & 0x00003000) >> 12)
+#define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_SET(x) (((x) << 12) & 0x00003000)
+#define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MSB 14
+#define PHY_ANALOG_RXTX1_PADRVHALFGN2G_LSB 14
+#define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MASK 0x00004000
+#define PHY_ANALOG_RXTX1_PADRVHALFGN2G_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_RXTX1_PADRVHALFGN2G_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_RXTX1_PADRV2GN_MSB 18
+#define PHY_ANALOG_RXTX1_PADRV2GN_LSB 15
+#define PHY_ANALOG_RXTX1_PADRV2GN_MASK 0x00078000
+#define PHY_ANALOG_RXTX1_PADRV2GN_GET(x) (((x) & 0x00078000) >> 15)
+#define PHY_ANALOG_RXTX1_PADRV2GN_SET(x) (((x) << 15) & 0x00078000)
+#define PHY_ANALOG_RXTX1_PADRV3GN5G_MSB 22
+#define PHY_ANALOG_RXTX1_PADRV3GN5G_LSB 19
+#define PHY_ANALOG_RXTX1_PADRV3GN5G_MASK 0x00780000
+#define PHY_ANALOG_RXTX1_PADRV3GN5G_GET(x) (((x) & 0x00780000) >> 19)
+#define PHY_ANALOG_RXTX1_PADRV3GN5G_SET(x) (((x) << 19) & 0x00780000)
+#define PHY_ANALOG_RXTX1_PADRV4GN5G_MSB 26
+#define PHY_ANALOG_RXTX1_PADRV4GN5G_LSB 23
+#define PHY_ANALOG_RXTX1_PADRV4GN5G_MASK 0x07800000
+#define PHY_ANALOG_RXTX1_PADRV4GN5G_GET(x) (((x) & 0x07800000) >> 23)
+#define PHY_ANALOG_RXTX1_PADRV4GN5G_SET(x) (((x) << 23) & 0x07800000)
+#define PHY_ANALOG_RXTX1_TXBB_GC_MSB 30
+#define PHY_ANALOG_RXTX1_TXBB_GC_LSB 27
+#define PHY_ANALOG_RXTX1_TXBB_GC_MASK 0x78000000
+#define PHY_ANALOG_RXTX1_TXBB_GC_GET(x) (((x) & 0x78000000) >> 27)
+#define PHY_ANALOG_RXTX1_TXBB_GC_SET(x) (((x) << 27) & 0x78000000)
+#define PHY_ANALOG_RXTX1_MANTXGAIN_MSB 31
+#define PHY_ANALOG_RXTX1_MANTXGAIN_LSB 31
+#define PHY_ANALOG_RXTX1_MANTXGAIN_MASK 0x80000000
+#define PHY_ANALOG_RXTX1_MANTXGAIN_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_RXTX1_MANTXGAIN_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for RXTX2 */
+#define PHY_ANALOG_RXTX2_ADDRESS 0x00000104
+#define PHY_ANALOG_RXTX2_OFFSET 0x00000104
+#define PHY_ANALOG_RXTX2_BMODE_MSB 0
+#define PHY_ANALOG_RXTX2_BMODE_LSB 0
+#define PHY_ANALOG_RXTX2_BMODE_MASK 0x00000001
+#define PHY_ANALOG_RXTX2_BMODE_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_RXTX2_BMODE_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_RXTX2_BMODE_OVR_MSB 1
+#define PHY_ANALOG_RXTX2_BMODE_OVR_LSB 1
+#define PHY_ANALOG_RXTX2_BMODE_OVR_MASK 0x00000002
+#define PHY_ANALOG_RXTX2_BMODE_OVR_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_RXTX2_BMODE_OVR_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_RXTX2_SYNTHON_MSB 2
+#define PHY_ANALOG_RXTX2_SYNTHON_LSB 2
+#define PHY_ANALOG_RXTX2_SYNTHON_MASK 0x00000004
+#define PHY_ANALOG_RXTX2_SYNTHON_GET(x) (((x) & 0x00000004) >> 2)
+#define PHY_ANALOG_RXTX2_SYNTHON_SET(x) (((x) << 2) & 0x00000004)
+#define PHY_ANALOG_RXTX2_SYNTHON_OVR_MSB 3
+#define PHY_ANALOG_RXTX2_SYNTHON_OVR_LSB 3
+#define PHY_ANALOG_RXTX2_SYNTHON_OVR_MASK 0x00000008
+#define PHY_ANALOG_RXTX2_SYNTHON_OVR_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_RXTX2_SYNTHON_OVR_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_RXTX2_BW_ST_MSB 5
+#define PHY_ANALOG_RXTX2_BW_ST_LSB 4
+#define PHY_ANALOG_RXTX2_BW_ST_MASK 0x00000030
+#define PHY_ANALOG_RXTX2_BW_ST_GET(x) (((x) & 0x00000030) >> 4)
+#define PHY_ANALOG_RXTX2_BW_ST_SET(x) (((x) << 4) & 0x00000030)
+#define PHY_ANALOG_RXTX2_BW_ST_OVR_MSB 6
+#define PHY_ANALOG_RXTX2_BW_ST_OVR_LSB 6
+#define PHY_ANALOG_RXTX2_BW_ST_OVR_MASK 0x00000040
+#define PHY_ANALOG_RXTX2_BW_ST_OVR_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_RXTX2_BW_ST_OVR_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_RXTX2_TXON_MSB 7
+#define PHY_ANALOG_RXTX2_TXON_LSB 7
+#define PHY_ANALOG_RXTX2_TXON_MASK 0x00000080
+#define PHY_ANALOG_RXTX2_TXON_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_RXTX2_TXON_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_RXTX2_TXON_OVR_MSB 8
+#define PHY_ANALOG_RXTX2_TXON_OVR_LSB 8
+#define PHY_ANALOG_RXTX2_TXON_OVR_MASK 0x00000100
+#define PHY_ANALOG_RXTX2_TXON_OVR_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_RXTX2_TXON_OVR_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_RXTX2_PAON_MSB 9
+#define PHY_ANALOG_RXTX2_PAON_LSB 9
+#define PHY_ANALOG_RXTX2_PAON_MASK 0x00000200
+#define PHY_ANALOG_RXTX2_PAON_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_RXTX2_PAON_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_RXTX2_PAON_OVR_MSB 10
+#define PHY_ANALOG_RXTX2_PAON_OVR_LSB 10
+#define PHY_ANALOG_RXTX2_PAON_OVR_MASK 0x00000400
+#define PHY_ANALOG_RXTX2_PAON_OVR_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_RXTX2_PAON_OVR_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_RXTX2_RXON_MSB 11
+#define PHY_ANALOG_RXTX2_RXON_LSB 11
+#define PHY_ANALOG_RXTX2_RXON_MASK 0x00000800
+#define PHY_ANALOG_RXTX2_RXON_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_RXTX2_RXON_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_RXTX2_RXON_OVR_MSB 12
+#define PHY_ANALOG_RXTX2_RXON_OVR_LSB 12
+#define PHY_ANALOG_RXTX2_RXON_OVR_MASK 0x00001000
+#define PHY_ANALOG_RXTX2_RXON_OVR_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_RXTX2_RXON_OVR_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_RXTX2_AGCON_MSB 13
+#define PHY_ANALOG_RXTX2_AGCON_LSB 13
+#define PHY_ANALOG_RXTX2_AGCON_MASK 0x00002000
+#define PHY_ANALOG_RXTX2_AGCON_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_RXTX2_AGCON_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_RXTX2_AGCON_OVR_MSB 14
+#define PHY_ANALOG_RXTX2_AGCON_OVR_LSB 14
+#define PHY_ANALOG_RXTX2_AGCON_OVR_MASK 0x00004000
+#define PHY_ANALOG_RXTX2_AGCON_OVR_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_RXTX2_AGCON_OVR_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_RXTX2_TXMOD_MSB 17
+#define PHY_ANALOG_RXTX2_TXMOD_LSB 15
+#define PHY_ANALOG_RXTX2_TXMOD_MASK 0x00038000
+#define PHY_ANALOG_RXTX2_TXMOD_GET(x) (((x) & 0x00038000) >> 15)
+#define PHY_ANALOG_RXTX2_TXMOD_SET(x) (((x) << 15) & 0x00038000)
+#define PHY_ANALOG_RXTX2_TXMOD_OVR_MSB 18
+#define PHY_ANALOG_RXTX2_TXMOD_OVR_LSB 18
+#define PHY_ANALOG_RXTX2_TXMOD_OVR_MASK 0x00040000
+#define PHY_ANALOG_RXTX2_TXMOD_OVR_GET(x) (((x) & 0x00040000) >> 18)
+#define PHY_ANALOG_RXTX2_TXMOD_OVR_SET(x) (((x) << 18) & 0x00040000)
+#define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MSB 21
+#define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_LSB 19
+#define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MASK 0x00380000
+#define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_GET(x) (((x) & 0x00380000) >> 19)
+#define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_SET(x) (((x) << 19) & 0x00380000)
+#define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MSB 23
+#define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_LSB 22
+#define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MASK 0x00c00000
+#define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_GET(x) (((x) & 0x00c00000) >> 22)
+#define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_SET(x) (((x) << 22) & 0x00c00000)
+#define PHY_ANALOG_RXTX2_MXRGAIN_MSB 25
+#define PHY_ANALOG_RXTX2_MXRGAIN_LSB 24
+#define PHY_ANALOG_RXTX2_MXRGAIN_MASK 0x03000000
+#define PHY_ANALOG_RXTX2_MXRGAIN_GET(x) (((x) & 0x03000000) >> 24)
+#define PHY_ANALOG_RXTX2_MXRGAIN_SET(x) (((x) << 24) & 0x03000000)
+#define PHY_ANALOG_RXTX2_VGAGAIN_MSB 28
+#define PHY_ANALOG_RXTX2_VGAGAIN_LSB 26
+#define PHY_ANALOG_RXTX2_VGAGAIN_MASK 0x1c000000
+#define PHY_ANALOG_RXTX2_VGAGAIN_GET(x) (((x) & 0x1c000000) >> 26)
+#define PHY_ANALOG_RXTX2_VGAGAIN_SET(x) (((x) << 26) & 0x1c000000)
+#define PHY_ANALOG_RXTX2_LNAGAIN_MSB 31
+#define PHY_ANALOG_RXTX2_LNAGAIN_LSB 29
+#define PHY_ANALOG_RXTX2_LNAGAIN_MASK 0xe0000000
+#define PHY_ANALOG_RXTX2_LNAGAIN_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_RXTX2_LNAGAIN_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for RXTX3 */
+#define PHY_ANALOG_RXTX3_ADDRESS 0x00000108
+#define PHY_ANALOG_RXTX3_OFFSET 0x00000108
+#define PHY_ANALOG_RXTX3_SPARE3_MSB 2
+#define PHY_ANALOG_RXTX3_SPARE3_LSB 0
+#define PHY_ANALOG_RXTX3_SPARE3_MASK 0x00000007
+#define PHY_ANALOG_RXTX3_SPARE3_GET(x) (((x) & 0x00000007) >> 0)
+#define PHY_ANALOG_RXTX3_SPARE3_SET(x) (((x) << 0) & 0x00000007)
+#define PHY_ANALOG_RXTX3_SPURON_MSB 3
+#define PHY_ANALOG_RXTX3_SPURON_LSB 3
+#define PHY_ANALOG_RXTX3_SPURON_MASK 0x00000008
+#define PHY_ANALOG_RXTX3_SPURON_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_RXTX3_SPURON_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_MSB 4
+#define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_LSB 4
+#define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_MASK 0x00000010
+#define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_RXTX3_DACFULLSCALE_MSB 5
+#define PHY_ANALOG_RXTX3_DACFULLSCALE_LSB 5
+#define PHY_ANALOG_RXTX3_DACFULLSCALE_MASK 0x00000020
+#define PHY_ANALOG_RXTX3_DACFULLSCALE_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_RXTX3_DACFULLSCALE_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_RXTX3_ADCSHORT_MSB 6
+#define PHY_ANALOG_RXTX3_ADCSHORT_LSB 6
+#define PHY_ANALOG_RXTX3_ADCSHORT_MASK 0x00000040
+#define PHY_ANALOG_RXTX3_ADCSHORT_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_RXTX3_ADCSHORT_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_RXTX3_DACPWD_MSB 7
+#define PHY_ANALOG_RXTX3_DACPWD_LSB 7
+#define PHY_ANALOG_RXTX3_DACPWD_MASK 0x00000080
+#define PHY_ANALOG_RXTX3_DACPWD_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_RXTX3_DACPWD_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_RXTX3_DACPWD_OVR_MSB 8
+#define PHY_ANALOG_RXTX3_DACPWD_OVR_LSB 8
+#define PHY_ANALOG_RXTX3_DACPWD_OVR_MASK 0x00000100
+#define PHY_ANALOG_RXTX3_DACPWD_OVR_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_RXTX3_DACPWD_OVR_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_RXTX3_ADCPWD_MSB 9
+#define PHY_ANALOG_RXTX3_ADCPWD_LSB 9
+#define PHY_ANALOG_RXTX3_ADCPWD_MASK 0x00000200
+#define PHY_ANALOG_RXTX3_ADCPWD_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_RXTX3_ADCPWD_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_RXTX3_ADCPWD_OVR_MSB 10
+#define PHY_ANALOG_RXTX3_ADCPWD_OVR_LSB 10
+#define PHY_ANALOG_RXTX3_ADCPWD_OVR_MASK 0x00000400
+#define PHY_ANALOG_RXTX3_ADCPWD_OVR_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_RXTX3_ADCPWD_OVR_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_RXTX3_AGC_CALDAC_MSB 16
+#define PHY_ANALOG_RXTX3_AGC_CALDAC_LSB 11
+#define PHY_ANALOG_RXTX3_AGC_CALDAC_MASK 0x0001f800
+#define PHY_ANALOG_RXTX3_AGC_CALDAC_GET(x) (((x) & 0x0001f800) >> 11)
+#define PHY_ANALOG_RXTX3_AGC_CALDAC_SET(x) (((x) << 11) & 0x0001f800)
+#define PHY_ANALOG_RXTX3_AGC_CAL_MSB 17
+#define PHY_ANALOG_RXTX3_AGC_CAL_LSB 17
+#define PHY_ANALOG_RXTX3_AGC_CAL_MASK 0x00020000
+#define PHY_ANALOG_RXTX3_AGC_CAL_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_RXTX3_AGC_CAL_SET(x) (((x) << 17) & 0x00020000)
+#define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MSB 18
+#define PHY_ANALOG_RXTX3_AGC_CAL_OVR_LSB 18
+#define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MASK 0x00040000
+#define PHY_ANALOG_RXTX3_AGC_CAL_OVR_GET(x) (((x) & 0x00040000) >> 18)
+#define PHY_ANALOG_RXTX3_AGC_CAL_OVR_SET(x) (((x) << 18) & 0x00040000)
+#define PHY_ANALOG_RXTX3_LOFORCEDON_MSB 19
+#define PHY_ANALOG_RXTX3_LOFORCEDON_LSB 19
+#define PHY_ANALOG_RXTX3_LOFORCEDON_MASK 0x00080000
+#define PHY_ANALOG_RXTX3_LOFORCEDON_GET(x) (((x) & 0x00080000) >> 19)
+#define PHY_ANALOG_RXTX3_LOFORCEDON_SET(x) (((x) << 19) & 0x00080000)
+#define PHY_ANALOG_RXTX3_CALRESIDUE_MSB 20
+#define PHY_ANALOG_RXTX3_CALRESIDUE_LSB 20
+#define PHY_ANALOG_RXTX3_CALRESIDUE_MASK 0x00100000
+#define PHY_ANALOG_RXTX3_CALRESIDUE_GET(x) (((x) & 0x00100000) >> 20)
+#define PHY_ANALOG_RXTX3_CALRESIDUE_SET(x) (((x) << 20) & 0x00100000)
+#define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MSB 21
+#define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_LSB 21
+#define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MASK 0x00200000
+#define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_GET(x) (((x) & 0x00200000) >> 21)
+#define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_SET(x) (((x) << 21) & 0x00200000)
+#define PHY_ANALOG_RXTX3_CALFC_MSB 22
+#define PHY_ANALOG_RXTX3_CALFC_LSB 22
+#define PHY_ANALOG_RXTX3_CALFC_MASK 0x00400000
+#define PHY_ANALOG_RXTX3_CALFC_GET(x) (((x) & 0x00400000) >> 22)
+#define PHY_ANALOG_RXTX3_CALFC_SET(x) (((x) << 22) & 0x00400000)
+#define PHY_ANALOG_RXTX3_CALFC_OVR_MSB 23
+#define PHY_ANALOG_RXTX3_CALFC_OVR_LSB 23
+#define PHY_ANALOG_RXTX3_CALFC_OVR_MASK 0x00800000
+#define PHY_ANALOG_RXTX3_CALFC_OVR_GET(x) (((x) & 0x00800000) >> 23)
+#define PHY_ANALOG_RXTX3_CALFC_OVR_SET(x) (((x) << 23) & 0x00800000)
+#define PHY_ANALOG_RXTX3_CALTX_MSB 24
+#define PHY_ANALOG_RXTX3_CALTX_LSB 24
+#define PHY_ANALOG_RXTX3_CALTX_MASK 0x01000000
+#define PHY_ANALOG_RXTX3_CALTX_GET(x) (((x) & 0x01000000) >> 24)
+#define PHY_ANALOG_RXTX3_CALTX_SET(x) (((x) << 24) & 0x01000000)
+#define PHY_ANALOG_RXTX3_CALTX_OVR_MSB 25
+#define PHY_ANALOG_RXTX3_CALTX_OVR_LSB 25
+#define PHY_ANALOG_RXTX3_CALTX_OVR_MASK 0x02000000
+#define PHY_ANALOG_RXTX3_CALTX_OVR_GET(x) (((x) & 0x02000000) >> 25)
+#define PHY_ANALOG_RXTX3_CALTX_OVR_SET(x) (((x) << 25) & 0x02000000)
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_MSB 26
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_LSB 26
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_MASK 0x04000000
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_GET(x) (((x) & 0x04000000) >> 26)
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_SET(x) (((x) << 26) & 0x04000000)
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MSB 27
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_LSB 27
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MASK 0x08000000
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_GET(x) (((x) & 0x08000000) >> 27)
+#define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_SET(x) (((x) << 27) & 0x08000000)
+#define PHY_ANALOG_RXTX3_CALPA_MSB 28
+#define PHY_ANALOG_RXTX3_CALPA_LSB 28
+#define PHY_ANALOG_RXTX3_CALPA_MASK 0x10000000
+#define PHY_ANALOG_RXTX3_CALPA_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_RXTX3_CALPA_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_RXTX3_CALPA_OVR_MSB 29
+#define PHY_ANALOG_RXTX3_CALPA_OVR_LSB 29
+#define PHY_ANALOG_RXTX3_CALPA_OVR_MASK 0x20000000
+#define PHY_ANALOG_RXTX3_CALPA_OVR_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_RXTX3_CALPA_OVR_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_RXTX3_TURBOADC_MSB 30
+#define PHY_ANALOG_RXTX3_TURBOADC_LSB 30
+#define PHY_ANALOG_RXTX3_TURBOADC_MASK 0x40000000
+#define PHY_ANALOG_RXTX3_TURBOADC_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_RXTX3_TURBOADC_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_RXTX3_TURBOADC_OVR_MSB 31
+#define PHY_ANALOG_RXTX3_TURBOADC_OVR_LSB 31
+#define PHY_ANALOG_RXTX3_TURBOADC_OVR_MASK 0x80000000
+#define PHY_ANALOG_RXTX3_TURBOADC_OVR_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_RXTX3_TURBOADC_OVR_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for BB1 */
+#define PHY_ANALOG_BB1_ADDRESS 0x00000140
+#define PHY_ANALOG_BB1_OFFSET 0x00000140
+#define PHY_ANALOG_BB1_I2V_CURR2X_MSB 0
+#define PHY_ANALOG_BB1_I2V_CURR2X_LSB 0
+#define PHY_ANALOG_BB1_I2V_CURR2X_MASK 0x00000001
+#define PHY_ANALOG_BB1_I2V_CURR2X_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_BB1_I2V_CURR2X_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_BB1_ENABLE_LOQ_MSB 1
+#define PHY_ANALOG_BB1_ENABLE_LOQ_LSB 1
+#define PHY_ANALOG_BB1_ENABLE_LOQ_MASK 0x00000002
+#define PHY_ANALOG_BB1_ENABLE_LOQ_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_BB1_ENABLE_LOQ_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_BB1_FORCE_LOQ_MSB 2
+#define PHY_ANALOG_BB1_FORCE_LOQ_LSB 2
+#define PHY_ANALOG_BB1_FORCE_LOQ_MASK 0x00000004
+#define PHY_ANALOG_BB1_FORCE_LOQ_GET(x) (((x) & 0x00000004) >> 2)
+#define PHY_ANALOG_BB1_FORCE_LOQ_SET(x) (((x) << 2) & 0x00000004)
+#define PHY_ANALOG_BB1_ENABLE_NOTCH_MSB 3
+#define PHY_ANALOG_BB1_ENABLE_NOTCH_LSB 3
+#define PHY_ANALOG_BB1_ENABLE_NOTCH_MASK 0x00000008
+#define PHY_ANALOG_BB1_ENABLE_NOTCH_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_BB1_ENABLE_NOTCH_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_BB1_FORCE_NOTCH_MSB 4
+#define PHY_ANALOG_BB1_FORCE_NOTCH_LSB 4
+#define PHY_ANALOG_BB1_FORCE_NOTCH_MASK 0x00000010
+#define PHY_ANALOG_BB1_FORCE_NOTCH_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_BB1_FORCE_NOTCH_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_BB1_ENABLE_BIQUAD_MSB 5
+#define PHY_ANALOG_BB1_ENABLE_BIQUAD_LSB 5
+#define PHY_ANALOG_BB1_ENABLE_BIQUAD_MASK 0x00000020
+#define PHY_ANALOG_BB1_ENABLE_BIQUAD_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_BB1_ENABLE_BIQUAD_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_BB1_FORCE_BIQUAD_MSB 6
+#define PHY_ANALOG_BB1_FORCE_BIQUAD_LSB 6
+#define PHY_ANALOG_BB1_FORCE_BIQUAD_MASK 0x00000040
+#define PHY_ANALOG_BB1_FORCE_BIQUAD_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_BB1_FORCE_BIQUAD_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_BB1_ENABLE_OSDAC_MSB 7
+#define PHY_ANALOG_BB1_ENABLE_OSDAC_LSB 7
+#define PHY_ANALOG_BB1_ENABLE_OSDAC_MASK 0x00000080
+#define PHY_ANALOG_BB1_ENABLE_OSDAC_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_BB1_ENABLE_OSDAC_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_BB1_FORCE_OSDAC_MSB 8
+#define PHY_ANALOG_BB1_FORCE_OSDAC_LSB 8
+#define PHY_ANALOG_BB1_FORCE_OSDAC_MASK 0x00000100
+#define PHY_ANALOG_BB1_FORCE_OSDAC_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_BB1_FORCE_OSDAC_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_BB1_ENABLE_V2I_MSB 9
+#define PHY_ANALOG_BB1_ENABLE_V2I_LSB 9
+#define PHY_ANALOG_BB1_ENABLE_V2I_MASK 0x00000200
+#define PHY_ANALOG_BB1_ENABLE_V2I_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_BB1_ENABLE_V2I_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_BB1_FORCE_V2I_MSB 10
+#define PHY_ANALOG_BB1_FORCE_V2I_LSB 10
+#define PHY_ANALOG_BB1_FORCE_V2I_MASK 0x00000400
+#define PHY_ANALOG_BB1_FORCE_V2I_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_BB1_FORCE_V2I_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_BB1_ENABLE_I2V_MSB 11
+#define PHY_ANALOG_BB1_ENABLE_I2V_LSB 11
+#define PHY_ANALOG_BB1_ENABLE_I2V_MASK 0x00000800
+#define PHY_ANALOG_BB1_ENABLE_I2V_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_BB1_ENABLE_I2V_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_BB1_FORCE_I2V_MSB 12
+#define PHY_ANALOG_BB1_FORCE_I2V_LSB 12
+#define PHY_ANALOG_BB1_FORCE_I2V_MASK 0x00001000
+#define PHY_ANALOG_BB1_FORCE_I2V_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_BB1_FORCE_I2V_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_BB1_CMSEL_MSB 15
+#define PHY_ANALOG_BB1_CMSEL_LSB 13
+#define PHY_ANALOG_BB1_CMSEL_MASK 0x0000e000
+#define PHY_ANALOG_BB1_CMSEL_GET(x) (((x) & 0x0000e000) >> 13)
+#define PHY_ANALOG_BB1_CMSEL_SET(x) (((x) << 13) & 0x0000e000)
+#define PHY_ANALOG_BB1_ATBSEL_MSB 17
+#define PHY_ANALOG_BB1_ATBSEL_LSB 16
+#define PHY_ANALOG_BB1_ATBSEL_MASK 0x00030000
+#define PHY_ANALOG_BB1_ATBSEL_GET(x) (((x) & 0x00030000) >> 16)
+#define PHY_ANALOG_BB1_ATBSEL_SET(x) (((x) << 16) & 0x00030000)
+#define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MSB 18
+#define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_LSB 18
+#define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MASK 0x00040000
+#define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_GET(x) (((x) & 0x00040000) >> 18)
+#define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_SET(x) (((x) << 18) & 0x00040000)
+#define PHY_ANALOG_BB1_OFSTCORRI2VQ_MSB 23
+#define PHY_ANALOG_BB1_OFSTCORRI2VQ_LSB 19
+#define PHY_ANALOG_BB1_OFSTCORRI2VQ_MASK 0x00f80000
+#define PHY_ANALOG_BB1_OFSTCORRI2VQ_GET(x) (((x) & 0x00f80000) >> 19)
+#define PHY_ANALOG_BB1_OFSTCORRI2VQ_SET(x) (((x) << 19) & 0x00f80000)
+#define PHY_ANALOG_BB1_OFSTCORRI2VI_MSB 28
+#define PHY_ANALOG_BB1_OFSTCORRI2VI_LSB 24
+#define PHY_ANALOG_BB1_OFSTCORRI2VI_MASK 0x1f000000
+#define PHY_ANALOG_BB1_OFSTCORRI2VI_GET(x) (((x) & 0x1f000000) >> 24)
+#define PHY_ANALOG_BB1_OFSTCORRI2VI_SET(x) (((x) << 24) & 0x1f000000)
+#define PHY_ANALOG_BB1_LOCALOFFSET_MSB 29
+#define PHY_ANALOG_BB1_LOCALOFFSET_LSB 29
+#define PHY_ANALOG_BB1_LOCALOFFSET_MASK 0x20000000
+#define PHY_ANALOG_BB1_LOCALOFFSET_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_BB1_LOCALOFFSET_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_BB1_RANGE_OSDAC_MSB 31
+#define PHY_ANALOG_BB1_RANGE_OSDAC_LSB 30
+#define PHY_ANALOG_BB1_RANGE_OSDAC_MASK 0xc0000000
+#define PHY_ANALOG_BB1_RANGE_OSDAC_GET(x) (((x) & 0xc0000000) >> 30)
+#define PHY_ANALOG_BB1_RANGE_OSDAC_SET(x) (((x) << 30) & 0xc0000000)
+
+/* macros for BB2 */
+#define PHY_ANALOG_BB2_ADDRESS 0x00000144
+#define PHY_ANALOG_BB2_OFFSET 0x00000144
+#define PHY_ANALOG_BB2_SPARE_MSB 3
+#define PHY_ANALOG_BB2_SPARE_LSB 0
+#define PHY_ANALOG_BB2_SPARE_MASK 0x0000000f
+#define PHY_ANALOG_BB2_SPARE_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_BB2_SPARE_SET(x) (((x) << 0) & 0x0000000f)
+#define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_MSB 7
+#define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_LSB 4
+#define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_MASK 0x000000f0
+#define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_GET(x) (((x) & 0x000000f0) >> 4)
+#define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_SET(x) (((x) << 4) & 0x000000f0)
+#define PHY_ANALOG_BB2_SEL_TEST_MSB 9
+#define PHY_ANALOG_BB2_SEL_TEST_LSB 8
+#define PHY_ANALOG_BB2_SEL_TEST_MASK 0x00000300
+#define PHY_ANALOG_BB2_SEL_TEST_GET(x) (((x) & 0x00000300) >> 8)
+#define PHY_ANALOG_BB2_SEL_TEST_SET(x) (((x) << 8) & 0x00000300)
+#define PHY_ANALOG_BB2_RCFILTER_CAP_MSB 14
+#define PHY_ANALOG_BB2_RCFILTER_CAP_LSB 10
+#define PHY_ANALOG_BB2_RCFILTER_CAP_MASK 0x00007c00
+#define PHY_ANALOG_BB2_RCFILTER_CAP_GET(x) (((x) & 0x00007c00) >> 10)
+#define PHY_ANALOG_BB2_RCFILTER_CAP_SET(x) (((x) << 10) & 0x00007c00)
+#define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_MSB 15
+#define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_LSB 15
+#define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_MASK 0x00008000
+#define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_BB2_FNOTCH_MSB 19
+#define PHY_ANALOG_BB2_FNOTCH_LSB 16
+#define PHY_ANALOG_BB2_FNOTCH_MASK 0x000f0000
+#define PHY_ANALOG_BB2_FNOTCH_GET(x) (((x) & 0x000f0000) >> 16)
+#define PHY_ANALOG_BB2_FNOTCH_SET(x) (((x) << 16) & 0x000f0000)
+#define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MSB 20
+#define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_LSB 20
+#define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MASK 0x00100000
+#define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_GET(x) (((x) & 0x00100000) >> 20)
+#define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_SET(x) (((x) << 20) & 0x00100000)
+#define PHY_ANALOG_BB2_FILTERFC_MSB 25
+#define PHY_ANALOG_BB2_FILTERFC_LSB 21
+#define PHY_ANALOG_BB2_FILTERFC_MASK 0x03e00000
+#define PHY_ANALOG_BB2_FILTERFC_GET(x) (((x) & 0x03e00000) >> 21)
+#define PHY_ANALOG_BB2_FILTERFC_SET(x) (((x) << 21) & 0x03e00000)
+#define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MSB 26
+#define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_LSB 26
+#define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MASK 0x04000000
+#define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_GET(x) (((x) & 0x04000000) >> 26)
+#define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_SET(x) (((x) << 26) & 0x04000000)
+#define PHY_ANALOG_BB2_I2V2RXOUT_EN_MSB 27
+#define PHY_ANALOG_BB2_I2V2RXOUT_EN_LSB 27
+#define PHY_ANALOG_BB2_I2V2RXOUT_EN_MASK 0x08000000
+#define PHY_ANALOG_BB2_I2V2RXOUT_EN_GET(x) (((x) & 0x08000000) >> 27)
+#define PHY_ANALOG_BB2_I2V2RXOUT_EN_SET(x) (((x) << 27) & 0x08000000)
+#define PHY_ANALOG_BB2_BQ2RXOUT_EN_MSB 28
+#define PHY_ANALOG_BB2_BQ2RXOUT_EN_LSB 28
+#define PHY_ANALOG_BB2_BQ2RXOUT_EN_MASK 0x10000000
+#define PHY_ANALOG_BB2_BQ2RXOUT_EN_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_BB2_BQ2RXOUT_EN_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_BB2_RXIN2I2V_EN_MSB 29
+#define PHY_ANALOG_BB2_RXIN2I2V_EN_LSB 29
+#define PHY_ANALOG_BB2_RXIN2I2V_EN_MASK 0x20000000
+#define PHY_ANALOG_BB2_RXIN2I2V_EN_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_BB2_RXIN2I2V_EN_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_BB2_RXIN2BQ_EN_MSB 30
+#define PHY_ANALOG_BB2_RXIN2BQ_EN_LSB 30
+#define PHY_ANALOG_BB2_RXIN2BQ_EN_MASK 0x40000000
+#define PHY_ANALOG_BB2_RXIN2BQ_EN_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_BB2_RXIN2BQ_EN_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MSB 31
+#define PHY_ANALOG_BB2_SWITCH_OVERRIDE_LSB 31
+#define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MASK 0x80000000
+#define PHY_ANALOG_BB2_SWITCH_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_BB2_SWITCH_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for BB3 */
+#define PHY_ANALOG_BB3_ADDRESS 0x00000148
+#define PHY_ANALOG_BB3_OFFSET 0x00000148
+#define PHY_ANALOG_BB3_SPARE_MSB 15
+#define PHY_ANALOG_BB3_SPARE_LSB 0
+#define PHY_ANALOG_BB3_SPARE_MASK 0x0000ffff
+#define PHY_ANALOG_BB3_SPARE_GET(x) (((x) & 0x0000ffff) >> 0)
+#define PHY_ANALOG_BB3_SPARE_SET(x) (((x) << 0) & 0x0000ffff)
+#define PHY_ANALOG_BB3_FILTERFC_MSB 20
+#define PHY_ANALOG_BB3_FILTERFC_LSB 16
+#define PHY_ANALOG_BB3_FILTERFC_MASK 0x001f0000
+#define PHY_ANALOG_BB3_FILTERFC_GET(x) (((x) & 0x001f0000) >> 16)
+#define PHY_ANALOG_BB3_OFSTCORRI2VQ_MSB 25
+#define PHY_ANALOG_BB3_OFSTCORRI2VQ_LSB 21
+#define PHY_ANALOG_BB3_OFSTCORRI2VQ_MASK 0x03e00000
+#define PHY_ANALOG_BB3_OFSTCORRI2VQ_GET(x) (((x) & 0x03e00000) >> 21)
+#define PHY_ANALOG_BB3_OFSTCORRI2VI_MSB 30
+#define PHY_ANALOG_BB3_OFSTCORRI2VI_LSB 26
+#define PHY_ANALOG_BB3_OFSTCORRI2VI_MASK 0x7c000000
+#define PHY_ANALOG_BB3_OFSTCORRI2VI_GET(x) (((x) & 0x7c000000) >> 26)
+#define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_MSB 31
+#define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_LSB 31
+#define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_MASK 0x80000000
+#define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for PLLCLKMODA */
+#define PHY_ANALOG_PLLCLKMODA_ADDRESS 0x00000280
+#define PHY_ANALOG_PLLCLKMODA_OFFSET 0x00000280
+#define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_MSB 0
+#define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_LSB 0
+#define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_MASK 0x00000001
+#define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_PLLCLKMODA_PWDPLL_MSB 1
+#define PHY_ANALOG_PLLCLKMODA_PWDPLL_LSB 1
+#define PHY_ANALOG_PLLCLKMODA_PWDPLL_MASK 0x00000002
+#define PHY_ANALOG_PLLCLKMODA_PWDPLL_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_PLLCLKMODA_PWDPLL_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_PLLCLKMODA_PLLFRAC_MSB 16
+#define PHY_ANALOG_PLLCLKMODA_PLLFRAC_LSB 2
+#define PHY_ANALOG_PLLCLKMODA_PLLFRAC_MASK 0x0001fffc
+#define PHY_ANALOG_PLLCLKMODA_PLLFRAC_GET(x) (((x) & 0x0001fffc) >> 2)
+#define PHY_ANALOG_PLLCLKMODA_PLLFRAC_SET(x) (((x) << 2) & 0x0001fffc)
+#define PHY_ANALOG_PLLCLKMODA_REFDIV_MSB 20
+#define PHY_ANALOG_PLLCLKMODA_REFDIV_LSB 17
+#define PHY_ANALOG_PLLCLKMODA_REFDIV_MASK 0x001e0000
+#define PHY_ANALOG_PLLCLKMODA_REFDIV_GET(x) (((x) & 0x001e0000) >> 17)
+#define PHY_ANALOG_PLLCLKMODA_REFDIV_SET(x) (((x) << 17) & 0x001e0000)
+#define PHY_ANALOG_PLLCLKMODA_DIV_MSB 30
+#define PHY_ANALOG_PLLCLKMODA_DIV_LSB 21
+#define PHY_ANALOG_PLLCLKMODA_DIV_MASK 0x7fe00000
+#define PHY_ANALOG_PLLCLKMODA_DIV_GET(x) (((x) & 0x7fe00000) >> 21)
+#define PHY_ANALOG_PLLCLKMODA_DIV_SET(x) (((x) << 21) & 0x7fe00000)
+#define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_MSB 31
+#define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_LSB 31
+#define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_MASK 0x80000000
+#define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for PLLCLKMODA2 */
+#define PHY_ANALOG_PLLCLKMODA2_ADDRESS 0x00000284
+#define PHY_ANALOG_PLLCLKMODA2_OFFSET 0x00000284
+#define PHY_ANALOG_PLLCLKMODA2_SPARE_MSB 3
+#define PHY_ANALOG_PLLCLKMODA2_SPARE_LSB 0
+#define PHY_ANALOG_PLLCLKMODA2_SPARE_MASK 0x0000000f
+#define PHY_ANALOG_PLLCLKMODA2_SPARE_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_PLLCLKMODA2_SPARE_SET(x) (((x) << 0) & 0x0000000f)
+#define PHY_ANALOG_PLLCLKMODA2_DACPWD_MSB 4
+#define PHY_ANALOG_PLLCLKMODA2_DACPWD_LSB 4
+#define PHY_ANALOG_PLLCLKMODA2_DACPWD_MASK 0x00000010
+#define PHY_ANALOG_PLLCLKMODA2_DACPWD_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_PLLCLKMODA2_DACPWD_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_PLLCLKMODA2_ADCPWD_MSB 5
+#define PHY_ANALOG_PLLCLKMODA2_ADCPWD_LSB 5
+#define PHY_ANALOG_PLLCLKMODA2_ADCPWD_MASK 0x00000020
+#define PHY_ANALOG_PLLCLKMODA2_ADCPWD_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_PLLCLKMODA2_ADCPWD_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_MSB 6
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_LSB 6
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_MASK 0x00000040
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_MSB 8
+#define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_LSB 7
+#define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_MASK 0x00000180
+#define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_GET(x) (((x) & 0x00000180) >> 7)
+#define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_SET(x) (((x) << 7) & 0x00000180)
+#define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_MSB 12
+#define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_LSB 9
+#define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_MASK 0x00001e00
+#define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_GET(x) (((x) & 0x00001e00) >> 9)
+#define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_SET(x) (((x) << 9) & 0x00001e00)
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_MSB 13
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_LSB 13
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_MASK 0x00002000
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_MSB 14
+#define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_LSB 14
+#define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_MASK 0x00004000
+#define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_MSB 15
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_LSB 15
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_MASK 0x00008000
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_PLLCLKMODA2_PLLATB_MSB 17
+#define PHY_ANALOG_PLLCLKMODA2_PLLATB_LSB 16
+#define PHY_ANALOG_PLLCLKMODA2_PLLATB_MASK 0x00030000
+#define PHY_ANALOG_PLLCLKMODA2_PLLATB_GET(x) (((x) & 0x00030000) >> 16)
+#define PHY_ANALOG_PLLCLKMODA2_PLLATB_SET(x) (((x) << 16) & 0x00030000)
+#define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_MSB 18
+#define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_LSB 18
+#define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_MASK 0x00040000
+#define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_GET(x) (((x) & 0x00040000) >> 18)
+#define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_SET(x) (((x) << 18) & 0x00040000)
+#define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_MSB 19
+#define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_LSB 19
+#define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_MASK 0x00080000
+#define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_GET(x) (((x) & 0x00080000) >> 19)
+#define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_SET(x) (((x) << 19) & 0x00080000)
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_MSB 20
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_LSB 20
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_MASK 0x00100000
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_GET(x) (((x) & 0x00100000) >> 20)
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_SET(x) (((x) << 20) & 0x00100000)
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_MSB 21
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_LSB 21
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_MASK 0x00200000
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_GET(x) (((x) & 0x00200000) >> 21)
+#define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_SET(x) (((x) << 21) & 0x00200000)
+#define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_MSB 23
+#define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_LSB 22
+#define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_MASK 0x00c00000
+#define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_GET(x) (((x) & 0x00c00000) >> 22)
+#define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_SET(x) (((x) << 22) & 0x00c00000)
+#define PHY_ANALOG_PLLCLKMODA2_PLLICP_MSB 26
+#define PHY_ANALOG_PLLCLKMODA2_PLLICP_LSB 24
+#define PHY_ANALOG_PLLCLKMODA2_PLLICP_MASK 0x07000000
+#define PHY_ANALOG_PLLCLKMODA2_PLLICP_GET(x) (((x) & 0x07000000) >> 24)
+#define PHY_ANALOG_PLLCLKMODA2_PLLICP_SET(x) (((x) << 24) & 0x07000000)
+#define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_MSB 31
+#define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_LSB 27
+#define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_MASK 0xf8000000
+#define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_GET(x) (((x) & 0xf8000000) >> 27)
+#define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_SET(x) (((x) << 27) & 0xf8000000)
+
+/* macros for TOP */
+#define PHY_ANALOG_TOP_ADDRESS 0x00000288
+#define PHY_ANALOG_TOP_OFFSET 0x00000288
+#define PHY_ANALOG_TOP_SPARE_MSB 2
+#define PHY_ANALOG_TOP_SPARE_LSB 0
+#define PHY_ANALOG_TOP_SPARE_MASK 0x00000007
+#define PHY_ANALOG_TOP_SPARE_GET(x) (((x) & 0x00000007) >> 0)
+#define PHY_ANALOG_TOP_SPARE_SET(x) (((x) << 0) & 0x00000007)
+#define PHY_ANALOG_TOP_PWDBIAS_MSB 3
+#define PHY_ANALOG_TOP_PWDBIAS_LSB 3
+#define PHY_ANALOG_TOP_PWDBIAS_MASK 0x00000008
+#define PHY_ANALOG_TOP_PWDBIAS_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_TOP_PWDBIAS_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_TOP_FLIP_XPABIAS_MSB 4
+#define PHY_ANALOG_TOP_FLIP_XPABIAS_LSB 4
+#define PHY_ANALOG_TOP_FLIP_XPABIAS_MASK 0x00000010
+#define PHY_ANALOG_TOP_FLIP_XPABIAS_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_TOP_FLIP_XPABIAS_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_TOP_XPAON2_MSB 5
+#define PHY_ANALOG_TOP_XPAON2_LSB 5
+#define PHY_ANALOG_TOP_XPAON2_MASK 0x00000020
+#define PHY_ANALOG_TOP_XPAON2_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_TOP_XPAON2_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_TOP_XPAON5_MSB 6
+#define PHY_ANALOG_TOP_XPAON5_LSB 6
+#define PHY_ANALOG_TOP_XPAON5_MASK 0x00000040
+#define PHY_ANALOG_TOP_XPAON5_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_TOP_XPAON5_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_TOP_XPASHORT2GND_MSB 7
+#define PHY_ANALOG_TOP_XPASHORT2GND_LSB 7
+#define PHY_ANALOG_TOP_XPASHORT2GND_MASK 0x00000080
+#define PHY_ANALOG_TOP_XPASHORT2GND_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_TOP_XPASHORT2GND_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_TOP_XPABIASLVL_MSB 11
+#define PHY_ANALOG_TOP_XPABIASLVL_LSB 8
+#define PHY_ANALOG_TOP_XPABIASLVL_MASK 0x00000f00
+#define PHY_ANALOG_TOP_XPABIASLVL_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_TOP_XPABIASLVL_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_TOP_XPABIAS_EN_MSB 12
+#define PHY_ANALOG_TOP_XPABIAS_EN_LSB 12
+#define PHY_ANALOG_TOP_XPABIAS_EN_MASK 0x00001000
+#define PHY_ANALOG_TOP_XPABIAS_EN_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_TOP_XPABIAS_EN_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_TOP_ATBSELECT_MSB 13
+#define PHY_ANALOG_TOP_ATBSELECT_LSB 13
+#define PHY_ANALOG_TOP_ATBSELECT_MASK 0x00002000
+#define PHY_ANALOG_TOP_ATBSELECT_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_TOP_ATBSELECT_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_TOP_LOCAL_XPA_MSB 14
+#define PHY_ANALOG_TOP_LOCAL_XPA_LSB 14
+#define PHY_ANALOG_TOP_LOCAL_XPA_MASK 0x00004000
+#define PHY_ANALOG_TOP_LOCAL_XPA_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_TOP_LOCAL_XPA_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_TOP_XPABIAS_BYPASS_MSB 15
+#define PHY_ANALOG_TOP_XPABIAS_BYPASS_LSB 15
+#define PHY_ANALOG_TOP_XPABIAS_BYPASS_MASK 0x00008000
+#define PHY_ANALOG_TOP_XPABIAS_BYPASS_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_TOP_XPABIAS_BYPASS_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_TOP_TEST_PADQ_EN_MSB 16
+#define PHY_ANALOG_TOP_TEST_PADQ_EN_LSB 16
+#define PHY_ANALOG_TOP_TEST_PADQ_EN_MASK 0x00010000
+#define PHY_ANALOG_TOP_TEST_PADQ_EN_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_TOP_TEST_PADQ_EN_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_TOP_TEST_PADI_EN_MSB 17
+#define PHY_ANALOG_TOP_TEST_PADI_EN_LSB 17
+#define PHY_ANALOG_TOP_TEST_PADI_EN_MASK 0x00020000
+#define PHY_ANALOG_TOP_TEST_PADI_EN_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_TOP_TEST_PADI_EN_SET(x) (((x) << 17) & 0x00020000)
+#define PHY_ANALOG_TOP_TESTIQ_RSEL_MSB 18
+#define PHY_ANALOG_TOP_TESTIQ_RSEL_LSB 18
+#define PHY_ANALOG_TOP_TESTIQ_RSEL_MASK 0x00040000
+#define PHY_ANALOG_TOP_TESTIQ_RSEL_GET(x) (((x) & 0x00040000) >> 18)
+#define PHY_ANALOG_TOP_TESTIQ_RSEL_SET(x) (((x) << 18) & 0x00040000)
+#define PHY_ANALOG_TOP_TESTIQ_BUFEN_MSB 19
+#define PHY_ANALOG_TOP_TESTIQ_BUFEN_LSB 19
+#define PHY_ANALOG_TOP_TESTIQ_BUFEN_MASK 0x00080000
+#define PHY_ANALOG_TOP_TESTIQ_BUFEN_GET(x) (((x) & 0x00080000) >> 19)
+#define PHY_ANALOG_TOP_TESTIQ_BUFEN_SET(x) (((x) << 19) & 0x00080000)
+#define PHY_ANALOG_TOP_PAD2GND_MSB 20
+#define PHY_ANALOG_TOP_PAD2GND_LSB 20
+#define PHY_ANALOG_TOP_PAD2GND_MASK 0x00100000
+#define PHY_ANALOG_TOP_PAD2GND_GET(x) (((x) & 0x00100000) >> 20)
+#define PHY_ANALOG_TOP_PAD2GND_SET(x) (((x) << 20) & 0x00100000)
+#define PHY_ANALOG_TOP_INTH2PAD_MSB 21
+#define PHY_ANALOG_TOP_INTH2PAD_LSB 21
+#define PHY_ANALOG_TOP_INTH2PAD_MASK 0x00200000
+#define PHY_ANALOG_TOP_INTH2PAD_GET(x) (((x) & 0x00200000) >> 21)
+#define PHY_ANALOG_TOP_INTH2PAD_SET(x) (((x) << 21) & 0x00200000)
+#define PHY_ANALOG_TOP_INTH2GND_MSB 22
+#define PHY_ANALOG_TOP_INTH2GND_LSB 22
+#define PHY_ANALOG_TOP_INTH2GND_MASK 0x00400000
+#define PHY_ANALOG_TOP_INTH2GND_GET(x) (((x) & 0x00400000) >> 22)
+#define PHY_ANALOG_TOP_INTH2GND_SET(x) (((x) << 22) & 0x00400000)
+#define PHY_ANALOG_TOP_INT2PAD_MSB 23
+#define PHY_ANALOG_TOP_INT2PAD_LSB 23
+#define PHY_ANALOG_TOP_INT2PAD_MASK 0x00800000
+#define PHY_ANALOG_TOP_INT2PAD_GET(x) (((x) & 0x00800000) >> 23)
+#define PHY_ANALOG_TOP_INT2PAD_SET(x) (((x) << 23) & 0x00800000)
+#define PHY_ANALOG_TOP_INT2GND_MSB 24
+#define PHY_ANALOG_TOP_INT2GND_LSB 24
+#define PHY_ANALOG_TOP_INT2GND_MASK 0x01000000
+#define PHY_ANALOG_TOP_INT2GND_GET(x) (((x) & 0x01000000) >> 24)
+#define PHY_ANALOG_TOP_INT2GND_SET(x) (((x) << 24) & 0x01000000)
+#define PHY_ANALOG_TOP_PWDPALCLK_MSB 25
+#define PHY_ANALOG_TOP_PWDPALCLK_LSB 25
+#define PHY_ANALOG_TOP_PWDPALCLK_MASK 0x02000000
+#define PHY_ANALOG_TOP_PWDPALCLK_GET(x) (((x) & 0x02000000) >> 25)
+#define PHY_ANALOG_TOP_PWDPALCLK_SET(x) (((x) << 25) & 0x02000000)
+#define PHY_ANALOG_TOP_INV_CLK320_ADC_MSB 26
+#define PHY_ANALOG_TOP_INV_CLK320_ADC_LSB 26
+#define PHY_ANALOG_TOP_INV_CLK320_ADC_MASK 0x04000000
+#define PHY_ANALOG_TOP_INV_CLK320_ADC_GET(x) (((x) & 0x04000000) >> 26)
+#define PHY_ANALOG_TOP_INV_CLK320_ADC_SET(x) (((x) << 26) & 0x04000000)
+#define PHY_ANALOG_TOP_FLIP_REFCLK40_MSB 27
+#define PHY_ANALOG_TOP_FLIP_REFCLK40_LSB 27
+#define PHY_ANALOG_TOP_FLIP_REFCLK40_MASK 0x08000000
+#define PHY_ANALOG_TOP_FLIP_REFCLK40_GET(x) (((x) & 0x08000000) >> 27)
+#define PHY_ANALOG_TOP_FLIP_REFCLK40_SET(x) (((x) << 27) & 0x08000000)
+#define PHY_ANALOG_TOP_FLIP_PLLCLK320_MSB 28
+#define PHY_ANALOG_TOP_FLIP_PLLCLK320_LSB 28
+#define PHY_ANALOG_TOP_FLIP_PLLCLK320_MASK 0x10000000
+#define PHY_ANALOG_TOP_FLIP_PLLCLK320_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_TOP_FLIP_PLLCLK320_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_TOP_FLIP_PLLCLK160_MSB 29
+#define PHY_ANALOG_TOP_FLIP_PLLCLK160_LSB 29
+#define PHY_ANALOG_TOP_FLIP_PLLCLK160_MASK 0x20000000
+#define PHY_ANALOG_TOP_FLIP_PLLCLK160_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_TOP_FLIP_PLLCLK160_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_TOP_CLK_SEL_MSB 31
+#define PHY_ANALOG_TOP_CLK_SEL_LSB 30
+#define PHY_ANALOG_TOP_CLK_SEL_MASK 0xc0000000
+#define PHY_ANALOG_TOP_CLK_SEL_GET(x) (((x) & 0xc0000000) >> 30)
+#define PHY_ANALOG_TOP_CLK_SEL_SET(x) (((x) << 30) & 0xc0000000)
+
+/* macros for THERM */
+#define PHY_ANALOG_THERM_ADDRESS 0x0000028c
+#define PHY_ANALOG_THERM_OFFSET 0x0000028c
+#define PHY_ANALOG_THERM_LOREG_LVL_MSB 2
+#define PHY_ANALOG_THERM_LOREG_LVL_LSB 0
+#define PHY_ANALOG_THERM_LOREG_LVL_MASK 0x00000007
+#define PHY_ANALOG_THERM_LOREG_LVL_GET(x) (((x) & 0x00000007) >> 0)
+#define PHY_ANALOG_THERM_LOREG_LVL_SET(x) (((x) << 0) & 0x00000007)
+#define PHY_ANALOG_THERM_RFREG_LVL_MSB 5
+#define PHY_ANALOG_THERM_RFREG_LVL_LSB 3
+#define PHY_ANALOG_THERM_RFREG_LVL_MASK 0x00000038
+#define PHY_ANALOG_THERM_RFREG_LVL_GET(x) (((x) & 0x00000038) >> 3)
+#define PHY_ANALOG_THERM_RFREG_LVL_SET(x) (((x) << 3) & 0x00000038)
+#define PHY_ANALOG_THERM_SAR_ADC_DONE_MSB 6
+#define PHY_ANALOG_THERM_SAR_ADC_DONE_LSB 6
+#define PHY_ANALOG_THERM_SAR_ADC_DONE_MASK 0x00000040
+#define PHY_ANALOG_THERM_SAR_ADC_DONE_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_THERM_SAR_ADC_OUT_MSB 14
+#define PHY_ANALOG_THERM_SAR_ADC_OUT_LSB 7
+#define PHY_ANALOG_THERM_SAR_ADC_OUT_MASK 0x00007f80
+#define PHY_ANALOG_THERM_SAR_ADC_OUT_GET(x) (((x) & 0x00007f80) >> 7)
+#define PHY_ANALOG_THERM_SAR_DACTEST_CODE_MSB 22
+#define PHY_ANALOG_THERM_SAR_DACTEST_CODE_LSB 15
+#define PHY_ANALOG_THERM_SAR_DACTEST_CODE_MASK 0x007f8000
+#define PHY_ANALOG_THERM_SAR_DACTEST_CODE_GET(x) (((x) & 0x007f8000) >> 15)
+#define PHY_ANALOG_THERM_SAR_DACTEST_CODE_SET(x) (((x) << 15) & 0x007f8000)
+#define PHY_ANALOG_THERM_SAR_DACTEST_EN_MSB 23
+#define PHY_ANALOG_THERM_SAR_DACTEST_EN_LSB 23
+#define PHY_ANALOG_THERM_SAR_DACTEST_EN_MASK 0x00800000
+#define PHY_ANALOG_THERM_SAR_DACTEST_EN_GET(x) (((x) & 0x00800000) >> 23)
+#define PHY_ANALOG_THERM_SAR_DACTEST_EN_SET(x) (((x) << 23) & 0x00800000)
+#define PHY_ANALOG_THERM_SAR_ADCCAL_EN_MSB 24
+#define PHY_ANALOG_THERM_SAR_ADCCAL_EN_LSB 24
+#define PHY_ANALOG_THERM_SAR_ADCCAL_EN_MASK 0x01000000
+#define PHY_ANALOG_THERM_SAR_ADCCAL_EN_GET(x) (((x) & 0x01000000) >> 24)
+#define PHY_ANALOG_THERM_SAR_ADCCAL_EN_SET(x) (((x) << 24) & 0x01000000)
+#define PHY_ANALOG_THERM_THERMSEL_MSB 26
+#define PHY_ANALOG_THERM_THERMSEL_LSB 25
+#define PHY_ANALOG_THERM_THERMSEL_MASK 0x06000000
+#define PHY_ANALOG_THERM_THERMSEL_GET(x) (((x) & 0x06000000) >> 25)
+#define PHY_ANALOG_THERM_THERMSEL_SET(x) (((x) << 25) & 0x06000000)
+#define PHY_ANALOG_THERM_SAR_SLOW_EN_MSB 27
+#define PHY_ANALOG_THERM_SAR_SLOW_EN_LSB 27
+#define PHY_ANALOG_THERM_SAR_SLOW_EN_MASK 0x08000000
+#define PHY_ANALOG_THERM_SAR_SLOW_EN_GET(x) (((x) & 0x08000000) >> 27)
+#define PHY_ANALOG_THERM_SAR_SLOW_EN_SET(x) (((x) << 27) & 0x08000000)
+#define PHY_ANALOG_THERM_THERMSTART_MSB 28
+#define PHY_ANALOG_THERM_THERMSTART_LSB 28
+#define PHY_ANALOG_THERM_THERMSTART_MASK 0x10000000
+#define PHY_ANALOG_THERM_THERMSTART_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_THERM_THERMSTART_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_MSB 29
+#define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_LSB 29
+#define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_MASK 0x20000000
+#define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_GET(x) (((x) & 0x20000000) >> 29)
+#define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_SET(x) (((x) << 29) & 0x20000000)
+#define PHY_ANALOG_THERM_THERMON_MSB 30
+#define PHY_ANALOG_THERM_THERMON_LSB 30
+#define PHY_ANALOG_THERM_THERMON_MASK 0x40000000
+#define PHY_ANALOG_THERM_THERMON_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_THERM_THERMON_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_THERM_LOCAL_THERM_MSB 31
+#define PHY_ANALOG_THERM_LOCAL_THERM_LSB 31
+#define PHY_ANALOG_THERM_LOCAL_THERM_MASK 0x80000000
+#define PHY_ANALOG_THERM_LOCAL_THERM_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_THERM_LOCAL_THERM_SET(x) (((x) << 31) & 0x80000000)
+
+/* macros for XTAL */
+#define PHY_ANALOG_XTAL_ADDRESS 0x00000290
+#define PHY_ANALOG_XTAL_OFFSET 0x00000290
+#define PHY_ANALOG_XTAL_SPARE_MSB 5
+#define PHY_ANALOG_XTAL_SPARE_LSB 0
+#define PHY_ANALOG_XTAL_SPARE_MASK 0x0000003f
+#define PHY_ANALOG_XTAL_SPARE_GET(x) (((x) & 0x0000003f) >> 0)
+#define PHY_ANALOG_XTAL_SPARE_SET(x) (((x) << 0) & 0x0000003f)
+#define PHY_ANALOG_XTAL_XTAL_NOTCXODET_MSB 6
+#define PHY_ANALOG_XTAL_XTAL_NOTCXODET_LSB 6
+#define PHY_ANALOG_XTAL_XTAL_NOTCXODET_MASK 0x00000040
+#define PHY_ANALOG_XTAL_XTAL_NOTCXODET_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_XTAL_XTAL_NOTCXODET_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_XTAL_LOCALBIAS2X_MSB 7
+#define PHY_ANALOG_XTAL_LOCALBIAS2X_LSB 7
+#define PHY_ANALOG_XTAL_LOCALBIAS2X_MASK 0x00000080
+#define PHY_ANALOG_XTAL_LOCALBIAS2X_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_XTAL_LOCALBIAS2X_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_XTAL_LOCAL_XTAL_MSB 8
+#define PHY_ANALOG_XTAL_LOCAL_XTAL_LSB 8
+#define PHY_ANALOG_XTAL_LOCAL_XTAL_MASK 0x00000100
+#define PHY_ANALOG_XTAL_LOCAL_XTAL_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_XTAL_LOCAL_XTAL_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_MSB 9
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_LSB 9
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_MASK 0x00000200
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_XTAL_XTAL_OSCON_MSB 10
+#define PHY_ANALOG_XTAL_XTAL_OSCON_LSB 10
+#define PHY_ANALOG_XTAL_XTAL_OSCON_MASK 0x00000400
+#define PHY_ANALOG_XTAL_XTAL_OSCON_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_XTAL_XTAL_OSCON_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKD_MSB 11
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKD_LSB 11
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKD_MASK 0x00000800
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKD_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_XTAL_XTAL_PWDCLKD_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_MSB 12
+#define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_LSB 12
+#define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_MASK 0x00001000
+#define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_XTAL_XTAL_SHRTXIN_MSB 13
+#define PHY_ANALOG_XTAL_XTAL_SHRTXIN_LSB 13
+#define PHY_ANALOG_XTAL_XTAL_SHRTXIN_MASK 0x00002000
+#define PHY_ANALOG_XTAL_XTAL_SHRTXIN_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_XTAL_XTAL_SHRTXIN_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_XTAL_XTAL_DRVSTR_MSB 15
+#define PHY_ANALOG_XTAL_XTAL_DRVSTR_LSB 14
+#define PHY_ANALOG_XTAL_XTAL_DRVSTR_MASK 0x0000c000
+#define PHY_ANALOG_XTAL_XTAL_DRVSTR_GET(x) (((x) & 0x0000c000) >> 14)
+#define PHY_ANALOG_XTAL_XTAL_DRVSTR_SET(x) (((x) << 14) & 0x0000c000)
+#define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_MSB 22
+#define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_LSB 16
+#define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_MASK 0x007f0000
+#define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_GET(x) (((x) & 0x007f0000) >> 16)
+#define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_SET(x) (((x) << 16) & 0x007f0000)
+#define PHY_ANALOG_XTAL_XTAL_CAPINDAC_MSB 29
+#define PHY_ANALOG_XTAL_XTAL_CAPINDAC_LSB 23
+#define PHY_ANALOG_XTAL_XTAL_CAPINDAC_MASK 0x3f800000
+#define PHY_ANALOG_XTAL_XTAL_CAPINDAC_GET(x) (((x) & 0x3f800000) >> 23)
+#define PHY_ANALOG_XTAL_XTAL_CAPINDAC_SET(x) (((x) << 23) & 0x3f800000)
+#define PHY_ANALOG_XTAL_XTAL_BIAS2X_MSB 30
+#define PHY_ANALOG_XTAL_XTAL_BIAS2X_LSB 30
+#define PHY_ANALOG_XTAL_XTAL_BIAS2X_MASK 0x40000000
+#define PHY_ANALOG_XTAL_XTAL_BIAS2X_GET(x) (((x) & 0x40000000) >> 30)
+#define PHY_ANALOG_XTAL_XTAL_BIAS2X_SET(x) (((x) << 30) & 0x40000000)
+#define PHY_ANALOG_XTAL_TCXODET_MSB 31
+#define PHY_ANALOG_XTAL_TCXODET_LSB 31
+#define PHY_ANALOG_XTAL_TCXODET_MASK 0x80000000
+#define PHY_ANALOG_XTAL_TCXODET_GET(x) (((x) & 0x80000000) >> 31)
+
+/* macros for rbist_cntrl */
+#define PHY_ANALOG_RBIST_CNTRL_ADDRESS 0x00000380
+#define PHY_ANALOG_RBIST_CNTRL_OFFSET 0x00000380
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MSB 0
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_LSB 0
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MASK 0x00000001
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_GET(x) (((x) & 0x00000001) >> 0)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_SET(x) (((x) << 0) & 0x00000001)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MSB 1
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_LSB 1
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MASK 0x00000002
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_GET(x) (((x) & 0x00000002) >> 1)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_SET(x) (((x) << 1) & 0x00000002)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MSB 2
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_LSB 2
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MASK 0x00000004
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_GET(x) (((x) & 0x00000004) >> 2)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_SET(x) (((x) << 2) & 0x00000004)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MSB 3
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_LSB 3
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MASK 0x00000008
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_GET(x) (((x) & 0x00000008) >> 3)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_SET(x) (((x) << 3) & 0x00000008)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MSB 4
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_LSB 4
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MASK 0x00000010
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MSB 5
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_LSB 5
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MASK 0x00000020
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_GET(x) (((x) & 0x00000020) >> 5)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_SET(x) (((x) << 5) & 0x00000020)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MSB 6
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_LSB 6
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MASK 0x00000040
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_GET(x) (((x) & 0x00000040) >> 6)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_SET(x) (((x) << 6) & 0x00000040)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MSB 7
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_LSB 7
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MASK 0x00000080
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_GET(x) (((x) & 0x00000080) >> 7)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_SET(x) (((x) << 7) & 0x00000080)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MSB 8
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_LSB 8
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MASK 0x00000100
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MSB 9
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_LSB 9
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MASK 0x00000200
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MSB 10
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_LSB 10
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MASK 0x00000400
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MSB 11
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_LSB 11
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MASK 0x00000800
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MSB 12
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_LSB 12
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MASK 0x00001000
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MSB 13
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_LSB 13
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MASK 0x00002000
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MSB 14
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_LSB 14
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MASK 0x00004000
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MSB 15
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_LSB 15
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MASK 0x00008000
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MSB 16
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_LSB 16
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MASK 0x00010000
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MSB 17
+#define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_LSB 17
+#define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MASK 0x00020000
+#define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_GET(x) (((x) & 0x00020000) >> 17)
+#define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_SET(x) (((x) << 17) & 0x00020000)
+
+/* macros for tx_dc_offset */
+#define PHY_ANALOG_TX_DC_OFFSET_ADDRESS 0x00000384
+#define PHY_ANALOG_TX_DC_OFFSET_OFFSET 0x00000384
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MSB 10
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_LSB 0
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MASK 0x000007ff
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_GET(x) (((x) & 0x000007ff) >> 0)
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_SET(x) (((x) << 0) & 0x000007ff)
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MSB 26
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_LSB 16
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MASK 0x07ff0000
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_GET(x) (((x) & 0x07ff0000) >> 16)
+#define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_SET(x) (((x) << 16) & 0x07ff0000)
+
+/* macros for tx_tonegen0 */
+#define PHY_ANALOG_TX_TONEGEN0_ADDRESS 0x00000388
+#define PHY_ANALOG_TX_TONEGEN0_OFFSET 0x00000388
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB 6
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB 0
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB 11
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB 8
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB 23
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB 16
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB 30
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB 24
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
+#define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
+
+/* macros for tx_tonegen1 */
+#define PHY_ANALOG_TX_TONEGEN1_ADDRESS 0x0000038c
+#define PHY_ANALOG_TX_TONEGEN1_OFFSET 0x0000038c
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MSB 6
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_LSB 0
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MSB 11
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_LSB 8
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MSB 23
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_LSB 16
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MSB 30
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_LSB 24
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
+#define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
+
+/* macros for tx_lftonegen0 */
+#define PHY_ANALOG_TX_LFTONEGEN0_ADDRESS 0x00000390
+#define PHY_ANALOG_TX_LFTONEGEN0_OFFSET 0x00000390
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB 6
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB 0
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB 11
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB 8
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB 23
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB 16
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB 30
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB 24
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
+#define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
+
+/* macros for tx_linear_ramp_i */
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ADDRESS 0x00000394
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_OFFSET 0x00000394
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MSB 10
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_LSB 0
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MASK 0x000007ff
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_GET(x) (((x) & 0x000007ff) >> 0)
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_SET(x) (((x) << 0) & 0x000007ff)
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MSB 21
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_LSB 12
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MASK 0x003ff000
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_GET(x) (((x) & 0x003ff000) >> 12)
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_SET(x) (((x) << 12) & 0x003ff000)
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MSB 29
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_LSB 24
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MASK 0x3f000000
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_GET(x) (((x) & 0x3f000000) >> 24)
+#define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_SET(x) (((x) << 24) & 0x3f000000)
+
+/* macros for tx_linear_ramp_q */
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ADDRESS 0x00000398
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_OFFSET 0x00000398
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MSB 10
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_LSB 0
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MASK 0x000007ff
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_GET(x) (((x) & 0x000007ff) >> 0)
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_SET(x) (((x) << 0) & 0x000007ff)
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MSB 21
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_LSB 12
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MASK 0x003ff000
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_GET(x) (((x) & 0x003ff000) >> 12)
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_SET(x) (((x) << 12) & 0x003ff000)
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MSB 29
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_LSB 24
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MASK 0x3f000000
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_GET(x) (((x) & 0x3f000000) >> 24)
+#define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_SET(x) (((x) << 24) & 0x3f000000)
+
+/* macros for tx_prbs_mag */
+#define PHY_ANALOG_TX_PRBS_MAG_ADDRESS 0x0000039c
+#define PHY_ANALOG_TX_PRBS_MAG_OFFSET 0x0000039c
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MSB 9
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_LSB 0
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MASK 0x000003ff
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_GET(x) (((x) & 0x000003ff) >> 0)
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_SET(x) (((x) << 0) & 0x000003ff)
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MSB 25
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_LSB 16
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MASK 0x03ff0000
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_GET(x) (((x) & 0x03ff0000) >> 16)
+#define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_SET(x) (((x) << 16) & 0x03ff0000)
+
+/* macros for tx_prbs_seed_i */
+#define PHY_ANALOG_TX_PRBS_SEED_I_ADDRESS 0x000003a0
+#define PHY_ANALOG_TX_PRBS_SEED_I_OFFSET 0x000003a0
+#define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MSB 30
+#define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_LSB 0
+#define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MASK 0x7fffffff
+#define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_GET(x) (((x) & 0x7fffffff) >> 0)
+#define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_SET(x) (((x) << 0) & 0x7fffffff)
+
+/* macros for tx_prbs_seed_q */
+#define PHY_ANALOG_TX_PRBS_SEED_Q_ADDRESS 0x000003a4
+#define PHY_ANALOG_TX_PRBS_SEED_Q_OFFSET 0x000003a4
+#define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MSB 30
+#define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_LSB 0
+#define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MASK 0x7fffffff
+#define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_GET(x) (((x) & 0x7fffffff) >> 0)
+#define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_SET(x) (((x) << 0) & 0x7fffffff)
+
+/* macros for cmac_dc_cancel */
+#define PHY_ANALOG_CMAC_DC_CANCEL_ADDRESS 0x000003a8
+#define PHY_ANALOG_CMAC_DC_CANCEL_OFFSET 0x000003a8
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MSB 9
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_LSB 0
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MASK 0x000003ff
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_GET(x) (((x) & 0x000003ff) >> 0)
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_SET(x) (((x) << 0) & 0x000003ff)
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MSB 25
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_LSB 16
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MASK 0x03ff0000
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_GET(x) (((x) & 0x03ff0000) >> 16)
+#define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_SET(x) (((x) << 16) & 0x03ff0000)
+
+/* macros for cmac_dc_offset */
+#define PHY_ANALOG_CMAC_DC_OFFSET_ADDRESS 0x000003ac
+#define PHY_ANALOG_CMAC_DC_OFFSET_OFFSET 0x000003ac
+#define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MSB 3
+#define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_LSB 0
+#define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MASK 0x0000000f
+#define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
+
+/* macros for cmac_corr */
+#define PHY_ANALOG_CMAC_CORR_ADDRESS 0x000003b0
+#define PHY_ANALOG_CMAC_CORR_OFFSET 0x000003b0
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MSB 4
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_LSB 0
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MASK 0x0000001f
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_GET(x) (((x) & 0x0000001f) >> 0)
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_SET(x) (((x) << 0) & 0x0000001f)
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MSB 13
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_LSB 8
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MASK 0x00003f00
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_GET(x) (((x) & 0x00003f00) >> 8)
+#define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_SET(x) (((x) << 8) & 0x00003f00)
+
+/* macros for cmac_power */
+#define PHY_ANALOG_CMAC_POWER_ADDRESS 0x000003b4
+#define PHY_ANALOG_CMAC_POWER_OFFSET 0x000003b4
+#define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MSB 3
+#define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_LSB 0
+#define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MASK 0x0000000f
+#define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
+
+/* macros for cmac_cross_corr */
+#define PHY_ANALOG_CMAC_CROSS_CORR_ADDRESS 0x000003b8
+#define PHY_ANALOG_CMAC_CROSS_CORR_OFFSET 0x000003b8
+#define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MSB 3
+#define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_LSB 0
+#define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MASK 0x0000000f
+#define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
+
+/* macros for cmac_i2q2 */
+#define PHY_ANALOG_CMAC_I2Q2_ADDRESS 0x000003bc
+#define PHY_ANALOG_CMAC_I2Q2_OFFSET 0x000003bc
+#define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MSB 3
+#define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_LSB 0
+#define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MASK 0x0000000f
+#define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
+
+/* macros for cmac_power_hpf */
+#define PHY_ANALOG_CMAC_POWER_HPF_ADDRESS 0x000003c0
+#define PHY_ANALOG_CMAC_POWER_HPF_OFFSET 0x000003c0
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MSB 3
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_LSB 0
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MASK 0x0000000f
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MSB 7
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_LSB 4
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MASK 0x000000f0
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_GET(x) (((x) & 0x000000f0) >> 4)
+#define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_SET(x) (((x) << 4) & 0x000000f0)
+
+/* macros for rxdac_set1 */
+#define PHY_ANALOG_RXDAC_SET1_ADDRESS 0x000003c4
+#define PHY_ANALOG_RXDAC_SET1_OFFSET 0x000003c4
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MSB 1
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_LSB 0
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MASK 0x00000003
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_GET(x) (((x) & 0x00000003) >> 0)
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_SET(x) (((x) << 0) & 0x00000003)
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MSB 4
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_LSB 4
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MASK 0x00000010
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_GET(x) (((x) & 0x00000010) >> 4)
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_SET(x) (((x) << 4) & 0x00000010)
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MSB 13
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_LSB 8
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MASK 0x00003f00
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_GET(x) (((x) & 0x00003f00) >> 8)
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_SET(x) (((x) << 8) & 0x00003f00)
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MSB 19
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_LSB 16
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MASK 0x000f0000
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_GET(x) (((x) & 0x000f0000) >> 16)
+#define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_SET(x) (((x) << 16) & 0x000f0000)
+
+/* macros for rxdac_set2 */
+#define PHY_ANALOG_RXDAC_SET2_ADDRESS 0x000003c8
+#define PHY_ANALOG_RXDAC_SET2_OFFSET 0x000003c8
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MSB 4
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_LSB 0
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MASK 0x0000001f
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_GET(x) (((x) & 0x0000001f) >> 0)
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_SET(x) (((x) << 0) & 0x0000001f)
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MSB 12
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_LSB 8
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MASK 0x00001f00
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_GET(x) (((x) & 0x00001f00) >> 8)
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_SET(x) (((x) << 8) & 0x00001f00)
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MSB 20
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_LSB 16
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MASK 0x001f0000
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_GET(x) (((x) & 0x001f0000) >> 16)
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_SET(x) (((x) << 16) & 0x001f0000)
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MSB 28
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_LSB 24
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MASK 0x1f000000
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_GET(x) (((x) & 0x1f000000) >> 24)
+#define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_SET(x) (((x) << 24) & 0x1f000000)
+
+/* macros for rxdac_long_shift */
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ADDRESS 0x000003cc
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_OFFSET 0x000003cc
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MSB 4
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_LSB 0
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MASK 0x0000001f
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_GET(x) (((x) & 0x0000001f) >> 0)
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_SET(x) (((x) << 0) & 0x0000001f)
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MSB 12
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_LSB 8
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MASK 0x00001f00
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_GET(x) (((x) & 0x00001f00) >> 8)
+#define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_SET(x) (((x) << 8) & 0x00001f00)
+
+/* macros for cmac_results_i */
+#define PHY_ANALOG_CMAC_RESULTS_I_ADDRESS 0x000003d0
+#define PHY_ANALOG_CMAC_RESULTS_I_OFFSET 0x000003d0
+#define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MSB 31
+#define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_LSB 0
+#define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MASK 0xffffffff
+#define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_GET(x) (((x) & 0xffffffff) >> 0)
+#define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_SET(x) (((x) << 0) & 0xffffffff)
+
+/* macros for cmac_results_q */
+#define PHY_ANALOG_CMAC_RESULTS_Q_ADDRESS 0x000003d4
+#define PHY_ANALOG_CMAC_RESULTS_Q_OFFSET 0x000003d4
+#define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MSB 31
+#define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_LSB 0
+#define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MASK 0xffffffff
+#define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_GET(x) (((x) & 0xffffffff) >> 0)
+#define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_SET(x) (((x) << 0) & 0xffffffff)
+
+/* macros for PMU1 */
+#define PHY_ANALOG_PMU1_ADDRESS 0x00000740
+#define PHY_ANALOG_PMU1_OFFSET 0x00000740
+#define PHY_ANALOG_PMU1_SPARE_MSB 10
+#define PHY_ANALOG_PMU1_SPARE_LSB 0
+#define PHY_ANALOG_PMU1_SPARE_MASK 0x000007ff
+#define PHY_ANALOG_PMU1_SPARE_GET(x) (((x) & 0x000007ff) >> 0)
+#define PHY_ANALOG_PMU1_SPARE_SET(x) (((x) << 0) & 0x000007ff)
+#define PHY_ANALOG_PMU1_OTP_V25_PWD_MSB 11
+#define PHY_ANALOG_PMU1_OTP_V25_PWD_LSB 11
+#define PHY_ANALOG_PMU1_OTP_V25_PWD_MASK 0x00000800
+#define PHY_ANALOG_PMU1_OTP_V25_PWD_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_PMU1_OTP_V25_PWD_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_PMU1_PAREGON_MAN_MSB 12
+#define PHY_ANALOG_PMU1_PAREGON_MAN_LSB 12
+#define PHY_ANALOG_PMU1_PAREGON_MAN_MASK 0x00001000
+#define PHY_ANALOG_PMU1_PAREGON_MAN_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_PMU1_PAREGON_MAN_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_PMU1_OTPREGON_MAN_MSB 13
+#define PHY_ANALOG_PMU1_OTPREGON_MAN_LSB 13
+#define PHY_ANALOG_PMU1_OTPREGON_MAN_MASK 0x00002000
+#define PHY_ANALOG_PMU1_OTPREGON_MAN_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_PMU1_OTPREGON_MAN_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_PMU1_DREGON_MAN_MSB 14
+#define PHY_ANALOG_PMU1_DREGON_MAN_LSB 14
+#define PHY_ANALOG_PMU1_DREGON_MAN_MASK 0x00004000
+#define PHY_ANALOG_PMU1_DREGON_MAN_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_PMU1_DREGON_MAN_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_PMU1_DISCONTMODEEN_MSB 15
+#define PHY_ANALOG_PMU1_DISCONTMODEEN_LSB 15
+#define PHY_ANALOG_PMU1_DISCONTMODEEN_MASK 0x00008000
+#define PHY_ANALOG_PMU1_DISCONTMODEEN_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_PMU1_DISCONTMODEEN_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_PMU1_SWREGON_MAN_MSB 16
+#define PHY_ANALOG_PMU1_SWREGON_MAN_LSB 16
+#define PHY_ANALOG_PMU1_SWREGON_MAN_MASK 0x00010000
+#define PHY_ANALOG_PMU1_SWREGON_MAN_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_PMU1_SWREGON_MAN_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_PMU1_SWREG_FREQCUR_MSB 18
+#define PHY_ANALOG_PMU1_SWREG_FREQCUR_LSB 17
+#define PHY_ANALOG_PMU1_SWREG_FREQCUR_MASK 0x00060000
+#define PHY_ANALOG_PMU1_SWREG_FREQCUR_GET(x) (((x) & 0x00060000) >> 17)
+#define PHY_ANALOG_PMU1_SWREG_FREQCUR_SET(x) (((x) << 17) & 0x00060000)
+#define PHY_ANALOG_PMU1_SWREG_FREQCAP_MSB 21
+#define PHY_ANALOG_PMU1_SWREG_FREQCAP_LSB 19
+#define PHY_ANALOG_PMU1_SWREG_FREQCAP_MASK 0x00380000
+#define PHY_ANALOG_PMU1_SWREG_FREQCAP_GET(x) (((x) & 0x00380000) >> 19)
+#define PHY_ANALOG_PMU1_SWREG_FREQCAP_SET(x) (((x) << 19) & 0x00380000)
+#define PHY_ANALOG_PMU1_SWREG_LVLCTR_MSB 23
+#define PHY_ANALOG_PMU1_SWREG_LVLCTR_LSB 22
+#define PHY_ANALOG_PMU1_SWREG_LVLCTR_MASK 0x00c00000
+#define PHY_ANALOG_PMU1_SWREG_LVLCTR_GET(x) (((x) & 0x00c00000) >> 22)
+#define PHY_ANALOG_PMU1_SWREG_LVLCTR_SET(x) (((x) << 22) & 0x00c00000)
+#define PHY_ANALOG_PMU1_SREG_LVLCTR_MSB 25
+#define PHY_ANALOG_PMU1_SREG_LVLCTR_LSB 24
+#define PHY_ANALOG_PMU1_SREG_LVLCTR_MASK 0x03000000
+#define PHY_ANALOG_PMU1_SREG_LVLCTR_GET(x) (((x) & 0x03000000) >> 24)
+#define PHY_ANALOG_PMU1_SREG_LVLCTR_SET(x) (((x) << 24) & 0x03000000)
+#define PHY_ANALOG_PMU1_DREG_LVLCTR_MSB 27
+#define PHY_ANALOG_PMU1_DREG_LVLCTR_LSB 26
+#define PHY_ANALOG_PMU1_DREG_LVLCTR_MASK 0x0c000000
+#define PHY_ANALOG_PMU1_DREG_LVLCTR_GET(x) (((x) & 0x0c000000) >> 26)
+#define PHY_ANALOG_PMU1_DREG_LVLCTR_SET(x) (((x) << 26) & 0x0c000000)
+#define PHY_ANALOG_PMU1_PAREG_XPNP_MSB 28
+#define PHY_ANALOG_PMU1_PAREG_XPNP_LSB 28
+#define PHY_ANALOG_PMU1_PAREG_XPNP_MASK 0x10000000
+#define PHY_ANALOG_PMU1_PAREG_XPNP_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_PMU1_PAREG_XPNP_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_PMU1_PAREG_LVLCTR_MSB 31
+#define PHY_ANALOG_PMU1_PAREG_LVLCTR_LSB 29
+#define PHY_ANALOG_PMU1_PAREG_LVLCTR_MASK 0xe0000000
+#define PHY_ANALOG_PMU1_PAREG_LVLCTR_GET(x) (((x) & 0xe0000000) >> 29)
+#define PHY_ANALOG_PMU1_PAREG_LVLCTR_SET(x) (((x) << 29) & 0xe0000000)
+
+/* macros for PMU2 */
+#define PHY_ANALOG_PMU2_ADDRESS 0x00000744
+#define PHY_ANALOG_PMU2_OFFSET 0x00000744
+#define PHY_ANALOG_PMU2_SPARE_MSB 7
+#define PHY_ANALOG_PMU2_SPARE_LSB 0
+#define PHY_ANALOG_PMU2_SPARE_MASK 0x000000ff
+#define PHY_ANALOG_PMU2_SPARE_GET(x) (((x) & 0x000000ff) >> 0)
+#define PHY_ANALOG_PMU2_SPARE_SET(x) (((x) << 0) & 0x000000ff)
+#define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MSB 8
+#define PHY_ANALOG_PMU2_VBATT_1_3TOATB_LSB 8
+#define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MASK 0x00000100
+#define PHY_ANALOG_PMU2_VBATT_1_3TOATB_GET(x) (((x) & 0x00000100) >> 8)
+#define PHY_ANALOG_PMU2_VBATT_1_3TOATB_SET(x) (((x) << 8) & 0x00000100)
+#define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MSB 9
+#define PHY_ANALOG_PMU2_VBATT_1_2TOATB_LSB 9
+#define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MASK 0x00000200
+#define PHY_ANALOG_PMU2_VBATT_1_2TOATB_GET(x) (((x) & 0x00000200) >> 9)
+#define PHY_ANALOG_PMU2_VBATT_1_2TOATB_SET(x) (((x) << 9) & 0x00000200)
+#define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MSB 10
+#define PHY_ANALOG_PMU2_VBATT_2_3TOATB_LSB 10
+#define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MASK 0x00000400
+#define PHY_ANALOG_PMU2_VBATT_2_3TOATB_GET(x) (((x) & 0x00000400) >> 10)
+#define PHY_ANALOG_PMU2_VBATT_2_3TOATB_SET(x) (((x) << 10) & 0x00000400)
+#define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MSB 11
+#define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_LSB 11
+#define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MASK 0x00000800
+#define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_GET(x) (((x) & 0x00000800) >> 11)
+#define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_SET(x) (((x) << 11) & 0x00000800)
+#define PHY_ANALOG_PMU2_PWD_LFO_MAN_MSB 12
+#define PHY_ANALOG_PMU2_PWD_LFO_MAN_LSB 12
+#define PHY_ANALOG_PMU2_PWD_LFO_MAN_MASK 0x00001000
+#define PHY_ANALOG_PMU2_PWD_LFO_MAN_GET(x) (((x) & 0x00001000) >> 12)
+#define PHY_ANALOG_PMU2_PWD_LFO_MAN_SET(x) (((x) << 12) & 0x00001000)
+#define PHY_ANALOG_PMU2_VBATT_LT_3P2_MSB 13
+#define PHY_ANALOG_PMU2_VBATT_LT_3P2_LSB 13
+#define PHY_ANALOG_PMU2_VBATT_LT_3P2_MASK 0x00002000
+#define PHY_ANALOG_PMU2_VBATT_LT_3P2_GET(x) (((x) & 0x00002000) >> 13)
+#define PHY_ANALOG_PMU2_VBATT_LT_3P2_SET(x) (((x) << 13) & 0x00002000)
+#define PHY_ANALOG_PMU2_VBATT_LT_2P8_MSB 14
+#define PHY_ANALOG_PMU2_VBATT_LT_2P8_LSB 14
+#define PHY_ANALOG_PMU2_VBATT_LT_2P8_MASK 0x00004000
+#define PHY_ANALOG_PMU2_VBATT_LT_2P8_GET(x) (((x) & 0x00004000) >> 14)
+#define PHY_ANALOG_PMU2_VBATT_LT_2P8_SET(x) (((x) << 14) & 0x00004000)
+#define PHY_ANALOG_PMU2_VBATT_GT_4P2_MSB 15
+#define PHY_ANALOG_PMU2_VBATT_GT_4P2_LSB 15
+#define PHY_ANALOG_PMU2_VBATT_GT_4P2_MASK 0x00008000
+#define PHY_ANALOG_PMU2_VBATT_GT_4P2_GET(x) (((x) & 0x00008000) >> 15)
+#define PHY_ANALOG_PMU2_VBATT_GT_4P2_SET(x) (((x) << 15) & 0x00008000)
+#define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MSB 16
+#define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_LSB 16
+#define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MASK 0x00010000
+#define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_GET(x) (((x) & 0x00010000) >> 16)
+#define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_SET(x) (((x) << 16) & 0x00010000)
+#define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MSB 18
+#define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_LSB 17
+#define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MASK 0x00060000
+#define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_GET(x) (((x) & 0x00060000) >> 17)
+#define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_SET(x) (((x) << 17) & 0x00060000)
+#define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MSB 19
+#define PHY_ANALOG_PMU2_SWREGVSSL2ATB_LSB 19
+#define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MASK 0x00080000
+#define PHY_ANALOG_PMU2_SWREGVSSL2ATB_GET(x) (((x) & 0x00080000) >> 19)
+#define PHY_ANALOG_PMU2_SWREGVSSL2ATB_SET(x) (((x) << 19) & 0x00080000)
+#define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MSB 21
+#define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_LSB 20
+#define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MASK 0x00300000
+#define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_GET(x) (((x) & 0x00300000) >> 20)
+#define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_SET(x) (((x) << 20) & 0x00300000)
+#define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MSB 22
+#define PHY_ANALOG_PMU2_SWREGVDDH2ATB_LSB 22
+#define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MASK 0x00400000
+#define PHY_ANALOG_PMU2_SWREGVDDH2ATB_GET(x) (((x) & 0x00400000) >> 22)
+#define PHY_ANALOG_PMU2_SWREGVDDH2ATB_SET(x) (((x) << 22) & 0x00400000)
+#define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MSB 24
+#define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_LSB 23
+#define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MASK 0x01800000
+#define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_GET(x) (((x) & 0x01800000) >> 23)
+#define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_SET(x) (((x) << 23) & 0x01800000)
+#define PHY_ANALOG_PMU2_SWREG2ATB_MSB 27
+#define PHY_ANALOG_PMU2_SWREG2ATB_LSB 25
+#define PHY_ANALOG_PMU2_SWREG2ATB_MASK 0x0e000000
+#define PHY_ANALOG_PMU2_SWREG2ATB_GET(x) (((x) & 0x0e000000) >> 25)
+#define PHY_ANALOG_PMU2_SWREG2ATB_SET(x) (((x) << 25) & 0x0e000000)
+#define PHY_ANALOG_PMU2_OTPREG2ATB_MSB 28
+#define PHY_ANALOG_PMU2_OTPREG2ATB_LSB 28
+#define PHY_ANALOG_PMU2_OTPREG2ATB_MASK 0x10000000
+#define PHY_ANALOG_PMU2_OTPREG2ATB_GET(x) (((x) & 0x10000000) >> 28)
+#define PHY_ANALOG_PMU2_OTPREG2ATB_SET(x) (((x) << 28) & 0x10000000)
+#define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MSB 30
+#define PHY_ANALOG_PMU2_OTPREG_LVLCTR_LSB 29
+#define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MASK 0x60000000
+#define PHY_ANALOG_PMU2_OTPREG_LVLCTR_GET(x) (((x) & 0x60000000) >> 29)
+#define PHY_ANALOG_PMU2_OTPREG_LVLCTR_SET(x) (((x) << 29) & 0x60000000)
+#define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MSB 31
+#define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_LSB 31
+#define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MASK 0x80000000
+#define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_GET(x) (((x) & 0x80000000) >> 31)
+#define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_SET(x) (((x) << 31) & 0x80000000)
+
+
+#ifndef __ASSEMBLER__
+
+typedef struct analog_intf_athr_wlan_reg_reg_s {
+ volatile unsigned int RXRF_BIAS1; /* 0x0 - 0x4 */
+ volatile unsigned int RXRF_BIAS2; /* 0x4 - 0x8 */
+ volatile unsigned int RXRF_GAINSTAGES; /* 0x8 - 0xc */
+ volatile unsigned int RXRF_AGC; /* 0xc - 0x10 */
+ volatile char pad__0[0x30]; /* 0x10 - 0x40 */
+ volatile unsigned int TXRF1; /* 0x40 - 0x44 */
+ volatile unsigned int TXRF2; /* 0x44 - 0x48 */
+ volatile unsigned int TXRF3; /* 0x48 - 0x4c */
+ volatile unsigned int TXRF4; /* 0x4c - 0x50 */
+ volatile unsigned int TXRF5; /* 0x50 - 0x54 */
+ volatile unsigned int TXRF6; /* 0x54 - 0x58 */
+ volatile unsigned int TXRF7; /* 0x58 - 0x5c */
+ volatile unsigned int TXRF8; /* 0x5c - 0x60 */
+ volatile unsigned int TXRF9; /* 0x60 - 0x64 */
+ volatile unsigned int TXRF10; /* 0x64 - 0x68 */
+ volatile unsigned int TXRF11; /* 0x68 - 0x6c */
+ volatile unsigned int TXRF12; /* 0x6c - 0x70 */
+ volatile char pad__1[0x10]; /* 0x70 - 0x80 */
+ volatile unsigned int SYNTH1; /* 0x80 - 0x84 */
+ volatile unsigned int SYNTH2; /* 0x84 - 0x88 */
+ volatile unsigned int SYNTH3; /* 0x88 - 0x8c */
+ volatile unsigned int SYNTH4; /* 0x8c - 0x90 */
+ volatile unsigned int SYNTH5; /* 0x90 - 0x94 */
+ volatile unsigned int SYNTH6; /* 0x94 - 0x98 */
+ volatile unsigned int SYNTH7; /* 0x98 - 0x9c */
+ volatile unsigned int SYNTH8; /* 0x9c - 0xa0 */
+ volatile unsigned int SYNTH9; /* 0xa0 - 0xa4 */
+ volatile unsigned int SYNTH10; /* 0xa4 - 0xa8 */
+ volatile unsigned int SYNTH11; /* 0xa8 - 0xac */
+ volatile unsigned int SYNTH12; /* 0xac - 0xb0 */
+ volatile unsigned int SYNTH13; /* 0xb0 - 0xb4 */
+ volatile unsigned int SYNTH14; /* 0xb4 - 0xb8 */
+ volatile char pad__2[0x8]; /* 0xb8 - 0xc0 */
+ volatile unsigned int BIAS1; /* 0xc0 - 0xc4 */
+ volatile unsigned int BIAS2; /* 0xc4 - 0xc8 */
+ volatile unsigned int BIAS3; /* 0xc8 - 0xcc */
+ volatile unsigned int BIAS4; /* 0xcc - 0xd0 */
+ volatile char pad__3[0x30]; /* 0xd0 - 0x100 */
+ volatile unsigned int RXTX1; /* 0x100 - 0x104 */
+ volatile unsigned int RXTX2; /* 0x104 - 0x108 */
+ volatile unsigned int RXTX3; /* 0x108 - 0x10c */
+ volatile char pad__4[0x34]; /* 0x10c - 0x140 */
+ volatile unsigned int BB1; /* 0x140 - 0x144 */
+ volatile unsigned int BB2; /* 0x144 - 0x148 */
+ volatile unsigned int BB3; /* 0x148 - 0x14c */
+ volatile char pad__5[0x134]; /* 0x14c - 0x280 */
+ volatile unsigned int PLLCLKMODA; /* 0x280 - 0x284 */
+ volatile unsigned int PLLCLKMODA2; /* 0x284 - 0x288 */
+ volatile unsigned int TOP; /* 0x288 - 0x28c */
+ volatile unsigned int THERM; /* 0x28c - 0x290 */
+ volatile unsigned int XTAL; /* 0x290 - 0x294 */
+ volatile char pad__6[0xec]; /* 0x294 - 0x380 */
+ volatile unsigned int rbist_cntrl; /* 0x380 - 0x384 */
+ volatile unsigned int tx_dc_offset; /* 0x384 - 0x388 */
+ volatile unsigned int tx_tonegen0; /* 0x388 - 0x38c */
+ volatile unsigned int tx_tonegen1; /* 0x38c - 0x390 */
+ volatile unsigned int tx_lftonegen0; /* 0x390 - 0x394 */
+ volatile unsigned int tx_linear_ramp_i; /* 0x394 - 0x398 */
+ volatile unsigned int tx_linear_ramp_q; /* 0x398 - 0x39c */
+ volatile unsigned int tx_prbs_mag; /* 0x39c - 0x3a0 */
+ volatile unsigned int tx_prbs_seed_i; /* 0x3a0 - 0x3a4 */
+ volatile unsigned int tx_prbs_seed_q; /* 0x3a4 - 0x3a8 */
+ volatile unsigned int cmac_dc_cancel; /* 0x3a8 - 0x3ac */
+ volatile unsigned int cmac_dc_offset; /* 0x3ac - 0x3b0 */
+ volatile unsigned int cmac_corr; /* 0x3b0 - 0x3b4 */
+ volatile unsigned int cmac_power; /* 0x3b4 - 0x3b8 */
+ volatile unsigned int cmac_cross_corr; /* 0x3b8 - 0x3bc */
+ volatile unsigned int cmac_i2q2; /* 0x3bc - 0x3c0 */
+ volatile unsigned int cmac_power_hpf; /* 0x3c0 - 0x3c4 */
+ volatile unsigned int rxdac_set1; /* 0x3c4 - 0x3c8 */
+ volatile unsigned int rxdac_set2; /* 0x3c8 - 0x3cc */
+ volatile unsigned int rxdac_long_shift; /* 0x3cc - 0x3d0 */
+ volatile unsigned int cmac_results_i; /* 0x3d0 - 0x3d4 */
+ volatile unsigned int cmac_results_q; /* 0x3d4 - 0x3d8 */
+ volatile char pad__7[0x368]; /* 0x3d8 - 0x740 */
+ volatile unsigned int PMU1; /* 0x740 - 0x744 */
+ volatile unsigned int PMU2; /* 0x744 - 0x748 */
+} analog_intf_athr_wlan_reg_reg_t;
+
+#endif /* __ASSEMBLER__ */
+
+#endif /* _ANALOG_INTF_ATHR_WLAN_REG_REG_H_ */