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path: root/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c
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Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c100
1 files changed, 50 insertions, 50 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c
index 74343589f284..474860290404 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c
@@ -510,9 +510,9 @@ void iwl_irq_tasklet(struct iwl_priv *priv)
* hardware bugs here by ACKing all the possible interrupts so that
* interrupt coalescing can still be achieved.
*/
- iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
+ iwl_write32(priv, CSR_INT, priv->inta | ~priv->inta_mask);
- inta = priv->_agn.inta;
+ inta = priv->inta;
#ifdef CONFIG_IWLWIFI_DEBUG
if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
@@ -525,8 +525,8 @@ void iwl_irq_tasklet(struct iwl_priv *priv)
spin_unlock_irqrestore(&priv->lock, flags);
- /* saved interrupt in inta variable now we can reset priv->_agn.inta */
- priv->_agn.inta = 0;
+ /* saved interrupt in inta variable now we can reset priv->inta */
+ priv->inta = 0;
/* Now service all interrupt bits discovered above. */
if (inta & CSR_INT_BIT_HW_ERR) {
@@ -703,16 +703,16 @@ void iwl_irq_tasklet(struct iwl_priv *priv)
/* Free dram table */
void iwl_free_isr_ict(struct iwl_priv *priv)
{
- if (priv->_agn.ict_tbl_vir) {
+ if (priv->ict_tbl_vir) {
dma_free_coherent(priv->bus->dev,
(sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
- priv->_agn.ict_tbl_vir,
- priv->_agn.ict_tbl_dma);
- priv->_agn.ict_tbl_vir = NULL;
- memset(&priv->_agn.ict_tbl_dma, 0,
- sizeof(priv->_agn.ict_tbl_dma));
- memset(&priv->_agn.aligned_ict_tbl_dma, 0,
- sizeof(priv->_agn.aligned_ict_tbl_dma));
+ priv->ict_tbl_vir,
+ priv->ict_tbl_dma);
+ priv->ict_tbl_vir = NULL;
+ memset(&priv->ict_tbl_dma, 0,
+ sizeof(priv->ict_tbl_dma));
+ memset(&priv->aligned_ict_tbl_dma, 0,
+ sizeof(priv->aligned_ict_tbl_dma));
}
}
@@ -724,36 +724,36 @@ int iwl_alloc_isr_ict(struct iwl_priv *priv)
{
/* allocate shrared data table */
- priv->_agn.ict_tbl_vir =
+ priv->ict_tbl_vir =
dma_alloc_coherent(priv->bus->dev,
(sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
- &priv->_agn.ict_tbl_dma, GFP_KERNEL);
- if (!priv->_agn.ict_tbl_vir)
+ &priv->ict_tbl_dma, GFP_KERNEL);
+ if (!priv->ict_tbl_vir)
return -ENOMEM;
/* align table to PAGE_SIZE boundary */
- priv->_agn.aligned_ict_tbl_dma =
- ALIGN(priv->_agn.ict_tbl_dma, PAGE_SIZE);
+ priv->aligned_ict_tbl_dma =
+ ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
- (unsigned long long)priv->_agn.ict_tbl_dma,
- (unsigned long long)priv->_agn.aligned_ict_tbl_dma,
- (int)(priv->_agn.aligned_ict_tbl_dma -
- priv->_agn.ict_tbl_dma));
+ (unsigned long long)priv->ict_tbl_dma,
+ (unsigned long long)priv->aligned_ict_tbl_dma,
+ (int)(priv->aligned_ict_tbl_dma -
+ priv->ict_tbl_dma));
- priv->_agn.ict_tbl = priv->_agn.ict_tbl_vir +
- (priv->_agn.aligned_ict_tbl_dma -
- priv->_agn.ict_tbl_dma);
+ priv->ict_tbl = priv->ict_tbl_vir +
+ (priv->aligned_ict_tbl_dma -
+ priv->ict_tbl_dma);
IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
- priv->_agn.ict_tbl, priv->_agn.ict_tbl_vir,
- (int)(priv->_agn.aligned_ict_tbl_dma -
- priv->_agn.ict_tbl_dma));
+ priv->ict_tbl, priv->ict_tbl_vir,
+ (int)(priv->aligned_ict_tbl_dma -
+ priv->ict_tbl_dma));
/* reset table and index to all 0 */
- memset(priv->_agn.ict_tbl_vir, 0,
+ memset(priv->ict_tbl_vir, 0,
(sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
- priv->_agn.ict_index = 0;
+ priv->ict_index = 0;
/* add periodic RX interrupt */
priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
@@ -768,15 +768,15 @@ int iwl_reset_ict(struct iwl_priv *priv)
u32 val;
unsigned long flags;
- if (!priv->_agn.ict_tbl_vir)
+ if (!priv->ict_tbl_vir)
return 0;
spin_lock_irqsave(&priv->lock, flags);
iwl_disable_interrupts(priv);
- memset(&priv->_agn.ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
+ memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
- val = priv->_agn.aligned_ict_tbl_dma >> PAGE_SHIFT;
+ val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
val |= CSR_DRAM_INT_TBL_ENABLE;
val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
@@ -784,11 +784,11 @@ int iwl_reset_ict(struct iwl_priv *priv)
IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
"aligned dma address %Lx\n",
val,
- (unsigned long long)priv->_agn.aligned_ict_tbl_dma);
+ (unsigned long long)priv->aligned_ict_tbl_dma);
iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
- priv->_agn.use_ict = true;
- priv->_agn.ict_index = 0;
+ priv->use_ict = true;
+ priv->ict_index = 0;
iwl_write32(priv, CSR_INT, priv->inta_mask);
iwl_enable_interrupts(priv);
spin_unlock_irqrestore(&priv->lock, flags);
@@ -802,7 +802,7 @@ void iwl_disable_ict(struct iwl_priv *priv)
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
- priv->_agn.use_ict = false;
+ priv->use_ict = false;
spin_unlock_irqrestore(&priv->lock, flags);
}
@@ -852,12 +852,12 @@ static irqreturn_t iwl_isr(int irq, void *data)
}
#endif
- priv->_agn.inta |= inta;
+ priv->inta |= inta;
/* iwl_irq_tasklet() will service interrupts and re-enable them */
if (likely(inta))
tasklet_schedule(&priv->irq_tasklet);
else if (test_bit(STATUS_INT_ENABLED, &priv->status) &&
- !priv->_agn.inta)
+ !priv->inta)
iwl_enable_interrupts(priv);
unplugged:
@@ -867,7 +867,7 @@ static irqreturn_t iwl_isr(int irq, void *data)
none:
/* re-enable interrupts here since we don't have anything to service. */
/* only Re-enable if disabled by irq and no schedules tasklet. */
- if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
+ if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
iwl_enable_interrupts(priv);
spin_unlock_irqrestore(&priv->lock, flags);
@@ -895,7 +895,7 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
/* dram interrupt table not set yet,
* use legacy interrupt.
*/
- if (!priv->_agn.use_ict)
+ if (!priv->use_ict)
return iwl_isr(irq, data);
spin_lock_irqsave(&priv->lock, flags);
@@ -912,21 +912,21 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
/* Ignore interrupt if there's nothing in NIC to service.
* This may be due to IRQ shared with another device,
* or due to sporadic interrupts thrown from our NIC. */
- if (!priv->_agn.ict_tbl[priv->_agn.ict_index]) {
+ if (!priv->ict_tbl[priv->ict_index]) {
IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
goto none;
}
/* read all entries that not 0 start with ict_index */
- while (priv->_agn.ict_tbl[priv->_agn.ict_index]) {
+ while (priv->ict_tbl[priv->ict_index]) {
- val |= le32_to_cpu(priv->_agn.ict_tbl[priv->_agn.ict_index]);
+ val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
- priv->_agn.ict_index,
+ priv->ict_index,
le32_to_cpu(
- priv->_agn.ict_tbl[priv->_agn.ict_index]));
- priv->_agn.ict_tbl[priv->_agn.ict_index] = 0;
- priv->_agn.ict_index = iwl_queue_inc_wrap(priv->_agn.ict_index,
+ priv->ict_tbl[priv->ict_index]));
+ priv->ict_tbl[priv->ict_index] = 0;
+ priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
ICT_COUNT);
}
@@ -950,13 +950,13 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
inta, inta_mask, val);
inta &= priv->inta_mask;
- priv->_agn.inta |= inta;
+ priv->inta |= inta;
/* iwl_irq_tasklet() will service interrupts and re-enable them */
if (likely(inta))
tasklet_schedule(&priv->irq_tasklet);
else if (test_bit(STATUS_INT_ENABLED, &priv->status) &&
- !priv->_agn.inta) {
+ !priv->inta) {
/* Allow interrupt if was disabled by this handler and
* no tasklet was schedules, We should not enable interrupt,
* tasklet will enable it.
@@ -971,7 +971,7 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
/* re-enable interrupts here since we don't have anything to service.
* only Re-enable if disabled by irq.
*/
- if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
+ if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
iwl_enable_interrupts(priv);
spin_unlock_irqrestore(&priv->lock, flags);
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-16 14:43:59 +0000