summaryrefslogtreecommitdiff
path: root/drivers/net/wireless/rt2x00/rt61pci.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.h')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.h33
1 files changed, 24 insertions, 9 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index 4c6524eedad0..3511bba7ff65 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -1,5 +1,5 @@
/*
- Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
+ Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
<http://rt2x00.serialmonkey.com>
This program is free software; you can redistribute it and/or modify
@@ -161,7 +161,9 @@ struct hw_pairwise_ta_entry {
#define HW_BEACON_BASE1 0x2d00
#define HW_BEACON_BASE2 0x2e00
#define HW_BEACON_BASE3 0x2f00
-#define HW_BEACON_OFFSET 0x0100
+
+#define HW_BEACON_OFFSET(__index) \
+ ( HW_BEACON_BASE0 + (__index * 0x0100) )
/*
* HOST-MCU shared memory.
@@ -234,6 +236,11 @@ struct hw_pairwise_ta_entry {
/*
* MAC_CSR3: STA MAC register 1.
+ * UNICAST_TO_ME_MASK:
+ * Used to mask off bits from byte 5 of the MAC address
+ * to determine the UNICAST_TO_ME bit for RX frames.
+ * The full mask is complemented by BSS_ID_MASK:
+ * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
*/
#define MAC_CSR3 0x300c
#define MAC_CSR3_BYTE4 FIELD32(0x000000ff)
@@ -251,7 +258,14 @@ struct hw_pairwise_ta_entry {
/*
* MAC_CSR5: BSSID register 1.
- * BSS_ID_MASK: 3: one BSSID, 0: 4 BSSID, 2 or 1: 2 BSSID.
+ * BSS_ID_MASK:
+ * This mask is used to mask off bits 0 and 1 of byte 5 of the
+ * BSSID. This will make sure that those bits will be ignored
+ * when determining the MY_BSS of RX frames.
+ * 0: 1-BSSID mode (BSS index = 0)
+ * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
+ * 2: 2-BSSID mode (BSS index: byte5, bit 1)
+ * 3: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
*/
#define MAC_CSR5 0x3014
#define MAC_CSR5_BYTE4 FIELD32(0x000000ff)
@@ -391,7 +405,7 @@ struct hw_pairwise_ta_entry {
#define TXRX_CSR0_DROP_TO_DS FIELD32(0x00200000)
#define TXRX_CSR0_DROP_VERSION_ERROR FIELD32(0x00400000)
#define TXRX_CSR0_DROP_MULTICAST FIELD32(0x00800000)
-#define TXRX_CSR0_DROP_BORADCAST FIELD32(0x01000000)
+#define TXRX_CSR0_DROP_BROADCAST FIELD32(0x01000000)
#define TXRX_CSR0_DROP_ACK_CTS FIELD32(0x02000000)
#define TXRX_CSR0_TX_WITHOUT_WAITING FIELD32(0x04000000)
@@ -866,7 +880,7 @@ struct hw_pairwise_ta_entry {
#define TX_CNTL_CSR_ABORT_TX_MGMT FIELD32(0x00100000)
/*
- * LOAD_TX_RING_CSR: Load RX de
+ * LOAD_TX_RING_CSR: Load RX desriptor
*/
#define LOAD_TX_RING_CSR 0x3434
#define LOAD_TX_RING_CSR_LOAD_TXD_AC0 FIELD32(0x00000001)
@@ -1116,10 +1130,10 @@ struct hw_pairwise_ta_entry {
#define EEPROM_MAC_ADDR_0 0x0002
#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff)
#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00)
-#define EEPROM_MAC_ADDR1 0x0004
+#define EEPROM_MAC_ADDR1 0x0003
#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff)
#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00)
-#define EEPROM_MAC_ADDR_2 0x0006
+#define EEPROM_MAC_ADDR_2 0x0004
#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff)
#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
@@ -1247,6 +1261,7 @@ struct hw_pairwise_ta_entry {
* DMA descriptor defines.
*/
#define TXD_DESC_SIZE ( 16 * sizeof(__le32) )
+#define TXINFO_SIZE ( 6 * sizeof(__le32) )
#define RXD_DESC_SIZE ( 16 * sizeof(__le32) )
/*
@@ -1440,8 +1455,8 @@ struct hw_pairwise_ta_entry {
#define RXD_W15_RESERVED FIELD32(0xffffffff)
/*
- * Macro's for converting txpower from EEPROM to dscape value
- * and from dscape value to register value.
+ * Macro's for converting txpower from EEPROM to mac80211 value
+ * and from mac80211 value to register value.
*/
#define MIN_TXPOWER 0
#define MAX_TXPOWER 31