diff options
Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a')
21 files changed, 47866 insertions, 0 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/Hal8723PwrSeq.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/Hal8723PwrSeq.c new file mode 100755 index 000000000000..4f801cbc3e2a --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/Hal8723PwrSeq.c @@ -0,0 +1,91 @@ +/*++ +Copyright (c) Realtek Semiconductor Corp. All rights reserved. + +Module Name: + Hal8723PwrSeq.c + +Abstract: + This file includes all kinds of Power Action event for RTL8188E and corresponding hardware configurtions which are released from HW SD. + +Major Change History: + When Who What + ---------- --------------- ------------------------------- + 2011-08-08 Roger Create. + +--*/ +#include "Hal8723PwrSeq.h" + + +/* + drivers should parse below arrays and do the corresponding actions +*/ +//3 Power on Array +WLAN_PWR_CFG rtl8723A_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + RTL8723A_TRANS_CARDEMU_TO_ACT + RTL8723A_TRANS_END +}; + +//3 Radio off GPIO Array +WLAN_PWR_CFG rtl8723A_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + RTL8723A_TRANS_ACT_TO_CARDEMU + RTL8723A_TRANS_END +}; + +//3 Card Disable Array +WLAN_PWR_CFG rtl8723A_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + RTL8723A_TRANS_ACT_TO_CARDEMU + RTL8723A_TRANS_CARDEMU_TO_CARDDIS + RTL8723A_TRANS_END +}; + +//3 Card Enable Array +WLAN_PWR_CFG rtl8723A_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + RTL8723A_TRANS_CARDDIS_TO_CARDEMU + RTL8723A_TRANS_CARDEMU_TO_ACT + RTL8723A_TRANS_END +}; + +//3 Suspend Array +WLAN_PWR_CFG rtl8723A_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + RTL8723A_TRANS_ACT_TO_CARDEMU + RTL8723A_TRANS_CARDEMU_TO_SUS + RTL8723A_TRANS_END +}; + +//3 Resume Array +WLAN_PWR_CFG rtl8723A_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + RTL8723A_TRANS_SUS_TO_CARDEMU + RTL8723A_TRANS_CARDEMU_TO_ACT + RTL8723A_TRANS_END +}; + +//3 HWPDN Array +WLAN_PWR_CFG rtl8723A_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + RTL8723A_TRANS_ACT_TO_CARDEMU + RTL8723A_TRANS_CARDEMU_TO_PDN + RTL8723A_TRANS_END +}; + +//3 Enter LPS +WLAN_PWR_CFG rtl8723A_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + //FW behavior + RTL8723A_TRANS_ACT_TO_LPS + RTL8723A_TRANS_END +}; + +//3 Leave LPS +WLAN_PWR_CFG rtl8723A_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]= +{ + //FW behavior + RTL8723A_TRANS_LPS_TO_ACT + RTL8723A_TRANS_END +}; + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_bt-coexist.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_bt-coexist.c new file mode 100755 index 000000000000..b6c6a3a6bb75 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_bt-coexist.c @@ -0,0 +1,20289 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#include <drv_types.h> +#include <rtl8723a_hal.h> + + +#ifdef bEnable +#undef bEnable +#endif + +//#define BT_DEBUG + +//#define CHECK_BT_EXIST_FROM_REG +#define DIS_PS_RX_BCN +//#define BTCOEX_DECREASE_WIFI_POWER +//#define BTCOEX_CMCC_TEST + +#ifdef CONFIG_BT_COEXIST +#ifdef PLATFORM_LINUX + +u32 BTCoexDbgLevel = _bt_dbg_off_; + +#define RTPRINT(_Comp, _Level, Fmt)\ +do {\ + if((BTCoexDbgLevel ==_bt_dbg_on_)) {\ +/* printk("%s", DRIVER_PREFIX);*/\ + printk Fmt;\ + }\ +}while(0) + +#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)\ +if((BTCoexDbgLevel ==_bt_dbg_on_) ){\ + u32 __i; \ + u8 *ptr = (u8*)_Ptr; \ + printk printstr; \ + printk(" "); \ + for( __i=0; __i<6; __i++ ) \ + printk("%02X%s", ptr[__i], (__i==5)?"":"-"); \ + printk("\n"); \ +} +#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\ +if((BTCoexDbgLevel ==_bt_dbg_on_) ){\ + u32 __i; \ + u8 *ptr = (u8*)_HexData; \ + printk(_TitleString); \ + for( __i=0; __i<(u32)_HexDataLen; __i++ ) \ + { \ + printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" ");\ + if (((__i + 1) % 16) == 0) printk("\n");\ + } \ + printk("\n"); \ +} +// Added by Annie, 2005-11-22. +#define MAX_STR_LEN 64 +#define PRINTABLE(_ch) (_ch>=' ' &&_ch<='~') // I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22. +#define RT_PRINT_STR(_Comp, _Level, _TitleString, _Ptr, _Len) \ +{\ +/* if (((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) */\ + { \ + u32 __i; \ + u8 buffer[MAX_STR_LEN]; \ + u32 length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \ + _rtw_memset(buffer, 0, MAX_STR_LEN); \ + _rtw_memcpy(buffer, (u8*)_Ptr, length); \ + for (__i=0; __i<length; __i++) \ + { \ + if (!PRINTABLE(buffer[__i])) buffer[__i] = '?'; \ + } \ + buffer[length] = '\0'; \ +/* printk("Rtl819x: ");*/ \ + printk(_TitleString); \ + printk(": %d, <%s>\n", _Len, buffer); \ + }\ +} +#endif // PLATFORM_LINUX + +#else // !BT_DEBUG + +#define RTPRINT(...) +#define RTPRINT_ADDR(...) +#define RTPRINT_DATA(...) +#define RT_PRINT_STR(...) + +#endif // !BT_DEBUG + +#define DCMD_Printf(...) +#define RT_ASSERT(...) + +#ifdef PLATFORM_LINUX +#define rsprintf snprintf +#elif defined(PLATFORM_WINDOWS) +#define rsprintf sprintf_s +#endif + + + +#define GetDefaultAdapter(padapter) padapter + +#define PlatformZeroMemory(ptr, sz) _rtw_memset(ptr, 0, sz) + +#ifdef PLATFORM_LINUX +#define PlatformProcessHCICommands(...) +#define PlatformTxBTQueuedPackets(...) +#define PlatformIndicateBTACLData(...) (RT_STATUS_SUCCESS) +#endif +#define PlatformAcquireSpinLock(padapter, type) +#define PlatformReleaseSpinLock(padapter, type) + +// timer +#define PlatformInitializeTimer(padapter, ptimer, pfunc, cntx, szID) \ + _init_timer(ptimer, padapter->pnetdev, pfunc, padapter) +#define PlatformSetTimer(a, ptimer, delay) _set_timer(ptimer, delay) +static u8 PlatformCancelTimer(PADAPTER a, _timer *ptimer) +{ + u8 bcancelled; + _cancel_timer(ptimer, &bcancelled); + return bcancelled; +} +#define PlatformReleaseTimer(...) + +// workitem +// already define in hal/OUTSRC/odm_interface.h +//typedef void (*RT_WORKITEM_CALL_BACK)(void *pContext); +#define PlatformInitializeWorkItem(padapter, pwi, pfunc, cntx, szID) \ + _init_workitem(pwi, pfunc, padapter) +#define PlatformFreeWorkItem(...) +#define PlatformScheduleWorkItem(pwork) _set_workitem(pwork) +#if 0 +#define GET_UNDECORATED_AVERAGE_RSSI(padapter) \ + (BTDM_CheckFWState(padapter, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ? \ + (GET_HAL_DATA(padapter)->dmpriv.EntryMinUndecoratedSmoothedPWDB): \ + (GET_HAL_DATA(padapter)->dmpriv.UndecoratedSmoothedPWDB) +#else +#define GET_UNDECORATED_AVERAGE_RSSI(padapter) \ + (GET_HAL_DATA(padapter)->dmpriv.EntryMinUndecoratedSmoothedPWDB) +#endif +#define RT_RF_CHANGE_SOURCE u32 + +typedef enum _RT_JOIN_ACTION{ + RT_JOIN_INFRA = 1, + RT_JOIN_IBSS = 2, + RT_START_IBSS = 3, + RT_NO_ACTION = 4, +} RT_JOIN_ACTION; + +// power saving +#ifdef CONFIG_IPS +#define IPSReturn(padapter, b) ips_enter(padapter) +#define IPSDisable(padapter, b, c) ips_leave(padapter) +#else +#define IPSReturn(...) +#define IPSDisable(...) +#endif +#ifdef CONFIG_LPS +#define LeisurePSLeave(padapter, b) LPS_Leave(padapter) +#else +#define LeisurePSLeave(...) +#endif + +#ifdef __BT_C__ // COMMOM/BT.c +// ===== Below this line is sync from SD7 driver COMMOM/BT.c ===== + +u8 BT_Operation(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->BtOperationOn) + return _TRUE; + else + return _FALSE; +} + +u8 BT_IsLegalChannel(PADAPTER padapter, u8 channel) +{ + PRT_CHANNEL_INFO pChanneList = NULL; + u8 channelLen, i; + + + pChanneList = padapter->mlmeextpriv.channel_set; + channelLen = padapter->mlmeextpriv.max_chan_nums; + + for (i = 0; i < channelLen; i++) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("Check if chnl(%d) in channel plan contains bt target chnl(%d) for BT connection\n", pChanneList[i].ChannelNum, channel)); + if ((channel == pChanneList[i].ChannelNum) || + (channel == pChanneList[i].ChannelNum + 2)) + { + return channel; + } + } + return 0; +} + +void BT_SignalCompensation(PADAPTER padapter, u8 *rssi_wifi, u8 *rssi_bt) +{ + BTDM_SignalCompensation(padapter, rssi_wifi, rssi_bt); +} + +void BT_WifiScanNotify(PADAPTER padapter, u8 scanType) +{ +#if defined(CONFIG_CONCURRENT_MODE) + if (padapter->adapter_type != PRIMARY_ADAPTER) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], CONFIG_CONCURRENT_MODE and padapter->adapter_type != PRIMARY_ADAPTER in %s!!\n", __FUNCTION__)); + return; + } +#endif + + BTHCI_WifiScanNotify(padapter, scanType); + BTDM_CheckAntSelMode(padapter); + BTDM_WifiScanNotify(padapter, scanType); +} + +void BT_WifiAssociateNotify(PADAPTER padapter, u8 action) +{ +#if defined(CONFIG_CONCURRENT_MODE) + if (padapter->adapter_type != PRIMARY_ADAPTER) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], CONFIG_CONCURRENT_MODE and padapter->adapter_type != PRIMARY_ADAPTER in %s!!\n", __FUNCTION__)); + return; + } +#endif + + // action : + // TRUE = associate start + // FALSE = associate finished + if (action) + BTDM_CheckAntSelMode(padapter); + + BTDM_WifiAssociateNotify(padapter, action); +} + +void BT_WifiMediaStatusNotify(PADAPTER padapter, RT_MEDIA_STATUS mstatus) +{ +#if defined(CONFIG_CONCURRENT_MODE) + if (padapter->adapter_type != PRIMARY_ADAPTER) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], CONFIG_CONCURRENT_MODE and padapter->adapter_type != PRIMARY_ADAPTER in %s!!\n", __FUNCTION__)); + return; + } +#endif + + BTDM_MediaStatusNotify(padapter, mstatus); +} + +void BT_SpecialPacketNotify(PADAPTER padapter) +{ +#if defined(CONFIG_CONCURRENT_MODE) + if (padapter->adapter_type != PRIMARY_ADAPTER) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], CONFIG_CONCURRENT_MODE and padapter->adapter_type != PRIMARY_ADAPTER in %s!!\n", __FUNCTION__)); + return; + } +#endif + + BTDM_ForDhcp(padapter); +} + +void BT_HaltProcess(PADAPTER padapter) +{ + BTDM_ForHalt(padapter); +} + +void BT_LpsLeave(PADAPTER padapter) +{ + BTDM_LpsLeave(padapter); +} + +// ===== End of sync from SD7 driver COMMOM/BT.c ===== +#endif + +#ifdef __BT_HANDLEPACKET_C__ // COMMOM/bt_handlepacket.c +// ===== Below this line is sync from SD7 driver COMMOM/bt_handlepacket.c ===== + +void btpkt_SendBeacon(PADAPTER padapter) +{ +#if 0 // not implement yet + PRT_TCB pTcb; + PRT_TX_LOCAL_BUFFER pBuf; + + PlatformAcquireSpinLock(padapter, RT_TX_SPINLOCK); + + if (MgntGetBuffer(padapter, &pTcb, &pBuf)) + { + btpkt_ConstructBeaconFrame( + padapter, + pBuf->Buffer.VirtualAddress, + &pTcb->PacketLength); + + MgntSendPacket(padapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, MGN_1M); + + } + + PlatformReleaseSpinLock(padapter, RT_TX_SPINLOCK); +#endif +} + +void BTPKT_WPAAuthINITIALIZE(PADAPTER padapter, u8 EntryNum) +{ +#if 0 +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_SECURITY pBtSec = &pBTinfo->BtSec; + PBT_DBG pBtDbg = &pBTinfo->BtDbg; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + RTPRINT(FIOCTL, IOCTL_STATE, ("BTPKT_WPAAuthINITIALIZE() EntryNum = %d\n",EntryNum)); + + if (pHalData->bBTMode) + { +// if (padapter->MgntInfo.OpMode == RT_OP_MODE_IBSS) + if (BTDM_CheckFWState(padapter, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + pBtSec->bUsedHwEncrypt = _FALSE; + } + else + { + pBtSec->bUsedHwEncrypt = _TRUE; + } + } + else + pBtSec->bUsedHwEncrypt = _FALSE; + + pBTinfo->BtAsocEntry[EntryNum].WPAAuthReplayCount = 0; + + if (pBTinfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_CREATOR) + { + u8 RdmBuf[20], NonceBuf[KEY_NONCE_LEN]; + u8 index; + u64 KeyReplayCounter = 0; + u8 temp[8] = {0}; + + // Gene Creator Nonce + GetRandomBuffer(RdmBuf); + for (index = 0; index < 16; index++) + { + NonceBuf[index] = RdmBuf[index]; + NonceBuf[16+index] = RdmBuf[19-index]; + } + _rtw_memcpy(pBTinfo->BtAsocEntry[EntryNum].ANonce, NonceBuf, KEY_NONCE_LEN); + + // Set ReplayCounter + pBTinfo->BtAsocEntry[EntryNum].KeyReplayCounter ++; + + for( index = 0 ; index < 8 ; index++) + temp[index] = (u8)((pBTinfo->BtAsocEntry[EntryNum].KeyReplayCounter >>( (7-index) *8)) &0xff); + + _rtw_memcpy(&KeyReplayCounter, temp, 8); + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT pkt], 4-way packet, send 1st and wait for 2nd pkt\n")); + + pBtDbg->dbgBtPkt.btPktTx4way1st++; + + // Send 1st packet of 4-way + btpkt_SendEapolKeyPacket( + padapter, + pBTinfo->BtAsocEntry[EntryNum].BTRemoteMACAddr, //Sta MAC address + NULL, // Pointer to KCK (EAPOL-Key Confirmation Key). + NULL, // + type_Pairwise, // EAPOL-Key Information field: Key Type bit: type_Group or type_Pairwise. + _FALSE, // EAPOL-Key Information field: Install Flag. + _TRUE, // EAPOL-Key Information field: Key Ack bit. + _FALSE, // EAPOL-Key Information field: Key MIC bit. If true, we will calculate EAPOL MIC and fill it into Key MIC field. + _FALSE, // EAPOL-Key Information field: Secure bit. + _FALSE, // EAPOL-Key Information field: Error bit. True for MIC failure report. + _FALSE, // EAPOL-Key Information field: Requst bit. + KeyReplayCounter, // EAPOL-KEY Replay Counter field. //pSTA->perSTAKeyInfo.KeyReplayCounter + pBTinfo->BtAsocEntry[EntryNum].ANonce, // EAPOL-Key Key Nonce field (32-byte). + 0, // EAPOL-Key Key RSC field (8-byte). + NULL, // Key Data field: Pointer to RSN IE, NULL if + NULL, // Key Data field: Pointer to GTK, NULL if Key Data Length = 0. + EntryNum + ); + pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState = STATE_WPA_AUTH_WAIT_PACKET_2; + + PlatformSetTimer(padapter, &pBtSec->BTWPAAuthTimer , BT_WPA_AUTH_TIMEOUT_PERIOD); + // Set WPA Auth State + + RTPRINT(FIOCTL, IOCTL_STATE, ("Initial BT WPA Creat mode successful !!\n")); + } + else if (pBTinfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_JOINER) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("BT Joiner BTPKT_WPAAuthINITIALIZE\n")); + // Set WPA Auth State + pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState = STATE_WPA_AUTH_WAIT_PACKET_1; + RTPRINT(FIOCTL, IOCTL_STATE, ("Initial BT WPA Joiner mode successful !!\n")); + } + else + { + pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState = STATE_WPA_AUTH_UNINITIALIZED; + RTPRINT(FIOCTL, IOCTL_STATE, ("=====> BT unknown mode\n")); + } +#endif +} + +void BTPKT_TimerCallbackWPAAuth(PRT_TIMER pTimer) +{ +#if 0 +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTinfo->BtMgnt; + PBT_SECURITY pBtSec = &pBTinfo->BtSec; + u8 EntryNum = pBtMgnt->CurrentConnectEntryNum; + u32 index; + + + // + // Now we check all BT entry !! + // + for (index = 0; index < MAX_BT_ASOC_ENTRY_NUM; index++) + { + // Check bUsed + if (!pBTinfo->BtAsocEntry[index].bUsed) + continue; + + // Check state + if (pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState == STATE_WPA_AUTH_SUCCESSED) + continue; + + if (pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState == STATE_WPA_AUTH_UNINITIALIZED) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("====> BTPKT_TimerCallbackWPAAuth(), BTPKT_WPAAuthINITIALIZE!!\n")); + BTPKT_WPAAuthINITIALIZE(padapter,EntryNum); + continue; + } + + // Add Re-play counter !! + pBTinfo->BtAsocEntry[EntryNum].WPAAuthReplayCount++; + + if (pBTinfo->BtAsocEntry[EntryNum].WPAAuthReplayCount > BTMaxWPAAuthReTransmitCoun) + { + BTHCI_SM_WITH_INFO(padapter,HCI_STATE_AUTHENTICATING,STATE_CMD_4WAY_FAILED,EntryNum); + RTPRINT(FIOCTL, IOCTL_STATE, ("====> BTPKT_TimerCallbackWPAAuth(), Retry too much times !!\n")); + continue; + } + else if (pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState == STATE_WPA_AUTH_WAIT_PACKET_1) + { + // We may be remove PlatformSetTimer , after check all station !! + PlatformSetTimer(padapter, &pBtSec->BTWPAAuthTimer, BT_WPA_AUTH_TIMEOUT_PERIOD); + RTPRINT(FIOCTL, IOCTL_STATE, ("====> Retry STATE_WPA_AUTH_WAIT_PACKET_1 !!\n")); + continue; + } + else if (pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState == STATE_WPA_AUTH_WAIT_PACKET_2) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("====> Re-Send 1st of 4-way, STATE_WPA_AUTH_WAIT_PACKET_2 !!\n")); + // Re-Send 1st of 4-way !! + { + u64 KeyReplayCounter = 0; + u8 temp[8] = {0}; + u8 indexi = 0; + // Set ReplayCounter + pBTinfo->BtAsocEntry[EntryNum].KeyReplayCounter ++; + + for (indexi = 0; indexi < 8; indexi++) + temp[indexi] = (u8)((pBTinfo->BtAsocEntry[EntryNum].KeyReplayCounter >>((7-indexi)*8))&0xff); + + // Send 1st packet of 4-way + btpkt_SendEapolKeyPacket( + padapter, + pBTinfo->BtAsocEntry[EntryNum].BTRemoteMACAddr, //Sta MAC address + NULL, // Pointer to KCK (EAPOL-Key Confirmation Key). + NULL, // + type_Pairwise, // EAPOL-Key Information field: Key Type bit: type_Group or type_Pairwise. + _FALSE, // EAPOL-Key Information field: Install Flag. + _TRUE, // EAPOL-Key Information field: Key Ack bit. + _FALSE, // EAPOL-Key Information field: Key MIC bit. If true, we will calculate EAPOL MIC and fill it into Key MIC field. + _FALSE, // EAPOL-Key Information field: Secure bit. + _FALSE, // EAPOL-Key Information field: Error bit. True for MIC failure report. + _FALSE, // EAPOL-Key Information field: Requst bit. + KeyReplayCounter, // EAPOL-KEY Replay Counter field. //pSTA->perSTAKeyInfo.KeyReplayCounter + pBTinfo->BtAsocEntry[EntryNum].ANonce, // EAPOL-Key Key Nonce field (32-byte). + 0, // EAPOL-Key Key RSC field (8-byte). + NULL, // Key Data field: Pointer to RSN IE, NULL if + NULL, // Key Data field: Pointer to GTK, NULL if Key Data Length = 0. + EntryNum + ); + } + // We may be remove PlatformSetTimer BTWPAAuthTimer , after check all station !! + PlatformSetTimer(padapter, &pBtSec->BTWPAAuthTimer , BT_WPA_AUTH_TIMEOUT_PERIOD); + //RTPRINT(FIOCTL, IOCTL_STATE, ("====> Re-Send 1st of 4-way, STATE_WPA_AUTH_WAIT_PACKET_2 !!\n")); + continue; + } + else if (pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState == STATE_WPA_AUTH_WAIT_PACKET_3) + { + // We may be remove PlatformSetTimer , after check all station !! + PlatformSetTimer(padapter, &pBtSec->BTWPAAuthTimer , BT_WPA_AUTH_TIMEOUT_PERIOD); + RTPRINT(FIOCTL, IOCTL_STATE, ("====> Re-Send 2nd of 4-way, STATE_WPA_AUTH_WAIT_PACKET_3 !!\n")); + continue; + } + else if (pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState == STATE_WPA_AUTH_WAIT_PACKET_4) + { + // Re-Send 3th of 4-way !! + { + u64 KeyReplayCounter = 0; + u8 temp[8] = {0}; + u8 indexi = 0; + // Set ReplayCounter + pBTinfo->BtAsocEntry[EntryNum].KeyReplayCounter ++; + + for (indexi = 0; indexi < 8; indexi++) + temp[indexi] = (u8)((pBTinfo->BtAsocEntry[EntryNum].KeyReplayCounter >> ((7-indexi)*8))&0xff); + + btpkt_SendEapolKeyPacket( + padapter, + pBTinfo->BtAsocEntry[EntryNum].BTRemoteMACAddr, + pBTinfo->BtAsocEntry[EntryNum].PTK, // Pointer to KCK (EAPOL-Key Confirmation Key). + NULL,//pBTinfo->BtAsocEntry[EntryNum].PTK + 16, + type_Pairwise, // EAPOL-Key Information field: Key Type bit: type_Group or type_Pairwise. + _TRUE, // EAPOL-Key Information field: Install Flag. + _TRUE, // EAPOL-Key Information field: Key Ack bit. + _TRUE, // EAPOL-Key Information field: Key MIC bit. If true, we will calculate EAPOL MIC and fill it into Key MIC field. + _TRUE, // EAPOL-Key Information field: Secure bit. + _FALSE, // EAPOL-Key Information field: Error bit. True for MIC failure report. + _FALSE, // EAPOL-Key Information field: Requst bit. + KeyReplayCounter,//pSTA->perSTAKeyInfo.KeyReplayCounter, // EAPOL-KEY Replay Counter field. + pBTinfo->BtAsocEntry[EntryNum].ANonce, // EAPOL-Key Key Nonce field (32-byte). + 0, // perSTA EAPOL-Key Key RSC field (8-byte). + &(pBtSec->RSNIE), // Key Data field: Pointer to RSN IE, NULL if + NULL,//pBTinfo->BtAsocEntry[EntryNum].GTK, // Key Data field: Pointer to GTK, NULL if Key Data Length = 0. + EntryNum + ); + } + // We may be remove PlatformSetTimer , after check all station !! + PlatformSetTimer(padapter, &pBtSec->BTWPAAuthTimer, BT_WPA_AUTH_TIMEOUT_PERIOD); + RTPRINT(FIOCTL, IOCTL_STATE, ("====> Re-Send 3th of 4-way, STATE_WPA_AUTH_WAIT_PACKET_4 !!\n")); + continue; + } + else + { + RTPRINT(FIOCTL, IOCTL_STATE, ("====> BTPKT_TimerCallbackWPAAuth(), Error State !!%d\n",pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState )); + continue; + } + } +#endif +} + +void BTPKT_TimerCallbackBeacon(PRT_TIMER pTimer) +{ +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; +// PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTinfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("=====> BTPKT_TimerCallbackBeacon\n")); +// if (RT_CANNOT_IO(padapter)) +// return; + //pMgntInfo->BtInfo.BTBeaconTmrOn = _TRUE; + + if (!pBTinfo->BTBeaconTmrOn) + return; + + if (pBtMgnt->BtOperationOn) + { + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("btpkt_SendBeacon\n")); + btpkt_SendBeacon(GetDefaultAdapter(padapter)); + PlatformSetTimer(padapter, &pBTinfo->BTBeaconTimer, 100); + } + else + { + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("<===== BTPKT_TimerCallbackBeacon\n")); + } +} + + +// ===== End of sync from SD7 driver COMMOM/bt_handlepacket.c ===== +#endif + +#ifdef __BT_HCI_C__ // COMMOM/bt_hci.c + +#define i64fmt "ll" +#define UINT64_C(v) (v) + +#define FillOctetString(_os,_octet,_len) \ + (_os).Octet=(u8*)(_octet); \ + (_os).Length=(_len); + +static RT_STATUS PlatformIndicateBTEvent( + PADAPTER padapter, + void *pEvntData, + u32 dataLen + ) +{ + RT_STATUS rt_status = RT_STATUS_FAILURE; +#ifdef PLATFORM_WINDOWS + NTSTATUS nt_status = STATUS_SUCCESS; + PIRP pIrp = NULL; + u32 BytesTransferred = 0; +#endif + + RTPRINT(FIOCTL, IOCTL_BT_EVENT_DETAIL, ("BT event start, %d bytes data to Transferred!!\n", dataLen)); + RTPRINT_DATA(FIOCTL, IOCTL_BT_EVENT_DETAIL, "To transfer Hex Data :\n", + pEvntData, dataLen); + +// if (pGBTDeviceExtension==NULL || pGBTDeviceExtension->padapter!=padapter) +// return rt_status; + + BT_EventParse(padapter, pEvntData, dataLen); + +#ifdef PLATFORM_LINUX + + printk(KERN_WARNING "%s: Linux has no way to report BT event!!\n", __FUNCTION__); + +#elif defined(PLATFORM_WINDOWS) + + pIrp = IOCTL_BtIrpDequeue(pGBTDeviceExtension, IRP_HCI_EVENT_Q); + + if(pIrp) + { + PVOID outbuf; + ULONG outlen; + ULONG offset; + + outbuf = MmGetSystemAddressForMdlSafe(pIrp->MdlAddress, HighPagePriority); + if(outbuf == NULL) + { + RTPRINT(FIOCTL, IOCTL_IRP, ("PlatformIndicateBTEvent(), error!! MdlAddress = NULL!!\n")); + BytesTransferred = 0; + nt_status = STATUS_UNSUCCESSFUL; + } + else + { + outlen = MmGetMdlByteCount(pIrp->MdlAddress); + offset = MmGetMdlByteOffset(pIrp->MdlAddress); + + if(dataLen <= outlen) + BytesTransferred = dataLen; + else + BytesTransferred = outlen; + _rtw_memcpy(outbuf, pEvntData, BytesTransferred); + nt_status = STATUS_SUCCESS; + } + RTPRINT(FIOCTL, IOCTL_BT_EVENT_DETAIL, ("BT event, %d bytes data Transferred!!\n", BytesTransferred)); + RTPRINT_DATA(FIOCTL, (IOCTL_BT_EVENT_DETAIL|IOCTL_BT_LOGO), "BT EVENT Hex Data :\n", + outbuf, BytesTransferred); + + IOCTL_CompleteSingleIRP(pIrp, nt_status, BytesTransferred); + if (nt_status == STATUS_SUCCESS) + rt_status = RT_STATUS_SUCCESS; + } + +#endif // PLATFORM_WINDOWS + + RTPRINT(FIOCTL, IOCTL_BT_EVENT_DETAIL, ("BT event end, %s\n", + (rt_status == RT_STATUS_SUCCESS)? "SUCCESS":"FAIL")); + + return rt_status; +} + +// ===== Below this line is sync from SD7 driver COMMOM/bt_hci.c ===== + +u8 testPMK[PMK_LEN] = {2,2,3,3,4,4,5,5,6,6, + 7,7,8,8,9,9,2,2,3,3, + 4,4,2,2,8,8,9,9,2,2, + 5,5}; + +u8 bthci_GetLocalChannel(PADAPTER padapter) +{ + return padapter->mlmeextpriv.cur_channel; +} + +u8 bthci_GetCurrentEntryNum(PADAPTER padapter, u8 PhyHandle) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + u8 i; + + for (i = 0; i < MAX_BT_ASOC_ENTRY_NUM; i++) + { + if ((pBTInfo->BtAsocEntry[i].bUsed == _TRUE) && (pBTInfo->BtAsocEntry[i].PhyLinkCmdData.BtPhyLinkhandle == PhyHandle)) + { + return i; + } + } + + return 0xFF; +} + +void bthci_DecideBTChannel(PADAPTER padapter, u8 EntryNum) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_HCI_INFO pBtHciInfo; + PCHNL_TXPOWER_TRIPLE pTriple_subband = NULL; + PCOMMON_TRIPLE pTriple; + u8 i, j, localchnl, firstRemoteLegalChnlInTriplet=0, regulatory_skipLen=0; + u8 subbandTripletCnt = 0; + + + pmlmepriv = &padapter->mlmepriv; + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtHciInfo = &pBTInfo->BtHciInfo; + + pBtMgnt->CheckChnlIsSuit = _TRUE; + localchnl = bthci_GetLocalChannel(padapter); + + { +#if 0 // for debug only + pTriple = (PCOMMON_TRIPLE)&(pBtHciInfo->BTPreChnllist[COUNTRY_STR_LEN]); + + // contains country string len is 3 + for (i=0; i<(pBtHciInfo->BtPreChnlListLen-COUNTRY_STR_LEN); i+=3, pTriple++) + { + DbgPrint("pTriple->byte_1st = %d, pTriple->byte_2nd = %d, pTriple->byte_3rd = %d\n", + pTriple->byte_1st, pTriple->byte_2nd, pTriple->byte_3rd); + } +#endif + pTriple = (PCOMMON_TRIPLE)&(pBtHciInfo->BTPreChnllist[COUNTRY_STR_LEN]); + + // contains country string, len is 3 + for (i = 0; i < (pBtHciInfo->BtPreChnlListLen-COUNTRY_STR_LEN); i+=3, pTriple++) + { + // + // check every triplet, an triplet may be + // regulatory extension identifier or sub-band triplet + // + if (pTriple->byte_1st == 0xc9) // Regulatory Extension Identifier, skip it + { + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Find Regulatory ID, regulatory class = %d\n", pTriple->byte_2nd)); + regulatory_skipLen += 3; + pTriple_subband = NULL; + continue; + } + else // Sub-band triplet + { + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Find Sub-band triplet \n")); + subbandTripletCnt++; + pTriple_subband = (PCHNL_TXPOWER_TRIPLE)pTriple; + // + // if remote first legal channel not found, then find first remote channel + // and it's legal for our channel plan. + // + + // search the sub-band triplet and find if remote channel is legal to our channel plan. + for (j = pTriple_subband->FirstChnl; j < (pTriple_subband->FirstChnl+pTriple_subband->NumChnls); j++) + { + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), (" Check if chnl(%d) is legal\n", j)); + if (BT_IsLegalChannel(padapter, j)) // remote channel is legal for our channel plan. + { + firstRemoteLegalChnlInTriplet = j; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Find first remote legal channel : %d\n", firstRemoteLegalChnlInTriplet)); + + // + // If we find a remote legal channel in the sub-band triplet + // and only BT connection is established(local not connect to any AP or IBSS), + // then we just switch channel to remote channel. + // + #if 0 + if (!MgntRoamingInProgress(pMgntInfo) && + !MgntIsLinkInProgress(pMgntInfo) && + !MgntScanInProgress(pMgntInfo)) + #endif + { +#if 0 + if (!(pMgntInfo->mAssoc || + pMgntInfo->mIbss || + IsAPModeExist(padapter)|| + BTHCI_HsConnectionEstablished(padapter))) +#else + if (!(BTDM_CheckFWState(padapter, WIFI_ASOC_STATE|WIFI_ADHOC_STATE|WIFI_AP_STATE) == _TRUE || + BTHCI_HsConnectionEstablished(padapter))) +#endif + { + pBtMgnt->BTChannel = firstRemoteLegalChnlInTriplet; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Remote legal channel (%d) is selected, Local not connect to any!!\n", pBtMgnt->BTChannel)); + return; + } + else + { + if ((localchnl >= firstRemoteLegalChnlInTriplet) && + (localchnl < (pTriple_subband->FirstChnl+pTriple_subband->NumChnls))) + { + pBtMgnt->BTChannel = localchnl; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Local channel (%d) is selected, wifi or BT connection exists\n", pBtMgnt->BTChannel)); + return; + } + } + } + break; + } + } + } + } + + if (subbandTripletCnt) + { + //if any preferred channel triplet exists + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("There are %d sub band triplet exists, ", subbandTripletCnt)); + if (firstRemoteLegalChnlInTriplet == 0) + { + //no legal channel is found, reject the connection. + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("no legal channel is found!!\n")); + } + else + { + // Remote Legal channel is found but not match to local + //(wifi connection exists), so reject the connection. + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Remote Legal channel is found but not match to local(wifi connection exists)!!\n")); + } + pBtMgnt->CheckChnlIsSuit = _FALSE; + } + else + { + // There are not any preferred channel triplet exists + // Use current legal channel as the bt channel. + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("No sub band triplet exists!!\n")); + } + pBtMgnt->BTChannel = localchnl; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Local channel (%d) is selected!!\n", pBtMgnt->BTChannel)); + } +} + + +//Success:return _TRUE +//Fail:return _FALSE +u8 bthci_GetAssocInfo(PADAPTER padapter, u8 EntryNum) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo; + PBT_HCI_INFO pBtHciInfo; + u8 tempBuf[256]; + u8 i = 0; + u8 BaseMemoryShift = 0; + u16 TotalLen = 0; + + PAMP_ASSOC_STRUCTURE pAmpAsoc; + + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("GetAssocInfo start\n")); + + pBTInfo = GET_BT_INFO(padapter); + pBtHciInfo = &pBTInfo->BtHciInfo; + + if (pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar == 0) + { + + if (pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocRemLen < (MAX_AMP_ASSOC_FRAG_LEN)) + TotalLen = pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocRemLen; + else if (pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocRemLen == (MAX_AMP_ASSOC_FRAG_LEN)) + TotalLen = MAX_AMP_ASSOC_FRAG_LEN; + } + else if (pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar > 0) + TotalLen = pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar; + + while ((pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar >= BaseMemoryShift) || TotalLen > BaseMemoryShift) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("GetAssocInfo, TotalLen=%d, BaseMemoryShift=%d\n",TotalLen,BaseMemoryShift)); + _rtw_memcpy(tempBuf, + (u8*)pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocfragment+BaseMemoryShift, + TotalLen-BaseMemoryShift); + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_DETAIL, "GetAssocInfo :\n", + tempBuf, TotalLen-BaseMemoryShift); + +#if 0 + AmpAsoc[i].TypeID=*((u8 *)(tempBuf)); + AmpAsoc[i].Length=*((u16 *)(((u8 *)(tempBuf))+1)); + _rtw_memcpy(AmpAsoc[i].Data, ((u8 *)(tempBuf))+3, AmpAsoc[i].Length); + BaseMemoryShift=BaseMemoryShift+3+AmpAsoc[i].Length; +#else + pAmpAsoc = (PAMP_ASSOC_STRUCTURE)tempBuf; + pAmpAsoc->Length = EF2Byte(pAmpAsoc->Length); + BaseMemoryShift += 3 + pAmpAsoc->Length; +#endif + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("TypeID = 0x%x, ", pAmpAsoc->TypeID)); + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD, "Hex Data: \n", pAmpAsoc->Data, pAmpAsoc->Length); + switch (pAmpAsoc->TypeID) + { + case AMP_MAC_ADDR: + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("==> AMP_MAC_ADDR\n")); + if (pAmpAsoc->Length > 6) + { + return _FALSE; + } + + _rtw_memcpy(pBTInfo->BtAsocEntry[EntryNum].BTRemoteMACAddr, pAmpAsoc->Data,6); + RTPRINT_ADDR(FIOCTL, IOCTL_BT_HCICMD, ("Remote Mac address \n"), pBTInfo->BtAsocEntry[EntryNum].BTRemoteMACAddr); + break; + } + + case AMP_PREFERRED_CHANNEL_LIST: + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("==> AMP_PREFERRED_CHANNEL_LIST\n")); + pBtHciInfo->BtPreChnlListLen=pAmpAsoc->Length; + _rtw_memcpy(pBtHciInfo->BTPreChnllist, + pAmpAsoc->Data, + pBtHciInfo->BtPreChnlListLen); + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD, "Preferred channel list : \n", pBtHciInfo->BTPreChnllist, pBtHciInfo->BtPreChnlListLen); + bthci_DecideBTChannel(padapter,EntryNum); + break; + } + + case AMP_CONNECTED_CHANNEL: + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("==> AMP_CONNECTED_CHANNEL\n")); + pBtHciInfo->BTConnectChnlListLen=pAmpAsoc->Length; + _rtw_memcpy(pBtHciInfo->BTConnectChnllist, + pAmpAsoc->Data, + pBtHciInfo->BTConnectChnlListLen); + break; + + } + + case AMP_80211_PAL_CAP_LIST: + { + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("==> AMP_80211_PAL_CAP_LIST\n")); + pBTInfo->BtAsocEntry[EntryNum].BTCapability=*(u32 *)(pAmpAsoc->Data); + if (pBTInfo->BtAsocEntry[EntryNum].BTCapability && 0x00000001) + { + // TODO: + + //Signifies PAL capable of utilizing received activity reports. + } + if (pBTInfo->BtAsocEntry[EntryNum].BTCapability && 0x00000002) + { + // TODO: + //Signifies PAL is capable of utilizing scheduling information received in an activity reports. + } + break; + } + + case AMP_80211_PAL_VISION: + { + pBtHciInfo->BTPalVersion=*(u8 *)(pAmpAsoc->Data); + pBtHciInfo->BTPalCompanyID=*(u16 *)(((u8 *)(pAmpAsoc->Data))+1); + pBtHciInfo->BTPalsubversion=*(u16 *)(((u8 *)(pAmpAsoc->Data))+3); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("==> AMP_80211_PAL_VISION PalVersion 0x%x, PalCompanyID 0x%x, Palsubversion 0x%x\n", + pBtHciInfo->BTPalVersion, + pBtHciInfo->BTPalCompanyID, + pBtHciInfo->BTPalsubversion)); + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("==> Unsupport TypeID !!\n")); + break; + } + i++; + } + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("GetAssocInfo end\n")); + + return _TRUE; +} + +u8 bthci_AddEntry(PADAPTER padapter) +{ + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + u8 i; + + + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + + for (i = 0; i < MAX_BT_ASOC_ENTRY_NUM; i++) + { + if (pBTInfo->BtAsocEntry[i].bUsed == _FALSE) + { + pBTInfo->BtAsocEntry[i].bUsed = _TRUE; + pBtMgnt->CurrentConnectEntryNum = i; + break; + } + } + + if (i == MAX_BT_ASOC_ENTRY_NUM) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("bthci_AddEntry(), Add entry fail!!\n")); + return _FALSE; + } + return _TRUE; +} + +u8 bthci_DiscardTxPackets(PADAPTER padapter, u16 LLH) +{ +#if 0 + u8 flushOccured = _FALSE; +#if (SENDTXMEHTOD == 0 || SENDTXMEHTOD == 2) +// PADAPTER padapter = GetDefaultAdapter(padapter); + PRT_TX_LOCAL_BUFFER pLocalBuffer; + PPACKET_IRP_ACL_DATA pACLData; + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_DiscardTxPackets() ==>\n")); + + PlatformAcquireSpinLock(padapter, RT_BTData_SPINLOCK); + while(!RTIsListEmpty(&padapter->BTDataTxQueue)) + { + pLocalBuffer = (PRT_TX_LOCAL_BUFFER)RTRemoveHeadListWithCnt(&padapter->BTDataTxQueue, &padapter->NumTxBTDataBlock); + if (pLocalBuffer) + { + pACLData = (PPACKET_IRP_ACL_DATA)pLocalBuffer->Buffer.VirtualAddress; + if (pACLData->Handle == LLH) + flushOccured = _TRUE; + RTInsertTailListWithCnt(&padapter->BTDataIdleQueue, &pLocalBuffer->List, &padapter->NumIdleBTDataBlock); + } + } + PlatformReleaseSpinLock(padapter, RT_BTData_SPINLOCK); +#endif + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_DiscardTxPackets() <==\n")); + return flushOccured; +#else + return _FALSE; +#endif +} + +u8 +bthci_CheckLogLinkBehavior( + PADAPTER padapter, + HCI_FLOW_SPEC TxFlowSpec + ) +{ + u8 ID = TxFlowSpec.Identifier; + u8 ServiceType = TxFlowSpec.ServiceType; + u16 MaxSDUSize = TxFlowSpec.MaximumSDUSize; + u32 SDUInterArrivatime = TxFlowSpec.SDUInterArrivalTime; + u8 match = _FALSE; + + switch (ID) + { + case 1: + { + if (ServiceType == BT_LL_BE) + { + match = _TRUE; + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = TX best effort flowspec\n")); + } + else if ((ServiceType == BT_LL_GU) && (MaxSDUSize == 0xffff)) + { + match = _TRUE; + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = RX guaranteed latency flowspec\n")); + } + else if ((ServiceType == BT_LL_GU) && (MaxSDUSize == 2500)) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = RX guaranteed Large latency flowspec\n")); + } + break; + } + case 2: + { + if (ServiceType == BT_LL_BE) + { + match = _TRUE; + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = RX best effort flowspec\n")); + + } + break; + } + case 3: + { + if ((ServiceType == BT_LL_GU) && (MaxSDUSize == 1492)) + { + match=_TRUE; + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = TX guaranteed latency flowspec\n")); + } + else if ((ServiceType==BT_LL_GU) && (MaxSDUSize==2500)) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = TX guaranteed Large latency flowspec\n")); + } + break; + } + case 4: + { + if (ServiceType == BT_LL_BE) + { + if ((SDUInterArrivatime == 0xffffffff) && (ServiceType == BT_LL_BE) && (MaxSDUSize == 1492)) + { + match = _TRUE; + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = TX/RX aggregated best effort flowspec\n")); + } + } + else if (ServiceType == BT_LL_GU) + { + if ((SDUInterArrivatime == 100) && 10000) + { + match = _TRUE; + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = TX/RX guaranteed bandwidth flowspec\n")); + } + } + break; + } + default: + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Logical Link Type = Unknow Type !!!!!!!!\n")); + break; + } + } + +#if 0 + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("ID = 0x%x, ServiceType = 0x%x, MaximumSDUSize = 0x%x, SDUInterArrivalTime = 0x%lx, AccessLatency = 0x%lx, FlushTimeout = 0x%lx\n", + TxFlowSpec.Identifier, TxFlowSpec.ServiceType, MaxSDUSize,SDUInterArrivatime, TxFlowSpec.AccessLatency, TxFlowSpec.FlushTimeout)); +#else + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("ID=0x%x, ServiceType=0x%x, MaximumSDUSize=0x%x, SDUInterArrivalTime=0x%x, AccessLatency=0x%x, FlushTimeout=0x%x\n", + TxFlowSpec.Identifier, TxFlowSpec.ServiceType, MaxSDUSize, SDUInterArrivatime, TxFlowSpec.AccessLatency, TxFlowSpec.FlushTimeout)); +#endif + return match; +} + +void +bthci_SelectFlowType( + PADAPTER padapter, + BT_LL_FLOWSPEC TxLLFlowSpec, + BT_LL_FLOWSPEC RxLLFlowSpec, + PHCI_FLOW_SPEC TxFlowSpec, + PHCI_FLOW_SPEC RxFlowSpec + ) +{ + switch (TxLLFlowSpec) + { + case BT_TX_BE_FS: + { + TxFlowSpec->Identifier = 0x1; + TxFlowSpec->ServiceType = BT_LL_BE; + TxFlowSpec->MaximumSDUSize = 0xffff; + TxFlowSpec->SDUInterArrivalTime = 0xffffffff; + TxFlowSpec->AccessLatency = 0xffffffff; + TxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_RX_BE_FS: + { + RxFlowSpec->Identifier = 0x2; + RxFlowSpec->ServiceType = BT_LL_BE; + RxFlowSpec->MaximumSDUSize = 0xffff; + RxFlowSpec->SDUInterArrivalTime = 0xffffffff; + RxFlowSpec->AccessLatency = 0xffffffff; + RxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_TX_GU_FS: + { + TxFlowSpec->Identifier = 0x3; + TxFlowSpec->ServiceType = BT_LL_GU; + TxFlowSpec->MaximumSDUSize = 1492; + TxFlowSpec->SDUInterArrivalTime = 0xffffffff; + TxFlowSpec->AccessLatency = 10000; + TxFlowSpec->FlushTimeout = 10000; + break; + } + case BT_RX_GU_FS: + { + RxFlowSpec->Identifier = 0x1; + RxFlowSpec->ServiceType = BT_LL_GU; + RxFlowSpec->MaximumSDUSize = 0xffff; + RxFlowSpec->SDUInterArrivalTime = 0xffffffff; + RxFlowSpec->AccessLatency = 10000; + RxFlowSpec->FlushTimeout = 10000; + break; + } + case BT_TX_BE_AGG_FS: + { + TxFlowSpec->Identifier = 0x4; + TxFlowSpec->ServiceType = BT_LL_BE; + TxFlowSpec->MaximumSDUSize = 1492; + TxFlowSpec->SDUInterArrivalTime = 0xffffffff; + TxFlowSpec->AccessLatency = 0xffffffff; + TxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_RX_BE_AGG_FS: + { + RxFlowSpec->Identifier = 0x4; + RxFlowSpec->ServiceType = BT_LL_BE; + RxFlowSpec->MaximumSDUSize = 1492; + RxFlowSpec->SDUInterArrivalTime = 0xffffffff; + RxFlowSpec->AccessLatency = 0xffffffff; + RxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_TX_GU_BW_FS: + { + TxFlowSpec->Identifier = 0x4; + TxFlowSpec->ServiceType = BT_LL_GU; + TxFlowSpec->MaximumSDUSize = 1492; + TxFlowSpec->SDUInterArrivalTime = 100; + TxFlowSpec->AccessLatency = 0xffffffff; + TxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_RX_GU_BW_FS: + { + RxFlowSpec->Identifier = 0x4; + RxFlowSpec->ServiceType = BT_LL_GU; + RxFlowSpec->MaximumSDUSize = 1492; + RxFlowSpec->SDUInterArrivalTime = 100; + RxFlowSpec->AccessLatency = 0xffffffff; + RxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_TX_GU_LARGE_FS: + { + TxFlowSpec->Identifier = 0x3; + TxFlowSpec->ServiceType = BT_LL_GU; + TxFlowSpec->MaximumSDUSize = 2500; + TxFlowSpec->SDUInterArrivalTime = 0x1; + TxFlowSpec->AccessLatency = 10000; + TxFlowSpec->FlushTimeout = 10000; + break; + } + case BT_RX_GU_LARGE_FS: + { + RxFlowSpec->Identifier = 0x1; + RxFlowSpec->ServiceType = BT_LL_GU; + RxFlowSpec->MaximumSDUSize = 2500; + RxFlowSpec->SDUInterArrivalTime = 0x1; + RxFlowSpec->AccessLatency = 10000; + RxFlowSpec->FlushTimeout = 10000; + break; + } + default: + break; + } + + switch (RxLLFlowSpec) + { + case BT_TX_BE_FS: + { + TxFlowSpec->Identifier = 0x1; + TxFlowSpec->ServiceType = BT_LL_BE; + TxFlowSpec->MaximumSDUSize = 0xffff; + TxFlowSpec->SDUInterArrivalTime = 0xffffffff; + TxFlowSpec->AccessLatency = 0xffffffff; + TxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_RX_BE_FS: + { + RxFlowSpec->Identifier = 0x2; + RxFlowSpec->ServiceType = BT_LL_BE; + RxFlowSpec->MaximumSDUSize = 0xffff; + RxFlowSpec->SDUInterArrivalTime = 0xffffffff; + RxFlowSpec->AccessLatency = 0xffffffff; + RxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_TX_GU_FS: + { + TxFlowSpec->Identifier = 0x3; + TxFlowSpec->ServiceType = BT_LL_GU; + TxFlowSpec->MaximumSDUSize = 1492; + TxFlowSpec->SDUInterArrivalTime = 0xffffffff; + TxFlowSpec->AccessLatency = 10000; + TxFlowSpec->FlushTimeout = 10000; + break; + } + case BT_RX_GU_FS: + { + RxFlowSpec->Identifier = 0x1; + RxFlowSpec->ServiceType = BT_LL_GU; + RxFlowSpec->MaximumSDUSize = 0xffff; + RxFlowSpec->SDUInterArrivalTime = 0xffffffff; + RxFlowSpec->AccessLatency = 10000; + RxFlowSpec->FlushTimeout = 10000; + break; + } + case BT_TX_BE_AGG_FS: + { + TxFlowSpec->Identifier = 0x4; + TxFlowSpec->ServiceType = BT_LL_BE; + TxFlowSpec->MaximumSDUSize = 1492; + TxFlowSpec->SDUInterArrivalTime = 0xffffffff; + TxFlowSpec->AccessLatency = 0xffffffff; + TxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_RX_BE_AGG_FS: + { + RxFlowSpec->Identifier = 0x4; + RxFlowSpec->ServiceType = BT_LL_BE; + RxFlowSpec->MaximumSDUSize = 1492; + RxFlowSpec->SDUInterArrivalTime = 0xffffffff; + RxFlowSpec->AccessLatency = 0xffffffff; + RxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_TX_GU_BW_FS: + { + TxFlowSpec->Identifier = 0x4; + TxFlowSpec->ServiceType = BT_LL_GU; + TxFlowSpec->MaximumSDUSize = 1492; + TxFlowSpec->SDUInterArrivalTime = 100; + TxFlowSpec->AccessLatency = 0xffffffff; + TxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_RX_GU_BW_FS: + { + RxFlowSpec->Identifier = 0x4; + RxFlowSpec->ServiceType = BT_LL_GU; + RxFlowSpec->MaximumSDUSize = 1492; + RxFlowSpec->SDUInterArrivalTime = 100; + RxFlowSpec->AccessLatency = 0xffffffff; + RxFlowSpec->FlushTimeout = 0xffffffff; + break; + } + case BT_TX_GU_LARGE_FS: + { + TxFlowSpec->Identifier = 0x3; + TxFlowSpec->ServiceType = BT_LL_GU; + TxFlowSpec->MaximumSDUSize = 2500; + TxFlowSpec->SDUInterArrivalTime = 0x1; + TxFlowSpec->AccessLatency = 10000; + TxFlowSpec->FlushTimeout = 10000; + break; + } + case BT_RX_GU_LARGE_FS: + { + RxFlowSpec->Identifier = 0x1; + RxFlowSpec->ServiceType = BT_LL_GU; + RxFlowSpec->MaximumSDUSize = 2500; + RxFlowSpec->SDUInterArrivalTime = 0x1; + RxFlowSpec->AccessLatency = 10000; + RxFlowSpec->FlushTimeout = 10000; + break; + } + default: + break; + } +} + +u16 +bthci_AssocMACAddr( + PADAPTER padapter, + void *pbuf + ) +{ + PAMP_ASSOC_STRUCTURE pAssoStrc = (PAMP_ASSOC_STRUCTURE)pbuf; +/* + u8 FakeAddress[6],i; + + for (i=0;i<6;i++) + { + FakeAddress[i]=i; + } +*/ + pAssoStrc->TypeID = AMP_MAC_ADDR; + pAssoStrc->Length = 0x06; + // _rtw_memcpy(&pAssoStrc->Data[0], Adapter->CurrentAddress, 6); + _rtw_memcpy(&pAssoStrc->Data[0], padapter->eeprompriv.mac_addr, 6); + //_rtw_memcpy(&pAssoStrc->Data[0], FakeAddress, 6); + RTPRINT_DATA(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("AssocMACAddr : \n"), pAssoStrc, pAssoStrc->Length+3); + + return (pAssoStrc->Length+3); +} + +u16 +bthci_PALCapabilities( + PADAPTER padapter, + void *pbuf + ) +{ + PAMP_ASSOC_STRUCTURE pAssoStrc = (PAMP_ASSOC_STRUCTURE)pbuf; + + pAssoStrc->TypeID = AMP_80211_PAL_CAP_LIST; + pAssoStrc->Length = 0x04; + + pAssoStrc->Data[0] = 0x00; + pAssoStrc->Data[1] = 0x00; + + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("PALCapabilities : \n"), pAssoStrc, pAssoStrc->Length+3); + RTPRINT(FIOCTL, IOCTL_BT_LOGO, ("PALCapabilities \n")); + + RTPRINT(FIOCTL, IOCTL_BT_LOGO, (" TypeID = 0x%x,\n Length = 0x%x,\n Content =0x0000\n", + pAssoStrc->TypeID, + pAssoStrc->Length)); + + return (pAssoStrc->Length+3); +} + +u16 +bthci_AssocPreferredChannelList( + PADAPTER padapter, + void *pbuf, + u8 EntryNum + ) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo; +// PRT_DOT11D_INFO pDot11dInfo; + PAMP_ASSOC_STRUCTURE pAssoStrc; + PAMP_PREF_CHNL_REGULATORY pReg; + PCHNL_TXPOWER_TRIPLE pTripleIE, pTriple; + char ctrString[3] = {'X', 'X', 'X'}; + u32 len = 0; + u8 i=0, NumTriples=0, preferredChnl; + + + pBTInfo = GET_BT_INFO(padapter); +// pDot11dInfo = GET_DOT11D_INFO(pMgntInfo); + pAssoStrc = (PAMP_ASSOC_STRUCTURE)pbuf; + pReg = (PAMP_PREF_CHNL_REGULATORY)&pAssoStrc->Data[3]; + + preferredChnl = bthci_GetLocalChannel(padapter); + pAssoStrc->TypeID = AMP_PREFERRED_CHANNEL_LIST; +#if 0//cosa temp remove + // When 802.11d is enabled and learned from beacon + if ( (pDot11dInfo->bEnabled) && + (pDot11dInfo->State == DOT11D_STATE_LEARNED) ) + { + //Country String + _rtw_memcpy(&pAssoStrc->Data[0], &pDot11dInfo->CountryIeBuf[0], 3); + pReg->reXId = 201; + pReg->regulatoryClass = 254; // should parse beacon frame + pReg->coverageClass = 0; + len += 6; + pTriple=(PCHNL_TXPOWER_TRIPLE)&pAssoStrc->Data[len]; + pTripleIE = (PCHNL_TXPOWER_TRIPLE)(&pDot11dInfo->CountryIeBuf[3]); + + NumTriples = (pDot11dInfo->CountryIeLen-3)/3;// skip 3-byte country string. + for (i=0; i<NumTriples; i++) + { + if ( (preferredChnl > pTripleIE->FirstChnl) && + (preferredChnl <= (pTripleIE->FirstChnl+pTripleIE->NumChnls-1))) + { + // ex: preferred=10, first=3, num=9, from ch3~ch11 + // that should be divided to 2~3 groups + // (1) first=10, num=1, ch10 + // (2) first=3, num=7, from ch3~ch9 + // (3) first=11, num=1, ch11 + + // (1) group 1, preferred channel + pTriple->FirstChnl = preferredChnl; + pTriple->NumChnls = 1; + pTriple->MaxTxPowerInDbm = pTripleIE->MaxTxPowerInDbm; + len += 3; + pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3); + + // (2) group 2, first chnl~preferred-1 + pTriple->FirstChnl = pTripleIE->FirstChnl; + pTriple->NumChnls = preferredChnl-pTriple->FirstChnl; + pTriple->MaxTxPowerInDbm = pTripleIE->MaxTxPowerInDbm; + len += 3; + pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3); + + if (preferredChnl < (pTripleIE->FirstChnl+pTripleIE->NumChnls-1)) + { + // (3) group 3, preferred+1~last + pTriple->FirstChnl = preferredChnl+1; + pTriple->NumChnls = pTripleIE->FirstChnl+pTripleIE->NumChnls-1-preferredChnl; + pTriple->MaxTxPowerInDbm = pTripleIE->MaxTxPowerInDbm; + len += 3; + pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3); + } + } + else + { + pTriple->FirstChnl = pTripleIE->FirstChnl; + pTriple->NumChnls = pTripleIE->NumChnls; + pTriple->MaxTxPowerInDbm = pTripleIE->MaxTxPowerInDbm; + len += 3; + pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3); + } + pTripleIE = (PCHNL_TXPOWER_TRIPLE)((u8*)pTripleIE + 3); + } + } + else +#endif + { + // locale unknown + _rtw_memcpy(&pAssoStrc->Data[0], &ctrString[0], 3); + pReg->reXId = 201; + pReg->regulatoryClass = 254; + pReg->coverageClass = 0; + len += 6; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD | IOCTL_BT_LOGO), ("PREFERRED_CHNL_LIST\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD | IOCTL_BT_LOGO), ("XXX, 201,254,0\n")); + // at the following, chnl 1~11 should be contained + pTriple = (PCHNL_TXPOWER_TRIPLE)&pAssoStrc->Data[len]; + + // (1) if any wifi or bt HS connection exists + if ((pBTInfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_CREATOR) || +#if 0 + pMgntInfo->mAssoc || + pMgntInfo->mIbss || + IsExtAPModeExist(padapter)) || +#else + (BTDM_CheckFWState(padapter, WIFI_ASOC_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE) == _TRUE) || +#endif + BTHCI_HsConnectionEstablished(padapter)) + { + pTriple->FirstChnl = preferredChnl; + pTriple->NumChnls = 1; + pTriple->MaxTxPowerInDbm = 20; + len += 3; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD | IOCTL_BT_LOGO), ("First Channel = %d, Channel Num = %d, MaxDbm = %d\n", + pTriple->FirstChnl, + pTriple->NumChnls, + pTriple->MaxTxPowerInDbm)); + + //pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3); + } +#if 0 + // If we are responder, we can fill all the channel list. + if (pBTInfo->BtAsocEntry[EntryNum].AMPRole!=AMP_BTAP_CREATOR) + { + // + // When Wifi connection exists, channel should be choosed to the current one. + // 1. Infra, connect to an AP + // 2. IBSS, fixed channel + // + if (!pMgntInfo->mAssoc && + (padapter->MgntInfo.Regdot11networktype != RT_JOIN_NETWORKTYPE_ADHOC )) + { + // (2) group 2, chnl 1~preferred-1 + if (preferredChnl > 1 && preferredChnl<15) + { + pTriple->FirstChnl = 1; + pTriple->NumChnls = preferredChnl-1; + pTriple->MaxTxPowerInDbm = 20; + len += 3; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD | IOCTL_BT_LOGO), ("First Channel = %d, Channel Num = %d, MaxDbm = %d\n", + pTriple->FirstChnl, + pTriple->NumChnls, + pTriple->MaxTxPowerInDbm)); + pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3); + + } + // (3) group 3, preferred+1~chnl 11 + if (preferredChnl < 11) + { + pTriple->FirstChnl = preferredChnl+1; + pTriple->NumChnls = 11-preferredChnl; + pTriple->MaxTxPowerInDbm = 20; + len += 3; + //pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3); + + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD | IOCTL_BT_LOGO), ("First Channel = %d, Channel Num = %d, MaxDbm = %d\n", + pTriple->FirstChnl, + pTriple->NumChnls, + pTriple->MaxTxPowerInDbm)); + } + } + } +#endif + } + pAssoStrc->Length = (u16)len; + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD, ("AssocPreferredChannelList : \n"), pAssoStrc, pAssoStrc->Length+3); + + return (pAssoStrc->Length+3); +} + +u16 bthci_AssocPALVer(PADAPTER padapter, void *pbuf) +{ + PAMP_ASSOC_STRUCTURE pAssoStrc = (PAMP_ASSOC_STRUCTURE)pbuf; + u8 *pu1Tmp; + u16 *pu2Tmp; + + pAssoStrc->TypeID = AMP_80211_PAL_VISION; + pAssoStrc->Length = 0x5; + pu1Tmp = &pAssoStrc->Data[0]; + *pu1Tmp = 0x1; // PAL Version + pu2Tmp = (u16*)&pAssoStrc->Data[1]; + *pu2Tmp = 0x5D; // SIG Company identifier of 802.11 PAL vendor + pu2Tmp = (u16*)&pAssoStrc->Data[3]; + *pu2Tmp = 0x1; // PAL Sub-version specifier + + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("AssocPALVer : \n"), pAssoStrc, pAssoStrc->Length+3); + RTPRINT(FIOCTL, IOCTL_BT_LOGO, ("AssocPALVer \n")); + + RTPRINT(FIOCTL, IOCTL_BT_LOGO, (" TypeID = 0x%x,\n Length = 0x%x,\n PAL Version = 0x01,\n PAL vendor = 0x01,\n PAL Sub-version specifier = 0x01\n", + pAssoStrc->TypeID, + pAssoStrc->Length)); + return (pAssoStrc->Length+3); +} + +u16 +bthci_ReservedForTestingPLV( + PADAPTER padapter, + void *pbuf + ) +{ + PAMP_ASSOC_STRUCTURE pAssoStrc = (PAMP_ASSOC_STRUCTURE)pbuf; + + pAssoStrc->TypeID = AMP_RESERVED_FOR_TESTING; + pAssoStrc->Length = 0x10; + + pAssoStrc->Data[0] = 0x00; + pAssoStrc->Data[1] = 0x01; + pAssoStrc->Data[2] = 0x02; + pAssoStrc->Data[3] = 0x03; + pAssoStrc->Data[4] = 0x04; + pAssoStrc->Data[5] = 0x05; + pAssoStrc->Data[6] = 0x06; + pAssoStrc->Data[7] = 0x07; + pAssoStrc->Data[8] = 0x08; + pAssoStrc->Data[9] = 0x09; + pAssoStrc->Data[10] = 0x0a; + pAssoStrc->Data[11] = 0x0b; + pAssoStrc->Data[12] = 0x0c; + pAssoStrc->Data[13] = 0x0d; + pAssoStrc->Data[14] = 0x0e; + pAssoStrc->Data[15] = 0x0f; + + return (pAssoStrc->Length+3); +} + +u8 bthci_CheckRfStateBeforeConnect(PADAPTER padapter) +{ + PBT30Info pBTInfo; + rt_rf_power_state RfState; + + + pBTInfo = GET_BT_INFO(padapter); + +// rtw_hal_get_hwreg(padapter, HW_VAR_RF_STATE, (u8*)(&RfState)); + RfState = adapter_to_pwrctl(padapter)->rf_pwrstate; + + if (RfState != rf_on) + { + PlatformSetTimer(padapter, &pBTInfo->BTPsDisableTimer, 50); + return _FALSE; + } + + return _TRUE; +} + +u8 +bthci_ConstructScanList( + PBT30Info pBTInfo, + u8 *pChannels, + u8 *pNChannels, + PRT_SCAN_TYPE pScanType, + u16 *pDuration + ) +{ + PADAPTER padapter; + PBT_HCI_INFO pBtHciInfo; + PCHNL_TXPOWER_TRIPLE pTriple_subband; + PCOMMON_TRIPLE pTriple; + u8 chnl, i, j, tripleLetsCnt=0; + + + padapter = pBTInfo->padapter; + pBtHciInfo = &pBTInfo->BtHciInfo; + *pNChannels = 0; + *pScanType = SCAN_ACTIVE; + *pDuration = 200; + + pTriple = (PCOMMON_TRIPLE)&(pBtHciInfo->BTPreChnllist[COUNTRY_STR_LEN]); + + // contains country string, len is 3 + for (i = 0; i < (pBtHciInfo->BtPreChnlListLen-COUNTRY_STR_LEN); i+=3, pTriple++) + { + if (pTriple->byte_1st == 0xc9) // Regulatory Extension Identifier, skip it + continue; + else // Sub-band triplet + { + tripleLetsCnt++; + pTriple_subband = (PCHNL_TXPOWER_TRIPLE)pTriple; + + // search the sub-band triplet and find if remote channel is legal to our channel plan. + for (chnl = pTriple_subband->FirstChnl; chnl < (pTriple_subband->FirstChnl+pTriple_subband->NumChnls); chnl++) + { + if (BT_IsLegalChannel(padapter, chnl)) // remote channel is legal for our channel plan. + { + //DbgPrint("cosa insert chnl(%d) into scan list\n", chnl); + pChannels[*pNChannels] = chnl; + (*pNChannels)++; + } + } + } + } + + if (tripleLetsCnt == 0) + { + // Fill chnl 1~ chnl 11 + for (chnl=1; chnl<12; chnl++) + { + //DbgPrint("cosa insert chnl(%d) into scan list\n", chnl); + pChannels[*pNChannels] = chnl; + (*pNChannels)++; + } + } + + if (*pNChannels == 0) + return _FALSE; + else + return _TRUE; +} + +void bthci_ResponderStartToScan(PADAPTER padapter) +{ +#if 0 + static u8 Buf[512]; + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 *pProbeReq = Buf + FIELD_OFFSET(CUSTOMIZED_SCAN_REQUEST, ProbeReqBuf); + u16 *pProbeReqLen = (u16*)(Buf + FIELD_OFFSET(CUSTOMIZED_SCAN_REQUEST, ProbeReqLen)); + PCUSTOMIZED_SCAN_REQUEST pScanReq = (PCUSTOMIZED_SCAN_REQUEST)Buf; + u8 i; + + pBtMgnt->JoinerNeedSendAuth=_TRUE; + pMgntInfo->SettingBeforeScan.WirelessMode = pMgntInfo->dot11CurrentWirelessMode; + pMgntInfo->SettingBeforeScan.ChannelNumber = pMgntInfo->dot11CurrentChannelNumber; + pMgntInfo->SettingBeforeScan.ChannelBandwidth = (HT_CHANNEL_WIDTH)pMgntInfo->pHTInfo->bCurBW40MHz; + pMgntInfo->SettingBeforeScan.ExtChnlOffset = pMgntInfo->pHTInfo->CurSTAExtChnlOffset; + RTPRINT(FIOCTL, IOCTL_STATE, ("[Bt scan], responder start the scan process!!\n")); + + pScanReq->bEnabled = _TRUE; + pScanReq->DataRate = MGN_6M; + + BTPKT_ConstructProbeRequest( + padapter, + pProbeReq, + pProbeReqLen); + + bthci_ConstructScanList(pBTInfo, + pScanReq->Channels, + &pScanReq->nChannels, + &pScanReq->ScanType, + &pScanReq->Duration); + + RTPRINT(FIOCTL, IOCTL_STATE, ("[Bt scan], scan channel list =[")); + for (i=0; i<pScanReq->nChannels; i++) + { + if (i == pScanReq->nChannels-1) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("%d", pScanReq->Channels[i])); + } + else + { + RTPRINT(FIOCTL, IOCTL_STATE, ("%d, \n", pScanReq->Channels[i])); + } + } + RTPRINT(FIOCTL, IOCTL_STATE, ("]\n")); + + RTPRINT(FIOCTL, IOCTL_STATE, ("[Bt scan], customized scan started!!\n")); + pBtMgnt->bBtScan = _TRUE; + MgntActSet_802_11_CustomizedScanRequest((GetDefaultAdapter(padapter)), pScanReq); +#endif +} + +u8 +bthci_PhyLinkConnectionInProgress( + PADAPTER padapter, + u8 PhyLinkHandle + ) +{ + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + + + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->bPhyLinkInProgress && + (pBtMgnt->BtCurrentPhyLinkhandle == PhyLinkHandle)) + { + return _TRUE; + } + return _FALSE; +} + +void +bthci_ResetFlowSpec( + PADAPTER padapter, + u8 EntryNum, + u8 index + ) +{ + PBT30Info pBTinfo; + + + pBTinfo = GET_BT_INFO(padapter); + + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].BtLogLinkhandle = 0; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].BtPhyLinkhandle = 0; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].bLLCompleteEventIsSet = _FALSE; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].bLLCancelCMDIsSetandComplete = _FALSE; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].BtTxFlowSpecID = 0; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].TxPacketCount = 0; + + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Tx_Flow_Spec.Identifier = 0x01; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Tx_Flow_Spec.ServiceType = SERVICE_BEST_EFFORT; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Tx_Flow_Spec.MaximumSDUSize = 0xffff; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Tx_Flow_Spec.SDUInterArrivalTime = 0xffffffff; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Tx_Flow_Spec.AccessLatency = 0xffffffff; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Tx_Flow_Spec.FlushTimeout = 0xffffffff; + + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Rx_Flow_Spec.Identifier = 0x01; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Rx_Flow_Spec.ServiceType = SERVICE_BEST_EFFORT; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Rx_Flow_Spec.MaximumSDUSize = 0xffff; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Rx_Flow_Spec.SDUInterArrivalTime = 0xffffffff; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Rx_Flow_Spec.AccessLatency = 0xffffffff; + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[index].Rx_Flow_Spec.FlushTimeout = 0xffffffff; +} + +void bthci_ResetEntry(PADAPTER padapter, u8 EntryNum) +{ + PBT30Info pBTinfo; + PBT_MGNT pBtMgnt; + u8 j; + + + pBTinfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTinfo->BtMgnt; + + pBTinfo->BtAsocEntry[EntryNum].bUsed=_FALSE; + pBTinfo->BtAsocEntry[EntryNum].BtCurrentState=HCI_STATE_DISCONNECTED; + pBTinfo->BtAsocEntry[EntryNum].BtNextState=HCI_STATE_DISCONNECTED; + + pBTinfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocRemLen=0; + pBTinfo->BtAsocEntry[EntryNum].AmpAsocCmdData.BtPhyLinkhandle = 0; + if (pBTinfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocfragment != NULL) + { + _rtw_memset(pBTinfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocfragment, 0, TOTAL_ALLOCIATE_ASSOC_LEN); + } + pBTinfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar=0; + + pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyType = 0; + pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle = 0; + _rtw_memset(pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKey, 0, pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyLen); + pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyLen=0; + + pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.LinkSuperversionTimeout=0x3e80;//0x640; //0.625ms*1600=1000ms, 0.625ms*16000=10000ms + + pBTinfo->BtAsocEntry[EntryNum].AMPRole = AMP_BTAP_NONE; + + pBTinfo->BtAsocEntry[EntryNum].mAssoc=_FALSE; + pBTinfo->BtAsocEntry[EntryNum].b4waySuccess = _FALSE; + + // Reset BT WPA + pBTinfo->BtAsocEntry[EntryNum].KeyReplayCounter = 0; + pBTinfo->BtAsocEntry[EntryNum].BTWPAAuthState = STATE_WPA_AUTH_UNINITIALIZED; + + pBTinfo->BtAsocEntry[EntryNum].bSendSupervisionPacket=_FALSE; + pBTinfo->BtAsocEntry[EntryNum].NoRxPktCnt=0; + pBTinfo->BtAsocEntry[EntryNum].ShortRangeMode = 0; + pBTinfo->BtAsocEntry[EntryNum].rxSuvpPktCnt = 0; + + for (j=0; j<MAX_LOGICAL_LINK_NUM; j++) + { + bthci_ResetFlowSpec(padapter, EntryNum, j); + } + + pBtMgnt->BTAuthCount = 0; + pBtMgnt->BTAsocCount = 0; + pBtMgnt->BTCurrentConnectType = BT_DISCONNECT; + pBtMgnt->BTReceiveConnectPkt = BT_DISCONNECT; + + HALBT_RemoveKey(padapter, EntryNum); +} + +void +bthci_RemoveEntryByEntryNum( + PADAPTER padapter, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + bthci_ResetEntry(padapter, EntryNum); + + if (pBtMgnt->CurrentBTConnectionCnt>0) + pBtMgnt->CurrentBTConnectionCnt--; + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], CurrentBTConnectionCnt = %d!!\n", + pBtMgnt->CurrentBTConnectionCnt)); + + if (pBtMgnt->CurrentBTConnectionCnt > 0) + pBtMgnt->BtOperationOn = _TRUE; + else + { + pBtMgnt->BtOperationOn = _FALSE; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], Bt Operation OFF!!\n")); + } + + if (pBtMgnt->BtOperationOn == _FALSE) + { + PlatformCancelTimer(padapter, &pBTInfo->BTSupervisionPktTimer); +#if (SENDTXMEHTOD == 0) + PlatformCancelTimer(padapter, &pBTInfo->BTHCISendAclDataTimer); +#endif + PlatformCancelTimer(padapter, &pBTInfo->BTHCIDiscardAclDataTimer); + PlatformCancelTimer(padapter, &pBTInfo->BTBeaconTimer); + pBtMgnt->bStartSendSupervisionPkt = _FALSE; +#if (RTS_CTS_NO_LEN_LIMIT == 1) + rtw_write32(padapter, 0x4c8, 0xc140402); +#endif + } +} + +u8 +bthci_CommandCompleteHeader( + u8 *pbuf, + u16 OGF, + u16 OCF, + HCI_STATUS status + ) +{ + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)pbuf; + u8 NumHCI_Comm = 0x1; + + + PPacketIrpEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; + PPacketIrpEvent->Data[0] = NumHCI_Comm; //packet # + PPacketIrpEvent->Data[1] = HCIOPCODELOW(OCF, OGF); + PPacketIrpEvent->Data[2] = HCIOPCODEHIGHT(OCF, OGF); + + if (OGF == OGF_EXTENSION) + { + if (OCF == HCI_SET_RSSI_VALUE) + { + RTPRINT(FIOCTL,(IOCTL_BT_EVENT_PERIODICAL), ("[BT event], CommandComplete, Num_HCI_Comm = 0x%x, Opcode = 0x%02x%02x, status = 0x%x, OGF = 0x%x, OCF = 0x%x\n", + NumHCI_Comm,(HCIOPCODEHIGHT(OCF, OGF)), (HCIOPCODELOW(OCF, OGF)), status, OGF, OCF)); + } + else + { + RTPRINT(FIOCTL,(IOCTL_BT_HCICMD_EXT), ("[BT event], CommandComplete, Num_HCI_Comm = 0x%x, Opcode = 0x%02x%02x, status = 0x%x, OGF = 0x%x, OCF = 0x%x\n", + NumHCI_Comm,(HCIOPCODEHIGHT(OCF, OGF)), (HCIOPCODELOW(OCF, OGF)), status, OGF, OCF)); + } + } + else + { + RTPRINT(FIOCTL,(IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("[BT event], CommandComplete, Num_HCI_Comm = 0x%x, Opcode = 0x%02x%02x, status = 0x%x, OGF = 0x%x, OCF = 0x%x\n", + NumHCI_Comm,(HCIOPCODEHIGHT(OCF, OGF)), (HCIOPCODELOW(OCF, OGF)), status, OGF, OCF)); + } + return 3; +} + +u8 bthci_ExtensionEventHeader(u8 *pbuf, u8 extensionEvent) +{ + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)pbuf; + PPacketIrpEvent->EventCode = HCI_EVENT_EXTENSION_MOTO; + PPacketIrpEvent->Data[0] = extensionEvent; //extension event code + + return 1; +} + +u8 bthci_ExtensionEventHeaderRtk(u8 *pbuf, u8 extensionEvent) +{ + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)pbuf; + PPacketIrpEvent->EventCode = HCI_EVENT_EXTENSION_RTK; + PPacketIrpEvent->Data[0] = extensionEvent; //extension event code + + return 1; +} + +RT_STATUS +bthci_IndicateEvent( + PADAPTER padapter, + void *pEvntData, + u32 dataLen + ) +{ + RT_STATUS rt_status; + + rt_status = PlatformIndicateBTEvent(padapter, pEvntData, dataLen); + + return rt_status; +} + +void +bthci_EventWriteRemoteAmpAssoc( + PADAPTER padapter, + HCI_STATUS status, + u8 PLHandle + ) +{ + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_STATUS_PARAMETERS, + HCI_WRITE_REMOTE_AMP_ASSOC, + status); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("PhyLinkHandle = 0x%x, status = %d\n", PLHandle, status)); + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = PLHandle; + len += 2; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); +} + +void +bthci_EventEnhancedFlushComplete( + PADAPTER padapter, + u16 LLH + ) +{ + u8 localBuf[4] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("EventEnhancedFlushComplete, LLH = 0x%x\n", LLH)); + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_ENHANCED_FLUSH_COMPLETE; + PPacketIrpEvent->Length=2; + //Logical link handle + PPacketIrpEvent->Data[0] = TWOBYTE_LOWBYTE(LLH); + PPacketIrpEvent->Data[1] = TWOBYTE_HIGHTBYTE(LLH); + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 4); +} + +void +bthci_EventShortRangeModeChangeComplete( + PADAPTER padapter, + HCI_STATUS HciStatus, + u8 ShortRangeState, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 localBuf[5] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_SHORT_RANGE_MODE_CHANGE_COMPLETE)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Short Range Mode Change Complete, Ignore to send this event due to event mask page 2\n")); + return; + } + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Short Range Mode Change Complete, Status = %d\n , PLH = 0x%x\n, Short_Range_Mode_State = 0x%x\n", + HciStatus, pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle, ShortRangeState)); + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_SHORT_RANGE_MODE_CHANGE_COMPLETE; + PPacketIrpEvent->Length=3; + PPacketIrpEvent->Data[0] = HciStatus; + PPacketIrpEvent->Data[1] = pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle; + PPacketIrpEvent->Data[2] = ShortRangeState; + bthci_IndicateEvent(padapter, PPacketIrpEvent, 5); +} + +void +bthci_EventSendFlowSpecModifyComplete( + PADAPTER padapter, + HCI_STATUS HciStatus, + u16 logicHandle + ) +{ + u8 localBuf[5] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_FLOW_SPEC_MODIFY_COMPLETE)) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("[BT event], Flow Spec Modify Complete, Ignore to send this event due to event mask page 2\n")); + return; + } + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("[BT event], Flow Spec Modify Complete, status = 0x%x, LLH = 0x%x\n",HciStatus,logicHandle)); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_FLOW_SPEC_MODIFY_COMPLETE; + PPacketIrpEvent->Length=3; + + PPacketIrpEvent->Data[0] = HciStatus; + //Logical link handle + PPacketIrpEvent->Data[1] = TWOBYTE_LOWBYTE(logicHandle); + PPacketIrpEvent->Data[2] = TWOBYTE_HIGHTBYTE(logicHandle); + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 5); +} + +void +bthci_EventExtGetBTRSSI( + PADAPTER padapter, + u16 ConnectionHandle + ) +{ + u8 len = 0; + u8 localBuf[7] = ""; + u8 *pRetPar; + u16 *pu2Temp; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_ExtensionEventHeader(&localBuf[0], + HCI_EVENT_GET_BT_RSSI); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pu2Temp = (u16*)&pRetPar[0]; + *pu2Temp = ConnectionHandle; + len += 2; + + PPacketIrpEvent->Length = len; + if (bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2) == RT_STATUS_SUCCESS) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT_PERIODICAL, ("[BT event], Get BT RSSI, Connection Handle = 0x%x, Extension event code = 0x%x\n", + ConnectionHandle, HCI_EVENT_GET_BT_RSSI)); + } +} + +void +bthci_EventExtWifiScanNotify( + PADAPTER padapter, + u8 scanType + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 len = 0; + u8 localBuf[7] = ""; + u8 *pRetPar; + u8 *pu1Temp; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + if (!pBtMgnt->BtOperationOn) + return; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_ExtensionEventHeaderRtk(&localBuf[0], HCI_EVENT_EXT_WIFI_SCAN_NOTIFY); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pu1Temp = (u8*)&pRetPar[0]; + *pu1Temp = scanType; + len += 1; + + PPacketIrpEvent->Length = len; + + if (bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2) == RT_STATUS_SUCCESS) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Wifi scan notify, scan type = %d\n", + scanType)); + } +} + + +void +bthci_EventAMPReceiverReport( + PADAPTER padapter, + u8 Reason + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + if (pBtHciInfo->bTestNeedReport) + { + u8 localBuf[20] = ""; + u32 *pu4Temp; + u16 *pu2Temp; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), (" HCI_EVENT_AMP_RECEIVER_REPORT \n")); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode = HCI_EVENT_AMP_RECEIVER_REPORT; + PPacketIrpEvent->Length = 2; + + PPacketIrpEvent->Data[0] = pBtHciInfo->TestCtrType; + + PPacketIrpEvent->Data[1] =Reason; + + pu4Temp = (u32*)&PPacketIrpEvent->Data[2]; + *pu4Temp = pBtHciInfo->TestEventType; + + pu2Temp = (u16*)&PPacketIrpEvent->Data[6]; + *pu2Temp = pBtHciInfo->TestNumOfFrame; + + pu2Temp = (u16*)&PPacketIrpEvent->Data[8]; + *pu2Temp = pBtHciInfo->TestNumOfErrFrame; + + pu4Temp = (u32*)&PPacketIrpEvent->Data[10]; + *pu4Temp = pBtHciInfo->TestNumOfBits; + + pu4Temp = (u32*)&PPacketIrpEvent->Data[14]; + *pu4Temp = pBtHciInfo->TestNumOfErrBits; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 20); + + //Return to Idel state with RX and TX off. + + } + + pBtHciInfo->TestNumOfFrame = 0x00; +} + +void +bthci_EventChannelSelected( + PADAPTER padapter, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 localBuf[3] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_CHANNEL_SELECT)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Channel Selected, Ignore to send this event due to event mask page 2\n")); + return; + } + + RTPRINT(FIOCTL, IOCTL_BT_EVENT|IOCTL_STATE, ("[BT event], Channel Selected, PhyLinkHandle %d\n", + pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle)); + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_CHANNEL_SELECT; + PPacketIrpEvent->Length=1; + PPacketIrpEvent->Data[0] = pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle; + bthci_IndicateEvent(padapter, PPacketIrpEvent, 3); +} + +void +bthci_EventDisconnectPhyLinkComplete( + PADAPTER padapter, + HCI_STATUS HciStatus, + HCI_STATUS Reason, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 localBuf[5] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_DISCONNECT_PHY_LINK_COMPLETE)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Disconnect Physical Link Complete, Ignore to send this event due to event mask page 2\n")); + return; + } + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Disconnect Physical Link Complete, Status = 0x%x, PLH = 0x%x Reason =0x%x\n", + HciStatus,pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle,Reason)); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_DISCONNECT_PHY_LINK_COMPLETE; + PPacketIrpEvent->Length=3; + PPacketIrpEvent->Data[0] = HciStatus; + PPacketIrpEvent->Data[1] = pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle; + PPacketIrpEvent->Data[2] = Reason; + bthci_IndicateEvent(padapter, PPacketIrpEvent, 5); +} + +void +bthci_EventPhysicalLinkComplete( + PADAPTER padapter, + HCI_STATUS HciStatus, + u8 EntryNum, + u8 PLHandle + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + PBT_DBG pBtDbg=&pBTInfo->BtDbg; + u8 localBuf[4] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u8 PL_handle; + + pBtMgnt->bPhyLinkInProgress = _FALSE; + pBtDbg->dbgHciInfo.hciCmdPhyLinkStatus = HciStatus; + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_PHY_LINK_COMPLETE)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Physical Link Complete, Ignore to send this event due to event mask page 2\n")); + return; + } + + if (EntryNum == 0xff) + { + // connection not started yet, just use the input physical link handle to response. + PL_handle = PLHandle; + } + else + { + // connection is under progress, use the phy link handle we recorded. + PL_handle = pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle; + pBTInfo->BtAsocEntry[EntryNum].bNeedPhysLinkCompleteEvent=_FALSE; + } + + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Physical Link Complete, Status = 0x%x PhyLinkHandle = 0x%x\n",HciStatus, + PL_handle)); + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_PHY_LINK_COMPLETE; + PPacketIrpEvent->Length=2; + + PPacketIrpEvent->Data[0] = HciStatus; + PPacketIrpEvent->Data[1] = PL_handle; + bthci_IndicateEvent(padapter, PPacketIrpEvent, 4); + +} + +void +bthci_EventCommandStatus( + PADAPTER padapter, + u8 OGF, + u16 OCF, + HCI_STATUS HciStatus + ) +{ + + u8 localBuf[6] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u8 Num_Hci_Comm = 0x1; + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], CommandStatus, Opcode = 0x%02x%02x, OGF=0x%x, OCF=0x%x, Status = 0x%x, Num_HCI_COMM = 0x%x\n", + (HCIOPCODEHIGHT(OCF, OGF)), (HCIOPCODELOW(OCF, OGF)), OGF, OCF, HciStatus,Num_Hci_Comm)); + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_COMMAND_STATUS; + PPacketIrpEvent->Length=4; + PPacketIrpEvent->Data[0] = HciStatus; //current pending + PPacketIrpEvent->Data[1] = Num_Hci_Comm; //packet # + PPacketIrpEvent->Data[2] = HCIOPCODELOW(OCF, OGF); + PPacketIrpEvent->Data[3] = HCIOPCODEHIGHT(OCF, OGF); + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 6); + +} + +void +bthci_EventLogicalLinkComplete( + PADAPTER padapter, + HCI_STATUS HciStatus, + u8 PhyLinkHandle, + u16 LogLinkHandle, + u8 LogLinkIndex, + u8 EntryNum + ) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 localBuf[7] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_LOGICAL_LINK_COMPLETE)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Logical Link Complete, Ignore to send this event due to event mask page 2\n")); + return; + } + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Logical Link Complete, PhyLinkHandle = 0x%x, LogLinkHandle = 0x%x, Status= 0x%x\n", + PhyLinkHandle, LogLinkHandle, HciStatus)); + + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode = HCI_EVENT_LOGICAL_LINK_COMPLETE; + PPacketIrpEvent->Length = 5; + + PPacketIrpEvent->Data[0] = HciStatus;//status code + //Logical link handle + PPacketIrpEvent->Data[1] = TWOBYTE_LOWBYTE(LogLinkHandle); + PPacketIrpEvent->Data[2] = TWOBYTE_HIGHTBYTE(LogLinkHandle); + //Physical link handle + PPacketIrpEvent->Data[3] = TWOBYTE_LOWBYTE(PhyLinkHandle); + //corresponding Tx flow spec ID + if (HciStatus == HCI_STATUS_SUCCESS) + { + PPacketIrpEvent->Data[4] = + pBTInfo->BtAsocEntry[EntryNum].LogLinkCmdData[LogLinkIndex].Tx_Flow_Spec.Identifier; + } + else + PPacketIrpEvent->Data[4] = 0x0; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 7); +} + +void +bthci_EventDisconnectLogicalLinkComplete( + PADAPTER padapter, + HCI_STATUS HciStatus, + u16 LogLinkHandle, + HCI_STATUS Reason + ) +{ + u8 localBuf[6] = ""; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_DISCONNECT_LOGICAL_LINK_COMPLETE)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Disconnect Logical Link Complete, Ignore to send this event due to event mask page 2\n")); + return; + } + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Disconnect Logical Link Complete, Status = 0x%x,LLH = 0x%x Reason =0x%x\n",HciStatus,LogLinkHandle,Reason)); + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_DISCONNECT_LOGICAL_LINK_COMPLETE; + PPacketIrpEvent->Length=4; + + PPacketIrpEvent->Data[0] = HciStatus; + //Logical link handle + PPacketIrpEvent->Data[1] = TWOBYTE_LOWBYTE(LogLinkHandle); + PPacketIrpEvent->Data[2] = TWOBYTE_HIGHTBYTE(LogLinkHandle); + //Disconnect reason + PPacketIrpEvent->Data[3] = Reason; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 6); +} + +void +bthci_EventFlushOccurred( + PADAPTER padapter, + u16 LogLinkHandle + ) +{ + u8 localBuf[4] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("bthci_EventFlushOccurred(), LLH = 0x%x\n", LogLinkHandle)); + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode = HCI_EVENT_FLUSH_OCCRUED; + PPacketIrpEvent->Length = 2; + //Logical link handle + PPacketIrpEvent->Data[0] = TWOBYTE_LOWBYTE(LogLinkHandle); + PPacketIrpEvent->Data[1] = TWOBYTE_HIGHTBYTE(LogLinkHandle); + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 4); +} + +HCI_STATUS +bthci_BuildPhysicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd, + u16 OCF +) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 EntryNum, PLH; + + //Send HCI Command status event to AMP. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + OCF, + HCI_STATUS_SUCCESS); + + PLH = *((u8*)pHciCmd->Data); + + // Check if resource or bt connection is under progress, if yes, reject the link creation. + if (bthci_AddEntry(padapter) == _FALSE) + { + status = HCI_STATUS_CONNECT_RJT_LIMIT_RESOURCE; + bthci_EventPhysicalLinkComplete(padapter, status, INVALID_ENTRY_NUM, PLH); + return status; + } + + EntryNum=pBtMgnt->CurrentConnectEntryNum; + pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle = PLH; + pBtMgnt->BtCurrentPhyLinkhandle = PLH; + + if (pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.AMPAssocfragment == NULL) + { + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Create/Accept PhysicalLink, AMP controller is busy\n")); + status = HCI_STATUS_CONTROLLER_BUSY; + bthci_EventPhysicalLinkComplete(padapter, status, INVALID_ENTRY_NUM, PLH); + return status; + } + + // Record Key and the info + pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyLen=(*((u8*)pHciCmd->Data+1)); + pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyType=(*((u8*)pHciCmd->Data+2)); + _rtw_memcpy(pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKey, + (((u8*)pHciCmd->Data+3)), pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyLen); +#if (LOCAL_PMK == 1) + _rtw_memcpy(pBTInfo->BtAsocEntry[EntryNum].PMK, testPMK, PMK_LEN); +#else + _rtw_memcpy(pBTInfo->BtAsocEntry[EntryNum].PMK, pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKey, PMK_LEN); +#endif + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("BuildPhysicalLink, EntryNum = %d, PLH = 0x%x KeyLen = 0x%x, KeyType =0x%x\n", + EntryNum, pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyLen, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyType)); + RTPRINT_DATA(FIOCTL, (IOCTL_BT_LOGO|IOCTL_BT_HCICMD), ("BtAMPKey\n"), pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKey, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtAMPKeyLen); + RTPRINT_DATA(FIOCTL, (IOCTL_BT_LOGO|IOCTL_BT_HCICMD), ("PMK\n"), pBTInfo->BtAsocEntry[EntryNum].PMK, + PMK_LEN); + + if (OCF == HCI_CREATE_PHYSICAL_LINK) + { + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_DISCONNECTED, STATE_CMD_CREATE_PHY_LINK, EntryNum); + } + else if (OCF == HCI_ACCEPT_PHYSICAL_LINK) + { + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_DISCONNECTED, STATE_CMD_ACCEPT_PHY_LINK, EntryNum); + } + + return status; +} + +void +bthci_BuildLogicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd, + u16 OCF + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTinfo->BtMgnt; + u8 PhyLinkHandle, EntryNum; + static u16 AssignLogHandle = 1; + + HCI_FLOW_SPEC TxFlowSpec; + HCI_FLOW_SPEC RxFlowSpec; + u32 MaxSDUSize, ArriveTime, Bandwidth; + + PhyLinkHandle = *((u8*)pHciCmd->Data); + + EntryNum = bthci_GetCurrentEntryNum(padapter, PhyLinkHandle); + + _rtw_memcpy(&TxFlowSpec, + &pHciCmd->Data[1], sizeof(HCI_FLOW_SPEC)); + _rtw_memcpy(&RxFlowSpec, + &pHciCmd->Data[17], sizeof(HCI_FLOW_SPEC)); + +#if 0 //for logo special test case only + if (i==0) + { + bthci_SelectFlowType(padapter,BT_TX_BE_FS,BT_RX_BE_FS,&TxFlowSpec,&RxFlowSpec); + i=1; + } + else if (i==1) + { + bthci_SelectFlowType(padapter,BT_TX_GU_FS,BT_RX_GU_FS,&TxFlowSpec,&RxFlowSpec); + i=0; + } +#endif + + MaxSDUSize = TxFlowSpec.MaximumSDUSize; + ArriveTime = TxFlowSpec.SDUInterArrivalTime; + + if (bthci_CheckLogLinkBehavior(padapter, TxFlowSpec)&& bthci_CheckLogLinkBehavior(padapter, RxFlowSpec)) + { + Bandwidth = BTTOTALBANDWIDTH; + } + else if (MaxSDUSize==0xffff && ArriveTime==0xffffffff) + { + Bandwidth = BTTOTALBANDWIDTH; + } + else + { + Bandwidth = MaxSDUSize*8*1000/(ArriveTime+244); + } + +#if 0 + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("BuildLogicalLink, PhyLinkHandle = 0x%x, MaximumSDUSize = 0x%lx, SDUInterArrivalTime = 0x%lx, Bandwidth=0x%lx\n", + PhyLinkHandle, MaxSDUSize,ArriveTime, Bandwidth)); +#else + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("BuildLogicalLink, PhyLinkHandle=0x%x, MaximumSDUSize=0x%x, SDUInterArrivalTime=0x%x, Bandwidth=0x%x\n", + PhyLinkHandle, MaxSDUSize, ArriveTime, Bandwidth)); +#endif + + if (EntryNum == 0xff) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Invalid Physical Link handle = 0x%x, status=HCI_STATUS_UNKNOW_CONNECT_ID, return\n", PhyLinkHandle)); + status = HCI_STATUS_UNKNOW_CONNECT_ID; + + //When we receive Create/Accept logical link command, we should send command status event first. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + OCF, + status); + return; + } + + if (pBtMgnt->bLogLinkInProgress == _FALSE) + { + if (bthci_PhyLinkConnectionInProgress(padapter, PhyLinkHandle)) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Physical link connection in progress, status=HCI_STATUS_CMD_DISALLOW, return\n")); + status = HCI_STATUS_CMD_DISALLOW; + + pBtMgnt->bPhyLinkInProgressStartLL = _TRUE; + //When we receive Create/Accept logical link command, we should send command status event first. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + OCF, + status); + + return; + } + + if (Bandwidth > BTTOTALBANDWIDTH)//BTTOTALBANDWIDTH + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("status=HCI_STATUS_QOS_REJECT, Bandwidth=0x%x, return\n", Bandwidth)); + status = HCI_STATUS_QOS_REJECT; + + //When we receive Create/Accept logical link command, we should send command status event first. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + OCF, + status); + } + else + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("status=HCI_STATUS_SUCCESS\n")); + status = HCI_STATUS_SUCCESS; + + //When we receive Create/Accept logical link command, we should send command status event first. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + OCF, + status); + +#if 0// special logo test case only + bthci_FakeCommand(padapter, OGF_LINK_CONTROL_COMMANDS, HCI_LOGICAL_LINK_CANCEL); +#endif + } + + if (pBTinfo->BtAsocEntry[EntryNum].BtCurrentState != HCI_STATE_CONNECTED) + { + bthci_EventLogicalLinkComplete(padapter, + HCI_STATUS_CMD_DISALLOW, 0, 0, 0,EntryNum); + } + else + { + u8 i, find=0; + + pBtMgnt->bLogLinkInProgress = _TRUE; + + // find an unused logical link index and copy the data + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].BtLogLinkhandle == 0) + { + HCI_STATUS LogCompEventstatus = HCI_STATUS_SUCCESS; + + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].BtPhyLinkhandle = *((u8*)pHciCmd->Data); + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].BtLogLinkhandle = AssignLogHandle; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("BuildLogicalLink, EntryNum = %d, physical link handle = 0x%x, logical link handle = 0x%x\n", + EntryNum, pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle, + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].BtLogLinkhandle)); + _rtw_memcpy(&pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].Tx_Flow_Spec, + &TxFlowSpec, sizeof(HCI_FLOW_SPEC)); + _rtw_memcpy(&pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].Rx_Flow_Spec, + &RxFlowSpec, sizeof(HCI_FLOW_SPEC)); + + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].bLLCompleteEventIsSet=_FALSE; + + if (pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].bLLCancelCMDIsSetandComplete) + { + LogCompEventstatus = HCI_STATUS_UNKNOW_CONNECT_ID; + } + bthci_EventLogicalLinkComplete(padapter, + LogCompEventstatus, + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].BtPhyLinkhandle, + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].BtLogLinkhandle, i,EntryNum); + + pBTinfo->BtAsocEntry[EntryNum].LogLinkCmdData[i].bLLCompleteEventIsSet = _TRUE; + + find = 1; + pBtMgnt->BtCurrentLogLinkhandle = AssignLogHandle; + AssignLogHandle++; + break; + } + } + + if (!find) + { + bthci_EventLogicalLinkComplete(padapter, + HCI_STATUS_CONNECT_RJT_LIMIT_RESOURCE, 0, 0, 0,EntryNum); + } + pBtMgnt->bLogLinkInProgress = _FALSE; + } + } + else + { + bthci_EventLogicalLinkComplete(padapter, + HCI_STATUS_CONTROLLER_BUSY, 0, 0, 0,EntryNum); + } + +#if 0// special logo test case only + bthci_FakeCommand(padapter, OGF_LINK_CONTROL_COMMANDS, HCI_LOGICAL_LINK_CANCEL); +#endif +} + +void +bthci_StartBeaconAndConnect( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd, + u8 CurrentAssocNum + ) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("StartBeaconAndConnect, CurrentAssocNum=%d, AMPRole=%d\n", + CurrentAssocNum, + pBTInfo->BtAsocEntry[CurrentAssocNum].AMPRole)); + + if (pBtMgnt->CheckChnlIsSuit == _FALSE) + { + bthci_EventPhysicalLinkComplete(padapter, HCI_STATUS_CONNECT_REJ_NOT_SUIT_CHNL_FOUND, CurrentAssocNum, INVALID_PL_HANDLE); + bthci_RemoveEntryByEntryNum(padapter, CurrentAssocNum); + return; + } + + { + if (pBTInfo->BtAsocEntry[CurrentAssocNum].AMPRole == AMP_BTAP_CREATOR) + { + rsprintf((char*)pBTInfo->BtAsocEntry[CurrentAssocNum].BTSsidBuf,32,"AMP-%02x-%02x-%02x-%02x-%02x-%02x", +#if 0 + padapter->PermanentAddress[0], + padapter->PermanentAddress[1], + padapter->PermanentAddress[2], + padapter->PermanentAddress[3], + padapter->PermanentAddress[4], + padapter->PermanentAddress[5]); +#else + padapter->eeprompriv.mac_addr[0], + padapter->eeprompriv.mac_addr[1], + padapter->eeprompriv.mac_addr[2], + padapter->eeprompriv.mac_addr[3], + padapter->eeprompriv.mac_addr[4], + padapter->eeprompriv.mac_addr[5]); +#endif + } + else if (pBTInfo->BtAsocEntry[CurrentAssocNum].AMPRole == AMP_BTAP_JOINER) + { + rsprintf((char*)pBTInfo->BtAsocEntry[CurrentAssocNum].BTSsidBuf,32,"AMP-%02x-%02x-%02x-%02x-%02x-%02x", + pBTInfo->BtAsocEntry[CurrentAssocNum].BTRemoteMACAddr[0], + pBTInfo->BtAsocEntry[CurrentAssocNum].BTRemoteMACAddr[1], + pBTInfo->BtAsocEntry[CurrentAssocNum].BTRemoteMACAddr[2], + pBTInfo->BtAsocEntry[CurrentAssocNum].BTRemoteMACAddr[3], + pBTInfo->BtAsocEntry[CurrentAssocNum].BTRemoteMACAddr[4], + pBTInfo->BtAsocEntry[CurrentAssocNum].BTRemoteMACAddr[5]); + } + + FillOctetString(pBTInfo->BtAsocEntry[CurrentAssocNum].BTSsid, pBTInfo->BtAsocEntry[CurrentAssocNum].BTSsidBuf, 21); + pBTInfo->BtAsocEntry[CurrentAssocNum].BTSsid.Length = 21; + + //To avoid set the start ap or connect twice, or the original connection will be disconnected. + if (!pBtMgnt->bBTConnectInProgress) + { + pBtMgnt->bBTConnectInProgress=_TRUE; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], BT Connect in progress ON!!\n")); + BTHCI_SM_WITH_INFO(padapter,HCI_STATE_STARTING,STATE_CMD_MAC_START_COMPLETE,CurrentAssocNum); + +#if 0 //for logo special test case only + bthci_BuildLogicalLink(padapter, pHciCmd, HCI_CREATE_LOGICAL_LINK); +#endif + + // 20100325 Joseph: Check RF ON/OFF. + // If RF OFF, it reschedule connecting operation after 50ms. + if (!bthci_CheckRfStateBeforeConnect(padapter)) + return; + + if (pBTInfo->BtAsocEntry[CurrentAssocNum].AMPRole == AMP_BTAP_CREATOR) + { +// BTPKT_StartBeacon(padapter, CurrentAssocNum); // not implement yet + BTHCI_SM_WITH_INFO(padapter,HCI_STATE_CONNECTING,STATE_CMD_MAC_CONNECT_COMPLETE,CurrentAssocNum); + } + else if (pBTInfo->BtAsocEntry[CurrentAssocNum].AMPRole == AMP_BTAP_JOINER) + { + bthci_ResponderStartToScan(padapter); + } + } + RT_PRINT_STR(_module_rtl871x_mlme_c_, _drv_notice_, "StartBeaconAndConnect, SSID:\n", pBTInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].BTSsid.Octet, pBTInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].BTSsid.Length); + } +} + +void bthci_ResetBtMgnt(PBT_MGNT pBtMgnt) +{ + pBtMgnt->BtOperationOn = _FALSE; + pBtMgnt->bBTConnectInProgress = _FALSE; + pBtMgnt->bLogLinkInProgress = _FALSE; + pBtMgnt->bPhyLinkInProgress = _FALSE; + pBtMgnt->bPhyLinkInProgressStartLL = _FALSE; + pBtMgnt->DisconnectEntryNum = 0xff; + pBtMgnt->bStartSendSupervisionPkt = _FALSE; + pBtMgnt->JoinerNeedSendAuth = _FALSE; + pBtMgnt->CurrentBTConnectionCnt = 0; + pBtMgnt->BTCurrentConnectType = BT_DISCONNECT; + pBtMgnt->BTReceiveConnectPkt = BT_DISCONNECT; + pBtMgnt->BTAuthCount = 0; + pBtMgnt->btLogoTest = 0; +} + +void bthci_ResetBtHciInfo(PBT_HCI_INFO pBtHciInfo) +{ + pBtHciInfo->BTEventMask = 0; + pBtHciInfo->BTEventMaskPage2 = 0; + pBtHciInfo->ConnAcceptTimeout = 10000; + pBtHciInfo->PageTimeout = 0x30; + pBtHciInfo->LocationDomainAware = 0x0; + pBtHciInfo->LocationDomain = 0x5858; + pBtHciInfo->LocationDomainOptions = 0x58; + pBtHciInfo->LocationOptions = 0x0; + pBtHciInfo->FlowControlMode = 0x1; // 0:Packet based data flow control mode(BR/EDR), 1: Data block based data flow control mode(AMP). + + pBtHciInfo->enFlush_LLH = 0; + pBtHciInfo->FLTO_LLH = 0; + + //Test command only + pBtHciInfo->bTestIsEnd = _TRUE; + pBtHciInfo->bInTestMode = _FALSE; + pBtHciInfo->bTestNeedReport = _FALSE; + pBtHciInfo->TestScenario = 0xff; + pBtHciInfo->TestReportInterval = 0x01; + pBtHciInfo->TestCtrType = 0x5d; + pBtHciInfo->TestEventType = 0x00; + pBtHciInfo->TestNumOfFrame = 0; + pBtHciInfo->TestNumOfErrFrame = 0; + pBtHciInfo->TestNumOfBits = 0; + pBtHciInfo->TestNumOfErrBits = 0; +} + +void bthci_ResetBtSec(PADAPTER padapter, PBT_SECURITY pBtSec) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + + // Set BT used HW or SW encrypt !! + if (GET_HAL_DATA(padapter)->bBTMode) + pBtSec->bUsedHwEncrypt = _TRUE; + else + pBtSec->bUsedHwEncrypt = _FALSE; + RT_TRACE(_module_rtl871x_security_c_, _drv_info_, ("%s: bUsedHwEncrypt=%d\n", __FUNCTION__, pBtSec->bUsedHwEncrypt)); + + pBtSec->RSNIE.Octet = pBtSec->RSNIEBuf; +} + +void bthci_ResetBtExtInfo(PBT_MGNT pBtMgnt) +{ + u8 i; + + for (i=0; i<MAX_BT_ASOC_ENTRY_NUM; i++) + { + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle = 0; + pBtMgnt->ExtConfig.linkInfo[i].IncomingTrafficMode = 0; + pBtMgnt->ExtConfig.linkInfo[i].OutgoingTrafficMode = 0; + pBtMgnt->ExtConfig.linkInfo[i].BTProfile = BT_PROFILE_NONE; + pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec = BT_SPEC_2_1_EDR; + pBtMgnt->ExtConfig.linkInfo[i].BT_RSSI = 0; + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = BT_PROFILE_NONE; + pBtMgnt->ExtConfig.linkInfo[i].linkRole = BT_LINK_MASTER; + } + + pBtMgnt->ExtConfig.CurrentConnectHandle = 0; + pBtMgnt->ExtConfig.CurrentIncomingTrafficMode = 0; + pBtMgnt->ExtConfig.CurrentOutgoingTrafficMode = 0; + pBtMgnt->ExtConfig.MIN_BT_RSSI = 0; + pBtMgnt->ExtConfig.NumberOfHandle = 0; + pBtMgnt->ExtConfig.NumberOfSCO = 0; + pBtMgnt->ExtConfig.CurrentBTStatus = 0; + pBtMgnt->ExtConfig.HCIExtensionVer = 0; + + pBtMgnt->ExtConfig.bManualControl = _FALSE; + pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pBtMgnt->ExtConfig.bBTA2DPBusy = _FALSE; +} + +HCI_STATUS bthci_CmdReset(PADAPTER _padapter, u8 bNeedSendEvent) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PADAPTER padapter; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_HCI_INFO pBtHciInfo; + PBT_SECURITY pBtSec; + PBT_DBG pBtDbg; + u8 i; + + + RTPRINT(FIOCTL,IOCTL_BT_HCICMD, ("bthci_CmdReset()\n")); + + padapter = GetDefaultAdapter(_padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtHciInfo = &pBTInfo->BtHciInfo; + pBtSec = &pBTInfo->BtSec; + pBtDbg = &pBTInfo->BtDbg; + + pBTInfo->padapter = padapter; + + for (i=0; i<MAX_BT_ASOC_ENTRY_NUM; i++) + { + bthci_ResetEntry(padapter, i); + } + + bthci_ResetBtMgnt(pBtMgnt); + bthci_ResetBtHciInfo(pBtHciInfo); + bthci_ResetBtSec(padapter, pBtSec); + + pBtMgnt->BTChannel = BT_Default_Chnl; + pBtMgnt->CheckChnlIsSuit = _TRUE; + + pBTInfo->BTBeaconTmrOn = _FALSE; +// QosInitializeBssDesc(&pBtMgnt->bssDesc.BssQos); // not implement yet + + pBtMgnt->bCreateSpportQos=_TRUE; + + PlatformCancelTimer(padapter, &pBTInfo->BTSupervisionPktTimer); +#if (SENDTXMEHTOD == 0) + PlatformCancelTimer(padapter, &pBTInfo->BTHCISendAclDataTimer); +#endif + PlatformCancelTimer(padapter, &pBTInfo->BTHCIDiscardAclDataTimer); + PlatformCancelTimer(padapter, &pBTInfo->BTBeaconTimer); + + HALBT_SetRtsCtsNoLenLimit(padapter); + // + // Maybe we need to take care Group != AES case !! + // now we Pairwise and Group all used AES !! +// BTPKT_ConstructRSNIE(padapter); // not implement yet + + bthci_ResetBtExtInfo(pBtMgnt); + + //send command complete event here when all data are received. + if (bNeedSendEvent) + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_RESET, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdWriteRemoteAMPAssoc( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 CurrentAssocNum; + u8 PhyLinkHandle; + + pBtDbg->dbgHciInfo.hciCmdCntWriteRemoteAmpAssoc++; + PhyLinkHandle = *((u8*)pHciCmd->Data); + CurrentAssocNum = bthci_GetCurrentEntryNum(padapter, PhyLinkHandle); + + if (CurrentAssocNum == 0xff) + { + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("WriteRemoteAMPAssoc, No such Handle in the Entry\n")); + status = HCI_STATUS_UNKNOW_CONNECT_ID; + bthci_EventWriteRemoteAmpAssoc(padapter, status, PhyLinkHandle); + return status; + } + + if (pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocfragment == NULL) + { + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("WriteRemoteAMPAssoc, AMP controller is busy\n")); + status = HCI_STATUS_CONTROLLER_BUSY; + bthci_EventWriteRemoteAmpAssoc(padapter, status, PhyLinkHandle); + return status; + } + + pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.BtPhyLinkhandle = PhyLinkHandle;//*((u8*)pHciCmd->Data); + pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.LenSoFar = *((u16*)((u8*)pHciCmd->Data+1)); + pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocRemLen = *((u16*)((u8*)pHciCmd->Data+3)); + + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("WriteRemoteAMPAssoc, LenSoFar= 0x%x, AssocRemLen= 0x%x\n", + pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.LenSoFar,pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocRemLen)); + + RTPRINT_DATA(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("WriteRemoteAMPAssoc fragment \n"), pHciCmd->Data,pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocRemLen+5); + if ((pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocRemLen) > MAX_AMP_ASSOC_FRAG_LEN) + { + _rtw_memcpy(((u8*)pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocfragment+(pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.LenSoFar*(sizeof(u8)))), + (u8*)pHciCmd->Data+5, + MAX_AMP_ASSOC_FRAG_LEN); + } + else + { + _rtw_memcpy((u8*)(pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocfragment)+(pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.LenSoFar*(sizeof(u8))), + ((u8*)pHciCmd->Data+5), + (pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocRemLen)); + + RTPRINT_DATA(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), "WriteRemoteAMPAssoc :\n", + pHciCmd->Data+5, pBTInfo->BtAsocEntry[CurrentAssocNum].AmpAsocCmdData.AMPAssocRemLen); + + if (!bthci_GetAssocInfo(padapter, CurrentAssocNum)) + status=HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE; + + bthci_EventWriteRemoteAmpAssoc(padapter, status, PhyLinkHandle); + + bthci_StartBeaconAndConnect(padapter,pHciCmd,CurrentAssocNum); + } + + return status; +} + +//7.3.13 +HCI_STATUS bthci_CmdReadConnectionAcceptTimeout(PADAPTER padapter) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_READ_CONNECTION_ACCEPT_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pu2Temp = (u16*)&pRetPar[1]; // Conn_Accept_Timeout + *pu2Temp = pBtHciInfo->ConnAcceptTimeout; + len += 3; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +//7.3.3 +HCI_STATUS +bthci_CmdSetEventFilter( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + return status; +} + +//7.3.14 +HCI_STATUS +bthci_CmdWriteConnectionAcceptTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u16 *pu2Temp; + + pu2Temp = (u16*)&pHciCmd->Data[0]; + pBtHciInfo->ConnAcceptTimeout = *pu2Temp; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("ConnAcceptTimeout = 0x%x", + pBtHciInfo->ConnAcceptTimeout)); + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_WRITE_CONNECTION_ACCEPT_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdReadPageTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_READ_PAGE_TIMEOUT, + status); + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Read PageTimeout = 0x%x\n", pBtHciInfo->PageTimeout)); + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pu2Temp = (u16*)&pRetPar[1]; // Page_Timeout + *pu2Temp = pBtHciInfo->PageTimeout; + len+=3; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdWritePageTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u16 *pu2Temp; + + pu2Temp = (u16*)&pHciCmd->Data[0]; + pBtHciInfo->PageTimeout = *pu2Temp; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Write PageTimeout = 0x%x\n", + pBtHciInfo->PageTimeout)); + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_WRITE_PAGE_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdReadLinkSupervisionTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + u8 physicalLinkHandle, EntryNum; + + physicalLinkHandle = *((u8*)pHciCmd->Data); + + EntryNum = bthci_GetCurrentEntryNum(padapter, physicalLinkHandle); + + if (EntryNum == 0xff) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("ReadLinkSupervisionTimeout, No such Handle in the Entry\n")); + status = HCI_STATUS_UNKNOW_CONNECT_ID; + return status; + } + + if (pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle != physicalLinkHandle) + status = HCI_STATUS_UNKNOW_CONNECT_ID; + + { + u8 localBuf[10] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_READ_LINK_SUPERVISION_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + pRetPar[1] = pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle; + pRetPar[2] = 0; + pu2Temp = (u16*)&pRetPar[3]; // Conn_Accept_Timeout + *pu2Temp = pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.LinkSuperversionTimeout; + len += 5; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdWriteLinkSupervisionTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + u8 physicalLinkHandle, EntryNum; + + physicalLinkHandle = *((u8*)pHciCmd->Data); + + EntryNum = bthci_GetCurrentEntryNum(padapter, physicalLinkHandle); + + if (EntryNum == 0xff) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("WriteLinkSupervisionTimeout, No such Handle in the Entry\n")); + status=HCI_STATUS_UNKNOW_CONNECT_ID; + } + else + { + if (pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle != physicalLinkHandle) + status = HCI_STATUS_UNKNOW_CONNECT_ID; + else + { + pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.LinkSuperversionTimeout=*((u16 *)(((u8*)pHciCmd->Data)+2)); + RTPRINT(FIOCTL, IOCTL_STATE, ("BT Write LinkSuperversionTimeout[%d] = 0x%x\n", + EntryNum, pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.LinkSuperversionTimeout)); + } + } + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_WRITE_LINK_SUPERVISION_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + pRetPar[1] = pBTinfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle; + pRetPar[2] = 0; + len += 3; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdEnhancedFlush( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTinfo->BtHciInfo; + u16 logicHandle; + u8 Packet_Type; + + logicHandle = *((u16*)&pHciCmd->Data[0]); + Packet_Type = pHciCmd->Data[2]; + + if (Packet_Type != 0) + { + status = HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE; + } + else + pBtHciInfo->enFlush_LLH = logicHandle; + + if (bthci_DiscardTxPackets(padapter, pBtHciInfo->enFlush_LLH)) + { + bthci_EventFlushOccurred(padapter, pBtHciInfo->enFlush_LLH); + } + + // should send command status event + bthci_EventCommandStatus(padapter, + OGF_SET_EVENT_MASK_COMMAND, + HCI_ENHANCED_FLUSH, + status); + + if (pBtHciInfo->enFlush_LLH) + { + bthci_EventEnhancedFlushComplete(padapter, pBtHciInfo->enFlush_LLH); + pBtHciInfo->enFlush_LLH = 0; + } + + return status; +} + +HCI_STATUS +bthci_CmdReadLogicalLinkAcceptTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + + pu2Temp = (u16*)&pRetPar[1]; // Conn_Accept_Timeout + *pu2Temp = pBtHciInfo->LogicalAcceptTimeout; + len += 3; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdWriteLogicalLinkAcceptTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + pBtHciInfo->LogicalAcceptTimeout = *((u16*)pHciCmd->Data); + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; +} + +HCI_STATUS +bthci_CmdSetEventMask( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 *pu8Temp; + + pu8Temp = (u8*)&pHciCmd->Data[0]; + pBtHciInfo->BTEventMask = *pu8Temp; +#if 0 + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("BTEventMask = 0x%"i64fmt"x\n", + ((pBtHciInfo->BTEventMask & UINT64_C(0xffffffff00000000))>>32))); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("%"i64fmt"x\n", + (pBtHciInfo->BTEventMask & 0xffffffff))); +#else + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("BTEventMask = 0x%"i64fmt"x\n", + pBtHciInfo->BTEventMask)); +#endif + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_SET_EVENT_MASK, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +// 7.3.69 +HCI_STATUS +bthci_CmdSetEventMaskPage2( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 *pu8Temp; + + pu8Temp = (u8*)&pHciCmd->Data[0]; + pBtHciInfo->BTEventMaskPage2 = *pu8Temp; +#if 0 + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("BTEventMaskPage2 = 0x%"i64fmt"x\n", + ((pBtHciInfo->BTEventMaskPage2& UINT64_C(0xffffffff00000000))>>32))); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("%"i64fmt"x\n", + (pBtHciInfo->BTEventMaskPage2&0xffffffff))); +#else + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("BTEventMaskPage2 = 0x%"i64fmt"x\n", + pBtHciInfo->BTEventMaskPage2)); +#endif + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_SET_EVENT_MASK_PAGE_2, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdReadLocationData( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + { + u8 localBuf[12] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_READ_LOCATION_DATA, + status); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("DomainAware = 0x%x\n", pBtHciInfo->LocationDomainAware)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Domain = 0x%x\n", pBtHciInfo->LocationDomain)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("DomainOptions = 0x%x\n", pBtHciInfo->LocationDomainOptions)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Options = 0x%x\n", pBtHciInfo->LocationOptions)); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + + pRetPar[1] = pBtHciInfo->LocationDomainAware; //0x0; // Location_Domain_Aware + pu2Temp = (u16*)&pRetPar[2]; // Location_Domain + *pu2Temp = pBtHciInfo->LocationDomain; //0x5858; + pRetPar[4] = pBtHciInfo->LocationDomainOptions; //0x58; //Location_Domain_Options + pRetPar[5] = pBtHciInfo->LocationOptions; //0x0; //Location_Options + len+=6; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; +} + +HCI_STATUS +bthci_CmdWriteLocationData( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u16 *pu2Temp; + + pBtHciInfo->LocationDomainAware = pHciCmd->Data[0]; + pu2Temp = (u16*)&pHciCmd->Data[1]; + pBtHciInfo->LocationDomain = *pu2Temp; + pBtHciInfo->LocationDomainOptions = pHciCmd->Data[3]; + pBtHciInfo->LocationOptions = pHciCmd->Data[4]; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("DomainAware = 0x%x\n", pBtHciInfo->LocationDomainAware)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Domain = 0x%x\n", pBtHciInfo->LocationDomain)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("DomainOptions = 0x%x\n", pBtHciInfo->LocationDomainOptions)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Options = 0x%x\n", pBtHciInfo->LocationOptions)); + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_WRITE_LOCATION_DATA, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdReadFlowControlMode( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + { + u8 localBuf[7] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_READ_FLOW_CONTROL_MODE, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + pRetPar[1] = pBtHciInfo->FlowControlMode; // Flow Control Mode + len += 2; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; +} + +HCI_STATUS +bthci_CmdWriteFlowControlMode( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + pBtHciInfo->FlowControlMode = pHciCmd->Data[0]; + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_WRITE_FLOW_CONTROL_MODE, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdReadBestEffortFlushTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + u16 i, j, logicHandle; + u32 BestEffortFlushTimeout = 0xffffffff; + u8 find = 0; + + logicHandle = *((u16*)pHciCmd->Data); + // find an matched logical link index and copy the data + for (j=0; j<MAX_BT_ASOC_ENTRY_NUM; j++) + { + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle == logicHandle) + { + BestEffortFlushTimeout = pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].BestEffortFlushTimeout; + find = 1; + break; + } + } + } + + if (!find) + status = HCI_STATUS_UNKNOW_CONNECT_ID; + + { + u8 localBuf[10] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u32 *pu4Temp; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_READ_BEST_EFFORT_FLUSH_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + pu4Temp = (u32*)&pRetPar[1]; // Best_Effort_Flush_Timeout + *pu4Temp = BestEffortFlushTimeout; + len += 5; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; +} + +HCI_STATUS +bthci_CmdWriteBestEffortFlushTimeout( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + u16 i, j, logicHandle; + u32 BestEffortFlushTimeout = 0xffffffff; + u8 find = 0; + + logicHandle = *((u16*)pHciCmd->Data); + BestEffortFlushTimeout = *((u32 *)(pHciCmd->Data+1)); + + // find an matched logical link index and copy the data + for (j=0; j<MAX_BT_ASOC_ENTRY_NUM; j++) + { + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle == logicHandle) + { + pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].BestEffortFlushTimeout = BestEffortFlushTimeout; + find = 1; + break; + } + } + } + + if (!find) + status = HCI_STATUS_UNKNOW_CONNECT_ID; + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_WRITE_BEST_EFFORT_FLUSH_TIMEOUT, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; +} + +HCI_STATUS +bthci_CmdShortRangeMode( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + u8 PhyLinkHandle, EntryNum, ShortRangeMode; + + PhyLinkHandle = pHciCmd->Data[0]; + ShortRangeMode = pHciCmd->Data[1]; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("PLH = 0x%x, Short_Range_Mode = 0x%x\n", PhyLinkHandle, ShortRangeMode)); + + EntryNum = bthci_GetCurrentEntryNum(padapter, PhyLinkHandle); + if (EntryNum != 0xff) + { + pBTInfo->BtAsocEntry[EntryNum].ShortRangeMode = ShortRangeMode; + } + else + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("No such PLH(0x%x)\n", PhyLinkHandle)); + status = HCI_STATUS_UNKNOW_CONNECT_ID; + } + + bthci_EventCommandStatus(padapter, + OGF_SET_EVENT_MASK_COMMAND, + HCI_SHORT_RANGE_MODE, + status); + + bthci_EventShortRangeModeChangeComplete(padapter, status, ShortRangeMode, EntryNum); + + return status; +} + +HCI_STATUS bthci_CmdReadLocalSupportedCommands(PADAPTER padapter) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + // send command complete event here when all data are received. + { + //PVOID buffer = padapter->IrpHCILocalbuf.Ptr; + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar, *pSupportedCmds; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_INFORMATIONAL_PARAMETERS, + HCI_READ_LOCAL_SUPPORTED_COMMANDS, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + pSupportedCmds = &pRetPar[1]; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[5]=0xc0\nBit [6]=Set Event Mask, [7]=Reset\n")); + pSupportedCmds[5] = 0xc0; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[6]=0x01\nBit [0]=Set Event Filter\n")); + pSupportedCmds[6] = 0x01; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[7]=0x0c\nBit [2]=Read Connection Accept Timeout, [3]=Write Connection Accept Timeout\n")); + pSupportedCmds[7] = 0x0c; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[10]=0x80\nBit [7]=Host Number Of Completed Packets\n")); + pSupportedCmds[10] = 0x80; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[11]=0x03\nBit [0]=Read Link Supervision Timeout, [1]=Write Link Supervision Timeout\n")); + pSupportedCmds[11] = 0x03; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[14]=0xa8\nBit [3]=Read Local Version Information, [5]=Read Local Supported Features, [7]=Read Buffer Size\n")); + pSupportedCmds[14] = 0xa8; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[15]=0x1c\nBit [2]=Read Failed Contact Count, [3]=Reset Failed Contact Count, [4]=Get Link Quality\n")); + pSupportedCmds[15] = 0x1c; + //pSupportedCmds[16] = 0x04; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[19]=0x40\nBit [6]=Enhanced Flush\n")); + pSupportedCmds[19] = 0x40; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[21]=0xff\nBit [0]=Create Physical Link, [1]=Accept Physical Link, [2]=Disconnect Physical Link, [3]=Create Logical Link\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), (" [4]=Accept Logical Link, [5]=Disconnect Logical Link, [6]=Logical Link Cancel, [7]=Flow Spec Modify\n")); + pSupportedCmds[21] = 0xff; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[22]=0xff\nBit [0]=Read Logical Link Accept Timeout, [1]=Write Logical Link Accept Timeout, [2]=Set Event Mask Page 2, [3]=Read Location Data\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), (" [4]=Write Location Data, [5]=Read Local AMP Info, [6]=Read Local AMP_ASSOC, [7]=Write Remote AMP_ASSOC\n")); + pSupportedCmds[22] = 0xff; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[23]=0x07\nBit [0]=Read Flow Control Mode, [1]=Write Flow Control Mode, [2]=Read Data Block Size\n")); + pSupportedCmds[23] = 0x07; + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD|IOCTL_BT_LOGO), ("Octet[24]=0x1c\nBit [2]=Read Best Effort Flush Timeout, [3]=Write Best Effort Flush Timeout, [4]=Short Range Mode\n")); + pSupportedCmds[24] = 0x1c; + len += 64; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS bthci_CmdReadLocalSupportedFeatures(PADAPTER padapter) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + //send command complete event here when all data are received. + { + //PVOID buffer = padapter->IrpHCILocalbuf.Ptr; + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_INFORMATIONAL_PARAMETERS, + HCI_READ_LOCAL_SUPPORTED_FEATURES, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 9; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; +} + +HCI_STATUS +bthci_CmdReadLocalAMPAssoc( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 PhyLinkHandle, EntryNum; + + pBtDbg->dbgHciInfo.hciCmdCntReadLocalAmpAssoc++; + PhyLinkHandle = *((u8*)pHciCmd->Data); + EntryNum = bthci_GetCurrentEntryNum(padapter, PhyLinkHandle); + + if ((EntryNum==0xff) && PhyLinkHandle != 0) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("ReadLocalAMPAssoc, EntryNum = %d !!!!!, physical link handle = 0x%x\n", + EntryNum, PhyLinkHandle)); + status = HCI_STATUS_UNKNOW_CONNECT_ID; + } + else if (pBtMgnt->bPhyLinkInProgressStartLL) + { + status = HCI_STATUS_UNKNOW_CONNECT_ID; + pBtMgnt->bPhyLinkInProgressStartLL = _FALSE; + } + else + { + pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.BtPhyLinkhandle = *((u8*)pHciCmd->Data); + pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar = *((u16*)((u8*)pHciCmd->Data+1)); + pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.MaxRemoteASSOCLen = *((u16*)((u8*)pHciCmd->Data+3)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("ReadLocalAMPAssoc, LenSoFar=%d, MaxRemoteASSOCLen=%d\n", + pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar, + pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.MaxRemoteASSOCLen)); + } + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("ReadLocalAMPAssoc, EntryNum = %d !!!!!, physical link handle = 0x%x, LengthSoFar = %x \n", + EntryNum, PhyLinkHandle, pBTInfo->BtAsocEntry[EntryNum].AmpAsocCmdData.LenSoFar)); + + //send command complete event here when all data are received. + { + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + //PVOID buffer = padapter->IrpHCILocalbuf.Ptr; + u8 localBuf[TmpLocalBufSize] = ""; + u16 *pRemainLen; + u32 totalLen = 0; + u16 typeLen=0, remainLen=0, ret_index=0; + u8 *pRetPar; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + totalLen += bthci_CommandCompleteHeader(&localBuf[0], + OGF_STATUS_PARAMETERS, + HCI_READ_LOCAL_AMP_ASSOC, + status); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("ReadLocalAMPAssoc, Remaining_Len=%d \n", remainLen)); + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[totalLen]; + pRetPar[0] = status; //status + pRetPar[1] = *((u8*)pHciCmd->Data); + pRemainLen = (u16*)&pRetPar[2]; // AMP_ASSOC_Remaining_Length + totalLen += 4; //[0]~[3] + ret_index = 4; + + typeLen = bthci_AssocMACAddr(padapter, &pRetPar[ret_index]); + totalLen += typeLen; + remainLen += typeLen; + ret_index += typeLen; + typeLen = bthci_AssocPreferredChannelList(padapter, &pRetPar[ret_index], EntryNum); + totalLen += typeLen; + remainLen += typeLen; + ret_index += typeLen; + typeLen = bthci_PALCapabilities(padapter, &pRetPar[ret_index]); + totalLen += typeLen; + remainLen += typeLen; + ret_index += typeLen; + typeLen = bthci_AssocPALVer(padapter, &pRetPar[ret_index]); + totalLen += typeLen; + remainLen += typeLen; +#if 0//for logo special test case only + ret_index += typeLen; + typeLen = bthci_ReservedForTestingPLV(padapter, &pRetPar[ret_index]); + totalLen += typeLen; + remainLen += typeLen; +#endif + PPacketIrpEvent->Length = (UCHAR)totalLen; + *pRemainLen = remainLen; // AMP_ASSOC_Remaining_Length + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("ReadLocalAMPAssoc, Remaining_Len=%d \n", remainLen)); + RTPRINT_DATA(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("AMP_ASSOC_fragment : \n"), PPacketIrpEvent->Data, totalLen); + + bthci_IndicateEvent(padapter, PPacketIrpEvent, totalLen+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdReadFailedContactCounter( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u16 handle; + + handle=*((u16*)pHciCmd->Data); + //send command complete event here when all data are received. + { + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_STATUS_PARAMETERS, + HCI_READ_FAILED_CONTACT_COUNTER, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = TWOBYTE_LOWBYTE(handle); + pRetPar[2] = TWOBYTE_HIGHTBYTE(handle); + pRetPar[3] = TWOBYTE_LOWBYTE(pBtHciInfo->FailContactCount); + pRetPar[4] = TWOBYTE_HIGHTBYTE(pBtHciInfo->FailContactCount); + len += 5; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdResetFailedContactCounter( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u16 handle; + + handle=*((u16*)pHciCmd->Data); + pBtHciInfo->FailContactCount=0; + + //send command complete event here when all data are received. + { + //PVOID buffer = padapter->IrpHCILocalbuf.Ptr; + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_STATUS_PARAMETERS, + HCI_RESET_FAILED_CONTACT_COUNTER, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = TWOBYTE_LOWBYTE(handle); + pRetPar[2] = TWOBYTE_HIGHTBYTE(handle); + len+=3; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; +} + +// +// BT 3.0+HS [Vol 2] 7.4.1 +// +HCI_STATUS +bthci_CmdReadLocalVersionInformation( + PADAPTER padapter + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + //send command complete event here when all data are received. + { + //PVOID buffer = padapter->IrpHCILocalbuf.Ptr; + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_INFORMATIONAL_PARAMETERS, + HCI_READ_LOCAL_VERSION_INFORMATION, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = 0x05; // HCI_Version + pu2Temp = (u16*)&pRetPar[2]; // HCI_Revision + *pu2Temp = 0x0001; + pRetPar[4] = 0x05; // LMP/PAL_Version + pu2Temp = (u16*)&pRetPar[5]; // Manufacturer_Name + *pu2Temp = 0x005d; + pu2Temp = (u16*)&pRetPar[7]; // LMP/PAL_Subversion + *pu2Temp = 0x0001; + len += 9; + PPacketIrpEvent->Length = len; + + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("LOCAL_VERSION_INFORMATION\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("Status %x\n",status)); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("HCI_Version = 0x05\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("HCI_Revision = 0x0001\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("LMP/PAL_Version = 0x05\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("Manufacturer_Name = 0x0001\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("LMP/PAL_Subversion = 0x0001\n")); + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +//7.4.7 +HCI_STATUS bthci_CmdReadDataBlockSize(PADAPTER padapter) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + { + //PVOID buffer = padapter->IrpHCILocalbuf.Ptr; + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_INFORMATIONAL_PARAMETERS, + HCI_READ_DATA_BLOCK_SIZE, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = HCI_STATUS_SUCCESS; //status + pu2Temp = (u16*)&pRetPar[1]; // Max_ACL_Data_Packet_Length + *pu2Temp = Max80211PALPDUSize; + + pu2Temp = (u16*)&pRetPar[3]; // Data_Block_Length + *pu2Temp = Max80211PALPDUSize; + pu2Temp = (u16*)&pRetPar[5]; // Total_Num_Data_Blocks + *pu2Temp = BTTotalDataBlockNum; + len += 7; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +// 7.4.5 +HCI_STATUS +bthci_CmdReadBufferSize( + PADAPTER padapter + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + { + //PVOID buffer = padapter->IrpHCILocalbuf.Ptr; + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_INFORMATIONAL_PARAMETERS, + HCI_READ_BUFFER_SIZE, + status); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Synchronous_Data_Packet_Length = 0x%x\n", BTSynDataPacketLength)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Total_Num_ACL_Data_Packets = 0x%x\n", BTTotalDataBlockNum)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("Total_Num_Synchronous_Data_Packets = 0x%x\n", BTTotalDataBlockNum)); + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pu2Temp = (u16*)&pRetPar[1]; // HC_ACL_Data_Packet_Length + *pu2Temp = Max80211PALPDUSize; + + pRetPar[3] = BTSynDataPacketLength; // HC_Synchronous_Data_Packet_Length + pu2Temp = (u16*)&pRetPar[4]; // HC_Total_Num_ACL_Data_Packets + *pu2Temp = BTTotalDataBlockNum; + pu2Temp = (u16*)&pRetPar[6]; // HC_Total_Num_Synchronous_Data_Packets + *pu2Temp = BTTotalDataBlockNum; + len += 8; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdReadLocalAMPInfo( + PADAPTER padapter + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + { +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct pwrctrl_priv *ppwrctrl = adapter_to_pwrctl(padapter); + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + u32 *pu4Temp; + u32 TotalBandwidth=BTTOTALBANDWIDTH, MaxBandGUBandwidth=BTMAXBANDGUBANDWIDTH; + u8 ControlType=0x01, AmpStatus=0x01; + u32 MaxFlushTimeout=10000, BestEffortFlushTimeout=5000; + u16 MaxPDUSize=Max80211PALPDUSize, PalCap=0x1, AmpAssocLen=Max80211AMPASSOCLen, MinLatency=20; + + if ((ppwrctrl->rfoff_reason & RF_CHANGE_BY_HW) || + (ppwrctrl->rfoff_reason & RF_CHANGE_BY_SW)) + { + AmpStatus = AMP_STATUS_NO_CAPACITY_FOR_BT; + } + + PlatformZeroMemory(&localBuf[0], TmpLocalBufSize); + //PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_STATUS_PARAMETERS, + HCI_READ_LOCAL_AMP_INFO, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = AmpStatus; // AMP_Status + pu4Temp = (u32*)&pRetPar[2]; // Total_Bandwidth + *pu4Temp = TotalBandwidth;//0x19bfcc00;//0x7530; + pu4Temp = (u32*)&pRetPar[6]; // Max_Guaranteed_Bandwidth + *pu4Temp = MaxBandGUBandwidth;//0x19bfcc00;//0x4e20; + pu4Temp = (u32*)&pRetPar[10]; // Min_Latency + *pu4Temp = MinLatency;//150; + pu4Temp = (u32*)&pRetPar[14]; // Max_PDU_Size + *pu4Temp = MaxPDUSize; + pRetPar[18] = ControlType; // Controller_Type + pu2Temp = (u16*)&pRetPar[19]; // PAL_Capabilities + *pu2Temp = PalCap; + pu2Temp = (u16*)&pRetPar[21]; // AMP_ASSOC_Length + *pu2Temp = AmpAssocLen; + pu4Temp = (u32*)&pRetPar[23]; // Max_Flush_Timeout + *pu4Temp = MaxFlushTimeout; + pu4Temp = (u32*)&pRetPar[27]; // Best_Effort_Flush_Timeout + *pu4Temp = BestEffortFlushTimeout; + len += 31; + PPacketIrpEvent->Length = len; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("AmpStatus = 0x%x\n", + AmpStatus)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("TotalBandwidth = 0x%x, MaxBandGUBandwidth = 0x%x, MinLatency = 0x%x, \n MaxPDUSize = 0x%x, ControlType = 0x%x\n", + TotalBandwidth,MaxBandGUBandwidth,MinLatency,MaxPDUSize,ControlType)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("PalCap = 0x%x, AmpAssocLen = 0x%x, MaxFlushTimeout = 0x%x, BestEffortFlushTimeout = 0x%x\n", + PalCap,AmpAssocLen,MaxFlushTimeout,BestEffortFlushTimeout)); + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdCreatePhysicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + pBtDbg->dbgHciInfo.hciCmdCntCreatePhyLink++; + + status = bthci_BuildPhysicalLink(padapter, + pHciCmd, HCI_CREATE_PHYSICAL_LINK); + + return status; +} + +HCI_STATUS +bthci_CmdReadLinkQuality( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + u16 PLH; + u8 EntryNum, LinkQuality=0x55; + + PLH = *((u16*)&pHciCmd->Data[0]); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("PLH = 0x%x\n", PLH)); + + EntryNum = bthci_GetCurrentEntryNum(padapter, (u8)PLH); + if (EntryNum == 0xff) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("No such PLH(0x%x)\n", PLH)); + status=HCI_STATUS_UNKNOW_CONNECT_ID; + } + + { + u8 localBuf[11] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_STATUS_PARAMETERS, + HCI_READ_LINK_QUALITY, + status); + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, (" PLH = 0x%x\n Link Quality = 0x%x\n", PLH, LinkQuality)); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + *((u16*)&(pRetPar[1])) = pBTInfo->BtAsocEntry[EntryNum].PhyLinkCmdData.BtPhyLinkhandle; // Handle + pRetPar[3] = 0x55; //Link Quailty + len += 4; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS bthci_CmdReadRSSI(PADAPTER padapter) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + return status; +} + +HCI_STATUS +bthci_CmdCreateLogicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + pBtDbg->dbgHciInfo.hciCmdCntCreateLogLink++; + + bthci_BuildLogicalLink(padapter, pHciCmd, + HCI_CREATE_LOGICAL_LINK); + + return status; +} + +HCI_STATUS +bthci_CmdAcceptLogicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + pBtDbg->dbgHciInfo.hciCmdCntAcceptLogLink++; + + bthci_BuildLogicalLink(padapter, pHciCmd, + HCI_ACCEPT_LOGICAL_LINK); + + return status; +} + +HCI_STATUS +bthci_CmdDisconnectLogicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTinfo->BtMgnt; + PBT_DBG pBtDbg = &pBTinfo->BtDbg; + u16 logicHandle; + u8 i, j, find=0, LogLinkCount=0; + + pBtDbg->dbgHciInfo.hciCmdCntDisconnectLogLink++; + + logicHandle = *((u16*)pHciCmd->Data); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("DisconnectLogicalLink, logicHandle = 0x%x\n", logicHandle)); + + // find an created logical link index and clear the data + for (j=0; j<MAX_BT_ASOC_ENTRY_NUM;j++) + { + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle == logicHandle) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("DisconnectLogicalLink, logicHandle is matched 0x%x\n", logicHandle)); + bthci_ResetFlowSpec(padapter, j, i); + find = 1; + pBtMgnt->DisconnectEntryNum = j; + break; + } + } + } + + if (!find) + status = HCI_STATUS_UNKNOW_CONNECT_ID; + + // To check each + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTinfo->BtAsocEntry[pBtMgnt->DisconnectEntryNum].LogLinkCmdData[i].BtLogLinkhandle !=0) + { + LogLinkCount++; + } + } + + //When we receive Create logical link command, we should send command status event first. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + HCI_DISCONNECT_LOGICAL_LINK, + status); + // + //When we determines the logical link is established, we should send command complete event. + // + if (status == HCI_STATUS_SUCCESS) + { + bthci_EventDisconnectLogicalLinkComplete(padapter, status, + logicHandle, HCI_STATUS_CONNECT_TERMINATE_LOCAL_HOST); + } + + if (LogLinkCount == 0) + PlatformSetTimer(padapter, &pBTinfo->BTDisconnectPhyLinkTimer, 100); + + return status; +} + +HCI_STATUS +bthci_CmdLogicalLinkCancel( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTinfo->BtMgnt; + u8 CurrentEntryNum, CurrentLogEntryNum; + + u8 physicalLinkHandle, TxFlowSpecID,i; + u16 CurrentLogicalHandle; + + physicalLinkHandle = *((u8*)pHciCmd->Data); + TxFlowSpecID = *(((u8*)pHciCmd->Data)+1); + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("LogicalLinkCancel, physicalLinkHandle = 0x%x, TxFlowSpecID = 0x%x\n", + physicalLinkHandle, TxFlowSpecID)); + + CurrentEntryNum=pBtMgnt->CurrentConnectEntryNum; + CurrentLogicalHandle = pBtMgnt->BtCurrentLogLinkhandle; + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("CurrentEntryNum=0x%x, CurrentLogicalHandle = 0x%x\n", + CurrentEntryNum, CurrentLogicalHandle)); + + CurrentLogEntryNum = 0xff; + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if ((CurrentLogicalHandle == pBTinfo->BtAsocEntry[CurrentEntryNum].LogLinkCmdData[i].BtLogLinkhandle) && + (physicalLinkHandle == pBTinfo->BtAsocEntry[CurrentEntryNum].LogLinkCmdData[i].BtPhyLinkhandle)) + { + CurrentLogEntryNum = i; + break; + } + } + + if (CurrentLogEntryNum == 0xff) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("LogicalLinkCancel, CurrentLogEntryNum==0xff !!!!\n")); + status=HCI_STATUS_UNKNOW_CONNECT_ID; + } + else + { + if (pBTinfo->BtAsocEntry[CurrentEntryNum].LogLinkCmdData[CurrentLogEntryNum].bLLCompleteEventIsSet) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("LogicalLinkCancel, LLCompleteEventIsSet!!!!\n")); + status=HCI_STATUS_ACL_CONNECT_EXISTS; + } + } + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_LINK_CONTROL_COMMANDS, + HCI_LOGICAL_LINK_CANCEL, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = pBTinfo->BtAsocEntry[CurrentEntryNum].LogLinkCmdData[CurrentLogEntryNum].BtPhyLinkhandle; + pRetPar[2] = pBTinfo->BtAsocEntry[CurrentEntryNum].LogLinkCmdData[CurrentLogEntryNum].BtTxFlowSpecID; + len += 3; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + pBTinfo->BtAsocEntry[CurrentEntryNum].LogLinkCmdData[CurrentLogEntryNum].bLLCancelCMDIsSetandComplete=_TRUE; + + return status; +} + +HCI_STATUS +bthci_CmdFlowSpecModify( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + u8 i, j, find=0; + u16 logicHandle; + + logicHandle = *((u16*)pHciCmd->Data); + // find an matched logical link index and copy the data + for (j=0;j<MAX_BT_ASOC_ENTRY_NUM;j++) + { + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle == logicHandle) + { + _rtw_memcpy(&pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].Tx_Flow_Spec, + &pHciCmd->Data[2], sizeof(HCI_FLOW_SPEC)); + _rtw_memcpy(&pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].Rx_Flow_Spec, + &pHciCmd->Data[18], sizeof(HCI_FLOW_SPEC)); + + bthci_CheckLogLinkBehavior(padapter, pBTinfo->BtAsocEntry[j].LogLinkCmdData[i].Tx_Flow_Spec); + find = 1; + break; + } + } + } + RTPRINT(FIOCTL, IOCTL_BT_LOGO, ("FlowSpecModify, LLH = 0x%x, \n",logicHandle)); + + //When we receive Flow Spec Modify command, we should send command status event first. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + HCI_FLOW_SPEC_MODIFY, + HCI_STATUS_SUCCESS); + + if (!find) + status = HCI_STATUS_UNKNOW_CONNECT_ID; + + bthci_EventSendFlowSpecModifyComplete(padapter, status, logicHandle); + + return status; +} + +HCI_STATUS +bthci_CmdAcceptPhysicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + pBtDbg->dbgHciInfo.hciCmdCntAcceptPhyLink++; + + status = bthci_BuildPhysicalLink(padapter, + pHciCmd, HCI_ACCEPT_PHYSICAL_LINK); + + return status; +} + +HCI_STATUS +bthci_CmdDisconnectPhysicalLink( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 PLH, CurrentEntryNum, PhysLinkDisconnectReason; + + pBtDbg->dbgHciInfo.hciCmdCntDisconnectPhyLink++; + + PLH = *((u8*)pHciCmd->Data); + PhysLinkDisconnectReason = (*((u8*)pHciCmd->Data+1)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_DISCONNECT_PHYSICAL_LINK PhyHandle = 0x%x, Reason=0x%x\n", + PLH, PhysLinkDisconnectReason)); + + CurrentEntryNum = bthci_GetCurrentEntryNum(padapter, PLH); + + if (CurrentEntryNum == 0xff) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("DisconnectPhysicalLink, No such Handle in the Entry\n")); + status=HCI_STATUS_UNKNOW_CONNECT_ID; + //return status; + } + + pBTInfo->BtAsocEntry[CurrentEntryNum].PhyLinkDisconnectReason=(HCI_STATUS)PhysLinkDisconnectReason; + //Send HCI Command status event to AMP. + bthci_EventCommandStatus(padapter, + OGF_LINK_CONTROL_COMMANDS, + HCI_DISCONNECT_PHYSICAL_LINK, + status); + + if (status != HCI_STATUS_SUCCESS) + return status; + + if (pBTInfo->BtAsocEntry[CurrentEntryNum].BtCurrentState == HCI_STATE_DISCONNECTED) + { + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_DISCONNECTED, STATE_CMD_DISCONNECT_PHY_LINK, CurrentEntryNum); + } + else + { + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_DISCONNECTING, STATE_CMD_DISCONNECT_PHY_LINK, CurrentEntryNum); + } + + return status; +} + +HCI_STATUS +bthci_CmdSetACLLinkDataFlowMode( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + pBtMgnt->ExtConfig.CurrentConnectHandle = *((u16*)pHciCmd->Data); + pBtMgnt->ExtConfig.CurrentIncomingTrafficMode = *((u8*)pHciCmd->Data)+2; + pBtMgnt->ExtConfig.CurrentOutgoingTrafficMode = *((u8*)pHciCmd->Data)+3; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("Connection Handle = 0x%x, Incoming Traffic mode = 0x%x, Outgoing Traffic mode = 0x%x", + pBtMgnt->ExtConfig.CurrentConnectHandle, + pBtMgnt->ExtConfig.CurrentIncomingTrafficMode, + pBtMgnt->ExtConfig.CurrentOutgoingTrafficMode)); + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_SET_ACL_LINK_DATA_FLOW_MODE, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + pu2Temp = (u16*)&pRetPar[1]; + *pu2Temp = pBtMgnt->ExtConfig.CurrentConnectHandle; + len += 3; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdSetACLLinkStatus( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 i; + u8 *pTriple; + + pBtDbg->dbgHciInfo.hciCmdCntSetAclLinkStatus++; + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "SetACLLinkStatus, Hex Data :\n", + &pHciCmd->Data[0], pHciCmd->Length); + + // Only Core Stack v251 and later version support this command. + pBtMgnt->bSupportProfile = _TRUE; + + pBtMgnt->ExtConfig.NumberOfHandle= *((u8*)pHciCmd->Data); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("NumberOfHandle = 0x%x\n", pBtMgnt->ExtConfig.NumberOfHandle)); + + pTriple = &pHciCmd->Data[1]; + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle = *((u16*)&pTriple[0]); + pBtMgnt->ExtConfig.linkInfo[i].IncomingTrafficMode = pTriple[2]; + pBtMgnt->ExtConfig.linkInfo[i].OutgoingTrafficMode = pTriple[3]; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, + ("Connection_Handle = 0x%x, Incoming Traffic mode = 0x%x, Outgoing Traffic Mode = 0x%x\n", + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle, + pBtMgnt->ExtConfig.linkInfo[i].IncomingTrafficMode, + pBtMgnt->ExtConfig.linkInfo[i].OutgoingTrafficMode)); + pTriple += 4; + } + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_SET_ACL_LINK_STATUS, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdSetSCOLinkStatus( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + pBtDbg->dbgHciInfo.hciCmdCntSetScoLinkStatus++; + pBtMgnt->ExtConfig.NumberOfSCO= *((u8*)pHciCmd->Data); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("NumberOfSCO = 0x%x\n", + pBtMgnt->ExtConfig.NumberOfSCO)); + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_SET_SCO_LINK_STATUS, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdSetRSSIValue( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + s8 min_bt_rssi = 0; + u8 i; +#if 0 + if (pHciCmd->Length) + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("pHciCmd->Length = 0x%x\n", pHciCmd->Length)); + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "SetRSSIValue(), Hex Data :\n", + &pHciCmd->Data[0], pHciCmd->Length); + } +#endif + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + if (pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle == *((u16*)&pHciCmd->Data[0])) + { + pBtMgnt->ExtConfig.linkInfo[i].BT_RSSI = (s8)(pHciCmd->Data[2]); + RTPRINT(FIOCTL, IOCTL_BT_EVENT_PERIODICAL, + ("Connection_Handle = 0x%x, RSSI = %d \n", + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle, + pBtMgnt->ExtConfig.linkInfo[i].BT_RSSI)); + } + // get the minimum bt rssi value + if (pBtMgnt->ExtConfig.linkInfo[i].BT_RSSI <= min_bt_rssi) + { + min_bt_rssi = pBtMgnt->ExtConfig.linkInfo[i].BT_RSSI; + } + } + + { + pBtMgnt->ExtConfig.MIN_BT_RSSI = min_bt_rssi; + RTPRINT(FBT, BT_TRACE, ("[bt rssi], the min rssi is %d\n", min_bt_rssi)); + } + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_SET_RSSI_VALUE, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdSetCurrentBluetoothStatus( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + pBtMgnt->ExtConfig.CurrentBTStatus = *((u8*)&pHciCmd->Data[0]); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("SetCurrentBluetoothStatus, CurrentBTStatus = 0x%x\n", + pBtMgnt->ExtConfig.CurrentBTStatus)); + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_SET_CURRENT_BLUETOOTH_STATUS, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdExtensionVersionNotify( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + pBtDbg->dbgHciInfo.hciCmdCntExtensionVersionNotify++; + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "ExtensionVersionNotify, Hex Data :\n", + &pHciCmd->Data[0], pHciCmd->Length); + + pBtMgnt->ExtConfig.HCIExtensionVer = *((u16*)&pHciCmd->Data[0]); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCIExtensionVer = 0x%x\n", pBtMgnt->ExtConfig.HCIExtensionVer)); + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_EXTENSION_VERSION_NOTIFY, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdLinkStatusNotify( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 i; + u8 *pTriple; + + pBtDbg->dbgHciInfo.hciCmdCntLinkStatusNotify++; + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "LinkStatusNotify, Hex Data :\n", + &pHciCmd->Data[0], pHciCmd->Length); + + // Current only RTL8723 support this command. + pBtMgnt->bSupportProfile = _TRUE; + + pBtMgnt->ExtConfig.NumberOfHandle= *((u8*)pHciCmd->Data); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("NumberOfHandle = 0x%x\n", pBtMgnt->ExtConfig.NumberOfHandle)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCIExtensionVer = %d\n", pBtMgnt->ExtConfig.HCIExtensionVer)); + + pTriple = &pHciCmd->Data[1]; + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + if (pBtMgnt->ExtConfig.HCIExtensionVer < 1) + { + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle = *((u16*)&pTriple[0]); + pBtMgnt->ExtConfig.linkInfo[i].BTProfile = pTriple[2]; + pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec = pTriple[3]; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, + ("Connection_Handle = 0x%x, BTProfile=%d, BTSpec=%d\n", + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle, + pBtMgnt->ExtConfig.linkInfo[i].BTProfile, + pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec)); + pTriple += 4; + } + else if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) + { + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle = *((u16*)&pTriple[0]); + pBtMgnt->ExtConfig.linkInfo[i].BTProfile = pTriple[2]; + pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec = pTriple[3]; + pBtMgnt->ExtConfig.linkInfo[i].linkRole = pTriple[4]; + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, + ("Connection_Handle = 0x%x, BTProfile=%d, BTSpec=%d, LinkRole=%d\n", + pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle, + pBtMgnt->ExtConfig.linkInfo[i].BTProfile, + pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec, + pBtMgnt->ExtConfig.linkInfo[i].linkRole)); + pTriple += 5; + } + + } + BTHCI_UpdateBTProfileRTKToMoto(padapter); + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_LINK_STATUS_NOTIFY, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdBtOperationNotify( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "Bt Operation notify, Hex Data :\n", + &pHciCmd->Data[0], pHciCmd->Length); + + pBtMgnt->ExtConfig.btOperationCode = *((u8*)pHciCmd->Data); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("btOperationCode = 0x%x\n", pBtMgnt->ExtConfig.btOperationCode)); + switch (pBtMgnt->ExtConfig.btOperationCode) + { + case HCI_BT_OP_NONE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Operation None!!\n")); + break; + case HCI_BT_OP_INQUIRY_START: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Inquire start!!\n")); + break; + case HCI_BT_OP_INQUIRY_FINISH: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Inquire finished!!\n")); + break; + case HCI_BT_OP_PAGING_START: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Paging is started!!\n")); + break; + case HCI_BT_OP_PAGING_SUCCESS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Paging complete successfully!!\n")); + break; + case HCI_BT_OP_PAGING_UNSUCCESS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Paging complete unsuccessfully!!\n")); + break; + case HCI_BT_OP_PAIRING_START: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Pairing start!!\n")); + break; + case HCI_BT_OP_PAIRING_FINISH: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Pairing finished!!\n")); + break; + case HCI_BT_OP_BT_DEV_ENABLE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : BT Device is enabled!!\n")); + break; + case HCI_BT_OP_BT_DEV_DISABLE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : BT Device is disabled!!\n")); + break; + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[bt operation] : Unknown, error!!\n")); + break; + } + BTDM_AdjustForBtOperation(padapter); + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_BT_OPERATION_NOTIFY, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdEnableWifiScanNotify( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "Enable Wifi scan notify, Hex Data :\n", + &pHciCmd->Data[0], pHciCmd->Length); + + pBtMgnt->ExtConfig.bEnableWifiScanNotify = *((u8*)pHciCmd->Data); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("bEnableWifiScanNotify = %d\n", pBtMgnt->ExtConfig.bEnableWifiScanNotify)); + + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_ENABLE_WIFI_SCAN_NOTIFY, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdWIFICurrentChannel( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +// u8 chnl = pMgntInfo->dot11CurrentChannelNumber; + u8 chnl = pmlmeext->cur_channel; + +// if (pMgntInfo->pHTInfo->bCurBW40MHz == HT_CHANNEL_WIDTH_20_40) + if (pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) + { +// if (pMgntInfo->pHTInfo->CurSTAExtChnlOffset == HT_EXTCHNL_OFFSET_UPPER) + if (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + { + chnl += 2; + } +// else if (pMgntInfo->pHTInfo->CurSTAExtChnlOffset == HT_EXTCHNL_OFFSET_LOWER) + else if (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + { + chnl -= 2; + } + } + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("Current Channel = 0x%x\n", chnl)); + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_WIFI_CURRENT_CHANNEL, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = chnl; //current channel + len += 2; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdWIFICurrentBandwidth( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + HT_CHANNEL_WIDTH bw; + u8 CurrentBW = 0; + + +// rtw_hal_get_hwreg(padapter, HW_VAR_BW_MODE, (u8*)(&bw)); + bw = padapter->mlmeextpriv.cur_bwmode; + + if (bw == HT_CHANNEL_WIDTH_20) + { + CurrentBW = 0; + } + else if (bw == HT_CHANNEL_WIDTH_40) + { + CurrentBW = 1; + } + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("Current BW = 0x%x\n", + CurrentBW)); + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_WIFI_CURRENT_BANDWIDTH, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = CurrentBW; //current BW + len += 2; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdWIFIConnectionStatus( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PADAPTER pDefaultAdapter = GetDefaultAdapter(padapter); +// PADAPTER pExtAdapter = NULL; +// PMGNT_INFO pExtMgntInfo = NULL; + u8 connectStatus = HCI_WIFI_NOT_CONNECTED; + +#if 0 + // Default port, connect to any + if (pMgntInfo->bMediaConnect) + connectStatus = HCI_WIFI_CONNECTED; + if (pMgntInfo->mIbss) + connectStatus = HCI_WIFI_CONNECTED; + + // AP mode, if any station associated + if (padapter->MgntInfo.NdisVersion >= RT_NDIS_VERSION_6_20) + { + if (IsAPModeExist(padapter)) + { + pExtAdapter = GetFirstExtAdapter(padapter); + if (pExtAdapter == NULL) pExtAdapter = pDefaultAdapter; + + pExtMgntInfo = &pExtAdapter->MgntInfo; + if (AsocEntry_AnyStationAssociated(pExtMgntInfo)) + connectStatus = HCI_WIFI_CONNECTED; + } + else + { + if (AsocEntry_AnyStationAssociated(pMgntInfo)) + connectStatus = HCI_WIFI_CONNECTED; + } + } + else + { + if (AsocEntry_AnyStationAssociated(pMgntInfo)) + connectStatus = HCI_WIFI_CONNECTED; + } + + if (connectStatus == HCI_WIFI_NOT_CONNECTED) + { + if (!MgntRoamingInProgress(pMgntInfo) && + !MgntIsLinkInProgress(pMgntInfo) && + !MgntScanInProgress(pMgntInfo)) + { + connectStatus = HCI_WIFI_CONNECT_IN_PROGRESS; + } + } +#else + if (BTDM_CheckFWState(padapter, WIFI_AP_STATE) == _TRUE) { + if (padapter->stapriv.asoc_sta_count >= 3) + connectStatus = HCI_WIFI_CONNECTED; + else + connectStatus = HCI_WIFI_NOT_CONNECTED; + } + else if (BTDM_CheckFWState(padapter, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_ASOC_STATE) == _TRUE) + connectStatus = HCI_WIFI_CONNECTED; + else if (BTDM_CheckFWState(padapter, WIFI_UNDER_LINKING) == _TRUE) + connectStatus = HCI_WIFI_CONNECT_IN_PROGRESS; + else + connectStatus = HCI_WIFI_NOT_CONNECTED; +#endif + + { + u8 localBuf[8] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_EXTENSION, + HCI_WIFI_CONNECTION_STATUS, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + pRetPar[1] = connectStatus; //connect status + len += 2; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdEnableDeviceUnderTestMode( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + pBtHciInfo->bInTestMode = _TRUE; + pBtHciInfo->bTestIsEnd = _FALSE; + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_TESTING_COMMANDS, + HCI_ENABLE_DEVICE_UNDER_TEST_MODE, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdAMPTestEnd( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 bFilterOutNonAssociatedBSSID = _TRUE; + + if (!pBtHciInfo->bInTestMode) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Not in Test mode, return status=HCI_STATUS_CMD_DISALLOW\n")); + status = HCI_STATUS_CMD_DISALLOW; + return status; + } + + pBtHciInfo->bTestIsEnd=_TRUE; + + PlatformCancelTimer(padapter,&pBTInfo->BTTestSendPacketTimer); + + rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_BSSID, (u8*)(&bFilterOutNonAssociatedBSSID)); + + + //send command complete event here when all data are received. + { + u8 localBuf[4] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("AMP Test End Event \n")); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_AMP_TEST_END; + PPacketIrpEvent->Length=2; + + PPacketIrpEvent->Data[0] = status; + PPacketIrpEvent->Data[1] = pBtHciInfo->TestScenario; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 4); + } + + bthci_EventAMPReceiverReport(padapter,0x01); + + return status; +} + +HCI_STATUS +bthci_CmdAMPTestCommand( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + if (!pBtHciInfo->bInTestMode) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Not in Test mode, return status=HCI_STATUS_CMD_DISALLOW\n")); + status = HCI_STATUS_CMD_DISALLOW; + return status; + } + + + pBtHciInfo->TestScenario=*((u8*)pHciCmd->Data); + + if (pBtHciInfo->TestScenario == 0x01) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("TX Single Test \n")); + } + else if (pBtHciInfo->TestScenario == 0x02) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Receive Frame Test \n")); + } + else + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("No Such Test !!!!!!!!!!!!!!!!!! \n")); + } + + + if (pBtHciInfo->bTestIsEnd) + { + u8 localBuf[5] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("AMP Test End Event \n")); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_AMP_TEST_END; + PPacketIrpEvent->Length=2; + + PPacketIrpEvent->Data[0] = status; + PPacketIrpEvent->Data[1] = pBtHciInfo->TestScenario ; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 4); + + //Return to Idel state with RX and TX off. + + return status; + } + + // should send command status event + bthci_EventCommandStatus(padapter, + OGF_TESTING_COMMANDS, + HCI_AMP_TEST_COMMAND, + status); + + //The HCI_AMP_Start Test Event shall be generated when the + //HCI_AMP_Test_Command has completed and the first data is ready to be sent + //or received. + + { + u8 localBuf[5] = ""; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), (" HCI_AMP_Start Test Event \n")); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + PPacketIrpEvent->EventCode=HCI_EVENT_AMP_START_TEST; + PPacketIrpEvent->Length=2; + + PPacketIrpEvent->Data[0] = status; + PPacketIrpEvent->Data[1] = pBtHciInfo->TestScenario ; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, 4); + + //Return to Idel state with RX and TX off. + } + + if (pBtHciInfo->TestScenario == 0x01) + { + /* + When in a transmitter test scenario and the frames/bursts count have been + transmitted the HCI_AMP_Test_End event shall be sent. + */ + PlatformSetTimer(padapter, &pBTInfo->BTTestSendPacketTimer, 50); + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("TX Single Test \n")); + } + else if (pBtHciInfo->TestScenario == 0x02) + { + u8 bFilterOutNonAssociatedBSSID=_FALSE; + rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_BSSID, (u8*)(&bFilterOutNonAssociatedBSSID)); + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("Receive Frame Test \n")); + } + + return status; +} + + +HCI_STATUS +bthci_CmdEnableAMPReceiverReports( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + if (!pBtHciInfo->bInTestMode) + { + status = HCI_STATUS_CMD_DISALLOW; + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_TESTING_COMMANDS, + HCI_ENABLE_AMP_RECEIVER_REPORTS, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + return status; + } + + pBtHciInfo->bTestNeedReport= *((u8*)pHciCmd->Data); + pBtHciInfo->TestReportInterval= (*((u8*)pHciCmd->Data+2)); + + bthci_EventAMPReceiverReport(padapter,0x00); + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_TESTING_COMMANDS, + HCI_ENABLE_AMP_RECEIVER_REPORTS, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdHostBufferSize( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + pBTInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].ACLPacketsData.ACLDataPacketLen= *((u16*)pHciCmd->Data); + pBTInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].SyncDataPacketLen= *((u8 *)(pHciCmd->Data+2)); + pBTInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].TotalNumACLDataPackets= *((u16 *)(pHciCmd->Data+3)); + pBTInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].TotalSyncNumDataPackets= *((u16 *)(pHciCmd->Data+5)); + + //send command complete event here when all data are received. + { + u8 localBuf[6] = ""; + u8 *pRetPar; + u8 len = 0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + + len += bthci_CommandCompleteHeader(&localBuf[0], + OGF_SET_EVENT_MASK_COMMAND, + HCI_HOST_BUFFER_SIZE, + status); + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[len]; + pRetPar[0] = status; //status + len += 1; + PPacketIrpEvent->Length = len; + + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } + + return status; +} + +HCI_STATUS +bthci_CmdHostNumberOfCompletedPackets( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + return status; +} + +HCI_STATUS +bthci_UnknownCMD( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_UNKNOW_HCI_CMD; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + pBtDbg->dbgHciInfo.hciCmdCntUnknown++; + bthci_EventCommandStatus(padapter, + (u8)pHciCmd->OGF, + pHciCmd->OCF, + status); + + return status; +} + +HCI_STATUS +bthci_HandleOGFInformationalParameters( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + switch (pHciCmd->OCF) + { + case HCI_READ_LOCAL_VERSION_INFORMATION: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LOCAL_VERSION_INFORMATION\n")); + status = bthci_CmdReadLocalVersionInformation(padapter); + break; + case HCI_READ_LOCAL_SUPPORTED_COMMANDS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LOCAL_SUPPORTED_COMMANDS\n")); + status = bthci_CmdReadLocalSupportedCommands(padapter); + break; + case HCI_READ_LOCAL_SUPPORTED_FEATURES: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LOCAL_SUPPORTED_FEATURES\n")); + status = bthci_CmdReadLocalSupportedFeatures(padapter); + break; + case HCI_READ_BUFFER_SIZE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_BUFFER_SIZE\n")); + status = bthci_CmdReadBufferSize(padapter); + break; + case HCI_READ_DATA_BLOCK_SIZE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_DATA_BLOCK_SIZE\n")); + status = bthci_CmdReadDataBlockSize(padapter); + break; + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("bthci_HandleOGFInformationalParameters(), Unknown case = 0x%x\n", pHciCmd->OCF)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_UNKNOWN_COMMAND\n")); + status = bthci_UnknownCMD(padapter, pHciCmd); + break; + } + return status; +} + +HCI_STATUS +bthci_HandleOGFSetEventMaskCMD( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + switch (pHciCmd->OCF) + { + case HCI_SET_EVENT_MASK: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_SET_EVENT_MASK\n")); + status = bthci_CmdSetEventMask(padapter, pHciCmd); + break; + case HCI_RESET: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_RESET\n")); + status = bthci_CmdReset(padapter, _TRUE); + break; + case HCI_READ_CONNECTION_ACCEPT_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_CONNECTION_ACCEPT_TIMEOUT\n")); + status = bthci_CmdReadConnectionAcceptTimeout(padapter); + break; + case HCI_SET_EVENT_FILTER: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_SET_EVENT_FILTER\n")); + status = bthci_CmdSetEventFilter(padapter, pHciCmd); + break; + case HCI_WRITE_CONNECTION_ACCEPT_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_CONNECTION_ACCEPT_TIMEOUT\n")); + status = bthci_CmdWriteConnectionAcceptTimeout(padapter, pHciCmd); + break; + case HCI_READ_PAGE_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_PAGE_TIMEOUT\n")); + status = bthci_CmdReadPageTimeout(padapter, pHciCmd); + break; + case HCI_WRITE_PAGE_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_PAGE_TIMEOUT\n")); + status = bthci_CmdWritePageTimeout(padapter, pHciCmd); + break; + case HCI_HOST_NUMBER_OF_COMPLETED_PACKETS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_HOST_NUMBER_OF_COMPLETED_PACKETS\n")); + status = bthci_CmdHostNumberOfCompletedPackets(padapter, pHciCmd); + break; + case HCI_READ_LINK_SUPERVISION_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LINK_SUPERVISION_TIMEOUT\n")); + status = bthci_CmdReadLinkSupervisionTimeout(padapter, pHciCmd); + break; + case HCI_WRITE_LINK_SUPERVISION_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_LINK_SUPERVISION_TIMEOUT\n")); + status = bthci_CmdWriteLinkSupervisionTimeout(padapter, pHciCmd); + break; + case HCI_ENHANCED_FLUSH: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_ENHANCED_FLUSH\n")); + status = bthci_CmdEnhancedFlush(padapter, pHciCmd); + break; + case HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT\n")); + status = bthci_CmdReadLogicalLinkAcceptTimeout(padapter, pHciCmd); + break; + case HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT\n")); + status = bthci_CmdWriteLogicalLinkAcceptTimeout(padapter, pHciCmd); + break; + case HCI_SET_EVENT_MASK_PAGE_2: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_SET_EVENT_MASK_PAGE_2\n")); + status = bthci_CmdSetEventMaskPage2(padapter, pHciCmd); + break; + case HCI_READ_LOCATION_DATA: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LOCATION_DATA\n")); + status = bthci_CmdReadLocationData(padapter, pHciCmd); + break; + case HCI_WRITE_LOCATION_DATA: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_LOCATION_DATA\n")); + status = bthci_CmdWriteLocationData(padapter, pHciCmd); + break; + case HCI_READ_FLOW_CONTROL_MODE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_FLOW_CONTROL_MODE\n")); + status = bthci_CmdReadFlowControlMode(padapter, pHciCmd); + break; + case HCI_WRITE_FLOW_CONTROL_MODE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_FLOW_CONTROL_MODE\n")); + status = bthci_CmdWriteFlowControlMode(padapter, pHciCmd); + break; + case HCI_READ_BEST_EFFORT_FLUSH_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_BEST_EFFORT_FLUSH_TIMEOUT\n")); + status = bthci_CmdReadBestEffortFlushTimeout(padapter, pHciCmd); + break; + case HCI_WRITE_BEST_EFFORT_FLUSH_TIMEOUT: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_BEST_EFFORT_FLUSH_TIMEOUT\n")); + status = bthci_CmdWriteBestEffortFlushTimeout(padapter, pHciCmd); + break; + case HCI_SHORT_RANGE_MODE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_SHORT_RANGE_MODE\n")); + status = bthci_CmdShortRangeMode(padapter, pHciCmd); + break; + case HCI_HOST_BUFFER_SIZE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_HOST_BUFFER_SIZE\n")); + status = bthci_CmdHostBufferSize(padapter,pHciCmd); + break; + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("bthci_HandleOGFSetEventMaskCMD(), Unknown case = 0x%x\n", pHciCmd->OCF)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_UNKNOWN_COMMAND\n")); + status = bthci_UnknownCMD(padapter, pHciCmd); + break; + } + return status; +} + +HCI_STATUS +bthci_HandleOGFStatusParameters( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + switch (pHciCmd->OCF) + { + case HCI_READ_FAILED_CONTACT_COUNTER: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_FAILED_CONTACT_COUNTER\n")); + status = bthci_CmdReadFailedContactCounter(padapter,pHciCmd); + break; + case HCI_RESET_FAILED_CONTACT_COUNTER: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_RESET_FAILED_CONTACT_COUNTER\n")); + status = bthci_CmdResetFailedContactCounter(padapter,pHciCmd); + break; + case HCI_READ_LINK_QUALITY: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LINK_QUALITY\n")); + status = bthci_CmdReadLinkQuality(padapter, pHciCmd); + break; + case HCI_READ_RSSI: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_RSSI\n")); + status = bthci_CmdReadRSSI(padapter); + break; + case HCI_READ_LOCAL_AMP_INFO: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LOCAL_AMP_INFO\n")); + status = bthci_CmdReadLocalAMPInfo(padapter); + break; + case HCI_READ_LOCAL_AMP_ASSOC: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_READ_LOCAL_AMP_ASSOC\n")); + status = bthci_CmdReadLocalAMPAssoc(padapter,pHciCmd); + break; + case HCI_WRITE_REMOTE_AMP_ASSOC: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_WRITE_REMOTE_AMP_ASSOC\n")); + status = bthci_CmdWriteRemoteAMPAssoc(padapter,pHciCmd); + break; + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("bthci_HandleOGFStatusParameters(), Unknown case = 0x%x\n", pHciCmd->OCF)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_UNKNOWN_COMMAND\n")); + status = bthci_UnknownCMD(padapter, pHciCmd); + break; + } + return status; +} + + +HCI_STATUS +bthci_HandleOGFLinkControlCMD( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + + switch (pHciCmd->OCF) + { + case HCI_CREATE_PHYSICAL_LINK: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_CREATE_PHYSICAL_LINK\n")); + status = bthci_CmdCreatePhysicalLink(padapter,pHciCmd); + break; + case HCI_ACCEPT_PHYSICAL_LINK: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_ACCEPT_PHYSICAL_LINK\n")); + status = bthci_CmdAcceptPhysicalLink(padapter,pHciCmd); + break; + case HCI_DISCONNECT_PHYSICAL_LINK: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_DISCONNECT_PHYSICAL_LINK\n")); + status = bthci_CmdDisconnectPhysicalLink(padapter,pHciCmd); + break; + case HCI_CREATE_LOGICAL_LINK: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_CREATE_LOGICAL_LINK\n")); + status = bthci_CmdCreateLogicalLink(padapter,pHciCmd); + break; + case HCI_ACCEPT_LOGICAL_LINK: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_ACCEPT_LOGICAL_LINK\n")); + status = bthci_CmdAcceptLogicalLink(padapter,pHciCmd); + break; + case HCI_DISCONNECT_LOGICAL_LINK: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_DISCONNECT_LOGICAL_LINK\n")); + status = bthci_CmdDisconnectLogicalLink(padapter,pHciCmd); + break; + case HCI_LOGICAL_LINK_CANCEL: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_LOGICAL_LINK_CANCEL\n")); + status = bthci_CmdLogicalLinkCancel(padapter,pHciCmd); + break; + case HCI_FLOW_SPEC_MODIFY: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_FLOW_SPEC_MODIFY\n")); + status = bthci_CmdFlowSpecModify(padapter,pHciCmd); + break; + + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("bthci_HandleOGFLinkControlCMD(), Unknown case = 0x%x\n", pHciCmd->OCF)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_UNKNOWN_COMMAND\n")); + status = bthci_UnknownCMD(padapter, pHciCmd); + break; + } + return status; +} + +HCI_STATUS +bthci_HandleOGFTestingCMD( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + switch (pHciCmd->OCF) + { + case HCI_ENABLE_DEVICE_UNDER_TEST_MODE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_ENABLE_DEVICE_UNDER_TEST_MODE\n")); + bthci_CmdEnableDeviceUnderTestMode(padapter,pHciCmd); + break; + case HCI_AMP_TEST_END: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_AMP_TEST_END\n")); + bthci_CmdAMPTestEnd(padapter,pHciCmd); + break; + case HCI_AMP_TEST_COMMAND: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_AMP_TEST_COMMAND\n")); + bthci_CmdAMPTestCommand(padapter,pHciCmd); + break; + case HCI_ENABLE_AMP_RECEIVER_REPORTS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_ENABLE_AMP_RECEIVER_REPORTS\n")); + bthci_CmdEnableAMPReceiverReports(padapter,pHciCmd); + break; + + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_UNKNOWN_COMMAND\n")); + status = bthci_UnknownCMD(padapter, pHciCmd); + break; + } + return status; +} + +HCI_STATUS +bthci_HandleOGFExtension( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + switch (pHciCmd->OCF) + { + case HCI_SET_ACL_LINK_DATA_FLOW_MODE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_SET_ACL_LINK_DATA_FLOW_MODE\n")); + status = bthci_CmdSetACLLinkDataFlowMode(padapter,pHciCmd); + break; + case HCI_SET_ACL_LINK_STATUS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_SET_ACL_LINK_STATUS\n")); + status = bthci_CmdSetACLLinkStatus(padapter,pHciCmd); + break; + case HCI_SET_SCO_LINK_STATUS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_SET_SCO_LINK_STATUS\n")); + status = bthci_CmdSetSCOLinkStatus(padapter,pHciCmd); + break; + case HCI_SET_RSSI_VALUE: + RTPRINT(FIOCTL, IOCTL_BT_EVENT_PERIODICAL, ("HCI_SET_RSSI_VALUE\n")); + status = bthci_CmdSetRSSIValue(padapter,pHciCmd); + break; + case HCI_SET_CURRENT_BLUETOOTH_STATUS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_SET_CURRENT_BLUETOOTH_STATUS\n")); + status = bthci_CmdSetCurrentBluetoothStatus(padapter,pHciCmd); + break; + //The following is for RTK8723 + + case HCI_EXTENSION_VERSION_NOTIFY: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_EXTENSION_VERSION_NOTIFY\n")); + status = bthci_CmdExtensionVersionNotify(padapter,pHciCmd); + break; + case HCI_LINK_STATUS_NOTIFY: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_LINK_STATUS_NOTIFY\n")); + status = bthci_CmdLinkStatusNotify(padapter,pHciCmd); + break; + case HCI_BT_OPERATION_NOTIFY: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_BT_OPERATION_NOTIFY\n")); + status = bthci_CmdBtOperationNotify(padapter,pHciCmd); + break; + case HCI_ENABLE_WIFI_SCAN_NOTIFY: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_ENABLE_WIFI_SCAN_NOTIFY\n")); + status = bthci_CmdEnableWifiScanNotify(padapter,pHciCmd); + break; + + //The following is for IVT + case HCI_WIFI_CURRENT_CHANNEL: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_WIFI_CURRENT_CHANNEL\n")); + status = bthci_CmdWIFICurrentChannel(padapter,pHciCmd); + break; + case HCI_WIFI_CURRENT_BANDWIDTH: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_WIFI_CURRENT_BANDWIDTH\n")); + status = bthci_CmdWIFICurrentBandwidth(padapter,pHciCmd); + break; + case HCI_WIFI_CONNECTION_STATUS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_WIFI_CONNECTION_STATUS\n")); + status = bthci_CmdWIFIConnectionStatus(padapter,pHciCmd); + break; + + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCI_UNKNOWN_COMMAND\n")); + status = bthci_UnknownCMD(padapter, pHciCmd); + break; + } + return status; +} + +void +bthci_FakeCommand( + PADAPTER padapter, + u16 OGF, + u16 OCF + ) +{ +#define MAX_TMP_BUF_SIZE 200 + u8 buffer[MAX_TMP_BUF_SIZE]; + PPACKET_IRP_HCICMD_DATA pCmd=(PPACKET_IRP_HCICMD_DATA)buffer; + + PlatformZeroMemory(buffer, MAX_TMP_BUF_SIZE); + + pCmd->OGF = OGF; + pCmd->OCF = OCF; + + if (OGF == OGF_LINK_CONTROL_COMMANDS && OCF == HCI_LOGICAL_LINK_CANCEL) + { + pCmd->Length = 2; + pCmd->Data[0] = 1; //physical link handle + pCmd->Data[1] = 0x16; //Tx_Flow_Spec_ID + BTHCI_HandleHCICMD(padapter, (PPACKET_IRP_HCICMD_DATA)buffer); + } +} + +void +bthci_StateStarting( + PADAPTER padapter, + HCI_STATE_WITH_CMD StateCmd, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT state], [Starting], ")); + switch (StateCmd) + { + case STATE_CMD_CONNECT_ACCEPT_TIMEOUT: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_CONNECT_ACCEPT_TIMEOUT\n")); + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_CONNECT_ACCEPT_TIMEOUT; + pBtMgnt->bNeedNotifyAMPNoCap = _TRUE; + BTHCI_DisconnectPeer(padapter,EntryNum); + break; + } + + case STATE_CMD_DISCONNECT_PHY_LINK: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_DISCONNECT_PHY_LINK\n")); + + bthci_EventDisconnectPhyLinkComplete(padapter, + HCI_STATUS_SUCCESS, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkDisconnectReason, + EntryNum); + + PlatformCancelTimer(padapter,&pBTInfo->BTHCIJoinTimeoutTimer); + + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_UNKNOW_CONNECT_ID; + + BTHCI_DisconnectPeer(padapter, EntryNum); + break; + } + + case STATE_CMD_MAC_START_COMPLETE: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_MAC_START_COMPLETE\n")); + if (pBTInfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_JOINER) + { + } + else if (pBTInfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_CREATOR) + { + bthci_EventChannelSelected(padapter,EntryNum); + } + + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_STATE, ("State command(%d) is Wrong !!!\n", StateCmd)); + break; + } +} + +void +bthci_StateConnecting( + PADAPTER padapter, + HCI_STATE_WITH_CMD StateCmd, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT state], [Connecting], ")); + switch (StateCmd) + { + case STATE_CMD_CONNECT_ACCEPT_TIMEOUT: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_CONNECT_ACCEPT_TIMEOUT\n")); + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_CONNECT_ACCEPT_TIMEOUT; + pBtMgnt->bNeedNotifyAMPNoCap = _TRUE; + BTHCI_DisconnectPeer(padapter, EntryNum); + break; + } + + case STATE_CMD_MAC_CONNECT_COMPLETE: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_MAC_CONNECT_COMPLETE\n")); + + if (pBTInfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_JOINER) + { + RT_TRACE(COMP_TEST, DBG_LOUD , ("StateConnecting \n")); +// BTPKT_WPAAuthINITIALIZE(padapter,EntryNum); // Not implement yet + } + break; + } + + case STATE_CMD_DISCONNECT_PHY_LINK: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_DISCONNECT_PHY_LINK\n")); + + bthci_EventDisconnectPhyLinkComplete(padapter, + HCI_STATUS_SUCCESS, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkDisconnectReason, + EntryNum); + + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_UNKNOW_CONNECT_ID; + + PlatformCancelTimer(padapter,&pBTInfo->BTHCIJoinTimeoutTimer); + + BTHCI_DisconnectPeer(padapter, EntryNum); + + break; + } + + case STATE_CMD_MAC_CONNECT_CANCEL_INDICATE: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_MAC_CONNECT_CANCEL_INDICATE\n")); + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_CONTROLLER_BUSY; + // Because this state cmd is caused by the BTHCI_EventAMPStatusChange(), + // we don't need to send event in the following BTHCI_DisconnectPeer() again. + pBtMgnt->bNeedNotifyAMPNoCap = _FALSE; + BTHCI_DisconnectPeer(padapter, EntryNum); + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_STATE, ("State command(%d) is Wrong !!!\n", StateCmd)); + break; + } +} + +void +bthci_StateConnected( + PADAPTER padapter, + HCI_STATE_WITH_CMD StateCmd, + u8 EntryNum + ) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT state], [Connected], ")); + switch (StateCmd) + { + case STATE_CMD_DISCONNECT_PHY_LINK: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_DISCONNECT_PHY_LINK\n")); + + // + //When we are trying to disconnect the phy link, we should disconnect log link first, + // + { + u8 i; + u16 logicHandle = 0; + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTInfo->BtAsocEntry[EntryNum].LogLinkCmdData->BtLogLinkhandle != 0) + { + logicHandle=pBTInfo->BtAsocEntry[EntryNum].LogLinkCmdData->BtLogLinkhandle; + + bthci_EventDisconnectLogicalLinkComplete(padapter, HCI_STATUS_SUCCESS, + logicHandle, pBTInfo->BtAsocEntry[EntryNum].PhyLinkDisconnectReason); + + pBTInfo->BtAsocEntry[EntryNum].LogLinkCmdData->BtLogLinkhandle = 0; + } + } + } + + bthci_EventDisconnectPhyLinkComplete(padapter, + HCI_STATUS_SUCCESS, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkDisconnectReason, + EntryNum); + + PlatformCancelTimer(padapter, &pBTInfo->BTHCIJoinTimeoutTimer); + + BTHCI_DisconnectPeer(padapter, EntryNum); + break; + } + + case STATE_CMD_MAC_DISCONNECT_INDICATE: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_MAC_DISCONNECT_INDICATE\n")); + + bthci_EventDisconnectPhyLinkComplete(padapter, + HCI_STATUS_SUCCESS, + // TODO: Remote Host not local host + HCI_STATUS_CONNECT_TERMINATE_LOCAL_HOST, + EntryNum); + BTHCI_DisconnectPeer(padapter, EntryNum); + + break; + } + + case STATE_CMD_ENTER_STATE: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_ENTER_STATE\n")); + + if (pBtMgnt->bBTConnectInProgress) + { + pBtMgnt->bBTConnectInProgress = _FALSE; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], BT Connect in progress OFF!!\n")); + } + pBTInfo->BtAsocEntry[EntryNum].BtCurrentState = HCI_STATE_CONNECTED; + pBTInfo->BtAsocEntry[EntryNum].b4waySuccess = _TRUE; + pBtMgnt->bStartSendSupervisionPkt = _TRUE; + + PlatformSetTimer(padapter, &pBTInfo->BTSupervisionPktTimer, 10000); + // for rate adaptive +#if 0 + padapter->HalFunc.UpdateHalRAMaskHandler( + padapter, + _FALSE, + MAX_FW_SUPPORT_MACID_NUM-1-EntryNum, + &pBTInfo->BtAsocEntry[EntryNum].BTRemoteMACAddr[0], + NULL, + 0, + RAMask_BT); + rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, (u8*)(&pMgntInfo->mBrates)); +#else + //Update_RA_Entry(padapter, MAX_FW_SUPPORT_MACID_NUM-1-EntryNum); + + if(padapter->HalFunc.UpdateRAMaskHandler) + padapter->HalFunc.UpdateRAMaskHandler(padapter, MAX_FW_SUPPORT_MACID_NUM-1-EntryNum, 0); + + rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, padapter->mlmepriv.cur_network.network.SupportedRates); +#endif + BTDM_SetFwChnlInfo(padapter, RT_MEDIA_CONNECT); + + //rtw_hal_set_hwreg(padapter, HW_VAR_MEDIA_STATUS, (u8*)(&opMode)); + //rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_BSSID, (u8*)(&bFilterOutNonAssociatedBSSID)); + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_STATE, ("State command(%d) is Wrong !!!\n", StateCmd)); + break; + } +} + +void +bthci_StateAuth( + PADAPTER padapter, + HCI_STATE_WITH_CMD StateCmd, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT state], [Authenticating], ")); + switch (StateCmd) + { + case STATE_CMD_CONNECT_ACCEPT_TIMEOUT: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_CONNECT_ACCEPT_TIMEOUT\n")); + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_CONNECT_ACCEPT_TIMEOUT; + pBtMgnt->bNeedNotifyAMPNoCap = _TRUE; + BTHCI_DisconnectPeer(padapter, EntryNum); + break; + } + + case STATE_CMD_DISCONNECT_PHY_LINK: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_DISCONNECT_PHY_LINK\n")); + bthci_EventDisconnectPhyLinkComplete(padapter, + HCI_STATUS_SUCCESS, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkDisconnectReason, + EntryNum); + + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_UNKNOW_CONNECT_ID; + + PlatformCancelTimer(padapter,&pBTInfo->BTHCIJoinTimeoutTimer); + + BTHCI_DisconnectPeer(padapter,EntryNum); + break; + } + + case STATE_CMD_4WAY_FAILED: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_4WAY_FAILED\n")); + + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus=HCI_STATUS_AUTH_FAIL; + pBtMgnt->bNeedNotifyAMPNoCap = _TRUE; + + BTHCI_DisconnectPeer(padapter,EntryNum); + + PlatformCancelTimer(padapter,&pBTInfo->BTHCIJoinTimeoutTimer); + break; + } + + case STATE_CMD_4WAY_SUCCESSED: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_4WAY_SUCCESSED\n")); + + bthci_EventPhysicalLinkComplete(padapter, HCI_STATUS_SUCCESS, EntryNum, INVALID_PL_HANDLE); + + PlatformCancelTimer(padapter, &pBTInfo->BTHCIJoinTimeoutTimer); + + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_CONNECTED, STATE_CMD_ENTER_STATE, EntryNum); + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_STATE, ("State command(%d) is Wrong !!!\n", StateCmd)); + break; + } +} + +void +bthci_StateDisconnecting( + PADAPTER padapter, + HCI_STATE_WITH_CMD StateCmd, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT state], [Disconnecting], ")); + switch (StateCmd) + { + case STATE_CMD_MAC_CONNECT_CANCEL_INDICATE: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_MAC_CONNECT_CANCEL_INDICATE\n")); + if (pBTInfo->BtAsocEntry[EntryNum].bNeedPhysLinkCompleteEvent) + { + bthci_EventPhysicalLinkComplete(padapter, + pBTInfo->BtAsocEntry[EntryNum].PhysLinkCompleteStatus, + EntryNum, INVALID_PL_HANDLE); + } + + if (pBtMgnt->bBTConnectInProgress) + { + pBtMgnt->bBTConnectInProgress = _FALSE; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], BT Connect in progress OFF!!\n")); + } + + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_DISCONNECTED, STATE_CMD_ENTER_STATE, EntryNum); + break; + } + + case STATE_CMD_DISCONNECT_PHY_LINK: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_DISCONNECT_PHY_LINK\n")); + + bthci_EventDisconnectPhyLinkComplete(padapter, + HCI_STATUS_SUCCESS, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkDisconnectReason, + EntryNum); + + PlatformCancelTimer(padapter,&pBTInfo->BTHCIJoinTimeoutTimer); + + BTHCI_DisconnectPeer(padapter, EntryNum); + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_STATE, ("State command(%d) is Wrong !!!\n", StateCmd)); + break; + } +} + +void +bthci_StateDisconnected( + PADAPTER padapter, + HCI_STATE_WITH_CMD StateCmd, + u8 EntryNum + ) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT state], [Disconnected], ")); + switch (StateCmd) + { + case STATE_CMD_CREATE_PHY_LINK: + case STATE_CMD_ACCEPT_PHY_LINK: + { + if (StateCmd == STATE_CMD_CREATE_PHY_LINK) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_CREATE_PHY_LINK\n")); + } + else + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_ACCEPT_PHY_LINK\n")); + } + + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT PS], Disable IPS and LPS\n")); + IPSDisable(padapter, _FALSE, IPS_DISABLE_BT_ON); + LeisurePSLeave(padapter, LPS_DISABLE_BT_HS_CONNECTION); + + pBtMgnt->bPhyLinkInProgress =_TRUE; + pBtMgnt->BTCurrentConnectType=BT_DISCONNECT; + if (!pBtMgnt->BtOperationOn) + { +#if (SENDTXMEHTOD == 0) + PlatformSetTimer(padapter, &pBTInfo->BTHCISendAclDataTimer, 1); +#endif +#if (RTS_CTS_NO_LEN_LIMIT == 1) + rtw_write32(padapter, 0x4c8, 0xc140400); +#endif + } + pBtMgnt->CurrentBTConnectionCnt++; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], CurrentBTConnectionCnt = %d\n", + pBtMgnt->CurrentBTConnectionCnt)); + pBtMgnt->BtOperationOn = _TRUE; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], Bt Operation ON!! CurrentConnectEntryNum = %d\n", + pBtMgnt->CurrentConnectEntryNum)); + + if (pBtMgnt->bBTConnectInProgress) + { + bthci_EventPhysicalLinkComplete(padapter, HCI_STATUS_CONTROLLER_BUSY, INVALID_ENTRY_NUM, pBtMgnt->BtCurrentPhyLinkhandle); + bthci_RemoveEntryByEntryNum(padapter, EntryNum); + return; + } + + if (StateCmd == STATE_CMD_CREATE_PHY_LINK) + { + pBTInfo->BtAsocEntry[EntryNum].AMPRole = AMP_BTAP_CREATOR; + } + else + { + pBTInfo->BtAsocEntry[EntryNum].AMPRole = AMP_BTAP_JOINER; + } + + // 1. MAC not yet in selected channel +#if 0 + while ((MgntRoamingInProgress(pMgntInfo)) || + (MgntIsLinkInProgress(pMgntInfo))|| + (MgntScanInProgress(pMgntInfo))) +#else + while (BTDM_CheckFWState(padapter, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) == _TRUE) +#endif + { + RTPRINT(FIOCTL, IOCTL_STATE, ("Scan/Roaming/Wifi Link is in Progress, wait 200 ms\n")); + rtw_mdelay_os(200); + } + // 2. MAC already in selected channel + { + RTPRINT(FIOCTL, IOCTL_STATE, ("Channel is Ready\n")); + PlatformSetTimer(padapter, &pBTInfo->BTHCIJoinTimeoutTimer, pBtHciInfo->ConnAcceptTimeout); + + pBTInfo->BtAsocEntry[EntryNum].bNeedPhysLinkCompleteEvent = _TRUE; + } + break; + } + + case STATE_CMD_DISCONNECT_PHY_LINK: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_DISCONNECT_PHY_LINK\n")); + + PlatformCancelTimer(padapter,&pBTInfo->BTHCIJoinTimeoutTimer); + + bthci_EventDisconnectPhyLinkComplete(padapter, + HCI_STATUS_SUCCESS, + pBTInfo->BtAsocEntry[EntryNum].PhyLinkDisconnectReason, + EntryNum); + + if (pBTInfo->BtAsocEntry[EntryNum].bNeedPhysLinkCompleteEvent) + { + bthci_EventPhysicalLinkComplete(padapter, + HCI_STATUS_UNKNOW_CONNECT_ID, + EntryNum, INVALID_PL_HANDLE); + } + + if (pBtMgnt->bBTConnectInProgress) + { + pBtMgnt->bBTConnectInProgress = _FALSE; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], BT Connect in progress OFF!!\n")); + } + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_DISCONNECTED, STATE_CMD_ENTER_STATE, EntryNum); + bthci_RemoveEntryByEntryNum(padapter,EntryNum); + break; + } + + case STATE_CMD_ENTER_STATE: + { + RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_ENTER_STATE\n")); + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_STATE, ("State command(%d) is Wrong !!!\n", StateCmd)); + break; + } +} + +void +bthci_UseFakeData( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + if (pHciCmd->OGF == OGF_LINK_CONTROL_COMMANDS && pHciCmd->OCF == HCI_CREATE_LOGICAL_LINK) + { + PHCI_FLOW_SPEC pTxFlowSpec = (PHCI_FLOW_SPEC)&pHciCmd->Data[1]; + PHCI_FLOW_SPEC pRxFlowSpec = (PHCI_FLOW_SPEC)&pHciCmd->Data[17]; + bthci_SelectFlowType(padapter, BT_TX_BE_FS, BT_RX_BE_FS, pTxFlowSpec, pRxFlowSpec); + //bthci_SelectFlowType(padapter, BT_TX_be_FS, BT_RX_GU_FS, pTxFlowSpec, pRxFlowSpec); + } + else if (pHciCmd->OGF == OGF_LINK_CONTROL_COMMANDS && pHciCmd->OCF == HCI_FLOW_SPEC_MODIFY) + { + PHCI_FLOW_SPEC pTxFlowSpec = (PHCI_FLOW_SPEC)&pHciCmd->Data[2]; + PHCI_FLOW_SPEC pRxFlowSpec = (PHCI_FLOW_SPEC)&pHciCmd->Data[18]; + //bthci_SelectFlowType(padapter, BT_TX_BE_FS, BT_RX_BE_FS, pTxFlowSpec, pRxFlowSpec); + bthci_SelectFlowType(padapter, BT_TX_BE_AGG_FS, BT_RX_BE_AGG_FS, pTxFlowSpec, pRxFlowSpec); + } +} + +void bthci_TimerCallbackHCICmd(PRT_TIMER pTimer) +{ +#if (BT_THREAD == 0) +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackHCICmd() ==>\n")); + + PlatformScheduleWorkItem(&pBTinfo->HCICmdWorkItem); + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackHCICmd() <==\n")); +#endif +} + +void bthci_TimerCallbackSendAclData(PRT_TIMER pTimer) +{ +#if (SENDTXMEHTOD == 0) +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("HCIAclDataTimerCallback() ==>\n")); + if (padapter->bDriverIsGoingToUnload) + { + return; + } + PlatformScheduleWorkItem(&pBTinfo->HCISendACLDataWorkItem); + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("HCIAclDataTimerCallback() <==\n")); +#endif +} + +void bthci_TimerCallbackDiscardAclData(PRT_TIMER pTimer) +{ +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackDiscardAclData() ==>\n")); + + RTPRINT(FIOCTL, (IOCTL_CALLBACK_FUN|IOCTL_BT_LOGO), ("Flush Timeout ==>\n")); + if (bthci_DiscardTxPackets(padapter, pBtHciInfo->FLTO_LLH)) + { + bthci_EventFlushOccurred(padapter, pBtHciInfo->FLTO_LLH); + } + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackDiscardAclData() <==\n")); +} + +void bthci_TimerCallbackPsDisable(PRT_TIMER pTimer) +{ +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTinfo = GET_BT_INFO(padapter); + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackPsDisable() ==>\n")); + + PlatformScheduleWorkItem(&(pBTinfo->BTPsDisableWorkItem)); + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackPsDisable() <==\n")); +} + +void bthci_TimerCallbackJoinTimeout(PRT_TIMER pTimer) +{ +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 CurrentEntry = pBtMgnt->CurrentConnectEntryNum; + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackJoinTimeout() ==> Current State %x\n",pBTInfo->BtAsocEntry[CurrentEntry].BtCurrentState)); + + if (pBTInfo->BtAsocEntry[CurrentEntry].BtCurrentState == HCI_STATE_STARTING) + { + bthci_StateStarting(padapter, STATE_CMD_CONNECT_ACCEPT_TIMEOUT,CurrentEntry); + } + else if (pBTInfo->BtAsocEntry[CurrentEntry].BtCurrentState == HCI_STATE_CONNECTING) + { + bthci_StateConnecting(padapter, STATE_CMD_CONNECT_ACCEPT_TIMEOUT,CurrentEntry); + } + else if (pBTInfo->BtAsocEntry[CurrentEntry].BtCurrentState == HCI_STATE_AUTHENTICATING) + { + bthci_StateAuth(padapter, STATE_CMD_CONNECT_ACCEPT_TIMEOUT,CurrentEntry); + } + else + { + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackJoinTimeout() <== No Such state!!!\n")); + } + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackJoinTimeout() <==\n")); +} + +void bthci_TimerCallbackSendTestPacket(PRT_TIMER pTimer) +{ +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackSendTestPacket() \n")); + if (pBtHciInfo->bTestIsEnd || !pBtHciInfo->bInTestMode) + { + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackSendTestPacket() <==bTestIsEnd\n")); + return; + } + +// BTPKT_SendTestPacket(padapter); // not porting yet + PlatformSetTimer(padapter, &pBTInfo->BTTestSendPacketTimer, 50); + RTPRINT(FIOCTL, IOCTL_CALLBACK_FUN, ("bthci_TimerCallbackSendTestPacket() <==\n")); +} + +void bthci_TimerCallbackBTSupervisionPacket(PRT_TIMER pTimer) +{ +#if 0 // not porting yet +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 i; + u8 isQosdata = _TRUE; + int EntryTimer=5000; + u32 EntryTOCnt = 0; + int callBackTimer=1000; + + + if (pBTInfo->BTBeaconTmrOn) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT] stop beacon timer\n")); + pBTInfo->BTBeaconTmrOn = _FALSE; + PlatformCancelTimer(padapter, &(pBTInfo->BTBeaconTimer)); + } + + for (i=0; i<MAX_BT_ASOC_ENTRY_NUM; i++) + { + if (pBTInfo->BtAsocEntry[i].b4waySuccess) + { + if (pBTInfo->BtAsocEntry[i].NoRxPktCnt) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("BtAsocEntry[%d].NoRxPktCnt = %ld\n", i, pBTInfo->BtAsocEntry[i].NoRxPktCnt)); + } + EntryTimer = ((pBTInfo->BtAsocEntry[i].PhyLinkCmdData.LinkSuperversionTimeout*625)/1000); + EntryTOCnt = (EntryTimer/callBackTimer); + { + if (pBtMgnt->bStartSendSupervisionPkt) + { + if (pBTInfo->BtAsocEntry[i].BtCurrentState == HCI_STATE_CONNECTED) + { + + if (pBTInfo->BtAsocEntry[i].NoRxPktCnt >= 4) // start to send supervision packet + { + isQosdata = _FALSE; + if (pBTInfo->BtAsocEntry[i].AMPRole == AMP_BTAP_JOINER) + { + if (pBtMgnt->bssDesc.BssQos.bdQoSMode > QOS_DISABLE) + isQosdata = _TRUE; + } + else if (pBTInfo->BtAsocEntry[i].AMPRole == AMP_BTAP_CREATOR) + { + if (pBTInfo->BtAsocEntry[i].bPeerQosSta) + isQosdata = _TRUE; + } + BTPKT_SendLinkSupervisionPacket(padapter, _TRUE, i, isQosdata); + } + + if (pBTInfo->BtAsocEntry[i].bSendSupervisionPacket) + { + if (pBTInfo->BtAsocEntry[i].NoRxPktCnt >= EntryTOCnt) + { + pBTInfo->BtAsocEntry[i].PhyLinkDisconnectReason=HCI_STATUS_CONNECT_TIMEOUT; + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("No Link supervision Packet received within %d Sec !!!!\n",(EntryTimer/1000))); + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT AMPStatus], set to invalid in bthci_TimerCallbackBTSupervisionPacket()\n")); + BTHCI_EventAMPStatusChange(padapter, AMP_STATUS_NO_CAPACITY_FOR_BT); + } + } + else + { + pBTInfo->BtAsocEntry[i].bSendSupervisionPacket = _TRUE; + } + } + } + } + pBTInfo->BtAsocEntry[i].NoRxPktCnt++; + } + } + + PlatformSetTimer(padapter, &pBTInfo->BTSupervisionPktTimer, callBackTimer); +#endif +} + +void bthci_TimerCallbackBTAuthTimeout(PRT_TIMER pTimer) +{ +#if 0 // not porting yet +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBtInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBtInfo->BtMgnt; + u8 arSeq, arAlg, AuthStatusCode; + OCTET_STRING OurCText; + u8 arChalng[128]; + + switch (pBtMgnt->BTCurrentConnectType) + { + case BT_CONNECT_AUTH_REQ: + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackBTAuthTimeout==> BT_CONNECT_AUTH_REQ\n")); + if (pBtMgnt->BTReceiveConnectPkt! = BT_CONNECT_AUTH_RSP) + { + if (pBtMgnt->BTAuthCount < BTMaxAuthCount) + { + FillOctetString(OurCText, pMgntInfo->arChalng, 0); + + arAlg = OPEN_SYSTEM; + AuthStatusCode = StatusCode_success; + arSeq = 1; + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackBTAuthTimeout==> Re Send Auth Req %d\n", pBtMgnt->BTAuthCount)); + BTPKT_SendAuthenticatePacket( + padapter, + pBtInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].BTRemoteMACAddr, // auStaAddr, + arAlg, // AuthAlg, + arSeq, // AuthSeq, + AuthStatusCode, // AuthStatusCode + OurCText // AuthChallengetext + ); + + pBtMgnt->BTAuthCount++; + + PlatformSetTimer(padapter, &pBtInfo->BTAuthTimeoutTimer, 200); + } + else + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackBTAuthTimeout==> Reach BTMaxAuthCount\n")); + } + } + + break; + } + case BT_CONNECT_AUTH_RSP: + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackBTAuthTimeout==> BT_CONNECT_AUTH_RSP\n")); + if (pBtMgnt->BTReceiveConnectPkt != BT_CONNECT_ASOC_REQ) + { + if (pBtMgnt->BTAuthCount < BTMaxAuthCount) + { + OurCText.Length = 0; + OurCText.Octet = arChalng; + + arAlg = OPEN_SYSTEM; + + AuthStatusCode = StatusCode_success; + // Send auth frame. + BTPKT_SendAuthenticatePacket( + padapter, + pBtInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].BTRemoteMACAddr, // auStaAddr, + arAlg, // AuthAlg, + 2, // AuthSeq, + AuthStatusCode, // AuthStatusCode + OurCText // AuthChallengetext + ); + + pBtMgnt->BTAuthCount++; + } + else + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackBTAuthTimeout==> Reach BTMaxAuthCount\n")); + } + } + + break; + } + default: + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackBTAuthTimeout==> No Such Connect Type %d !!!!!!\n", pBtMgnt->BTCurrentConnectType)); + break; + } + } +#endif +} + +void bthci_TimerCallbackAsocTimeout(PRT_TIMER pTimer) +{ +#if 0 // not porting yet +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBtInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBtInfo->BtMgnt; + + switch (pBtMgnt->BTCurrentConnectType) + { + case BT_CONNECT_ASOC_REQ: + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackAsocTimeout==> BT_CONNECT_ASOC_REQ\n")); + if (pBtMgnt->BTReceiveConnectPkt! = BT_CONNECT_ASOC_RSP) + { + if (pBtMgnt->BTAsocCount < BTMaxAsocCount) + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackAsocTimeout==> Re Send Asoc Req %d\n", pBtMgnt->BTAsocCount)); + BTPKT_SendAssociateReq( + padapter, + pBtInfo->BtAsocEntry[pBtMgnt->CurrentConnectEntryNum].BTRemoteMACAddr, + pMgntInfo->mCap, + ASSOC_REQ_TIMEOUT, + pBtMgnt->CurrentConnectEntryNum); + + pBtMgnt->BTAsocCount++; + + PlatformSetTimer(padapter, &pBtInfo->BTAsocTimeoutTimer, 200); + } + else + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackAsocTimeout==> Reach BTMaxAuthCount\n")); + } + } + break; + } + case BT_CONNECT_ASOC_RSP: + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackAsocTimeout==> BT_CONNECT_ASOC_RSP\n")); + break; + } + default: + { + RTPRINT(FIOCTL, (IOCTL_STATE|IOCTL_BT_LOGO), ("bthci_TimerCallbackAsocTimeout==> No Such Connect Type %d !!!!!!\n", pBtMgnt->BTCurrentConnectType)); + break; + } + } +#endif +} + +void bthci_TimerCallbackDisconnectPhysicalLink(PRT_TIMER pTimer) +{ +// PADAPTER padapter = (PADAPTER)pTimer->padapter; + PADAPTER padapter = (PADAPTER)pTimer; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RT_TRACE(COMP_MLME, DBG_WARNING, ("===>bthci_TimerCallbackDisconnectPhysicalLink\n")); + + if (pBTInfo->BtAsocEntry[pBtMgnt->DisconnectEntryNum].BtCurrentState == HCI_STATE_CONNECTED) + { + BTHCI_SM_WITH_INFO(padapter,HCI_STATE_CONNECTED,STATE_CMD_DISCONNECT_PHY_LINK, pBtMgnt->DisconnectEntryNum); + } + + BTHCI_EventNumOfCompletedDataBlocks(padapter); + pBtMgnt->DisconnectEntryNum = 0xff; + RT_TRACE(COMP_MLME, DBG_WARNING, ("<===bthci_TimerCallbackDisconnectPhysicalLink\n")); + +} + +u8 bthci_WaitForRfReady(PADAPTER padapter) +{ + u8 bRet = _FALSE; + +// PRT_POWER_SAVE_CONTROL pPSC = GET_POWER_SAVE_CONTROL(&(padapter->MgntInfo)); + struct pwrctrl_priv *ppwrctrl = adapter_to_pwrctl(padapter); + rt_rf_power_state RfState; + u32 waitcnt = 0; + + while(1) + { +// rtw_hal_get_hwreg(padapter, HW_VAR_RF_STATE, (u8*)(&RfState)); + RfState = ppwrctrl->rf_pwrstate; + +// if ((RfState != eRfOn) || (pPSC->bSwRfProcessing)) + if ((RfState != rf_on) || (ppwrctrl->bips_processing)) + { + rtw_mdelay_os(10); + if (waitcnt++ >= 200) + { +// RT_ASSERT(_FALSE, ("bthci_WaitForRfReady(), wait for RF ON timeout\n")); + bRet = _FALSE; + break; + } + } + else + { + RTPRINT(FIOCTL, IOCTL_STATE, ("bthci_WaitForRfReady(), Rf is on, wait %d times\n", waitcnt)); + bRet = _TRUE; + break; + } + } + + return bRet; +} + +void bthci_WorkItemCallbackPsDisable(void *pContext) +{ + PADAPTER padapter = (PADAPTER)pContext; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + u8 CurrentAssocNum; + + for (CurrentAssocNum=0; CurrentAssocNum<MAX_BT_ASOC_ENTRY_NUM; CurrentAssocNum++) + { + if (pBTInfo->BtAsocEntry[CurrentAssocNum].bUsed == _TRUE) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("WorkItemCallbackPsDisable(): Handle Associate Entry %d\n", CurrentAssocNum)); + + if (pBTInfo->BtAsocEntry[CurrentAssocNum].AMPRole == AMP_BTAP_CREATOR) + { +// BTPKT_StartBeacon(padapter, CurrentAssocNum); // not porting yet + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_CONNECTING, STATE_CMD_MAC_CONNECT_COMPLETE, CurrentAssocNum); + } + else if (pBTInfo->BtAsocEntry[CurrentAssocNum].AMPRole == AMP_BTAP_JOINER) + { + bthci_WaitForRfReady(padapter); + bthci_ResponderStartToScan(padapter); + } + } + } +} + +void bthci_WorkItemCallbackHCICmd(void *pContext) +{ + PlatformProcessHCICommands(pContext); +} + +void bthci_WorkItemCallbackSendACLData(void *pContext) +{ +#if (SENDTXMEHTOD == 0) + PADAPTER padapter = (PADAPTER)pContext; +#if 0 //cosa for special logo test case + if (acldata_cnt >= 2) +#endif + PlatformTxBTQueuedPackets(padapter); +#endif +} + +void bthci_WorkItemCallbackConnect(void *pContext) +{ + PADAPTER padapter = (PADAPTER)pContext; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + +// BTPKT_JoinerConnectProcess(padapter, pBtMgnt->CurrentConnectEntryNum); // not porting yet +} + +u8 BTHCI_GetConnectEntryNum(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + return bthci_GetCurrentEntryNum(padapter, pBtMgnt->BtCurrentPhyLinkhandle); +} + +u8 BTHCI_GetCurrentEntryNumByMAC(PADAPTER padapter, u8 *SA) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + u8 i; + + for (i=0; i<MAX_BT_ASOC_ENTRY_NUM; i++) + { + if (pBTInfo->BtAsocEntry[i].bUsed == _TRUE) + { + if (_rtw_memcmp(pBTInfo->BtAsocEntry[i].BTRemoteMACAddr, SA, 6) == _TRUE) + { + return i; + } + } + } + return 0xFF; +} + +void BTHCI_StatusWatchdog(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct pwrctrl_priv *ppwrctrl = adapter_to_pwrctl(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_TRAFFIC pBtTraffic = &pBTInfo->BtTraffic; + u8 bRfOff=_FALSE, bTxBusy = _FALSE, bRxBusy = _FALSE; + +#if 0 // test only + u8 testbuf[100]={0}; + PRTK_DBG_CTRL_OIDS pDbgCtrl; + PPACKET_IRP_HCICMD_DATA pHCICMD; + u32 a,b; + u16 * pu2Tmp; + + pDbgCtrl = (PRTK_DBG_CTRL_OIDS)testbuf; + pDbgCtrl->ctrlType = 0; + pHCICMD = (PPACKET_IRP_HCICMD_DATA)&pDbgCtrl->CtrlData; + pHCICMD->OCF = OGF_EXTENSION; + pHCICMD->OGF = HCI_LINK_STATUS_NOTIFY; + pHCICMD->Length = 5; + pHCICMD->Data[0] = 0x1; + //pu2Tmp = + *((u16*)&pHCICMD->Data[1]) = 0x0205; + //*pu2Tmp = 0x0205; + pHCICMD->Data[3] = 0x3; + pHCICMD->Data[4] = 0x2; + pDbgCtrl->ctrlDataLen = pHCICMD->Length+3; + OIDS_RTKDbgControl(padapter, testbuf, pDbgCtrl->ctrlDataLen+4, &a, &b); +#endif + +#if 0 + if ((pMgntInfo->RfOffReason & RF_CHANGE_BY_HW) || + (pMgntInfo->RfOffReason & RF_CHANGE_BY_SW)) +#else + if ((ppwrctrl->rfoff_reason & RF_CHANGE_BY_HW) || + (ppwrctrl->rfoff_reason & RF_CHANGE_BY_SW)) +#endif + bRfOff = _TRUE; + +#if 0 + if (!MgntRoamingInProgress(pMgntInfo) && + !MgntIsLinkInProgress(pMgntInfo) && + !MgntScanInProgress(pMgntInfo) && +#else + if ((BTDM_CheckFWState(padapter, WIFI_REASOC_STATE|WIFI_UNDER_LINKING|WIFI_SITE_MONITOR) == _FALSE) && +#endif + !bRfOff) + { + static u8 BTwaitcnt=0; + if (pBtMgnt->BTNeedAMPStatusChg) + { + BTwaitcnt++; + if (BTwaitcnt >= 2) + { + BTHCI_EventAMPStatusChange(padapter, AMP_STATUS_FULL_CAPACITY_FOR_BT); + BTwaitcnt = 0; + } + } + } + + RTPRINT(FIOCTL, IOCTL_BT_TP, ("[BT traffic], TxPktCntInPeriod=%d, TxPktLenInPeriod=%"i64fmt"d\n", + pBtTraffic->Bt30TrafficStatistics.TxPktCntInPeriod, + pBtTraffic->Bt30TrafficStatistics.TxPktLenInPeriod)); + RTPRINT(FIOCTL, IOCTL_BT_TP, ("[BT traffic], RxPktCntInPeriod=%d, RxPktLenInPeriod=%"i64fmt"d\n", + pBtTraffic->Bt30TrafficStatistics.RxPktCntInPeriod, + pBtTraffic->Bt30TrafficStatistics.RxPktLenInPeriod)); + if (pBtTraffic->Bt30TrafficStatistics.TxPktCntInPeriod > 100 || + pBtTraffic->Bt30TrafficStatistics.RxPktCntInPeriod > 100 ) + { + if (pBtTraffic->Bt30TrafficStatistics.RxPktLenInPeriod > pBtTraffic->Bt30TrafficStatistics.TxPktLenInPeriod) + bRxBusy = _TRUE; + else if (pBtTraffic->Bt30TrafficStatistics.TxPktLenInPeriod > pBtTraffic->Bt30TrafficStatistics.RxPktLenInPeriod) + bTxBusy = _TRUE; + } + + pBtTraffic->Bt30TrafficStatistics.TxPktCntInPeriod = 0; + pBtTraffic->Bt30TrafficStatistics.RxPktCntInPeriod = 0; + pBtTraffic->Bt30TrafficStatistics.TxPktLenInPeriod = 0; + pBtTraffic->Bt30TrafficStatistics.RxPktLenInPeriod = 0; + pBtTraffic->Bt30TrafficStatistics.bTxBusyTraffic = bTxBusy; + pBtTraffic->Bt30TrafficStatistics.bRxBusyTraffic = bRxBusy; + RTPRINT(FIOCTL, IOCTL_BT_TP, ("[BT traffic], bTxBusyTraffic=%d, bRxBusyTraffic=%d\n", + pBtTraffic->Bt30TrafficStatistics.bTxBusyTraffic, + pBtTraffic->Bt30TrafficStatistics.bRxBusyTraffic)); +} + +void +BTHCI_NotifyRFState( + PADAPTER padapter, + rt_rf_power_state StateToSet, + RT_RF_CHANGE_SOURCE ChangeSource + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + RT_RF_CHANGE_SOURCE RfOffReason = pMgntInfo->RfOffReason; +#else + struct pwrctrl_priv *ppwrctrl = adapter_to_pwrctl(padapter); + RT_RF_CHANGE_SOURCE RfOffReason = ppwrctrl->rfoff_reason; +#endif + + RTPRINT(FIOCTL, IOCTL_STATE, ("BTHCI_NotifyRFState(), Old RfOffReason = 0x%x, ChangeSource = 0x%x\n", RfOffReason, ChangeSource)); + if (ChangeSource < RF_CHANGE_BY_HW) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("BTHCI_NotifyRFState(), ChangeSource < RF_CHANGE_BY_HW\n")); + return; + } + + // + // When RF is on/off by HW/SW(IPS/LPS not included), we have to notify + // core stack the AMP_Status + // + + // We only have to check RF On/Off by HW/SW + RfOffReason &= (RF_CHANGE_BY_HW|RF_CHANGE_BY_SW); + + switch (StateToSet) + { + case rf_on: + if (RfOffReason) + { + // + // Previously, HW or SW Rf state is OFF, check if it is turned on by HW/SW + // + RfOffReason &= ~ChangeSource; + if (!RfOffReason) + { + // Both HW/SW Rf is turned on + RTPRINT(FIOCTL, IOCTL_STATE, ("BTHCI_NotifyRFState(), Rf is turned On!\n")); + BTHCI_EventAMPStatusChange(padapter, AMP_STATUS_FULL_CAPACITY_FOR_BT); + } + } + break; + + case rf_off: + if (!RfOffReason) + { + // + // Previously, both HW/SW Rf state is ON, check if it is turned off by HW/SW + // + RTPRINT(FIOCTL, IOCTL_STATE, ("BTHCI_NotifyRFState(), Rf is turned Off!\n")); + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT AMPStatus], set to invalid in BTHCI_NotifyRFState()\n")); + BTHCI_EventAMPStatusChange(padapter, AMP_STATUS_NO_CAPACITY_FOR_BT); + } + break; + + default: + RTPRINT(FIOCTL, IOCTL_STATE, ("Unknown case!! \n")); + break; + } +} + +void +BTHCI_IndicateAMPStatus( + PADAPTER padapter, + u8 JoinAction, + u8 channel + ) +{ +// PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 bNeedIndicate = _FALSE; + + RTPRINT(FIOCTL, IOCTL_STATE, ("JoinAction=%d, bssDesc->bdDsParms.ChannelNumber=%d\n", + JoinAction, channel)); + + switch (JoinAction) + { + case RT_JOIN_INFRA: + case RT_JOIN_IBSS: + // + // When join infra or ibss, check if bt channel is the current channel, + // if not, we need to indicate AMPStatus=2 + // + if (channel != pBtMgnt->BTChannel) + bNeedIndicate = _TRUE; + break; + case RT_START_IBSS: + // + // when start IBSS, we need to indicate AMPStatus=2 to + // reset be hw security + // + bNeedIndicate = _TRUE; + break; + case RT_NO_ACTION: + break; + default: + break; + } + + if (bNeedIndicate) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("BTHCI_IndicateAMPStatus(), BT channel=%d, bssDesc->bdDsParms.ChannelNumber=%d\n", + pBtMgnt->BTChannel, channel)); + + if (pBtMgnt->BtOperationOn) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT AMPStatus], set to invalid in JoinRequest()\n")); + BTHCI_EventAMPStatusChange(padapter, AMP_STATUS_NO_CAPACITY_FOR_BT); + } + } +} + +void +BTHCI_EventParse( + PADAPTER padapter, + void *pEvntData, + u32 dataLen + ) +{ + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)pEvntData; + return; + + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("BT Event Code = 0x%x\n", PPacketIrpEvent->EventCode)); + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("BT Event Length = 0x%x\n", PPacketIrpEvent->Length)); + + switch (PPacketIrpEvent->EventCode) + { + case HCI_EVENT_COMMAND_COMPLETE: + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("HCI_EVENT_COMMAND_COMPLETE\n")); + break; + case HCI_EVENT_COMMAND_STATUS: + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_BT_LOGO), ("HCI_EVENT_COMMAND_STATUS\n")); + break; + default: + break; + } +} + +u16 +BTHCI_GetPhysicalLinkHandle( + PADAPTER padapter, + u8 EntryNum + ) +{ + PBT30Info pBTinfo = GET_BT_INFO(padapter); + u16 handle; + + handle = pBTinfo->BtAsocEntry[EntryNum].AmpAsocCmdData.BtPhyLinkhandle; + + return handle; +} + +RT_STATUS +BTHCI_IndicateRxData( + PADAPTER padapter, + void *pData, + u32 dataLen, + u8 EntryNum + ) +{ + RT_STATUS rt_status; + + rt_status = PlatformIndicateBTACLData(padapter, pData, dataLen, EntryNum); + + return rt_status; +} + +void BTHCI_InitializeAllTimer(PADAPTER padapter) +{ + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_SECURITY pBtSec = &pBTinfo->BtSec; + +#if (BT_THREAD == 0) + PlatformInitializeTimer(padapter, &pBTinfo->BTHCICmdTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackHCICmd, NULL, "BTHCICmdTimer"); +#endif +#if (SENDTXMEHTOD == 0) + PlatformInitializeTimer(padapter, &pBTinfo->BTHCISendAclDataTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackSendAclData, NULL, "BTHCISendAclDataTimer"); +#endif + PlatformInitializeTimer(padapter, &pBTinfo->BTHCIDiscardAclDataTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackDiscardAclData, NULL, "BTHCIDiscardAclDataTimer"); + PlatformInitializeTimer(padapter, &pBTinfo->BTHCIJoinTimeoutTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackJoinTimeout, NULL, "BTHCIJoinTimeoutTimer"); + PlatformInitializeTimer(padapter, &pBTinfo->BTTestSendPacketTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackSendTestPacket, NULL, "BTTestSendPacketTimer"); + + PlatformInitializeTimer(padapter, &pBTinfo->BTBeaconTimer, (RT_TIMER_CALL_BACK)BTPKT_TimerCallbackBeacon, NULL, "BTBeaconTimer"); + PlatformInitializeTimer(padapter, &pBtSec->BTWPAAuthTimer, (RT_TIMER_CALL_BACK)BTPKT_TimerCallbackWPAAuth, NULL, "BTWPAAuthTimer"); + PlatformInitializeTimer(padapter, &pBTinfo->BTSupervisionPktTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackBTSupervisionPacket, NULL, "BTGeneralPurposeTimer"); + PlatformInitializeTimer(padapter, &pBTinfo->BTDisconnectPhyLinkTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackDisconnectPhysicalLink, NULL, "BTDisconnectPhyLinkTimer"); + PlatformInitializeTimer(padapter, &pBTinfo->BTPsDisableTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackPsDisable, NULL, "BTPsDisableTimer"); + PlatformInitializeTimer(padapter, &pBTinfo->BTAuthTimeoutTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackBTAuthTimeout, NULL, "BTAuthTimeoutTimer"); + PlatformInitializeTimer(padapter, &pBTinfo->BTAsocTimeoutTimer, (RT_TIMER_CALL_BACK)bthci_TimerCallbackAsocTimeout, NULL, "BTAsocTimeoutTimer"); +} + +void BTHCI_CancelAllTimer(PADAPTER padapter) +{ + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_SECURITY pBtSec = &pBTinfo->BtSec; + + // Note: don't cancel BTHCICmdTimer, if you cancel this timer, there will + // have posibility to cause irp not completed. +#if (SENDTXMEHTOD == 0) + PlatformCancelTimer(padapter, &pBTinfo->BTHCISendAclDataTimer); +#endif + PlatformCancelTimer(padapter, &pBTinfo->BTHCIDiscardAclDataTimer); + PlatformCancelTimer(padapter, &pBTinfo->BTHCIJoinTimeoutTimer); + PlatformCancelTimer(padapter, &pBTinfo->BTTestSendPacketTimer); + + PlatformCancelTimer(padapter, &pBTinfo->BTBeaconTimer); + PlatformCancelTimer(padapter, &pBtSec->BTWPAAuthTimer); + PlatformCancelTimer(padapter, &pBTinfo->BTSupervisionPktTimer); + PlatformCancelTimer(padapter, &pBTinfo->BTDisconnectPhyLinkTimer); + PlatformCancelTimer(padapter, &pBTinfo->BTPsDisableTimer); + PlatformCancelTimer(padapter, &pBTinfo->BTAuthTimeoutTimer); + PlatformCancelTimer(padapter, &pBTinfo->BTAsocTimeoutTimer); +} + +void BTHCI_ReleaseAllTimer(PADAPTER padapter) +{ + PBT30Info pBTinfo = GET_BT_INFO(padapter); + PBT_SECURITY pBtSec = &pBTinfo->BtSec; + +#if (BT_THREAD == 0) + PlatformReleaseTimer(padapter, &pBTinfo->BTHCICmdTimer); +#endif +#if (SENDTXMEHTOD == 0) + PlatformReleaseTimer(padapter, &pBTinfo->BTHCISendAclDataTimer); +#endif + PlatformReleaseTimer(padapter, &pBTinfo->BTHCIDiscardAclDataTimer); + PlatformReleaseTimer(padapter, &pBTinfo->BTHCIJoinTimeoutTimer); + PlatformReleaseTimer(padapter, &pBTinfo->BTTestSendPacketTimer); + + PlatformReleaseTimer(padapter, &pBTinfo->BTBeaconTimer); + PlatformReleaseTimer(padapter, &pBtSec->BTWPAAuthTimer); + PlatformReleaseTimer(padapter, &pBTinfo->BTSupervisionPktTimer); + PlatformReleaseTimer(padapter, &pBTinfo->BTDisconnectPhyLinkTimer); + PlatformReleaseTimer(padapter, &pBTinfo->BTAuthTimeoutTimer); + PlatformReleaseTimer(padapter, &pBTinfo->BTAsocTimeoutTimer); + PlatformReleaseTimer(padapter, &pBTinfo->BTPsDisableTimer); +} + +void BTHCI_InitializeAllWorkItem(PADAPTER padapter) +{ + PBT30Info pBTinfo = GET_BT_INFO(padapter); +#if (BT_THREAD == 0) + PlatformInitializeWorkItem( + padapter, + &(pBTinfo->HCICmdWorkItem), + (RT_WORKITEM_CALL_BACK)bthci_WorkItemCallbackHCICmd, + (PVOID)padapter, + "HCICmdWorkItem"); +#endif +#if (SENDTXMEHTOD == 0) + PlatformInitializeWorkItem( + padapter, + &(pBTinfo->HCISendACLDataWorkItem), + (RT_WORKITEM_CALL_BACK)bthci_WorkItemCallbackSendACLData, + (PVOID)padapter, + "HCISendACLDataWorkItem"); +#endif + PlatformInitializeWorkItem( + padapter, + &(pBTinfo->BTPsDisableWorkItem), + (RT_WORKITEM_CALL_BACK)bthci_WorkItemCallbackPsDisable, + (PVOID)padapter, + "BTPsDisableWorkItem"); + + PlatformInitializeWorkItem( + padapter, + &(pBTinfo->BTConnectWorkItem), + (RT_WORKITEM_CALL_BACK)bthci_WorkItemCallbackConnect, + (PVOID)padapter, + "BTConnectWorkItem"); +} + +void BTHCI_FreeAllWorkItem(PADAPTER padapter) +{ + PBT30Info pBTinfo = GET_BT_INFO(padapter); +#if (BT_THREAD == 0) + PlatformFreeWorkItem(&(pBTinfo->HCICmdWorkItem)); +#endif +#if (SENDTXMEHTOD == 0) + PlatformFreeWorkItem(&(pBTinfo->HCISendACLDataWorkItem)); +#endif + PlatformFreeWorkItem(&(pBTinfo->BTPsDisableWorkItem)); + PlatformFreeWorkItem(&(pBTinfo->BTConnectWorkItem)); +} + +void BTHCI_Reset(PADAPTER padapter) +{ + bthci_CmdReset(padapter, _FALSE); +} + +u8 BTHCI_HsConnectionEstablished(PADAPTER padapter) +{ + u8 bBtConnectionExist = _FALSE; + PBT30Info pBtinfo = GET_BT_INFO(padapter); + u8 i; + + for (i=0; i<MAX_BT_ASOC_ENTRY_NUM; i++) + { + if (pBtinfo->BtAsocEntry[i].b4waySuccess == _TRUE) + { + bBtConnectionExist = _TRUE; + break; + } + } + +// RTPRINT(FIOCTL, IOCTL_STATE, (" BTHCI_HsConnectionEstablished(), connection exist = %d\n", bBtConnectionExist)); + + return bBtConnectionExist; +} + +u8 +BTHCI_CheckProfileExist( + PADAPTER padapter, + BT_TRAFFIC_MODE_PROFILE Profile + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 IsPRofile = _FALSE; + u8 i=0; + + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + if (pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile == Profile) + { + IsPRofile=_TRUE; + break; + } + } + + return IsPRofile; +} + +u8 BTHCI_GetBTCoreSpecByProf(PADAPTER padapter, u8 profile) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 btSpec = BT_SPEC_1_2; + u8 i = 0; + + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + if (pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile == profile) + { + btSpec = pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec; + break; + } + } + + return btSpec; +} + + +void BTHCI_GetProfileNameMoto(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 i = 0; + u8 InCommingMode = 0,OutGoingMode = 0,ScoMode = 0; + + + ScoMode = pBtMgnt->ExtConfig.NumberOfSCO; + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], NumberOfHandle = %d, NumberOfSCO = %d\n", + pBtMgnt->ExtConfig.NumberOfHandle, pBtMgnt->ExtConfig.NumberOfSCO)); + + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + InCommingMode=pBtMgnt->ExtConfig.linkInfo[i].IncomingTrafficMode; + OutGoingMode=pBtMgnt->ExtConfig.linkInfo[i].OutgoingTrafficMode; + + if (ScoMode) + { + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = BT_PROFILE_SCO; + } + else if ((InCommingMode == BT_MOTOR_EXT_BE) && (OutGoingMode == BT_MOTOR_EXT_BE)) + { + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = BT_PROFILE_PAN; + } + else if ((InCommingMode == BT_MOTOR_EXT_GULB) && (OutGoingMode == BT_MOTOR_EXT_GULB)) + { + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = BT_PROFILE_A2DP; + } + else if ((InCommingMode == BT_MOTOR_EXT_GUL) && (OutGoingMode == BT_MOTOR_EXT_BE)) + { + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = BT_PROFILE_HID; + } + else + { + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = BT_PROFILE_NONE; + } + } +} + +void BTHCI_UpdateBTProfileRTKToMoto(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 i = 0; + + pBtMgnt->ExtConfig.NumberOfSCO = 0; + + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = BT_PROFILE_NONE; + + if (pBtMgnt->ExtConfig.linkInfo[i].BTProfile == BT_PROFILE_SCO) + { + pBtMgnt->ExtConfig.NumberOfSCO++; + } + + pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile = pBtMgnt->ExtConfig.linkInfo[i].BTProfile; + switch (pBtMgnt->ExtConfig.linkInfo[i].TrafficProfile) + { + case BT_PROFILE_SCO: + break; + case BT_PROFILE_PAN: + pBtMgnt->ExtConfig.linkInfo[i].IncomingTrafficMode = BT_MOTOR_EXT_BE; + pBtMgnt->ExtConfig.linkInfo[i].OutgoingTrafficMode = BT_MOTOR_EXT_BE; + break; + case BT_PROFILE_A2DP: + pBtMgnt->ExtConfig.linkInfo[i].IncomingTrafficMode = BT_MOTOR_EXT_GULB; + pBtMgnt->ExtConfig.linkInfo[i].OutgoingTrafficMode = BT_MOTOR_EXT_GULB; + break; + case BT_PROFILE_HID: + pBtMgnt->ExtConfig.linkInfo[i].IncomingTrafficMode = BT_MOTOR_EXT_GUL; + pBtMgnt->ExtConfig.linkInfo[i].OutgoingTrafficMode = BT_MOTOR_EXT_BE; + break; + default: + break; + } + } + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RTK, NumberOfHandle = %d, NumberOfSCO = %d\n", + pBtMgnt->ExtConfig.NumberOfHandle, pBtMgnt->ExtConfig.NumberOfSCO)); +} + +void BTHCI_GetBTRSSI(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 i = 0; + + //return; + + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + bthci_EventExtGetBTRSSI(padapter, pBtMgnt->ExtConfig.linkInfo[i].ConnectHandle); + } +} + +void BTHCI_WifiScanNotify(PADAPTER padapter, u8 scanType) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bEnableWifiScanNotify) + bthci_EventExtWifiScanNotify(padapter, scanType); +} + +void +BTHCI_StateMachine( + PADAPTER padapter, + u8 StateToEnter, + HCI_STATE_WITH_CMD StateCmd, + u8 EntryNum + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (EntryNum == 0xff) + { + RTPRINT(FIOCTL, IOCTL_STATE, (" StateMachine, error EntryNum=0x%x \n",EntryNum)); + return; + } + RTPRINT(FIOCTL, IOCTL_STATE, (" StateMachine, EntryNum = 0x%x, CurrentState = 0x%x, BtNextState = 0x%x, StateCmd = 0x%x ,StateToEnter = 0x%x\n", + EntryNum,pBTInfo->BtAsocEntry[EntryNum].BtCurrentState,pBTInfo->BtAsocEntry[EntryNum].BtNextState,StateCmd,StateToEnter)); + + if (pBTInfo->BtAsocEntry[EntryNum].BtNextState & StateToEnter) + { + pBTInfo->BtAsocEntry[EntryNum].BtCurrentState = StateToEnter; + + switch (StateToEnter) + { + case HCI_STATE_STARTING: + { + pBTInfo->BtAsocEntry[EntryNum].BtNextState = HCI_STATE_DISCONNECTING | HCI_STATE_CONNECTING; + bthci_StateStarting(padapter,StateCmd,EntryNum); + break; + } + case HCI_STATE_CONNECTING: + { + pBTInfo->BtAsocEntry[EntryNum].BtNextState = HCI_STATE_CONNECTING | HCI_STATE_DISCONNECTING | HCI_STATE_AUTHENTICATING; + bthci_StateConnecting(padapter,StateCmd,EntryNum); + break; + } + + case HCI_STATE_AUTHENTICATING: + { + pBTInfo->BtAsocEntry[EntryNum].BtNextState = HCI_STATE_DISCONNECTING | HCI_STATE_CONNECTED; + bthci_StateAuth(padapter,StateCmd,EntryNum); + break; + } + + case HCI_STATE_CONNECTED: + { + pBTInfo->BtAsocEntry[EntryNum].BtNextState = HCI_STATE_CONNECTED | HCI_STATE_DISCONNECTING; + bthci_StateConnected(padapter,StateCmd,EntryNum); + break; + } + + case HCI_STATE_DISCONNECTING: + { + pBTInfo->BtAsocEntry[EntryNum].BtNextState = HCI_STATE_DISCONNECTED | HCI_STATE_DISCONNECTING; + bthci_StateDisconnecting(padapter,StateCmd,EntryNum); + break; + } + + case HCI_STATE_DISCONNECTED: + { + pBTInfo->BtAsocEntry[EntryNum].BtNextState = HCI_STATE_DISCONNECTED | HCI_STATE_STARTING | HCI_STATE_CONNECTING; + bthci_StateDisconnected(padapter,StateCmd,EntryNum); + break; + } + + default: + RTPRINT(FIOCTL, IOCTL_STATE, (" StateMachine, Unknown state to enter!!!\n")); + break; + } + } + else + { + RTPRINT(FIOCTL, IOCTL_STATE, (" StateMachine, Wrong state to enter\n")); + } + + // 20100325 Joseph: Disable/Enable IPS/LPS according to BT status. + if (!pBtMgnt->bBTConnectInProgress && !pBtMgnt->BtOperationOn) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT PS], IPSReturn()\n")); + IPSReturn(padapter, IPS_DISABLE_BT_ON); + } +} + +void BTHCI_DisconnectPeer(PADAPTER padapter, u8 EntryNum) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, (" BTHCI_DisconnectPeer()\n")); + + BTHCI_SM_WITH_INFO(padapter,HCI_STATE_DISCONNECTING,STATE_CMD_MAC_CONNECT_CANCEL_INDICATE,EntryNum); + + if (pBTInfo->BtAsocEntry[EntryNum].bUsed) + { +// BTPKT_SendDeauthentication(padapter, pBTInfo->BtAsocEntry[EntryNum].BTRemoteMACAddr, unspec_reason); // not porting yet + } + + if (pBtMgnt->bBTConnectInProgress) + { + pBtMgnt->bBTConnectInProgress = _FALSE; + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT Flag], BT Connect in progress OFF!!\n")); + } + + bthci_RemoveEntryByEntryNum(padapter,EntryNum); + + if (pBtMgnt->bNeedNotifyAMPNoCap) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("[BT AMPStatus], set to invalid in BTHCI_DisconnectPeer()\n")); + BTHCI_EventAMPStatusChange(padapter, AMP_STATUS_NO_CAPACITY_FOR_BT); + } +} + +void BTHCI_EventNumOfCompletedDataBlocks(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_HCI_INFO pBtHciInfo = &pBTInfo->BtHciInfo; + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar, *pTriple; + u8 len=0, i, j, handleNum=0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pu2Temp, *pPackets, *pHandle, *pDblocks; + u8 sent = 0; + +#if 0 + PlatformZeroMemory(padapter->IrpHCILocalbuf.Ptr, padapter->IrpHCILocalbuf.Length); + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(buffer); +#else + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); +#endif + + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_NUM_OF_COMPLETE_DATA_BLOCKS)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("[BT event], Num Of Completed DataBlocks, Ignore to send NumOfCompletedDataBlocksEvent due to event mask page 2\n")); + return; + } + + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[0]; + pTriple = &pRetPar[3]; + for (j=0; j<MAX_BT_ASOC_ENTRY_NUM; j++) + { + + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle) + { + handleNum++; + pHandle = (u16*)&pTriple[0]; // Handle[i] + pPackets = (u16*)&pTriple[2]; // Num_Of_Completed_Packets[i] + pDblocks = (u16*)&pTriple[4]; // Num_Of_Completed_Blocks[i] +#if (SENDTXMEHTOD == 0 || SENDTXMEHTOD == 2) + PlatformAcquireSpinLock(padapter, RT_TX_SPINLOCK); +#endif + *pHandle = pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle; + *pPackets = (u16)pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].TxPacketCount; + *pDblocks = (u16)pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].TxPacketCount; + if (pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].TxPacketCount) + { + sent = 1; + RTPRINT(FIOCTL, IOCTL_BT_EVENT_DETAIL, ("[BT event], Num Of Completed DataBlocks, Handle = 0x%x, Num_Of_Completed_Packets = 0x%x, Num_Of_Completed_Blocks = 0x%x\n", + *pHandle, *pPackets, *pDblocks)); + } + pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].TxPacketCount = 0; +#if (SENDTXMEHTOD == 0 || SENDTXMEHTOD == 2) + PlatformReleaseSpinLock(padapter, RT_TX_SPINLOCK); +#endif + len += 6; + pTriple += len; + } + } + } + + pRetPar[2] = handleNum; // Number_of_Handles + len += 1; + pu2Temp = (u16*)&pRetPar[0]; + *pu2Temp = BTTotalDataBlockNum; + len += 2; + + PPacketIrpEvent->EventCode = HCI_EVENT_NUM_OF_COMPLETE_DATA_BLOCKS; + PPacketIrpEvent->Length = len; + if (handleNum && sent) + { + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } +} + +void BTHCI_EventNumOfCompletedPackets(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + u8 localBuf[TmpLocalBufSize] = ""; + u8 *pRetPar, *pDouble; + u8 len=0, i, j, handleNum=0; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + u16 *pPackets, *pHandle; + u8 sent = 0; + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[0]; + pDouble = &pRetPar[1]; + for (j=0; j<MAX_BT_ASOC_ENTRY_NUM; j++) + { + for (i=0; i<MAX_LOGICAL_LINK_NUM; i++) + { + if (pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle) + { + handleNum++; + pHandle = (u16*)&pDouble[0]; // Handle[i] + pPackets = (u16*)&pDouble[2]; // Num_Of_Completed_Packets[i] + PlatformAcquireSpinLock(padapter, RT_TX_SPINLOCK); + *pHandle = pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].BtLogLinkhandle; + *pPackets = (u16)pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].TxPacketCount; + if (pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].TxPacketCount) + sent = 1; + pBTInfo->BtAsocEntry[j].LogLinkCmdData[i].TxPacketCount = 0; + PlatformReleaseSpinLock(padapter, RT_TX_SPINLOCK); + len += 4; + pDouble += len; + } + } + } + + pRetPar[0] = handleNum; // Number_of_Handles + len += 1; + + PPacketIrpEvent->EventCode = HCI_EVENT_NUMBER_OF_COMPLETE_PACKETS; + PPacketIrpEvent->Length = len; + if (handleNum && sent) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("BTHCI_EventNumOfCompletedPackets \n")); + bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2); + } +} + +void +BTHCI_EventAMPStatusChange( + PADAPTER padapter, + u8 AMP_Status + ) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 len = 0; + u8 localBuf[7] = ""; + u8 *pRetPar; + PPACKET_IRP_HCIEVENT_DATA PPacketIrpEvent; + +#if 0 + if (!(pBtHciInfo->BTEventMaskPage2 & EMP2_HCI_EVENT_AMP_STATUS_CHANGE)) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT, ("Ignore to send this event due to event mask page 2\n")); + return; + } +#endif + + if (AMP_Status==AMP_STATUS_NO_CAPACITY_FOR_BT) + { + pBtMgnt->BTNeedAMPStatusChg = _TRUE; + pBtMgnt->bNeedNotifyAMPNoCap = _FALSE; + + BTHCI_DisconnectAll(padapter); + } + else if (AMP_Status == AMP_STATUS_FULL_CAPACITY_FOR_BT) + { + pBtMgnt->BTNeedAMPStatusChg = _FALSE; + } + + PPacketIrpEvent = (PPACKET_IRP_HCIEVENT_DATA)(&localBuf[0]); + // Return parameters starts from here + pRetPar = &PPacketIrpEvent->Data[0]; + + pRetPar[0] = 0; // Status + len += 1; + pRetPar[1] = AMP_Status; // AMP_Status + len += 1; + + PPacketIrpEvent->EventCode = HCI_EVENT_AMP_STATUS_CHANGE; + PPacketIrpEvent->Length = len; + if (bthci_IndicateEvent(padapter, PPacketIrpEvent, len+2) == RT_STATUS_SUCCESS) + { + RTPRINT(FIOCTL, (IOCTL_BT_EVENT|IOCTL_STATE), ("[BT event], AMP Status Change, AMP_Status = %d\n", AMP_Status)); + } +} + +void BTHCI_DisconnectAll(PADAPTER padapter) +{ + PADAPTER pDefaultAdapter = GetDefaultAdapter(padapter); +// PMGNT_INFO pMgntInfo = &(pDefaultAdapter->MgntInfo); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + + u8 i; + + RTPRINT(FIOCTL, IOCTL_STATE, (" DisconnectALL()\n")); + + for (i=0; i<MAX_BT_ASOC_ENTRY_NUM; i++) + { + if (pBTInfo->BtAsocEntry[i].b4waySuccess == _TRUE) + { + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_CONNECTED, STATE_CMD_DISCONNECT_PHY_LINK, i); + } + else if (pBTInfo->BtAsocEntry[i].bUsed == _TRUE) + { + if (pBTInfo->BtAsocEntry[i].BtCurrentState == HCI_STATE_CONNECTING) + { + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_CONNECTING, STATE_CMD_MAC_CONNECT_CANCEL_INDICATE, i); + } + else if (pBTInfo->BtAsocEntry[i].BtCurrentState == HCI_STATE_DISCONNECTING) + { + BTHCI_SM_WITH_INFO(padapter, HCI_STATE_DISCONNECTING, STATE_CMD_MAC_CONNECT_CANCEL_INDICATE, i); + } + } + } +} + +HCI_STATUS +BTHCI_HandleHCICMD( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + HCI_STATUS status = HCI_STATUS_SUCCESS; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("\n")); + RTPRINT(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), ("HCI Command start, OGF=0x%x, OCF=0x%x, Length=0x%x\n", + pHciCmd->OGF, pHciCmd->OCF, pHciCmd->Length)); +#if 0 //for logo special test case only + bthci_UseFakeData(padapter, pHciCmd); +#endif + if (pHciCmd->Length) + { + RTPRINT_DATA(FIOCTL, (IOCTL_BT_HCICMD_DETAIL|IOCTL_BT_LOGO), "HCI Command, Hex Data :\n", + &pHciCmd->Data[0], pHciCmd->Length); + } + if (pHciCmd->OGF == OGF_EXTENSION) + { + if (pHciCmd->OCF == HCI_SET_RSSI_VALUE) + { + RTPRINT(FIOCTL, IOCTL_BT_EVENT_PERIODICAL, ("[BT cmd], ")); + } + else + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT cmd], ")); + } + } + else + { + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("[BT cmd], ")); + } + + pBtDbg->dbgHciInfo.hciCmdCnt++; + + switch (pHciCmd->OGF) + { + case OGF_LINK_CONTROL_COMMANDS: + status = bthci_HandleOGFLinkControlCMD(padapter, pHciCmd); + break; + case OGF_HOLD_MODE_COMMAND: + break; + case OGF_SET_EVENT_MASK_COMMAND: + status = bthci_HandleOGFSetEventMaskCMD(padapter, pHciCmd); + break; + case OGF_INFORMATIONAL_PARAMETERS: + status = bthci_HandleOGFInformationalParameters(padapter, pHciCmd); + break; + case OGF_STATUS_PARAMETERS: + status = bthci_HandleOGFStatusParameters(padapter, pHciCmd); + break; + case OGF_TESTING_COMMANDS: + status = bthci_HandleOGFTestingCMD(padapter, pHciCmd); + break; + case OGF_EXTENSION: + status = bthci_HandleOGFExtension(padapter,pHciCmd); + break; + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI Command(), Unknown OGF = 0x%x\n", pHciCmd->OGF)); + RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_UNKNOWN_COMMAND\n")); + status = bthci_UnknownCMD(padapter, pHciCmd); + break; + } + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_DETAIL, ("HCI Command execution end!!\n")); + + return status; +} + +void +BTHCI_SetLinkStatusNotify( + PADAPTER padapter, + PPACKET_IRP_HCICMD_DATA pHciCmd + ) +{ + bthci_CmdLinkStatusNotify(padapter, pHciCmd); +} + +// ===== End of sync from SD7 driver COMMOM/bt_hci.c ===== +#endif + +#ifdef __HALBTC87231ANT_C__ // HAL/BTCoexist/HalBtc87231Ant.c + +const char *const BtStateString[] = +{ + "BT_DISABLED", + "BT_NO_CONNECTION", + "BT_CONNECT_IDLE", + "BT_INQ_OR_PAG", + "BT_ACL_ONLY_BUSY", + "BT_SCO_ONLY_BUSY", + "BT_ACL_SCO_BUSY", + "BT_ACL_INQ_OR_PAG", + "BT_STATE_NOT_DEFINED" +}; + +extern s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); + +// ===== Below this line is sync from SD7 driver HAL/BTCoexist/HalBtc87231Ant.c ===== + +void +btdm_SetFw50( + PADAPTER padapter, + u8 byte1, + u8 byte2, + u8 byte3 + ) +{ + u8 H2C_Parameter[3] = {0}; + + H2C_Parameter[0] = byte1; + H2C_Parameter[1] = byte2; + H2C_Parameter[2] = byte3; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], FW write 0x50=0x%06x\n", + H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); + + FillH2CCmd(padapter, 0x50, 3, H2C_Parameter); +} + +void btdm_SetFwIgnoreWlanAct(PADAPTER padapter, u8 bEnable) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 H2C_Parameter[1] = {0}; + + if (bEnable) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT Ignore Wlan_Act !!\n")); + H2C_Parameter[0] |= BIT(0); // function enable + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT don't ignore Wlan_Act !!\n")); + } + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, write 0x25=0x%02x\n", + H2C_Parameter[0])); + + FillH2CCmd(padapter, BT_IGNORE_WLAN_ACT_EID, 1, H2C_Parameter); +} + +void btdm_NotifyFwScan(PADAPTER padapter, u8 scanType) +{ + u8 H2C_Parameter[1] = {0}; + + if (scanType == _TRUE) + H2C_Parameter[0] = 0x1; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Notify FW for wifi scan, write 0x3b=0x%02x\n", + H2C_Parameter[0])); + + FillH2CCmd(padapter, 0x3b, 1, H2C_Parameter); +} + +void btdm_1AntSetPSMode(PADAPTER padapter, u8 enable, u8 smartps, u8 mode) +{ + struct pwrctrl_priv *pwrctrl; + + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Current LPS(%s, %d), smartps=%d\n", enable==_TRUE?"ON":"OFF", mode, smartps)); + + pwrctrl = adapter_to_pwrctl(padapter); + + if (enable == _TRUE) { + rtw_set_ps_mode(padapter, PS_MODE_MIN, smartps, mode); + } else { + rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0); + LPS_RF_ON_check(padapter, 100); + } +} + +void btdm_1AntTSFSwitch(PADAPTER padapter, u8 enable) +{ + u8 oldVal, newVal; + + + oldVal = rtw_read8(padapter, 0x550); + + if (enable) + newVal = oldVal | EN_BCN_FUNCTION; + else + newVal = oldVal & ~EN_BCN_FUNCTION; + + if (oldVal != newVal) + rtw_write8(padapter, 0x550, newVal); +} + +u8 btdm_Is1AntPsTdmaStateChange(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_1ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + + + if ((pBtdm8723->bPrePsTdmaOn != pBtdm8723->bCurPsTdmaOn) || + (pBtdm8723->prePsTdma != pBtdm8723->curPsTdma)) + { + return _TRUE; + } + else + { + return _FALSE; + } +} + +void btdm_1AntSetBTCoexTable(PADAPTER padapter, u8 coexCase) +{ + switch (coexCase) + { + case 0: + rtw_write32(padapter, REG_BT_COEX_TABLE_1, 0x55555555); + rtw_write32(padapter, REG_BT_COEX_TABLE_2, 0x55555555); + break; + case 1: + rtw_write32(padapter, REG_BT_COEX_TABLE_1, 0x55555555); + rtw_write32(padapter, REG_BT_COEX_TABLE_2, 0x5afa5afa); + break; + case 2: + rtw_write32(padapter, REG_BT_COEX_TABLE_1, 0x5a5a5a5a); + rtw_write32(padapter, REG_BT_COEX_TABLE_2, 0x5a5a5a5a); + break; + case 3: + rtw_write32(padapter, REG_BT_COEX_TABLE_1, 0xaaaaaaaa); + rtw_write32(padapter, REG_BT_COEX_TABLE_2, 0xaaaaaaaa); + break; + case 4: + rtw_write32(padapter, REG_BT_COEX_TABLE_1, 0xffffffff); + rtw_write32(padapter, REG_BT_COEX_TABLE_2, 0xffffffff); + break; + case 5: + rtw_write32(padapter, REG_BT_COEX_TABLE_1, 0x5fff5fff); + rtw_write32(padapter, REG_BT_COEX_TABLE_2, 0x5fff5fff); + break; + case 6: + rtw_write32(padapter, REG_BT_COEX_TABLE_1, 0x55ff55ff); + rtw_write32(padapter, REG_BT_COEX_TABLE_2, 0x5a5a5a5a); + break; + } +} + +// Before enter TDMA, make sure Power Saving is enable! +void +btdm_1AntPsTdma( + PADAPTER padapter, + u8 bTurnOn, + u8 type + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_1ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], TDMA(%s, %d)\n", (bTurnOn? "ON":"OFF"), type)); + pBtdm8723->bCurPsTdmaOn = bTurnOn; + pBtdm8723->curPsTdma = type; + if (bTurnOn) + { + switch (type) + { + case 1: // A2DP Level-1 or FTP/OPP + default: + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // wide duration for WiFi + BTDM_SetFw3a(padapter, 0xd3, 0x1a, 0x1a, 0x0, 0x50); + btdm_1AntSetBTCoexTable(padapter, 6); + } + break; + case 2: // A2DP Level-2 + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // normal duration for WiFi + BTDM_SetFw3a(padapter, 0xd3, 0x12, 0x12, 0x0, 0x50); + btdm_1AntSetBTCoexTable(padapter, 6); + } + break; + case 3: // BT FTP/OPP + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // normal duration for WiFi + BTDM_SetFw3a(padapter, 0x53, 0x30, 0x03, 0x10, 0x50); + btdm_1AntSetBTCoexTable(padapter, 6); + } + break; + case 4: // for wifi scan & BT is connected + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // protect 3 beacons in 3-beacon period & no Tx pause at BT slot + BTDM_SetFw3a(padapter, 0xd3, 0x15, 0x03, 0x10, 0x0); + btdm_1AntSetBTCoexTable(padapter, 1); + } + break; + case 5: // for WiFi connected-busy & BT is Non-Connected-Idle + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // SCO mode, Ant fixed at WiFi, WLAN_Act toggle + BTDM_SetFw3a(padapter, 0x61, 0x15, 0x03, 0x31, 0x10); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 9: // ACL high-retry type - 2 + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // narrow duration for WiFi + BTDM_SetFw3a(padapter, 0xd3, 0xa, 0xa, 0x0, 0x50); //narrow duration for WiFi + btdm_1AntSetBTCoexTable(padapter, 6); + } + break; + case 10: // for WiFi connect idle & BT ACL busy or WiFi Connected-Busy & BT is Inquiry + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0x13, 0xa, 0xa, 0x0, 0x40); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 11: // ACL high-retry type - 3 + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // narrow duration for WiFi + BTDM_SetFw3a(padapter, 0x53, 0x10, 0x03, 0x10, 0x50); + btdm_1AntSetBTCoexTable(padapter, 6); + } + break; + case 12: // for WiFi Connected-Busy & BT is Connected-Idle + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // Allow High-Pri BT + BTDM_SetFw3a(padapter, 0xeb, 0x0a, 0x03, 0x31, 0x18); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 20: // WiFi only busy ,TDMA mode for power saving + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0x13, 0x25, 0x25, 0x00, 0x00); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 27: // WiFi DHCP/Site Survey & BT SCO busy + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0xa3, 0x25, 0x03, 0x31, 0x98); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 28: // WiFi DHCP/Site Survey & BT idle + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0x69, 0x25, 0x03, 0x31, 0x00); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 29: // WiFi DHCP/Site Survey & BT ACL busy + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0xeb, 0x25, 0x03, 0x11, 0x00); + btdm_1AntSetBTCoexTable(padapter, 1); + } + break; + case 30: // WiFi idle & BT Inquiry + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0xd3, 0x15, 0x03, 0x14, 0x00); + btdm_1AntSetBTCoexTable(padapter, 0); + } + break; + case 31: // BT HID + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0x53, 0x12, 0x12, 0x00, 0x50); + btdm_1AntSetBTCoexTable(padapter, 6); + } + break; + case 32: // BT SCO & Inquiry + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0xa3, 0x0a, 0x03, 0x10, 0x00); + btdm_1AntSetBTCoexTable(padapter, 0); + } + break; + case 33: // BT SCO & WiFi site survey + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0xa3, 0x25, 0x03, 0x30, 0x98); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 34: // BT HID & WiFi site survey + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0xd3, 0x1a, 0x1a, 0x00, 0x10); + btdm_1AntSetBTCoexTable(padapter, 1); + } + break; + case 35: // BT HID & WiFi Connecting + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0xe3, 0x1a, 0x1a, 0x00, 0x10); + btdm_1AntSetBTCoexTable(padapter, 1); + } + break; + case 36: // BT A2DP/FTP/A2DP+HID/FTP+A2DP & WiFi LPS + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0x23, 0x20, 0x00, 0x10, 0x24); + btdm_1AntSetBTCoexTable(padapter, 2); + } + break; + case 37: + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + BTDM_SetFw3a(padapter, 0x53, 0x10, 0x03, 0x10, 0x10); + btdm_1AntSetBTCoexTable(padapter, 6); + } + break; + } + } + else + { + // disable PS-TDMA + switch (type) + { + case 8: + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // Antenna control by PTA, 0x870 = 0x310 + BTDM_SetFw3a(padapter, 0x8, 0x0, 0x0, 0x0, 0x0); + } + break; + case 0: + default: + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // Antenna control by PTA, 0x870 = 0x310 + BTDM_SetFw3a(padapter, 0x0, 0x0, 0x0, 0x8, 0x0); + } + rtw_write16(padapter, 0x860, 0x210); // Switch Antenna to BT + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 0x860=0x210, Switch Antenna to BT\n")); + break; + case 9: + if (btdm_Is1AntPsTdmaStateChange(padapter)) + { + // Antenna control by PTA, 0x870 = 0x310 + BTDM_SetFw3a(padapter, 0x0, 0x0, 0x0, 0x8, 0x0); + } + rtw_write16(padapter, 0x860, 0x110); // Switch Antenna to WiFi + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 0x860=0x110, Switch Antenna to WiFi\n")); + break; + } + btdm_1AntSetBTCoexTable(padapter, 2); + } + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Current TDMA(%s, %d)\n", + pBtdm8723->bCurPsTdmaOn?"ON":"OFF", pBtdm8723->curPsTdma)); + + // update pre state + pBtdm8723->bPrePsTdmaOn = pBtdm8723->bCurPsTdmaOn; + pBtdm8723->prePsTdma = pBtdm8723->curPsTdma; +} + +void _btdm_1AntSetPSTDMA(PADAPTER padapter, u8 bPSEn, u8 smartps, u8 psOption, u8 bTDMAOn, u8 tdmaType) +{ + struct pwrctrl_priv *pwrctrl; + PHAL_DATA_TYPE pHalData; + PBTDM_8723A_1ANT pBtdm8723; + u8 psMode; + u8 bSwitchPS; + + + if ((BTDM_CheckFWState(padapter, WIFI_STATION_STATE) == _FALSE) && + (get_fwstate(&padapter->mlmepriv) != WIFI_NULL_STATE)) + { + btdm_1AntPsTdma(padapter, bTDMAOn, tdmaType); + return; + } + +#ifdef DIS_PS_RX_BCN + psOption &= ~BIT(0); +#endif + + RTPRINT(FBT, BT_TRACE, + ("[BTCoex], Set LPS(%s, %d) TDMA(%s, %d)\n", + bPSEn==_TRUE?"ON":"OFF", psOption, + bTDMAOn==_TRUE?"ON":"OFF", tdmaType)); + + pwrctrl = adapter_to_pwrctl(padapter); + pHalData = GET_HAL_DATA(padapter); + pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + + if (bPSEn == _TRUE) + { + if (_TRUE == pBtdm8723->bWiFiHalt) { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Enable PS Fail, WiFi in Halt!!\n")); + return; + } + + if (_TRUE == pwrctrl->bInSuspend) { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Enable PS Fail, WiFi in Suspend!!\n")); + return; + } + + if (_TRUE == padapter->bDriverStopped) { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Enable PS Fail, WiFi driver stopped!!\n")); + return; + } + + if (_TRUE == padapter->bSurpriseRemoved) { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Enable PS Fail, WiFi Surprise Removed!!\n")); + return; + } + + psMode = PS_MODE_MIN; + } + else + { + psMode = PS_MODE_ACTIVE; + psOption = 0; + } + + if (psMode != pwrctrl->pwr_mode) + bSwitchPS = _TRUE; + else if (psMode != PS_MODE_ACTIVE) + { + if (psOption != pwrctrl->bcn_ant_mode) + bSwitchPS = _TRUE; + else if (smartps != pwrctrl->smart_ps) + bSwitchPS = _TRUE; + else + bSwitchPS = _FALSE; + } + else + bSwitchPS = _FALSE; + + if (_TRUE == bSwitchPS) + { + // disable TDMA + if (pBtdm8723->bCurPsTdmaOn == _TRUE) + { + if (bTDMAOn == _FALSE) + btdm_1AntPsTdma(padapter, _FALSE, tdmaType); + else + { + if ((BT_IsBtDisabled(padapter) == _TRUE) || + (pHalData->bt_coexist.halCoex8723.c2hBtInfo == BT_INFO_STATE_NO_CONNECTION) || + (pHalData->bt_coexist.halCoex8723.c2hBtInfo == BT_INFO_STATE_CONNECT_IDLE) + || (tdmaType == 29)) + btdm_1AntPsTdma(padapter, _FALSE, 9); + else + btdm_1AntPsTdma(padapter, _FALSE, 0); + } + } + + // change Power Save State + btdm_1AntSetPSMode(padapter, bPSEn, smartps, psOption); + } + + btdm_1AntPsTdma(padapter, bTDMAOn, tdmaType); +} + +void btdm_1AntSetPSTDMA(PADAPTER padapter, u8 bPSEn, u8 psOption, u8 bTDMAOn, u8 tdmaType) +{ + _btdm_1AntSetPSTDMA(padapter, bPSEn, 0, psOption, bTDMAOn, tdmaType); +} + +void btdm_1AntWifiParaAdjust(PADAPTER padapter, u8 bEnable) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_1ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + + if (bEnable) + { +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi para adjust enable!!\n")); + pBtdm8723->curWifiPara = 1; + if (pBtdm8723->preWifiPara != pBtdm8723->curWifiPara) + { + BTDM_SetSwPenaltyTxRateAdaptive(padapter, BT_TX_RATE_ADAPTIVE_LOW_PENALTY); + } + } + else + { +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi para adjust disable!!\n")); + pBtdm8723->curWifiPara = 2; + if (pBtdm8723->preWifiPara != pBtdm8723->curWifiPara) + { + BTDM_SetSwPenaltyTxRateAdaptive(padapter, BT_TX_RATE_ADAPTIVE_NORMAL); + } + } + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], preWifiPara = %d, curWifiPara = %d!!\n", +// pBtdm8723->preWifiPara, pBtdm8723->curWifiPara)); +// pBtdm8723->preWifiPara = pBtdm8723->curWifiPara; +} + +void btdm_1AntPtaParaReload(PADAPTER padapter) +{ + // PTA parameter + rtw_write8(padapter, 0x6cc, 0x0); // 1-Ant coex + rtw_write32(padapter, 0x6c8, 0xffff); // wifi break table + rtw_write32(padapter, 0x6c4, 0x55555555); // coex table + + // Antenna switch control parameter + rtw_write32(padapter, 0x858, 0xaaaaaaaa); + if (IS_8723A_A_CUT(GET_HAL_DATA(padapter)->VersionID)) + { + rtw_write32(padapter, 0x870, 0x0); // SPDT(connected with TRSW) control by hardware PTA + rtw_write8(padapter, 0x40, 0x24); + } + else + { + rtw_write8(padapter, 0x40, 0x20); + rtw_write16(padapter, 0x860, 0x210); // set antenna at bt side if ANTSW is software control + rtw_write32(padapter, 0x870, 0x300); // SPDT(connected with TRSW) control by hardware PTA + rtw_write32(padapter, 0x874, 0x22804000); // ANTSW keep by GNT_BT + } + + // coexistence parameters + rtw_write8(padapter, 0x778, 0x1); // enable RTK mode PTA + + // BT don't ignore WLAN_Act + btdm_SetFwIgnoreWlanAct(padapter, _FALSE); +} + +/* + * Return + * 1: upgrade (add WiFi duration time) + * 0: keep + * -1: downgrade (add BT duration time) + */ +s8 btdm_1AntTdmaJudgement(PADAPTER padapter, u8 retry) +{ + PHAL_DATA_TYPE pHalData; + PBTDM_8723A_1ANT pBtdm8723; + static s8 up = 0, dn = 0, m = 1, n = 3, WaitCount= 0; + s8 ret; + + + pHalData = GET_HAL_DATA(padapter); + pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + ret = 0; + + if (pBtdm8723->psTdmaMonitorCnt == 0) + { + up = 0; + dn = 0; + m = 1; + n = 3; + WaitCount = 0; + } + else + { + WaitCount++; + } + + if (retry == 0) // no retry in the last 2-second duration + { + up++; + dn--; + if (dn < 0) dn = 0; + + if (up >= 3*m) + { + // retry=0 in consecutive 3m*(2s), add WiFi duration + ret = 1; + + n = 3; + up = 0; + dn = 0; + WaitCount = 0; + } + } + else if (retry <= 3) // retry<=3 in the last 2-second duration + { + up--; + dn++; + if (up < 0) up = 0; + + if (dn == 2) + { + // retry<=3 in consecutive 2*(2s), minus WiFi duration (add BT duration) + ret = -1; + + // record how many time downgrad WiFi duration + if (WaitCount <= 2) + m++; + else + m = 1; + // the max number of m is 20 + // the longest time of upgrade WiFi duration is 20*3*2s = 120s + if (m >= 20) m = 20; + + up = 0; + dn = 0; + WaitCount = 0; + } + } + else // retry count > 3 + { + // retry>3, minus WiFi duration (add BT duration) + ret = -1; + + // record how many time downgrad WiFi duration + if (WaitCount == 1) + m++; + else + m = 1; + if (m >= 20) m = 20; + + up = 0; + dn = 0; + WaitCount = 0; + } + + return ret; +} + +void btdm_1AntTdmaDurationAdjustForACL(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_1ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], %s\n", __FUNCTION__)); + if (pBtdm8723->psTdmaGlobalCnt != pBtdm8723->psTdmaMonitorCnt) + { + pBtdm8723->psTdmaMonitorCnt = 0; + pBtdm8723->psTdmaGlobalCnt = 0; + } + if (pBtdm8723->psTdmaMonitorCnt == 0) + { +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, first time execute!!\n")); + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 9); + if(pHalData->bt_coexist.halCoex8723.btInfoExt){ + pBtdm8723->psTdmaDuAdjType = 9; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, limit to type9 \n")); + } + else + pBtdm8723->psTdmaDuAdjType = 2; + } + else + { + // Now we only have 4 level Ps Tdma, + // if that's not the following 4 level(will changed by wifi scan, dhcp...), + // then we have to adjust it back to the previous record one. + if ((pBtdm8723->curPsTdma != 1) && + (pBtdm8723->curPsTdma != 2) && + (pBtdm8723->curPsTdma != 9) && + (pBtdm8723->curPsTdma != 11)) + { +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], tdma adjust type can only be 1/2/9/11 !!!\n")); +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], the latest adjust type = %d\n", pBtdm8723->psTdmaDuAdjType)); + + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, pBtdm8723->psTdmaDuAdjType); + } + else + { + s32 judge = 0; + + judge = btdm_1AntTdmaJudgement(padapter, pHalData->bt_coexist.halCoex8723.btRetryCnt); + if (judge == -1) + { +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, Upgrade WiFi duration\n")); + if (pBtdm8723->curPsTdma == 1) + { + // Decrease WiFi duration for high BT retry + if(pHalData->bt_coexist.halCoex8723.btInfoExt){ + pBtdm8723->psTdmaDuAdjType = 9; +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, limit to type9 \n")); + } + else + pBtdm8723->psTdmaDuAdjType = 2; + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, pBtdm8723->psTdmaDuAdjType); + + } + else if (pBtdm8723->curPsTdma == 2) + { + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 9); + pBtdm8723->psTdmaDuAdjType = 9; + } + else if (pBtdm8723->curPsTdma == 9) + { + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + } + else if (judge == 1) + { +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, Downgrade WiFi duration!!\n")); + + if (pBtdm8723->curPsTdma == 11) + { + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 9); + pBtdm8723->psTdmaDuAdjType = 9; + } + else if (pBtdm8723->curPsTdma == 9) + { + if ((pHalData->bt_coexist.halCoex8723.btInfoExt) || (pHalData->bt_coexist.halCoex8723.btRssi <= 32)){ + pBtdm8723->psTdmaDuAdjType = 9; +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, limit to type9 \n")); + } + else + pBtdm8723->psTdmaDuAdjType = 2; + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, pBtdm8723->psTdmaDuAdjType); + } + else if (pBtdm8723->curPsTdma == 2) + { + if ((pHalData->bt_coexist.halCoex8723.btInfoExt) || (pHalData->bt_coexist.halCoex8723.btRssi <=32)){ + pBtdm8723->psTdmaDuAdjType = 9; +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, limit to type9 \n")); + } + else + pBtdm8723->psTdmaDuAdjType = 1; + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, pBtdm8723->psTdmaDuAdjType); + } + } + else + { +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjACL, no need to change\n")); + } + } + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], ACL current TDMA(%s, %d)\n", + (pBtdm8723->bCurPsTdmaOn? "ON":"OFF"), pBtdm8723->curPsTdma)); + } + + pBtdm8723->psTdmaMonitorCnt++; +} + +u8 btdm_1AntAdjustbyWiFiRSSI(u8 RSSI_Now, u8 RSSI_Last, u8 RSSI_Th) +{ + u8 type; + + if (RSSI_Now>RSSI_Last) + { + if (RSSI_Now > (RSSI_Th + 5)) + type = 26; + else + type = 25; + } + else + { + if (RSSI_Now > RSSI_Th) + type = 26; + else + type = 25; + } + + return type; +} + +void btdm_1AntTdmaDurationAdjustForSCO(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBTDM_8723A_1ANT pBtdm8723; + PDM_ODM_T podm; + pDIG_T pDigTable; + u8 RSSITh_WiFi, RSSITh12_BT, RSSITh23_BT; + u8 Type, RSSIOffset; + u8 RSSI_WiFi_Now, RSSI_BT_Now; + + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], %s\n", __FUNCTION__)); + pHalData = GET_HAL_DATA(padapter); + pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + podm = &pHalData->odmpriv; + pDigTable = &podm->DM_DigTable; + RSSITh_WiFi = 47; + RSSITh12_BT = 36; + RSSITh23_BT = 30; + RSSIOffset = 22; + RSSI_WiFi_Now = pDigTable->Rssi_val_min; + RSSI_BT_Now = pHalData->bt_coexist.halCoex8723.btRssi; + + if (pBtdm8723->psTdmaGlobalCnt != pBtdm8723->psTdmaMonitorCntForSCO) + { + pBtdm8723->psTdmaMonitorCntForSCO = 0; + pBtdm8723->psTdmaGlobalCnt = 0; + } + + if (pBtdm8723->psTdmaMonitorCntForSCO == 0) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjSCO, first time execute!!\n")); + pBtdm8723->RSSI_WiFi_Last = 0; + pBtdm8723->RSSI_BT_Last = 0; + } + else + { + if ((pBtdm8723->curPsTdma != 23) && + (pBtdm8723->curPsTdma != 24) && + (pBtdm8723->curPsTdma != 25) && + (pBtdm8723->curPsTdma != 26)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjSCO, tdma adjust type can only be 23/24/25/26 !!!\n")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjSCO, the latest adjust type=%d\n", pBtdm8723->psTdmaDuAdjTypeForSCO)); + + Type = pBtdm8723->psTdmaDuAdjTypeForSCO; + + goto _exit_1AntTdmaDurationAdjustForSCO; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntTdmaAdjSCO, pre curPsTdma=%d\n", pBtdm8723->curPsTdma)); + } + } + + BTDM_1AntSignalCompensation(padapter, &RSSI_WiFi_Now, &RSSI_BT_Now); + + if (!BTDM_IsWifiBusy(padapter)) // WiFi LPS + { + //Type = btdm_1AntAdjustbyWiFiRSSI(RSSI_WiFi_Now, pBtdm8723->RSSI_WiFi_Last, RSSITh_WiFi); + if (Type == 26) + { + if(RSSI_BT_Now >= RSSITh12_BT + 4) + Type = 23; + else + Type = 26; + } + else + { + if (RSSI_BT_Now >= RSSITh12_BT) + Type = 23; + else + Type = 26; + } + + } + else // WiFi busy + { + //if (RSSI_BT_Now > pBtdm8723->RSSI_BT_Last) + if (Type !=23) + { + if (RSSI_BT_Now >= RSSITh12_BT + 4) + Type = 23; + else if (RSSI_BT_Now >= RSSITh23_BT + 4) + Type = 24; + else + Type = btdm_1AntAdjustbyWiFiRSSI(RSSI_WiFi_Now, pBtdm8723->RSSI_WiFi_Last, RSSITh_WiFi); + } + else + { + if (RSSI_BT_Now >= RSSITh12_BT) + Type = 23; + else if (RSSI_BT_Now >= RSSITh23_BT) + Type = 24; + else + Type = btdm_1AntAdjustbyWiFiRSSI(RSSI_WiFi_Now, pBtdm8723->RSSI_WiFi_Last, RSSITh_WiFi); + } + } + +_exit_1AntTdmaDurationAdjustForSCO: + + pBtdm8723->RSSI_WiFi_Last = RSSI_WiFi_Now; + pBtdm8723->RSSI_BT_Last = RSSI_BT_Now; + + if (Type != pBtdm8723->curPsTdma) + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, Type); + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO current TDMA(ON, %d), RSSI_WiFi=%d, RSSI_BT=%d\n", + Type, RSSI_WiFi_Now, RSSI_BT_Now)); + + pBtdm8723->psTdmaDuAdjTypeForSCO = Type; + + pBtdm8723->psTdmaMonitorCntForSCO++; +} + +void btdm_1AntCoexProcessForWifiConnect(PADAPTER padapter) +{ + struct mlme_priv *pmlmepriv; + PHAL_DATA_TYPE pHalData; + PBT_COEXIST_8723A pBtCoex; + PBTDM_8723A_1ANT pBtdm8723; + u8 BtState; + + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntCoexProcessForWifiConnect!!\n")); + + pmlmepriv = &padapter->mlmepriv; + pHalData = GET_HAL_DATA(padapter); + pBtCoex = &pHalData->bt_coexist.halCoex8723; + pBtdm8723 = &pBtCoex->btdm1Ant; + BtState = pBtCoex->c2hBtInfo; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], WiFi is %s\n", BTDM_IsWifiBusy(padapter)?"Busy":"IDLE")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT is %s\n", BtStateString[BtState])); + + adapter_to_pwrctl(padapter)->btcoex_rfon = _FALSE; + + if ((!BTDM_IsWifiBusy(padapter)) &&(BTDM_CheckFWState(padapter, WIFI_AP_STATE) != _TRUE)&& + ((BtState == BT_INFO_STATE_NO_CONNECTION) || (BtState == BT_INFO_STATE_CONNECT_IDLE))) + { + switch (BtState) + { + case BT_INFO_STATE_NO_CONNECTION: + _btdm_1AntSetPSTDMA(padapter, _TRUE, 2, 0x26, _FALSE, 0); + break; + case BT_INFO_STATE_CONNECT_IDLE: + _btdm_1AntSetPSTDMA(padapter, _TRUE, 2, 0x26, _FALSE, 0); + break; + } + } + else + { +#ifdef BTCOEX_DECREASE_WIFI_POWER + u8 val8; + + val8 = rtw_read8(padapter, 0x883); + val8 &= 0x07; + if ((BtState == BT_INFO_STATE_SCO_ONLY_BUSY) || + (BtState == BT_INFO_STATE_ACL_SCO_BUSY)) + { + if (BTDM_IsHT40(padapter) == _TRUE) + val8 |= 0x80; //0x880[31:27] = 10000; + else + val8 |= 0x60; //0x880[31:27] = 01100; + } + else + { + val8 |= 0xC0; // 0x880[31:27] = 11000; + } + rtw_write8(padapter, 0x883, val8); +#endif // BTCOEX_DECREASE_WIFI_POWER + + switch (BtState) + { + case BT_INFO_STATE_NO_CONNECTION: + case BT_INFO_STATE_CONNECT_IDLE: + // WiFi is Busy + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 5); + break; + case BT_INFO_STATE_ACL_INQ_OR_PAG: + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is BT_INFO_STATE_ACL_INQ_OR_PAG\n")); + case BT_INFO_STATE_INQ_OR_PAG: + adapter_to_pwrctl(padapter)->btcoex_rfon = _TRUE; + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 30); + break; + case BT_INFO_STATE_SCO_ONLY_BUSY: + case BT_INFO_STATE_ACL_SCO_BUSY: + if (_TRUE == pBtCoex->bC2hBtInquiryPage) + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 32); + else + { +#ifdef BTCOEX_CMCC_TEST + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 23); +#else // !BTCOEX_CMCC_TEST + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 8); +#endif // !BTCOEX_CMCC_TEST + } + break; + case BT_INFO_STATE_ACL_ONLY_BUSY: + adapter_to_pwrctl(padapter)->btcoex_rfon = _TRUE; + if (!BTDM_IsWifiBusy(padapter)) { + //WiFi LPS + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 37); + + } + else if (pBtCoex->c2hBtProfile == BT_INFO_HID) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is HID\n")); + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 31); + } + else if (pBtCoex->c2hBtProfile == BT_INFO_FTP) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is FTP/OPP\n")); + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 3); + } + else if (pBtCoex->c2hBtProfile == (BT_INFO_A2DP|BT_INFO_FTP)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is A2DP_FTP\n")); + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 11); + } + else if (pBtCoex->c2hBtProfile == (BT_INFO_A2DP|BT_INFO_HID)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is A2DP_HID\n")); + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 11); + } + else if (pBtCoex->c2hBtProfile == (BT_INFO_FTP|BT_INFO_HID)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is FTP_HID\n")); + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 11); + } + else + { + if (pBtCoex->c2hBtProfile == BT_INFO_A2DP) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is A2DP\n")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is A2DP pBtCoex->AclTp=0x%x lowPriorityTx=%d\n",pBtCoex->AclTp,pHalData->bt_coexist.halCoex8723.lowPriorityTx)); + if(pBtCoex->AclTp > 0x3000 ||pHalData->bt_coexist.halCoex8723.lowPriorityTx >1000) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is A2DP change to A2DP+OPP, pBtCoex->AclTp=0x%x lowPriorityTx=%d\n",pBtCoex->AclTp,pHalData->bt_coexist.halCoex8723.lowPriorityTx)); + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 11); + } + else{ + btdm_1AntTdmaDurationAdjustForACL(padapter); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT PROFILE is UNKNOWN(0x%02X)! Use A2DP Profile\n", pBtCoex->c2hBtProfile)); + btdm_1AntTdmaDurationAdjustForACL(padapter); + } + + } + break; + } + } + + pBtdm8723->psTdmaGlobalCnt++; +} + +static void btdm_1AntUpdateHalRAMask(PADAPTER padapter, u32 mac_id, u32 filter) +{ + u8 init_rate = 0; + u8 raid; + u32 mask; + u8 shortGIrate = _FALSE; + int supportRateNum = 0; + struct sta_info *psta; + PHAL_DATA_TYPE pHalData; + struct dm_priv *pdmpriv; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + WLAN_BSSID_EX *cur_network; + + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], %s, MACID=%d, filter=0x%08x!!\n", __FUNCTION__, mac_id, filter)); + + pHalData = GET_HAL_DATA(padapter); + pdmpriv = &pHalData->dmpriv; + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; + cur_network = &pmlmeinfo->network; + + if (mac_id >= NUM_STA) //CAM_SIZE + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], %s, MACID=%d illegal!!\n", __FUNCTION__, mac_id)); + return; + } + + psta = pmlmeinfo->FW_sta_info[mac_id].psta; + if (psta == NULL) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], %s, Can't find station!!\n", __FUNCTION__)); + return; + } + + raid = psta->raid; + + switch (mac_id) + { + case 0:// for infra mode + supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&(pmlmeinfo->HT_caps)):0; + if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) + { + shortGIrate = _TRUE; + } + break; + + case 1://for broadcast/multicast + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); + break; + + default: //for each sta in IBSS + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + break; + } + mask |= ((raid<<28)&0xf0000000); + mask &= 0xffffffff; + mask &= ~filter; + init_rate = get_highest_rate_idx(mask)&0x3f; + + if (pHalData->fw_ractrl == _TRUE) + { + u8 arg = 0; + + arg = mac_id&0x1f;//MACID + arg |= BIT(7); + if (_TRUE == shortGIrate) + arg |= BIT(5); + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Update FW RAID entry, MASK=0x%08x, arg=0x%02x\n", mask, arg)); + + rtl8192c_set_raid_cmd(padapter, mask, arg); + } + else + { + if (_TRUE == shortGIrate) + init_rate |= BIT(6); + + rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate); + } + + psta->init_rate = init_rate; + pdmpriv->INIDATA_RATE[mac_id] = init_rate; +} + +static void btdm_1AntUpdateHalRAMaskForSCO(PADAPTER padapter, u8 forceUpdate) +{ + PBTDM_8723A_1ANT pBtdm8723; + struct sta_priv *pstapriv; + WLAN_BSSID_EX *cur_network; + struct sta_info *psta; + u32 macid; + u32 filter = 0; + + + pBtdm8723 = &GET_HAL_DATA(padapter)->bt_coexist.halCoex8723.btdm1Ant; + + if ((pBtdm8723->bRAChanged == _TRUE) && (forceUpdate == _FALSE)) + return; + + pstapriv = &padapter->stapriv; + cur_network = &padapter->mlmeextpriv.mlmext_info.network; + psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); + macid = psta->mac_id; + + filter |= BIT(_1M_RATE_); + filter |= BIT(_2M_RATE_); + filter |= BIT(_5M_RATE_); + filter |= BIT(_11M_RATE_); + filter |= BIT(_6M_RATE_); + filter |= BIT(_9M_RATE_); + + btdm_1AntUpdateHalRAMask(padapter, macid, filter); + + pBtdm8723->bRAChanged = _TRUE; +} + +static void btdm_1AntRecoverHalRAMask(PADAPTER padapter) +{ + PBTDM_8723A_1ANT pBtdm8723; + struct sta_priv *pstapriv; + WLAN_BSSID_EX *cur_network; + struct sta_info *psta; + u32 macid; + + + pBtdm8723 = &GET_HAL_DATA(padapter)->bt_coexist.halCoex8723.btdm1Ant; + + if (pBtdm8723->bRAChanged == _FALSE) + return; + + pstapriv = &padapter->stapriv; + cur_network = &padapter->mlmeextpriv.mlmext_info.network; + psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); + + Update_RA_Entry(padapter, psta); + + pBtdm8723->bRAChanged = _FALSE; +} + +void btdm_1AntBTStateChangeHandler(PADAPTER padapter, BT_STATE_1ANT oldState, BT_STATE_1ANT newState) +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT state change, %s => %s\n", BtStateString[oldState], BtStateString[newState])); + + // BT default ignore wlan active, + // WiFi MUST disable this when BT is enable + if (newState > BT_INFO_STATE_DISABLED) + { + btdm_SetFwIgnoreWlanAct(padapter, _FALSE); + } + + if ((BTDM_CheckFWState(padapter, WIFI_STATION_STATE) == _TRUE) && + (BTDM_IsWifiConnectionExist(padapter) == _TRUE)) + { + if ((newState == BT_INFO_STATE_SCO_ONLY_BUSY) || + (newState == BT_INFO_STATE_ACL_SCO_BUSY)) + { + btdm_1AntUpdateHalRAMaskForSCO(padapter, _FALSE); + } + else + { + // Recover original RA setting + btdm_1AntRecoverHalRAMask(padapter); + } + } + else + { + GET_HAL_DATA(padapter)->bt_coexist.halCoex8723.btdm1Ant.bRAChanged = _FALSE; + } + + if (oldState == newState) + return; + + if (oldState == BT_INFO_STATE_ACL_ONLY_BUSY) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + pHalData->bt_coexist.halCoex8723.btdm1Ant.psTdmaMonitorCnt = 0; + pHalData->bt_coexist.halCoex8723.btdm1Ant.psTdmaMonitorCntForSCO = 0; + } + + if ((oldState == BT_INFO_STATE_SCO_ONLY_BUSY) || + (oldState == BT_INFO_STATE_ACL_SCO_BUSY)) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + pHalData->bt_coexist.halCoex8723.btdm1Ant.psTdmaMonitorCntForSCO = 0; + } + + // Active 2Ant mechanism when BT Connected + if ((oldState == BT_INFO_STATE_DISABLED) || + (oldState == BT_INFO_STATE_NO_CONNECTION)) + { + if ((newState != BT_INFO_STATE_DISABLED) && + (newState != BT_INFO_STATE_NO_CONNECTION)) + { + BTDM_SetSwRfRxLpfCorner(padapter, BT_RF_RX_LPF_CORNER_SHRINK); + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + } + } + else + { + if ((newState == BT_INFO_STATE_DISABLED) || + (newState == BT_INFO_STATE_NO_CONNECTION)) + { + BTDM_SetSwRfRxLpfCorner(padapter, BT_RF_RX_LPF_CORNER_RESUME); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + } + } +} + +void btdm_1AntBtCoexistHandler(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT_COEXIST_8723A pBtCoex8723; + PBTDM_8723A_1ANT pBtdm8723; + u8 u1tmp; + + + pHalData = GET_HAL_DATA(padapter); + pBtCoex8723 = &pHalData->bt_coexist.halCoex8723; + pBtdm8723 = &pBtCoex8723->btdm1Ant; + adapter_to_pwrctl(padapter)->btcoex_rfon = _FALSE; + if (BT_IsBtDisabled(padapter) == _TRUE) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT is disabled\n")); + + if (BTDM_IsWifiConnectionExist(padapter) == _TRUE) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi is connected\n")); + + if (BTDM_IsWifiBusy(padapter) == _TRUE) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Wifi is busy\n")); + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 8); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Wifi is idle\n")); + _btdm_1AntSetPSTDMA(padapter, _TRUE, 2, 1, _FALSE, 8); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi is disconnected\n")); + + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 8); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT is enabled\n")); + + if (BTDM_IsWifiConnectionExist(padapter) == _TRUE) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi is connected\n")); + + btdm_1AntWifiParaAdjust(padapter, _TRUE); + btdm_1AntCoexProcessForWifiConnect(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi is disconnected\n")); + + // Antenna switch at BT side(0x870 = 0x300, 0x860 = 0x210) after PSTDMA off + btdm_1AntWifiParaAdjust(padapter, _FALSE); + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 0); + } + } + + btdm_1AntBTStateChangeHandler(padapter, pBtCoex8723->prec2hBtInfo, pBtCoex8723->c2hBtInfo); + pBtCoex8723->prec2hBtInfo = pBtCoex8723->c2hBtInfo; +} + +void BTDM_1AntSignalCompensation(PADAPTER padapter, u8 *rssi_wifi, u8 *rssi_bt) +{ + PHAL_DATA_TYPE pHalData; + PBTDM_8723A_1ANT pBtdm8723; + u8 RSSI_WiFi_Cmpnstn, RSSI_BT_Cmpnstn; + + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], %s\n", __FUNCTION__)); + pHalData = GET_HAL_DATA(padapter); + pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + RSSI_WiFi_Cmpnstn = 0; + RSSI_BT_Cmpnstn = 0; + + switch (pBtdm8723->curPsTdma) + { + case 1: // WiFi 52ms + RSSI_WiFi_Cmpnstn = 11; // 22*0.48 + break; + case 2: // WiFi 36ms + RSSI_WiFi_Cmpnstn = 14; // 22*0.64 + break; + case 9: // WiFi 20ms + RSSI_WiFi_Cmpnstn = 18; // 22*0.80 + break; + case 11: // WiFi 10ms + RSSI_WiFi_Cmpnstn = 20; // 22*0.90 + break; + case 4: // WiFi 21ms + RSSI_WiFi_Cmpnstn = 17; // 22*0.79 + break; + case 16: // WiFi 24ms + RSSI_WiFi_Cmpnstn = 18; // 22*0.76 + break; + case 18: // WiFi 37ms + RSSI_WiFi_Cmpnstn = 14; // 22*0.64 + break; + case 23: //Level-1, Antenna switch to BT at all time + case 24: //Level-2, Antenna switch to BT at all time + case 25: //Level-3a, Antenna switch to BT at all time + case 26: //Level-3b, Antenna switch to BT at all time + case 27: //Level-3b, Antenna switch to BT at all time + case 33: //BT SCO & WiFi site survey + RSSI_WiFi_Cmpnstn = 22; + break; + default: + break; + } + + if (rssi_wifi && RSSI_WiFi_Cmpnstn) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntSgnlCmpnstn, case %d, WiFiCmpnstn=%d(%d => %d)\n", + pBtdm8723->curPsTdma, RSSI_WiFi_Cmpnstn, *rssi_wifi, *rssi_wifi+RSSI_WiFi_Cmpnstn)); + *rssi_wifi += RSSI_WiFi_Cmpnstn; + } + + if (rssi_bt && RSSI_BT_Cmpnstn) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1AntSgnlCmpnstn, case %d, BTCmpnstn=%d(%d => %d)\n", + pBtdm8723->curPsTdma, RSSI_BT_Cmpnstn, *rssi_bt, *rssi_bt+RSSI_BT_Cmpnstn)); + *rssi_bt += RSSI_BT_Cmpnstn; + } +} + +void +BTDM_1AntSetWifiRssiThresh( + PADAPTER padapter, + u8 rssiThresh + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_1ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm1Ant; + + pBtdm8723->wifiRssiThresh = rssiThresh; + DBG_871X("cosa set rssi thresh = %d\n", pBtdm8723->wifiRssiThresh); +} + +void BTDM_1AntParaInit(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT_COEXIST_8723A pBtCoex; + PBTDM_8723A_1ANT pBtdm8723; + + + pHalData = GET_HAL_DATA(padapter); + pBtCoex = &pHalData->bt_coexist.halCoex8723; + pBtdm8723 = &pBtCoex->btdm1Ant; + + // Enable counter statistics + rtw_write8(padapter, 0x76e, 0x4); + btdm_1AntPtaParaReload(padapter); + + pBtdm8723->wifiRssiThresh = 48; + + pBtdm8723->bWiFiHalt = _FALSE; + pBtdm8723->bRAChanged = _FALSE; + + if ((pBtCoex->c2hBtInfo != BT_INFO_STATE_DISABLED) && + (pBtCoex->c2hBtInfo != BT_INFO_STATE_NO_CONNECTION)) + { + BTDM_SetSwRfRxLpfCorner(padapter, BT_RF_RX_LPF_CORNER_SHRINK); + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + } +} + +void BTDM_1AntForHalt(PADAPTER padapter) +{ + RTPRINT(FBT, BT_TRACE, ("\n[BTCoex], 1Ant for halt\n")); + + GET_HAL_DATA(padapter)->bt_coexist.halCoex8723.btdm1Ant.bWiFiHalt = _TRUE; + + btdm_1AntWifiParaAdjust(padapter, _FALSE); + + // don't use btdm_1AntSetPSTDMA() here + // it will call rtw_set_ps_mode() and request pwrpriv->lock. + // This will lead to deadlock, if this function is called in IPS + // Lucas@20130205 + btdm_1AntPsTdma(padapter, _FALSE, 0); + + btdm_SetFwIgnoreWlanAct(padapter, _TRUE); +} + +void BTDM_1AntLpsLeave(PADAPTER padapter) +{ + RTPRINT(FBT, BT_TRACE, ("\n[BTCoex], 1Ant for LPS Leave\n")); + + // Prevent from entering LPS again + GET_HAL_DATA(padapter)->bt_coexist.halCoex8723.btdm1Ant.bWiFiHalt == _TRUE; + + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 8); +// btdm_1AntPsTdma(padapter, _FALSE, 8); +} + +void BTDM_1AntWifiAssociateNotify(PADAPTER padapter, u8 type) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + RTPRINT(FBT, BT_TRACE, ("\n[BTCoex], 1Ant for associate, type=%d\n", type)); + + if (type) + { + rtl8723a_CheckAntenna_Selection(padapter); + if (BT_IsBtDisabled(padapter) == _TRUE) + { + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 9); + } + else + { + PBT_COEXIST_8723A pBtCoex; + u8 BtState; + + pBtCoex = &pHalData->bt_coexist.halCoex8723; + BtState = pBtCoex->c2hBtInfo; + + btdm_1AntTSFSwitch(padapter, _TRUE); + + if ((BtState == BT_INFO_STATE_NO_CONNECTION) || + (BtState == BT_INFO_STATE_CONNECT_IDLE)) + { + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 28); + } + else if ((BtState == BT_INFO_STATE_SCO_ONLY_BUSY) || + (BtState == BT_INFO_STATE_ACL_SCO_BUSY)) + { + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 8); + } + else if ((BtState == BT_INFO_STATE_ACL_ONLY_BUSY) || + (BtState == BT_INFO_STATE_ACL_INQ_OR_PAG)) + { + if (pBtCoex->c2hBtProfile == BT_INFO_HID) + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 35); + else + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 29); + } + } + } + else + { + if (BT_IsBtDisabled(padapter) == _FALSE) + { + if (BTDM_IsWifiConnectionExist(padapter) == _FALSE) + { + btdm_1AntPsTdma(padapter, _FALSE, 0); + btdm_1AntTSFSwitch(padapter, _FALSE); + } + } + + btdm_1AntBtCoexistHandler(padapter); + } +} + +void BTDM_1AntMediaStatusNotify(PADAPTER padapter, RT_MEDIA_STATUS mstatus) +{ + PBT_COEXIST_8723A pBtCoex; + + + pBtCoex = &GET_HAL_DATA(padapter)->bt_coexist.halCoex8723; + + RTPRINT(FBT, BT_TRACE, ("\n\n[BTCoex]******************************\n")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], MediaStatus, WiFi %s !!\n", + mstatus==RT_MEDIA_CONNECT?"CONNECT":"DISCONNECT")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex]******************************\n")); + + if (RT_MEDIA_CONNECT == mstatus) + { + if (BTDM_CheckFWState(padapter, WIFI_STATION_STATE) == _TRUE) + { + if ((pBtCoex->c2hBtInfo == BT_INFO_STATE_SCO_ONLY_BUSY) || + (pBtCoex->c2hBtInfo == BT_INFO_STATE_ACL_SCO_BUSY)) + { + btdm_1AntUpdateHalRAMaskForSCO(padapter, _TRUE); + } + } + + adapter_to_pwrctl(padapter)->DelayLPSLastTimeStamp = rtw_get_current_time(); + BTDM_1AntForDhcp(padapter); + } + else + { + //DBG_871X("%s rtl8723a_DeinitAntenna_Selection\n",__func__); + rtl8723a_DeinitAntenna_Selection(padapter); + btdm_1AntBtCoexistHandler(padapter); + pBtCoex->btdm1Ant.bRAChanged = _FALSE; + } +} + +void BTDM_1AntForDhcp(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u8 u1tmp; + u8 BtState; + PBT_COEXIST_8723A pBtCoex; + PBTDM_8723A_1ANT pBtdm8723; + + + pHalData = GET_HAL_DATA(padapter); + pBtCoex = &pHalData->bt_coexist.halCoex8723; + BtState = pBtCoex->c2hBtInfo; + pBtdm8723 = &pBtCoex->btdm1Ant; + + RTPRINT(FBT, BT_TRACE, ("\n[BTCoex], 1Ant for DHCP\n")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1Ant for DHCP, WiFi is %s\n", BTDM_IsWifiBusy(padapter)?"Busy":"IDLE")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1Ant for DHCP, %s\n", BtStateString[BtState])); + +#if 1 + + //BTDM_1AntWifiAssociateNotify(padapter, _TRUE); + RTPRINT(FBT, BT_TRACE, ("\n[BTCoex], 1Ant for DHCP SKIP~~~~~\n")); + +#else + +// rtl8723a_set_lowpwr_lps_cmd(padapter, _FALSE); + + if (BT_IsBtDisabled(padapter) == _TRUE) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1Ant for DHCP, BT is disabled\n")); + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 9); + } + else + { + if ((BtState == BT_INFO_STATE_SCO_ONLY_BUSY) || + (BtState == BT_INFO_STATE_ACL_SCO_BUSY)) + { + if (_TRUE == pBtCoex->bC2hBtInquiryPage) + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 32); + else + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 27); + } + else if (BtState == BT_INFO_STATE_ACL_ONLY_BUSY) + { + adapter_to_pwrctl(padapter)->btcoex_rfon = _TRUE; + if(padapter->securitypriv.ndisencryptstatus != Ndis802_11EncryptionDisabled) + { + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 18); + RTPRINT(FBT, BT_TRACE, + ("[BTCoex], 1Ant for DHCP, Encrypted AP, set TDMA(%s, %d)\n", + pBtdm8723->bCurPsTdmaOn?"ON":"OFF", pBtdm8723->curPsTdma)); + } + else + { + switch (pBtdm8723->curPsTdma) + { + case 1: + case 2: + RTPRINT(FBT, BT_TRACE, + ("[BTCoex], 1Ant for DHCP, Keep TDMA(%s, %d)\n", + pBtdm8723->bCurPsTdmaOn?"ON":"OFF", pBtdm8723->curPsTdma)); + break; + default: + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 16); + break; + } + } + } + else + { + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 28); + } + } +#endif +} + +void BTDM_1AntWifiScanNotify(PADAPTER padapter, u8 scanType) +{ + PHAL_DATA_TYPE pHalData; + u8 u1tmp; + u8 BtState; + PBT_COEXIST_8723A pBtCoex; + PBTDM_8723A_1ANT pBtdm8723; + + + pHalData = GET_HAL_DATA(padapter); + BtState = pHalData->bt_coexist.halCoex8723.c2hBtInfo; + pBtCoex = &pHalData->bt_coexist.halCoex8723; + pBtdm8723 = &pBtCoex->btdm1Ant; + + RTPRINT(FBT, BT_TRACE, ("\n[BTCoex], 1Ant for wifi scan=%d!!\n", scanType)); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1Ant for wifi scan, WiFi is %s\n", BTDM_IsWifiBusy(padapter)?"Busy":"IDLE")); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1Ant for wifi scan, %s\n", BtStateString[BtState])); + + if (scanType) + { + rtl8723a_CheckAntenna_Selection(padapter); + if (BT_IsBtDisabled(padapter) == _TRUE) + { + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _FALSE, 9); + } + else if (BTDM_IsWifiConnectionExist(padapter) == _FALSE) + { + BTDM_1AntWifiAssociateNotify(padapter, _TRUE); + } + else + { + if ((BtState == BT_INFO_STATE_SCO_ONLY_BUSY) || + (BtState == BT_INFO_STATE_ACL_SCO_BUSY)) + { + if (_TRUE == pBtCoex->bC2hBtInquiryPage) + btdm_1AntSetPSTDMA(padapter, _FALSE, 0, _TRUE, 32); + else + { + adapter_to_pwrctl(padapter)->btcoex_rfon = _TRUE; + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 33); + } + } + else if (_TRUE == pBtCoex->bC2hBtInquiryPage) + { + adapter_to_pwrctl(padapter)->btcoex_rfon = _TRUE; + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 30); + } + else if (BtState == BT_INFO_STATE_ACL_ONLY_BUSY) + { + adapter_to_pwrctl(padapter)->btcoex_rfon = _TRUE; + if (pBtCoex->c2hBtProfile == BT_INFO_HID) + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 34); + else + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 4); + } + else + { + adapter_to_pwrctl(padapter)->btcoex_rfon = _TRUE; + btdm_1AntSetPSTDMA(padapter, _TRUE, 0, _TRUE, 5); + } + } + + btdm_NotifyFwScan(padapter, 1); + } + else // WiFi_Finish_Scan + { + btdm_NotifyFwScan(padapter, 0); + btdm_1AntBtCoexistHandler(padapter); + } +} + +void BTDM_1AntFwC2hBtInfo8723A(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_COEXIST_8723A pBtCoex; + u8 u1tmp, btState; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtCoex = &pHalData->bt_coexist.halCoex8723; + + u1tmp = pBtCoex->c2hBtInfoOriginal; + // sco BUSY bit is not used on voice over PCM platform + btState = u1tmp & 0xF; + pBtCoex->c2hBtProfile = u1tmp & 0xE0; + + // default set bt to idle state. + pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_IDLE; + + // check BIT2 first ==> check if bt is under inquiry or page scan + if (btState & BIT(2)) + { + pBtCoex->bC2hBtInquiryPage = _TRUE; + } + else + { + pBtCoex->bC2hBtInquiryPage = _FALSE; + } + btState &= ~BIT(2); + + if (!(btState & BIT(0))) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_NO_CONNECTION; + } + else + { + if (btState == 0x1) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_CONNECT_IDLE; + if (pBtCoex->c2hBtProfile) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_ACL_ONLY_BUSY; + } + } + else if (btState == 0x9) + { + if(pBtCoex->bC2hBtInquiryPage == _TRUE) + pBtCoex->c2hBtInfo = BT_INFO_STATE_ACL_INQ_OR_PAG; + else + pBtCoex->c2hBtInfo = BT_INFO_STATE_ACL_ONLY_BUSY; + pBtMgnt->ExtConfig.bBTBusy = _TRUE; + } + else if (btState == 0x3) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_SCO_ONLY_BUSY; + pBtMgnt->ExtConfig.bBTBusy = _TRUE; + } + else if (btState == 0xb) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_ACL_SCO_BUSY; + pBtMgnt->ExtConfig.bBTBusy = _TRUE; + } + else + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_MAX; + } + if (_TRUE == pBtMgnt->ExtConfig.bBTBusy) + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_IDLE; + } + + if ((BT_INFO_STATE_NO_CONNECTION == pBtCoex->c2hBtInfo) || + (BT_INFO_STATE_CONNECT_IDLE == pBtCoex->c2hBtInfo)) + { + if (pBtCoex->bC2hBtInquiryPage) + pBtCoex->c2hBtInfo = BT_INFO_STATE_INQ_OR_PAG; + } + + RTPRINT(FBT, BT_TRACE, ("[BTC2H], %s(%d)\n", + BtStateString[pBtCoex->c2hBtInfo], pBtCoex->c2hBtInfo)); + +// if(pBtCoex->c2hBtProfile != BT_INFO_HID) +// pBtCoex->c2hBtProfile &= ~BT_INFO_HID; +} + +void BTDM_1AntBtCoexist8723A(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u32 curr_time, delta_time; + + + pHalData = GET_HAL_DATA(padapter); + + if (BTDM_CheckFWState(padapter, WIFI_SITE_MONITOR) == _TRUE) + { + // already done in BTDM_1AntForScan() + RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi is under scan progress!!\n")); + return; + } + + if (BTDM_CheckFWState(padapter, WIFI_UNDER_LINKING) == _TRUE) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi is under link progress!!\n")); + return; + } + + // under DHCP(Special packet) + curr_time = rtw_get_current_time(); + delta_time = curr_time - adapter_to_pwrctl(padapter)->DelayLPSLastTimeStamp; + delta_time = rtw_systime_to_ms(delta_time); + if (delta_time < 500) // 500ms + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], wifi is under DHCP progress(%d ms)!!\n", delta_time)); + return; + } + + BTDM_CheckWiFiState(padapter); + + btdm_1AntBtCoexistHandler(padapter); +} + +// ===== End of sync from SD7 driver HAL/BTCoexist/HalBtc87231Ant.c ===== +#endif + +#ifdef __HALBTC87232ANT_C__ // HAL/BTCoexist/HalBtc87232Ant.c +// ===== Below this line is sync from SD7 driver HAL/BTCoexist/HalBtc87232Ant.c ===== + +//============================================================ +// local function proto type if needed +//============================================================ +//============================================================ +// local function start with btdm_ +//============================================================ +u8 btdm_ActionAlgorithm(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + u8 bScoExist=_FALSE, bBtLinkExist=_FALSE, bBtHsModeExist=_FALSE; + u8 algorithm=BT_2ANT_COEX_ALGO_UNDEFINED; + + if(pBtMgnt->ExtConfig.NumberOfHandle) + { + bBtLinkExist = _TRUE; + } + if(pBtMgnt->ExtConfig.NumberOfSCO) + { + bScoExist = _TRUE; + } + if(BT_HsConnectionEstablished(padapter)) + { + bBtHsModeExist = _TRUE; + } + + //====================== + // here we get BT status first + //====================== + // 1) initialize + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_IDLE; + + if( (bScoExist) ||(bBtHsModeExist) || + (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID))) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO or HID or HS exists, set BT non-idle !!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_NON_IDLE; + } + else + { + // A2dp profile + if( (pBtMgnt->ExtConfig.NumberOfHandle == 1) && + (BTHCI_CheckProfileExist(padapter, BT_PROFILE_A2DP)) ) + { + if(BTDM_BtTxRxCounterL(padapter) < 100) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP, low priority tx+rx < 100, set BT connected-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_CONNECTED_IDLE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP, low priority tx+rx >= 100, set BT non-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_NON_IDLE; + } +} + // Pan profile + if( (pBtMgnt->ExtConfig.NumberOfHandle == 1) && + (BTHCI_CheckProfileExist(padapter, BT_PROFILE_PAN)) ) +{ + if(BTDM_BtTxRxCounterL(padapter) < 600) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN, low priority tx+rx < 600, set BT connected-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_CONNECTED_IDLE; +} + else +{ + if(pHalData->bt_coexist.halCoex8723.lowPriorityTx) + { + if((pHalData->bt_coexist.halCoex8723.lowPriorityRx /pHalData->bt_coexist.halCoex8723.lowPriorityTx)>9 ) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN, low priority rx/tx > 9, set BT connected-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_CONNECTED_IDLE; +} + } + } + if(BT_2ANT_BT_STATUS_CONNECTED_IDLE != pBtdm8723->btStatus) +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN, set BT non-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_NON_IDLE; +} + } + // Pan+A2dp profile + if( (pBtMgnt->ExtConfig.NumberOfHandle == 2) && + (BTHCI_CheckProfileExist(padapter, BT_PROFILE_A2DP)) && + (BTHCI_CheckProfileExist(padapter, BT_PROFILE_PAN)) ) +{ + if(BTDM_BtTxRxCounterL(padapter) < 600) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN+A2DP, low priority tx+rx < 600, set BT connected-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_CONNECTED_IDLE; + } + else + { + if(pHalData->bt_coexist.halCoex8723.lowPriorityTx) + { + if((pHalData->bt_coexist.halCoex8723.lowPriorityRx /pHalData->bt_coexist.halCoex8723.lowPriorityTx)>9 ) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN+A2DP, low priority rx/tx > 9, set BT connected-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_CONNECTED_IDLE; + } +} + } + if(BT_2ANT_BT_STATUS_CONNECTED_IDLE != pBtdm8723->btStatus) +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN+A2DP, set BT non-idle!!!\n")); + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_NON_IDLE; +} + } + } + if(BT_2ANT_BT_STATUS_IDLE != pBtdm8723->btStatus) +{ + pBtMgnt->ExtConfig.bBTBusy = _TRUE; + } + else + { + pBtMgnt->ExtConfig.bBTBusy = _FALSE; +} + //====================== + + if(!bBtLinkExist) +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], No profile exists!!!\n")); + return algorithm; + } + + if(pBtMgnt->ExtConfig.NumberOfHandle == 1) + { + if(bScoExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO only\n")); + algorithm = BT_2ANT_COEX_ALGO_SCO; + } + else + { + if(BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID only\n")); + algorithm = BT_2ANT_COEX_ALGO_HID; + } + else if(BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP only\n")); + algorithm = BT_2ANT_COEX_ALGO_A2DP; + } + else if(BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN)) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN(HS) only\n")); + algorithm = BT_2ANT_COEX_ALGO_PANHS; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN(EDR) only\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR; + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! NO matched profile for NumberOfHandle=%d \n", + pBtMgnt->ExtConfig.NumberOfHandle)); + } + } + } + else if(pBtMgnt->ExtConfig.NumberOfHandle == 2) + { + if(bScoExist) + { + if(BTHCI_CheckProfileExist(padapter, BT_PROFILE_HID)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + HID\n")); + algorithm = BT_2ANT_COEX_ALGO_HID; + } + else if(BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO + A2DP\n")); + } + else if(BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN)) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_SCO; +} + else +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_HID; + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO exists but why NO matched ACL profile for NumberOfHandle=%d\n", + pBtMgnt->ExtConfig.NumberOfHandle)); + } + } + else + { + if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) ) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + } + else if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) ) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; +} + else +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_HID; + } + } + else if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) ) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_A2DP; + } +} + else +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! NO matched profile for NumberOfHandle=%d\n", + pBtMgnt->ExtConfig.NumberOfHandle)); + } + } + } + else if(pBtMgnt->ExtConfig.NumberOfHandle == 3) + { + if(bScoExist) + { + if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) ) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP\n")); + } + else if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) ) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + HID + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + HID + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_HID; + } + } + else if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) ) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO + A2DP + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_SCO; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO + A2DP + PAN(EDR)\n")); + + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO exists but why NO matched profile for NumberOfHandle=%d\n", + pBtMgnt->ExtConfig.NumberOfHandle)); + } + } + else + { + if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) ) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP_PANHS; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP_PANEDR; + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! NO matched profile for NumberOfHandle=%d\n", + pBtMgnt->ExtConfig.NumberOfHandle)); + } + } + } + else if(pBtMgnt->ExtConfig.NumberOfHandle >= 3) + { + if(bScoExist) + { + if( BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && + BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) ) + { + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); + + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(EDR)\n")); + + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO exists but why NO matched profile for NumberOfHandle=%d\n", + pBtMgnt->ExtConfig.NumberOfHandle)); + } +} + else +{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! NO matched profile for NumberOfHandle=%d\n", + pBtMgnt->ExtConfig.NumberOfHandle)); + } + } + + return algorithm; + } + +u8 btdm_NeedToDecBtPwr(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PADAPTER pDefaultAdapter = GetDefaultAdapter(padapter); + u8 bRet=_FALSE; + + if(BT_Operation(padapter)) + { + if(pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB > 47) + { + RTPRINT(FBT, BT_TRACE, ("Need to decrease bt power for HS mode!!\n")); + bRet = _TRUE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("NO Need to decrease bt power for HS mode!!\n")); + } + } + else + { + if(BTDM_IsWifiConnectionExist(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Need to decrease bt power for Wifi is connected!!\n")); + bRet = _TRUE; + } + #if 0 + if(MgntLinkStatusQuery(pDefaultAdapter) == RT_MEDIA_CONNECT) + { + RTPRINT(FBT, BT_TRACE, ("Need to decrease bt power for Wifi is connected!!\n")); + bRet = TRUE; + } + #endif + } + return bRet; +} + + +u8 btdm_IsBadIsolation(PADAPTER padapter) + { + return _FALSE; + } + +void +btdm_SetCoexTable( + PADAPTER padapter, + u32 val0x6c0, + u32 val0x6c8, + u8 val0x6cc + ) + { + RTPRINT(FBT, BT_TRACE, ("set coex table, set 0x6c0=0x%x\n", val0x6c0)); + rtw_write32(padapter, 0x6c0, val0x6c0); + + RTPRINT(FBT, BT_TRACE, ("set coex table, set 0x6c8=0x%x\n", val0x6c8)); + rtw_write32(padapter, 0x6c8, val0x6c8); + + RTPRINT(FBT, BT_TRACE, ("set coex table, set 0x6cc=0x%x\n", val0x6cc)); + rtw_write8(padapter, 0x6cc, val0x6cc); + } + + +void btdm_SetSwFullTimeDacSwing(PADAPTER padapter,u8 bSwDacSwingOn,u32 swDacSwingLvl) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if(bSwDacSwingOn) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SwDacSwing = 0x%x\n", swDacSwingLvl)); + PHY_SetBBReg(padapter, 0x880, 0xff000000, swDacSwingLvl); + pHalData->bt_coexist.bSWCoexistAllOff = _FALSE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SwDacSwing Off!\n")); + PHY_SetBBReg(padapter, 0x880, 0xff000000, 0xc0); + } +} + + +void btdm_SetFwDacSwingLevel(PADAPTER padapter, u8 dacSwingLvl) +{ + u1Byte H2C_Parameter[1] ={0}; + + H2C_Parameter[0] = dacSwingLvl; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], write 0x29=0x%x\n", H2C_Parameter[0])); + + FillH2CCmd(padapter, 0x29, 1, H2C_Parameter); +} + +void btdm_2AntDecBtPwr(PADAPTER padapter,u8 bDecBtPwr) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Dec BT power = %s\n", ((bDecBtPwr)? "ON":"OFF"))); + pBtdm8723->bCurDecBtPwr = bDecBtPwr; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPreDecBtPwr=%d, bCurDecBtPwr=%d\n", + // pBtdm8723->bPreDecBtPwr, pBtdm8723->bCurDecBtPwr)); + + if(pBtdm8723->bPreDecBtPwr == pBtdm8723->bCurDecBtPwr) + return; + + BTDM_SetFwDecBtPwr(padapter, pBtdm8723->bCurDecBtPwr); + + pBtdm8723->bPreDecBtPwr = pBtdm8723->bCurDecBtPwr; +} + + void btdm_2AntFwDacSwingLvl(PADAPTER padapter,u8 fwDacSwingLvl) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], set FW Dac Swing level = %d\n", fwDacSwingLvl)); + pBtdm8723->curFwDacSwingLvl = fwDacSwingLvl; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", + // pBtdm8723->preFwDacSwingLvl, pBtdm8723->curFwDacSwingLvl)); + + if(pBtdm8723->preFwDacSwingLvl == pBtdm8723->curFwDacSwingLvl) + return; + + btdm_SetFwDacSwingLevel(padapter, pBtdm8723->curFwDacSwingLvl); + + pBtdm8723->preFwDacSwingLvl = pBtdm8723->curFwDacSwingLvl; +} + +void btdm_2AntRfShrink( PADAPTER padapter, u8 bRxRfShrinkOn) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], turn Rx RF Shrink = %s\n", ((bRxRfShrinkOn)? "ON":"OFF"))); + pBtdm8723->bCurRfRxLpfShrink = bRxRfShrinkOn; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n", + // pBtdm8723->bPreRfRxLpfShrink, pBtdm8723->bCurRfRxLpfShrink)); + + if(pBtdm8723->bPreRfRxLpfShrink == pBtdm8723->bCurRfRxLpfShrink) + return; + + BTDM_SetSwRfRxLpfCorner(padapter, (u8)pBtdm8723->bCurRfRxLpfShrink); + + pBtdm8723->bPreRfRxLpfShrink = pBtdm8723->bCurRfRxLpfShrink; +} + +void btdm_2AntLowPenaltyRa(PADAPTER padapter, u8 bLowPenaltyRa) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], turn LowPenaltyRA = %s\n", ((bLowPenaltyRa)? "ON":"OFF"))); + pBtdm8723->bCurLowPenaltyRa = bLowPenaltyRa; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n", + // pBtdm8723->bPreLowPenaltyRa, pBtdm8723->bCurLowPenaltyRa)); + + if(pBtdm8723->bPreLowPenaltyRa == pBtdm8723->bCurLowPenaltyRa) + return; + + BTDM_SetSwPenaltyTxRateAdaptive(padapter, (u1Byte)pBtdm8723->bCurLowPenaltyRa); + + pBtdm8723->bPreLowPenaltyRa = pBtdm8723->bCurLowPenaltyRa; + } + + + +void btdm_2AntDacSwing(PADAPTER padapter,u8 bDacSwingOn,u32 dacSwingLvl ) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], turn DacSwing=%s, dacSwingLvl=0x%x\n", + ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); + pBtdm8723->bCurDacSwingOn = bDacSwingOn; + pBtdm8723->curDacSwingLvl = dacSwingLvl; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n", + // pBtdm8723->bPreDacSwingOn, pBtdm8723->preDacSwingLvl, + // pBtdm8723->bCurDacSwingOn, pBtdm8723->curDacSwingLvl)); + + if( (pBtdm8723->bPreDacSwingOn == pBtdm8723->bCurDacSwingOn) && + (pBtdm8723->preDacSwingLvl == pBtdm8723->curDacSwingLvl) ) + return; + + rtw_mdelay_os(30); + btdm_SetSwFullTimeDacSwing(padapter, bDacSwingOn, dacSwingLvl); + + pBtdm8723->bPreDacSwingOn = pBtdm8723->bCurDacSwingOn; + pBtdm8723->preDacSwingLvl = pBtdm8723->curDacSwingLvl; + } + + +void btdm_2AntAdcBackOff(PADAPTER padapter,u8 bAdcBackOff) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], turn AdcBackOff = %s\n", ((bAdcBackOff)? "ON":"OFF"))); + pBtdm8723->bCurAdcBackOff = bAdcBackOff; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n", + // pBtdm8723->bPreAdcBackOff, pBtdm8723->bCurAdcBackOff)); + + if(pBtdm8723->bPreAdcBackOff == pBtdm8723->bCurAdcBackOff) + return; + + BTDM_BBBackOffLevel(padapter, (u8)pBtdm8723->bCurAdcBackOff); + + pBtdm8723->bPreAdcBackOff = pBtdm8723->bCurAdcBackOff; + } + +void btdm_2AntAgcTable(PADAPTER padapter,u8 bAgcTableEn) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], %s Agc Table\n", ((bAgcTableEn)? "Enable":"Disable"))); + pBtdm8723->bCurAgcTableEn = bAgcTableEn; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", + // pBtdm8723->bPreAgcTableEn, pBtdm8723->bCurAgcTableEn)); + + if(pBtdm8723->bPreAgcTableEn == pBtdm8723->bCurAgcTableEn) + return; + + BTDM_AGCTable(padapter, (u8)bAgcTableEn); + + pBtdm8723->bPreAgcTableEn = pBtdm8723->bCurAgcTableEn; + } + +void btdm_2AntCoexTable( PADAPTER padapter,u32 val0x6c0,u32 val0x6c8,u8 val0x6cc) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", +// val0x6c0, val0x6c8, val0x6cc)); + pBtdm8723->curVal0x6c0 = val0x6c0; + pBtdm8723->curVal0x6c8 = val0x6c8; + pBtdm8723->curVal0x6cc = val0x6cc; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n", + // pBtdm8723->preVal0x6c0, pBtdm8723->preVal0x6c8, pBtdm8723->preVal0x6cc)); + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n", + // pBtdm8723->curVal0x6c0, pBtdm8723->curVal0x6c8, pBtdm8723->curVal0x6cc)); + + if( (pBtdm8723->preVal0x6c0 == pBtdm8723->curVal0x6c0) && + (pBtdm8723->preVal0x6c8 == pBtdm8723->curVal0x6c8) && + (pBtdm8723->preVal0x6cc == pBtdm8723->curVal0x6cc) ) + return; + + btdm_SetCoexTable(padapter, val0x6c0, val0x6c8, val0x6cc); + + pBtdm8723->preVal0x6c0 = pBtdm8723->curVal0x6c0; + pBtdm8723->preVal0x6c8 = pBtdm8723->curVal0x6c8; + pBtdm8723->preVal0x6cc = pBtdm8723->curVal0x6cc; +} + +void btdm_2AntIgnoreWlanAct(PADAPTER padapter,u8 bEnable) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], turn Ignore WlanAct %s\n", (bEnable? "ON":"OFF"))); + pBtdm8723->bCurIgnoreWlanAct = bEnable; + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n", + // pBtdm8723->bPreIgnoreWlanAct, pBtdm8723->bCurIgnoreWlanAct)); + + if(pBtdm8723->bPreIgnoreWlanAct == pBtdm8723->bCurIgnoreWlanAct) + return; + + btdm_SetFwIgnoreWlanAct(padapter,bEnable); + pBtdm8723->bPreIgnoreWlanAct = pBtdm8723->bCurIgnoreWlanAct; +} +void btdm_2AntSetTable(PADAPTER padapter,u8 byte){ + u8 value; + u32 val0x6c0,val0x6c4; + value =(byte&(BIT4|BIT3))>>3; + + switch(value){ + case 0: + val0x6c0=0x55555555; + val0x6c4=0x55555555; + break; + case 1: + val0x6c0=0x55555555; + val0x6c4=0x5afa5afa; + break; + case 2: + val0x6c0=0x55ff55ff; + val0x6c4=0x5a5a5a5a; + break; + case 3: + val0x6c0=0x55ff55ff; + val0x6c4=0x5afa5afa; + break; + } + RTPRINT(FBT, BT_TRACE, ("set coex table, set 0x6c0=0x%x 0x6c4=0x%x\n", val0x6c0, val0x6c4)); + rtw_write32(padapter, 0x6c0, val0x6c0); + rtw_write32(padapter, 0x6c4, val0x6c4); +} + +void btdm_2AntSetFw3a(PADAPTER padapter,u8 byte1,u8 byte2,u8 byte3,u8 byte4,u8 byte5) + { + u8 H2C_Parameter[5] ={0}; + + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + // byte1[1:0] != 0 means enable pstdma + // for 2Ant bt coexist, if byte1 != 0 means enable pstdma + if(byte1) + { + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + H2C_Parameter[0] = byte1; + H2C_Parameter[1] = byte2; + H2C_Parameter[2] = byte3; + H2C_Parameter[3] = byte4; + H2C_Parameter[4] = byte5; + + pHalData->bt_coexist.fw3aVal[0] = byte1; + pHalData->bt_coexist.fw3aVal[1] = byte2; + pHalData->bt_coexist.fw3aVal[2] = byte3; + pHalData->bt_coexist.fw3aVal[3] = byte4; + pHalData->bt_coexist.fw3aVal[4] = byte5; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n", + H2C_Parameter[0], + H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); + + FillH2CCmd(padapter, 0x3a, 5, H2C_Parameter); + btdm_2AntSetTable(padapter,byte5); // Driver need to set the Coex Table value after FW version 35. + } + +void btdm_2AntPsTdma(PADAPTER padapter,u8 bTurnOn,u8 type) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + u32 btTxRxCnt=0; + u8 bTurnOnByCnt=_FALSE; + u8 psTdmaTypeByCnt=0; + + btTxRxCnt = BTDM_BtTxRxCounterH(padapter)+BTDM_BtTxRxCounterL(padapter); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT TxRx Counters = %d\n", btTxRxCnt)); + if(btTxRxCnt > 3000) + { + bTurnOnByCnt = _TRUE; + psTdmaTypeByCnt = 8; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], For BTTxRxCounters, turn %s PS TDMA, type=%d\n", (bTurnOnByCnt? "ON":"OFF"), psTdmaTypeByCnt)); + pBtdm8723->bCurPsTdmaOn = bTurnOnByCnt; + pBtdm8723->curPsTdma = psTdmaTypeByCnt; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], turn %s PS TDMA, type=%d\n", (bTurnOn? "ON":"OFF"), type)); + pBtdm8723->bCurPsTdmaOn = bTurnOn; + pBtdm8723->curPsTdma = type; + } + + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", + // pBtdm8723->bPrePsTdmaOn, pBtdm8723->bCurPsTdmaOn)); + //RTPRINT(FBT, BT_TRACE, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", + // pBtdm8723->prePsTdma, pBtdm8723->curPsTdma)); + + if( (pBtdm8723->bPrePsTdmaOn == pBtdm8723->bCurPsTdmaOn) && + (pBtdm8723->prePsTdma == pBtdm8723->curPsTdma) ) + return; + + if(bTurnOn) + { + switch(type) + { + case 1: + default: + btdm_2AntSetFw3a(padapter, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); + break; + case 2: + btdm_2AntSetFw3a(padapter, 0xe3, 0x12, 0x12, 0xe1, 0x98); + break; + case 3: + btdm_2AntSetFw3a(padapter, 0xe3, 0xa, 0xa, 0xe1, 0x98); + break; + case 4: + btdm_2AntSetFw3a(padapter, 0xa3, 0x5, 0x5, 0xe1, 0x80); + break; + case 5: + btdm_2AntSetFw3a(padapter, 0xe3, 0x1a, 0x1a, 0x60, 0x98); + break; + case 6: + btdm_2AntSetFw3a(padapter, 0xe3, 0x12, 0x12, 0x60, 0x98); + break; + case 7: + btdm_2AntSetFw3a(padapter, 0xe3, 0xa, 0xa, 0x60, 0x98); + break; + case 8: + btdm_2AntSetFw3a(padapter, 0xa3, 0x5, 0x5, 0x60, 0x80); + break; + case 9: + btdm_2AntSetFw3a(padapter, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); + break; + case 10: + btdm_2AntSetFw3a(padapter, 0xe3, 0x12, 0x12, 0xe1, 0x98); + break; + case 11: + btdm_2AntSetFw3a(padapter, 0xe3, 0xa, 0xa, 0xe1, 0x98); + break; + case 12: + btdm_2AntSetFw3a(padapter, 0xe3, 0x5, 0x5, 0xe1, 0x98); + break; + case 13: + btdm_2AntSetFw3a(padapter, 0xe3, 0x1a, 0x1a, 0x60, 0x98); + break; + case 14: + btdm_2AntSetFw3a(padapter, 0xe3, 0x12, 0x12, 0x60, 0x98); + break; + case 15: + btdm_2AntSetFw3a(padapter, 0xe3, 0xa, 0xa, 0x60, 0x98); + break; + case 16: + btdm_2AntSetFw3a(padapter, 0xe3, 0x5, 0x5, 0x60, 0x98); + break; + case 17: + btdm_2AntSetFw3a(padapter, 0xa3, 0x2f, 0x2f, 0x60, 0x80); + break; + case 18: + btdm_2AntSetFw3a(padapter, 0xe3, 0x5, 0x5, 0xe1, 0x98); + break; + case 19: + btdm_2AntSetFw3a(padapter, 0xe3, 0x25, 0x25, 0xe1, 0x98); + break; + case 20: + btdm_2AntSetFw3a(padapter, 0xe3, 0x25, 0x25, 0x60, 0x98); + break; + } + } + else + { + // disable PS tdma + switch(type) + { + case 0: + btdm_2AntSetFw3a(padapter, 0x0, 0x0, 0x0, 0x8, 0x0); + break; + case 1: + btdm_2AntSetFw3a(padapter, 0x0, 0x0, 0x0, 0x0, 0x0); + break; + default: + btdm_2AntSetFw3a(padapter, 0x0, 0x0, 0x0, 0x8, 0x0); + break; + } + } + + // update pre state + pBtdm8723->bPrePsTdmaOn = pBtdm8723->bCurPsTdmaOn; + pBtdm8723->prePsTdma = pBtdm8723->curPsTdma; + } + + + +void btdm_2AntBtInquiryPage(PADAPTER padapter) +{ + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _TRUE, 8); +} + + +u8 btdm_HoldForBtInqPage( PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u32 curTime=rtw_get_current_time(); + + if(pHalData->bt_coexist.halCoex8723.bC2hBtInquiryPage) + { + // bt inquiry or page is started. + if(pHalData->bt_coexist.halCoex8723.btInqPageStartTime == 0) + { + pHalData->bt_coexist.halCoex8723.btInqPageStartTime = curTime; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT Inquiry/page is started at time : 0x%"i64fmt"x \n", + pHalData->bt_coexist.halCoex8723.btInqPageStartTime)); + } + } + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT Inquiry/page started time : 0x%"i64fmt"x, curTime : 0x%x \n", + pHalData->bt_coexist.halCoex8723.btInqPageStartTime, curTime)); + + if(pHalData->bt_coexist.halCoex8723.btInqPageStartTime) + { + if(( (curTime - pHalData->bt_coexist.halCoex8723.btInqPageStartTime)/1000000) >= 10) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], BT Inquiry/page >= 10sec!!!")); + pHalData->bt_coexist.halCoex8723.btInqPageStartTime = 0; + } + } + + if(pHalData->bt_coexist.halCoex8723.btInqPageStartTime) + { + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _TRUE, 8); + return _TRUE; + } + else + return _FALSE; + } + + +u8 btdm_Is2Ant8723ACommonAction(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + u8 bCommon=_FALSE; + + RTPRINT(FBT, BT_TRACE, ("%s :BTDM_IsWifiConnectionExist =%x BTDM_CheckFWState=%x pmlmepriv->fw_state=0x%x\n",__func__,BTDM_IsWifiConnectionExist(padapter),BTDM_CheckFWState(padapter, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING)),padapter->mlmepriv.fw_state)); + + +// if(!BTDM_IsWifiBusy(padapter) && + if((BTDM_IsWifiConnectionExist(padapter) == _FALSE)&&(BTDM_CheckFWState(padapter, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _FALSE)&& + (BT_2ANT_BT_STATUS_IDLE == pBtdm8723->btStatus) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi idle + Bt idle!!\n")); + + btdm_2AntLowPenaltyRa(padapter, _FALSE); + btdm_2AntRfShrink(padapter, _FALSE); + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + btdm_2AntFwDacSwingLvl(padapter, 0x20); + btdm_2AntDecBtPwr(padapter, _FALSE); + + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + + bCommon = _TRUE; + } +// else if( BTDM_IsWifiBusy(padapter) && + else if(((BTDM_IsWifiConnectionExist(padapter) == _TRUE)||(BTDM_CheckFWState(padapter, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _TRUE))&& + (BT_2ANT_BT_STATUS_IDLE == pBtdm8723->btStatus) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi non-idle + BT idle!!\n")); + + btdm_2AntLowPenaltyRa(padapter, _TRUE); + btdm_2AntRfShrink(padapter, _FALSE); + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + btdm_2AntFwDacSwingLvl(padapter, 0x20); + btdm_2AntDecBtPwr(padapter, _TRUE); + + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + + bCommon = _TRUE; +} +// else if(!BTDM_IsWifiBusy(padapter) && + else if((BTDM_IsWifiConnectionExist(padapter) == _FALSE)&&(BTDM_CheckFWState(padapter, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _FALSE)&& + (BT_2ANT_BT_STATUS_CONNECTED_IDLE == pBtdm8723->btStatus) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi idle + Bt connected idle!!\n")); + + btdm_2AntLowPenaltyRa(padapter, _TRUE); + btdm_2AntRfShrink(padapter, _TRUE); + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + btdm_2AntFwDacSwingLvl(padapter, 0x20); + btdm_2AntDecBtPwr(padapter, _FALSE); + + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + + bCommon = _TRUE; + } +// else if(BTDM_IsWifiBusy(padapter) && + else if(((BTDM_IsWifiConnectionExist(padapter) == _TRUE)||(BTDM_CheckFWState(padapter, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _TRUE))&& + (BT_2ANT_BT_STATUS_CONNECTED_IDLE == pBtdm8723->btStatus) ) +{ + RTPRINT(FBT, BT_TRACE, ("Wifi non-idle + Bt connected idle!!\n")); + + btdm_2AntLowPenaltyRa(padapter, _TRUE); + btdm_2AntRfShrink(padapter, _TRUE); + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + btdm_2AntFwDacSwingLvl(padapter, 0x20); + btdm_2AntDecBtPwr(padapter, _TRUE); + + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + + bCommon = _TRUE; + } +// else if(!BTDM_IsWifiBusy(padapter) && + else if((BTDM_IsWifiConnectionExist(padapter) == _FALSE)&&(BTDM_CheckFWState(padapter, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _FALSE)&& + (BT_2ANT_BT_STATUS_NON_IDLE == pBtdm8723->btStatus) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi idle + BT non-idle!!\n")); + + btdm_2AntLowPenaltyRa(padapter, _TRUE); + btdm_2AntRfShrink(padapter, _TRUE); + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + btdm_2AntFwDacSwingLvl(padapter, 0x20); + btdm_2AntDecBtPwr(padapter, _FALSE); + + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + + bCommon = _TRUE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi non-idle + BT non-idle!!\n")); + btdm_2AntLowPenaltyRa(padapter, _TRUE); + btdm_2AntRfShrink(padapter, _TRUE); + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntFwDacSwingLvl(padapter, 0x20); + + bCommon = _FALSE; + } + + return bCommon; +} + + +void btdm_2AntTdmaDurationAdjust(PADAPTER padapter,u8 bScoHid,u8 bTxPause,u8 maxInterval) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT_MGNT pBtMgnt = &pHalData->BtInfo.BtMgnt; + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + static s32 up,dn,m,n,WaitCount; + s32 result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration + u8 retryCount=0; +// u8 BtState; + +// BtState = pHalData->bt_coexist.halCoex8723.c2hBtInfo; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); + + if(pBtdm8723->bResetTdmaAdjust) + { + pBtdm8723->bResetTdmaAdjust = _FALSE; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); + { + if(bScoHid) + { + if(bTxPause) + { + if(maxInterval == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; +} + else if(maxInterval == 2) +{ + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(maxInterval == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } +} + else +{ + if(maxInterval == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(maxInterval == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(maxInterval == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + } + } + else + { + if(bTxPause) + { + if(maxInterval == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(maxInterval == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(maxInterval == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + } + else + { + if(maxInterval == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(maxInterval == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(maxInterval == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } +} + } + } + //============ + up = 0; + dn = 0; + m = 1; + n= 3; + result = 0; + WaitCount = 0; + } + else + { + //accquire the BT TRx retry count from BT_Info byte2 + retryCount = pHalData->bt_coexist.halCoex8723.btRetryCnt; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); + result = 0; + WaitCount++; + + if(retryCount == 0) // no retry in the last 2-second duration +{ + up++; + dn--; + + if (dn <= 0) + dn = 0; + + if(up >= n) // if ³sÄò n Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration +{ + WaitCount = 0; + n = 3; + up = 0; + dn = 0; + result = 1; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Increase wifi duration!!\n")); +} + } + else if (retryCount <= 3) // <=3 retry in the last 2-second duration +{ + up--; + dn++; + + if (up <= 0) + up = 0; + + if (dn == 2) // if ³sÄò 2 Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration + { + if (WaitCount <= 2) + m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^ + else + m = 1; + + if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. + m = 20; + + n = 3*m; + up = 0; + dn = 0; + WaitCount = 0; + result = -1; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); + } +} + else //retry count > 3, ¥un1¦¸ retry count > 3, «h½Õ¯¶WiFi duration +{ + if (WaitCount == 1) + m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^ + else + m = 1; + + if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. + m = 20; + + n = 3*m; + up = 0; + dn = 0; + WaitCount = 0; + result = -1; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); + } + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); + if(maxInterval == 1) + { + if(bTxPause) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], TxPause = 1\n")); + if(pBtdm8723->curPsTdma == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 5); + pBtdm8723->psTdmaDuAdjType = 5; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 4) + { + btdm_2AntPsTdma(padapter, _TRUE, 8); + pBtdm8723->psTdmaDuAdjType = 8; + } + if(pBtdm8723->curPsTdma == 9) + { + btdm_2AntPsTdma(padapter, _TRUE, 13); + pBtdm8723->psTdmaDuAdjType = 13; +} + else if(pBtdm8723->curPsTdma == 10) +{ + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; +} + else if(pBtdm8723->curPsTdma == 11) +{ + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 12) + { + btdm_2AntPsTdma(padapter, _TRUE, 16); + pBtdm8723->psTdmaDuAdjType = 16; + } + + if(result == -1) + { + if(pBtdm8723->curPsTdma == 5) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 8); + pBtdm8723->psTdmaDuAdjType = 8; + } + else if(pBtdm8723->curPsTdma == 13) + { + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 16); + pBtdm8723->psTdmaDuAdjType = 16; + } + } + else if (result == 1) + { + if(pBtdm8723->curPsTdma == 8) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; +} + else if(pBtdm8723->curPsTdma == 6) +{ + btdm_2AntPsTdma(padapter, _TRUE, 5); + pBtdm8723->psTdmaDuAdjType = 5; + } + else if(pBtdm8723->curPsTdma == 16) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 13); + pBtdm8723->psTdmaDuAdjType = 13; + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], TxPause = 0\n")); + if(pBtdm8723->curPsTdma == 5) + { + btdm_2AntPsTdma(padapter, _TRUE, 1); + pBtdm8723->psTdmaDuAdjType = 1; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 8) + { + btdm_2AntPsTdma(padapter, _TRUE, 4); + pBtdm8723->psTdmaDuAdjType = 4; + } + if(pBtdm8723->curPsTdma == 13) + { + btdm_2AntPsTdma(padapter, _TRUE, 9); + pBtdm8723->psTdmaDuAdjType = 9; +} + else if(pBtdm8723->curPsTdma == 14) +{ + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 16) + { + btdm_2AntPsTdma(padapter, _TRUE, 12); + pBtdm8723->psTdmaDuAdjType = 12; + } + + if(result == -1) + { + if(pBtdm8723->curPsTdma == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 4); + pBtdm8723->psTdmaDuAdjType = 4; + } + else if(pBtdm8723->curPsTdma == 9) + { + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 12); + pBtdm8723->psTdmaDuAdjType = 12; + } + } + else if (result == 1) + { + if(pBtdm8723->curPsTdma == 4) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 1); + pBtdm8723->psTdmaDuAdjType = 1; + } + else if(pBtdm8723->curPsTdma == 12) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 9); + pBtdm8723->psTdmaDuAdjType = 9; + } + } + } + } + else if(maxInterval == 2) + { + if(bTxPause) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], TxPause = 1\n")); + if(pBtdm8723->curPsTdma == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 4) + { + btdm_2AntPsTdma(padapter, _TRUE, 8); + pBtdm8723->psTdmaDuAdjType = 8; + } + if(pBtdm8723->curPsTdma == 9) + { + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 12) + { + btdm_2AntPsTdma(padapter, _TRUE, 16); + pBtdm8723->psTdmaDuAdjType = 16; + } + if(result == -1) + { + if(pBtdm8723->curPsTdma == 5) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 8); + pBtdm8723->psTdmaDuAdjType = 8; + } + else if(pBtdm8723->curPsTdma == 13) + { + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 16); + pBtdm8723->psTdmaDuAdjType = 16; + } + } + else if (result == 1) + { + if(pBtdm8723->curPsTdma == 8) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 6); + pBtdm8723->psTdmaDuAdjType = 6; + } + else if(pBtdm8723->curPsTdma == 16) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 14); + pBtdm8723->psTdmaDuAdjType = 14; + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], TxPause = 0\n")); + if(pBtdm8723->curPsTdma == 5) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 8) + { + btdm_2AntPsTdma(padapter, _TRUE, 4); + pBtdm8723->psTdmaDuAdjType = 4; + } + if(pBtdm8723->curPsTdma == 13) + { + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 16) + { + btdm_2AntPsTdma(padapter, _TRUE, 12); + pBtdm8723->psTdmaDuAdjType = 12; + } + if(result == -1) + { + if(pBtdm8723->curPsTdma == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 4); + pBtdm8723->psTdmaDuAdjType = 4; + } + else if(pBtdm8723->curPsTdma == 9) + { + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 12); + pBtdm8723->psTdmaDuAdjType = 12; + } + } + else if (result == 1) + { + if(pBtdm8723->curPsTdma == 4) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 2); + pBtdm8723->psTdmaDuAdjType = 2; + } + else if(pBtdm8723->curPsTdma == 12) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 10); + pBtdm8723->psTdmaDuAdjType = 10; + } + } + } + } + else if(maxInterval == 3) + { + if(bTxPause) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], TxPause = 1\n")); + if(pBtdm8723->curPsTdma == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 4) + { + btdm_2AntPsTdma(padapter, _TRUE, 8); + pBtdm8723->psTdmaDuAdjType = 8; + } + if(pBtdm8723->curPsTdma == 9) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 12) + { + btdm_2AntPsTdma(padapter, _TRUE, 16); + pBtdm8723->psTdmaDuAdjType = 16; + } + if(result == -1) + { + if(pBtdm8723->curPsTdma == 5) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 8); + pBtdm8723->psTdmaDuAdjType = 8; + } + else if(pBtdm8723->curPsTdma == 13) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 16); + pBtdm8723->psTdmaDuAdjType = 16; + } + } + else if (result == 1) + { + if(pBtdm8723->curPsTdma == 8) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 7); + pBtdm8723->psTdmaDuAdjType = 7; + } + else if(pBtdm8723->curPsTdma == 16) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 15); + pBtdm8723->psTdmaDuAdjType = 15; + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], TxPause = 0\n")); + if(pBtdm8723->curPsTdma == 5) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 6) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 7) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 8) + { + btdm_2AntPsTdma(padapter, _TRUE, 4); + pBtdm8723->psTdmaDuAdjType = 4; + } + if(pBtdm8723->curPsTdma == 13) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 14) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 15) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 16) + { + btdm_2AntPsTdma(padapter, _TRUE, 12); + pBtdm8723->psTdmaDuAdjType = 12; + } + if(result == -1) + { + if(pBtdm8723->curPsTdma == 1) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 4); + pBtdm8723->psTdmaDuAdjType = 4; + } + else if(pBtdm8723->curPsTdma == 9) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 12); + pBtdm8723->psTdmaDuAdjType = 12; + } + } + else if (result == 1) + { + if(pBtdm8723->curPsTdma == 4) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 3) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 2) + { + btdm_2AntPsTdma(padapter, _TRUE, 3); + pBtdm8723->psTdmaDuAdjType = 3; + } + else if(pBtdm8723->curPsTdma == 12) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 11) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + else if(pBtdm8723->curPsTdma == 10) + { + btdm_2AntPsTdma(padapter, _TRUE, 11); + pBtdm8723->psTdmaDuAdjType = 11; + } + } + } + } + } + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PsTdma type : recordPsTdma=%d\n",pBtdm8723->psTdmaDuAdjType)); + // if current PsTdma not match with the recorded one (when scan, dhcp...), + // then we have to adjust it back to the previous record one. + if(pBtdm8723->curPsTdma != pBtdm8723->psTdmaDuAdjType) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", + pBtdm8723->curPsTdma, pBtdm8723->psTdmaDuAdjType)); + + if( BTDM_CheckFWState(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _FALSE ) + { + btdm_2AntPsTdma(padapter, _TRUE, pBtdm8723->psTdmaDuAdjType); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); + } + } +} + +// default Action +void btdm_2Ant8723AAction0(PADAPTER padapter) +{ + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + btdm_2AntDecBtPwr(padapter, _FALSE); + + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntLowPenaltyRa(padapter, _FALSE); + btdm_2AntRfShrink(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); +} + +// SCO only or SCO+PAN(HS) +void btdm_2Ant8723ASCOAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1; + + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + // fw mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 11); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 15); + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 11); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 15); + } + + + // sw mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } + } + + +void btdm_2Ant8723AHIDAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + // fw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 9); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 13); + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 9); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 13); + } + + // sw mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } + } + +//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) +void btdm_2Ant8723AA2DPAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btInfoExt=pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + + // fw mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _FALSE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _FALSE, 1); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _TRUE, 1); + } + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _FALSE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _FALSE, 1); +} + } + else +{ + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _TRUE, 1); + } + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + + +void btdm_2Ant8723APANEDRAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + + // fw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 2); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 6); + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 2); + } + else +{ + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 6); + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } + } + + + +//PAN(HS) only +void btdm_2Ant8723APANHSAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1; + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 47, 0); + // fw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntDecBtPwr(padapter, _TRUE); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntDecBtPwr(padapter, _FALSE); + } + btdm_2AntPsTdma(padapter, _FALSE, 0); + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 47, 0); + + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high\n")); + // fw mechanism + btdm_2AntDecBtPwr(padapter, _TRUE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + + // sw mechanism + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low\n")); + // fw mechanism + btdm_2AntDecBtPwr(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + + +//PAN(EDR)+A2DP +void btdm_2Ant8723APANEDRA2DPAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1, btInfoExt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + // fw mechanism + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 4); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 2); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + // fw mechanism + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 8); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 6); + } + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + // fw mechanism + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 4); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 2); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + // fw mechanism + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 8); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 6); + } + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + + +void btdm_2Ant8723APANEDRHIDAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + // fw mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 10); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 14); + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 10); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 14); + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + +// HID+A2DP+PAN(EDR) +void btdm_2Ant8723AHIDA2DPPANEDRAction(PADAPTER padapter) +{ + u8 btRssiState, btRssiState1, btInfoExt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 12); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 10); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 16); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 14); + } + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 37, 0); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 27, 0); + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 12); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 10); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 16); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntPsTdma(padapter, _TRUE, 14); + } + } + + // sw mechanism + if ((btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } + } + + +void btdm_2Ant8723AHIDA2DPAction(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, btRssiState1, btInfoExt; + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 1); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 1); + } + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + btRssiState1 = BTDM_CheckCoexRSSIState(padapter, 2, 27, 0); + + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 1); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 1); + } + } + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + // sw mechanism + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + + +void btdm_2Ant8723AHidScoEsco(PADAPTER padapter ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, btRssiState1, btInfoExt; + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + // coex table + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + // fw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 2); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 2); + } + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 47, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _FALSE, 2); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + if(btInfoExt&BIT(0)) //a2dp rate, 1:basic /0:edr + { + RTPRINT(FBT, BT_TRACE, ("a2dp basic rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("a2dp edr rate \n")); + btdm_2AntTdmaDurationAdjust(padapter, _TRUE, _TRUE, 2); + } + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + +void btdm_2Ant8723AFtpA2dp( PADAPTER padapter ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, btRssiState1, btInfoExt; + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + // coex table + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 27, 0); + // fw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 7); + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 47, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 3); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 7); + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } + } + + +void btdm_2Ant8723AA2dp(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, btRssiState1, btInfoExt; + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + // coex table + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + // fw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _FALSE, 1); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _TRUE, 1); + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 47, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _FALSE, 1); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntTdmaDurationAdjust(padapter, _FALSE, _TRUE, 1); + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + + +void btdm_2Ant8723Ftp(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, btRssiState1, btInfoExt; + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + + if(btdm_NeedToDecBtPwr(padapter)) + btdm_2AntDecBtPwr(padapter, _TRUE); + else + btdm_2AntDecBtPwr(padapter, _FALSE); + // coex table + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + + if(BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 37, 0); + // fw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 1); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 5); + } + + // sw mechanism + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, 47, 0); + btRssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, 27, 0); + + // fw mechanism + if( (btRssiState1 == BT_RSSI_STATE_HIGH) || + (btRssiState1 == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 high \n")); + PlatformEFIOWrite1Byte(padapter, 0x883, 0x40); + btdm_2AntPsTdma(padapter, _TRUE, 1); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi-1 low \n")); + btdm_2AntPsTdma(padapter, _TRUE, 5); + } + + // sw mechanism + if( (btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH) ) + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi high \n")); + btdm_2AntAgcTable(padapter, _TRUE); + btdm_2AntAdcBackOff(padapter, _TRUE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Wifi rssi low \n")); + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + } + } +} + +//============================================================ +// extern function start with BTDM_ +//============================================================ +void BTDM_2AntParaInit(PADAPTER padapter) +{ + + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 2Ant Parameter Init!!\n")); + + // Enable counter statistics + rtw_write8(padapter, 0x76e, 0x4); + rtw_write8(padapter, 0x778, 0x3); + rtw_write8(padapter, 0x40, 0x20); + + // force to reset coex mechanism + pBtdm8723->preVal0x6c0 = 0x0; + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); + + pBtdm8723->bPrePsTdmaOn = _TRUE; + btdm_2AntPsTdma(padapter, _FALSE, 0); + + pBtdm8723->preFwDacSwingLvl = 0x10; + btdm_2AntFwDacSwingLvl(padapter, 0x20); + + pBtdm8723->bPreDecBtPwr = _TRUE; + btdm_2AntDecBtPwr(padapter, _FALSE); + + pBtdm8723->bPreAgcTableEn = _TRUE; + btdm_2AntAgcTable(padapter, _FALSE); + + pBtdm8723->bPreAdcBackOff = _TRUE; + btdm_2AntAdcBackOff(padapter, _FALSE); + + pBtdm8723->bPreLowPenaltyRa = _TRUE; + btdm_2AntLowPenaltyRa(padapter, _FALSE); + + pBtdm8723->bPreRfRxLpfShrink = _TRUE; + btdm_2AntRfShrink(padapter, _FALSE); + + pBtdm8723->bPreDacSwingOn = _TRUE; + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); + + pBtdm8723->bPreIgnoreWlanAct = _TRUE; + btdm_2AntIgnoreWlanAct(padapter, _FALSE); +} + +void BTDM_2AntHwCoexAllOff8723A(PADAPTER padapter) +{ + btdm_2AntCoexTable(padapter, 0x55555555, 0xffff, 0x3); +} + +void BTDM_2AntFwCoexAllOff8723A(PADAPTER padapter) +{ + btdm_2AntIgnoreWlanAct(padapter, _FALSE); + btdm_2AntPsTdma(padapter, _FALSE, 0); + btdm_2AntFwDacSwingLvl(padapter, 0x20); + btdm_2AntDecBtPwr(padapter, _FALSE); +} + +void BTDM_2AntSwCoexAllOff8723A(PADAPTER padapter) +{ + btdm_2AntAgcTable(padapter, _FALSE); + btdm_2AntAdcBackOff(padapter, _FALSE); + btdm_2AntLowPenaltyRa(padapter, _FALSE); + btdm_2AntRfShrink(padapter, _FALSE); + btdm_2AntDacSwing(padapter, _FALSE, 0xc0); +} + + +void BTDM_2AntIpsNotify8723A(PADAPTER padapter,u8 type) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt=&pBTInfo->BtMgnt; + + if(pBtMgnt->bSupportProfile && (rf_off==type)) + { + RTPRINT(FBT, BT_TRACE, ("[BT][DM], enter IPS, turn off all BT Coexist DM\n")); + BTDM_CoexAllOff(padapter); +} +} + + +void BTDM_2AntNotifyBtOperation8723(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + switch (pBtMgnt->ExtConfig.btOperationCode) + { + case HCI_BT_OP_NONE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for operation None!!\n")); + break; + case HCI_BT_OP_INQUIRY_START: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for Inquiry start!!\n")); + pBtMgnt->ExtConfig.bHoldForBtOperation = _TRUE; + pBtMgnt->ExtConfig.bHoldPeriodCnt = 1; + btdm_2AntBtInquiryPage(padapter); + break; + case HCI_BT_OP_INQUIRY_FINISH: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for Inquiry finished!!\n")); + pBtMgnt->ExtConfig.bHoldForBtOperation = _FALSE; + break; + case HCI_BT_OP_PAGING_START: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for paging start!!\n")); + pBtMgnt->ExtConfig.bHoldForBtOperation = _TRUE; + pBtMgnt->ExtConfig.bHoldPeriodCnt = 1; + btdm_2AntBtInquiryPage(padapter); + break; + case HCI_BT_OP_PAGING_SUCCESS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for paging successfully!!\n")); + pBtMgnt->ExtConfig.bHoldForBtOperation = _FALSE; + break; + case HCI_BT_OP_PAGING_UNSUCCESS: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for paging unsuccessfully!!\n")); + pBtMgnt->ExtConfig.bHoldForBtOperation = _FALSE; + break; + case HCI_BT_OP_PAIRING_START: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for Pairing start!!\n")); + pBtMgnt->ExtConfig.bHoldForBtOperation = _TRUE; + pBtMgnt->ExtConfig.bHoldPeriodCnt = 1; + btdm_2AntBtInquiryPage(padapter); + break; + case HCI_BT_OP_PAIRING_FINISH: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for Pairing finished!!\n")); + pBtMgnt->ExtConfig.bHoldForBtOperation = _FALSE; + break; + + case HCI_BT_OP_BT_DEV_ENABLE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for BT Device enable!!\n")); + break; + case HCI_BT_OP_BT_DEV_DISABLE: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for BT Device disable!!\n")); + break; + default: + RTPRINT(FIOCTL, IOCTL_BT_HCICMD_EXT, ("[BT OP] : Adjust for Unknown, error!!\n")); + break; + } +} + + + +void btdm_BtHwCountersMonitor(PADAPTER padapter); +VOID +BTDM_2AntFwC2hBtInfo8723A( + PADAPTER padapter + ) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + u1Byte btInfo=0; + u8 algorithm=BT_2ANT_COEX_ALGO_UNDEFINED; + u8 bScoExist=_FALSE, bBtLinkExist=_FALSE, bBtHsModeExist=_FALSE; + btInfo = pHalData->bt_coexist.halCoex8723.c2hBtInfoOriginal; + + + pBtdm8723->btStatus = BT_2ANT_BT_STATUS_IDLE; + + // check BIT2 first ==> check if bt is under inquiry or page scan + if(btInfo & BIT(2)) + { + if(pHalData->bt_coexist.halCoex8723.bC2hBtInquiryPage == _FALSE){ + pBtMgnt->ExtConfig.bHoldForBtOperation = _TRUE; + pBtMgnt->ExtConfig.bHoldPeriodCnt = 1; + btdm_2AntBtInquiryPage(padapter); + } + else{ + pBtMgnt->ExtConfig.bHoldPeriodCnt++; + btdm_HoldForBtInqPage(padapter); + } + pHalData->bt_coexist.halCoex8723.bC2hBtInquiryPage = _TRUE; + + } + else + { + pHalData->bt_coexist.halCoex8723.bC2hBtInquiryPage = _FALSE; + pBtMgnt->ExtConfig.bHoldForBtOperation = _FALSE; + pBtMgnt->ExtConfig.bHoldPeriodCnt = 0; + + + } + RTPRINT(FBT, BT_TRACE, ("[BTC2H], pHalData->bt_coexist.halCoex8723.bC2hBtInquiryPage=%x pBtMgnt->ExtConfig.bHoldPeriodCnt=%x pBtMgnt->ExtConfig.bHoldForBtOperation=%x\n",pHalData->bt_coexist.halCoex8723.bC2hBtInquiryPage,pBtMgnt->ExtConfig.bHoldPeriodCnt,pBtMgnt->ExtConfig.bHoldForBtOperation)); + + RTPRINT(FBT, BT_TRACE, ("[BTC2H], btInfo=%x pHalData->bt_coexist.halCoex8723.c2hBtInfoOriginal=%x\n",btInfo,pHalData->bt_coexist.halCoex8723.c2hBtInfoOriginal)); +// btdm_BtHwCountersMonitor(padapter); +// btdm_2AntBtEnableDisableCheck8723A(padapter); + if(btInfo&BT_INFO_ACL) + { + RTPRINT(FBT, BT_TRACE, ("[BTC2H], BTInfo: bConnect=TRUE btInfo=%x\n",btInfo)); + //pBtMgnt->ExtConfig.bBTBusy = _TRUE; + bBtLinkExist = _TRUE; + if(((btInfo&(BT_INFO_FTP|BT_INFO_A2DP|BT_INFO_HID|BT_INFO_SCO_BUSY))!=0) || pHalData->bt_coexist.halCoex8723.btRetryCnt>0){ + pBtdm8723->btStatus =BT_2ANT_BT_STATUS_NON_IDLE; + } + else + pBtdm8723->btStatus =BT_2ANT_BT_STATUS_CONNECTED_IDLE; + + + if(btInfo&BT_INFO_SCO|| btInfo&BT_INFO_SCO_BUSY){ + if(btInfo&BT_INFO_FTP|| btInfo&BT_INFO_A2DP||btInfo&BT_INFO_HID){ + switch(btInfo&0xe0){ + case BT_INFO_HID : + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + HID\n")); + algorithm = BT_2ANT_COEX_ALGO_HID; + break; + case BT_INFO_A2DP : + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Error!!! SCO + A2DP\n")); + break; + case BT_INFO_FTP : + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_SCO; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_HID; + } + break; + case (BT_INFO_HID|BT_INFO_A2DP) : + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + break; + case (BT_INFO_HID|BT_INFO_FTP) : + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_HID; + } + break; + case (BT_INFO_A2DP|BT_INFO_FTP) : + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_A2DP; + } + break; + case (BT_INFO_HID|BT_INFO_A2DP|BT_INFO_FTP) : + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP_PANEDR; + } + break; + + } + } + else{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], SCO only\n")); + algorithm = BT_2ANT_COEX_ALGO_SCO; + } + } + else{ + RTPRINT(FBT, BT_TRACE, ("[BTCoex], non SCO\n")); + switch(btInfo&0xe0){ + case BT_INFO_HID : + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID\n")); + algorithm = BT_2ANT_COEX_ALGO_HID; + break; + case BT_INFO_A2DP : + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP\n")); + algorithm = BT_2ANT_COEX_ALGO_A2DP; + break; + case BT_INFO_FTP : + RTPRINT(FBT, BT_TRACE, ("[BTCoex], PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_HID; + break; + case (BT_INFO_HID|BT_INFO_A2DP) : + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + break; + case (BT_INFO_HID|BT_INFO_FTP) : + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_HID; + } + break; + case (BT_INFO_A2DP|BT_INFO_FTP) : + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_PANEDR_A2DP; + } + break; + case (BT_INFO_HID|BT_INFO_A2DP|BT_INFO_FTP) : + if(bBtHsModeExist) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); + algorithm = BT_2ANT_COEX_ALGO_HID_A2DP_PANEDR; + } + break; + + } + + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTC2H], BTInfo: bConnect=FALSE\n")); + //pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pBtdm8723->btStatus =BT_2ANT_BT_STATUS_IDLE; + } + + pBtdm8723->curAlgorithm =algorithm; + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Algorithm = %d \n", pBtdm8723->curAlgorithm)); + +//From + BTDM_CheckWiFiState(padapter); + if(pBtMgnt->ExtConfig.bManualControl) + { + RTPRINT(FBT, BT_TRACE, ("Action Manual control, won't execute bt coexist mechanism!!\n")); + return; + } + +} + + +void BTDM_2AntBtCoexist8723A(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 BtState = 0, btInfoOriginal=0, btRetryCnt=0; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBTDM_8723A_2ANT pBtdm8723 = &pHalData->bt_coexist.halCoex8723.btdm2Ant; + + if (BTDM_BtProfileSupport(padapter)) + { + if (pBtMgnt->ExtConfig.bHoldForBtOperation) + { + RTPRINT(FBT, BT_TRACE, ("Action for BT Operation adjust!!\n")); + return; + } + if(pBtMgnt->ExtConfig.bHoldPeriodCnt) + { + RTPRINT(FBT, BT_TRACE, ("Hold BT inquiry/page scan setting (cnt = %d)!!\n", + pBtMgnt->ExtConfig.bHoldPeriodCnt)); + if(pBtMgnt->ExtConfig.bHoldPeriodCnt >= 11) + { + pBtMgnt->ExtConfig.bHoldPeriodCnt = 0; + // next time the coexist parameters should be reset again. + } + else + pBtMgnt->ExtConfig.bHoldPeriodCnt++; + return; + } + + if(pBtDbg->dbgCtrl) + { + RTPRINT(FBT, BT_TRACE, ("[Dbg control], ")); + } + + pBtdm8723->curAlgorithm = btdm_ActionAlgorithm(padapter); + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Algorithm = %d \n", pBtdm8723->curAlgorithm)); + + if (btdm_Is2Ant8723ACommonAction(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant common.\n")); + pBtdm8723->bResetTdmaAdjust = _TRUE; + } + else + { + if(pBtdm8723->curAlgorithm != pBtdm8723->preAlgorithm) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", + pBtdm8723->preAlgorithm, pBtdm8723->curAlgorithm)); + pBtdm8723->bResetTdmaAdjust = _TRUE; + } + switch(pBtdm8723->curAlgorithm) + { + case BT_2ANT_COEX_ALGO_SCO: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = SCO.\n")); + btdm_2Ant8723ASCOAction(padapter); + break; + case BT_2ANT_COEX_ALGO_HID: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID.\n")); + btdm_2Ant8723AHIDAction(padapter); + break; + case BT_2ANT_COEX_ALGO_A2DP: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = A2DP.\n")); + btdm_2Ant8723AA2DPAction(padapter); + break; + case BT_2ANT_COEX_ALGO_PANEDR: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = PAN(EDR).\n")); + btdm_2Ant8723APANEDRAction(padapter); + break; + case BT_2ANT_COEX_ALGO_PANHS: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HS mode.\n")); + btdm_2Ant8723APANHSAction(padapter); + break; + case BT_2ANT_COEX_ALGO_PANEDR_A2DP: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = PAN+A2DP.\n")); + btdm_2Ant8723APANEDRA2DPAction(padapter); + break; + case BT_2ANT_COEX_ALGO_PANEDR_HID: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); + btdm_2Ant8723APANEDRHIDAction(padapter); + break; + case BT_2ANT_COEX_ALGO_HID_A2DP_PANEDR: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); + btdm_2Ant8723AHIDA2DPPANEDRAction(padapter); + break; + case BT_2ANT_COEX_ALGO_HID_A2DP: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID+A2DP.\n")); + btdm_2Ant8723AHIDA2DPAction(padapter); + break; +#if 0 + case BT_2ANT_COEX_ALGO_HID_A2DP_PANHS: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID+A2DP+PAN(HS).\n")); + btdm_2Ant8723AHIDA2DPPANHSAction(padapter); + break; +#endif + default: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = 0.\n")); + //btdm_2Ant8723AAction0(padapter); + btdm_2Ant8723AA2DPAction(padapter); + break; + } + pBtdm8723->preAlgorithm = pBtdm8723->curAlgorithm; + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex] Get bt info by fw!!\n")); + //msg shows c2h rsp for bt_info is received or not. + if (pHalData->bt_coexist.halCoex8723.bC2hBtInfoReqSent) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex] c2h for btInfo not rcvd yet!!\n")); + } + + //btRetryCnt = pHalData->bt_coexist.halCoex8723.btRetryCnt; + btInfoOriginal = pHalData->bt_coexist.halCoex8723.c2hBtInfoOriginal; + + if(pBtMgnt->ExtConfig.bHoldForBtOperation) + { + RTPRINT(FBT, BT_TRACE, ("Action for BT Operation adjust!!\n")); + return; + } + if(pBtMgnt->ExtConfig.bHoldPeriodCnt) + { + RTPRINT(FBT, BT_TRACE, ("Hold BT inquiry/page scan setting (cnt = %d)!!\n", pBtMgnt->ExtConfig.bHoldPeriodCnt)); + if(pBtMgnt->ExtConfig.bHoldPeriodCnt >= 11) + { + pBtMgnt->ExtConfig.bHoldPeriodCnt = 0; + // next time the coexist parameters should be reset again. + } + else + pBtMgnt->ExtConfig.bHoldPeriodCnt++; + return; + } + + if(pBtDbg->dbgCtrl) + { + RTPRINT(FBT, BT_TRACE, ("[Dbg control], ")); + } + if (btdm_Is2Ant8723ACommonAction(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant common.\n")); + pBtdm8723->bResetTdmaAdjust = _TRUE; + } + else + { + if(pBtdm8723->curAlgorithm != pBtdm8723->preAlgorithm) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", pBtdm8723->preAlgorithm, pBtdm8723->curAlgorithm)); + pBtdm8723->bResetTdmaAdjust = _TRUE; + } + switch(pBtdm8723->curAlgorithm) + { + case BT_2ANT_COEX_ALGO_SCO: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = SCO.\n")); + btdm_2Ant8723ASCOAction(padapter); + break; + case BT_2ANT_COEX_ALGO_HID: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID.\n")); + btdm_2Ant8723AHIDAction(padapter); + break; + case BT_2ANT_COEX_ALGO_A2DP: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = A2DP.\n")); + btdm_2Ant8723AA2dp(padapter); + break; + case BT_2ANT_COEX_ALGO_PANEDR: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = PAN(EDR).\n")); + btdm_2Ant8723APANEDRAction(padapter); + break; + case BT_2ANT_COEX_ALGO_PANHS: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HS mode.\n")); + btdm_2Ant8723APANHSAction(padapter); + break; + case BT_2ANT_COEX_ALGO_PANEDR_A2DP: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = PAN+A2DP.\n")); + btdm_2Ant8723APANEDRA2DPAction(padapter); + break; + case BT_2ANT_COEX_ALGO_PANEDR_HID: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); + btdm_2Ant8723APANEDRHIDAction(padapter); + break; + case BT_2ANT_COEX_ALGO_HID_A2DP_PANEDR: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); + btdm_2Ant8723AHIDA2DPPANEDRAction(padapter); + break; + case BT_2ANT_COEX_ALGO_HID_A2DP: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID+A2DP.\n")); + btdm_2Ant8723AHIDA2DPAction(padapter); + break; +#if 0 + case BT_2ANT_COEX_ALGO_HID_A2DP_PANHS: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = HID+A2DP+PAN(HS).\n")); + btdm_2Ant8723ActionHidA2dpPanHs(Adapter); + break; +#endif + default: + RTPRINT(FBT, BT_TRACE, ("Action 2-Ant, algorithm = 0.\n")); + //btdm_2Ant8723AAction0(padapter); + btdm_2Ant8723AA2DPAction(padapter); + break; + } + pBtdm8723->preAlgorithm = pBtdm8723->curAlgorithm; + } +// pHalData->bt_coexist.halCoex8723.prec2hBtInfo = pHalData->bt_coexist.halCoex8723.c2hBtInfo; + + } +} + +// ===== End of sync from SD7 driver HAL/BTCoexist/HalBtc87232Ant.c ===== +#endif + +#ifdef __HALBTC8723_C__ // HAL/BTCoexist/HalBtc8723.c +// ===== Below this line is sync from SD7 driver HAL/BTCoexist/HalBtc8723.c ===== + +static u8 btCoexDbgBuf[BT_TMP_BUF_SIZE]; +const char *const BtProfileString[]={ + "NONE", + "A2DP", + "PAN", + "HID", + "SCO", +}; +const char *const BtSpecString[]={ + "1.0b", + "1.1", + "1.2", + "2.0+EDR", + "2.1+EDR", + "3.0+HS", + "4.0", +}; +const char *const BtLinkRoleString[]={ + "Master", + "Slave", +}; + +u8 btdm_BtWifiAntNum(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT_COEXIST_8723A pBtCoex = &pHalData->bt_coexist.halCoex8723; + +// RTPRINT(FBT, BT_TRACE, ("%s pHalData->bt_coexist.BluetoothCoexist =%x pHalData->EEPROMBluetoothCoexist=%x \n", +// __func__,pHalData->bt_coexist.BluetoothCoexist,pHalData->EEPROMBluetoothCoexist)); +// RTPRINT(FBT, BT_TRACE, ("%s pHalData->bt_coexist.BT_Ant_Num =%x pHalData->EEPROMBluetoothAntNum=%x \n", +// __func__,pHalData->bt_coexist.BT_Ant_Num,pHalData->EEPROMBluetoothAntNum)); + if (Ant_x2 == pHalData->bt_coexist.BT_Ant_Num) + { + if (Ant_x2 == pBtCoex->TotalAntNum) + return Ant_x2; + else + return Ant_x1; + } + else + { + return Ant_x1; + } + + return Ant_x2; +} + +u8 btdm_GetBtState(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT_COEXIST_8723A pBtCoex = &pHalData->bt_coexist.halCoex8723; + + return pBtCoex->c2hBtInfo; +} + +u8 btdm_IsBtInquiryPage(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT_COEXIST_8723A pBtCoex = &pHalData->bt_coexist.halCoex8723; + + return pBtCoex->bC2hBtInquiryPage; +} + +void btdm_BtHwCountersMonitor(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u32 regHPTxRx, regLPTxRx, u4Tmp; + u32 regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; +// u8 u1Tmp; + + + regHPTxRx = REG_HIGH_PRIORITY_TXRX; + regLPTxRx = REG_LOW_PRIORITY_TXRX; + + u4Tmp = rtw_read32(padapter, regHPTxRx); + regHPTx = u4Tmp & bMaskLWord; + regHPRx = (u4Tmp & bMaskHWord)>>16; + + u4Tmp = rtw_read32(padapter, regLPTxRx); + regLPTx = u4Tmp & bMaskLWord; + regLPRx = (u4Tmp & bMaskHWord)>>16; + + pHalData->bt_coexist.halCoex8723.highPriorityTx = regHPTx; + pHalData->bt_coexist.halCoex8723.highPriorityRx = regHPRx; + pHalData->bt_coexist.halCoex8723.lowPriorityTx = regLPTx; + pHalData->bt_coexist.halCoex8723.lowPriorityRx = regLPRx; + + RTPRINT(FBT, BT_TRACE, ("High Priority Tx/Rx= %d / %d\n", regHPTx, regHPRx)); + RTPRINT(FBT, BT_TRACE, ("Low Priority Tx/Rx= %d / %d\n", regLPTx, regLPRx)); + + // reset counter + //u1Tmp = rtw_read8(padapter, 0x76e); + //DbgPrint("read 2 back 0x76e= 0x%x\n", u1Tmp); + //u4Tmp |= BIT3; + rtw_write8(padapter, 0x76e, 0xc); +} + +// This function check if 8723 bt is disabled +void btdm_BtEnableDisableCheck8723A(PADAPTER padapter) +{ + u8 btAlife = _TRUE; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + +#ifdef CHECK_BT_EXIST_FROM_REG + u8 val8; + + // ox68[28]=1 => BT enable; otherwise disable + val8 = rtw_read8(padapter, 0x6B); + if (!(val8 & BIT(4))) btAlife = _FALSE; + + if (btAlife) + { + pHalData->bt_coexist.bCurBtDisabled = _FALSE; +// RTPRINT(FBT, BT_TRACE, ("8723A BT is enabled !!\n")); + } + else + { + pHalData->bt_coexist.bCurBtDisabled = _TRUE; +// RTPRINT(FBT, BT_TRACE, ("8723A BT is disabled !!\n")); + } +#else + if (pHalData->bt_coexist.halCoex8723.highPriorityTx == 0 && + pHalData->bt_coexist.halCoex8723.highPriorityRx == 0 && + pHalData->bt_coexist.halCoex8723.lowPriorityTx == 0 && + pHalData->bt_coexist.halCoex8723.lowPriorityRx == 0) + { + btAlife = _FALSE; + } + if (pHalData->bt_coexist.halCoex8723.highPriorityTx == 0xeaea && + pHalData->bt_coexist.halCoex8723.highPriorityRx == 0xeaea && + pHalData->bt_coexist.halCoex8723.lowPriorityTx == 0xeaea && + pHalData->bt_coexist.halCoex8723.lowPriorityRx == 0xeaea) + { + btAlife = _FALSE; + } + if (pHalData->bt_coexist.halCoex8723.highPriorityTx == 0xffff && + pHalData->bt_coexist.halCoex8723.highPriorityRx == 0xffff && + pHalData->bt_coexist.halCoex8723.lowPriorityTx == 0xffff && + pHalData->bt_coexist.halCoex8723.lowPriorityRx == 0xffff) + { + btAlife = _FALSE; + } + if (btAlife) + { + pHalData->bt_coexist.btActiveZeroCnt = 0; + pHalData->bt_coexist.bCurBtDisabled = _FALSE; + RTPRINT(FBT, BT_TRACE, ("8723A BT is enabled !!\n")); + } + else + { + pHalData->bt_coexist.btActiveZeroCnt++; + RTPRINT(FBT, BT_TRACE, ("8723A bt all counters=0, %d times!!\n", + pHalData->bt_coexist.btActiveZeroCnt)); + if (pHalData->bt_coexist.btActiveZeroCnt >= 2) + { + pHalData->bt_coexist.bCurBtDisabled = _TRUE; + RTPRINT(FBT, BT_TRACE, ("8723A BT is disabled !!\n")); + } + } +#endif + + if (pHalData->bt_coexist.bCurBtDisabled == _FALSE) { + if (BTDM_IsWifiConnectionExist(padapter) == _TRUE) + BTDM_SetFwChnlInfo(padapter, RT_MEDIA_CONNECT); + else + BTDM_SetFwChnlInfo(padapter, RT_MEDIA_DISCONNECT); + } + + if (pHalData->bt_coexist.bPreBtDisabled != + pHalData->bt_coexist.bCurBtDisabled) + { + RTPRINT(FBT, BT_TRACE, ("8723A BT is from %s to %s!!\n", + (pHalData->bt_coexist.bPreBtDisabled ? "disabled":"enabled"), + (pHalData->bt_coexist.bCurBtDisabled ? "disabled":"enabled"))); + pHalData->bt_coexist.bPreBtDisabled = pHalData->bt_coexist.bCurBtDisabled; + } +} + +void btdm_BTCoexist8723AHandler(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + + + pHalData = GET_HAL_DATA(padapter); + + if (btdm_BtWifiAntNum(padapter) == Ant_x2) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 2 Ant mechanism\n")); + BTDM_2AntBtCoexist8723A(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], 1 Ant mechanism\n")); + BTDM_1AntBtCoexist8723A(padapter); + } + + if (!BTDM_IsSameCoexistState(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Coexist State[bitMap] change from 0x%"i64fmt"x to 0x%"i64fmt"x\n", + pHalData->bt_coexist.PreviousState, + pHalData->bt_coexist.CurrentState)); + pHalData->bt_coexist.PreviousState = pHalData->bt_coexist.CurrentState; + + RTPRINT(FBT, BT_TRACE, ("[")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT30) + RTPRINT(FBT, BT_TRACE, ("BT 3.0, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_HT20) + RTPRINT(FBT, BT_TRACE, ("HT20, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_HT40) + RTPRINT(FBT, BT_TRACE, ("HT40, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_LEGACY) + RTPRINT(FBT, BT_TRACE, ("Legacy, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_LOW) + RTPRINT(FBT, BT_TRACE, ("Rssi_Low, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_MEDIUM) + RTPRINT(FBT, BT_TRACE, ("Rssi_Mid, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_HIGH) + RTPRINT(FBT, BT_TRACE, ("Rssi_High, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_IDLE) + RTPRINT(FBT, BT_TRACE, ("Wifi_Idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_UPLINK) + RTPRINT(FBT, BT_TRACE, ("Wifi_Uplink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_DOWNLINK) + RTPRINT(FBT, BT_TRACE, ("Wifi_Downlink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_IDLE) + RTPRINT(FBT, BT_TRACE, ("BT_idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_HID) + RTPRINT(FBT, BT_TRACE, ("PRO_HID, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_A2DP) + RTPRINT(FBT, BT_TRACE, ("PRO_A2DP, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_PAN) + RTPRINT(FBT, BT_TRACE, ("PRO_PAN, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_SCO) + RTPRINT(FBT, BT_TRACE, ("PRO_SCO, ")); + RTPRINT(FBT, BT_TRACE, ("]\n")); + } +} + +//============================================================ +// extern function start with BTDM_ +//============================================================ +u32 BTDM_BtTxRxCounterH( PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u32 counters=0; + + counters = pHalData->bt_coexist.halCoex8723.highPriorityTx+ + pHalData->bt_coexist.halCoex8723.highPriorityRx ; + return counters; +} + +u32 BTDM_BtTxRxCounterL( PADAPTER padapter ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u4Byte counters=0; + + counters = pHalData->bt_coexist.halCoex8723.lowPriorityTx+ + pHalData->bt_coexist.halCoex8723.lowPriorityRx ; + return counters; +} + +void BTDM_SetFwChnlInfo(PADAPTER padapter, RT_MEDIA_STATUS mstatus) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + u8 H2C_Parameter[3] ={0}; + u8 chnl; + + + if (!IS_HARDWARE_TYPE_8723A(padapter)) + return; + + // opMode + if (RT_MEDIA_CONNECT == mstatus) + { + H2C_Parameter[0] = 0x1; // 0: disconnected, 1:connected + } + + if (BTDM_CheckFWState(padapter, WIFI_ASOC_STATE) == _TRUE) + { + // channel + chnl = pmlmeext->cur_channel; + if (BTDM_IsHT40(padapter)) + { + if (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + { + chnl -= 2; + } + else if (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + { + chnl += 2; + } + } + H2C_Parameter[1] = chnl; +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], pmlmeext->cur_channel=0x%x pmlmeext->cur_ch_offset=0x%x chnl=0x%x\n",pmlmeext->cur_channel,pmlmeext->cur_ch_offset,chnl )); + } + else // check if HS link is exists + { + // channel + if (BT_Operation(padapter)) + H2C_Parameter[1] = pBtMgnt->BTChannel; + else + H2C_Parameter[1] = pmlmeext->cur_channel; + } + + if (BTDM_IsHT40(padapter)) + { + H2C_Parameter[2] = 0x30; + } + else + { + H2C_Parameter[2] = 0x20; + } + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], FW write 0x19=0x%x\n", +// H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); + + if (btdm_BtWifiAntNum(padapter) == Ant_x2) + { + FillH2CCmd(padapter, 0x19, 3, H2C_Parameter); + } +} + +u8 BTDM_IsWifiConnectionExist(PADAPTER padapter) +{ + u8 bRet = _FALSE; + + + if (BTHCI_HsConnectionEstablished(padapter)) + bRet = _TRUE; + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->pbuddy_adapter != NULL) + { + if ((BTDM_CheckFWState(padapter, WIFI_ASOC_STATE) == _TRUE) || (BTDM_CheckFWState(padapter->pbuddy_adapter, WIFI_ASOC_STATE) == _TRUE)) + bRet = _TRUE; + } + else + { + if (BTDM_CheckFWState(padapter, WIFI_ASOC_STATE) == _TRUE) + bRet = _TRUE; + } +#else + if (BTDM_CheckFWState(padapter, WIFI_ASOC_STATE) == _TRUE) + bRet = _TRUE; +#endif + + return bRet; +} + +void BTDM_SetFw3a( + PADAPTER padapter, + u8 byte1, + u8 byte2, + u8 byte3, + u8 byte4, + u8 byte5 + ) +{ + u8 H2C_Parameter[5] = {0}; + + if (BTDM_1Ant8723A(padapter) == _TRUE) + { + if ((BTDM_CheckFWState(padapter, WIFI_STATION_STATE) == _FALSE) && + (get_fwstate(&padapter->mlmepriv) != WIFI_NULL_STATE)) // for softap mode + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT_COEXIST_8723A pBtCoex = &pHalData->bt_coexist.halCoex8723; + u8 BtState = pBtCoex->c2hBtInfo; + + if ((BtState != BT_INFO_STATE_NO_CONNECTION) && + (BtState != BT_INFO_STATE_CONNECT_IDLE)) + { + if (byte1 & BIT(4)) + { + byte1 &= ~BIT(4); + byte1 |= BIT(5); + } + + byte5 |= BIT(5); + if (byte5 & BIT(6)) + { + byte5 &= ~BIT(6); + } + } + } + } + + H2C_Parameter[0] = byte1; + H2C_Parameter[1] = byte2; + H2C_Parameter[2] = byte3; + H2C_Parameter[3] = byte4; + H2C_Parameter[4] = byte5; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%02x%08x\n", + H2C_Parameter[0], + H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); + + FillH2CCmd(padapter, 0x3a, 5, H2C_Parameter); +} + +void BTDM_ForceBtCoexMechanism(PADAPTER padapter, u8 type) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + pHalData->bt_coexist.halCoex8723.bForceFwBtInfo = type; + + if (pHalData->bt_coexist.halCoex8723.bForceFwBtInfo) + { + DbgPrint("cosa force bt info from wifi fw !!!\n"); + } + else + { + DbgPrint("cosa force bt coexist bt info from bt stack\n"); + } +} + +void BTDM_QueryBtInformation(PADAPTER padapter) +{ + u8 H2C_Parameter[1] = {0}; + PHAL_DATA_TYPE pHalData; + PBT_COEXIST_8723A pBtCoex; + + + pHalData = GET_HAL_DATA(padapter); + pBtCoex = &pHalData->bt_coexist.halCoex8723; + + if (BT_IsBtDisabled(padapter) == _TRUE) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_DISABLED; + pBtCoex->bC2hBtInfoReqSent = _FALSE; + return; + } + + if (pBtCoex->c2hBtInfo == BT_INFO_STATE_DISABLED) + pBtCoex->c2hBtInfo = BT_INFO_STATE_NO_CONNECTION; + + if (pBtCoex->bC2hBtInfoReqSent == _TRUE) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], didn't recv previous BtInfo report!\n")); + } + else + { + pBtCoex->bC2hBtInfoReqSent = _TRUE; + } + + H2C_Parameter[0] |= BIT(0); // trigger + +// RTPRINT(FBT, BT_TRACE, ("[BTCoex], Query Bt information, write 0x38=0x%x\n", +// H2C_Parameter[0])); + + FillH2CCmd(padapter, 0x38, 1, H2C_Parameter); +} + +void BTDM_SetSwRfRxLpfCorner(PADAPTER padapter, u8 type) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (BT_RF_RX_LPF_CORNER_SHRINK == type) + { + //Shrink RF Rx LPF corner + RTPRINT(FBT, BT_TRACE, ("Shrink RF Rx LPF corner!!\n")); + PHY_SetRFReg(padapter, PathA, 0x1e, bRFRegOffsetMask, 0xf0ff7); + pHalData->bt_coexist.bSWCoexistAllOff = _FALSE; + } + else if (BT_RF_RX_LPF_CORNER_RESUME == type) + { + //Resume RF Rx LPF corner + RTPRINT(FBT, BT_TRACE, ("Resume RF Rx LPF corner!!\n")); + PHY_SetRFReg(padapter, PathA, 0x1e, bRFRegOffsetMask, pHalData->bt_coexist.BtRfRegOrigin1E); + } +} + +void +BTDM_SetSwPenaltyTxRateAdaptive( + PADAPTER padapter, + u8 raType + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 tmpU1; + + tmpU1 = rtw_read8(padapter, 0x4fd); + tmpU1 |= BIT(0); + if (BT_TX_RATE_ADAPTIVE_LOW_PENALTY == raType) + { +// RTPRINT(FBT, BT_TRACE, ("Tx rate adaptive, set low penalty!!\n")); + tmpU1 &= ~BIT(2); + pHalData->bt_coexist.bSWCoexistAllOff = _FALSE; + } + else if (BT_TX_RATE_ADAPTIVE_NORMAL == raType) + { +// RTPRINT(FBT, BT_TRACE, ("Tx rate adaptive, set normal!!\n")); + tmpU1 |= BIT(2); + } + + rtw_write8(padapter, 0x4fd, tmpU1); +} + +void BTDM_SetFwDecBtPwr(PADAPTER padapter, u8 bDecBtPwr) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 H2C_Parameter[1] = {0}; + + + H2C_Parameter[0] = 0; + + if (bDecBtPwr) + { + H2C_Parameter[0] |= BIT(1); + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], decrease Bt Power : %s, write 0x21=0x%x\n", + (bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0])); + + FillH2CCmd(padapter, 0x21, 1, H2C_Parameter); +} + +u8 BTDM_BtProfileSupport(PADAPTER padapter) +{ + u8 bRet = _FALSE; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + if (pBtMgnt->bSupportProfile && + !pHalData->bt_coexist.halCoex8723.bForceFwBtInfo) + { + bRet = _TRUE; + } + + return bRet; +} + +void BTDM_AdjustForBtOperation8723A(PADAPTER padapter) +{ + //BTDM_2AntAdjustForBtOperation8723(padapter); +} + +void BTDM_FwC2hBtRssi8723A(PADAPTER padapter, u8 *tmpBuf) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 percent=0, u1tmp=0; + + u1tmp = tmpBuf[0]; + percent = u1tmp*2+10; + + pHalData->bt_coexist.halCoex8723.btRssi = percent; +// RTPRINT(FBT, BT_TRACE, ("[BTC2H], BT RSSI=%d\n", percent)); +} + +void BTDM_FwC2hBtInfo8723A(PADAPTER padapter, u8 *tmpBuf, u8 length) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_COEXIST_8723A pBtCoex; + u8 i; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtCoex = &pHalData->bt_coexist.halCoex8723; + + pBtCoex->bC2hBtInfoReqSent = _FALSE; + + RTPRINT(FBT, BT_TRACE, ("[BTC2H], BT info[%d]=[", length)); + + pBtCoex->btRetryCnt = 0; + pBtCoex->AclTp=0; + for (i=0; i<length; i++) + { + switch (i) + { + case 0: + pBtCoex->c2hBtInfoOriginal = tmpBuf[i]; + break; + case 1: + pBtCoex->btRetryCnt = tmpBuf[i]; + break; + case 2: + BTDM_FwC2hBtRssi8723A(padapter, &tmpBuf[i]); + break; + case 3: + pBtCoex->btInfoExt=tmpBuf[i]&BIT(0); //EDR_BR + break; + case 4: + pBtCoex->AclTp=tmpBuf[i]; + break; + case 5: + pBtCoex->AclTp |=(tmpBuf[i]<<8); + break; + } + + if (i == length-1) + { + RTPRINT(FBT, BT_TRACE, ("0x%02x]\n", tmpBuf[i])); + } + else + { + RTPRINT(FBT, BT_TRACE, ("0x%02x, ", tmpBuf[i])); + } + } + RTPRINT(FBT, BT_TRACE, ("[BTC2H], BT RSSI=%d\n", pBtCoex->btRssi)); + if (pBtCoex->btInfoExt) + RTPRINT(FBT, BT_TRACE, ("[BTC2H], pBtCoex->btInfoExt=%x\n", pBtCoex->btInfoExt)); + + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntFwC2hBtInfo8723A(padapter); + else + BTDM_2AntFwC2hBtInfo8723A(padapter); + + if (pBtMgnt->ExtConfig.bManualControl) + { + RTPRINT(FBT, BT_TRACE, ("%s: Action Manual control!!\n", __FUNCTION__)); + return; + } + + btdm_BTCoexist8723AHandler(padapter); +} + +void BTDM_Display8723ABtCoexInfo(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT_COEXIST_8723A pBtCoex = &pHalData->bt_coexist.halCoex8723; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 u1Tmp, u1Tmp1, u1Tmp2, i, btInfoExt, psTdmaCase=0; + u32 u4Tmp[4]; + u8 antNum=Ant_x2; + + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); + DCMD_Printf(btCoexDbgBuf); + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); + DCMD_Printf(btCoexDbgBuf); + return; + } + + antNum = btdm_BtWifiAntNum(padapter); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/%d ", "Ant mechanism PG/Now run :", \ + ((pHalData->bt_coexist.BT_Ant_Num==Ant_x2)? 2:1), ((antNum==Ant_x2)? 2:1)); + DCMD_Printf(btCoexDbgBuf); + + if (pBtMgnt->ExtConfig.bManualControl) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); + DCMD_Printf(btCoexDbgBuf); + } + else + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ + ((pBtMgnt->bSupportProfile)? "Yes":"No"), pBtMgnt->ExtConfig.HCIExtensionVer); + DCMD_Printf(btCoexDbgBuf); + } + + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = / %d", "Dot11 channel / BT channel", \ + pBtMgnt->BTChannel); + DCMD_Printf(btCoexDbgBuf); + + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d", "Wifi/BT/HS rssi", \ + BTDM_GetRxSS(padapter), + pHalData->bt_coexist.halCoex8723.btRssi, + pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB); + DCMD_Printf(btCoexDbgBuf); + + if(!pBtMgnt->ExtConfig.bManualControl) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s ", "WIfi status", \ + ((BTDM_Legacy(padapter))? "Legacy": (((BTDM_IsHT40(padapter))? "HT40":"HT20"))), + ((!BTDM_IsWifiBusy(padapter))? "idle": ((BTDM_IsWifiUplink(padapter))? "uplink":"downlink"))); + DCMD_Printf(btCoexDbgBuf); + + if(pBtMgnt->bSupportProfile) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ + ((BTHCI_CheckProfileExist(padapter, BT_PROFILE_SCO))? 1: 0), + ((BTHCI_CheckProfileExist(padapter, BT_PROFILE_HID))? 1: 0), + ((BTHCI_CheckProfileExist(padapter, BT_PROFILE_PAN))? 1: 0), + ((BTHCI_CheckProfileExist(padapter, BT_PROFILE_A2DP))? 1: 0) ); + DCMD_Printf(btCoexDbgBuf); + + for (i=0; i<pBtMgnt->ExtConfig.NumberOfHandle; i++) + { + if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "Bt link type/spec/role", \ + BtProfileString[pBtMgnt->ExtConfig.linkInfo[i].BTProfile], + BtSpecString[pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec], + BtLinkRoleString[pBtMgnt->ExtConfig.linkInfo[i].linkRole]); + DCMD_Printf(btCoexDbgBuf); + + btInfoExt = pHalData->bt_coexist.halCoex8723.btInfoExt; + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "A2DP rate", \ + (btInfoExt&BIT0)? "Basic rate":"EDR rate"); + DCMD_Printf(btCoexDbgBuf); + } + else + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", "Bt link type/spec", \ + BtProfileString[pBtMgnt->ExtConfig.linkInfo[i].BTProfile], + BtSpecString[pBtMgnt->ExtConfig.linkInfo[i].BTCoreSpec]); + DCMD_Printf(btCoexDbgBuf); + } + } + } + } + + // Sw mechanism + if (!pBtMgnt->ExtConfig.bManualControl) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw BT Coex mechanism]============"); + DCMD_Printf(btCoexDbgBuf); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "AGC Table", \ + pBtCoex->btdm2Ant.bCurAgcTableEn); + DCMD_Printf(btCoexDbgBuf); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "ADC Backoff", \ + pBtCoex->btdm2Ant.bCurAdcBackOff); + DCMD_Printf(btCoexDbgBuf); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "Low penalty RA", \ + pBtCoex->btdm2Ant.bCurLowPenaltyRa); + DCMD_Printf(btCoexDbgBuf); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "RF Rx LPF Shrink", \ + pBtCoex->btdm2Ant.bCurRfRxLpfShrink); + DCMD_Printf(btCoexDbgBuf); + } + u4Tmp[0] = PHY_QueryRFReg(padapter, PathA, 0x1e, 0xff0); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "RF-A, 0x1e[11:4]/original val", \ + u4Tmp[0], pHalData->bt_coexist.BtRfRegOrigin1E); + DCMD_Printf(btCoexDbgBuf); + + // Fw mechanism + if (!pBtMgnt->ExtConfig.bManualControl) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw BT Coex mechanism]============"); + DCMD_Printf(btCoexDbgBuf); + } + if (!pBtMgnt->ExtConfig.bManualControl) + { + if(btdm_BtWifiAntNum(padapter) == Ant_x1) + psTdmaCase = pHalData->bt_coexist.halCoex8723.btdm1Ant.curPsTdma; + else + psTdmaCase = pHalData->bt_coexist.halCoex8723.btdm2Ant.curPsTdma; + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA(0x3a)", \ + pHalData->bt_coexist.fw3aVal[0], pHalData->bt_coexist.fw3aVal[1], + pHalData->bt_coexist.fw3aVal[2], pHalData->bt_coexist.fw3aVal[3], + pHalData->bt_coexist.fw3aVal[4], psTdmaCase); + DCMD_Printf(btCoexDbgBuf); + + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "Decrease Bt Power", \ + pBtCoex->btdm2Ant.bCurDecBtPwr); + DCMD_Printf(btCoexDbgBuf); + } + u1Tmp = rtw_read8(padapter, 0x778); + u1Tmp1 = rtw_read8(padapter, 0x783); + u1Tmp2 = rtw_read8(padapter, 0x796); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ + u1Tmp, u1Tmp1, u1Tmp2); + DCMD_Printf(btCoexDbgBuf); + + if (!pBtMgnt->ExtConfig.bManualControl) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x / 0x%x", "Sw DacSwing Ctrl/Val", \ + pBtCoex->btdm2Ant.bCurDacSwingOn, pBtCoex->btdm2Ant.curDacSwingLvl); + DCMD_Printf(btCoexDbgBuf); + } + u4Tmp[0] = rtw_read32(padapter, 0x880); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ + u4Tmp[0]); + DCMD_Printf(btCoexDbgBuf); + + // Hw mechanism + if (!pBtMgnt->ExtConfig.bManualControl) + { + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw BT Coex mechanism]============"); + DCMD_Printf(btCoexDbgBuf); + } + + u1Tmp = rtw_read8(padapter, 0x40); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ + u1Tmp); + DCMD_Printf(btCoexDbgBuf); + + u4Tmp[0] = rtw_read32(padapter, 0x550); + u1Tmp = rtw_read8(padapter, 0x522); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x", "0x550(bcn contrl)/0x522", \ + u4Tmp[0], u1Tmp); + DCMD_Printf(btCoexDbgBuf); + + u4Tmp[0] = rtw_read32(padapter, 0x484); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ + u4Tmp[0]); + DCMD_Printf(btCoexDbgBuf); + + u4Tmp[0] = rtw_read32(padapter, 0x50); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ + u4Tmp[0]); + DCMD_Printf(btCoexDbgBuf); + + u4Tmp[0] = rtw_read32(padapter, 0xda0); + u4Tmp[1] = rtw_read32(padapter, 0xda4); + u4Tmp[2] = rtw_read32(padapter, 0xda8); + u4Tmp[3] = rtw_read32(padapter, 0xdac); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ + u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); + DCMD_Printf(btCoexDbgBuf); + + u4Tmp[0] = rtw_read32(padapter, 0x6c0); + u4Tmp[1] = rtw_read32(padapter, 0x6c4); + u4Tmp[2] = rtw_read32(padapter, 0x6c8); + u1Tmp = rtw_read8(padapter, 0x6cc); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ + u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp); + DCMD_Printf(btCoexDbgBuf); + + //u4Tmp = rtw_read32(padapter, 0x770); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x770(Hi pri Rx[31:16]/Tx[15:0])", \ + pHalData->bt_coexist.halCoex8723.highPriorityRx, + pHalData->bt_coexist.halCoex8723.highPriorityTx); + DCMD_Printf(btCoexDbgBuf); + //u4Tmp = rtw_read32(padapter, 0x774); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x774(Lo pri Rx[31:16]/Tx[15:0])", \ + pHalData->bt_coexist.halCoex8723.lowPriorityRx, + pHalData->bt_coexist.halCoex8723.lowPriorityTx); + DCMD_Printf(btCoexDbgBuf); + + // Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang + u1Tmp = rtw_read8(padapter, 0x41b); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (hang chk == 0xf)", \ + u1Tmp); + DCMD_Printf(btCoexDbgBuf); + rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "lastHMEBoxNum", \ + pHalData->LastHMEBoxNum); + DCMD_Printf(btCoexDbgBuf); +} + +void BTDM_8723ASignalCompensation(PADAPTER padapter, u8 *rssi_wifi, u8 *rssi_bt) +{ + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntSignalCompensation(padapter, rssi_wifi, rssi_bt); +} + +void BTDM_8723AInit(PADAPTER padapter) +{ + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + if (btdm_BtWifiAntNum(padapter) == Ant_x2) + BTDM_2AntParaInit(padapter); + else + BTDM_1AntParaInit(padapter); + } +} + +void BTDM_HWCoexAllOff8723A(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x2) + BTDM_2AntHwCoexAllOff8723A(padapter); +} + +void BTDM_FWCoexAllOff8723A(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x2) + BTDM_2AntFwCoexAllOff8723A(padapter); +} + +void BTDM_SWCoexAllOff8723A(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x2) + BTDM_2AntSwCoexAllOff8723A(padapter); +} + +void +BTDM_Set8723ABtCoexCurrAntNum( + PADAPTER padapter, + u8 antNum + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT_COEXIST_8723A pBtCoex = &pHalData->bt_coexist.halCoex8723; + + if (antNum == 1) + { + pBtCoex->TotalAntNum = Ant_x1; + } + else if (antNum == 2) + { + pBtCoex->TotalAntNum = Ant_x2; + } +} + +void BTDM_LpsLeave(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntLpsLeave(padapter); +} + +void BTDM_ForHalt8723A(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntForHalt(padapter); +} + +void BTDM_WifiScanNotify8723A(PADAPTER padapter, u8 scanType) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntWifiScanNotify(padapter, scanType); +} + +void BTDM_WifiAssociateNotify8723A(PADAPTER padapter, u8 action) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntWifiAssociateNotify(padapter, action); +} + +void BTDM_MediaStatusNotify8723A(PADAPTER padapter, RT_MEDIA_STATUS mstatus) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], MediaStatusNotify, %s\n", mstatus?"connect":"disconnect")); + + BTDM_SetFwChnlInfo(padapter, mstatus); + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntMediaStatusNotify(padapter, mstatus); +} + +void BTDM_ForDhcp8723A(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + BTDM_1AntForDhcp(padapter); +} + +u8 BTDM_1Ant8723A(PADAPTER padapter) +{ + if (btdm_BtWifiAntNum(padapter) == Ant_x1) + return _TRUE; + else + return _FALSE; +} + +void BTDM_BTCoexist8723A(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_COEXIST_8723A pBtCoex; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtCoex = &pHalData->bt_coexist.halCoex8723; + + RTPRINT(FBT, BT_TRACE, ("[BTCoex], beacon RSSI=0x%x(%d)\n", + pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB, + pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB)); + + btdm_BtHwCountersMonitor(padapter); + btdm_BtEnableDisableCheck8723A(padapter); + + if (pBtMgnt->ExtConfig.bManualControl) + { + RTPRINT(FBT, BT_TRACE, ("%s: Action Manual control!!\n", __FUNCTION__)); + return; + } + + if (pBtCoex->bC2hBtInfoReqSent == _TRUE) + { + if (BT_IsBtDisabled(padapter) == _TRUE) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_DISABLED; + } + else + { + if (pBtCoex->c2hBtInfo == BT_INFO_STATE_DISABLED) + pBtCoex->c2hBtInfo = BT_INFO_STATE_NO_CONNECTION; + } + + btdm_BTCoexist8723AHandler(padapter); + } + else if (BT_IsBtDisabled(padapter) == _TRUE) + { + pBtCoex->c2hBtInfo = BT_INFO_STATE_DISABLED; + btdm_BTCoexist8723AHandler(padapter); + } + + BTDM_QueryBtInformation(padapter); +} + +u8 BTDM_GetBtState8723A(PADAPTER padapter) +{ + return btdm_GetBtState(padapter); +} + +u8 BTDM_IsBtInquiryPage8723A(PADAPTER padapter) +{ + return btdm_IsBtInquiryPage(padapter); +} + +// ===== End of sync from SD7 driver HAL/BTCoexist/HalBtc8723.c ===== +#endif + +#ifdef __HALBTCCSR1ANT_C__ // HAL/BTCoexist/HalBtcCsr1Ant.c +// ===== Below this line is sync from SD7 driver HAL/BTCoexist/HalBtcCsr1Ant.c ===== + +//============================================================ +// local function start with btdm_ +//============================================================ +void btdm_WriteReg860(PADAPTER padapter, u16 value) +{ + RTPRINT(FBT, BT_TRACE, ("btdm_WriteReg860(), value = 0x%x\n", value)); + PHY_SetBBReg(padapter, 0x860, bMaskLWord, value); +} + +void btdm_CheckCounterOnly1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + u32 BT_Polling, Ratio_Act, Ratio_STA; + u32 BT_Active, BT_State; + u32 regBTActive = 0, regBTState = 0, regBTPolling=0; + + if (!pHalData->bt_coexist.BluetoothCoexist) + return; + if (pHalData->bt_coexist.BT_CoexistType != BT_CSR_BC8) + return; + if (pHalData->bt_coexist.BT_Ant_Num != Ant_x1) + return; + + // + // The following we only consider CSR BC8 and fw version should be >= 62 + // + RTPRINT(FBT, BT_TRACE, ("[DM][BT], FirmwareVersion = 0x%x(%d)\n", + pHalData->FirmwareVersion, pHalData->FirmwareVersion)); + { + regBTActive = REG_BT_ACTIVE; + regBTState = REG_BT_STATE; + if (pHalData->FirmwareVersion >= FW_VER_BT_REG1) + regBTPolling = REG_BT_POLLING1; + else + regBTPolling = REG_BT_POLLING; + } + + BT_Active = rtw_read32(padapter, regBTActive); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Active(0x%x)=%x\n", regBTActive, BT_Active)); + BT_Active = BT_Active & 0x00ffffff; + + BT_State = rtw_read32(padapter, regBTState); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_State(0x%x)=%x\n", regBTState, BT_State)); + BT_State = BT_State & 0x00ffffff; + + BT_Polling = rtw_read32(padapter, regBTPolling); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Polling(0x%x)=%x\n", regBTPolling, BT_Polling)); + + Ratio_Act = BT_Active*1000/BT_Polling; + Ratio_STA = BT_State*1000/BT_Polling; + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Ratio_Act=%d\n", Ratio_Act)); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Ratio_STA=%d\n", Ratio_STA)); +} + +u8 +btdm_IsSingleAnt( + PADAPTER padapter, + u8 bSingleAntOn, + u8 bInterruptOn, + u8 bMultiNAVOn + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 bRet = _FALSE; + + if ((pHalData->bt_coexist.bInterruptOn == bInterruptOn) && + (pHalData->bt_coexist.bSingleAntOn == bSingleAntOn) && + (pHalData->bt_coexist.bMultiNAVOn == bMultiNAVOn)) + { + bRet = _TRUE; + } + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], current SingleAntenna = [%s:%s:%s]\n", + pHalData->bt_coexist.bSingleAntOn?"ON":"OFF", + pHalData->bt_coexist.bInterruptOn?"ON":"OFF", + pHalData->bt_coexist.bMultiNAVOn?"ON":"OFF")); + + return bRet; +} + +u8 btdm_IsBalance(PADAPTER padapter, u8 bBalanceOn) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_IsBalance(), bBalanceOn=%s\n", + bBalanceOn?"ON":"OFF")); + + if (pHalData->bt_coexist.bBalanceOn == bBalanceOn) + { + return _TRUE; + } + return _FALSE; +} + +u8 btdm_EarphoneSpecDetect(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + switch (pHalData->bt_coexist.A2DPState) + { + case BT_A2DP_STATE_NOT_ENTERED: + { + RTPRINT(FBT, BT_TRACE, (" set default balance = ON, for WLANActH=12, WLANActL=24!!\n")); + pHalData->bt_coexist.PreWLANActH = 12; + pHalData->bt_coexist.PreWLANActL = 24; + pHalData->bt_coexist.WLANActH = 12; + pHalData->bt_coexist.WLANActL = 24; + BTDM_Balance(padapter, _TRUE, pHalData->bt_coexist.WLANActH, pHalData->bt_coexist.WLANActL); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + pHalData->bt_coexist.A2DPState = BT_A2DP_STATE_DETECTING; + } + break; + + case BT_A2DP_STATE_DETECTING: + { + // 32,12; the most critical for BT + // 12,24 + // 0,0 + if (btdm_IsSingleAnt(padapter, _TRUE, _FALSE, _FALSE)) + { + if ((pHalData->bt_coexist.PreWLANActH == 0) && + (pHalData->bt_coexist.PreWLANActL == 0)) + { + RTPRINT(FBT, BT_TRACE, ("[WLANActH, WLANActL] = [0,0]\n")); + pHalData->bt_coexist.WLANActH = 12; + pHalData->bt_coexist.WLANActL = 24; + } + else if ((pHalData->bt_coexist.PreWLANActH == 12) && + (pHalData->bt_coexist.PreWLANActL == 24)) + { + RTPRINT(FBT, BT_TRACE, ("[WLANActH, WLANActL] = [12,24]\n")); + if (((pHalData->bt_coexist.Ratio_Tx>600) && + (pHalData->bt_coexist.Ratio_PRI>500)) || + ((pHalData->bt_coexist.Ratio_Tx*10 ) > + (pHalData->bt_coexist.Ratio_PRI*15))) + { + RTPRINT(FBT, BT_TRACE, ("Ratio_Act > 600 && Ratio_STA > 500 or ")); + RTPRINT(FBT, BT_TRACE, ("Ratio_Act/Ratio_STA > 1.5\n")); + pHalData->bt_coexist.WLANActH = 12; + pHalData->bt_coexist.WLANActL = 24; + } + else + { + RTPRINT(FBT, BT_TRACE, (" cosa set to 32/12\n ")); + pHalData->bt_coexist.WLANActH = 32; + pHalData->bt_coexist.WLANActL = 12; + } + } + else if ((pHalData->bt_coexist.PreWLANActH == 32) && + (pHalData->bt_coexist.PreWLANActL == 12)) + { + RTPRINT(FBT, BT_TRACE, ("[WLANActH, WLANActL] = [32,12]\n")); + if (((pHalData->bt_coexist.Ratio_Tx>650) && + (pHalData->bt_coexist.Ratio_PRI>550)) || + ((pHalData->bt_coexist.Ratio_Tx*10 ) > + (pHalData->bt_coexist.Ratio_PRI*15))) + { + RTPRINT(FBT, BT_TRACE, ("Ratio_Act > 650 && Ratio_STA > 550 or ")); + RTPRINT(FBT, BT_TRACE, ("Ratio_Act/Ratio_STA > 1.5\n")); + pHalData->bt_coexist.WLANActH = 12; + pHalData->bt_coexist.WLANActL = 24; + } + } + if ((pHalData->bt_coexist.PreWLANActH != pHalData->bt_coexist.WLANActH) || + (pHalData->bt_coexist.PreWLANActL != pHalData->bt_coexist.WLANActL)) + { + BTDM_Balance(padapter, _TRUE, pHalData->bt_coexist.WLANActH, pHalData->bt_coexist.WLANActL); + pHalData->bt_coexist.PreWLANActH = pHalData->bt_coexist.WLANActH; + pHalData->bt_coexist.PreWLANActL = pHalData->bt_coexist.WLANActL; + } + } + + RTPRINT(FBT, BT_TRACE, ("earphone detected result: WLANActH=%d, WLANActL=%d\n", + pHalData->bt_coexist.WLANActH, pHalData->bt_coexist.WLANActL)); + } + break; + + case BT_A2DP_STATE_DETECTED: + break; + + default: + RT_ASSERT(_FALSE, ("btdm_EarphoneSpecDetect(), unknown case\n")); + break; + } + return _TRUE; +} + +//============================================================== +// +// Note: +// In the following, FW should be done before SW mechanism. +// +//============================================================== + +void btdm_SCOActionBC81Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + u8 btRssiState; + + if ((pmlmepriv->LinkDetectInfo.bTxBusyTraffic) || + !(pmlmepriv->LinkDetectInfo.bBusyTraffic)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink or Wifi is idle\n")); + if (BTDM_IsSameCoexistState(padapter)) + return; + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + + if (btdm_IsSingleAnt(padapter, _FALSE, _FALSE, _FALSE)) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_20, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + if ((btRssiState == BT_RSSI_STATE_LOW) || + (btRssiState == BT_RSSI_STATE_STAY_LOW)) + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + } + } + else + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_45, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + } + else + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + } + } + } +} + +u8 btdm_SCOAction1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.NumberOfSCO > 0) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_SCO; + btdm_SCOActionBC81Ant(padapter); + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_SCO; + return _FALSE; + } +} + +void btdm_HIDActionBC81Ant(PADAPTER padapter) +{ +#if 0 + if (BTDM_IsSameCoexistState(padapter)) + return; +#endif + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); +} + +u8 btdm_HIDAction1Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && pBtMgnt->ExtConfig.NumberOfHandle==1) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_HID; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_PAN; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_A2DP; + btdm_HIDActionBC81Ant(padapter); + return _TRUE; + } + else + { + return _FALSE; + } +} + +void btdm_A2DPActionBC81Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + + // We have to detect BT earphone spec first. + btdm_EarphoneSpecDetect(padapter); + + if (!BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + if (btdm_IsSingleAnt(padapter, _FALSE, _FALSE, _FALSE)) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_30, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + + if ((btRssiState == BT_RSSI_STATE_LOW) || + (btRssiState == BT_RSSI_STATE_STAY_LOW)) + { + BTDM_Balance(padapter, _TRUE, pHalData->bt_coexist.WLANActH, pHalData->bt_coexist.WLANActL); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + else + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_55, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + } + else + { + BTDM_Balance(padapter, _TRUE, pHalData->bt_coexist.WLANActH, pHalData->bt_coexist.WLANActL); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + if (BTDM_IsSameCoexistState(padapter)) + return; + BTDM_Balance(padapter, _TRUE, pHalData->bt_coexist.WLANActH, pHalData->bt_coexist.WLANActL); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle!\n")); + pHalData->bt_coexist.A2DPState = BT_A2DP_STATE_NOT_ENTERED; + if (pHalData->bt_coexist.Ratio_PRI > 3) + { + RTPRINT(FBT, BT_TRACE, ("Ratio_STA > 3\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + } + else + { + RTPRINT(FBT, BT_TRACE, ("Ratio_STA <= 3\n")); + BTDM_Balance(padapter, _TRUE, 32, 5); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } +} + +u8 btdm_A2DPAction1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (BTHCI_CheckProfileExist(padapter, BT_PROFILE_A2DP) && pBtMgnt->ExtConfig.NumberOfHandle==1) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_A2DP; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_HID; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_PAN; + btdm_A2DPActionBC81Ant(padapter); + return _TRUE; + } + else + { + return _FALSE; + } +} + +void btdm_PANActionBC81Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (pBtMgnt->ExtConfig.bBTBusy && !pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && [BT 2.1]\n")); + + if (!BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + if (btdm_IsSingleAnt(padapter, _FALSE, _FALSE, _FALSE)) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_20, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + + if ((btRssiState == BT_RSSI_STATE_LOW) || + (btRssiState == BT_RSSI_STATE_STAY_LOW)) + { + BTDM_Balance(padapter, _TRUE, 0x1c, 0x20); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + else + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_50, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + } + else + { + BTDM_Balance(padapter, _TRUE, 0x1c, 0x20); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + if ((pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) && + (pmlmepriv->LinkDetectInfo.bTxBusyTraffic)) + { + RTPRINT(FBT, BT_TRACE, ("BT is Downlink and Wifi is Uplink\n")); + if (btdm_IsSingleAnt(padapter, _FALSE, _FALSE, _FALSE)) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_20, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + if ((btRssiState == BT_RSSI_STATE_LOW) || + (btRssiState == BT_RSSI_STATE_STAY_LOW)) + { + BTDM_Balance(padapter, _TRUE, 0x1c, 0x20); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + else + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_45, 0); + if (BTDM_IsSameCoexistState(padapter)) + return; + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + } + else + { + BTDM_Balance(padapter, _TRUE, 0x1c, 0x20); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink or BTdownlink+Wifi downlink\n")); + BTDM_Balance(padapter, _TRUE, 0x1c, 0x20); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + } + } + else if (pBtMgnt->ExtConfig.bBTBusy && pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && [BT 3.0]\n")); + BTDM_FWCoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle\n")); + BTDM_Balance(padapter, _TRUE, 32, 5); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } +} + +u8 btdm_PANAction1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && pBtMgnt->ExtConfig.NumberOfHandle==1) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_PAN; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_HID; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_A2DP; + btdm_PANActionBC81Ant(padapter); + return _TRUE; + } + else + { + return _FALSE; + } +} + +void btdm_HIDA2DPActionBC81Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + BTDM_Balance(padapter, _TRUE, 0x5, 0x1a); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle!\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + } +} + +u8 btdm_HIDA2DPAction1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_A2DP); + btdm_HIDA2DPActionBC81Ant(padapter); + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~(BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_A2DP); + return _FALSE; + } +} + +void btdm_HIDPANActionBC81Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if ((pBtMgnt->ExtConfig.bBTBusy && !pBtMgnt->BtOperationOn)) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && [BT 2.1]\n")); + BTDM_Balance(padapter, _TRUE, 0x5, 0x1a); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or [BT 3.0]\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + } +} + +u8 btdm_HIDPANAction1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN)) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_PAN); + btdm_HIDPANActionBC81Ant(padapter); + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~(BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_PAN); + return _FALSE; + } +} + +void btdm_PANA2DPActionBC81Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if ((pBtMgnt->ExtConfig.bBTBusy && !pBtMgnt->BtOperationOn)) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && [BT 2.1]\n")); + BTDM_Balance(padapter, _TRUE, 0x5, 0x1a); + BTDM_SingleAnt(padapter, _TRUE, _FALSE, _FALSE); + } + else if ((pBtMgnt->ExtConfig.bBTBusy && pBtMgnt->BtOperationOn)) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && [BT 3.0]\n")); + btdm_A2DPActionBC81Ant(padapter); + } + else + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + } +} + +u8 btdm_PANA2DPAction1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_PAN|BT_COEX_STATE_PROFILE_A2DP); + btdm_PANA2DPActionBC81Ant(padapter); + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~(BT_COEX_STATE_PROFILE_PAN|BT_COEX_STATE_PROFILE_A2DP); + return _FALSE; + } +} + +//============================================================ +// extern function start with BTDM_ +//============================================================ + +void BTDM_SetAntenna(PADAPTER padapter, u8 who) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (!IS_HARDWARE_TYPE_8192C(padapter)) + return; + if (!pHalData->bt_coexist.BluetoothCoexist) + return; + if (pBtMgnt->ExtConfig.bManualControl) + return; + if (pHalData->bt_coexist.BT_CoexistType != BT_CSR_BC8) + return; + if (pHalData->bt_coexist.BT_Ant_Num != Ant_x1) + return; +// if (pHalData->bt_coexist.AntennaState == who) +// return; + + switch (who) + { + case BTDM_ANT_BT_IDLE: + RTPRINT(FBT, BT_TRACE, ("BTDM_SetAntenna(), BTDM_ANT_BT_IDLE\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _TRUE, _TRUE, _FALSE); + pHalData->bt_coexist.AntennaState = BTDM_ANT_BT_IDLE; + break; + + case BTDM_ANT_WIFI: + RTPRINT(FBT, BT_TRACE, ("BTDM_SetAntenna(), BTDM_ANT_WIFI\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + rtw_mdelay_os(3); // 1 will fail, 2 ok + btdm_WriteReg860(padapter, 0x130); + pHalData->bt_coexist.AntennaState = BTDM_ANT_WIFI; + break; + + case BTDM_ANT_BT: + RTPRINT(FBT, BT_TRACE, ("BTDM_SetAntenna(), BTDM_ANT_BT\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + //btdm_WriteReg860(padapter, 0x230); + pHalData->bt_coexist.AntennaState = BTDM_ANT_BT; + break; + + default: + RT_ASSERT(_FALSE, ("BTDM_SetAntenna(), error case\n")); + break; + } +} + +void +BTDM_SingleAnt( + PADAPTER padapter, + u8 bSingleAntOn, + u8 bInterruptOn, + u8 bMultiNAVOn + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 H2C_Parameter[3] = {0}; + + if (pHalData->bt_coexist.BT_Ant_Num != Ant_x1) + return; + + H2C_Parameter[2] = 0; + H2C_Parameter[1] = 0; + H2C_Parameter[0] = 0; + + if (bInterruptOn) + { + H2C_Parameter[2] |= 0x02; //BIT1 + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + pHalData->bt_coexist.bInterruptOn = bInterruptOn; + + if (bSingleAntOn) + { + H2C_Parameter[2] |= 0x10; //BIT4 + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + pHalData->bt_coexist.bSingleAntOn = bSingleAntOn; + + if (bMultiNAVOn) + { + H2C_Parameter[2] |= 0x20; //BIT5 + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + pHalData->bt_coexist.bMultiNAVOn = bMultiNAVOn; + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], SingleAntenna=[%s:%s:%s], write 0xe = 0x%x\n", + bSingleAntOn?"ON":"OFF", bInterruptOn?"ON":"OFF", bMultiNAVOn?"ON":"OFF", + H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); + + if (IS_HARDWARE_TYPE_8192C(padapter)) + { + FillH2CCmd(padapter, 0xe, 3, H2C_Parameter); + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + FillH2CCmd(padapter, 0x12, 3, H2C_Parameter); + } +} + +void BTDM_CheckBTIdleChange1Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + u8 stateChange = _FALSE; + u32 BT_Polling, Ratio_Act, Ratio_STA; + u32 BT_Active, BT_State; + u32 regBTActive=0, regBTState=0, regBTPolling=0; + + if (!pHalData->bt_coexist.BluetoothCoexist) + return; + if (pBtMgnt->ExtConfig.bManualControl) + return; + if (pHalData->bt_coexist.BT_CoexistType != BT_CSR_BC8) + return; + if (pHalData->bt_coexist.BT_Ant_Num != Ant_x1) + return; + + // + // The following we only consider CSR BC8 and fw version should be >= 62 + // + RTPRINT(FBT, BT_TRACE, ("[DM][BT], FirmwareVersion = 0x%x(%d)\n", + pHalData->FirmwareVersion, pHalData->FirmwareVersion)); + { + regBTActive = REG_BT_ACTIVE; + regBTState = REG_BT_STATE; + if (pHalData->FirmwareVersion >= FW_VER_BT_REG1) + regBTPolling = REG_BT_POLLING1; + else + regBTPolling = REG_BT_POLLING; + } + + BT_Active = rtw_read32(padapter, regBTActive); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Active(0x%x)=%x\n", regBTActive, BT_Active)); + BT_Active = BT_Active & 0x00ffffff; + + BT_State = rtw_read32(padapter, regBTState); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_State(0x%x)=%x\n", regBTState, BT_State)); + BT_State = BT_State & 0x00ffffff; + + BT_Polling = rtw_read32(padapter, regBTPolling); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Polling(0x%x)=%x\n", regBTPolling, BT_Polling)); + + if (BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) + return; + if (BT_Polling == 0) + return; + + Ratio_Act = BT_Active*1000/BT_Polling; + Ratio_STA = BT_State*1000/BT_Polling; + + pHalData->bt_coexist.Ratio_Tx = Ratio_Act; + pHalData->bt_coexist.Ratio_PRI = Ratio_STA; + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Ratio_Act=%d\n", Ratio_Act)); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Ratio_STA=%d\n", Ratio_STA)); + + if (Ratio_STA<60 && Ratio_Act<500) // BT PAN idle + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_IDLE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_DOWNLINK; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_UPLINK; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_IDLE; + + if (Ratio_STA) + { + // Check if BT PAN (under BT 2.1) is uplink or downlink + if ((Ratio_Act/Ratio_STA) < 2) + { + // BT PAN Uplink + pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic = _TRUE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_UPLINK; + pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic = _FALSE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_DOWNLINK; + } + else + { + // BT PAN downlink + pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic = _FALSE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_UPLINK; + pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic = _TRUE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_DOWNLINK; + } + } + else + { + // BT PAN downlink + pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic = _FALSE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_UPLINK; + pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic = _TRUE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_DOWNLINK; + } + } + + // Check BT is idle or not + if (pBtMgnt->ExtConfig.NumberOfHandle==0 && + pBtMgnt->ExtConfig.NumberOfSCO==0) + { + pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_IDLE; + } + else + { + if (Ratio_STA<60) + { + pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_IDLE; + } + else + { + pBtMgnt->ExtConfig.bBTBusy = _TRUE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_IDLE; + } + } + + if (pBtMgnt->ExtConfig.NumberOfHandle==0 && + pBtMgnt->ExtConfig.NumberOfSCO==0) + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_RSSI_LOW; + pBtMgnt->ExtConfig.MIN_BT_RSSI = 0; + BTDM_SetAntenna(padapter, BTDM_ANT_BT_IDLE); + } + else + { + if (pBtMgnt->ExtConfig.MIN_BT_RSSI <= -5) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_RSSI_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], core stack notify bt rssi Low\n")); + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_RSSI_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], core stack notify bt rssi Normal\n")); + } + } + + if (pHalData->bt_coexist.bBTBusyTraffic != + pBtMgnt->ExtConfig.bBTBusy) + { // BT idle or BT non-idle + pHalData->bt_coexist.bBTBusyTraffic = pBtMgnt->ExtConfig.bBTBusy; + stateChange = _TRUE; + } + + if (stateChange) + { + if (!pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT is idle or disable\n")); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT is non-idle\n")); + } + } + if (!pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT is idle or disable\n")); +#if 0 + if (MgntRoamingInProgress(pMgntInfo) || + MgntIsLinkInProgress(pMgntInfo) || + MgntScanInProgress(pMgntInfo)) +#else + if (BTDM_CheckFWState(padapter, WIFI_UNDER_LINKING|WIFI_SITE_MONITOR) == _TRUE) +#endif + { + BTDM_SetAntenna(padapter, BTDM_ANT_WIFI); + } + } +} + +void BTDM_BTCoexistWithProfile1Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + { + btdm_CheckCounterOnly1Ant(padapter); + return; + } + + RTPRINT(FIOCTL, IOCTL_BT_FLAG_MON, ("CurrentBTConnectionCnt=%d, BtOperationOn=%d, bBTConnectInProgress=%d !!\n", + pBtMgnt->CurrentBTConnectionCnt, pBtMgnt->BtOperationOn, pBtMgnt->bBTConnectInProgress)); + + if ((pHalData->bt_coexist.BluetoothCoexist) && + (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8)) + { + BTHCI_GetProfileNameMoto(padapter); + BTHCI_GetBTRSSI(padapter); + BTDM_CheckBTIdleChange1Ant(padapter); + BTDM_CheckWiFiState(padapter); + + if (btdm_SCOAction1Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Action SCO\n")); + } + else if (btdm_HIDAction1Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Action HID\n")); + } + else if (btdm_A2DPAction1Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Action A2DP\n")); + } + else if (btdm_PANAction1Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Action PAN\n")); + } + else if (btdm_HIDA2DPAction1Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Action HID_A2DP\n")); + } + else if (btdm_HIDPANAction1Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Action HID_PAN\n")); + } + else if (btdm_PANA2DPAction1Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Action PAN_A2DP\n")); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], No Action case!!!\n")); + } + + if (!BTDM_IsSameCoexistState(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Coexist State[bitMap] change from 0x%"i64fmt"x to 0x%"i64fmt"x\n", + pHalData->bt_coexist.PreviousState, + pHalData->bt_coexist.CurrentState)); + pHalData->bt_coexist.PreviousState = pHalData->bt_coexist.CurrentState; + + RTPRINT(FBT, BT_TRACE, ("[")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT30) + RTPRINT(FBT, BT_TRACE, ("BT 3.0, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_HT20) + RTPRINT(FBT, BT_TRACE, ("HT20, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_HT40) + RTPRINT(FBT, BT_TRACE, ("HT40, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_LEGACY) + RTPRINT(FBT, BT_TRACE, ("Legacy, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_LOW) + RTPRINT(FBT, BT_TRACE, ("Rssi_Low, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_MEDIUM) + RTPRINT(FBT, BT_TRACE, ("Rssi_Mid, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_HIGH) + RTPRINT(FBT, BT_TRACE, ("Rssi_High, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_IDLE) + RTPRINT(FBT, BT_TRACE, ("Wifi_Idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_UPLINK) + RTPRINT(FBT, BT_TRACE, ("Wifi_Uplink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_DOWNLINK) + RTPRINT(FBT, BT_TRACE, ("Wifi_Downlink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_IDLE) + RTPRINT(FBT, BT_TRACE, ("BT_idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_PAN_IDLE) + RTPRINT(FBT, BT_TRACE, ("BT_PAN_idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_PAN_UPLINK) + RTPRINT(FBT, BT_TRACE, ("BT_PAN_uplink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_PAN_DOWNLINK) + RTPRINT(FBT, BT_TRACE, ("BT_PAN_downlink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_HID) + RTPRINT(FBT, BT_TRACE, ("PRO_HID, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_A2DP) + RTPRINT(FBT, BT_TRACE, ("PRO_A2DP, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_PAN) + RTPRINT(FBT, BT_TRACE, ("PRO_PAN, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_SCO) + RTPRINT(FBT, BT_TRACE, ("PRO_SCO, ")); + RTPRINT(FBT, BT_TRACE, ("]\n")); + } + } +} + +// ===== End of sync from SD7 driver HAL/BTCoexist/HalBtcCsr1Ant.c ===== +#endif + +#ifdef __HALBTCCSR2ANT_C__ // HAL/BTCoexist/HalBtcCsr2Ant.c +// ===== Below this line is sync from SD7 driver HAL/BTCoexist/HalBtcCsr2Ant.c ===== + +//============================================================ +// local function start with btdm_ +//============================================================ +void +btdm_BtEnableDisableCheck( + PADAPTER padapter, + u32 BT_Active + ) +{ + // This function check if 92D bt is disabled + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (IS_HARDWARE_TYPE_8192D(padapter)) + { + if (BT_Active) + { + pHalData->bt_coexist.btActiveZeroCnt = 0; + pHalData->bt_coexist.bCurBtDisabled = _FALSE; + RTPRINT(FBT, BT_TRACE, ("92D Bt is enabled !!\n")); + } + else + { + pHalData->bt_coexist.btActiveZeroCnt++; + RTPRINT(FBT, BT_TRACE, ("92D BT_Active = 0, cnt = %d!!\n", + pHalData->bt_coexist.btActiveZeroCnt)); + if (pHalData->bt_coexist.btActiveZeroCnt >= 2) + { + pHalData->bt_coexist.bCurBtDisabled = _TRUE; + RTPRINT(FBT, BT_TRACE, ("92D Bt is disabled !!\n")); + } + } + if (pHalData->bt_coexist.bPreBtDisabled != + pHalData->bt_coexist.bCurBtDisabled ) + { + RTPRINT(FBT, BT_TRACE, ("92D Bt is from %s to %s!!\n", + (pHalData->bt_coexist.bPreBtDisabled ? "disabled":"enabled"), + (pHalData->bt_coexist.bCurBtDisabled ? "disabled":"enabled"))); + pHalData->bt_coexist.bNeedToRoamForBtDisableEnable = _TRUE; + pHalData->bt_coexist.bPreBtDisabled = pHalData->bt_coexist.bCurBtDisabled; + } + } +} + +void btdm_CheckBTState2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; +// PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); + u8 stateChange = _FALSE; + u32 BT_Polling, Ratio_Act, Ratio_STA; + u32 BT_Active, BT_State; + u32 regBTActive = 0, regBTState = 0, regBTPolling=0; + u32 btBusyThresh = 0; + + RTPRINT(FBT, BT_TRACE, ("FirmwareVersion = 0x%x(%d)\n", + pHalData->FirmwareVersion, pHalData->FirmwareVersion)); + + if (IS_HARDWARE_TYPE_8192C(padapter)) + { + if (pHalData->FirmwareVersion < FW_VER_BT_REG) + { + regBTActive = REG_BT_ACTIVE_OLD; + regBTState = REG_BT_STATE_OLD; + regBTPolling = REG_BT_POLLING_OLD; + } + else + { + regBTActive = REG_BT_ACTIVE; + regBTState = REG_BT_STATE; + if (pHalData->FirmwareVersion >= FW_VER_BT_REG1) + regBTPolling = REG_BT_POLLING1; + else + regBTPolling = REG_BT_POLLING; + } + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + regBTActive = REG_BT_ACTIVE; + regBTState = REG_BT_STATE; + regBTPolling = REG_BT_POLLING1; + } + + if (IS_HARDWARE_TYPE_8192D(padapter)) + { + btBusyThresh = 40; + } + else + { + btBusyThresh = 60; + } + + BT_Active = rtw_read32(padapter, regBTActive); + RTPRINT(FBT, BT_TRACE, ("BT_Active(0x%x)=%x\n", regBTActive, BT_Active)); + BT_Active = BT_Active & 0x00ffffff; + + BT_State = rtw_read32(padapter, regBTState); + RTPRINT(FBT, BT_TRACE, ("BT_State(0x%x)=%x\n", regBTState, BT_State)); + BT_State = BT_State & 0x00ffffff; + + BT_Polling = rtw_read32(padapter, regBTPolling); + RTPRINT(FBT, BT_TRACE, ("BT_Polling(0x%x)=%x\n", regBTPolling, BT_Polling)); + + if (BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) + return; + + // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running + // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f + // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to + // HW divide trap. + if (BT_Polling==0) + return; + + btdm_BtEnableDisableCheck(padapter, BT_Active); + + Ratio_Act = BT_Active*1000/BT_Polling; + Ratio_STA = BT_State*1000/BT_Polling; + + pHalData->bt_coexist.Ratio_Tx = Ratio_Act; + pHalData->bt_coexist.Ratio_PRI = Ratio_STA; + + RTPRINT(FBT, BT_TRACE, ("Ratio_Act=%d\n", Ratio_Act)); + RTPRINT(FBT, BT_TRACE, ("Ratio_STA=%d\n", Ratio_STA)); + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + if (Ratio_STA < 60) // BT PAN idle + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_IDLE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_DOWNLINK; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_UPLINK; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_IDLE; + + // Check if BT PAN (under BT 2.1) is uplink or downlink + if ((Ratio_Act/Ratio_STA) < 2) + { // BT PAN Uplink + pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic = _TRUE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_UPLINK; + pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic = _FALSE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_DOWNLINK; + } + else + { // BT PAN downlink + pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic = _FALSE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_UPLINK; + pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic = _TRUE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_DOWNLINK; + } + } + } + else + { + // BC4, doesn't use the following variables. + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_PAN_IDLE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_DOWNLINK; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_PAN_UPLINK; + } + + + // Check BT is idle or not + if (pBtMgnt->ExtConfig.NumberOfHandle==0 && + pBtMgnt->ExtConfig.NumberOfSCO==0) + { + pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_IDLE; + } + else + { + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + if (Ratio_Act < 20) + { + pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_IDLE; + } + else + { + pBtMgnt->ExtConfig.bBTBusy = _TRUE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_IDLE; + } + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + if (Ratio_STA < btBusyThresh) + { + pBtMgnt->ExtConfig.bBTBusy = _FALSE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_IDLE; + } + else + { + pBtMgnt->ExtConfig.bBTBusy = _TRUE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_IDLE; + } + + if ((Ratio_STA < btBusyThresh) || + (Ratio_Act<180 && Ratio_STA<130)) + { + pBtMgnt->ExtConfig.bBTA2DPBusy = _FALSE; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_A2DP_IDLE; + } + else + { + pBtMgnt->ExtConfig.bBTA2DPBusy =_TRUE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_A2DP_IDLE; + } + } + } + + if (pBtMgnt->ExtConfig.NumberOfHandle==0 && + pBtMgnt->ExtConfig.NumberOfSCO==0) + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_RSSI_LOW; + pBtMgnt->ExtConfig.MIN_BT_RSSI = 0; + } + else + { + if (pBtMgnt->ExtConfig.MIN_BT_RSSI <= -5) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT_RSSI_LOW; + RTPRINT(FBT, BT_TRACE, ("[bt rssi], Low\n")); + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT_RSSI_LOW; + RTPRINT(FBT, BT_TRACE, ("[bt rssi], Normal\n")); + } + } + + if (pHalData->bt_coexist.bBTBusyTraffic != + pBtMgnt->ExtConfig.bBTBusy) + { // BT idle or BT non-idle + pHalData->bt_coexist.bBTBusyTraffic = pBtMgnt->ExtConfig.bBTBusy; + stateChange = _TRUE; + } + + if (stateChange) + { + if (!pBtMgnt->ExtConfig.bBTBusy) + { + u8 tempu1Byte; + RTPRINT(FBT, BT_TRACE, ("[BT] BT is idle or disable\n")); + + tempu1Byte = rtw_read8(padapter, 0x4fd); + tempu1Byte |= BIT(2); + + rtw_write8(padapter, 0x4fd, tempu1Byte); + + //Resume RF Rx LPF corner + if (IS_HARDWARE_TYPE_8192D(padapter)) + { + PHY_SetRFReg(padapter, PathA, 0x1e, bRFRegOffsetMask, pHalData->bt_coexist.BtRfRegOrigin1E); + } + else + { + PHY_SetRFReg(padapter, PathA, 0x1e, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1E); + } + BTDM_CoexAllOff(padapter); + + RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist bt is off \n")); + + rtw_write8(padapter, REG_GPIO_MUXCFG, 0x0); + } + else + { + u8 tempu1Byte; + RTPRINT(FBT, BT_TRACE, ("[BT] BT is non-idle\n")); + + tempu1Byte = rtw_read8(padapter, 0x4fd); + tempu1Byte &=~ BIT(2); + rtw_write8(padapter, 0x4fd, tempu1Byte); + + //Shrink RF Rx LPF corner + if (IS_HARDWARE_TYPE_8192D(padapter)) + { + PHY_SetRFReg(padapter, PathA, 0x1e, bRFRegOffsetMask, 0xf2ff7); + } + else + { + //Shrink RF Rx LPF corner, 0x1e[7:4]=1111 + PHY_SetRFReg(padapter, PathA, 0x1e, 0xf0, 0xf); + } + } + } + + if (stateChange) + { + if (pBtMgnt->ExtConfig.bBTBusy) + { + BTDM_RejectAPAggregatedPacket(padapter, _TRUE); + } + else + { + BTDM_RejectAPAggregatedPacket(padapter, _FALSE); + } + } +} + +void btdm_WLANActOff(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + //Only used in BC4 setting + rtw_write8(padapter, REG_GPIO_MUXCFG, 0x0); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x0, BT_FW_NAV_OFF); +} + +void btdm_WLANActBTPrecedence(PADAPTER padapter) +{ + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x0, BT_FW_NAV_OFF); + + rtw_write32(padapter, 0x6c4,0x55555555); + rtw_write32(padapter, 0x6c8,0x000000f0); + rtw_write32(padapter, 0x6cc,0x40000010); + rtw_write8(padapter, REG_GPIO_MUXCFG, 0xa0); +} + +//============================================================== +// +// Note: +// In the following, FW should be done before SW mechanism. +// BTDM_Balance(), BTDM_DiminishWiFi(), BT_NAV() should be done +// before BTDM_AGCTable(), BTDM_BBBackOffLevel(), btdm_DacSwing(). +// +//============================================================== + +void btdm_DacSwing(PADAPTER padapter, u8 type) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.BT_Ant_Num != Ant_x2) + return; + + if (type == BT_DACSWING_OFF) + { + RTPRINT(FBT, BT_TRACE, ("[BT]DACSwing Off!\n")); + PHY_SetBBReg(padapter, 0x880, 0xfc000000, 0x30); + } + else if (type == BT_DACSWING_M4) + { + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_RSSI_LOW) + { + RTPRINT(FBT, BT_TRACE, ("[BT]DACSwing -4 original, but Low RSSI!\n")); + PHY_SetBBReg(padapter, 0x880, 0xfc000000, 0x18); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT]DACSwing -4!\n")); + PHY_SetBBReg(padapter, 0x880, 0xfc000000, 0x20); + } + } + else if (type == BT_DACSWING_M7) + { + RTPRINT(FBT, BT_TRACE, ("[BT]DACSwing -7!\n")); + PHY_SetBBReg(padapter, 0x880, 0xfc000000, 0x18); + } + else if (type == BT_DACSWING_M10) + { + RTPRINT(FBT, BT_TRACE, ("[BT]DACSwing -10!\n")); + PHY_SetBBReg(padapter, 0x880, 0xfc000000, 0x10); + } + + if (type != BT_DACSWING_OFF) + pHalData->bt_coexist.bSWCoexistAllOff = _FALSE; +} + +void btdm_A2DPActionBC42Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + rtw_write8(padapter, REG_GPIO_MUXCFG, 0x0); + + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; +#if 0 + // Do the FW mechanism first + BTDM_FWCoexAllOff(padapter); +#else + // Do the FW mechanism first + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0xc, 0x18); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + BTDM_FWCoexAllOff(padapter); + } +#endif + // Then do the SW mechanism + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; +#if 0 + // Do the FW mechanism first + BTDM_FWCoexAllOff(padapter); +#else + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0xc, 0x18); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + BTDM_FWCoexAllOff(padapter); + } +#endif + // Then do the SW mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +void btdm_A2DPActionBC82Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (pBtMgnt->ExtConfig.bBTA2DPBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + // Do the FW mechanism first + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0xc, 0x18); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + BTDM_Balance(padapter, _TRUE, 0x10, 0x18); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + + // Then do the SW mechanism + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + BTDM_SWCoexAllOff(padapter); + } + } + } + else if (pBtMgnt->ExtConfig.bBTA2DPBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + // Do the FW mechanism first + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _TRUE, _TRUE, 0x18, BT_FW_NAV_OFF); + + // Then do the SW mechanism + BTDM_SWCoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle and Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +void btdm_A2DPActionBC82Ant92d(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, rssiState1; + + if (pBtMgnt->ExtConfig.bBTA2DPBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + rssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, BT_FW_COEX_THRESH_47, 0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + if (BTDM_IsWifiUplink(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + rssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, BT_FW_COEX_THRESH_25, 0); + } + else if (BTDM_IsWifiDownlink(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + rssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, BT_FW_COEX_THRESH_40, 0); + } + } + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (!BTDM_IsCoexistStateChanged(padapter)) + return; + + // Do the FW mechanism first + if (BTDM_IsWifiUplink(padapter)) + { + BTDM_Balance(padapter, _TRUE, 0xc, 0x18); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (BTDM_IsWifiDownlink(padapter)) + { + BTDM_Balance(padapter, _TRUE, 0x10, 0x18); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + + // Then do the SW mechanism + if ((rssiState1 == BT_RSSI_STATE_HIGH) || + (rssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + + if (BTDM_IsHT40(padapter)) + { + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + } + } + else if (pBtMgnt->ExtConfig.bBTA2DPBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + // Do the FW mechanism first + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _TRUE, _TRUE, 0x18, BT_FW_NAV_OFF); + + // Then do the SW mechanism + BTDM_SWCoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle and Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +u8 btdm_A2DPAction2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 bEnter = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_A2DP) + bEnter = _TRUE; + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) && pBtMgnt->ExtConfig.NumberOfHandle==1) + bEnter = _TRUE; + } + + if (bEnter) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_A2DPAction2Ant(), ")); + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_A2DP; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_HID; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_PAN; + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + RTPRINT(FBT, BT_TRACE, ("[BC4]\n")); + btdm_A2DPActionBC42Ant(padapter); + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + RTPRINT(FBT, BT_TRACE, ("[BC8]\n")); + if (IS_HARDWARE_TYPE_8192D(padapter)) + btdm_A2DPActionBC82Ant92d(padapter); + else + btdm_A2DPActionBC82Ant(padapter); + } + return _TRUE; + } + else + { + return _FALSE; + } +} + +void btdm_PANActionBC42Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + rtw_write8(padapter, REG_GPIO_MUXCFG, 0x0); + + if (pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("[BT 3.0]\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x0, BT_FW_NAV_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT 2.1]\n")); + if (pBtMgnt->ExtConfig.bBTBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + BTDM_Balance(padapter, _TRUE, 0x20, 0x10); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x0, BT_FW_NAV_OFF); + } + } + BTDM_SWCoexAllOff(padapter); +} + +void btdm_PANActionBC82Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("[BT 3.0]\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + BTDM_CoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT 2.1]\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 3, BT_FW_COEX_THRESH_25, BT_FW_COEX_THRESH_50); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + if (pBtMgnt->ExtConfig.bBTBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("RSSI stay HIGH or High \n")); + // Do the FW mechanism first + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0x20, 0x20); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + BTDM_FWCoexAllOff(padapter); + } + // Then do the SW mechanism + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + } + else if ((btRssiState == BT_RSSI_STATE_MEDIUM) || + (btRssiState == BT_RSSI_STATE_STAY_MEDIUM)) + { + RTPRINT(FBT, BT_TRACE, ("RSSI stay Medium or Medium \n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _TRUE, 0x20, 0x20); + + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + if (BTDM_IsHT40(padapter)) + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF);//BT_FW_NAV_ON); + else + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + // Then do the SW mechanism + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("RSSI stay LOW or LOW \n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _TRUE, 0x20, 0x20); + + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF);//BT_FW_NAV_ON); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + } + // Then do the SW mechanism + BTDM_SWCoexAllOff(padapter); + } + } + else if (pBtMgnt->ExtConfig.bBTBusy && + !pmlmepriv->LinkDetectInfo.bBusyTraffic && + (BTDM_GetRxSS(padapter) < 30)) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is idle!\n")); + RTPRINT(FBT, BT_TRACE, ("RSSI < 30\n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _TRUE, 0x0a, 0x20); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + // Then do the SW mechanism + BTDM_SWCoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } + } +} + +void btdm_PANActionBC82Ant92d(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, rssiState1; + + if (pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("[BT 3.0]\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + BTDM_CoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT 2.1]\n")); + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + rssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, BT_FW_COEX_THRESH_47, 0); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + rssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, BT_FW_COEX_THRESH_25, 0); + } + btRssiState = BTDM_CheckCoexRSSIState(padapter, 3, BT_FW_COEX_THRESH_25, BT_FW_COEX_THRESH_50); + if (!BTDM_IsCoexistStateChanged(padapter)) + return; + + if (pBtMgnt->ExtConfig.bBTBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + RTPRINT(FBT, BT_TRACE, ("RSSI stay HIGH or High \n")); + // Do the FW mechanism first + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0x20, 0x20); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + BTDM_FWCoexAllOff(padapter); + } + // Then do the SW mechanism + if ((rssiState1 == BT_RSSI_STATE_HIGH) || + (rssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + } + else if ((btRssiState == BT_RSSI_STATE_MEDIUM) || + (btRssiState == BT_RSSI_STATE_STAY_MEDIUM)) + { + RTPRINT(FBT, BT_TRACE, ("RSSI stay Medium or Medium \n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _TRUE, 0x20, 0x20); + + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + if (BTDM_IsHT40(padapter)) + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF);//BT_FW_NAV_ON); + else + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + // Then do the SW mechanism + if ((rssiState1 == BT_RSSI_STATE_HIGH) || + (rssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("RSSI stay LOW or LOW \n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _TRUE, 0x20, 0x20); + + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF);//BT_FW_NAV_ON); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + } + // Then do the SW mechanism + if ((rssiState1 == BT_RSSI_STATE_HIGH) || + (rssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + } + else if (pBtMgnt->ExtConfig.bBTBusy && + !pmlmepriv->LinkDetectInfo.bBusyTraffic && + (BTDM_GetRxSS(padapter) < 30)) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is idle!\n")); + RTPRINT(FBT, BT_TRACE, ("RSSI < 30\n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _TRUE, 0x0a, 0x20); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + // Then do the SW mechanism + BTDM_SWCoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } + } +} + +u8 btdm_PANAction2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 bEnter = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_PAN) + bEnter = _TRUE; + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && pBtMgnt->ExtConfig.NumberOfHandle==1) + bEnter = _TRUE; + } + + if (bEnter) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_PANAction2Ant(), ")); + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_PAN; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_HID; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_A2DP; + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + RTPRINT(FBT, BT_TRACE, ("[BC4]\n")); + btdm_PANActionBC42Ant(padapter); + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + RTPRINT(FBT, BT_TRACE, ("[BC8]\n")); + if (IS_HARDWARE_TYPE_8192D(padapter)) + btdm_PANActionBC82Ant92d(padapter); + else + btdm_PANActionBC82Ant(padapter); + } + return _TRUE; + } + else + { + return _FALSE; + } +} + +void btdm_HIDActionBC42Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + if (BTDM_Legacy(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Current Wireless Mode is B/G\n")); + btdm_WLANActBTPrecedence(padapter); + } + else if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + btdm_WLANActBTPrecedence(padapter); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + btdm_WLANActOff(padapter); + } + else if (!pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Idel \n")); + btdm_WLANActOff(padapter); + } + BTDM_SWCoexAllOff(padapter); +} + +void btdm_HIDActionBC82Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + +#ifdef CONFIG_USB_HCI + if (pHalData->CustomerID == RT_CID_PLANEX) + { + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + btdm_HIDActionBC42Ant(padapter); + return; + } +#endif + + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_45, 0); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_20, 0); + } + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + if (pBtMgnt->ExtConfig.bBTBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + // Do the FW mechanism first + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_FWCoexAllOff(padapter); + } + else + { + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _TRUE, _TRUE, 0x18, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + BTDM_Balance(padapter, _TRUE, 0x15, 0x15); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x30, BT_FW_NAV_OFF); + } + } + // Then do the SW mechanism + BTDM_SWCoexAllOff(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +void btdm_HIDActionBC82Ant92d(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_45, 0); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_20, 0); + } + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + if (pBtMgnt->ExtConfig.bBTBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + // Do the FW mechanism first + BTDM_FWCoexAllOff(padapter); + + // Then do the SW mechanism + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + else + { + // Do the FW mechanism first + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _TRUE, _TRUE, 0x18, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + BTDM_Balance(padapter, _TRUE, 0x15, 0x15); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x30, BT_FW_NAV_OFF); + } + // Then do the SW mechanism + BTDM_SWCoexAllOff(padapter); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +u8 btdm_HIDAction2Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter) ; + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 bEnter = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_HID) + bEnter = _TRUE; + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && pBtMgnt->ExtConfig.NumberOfHandle==1) + bEnter = _TRUE; + } + + if (bEnter) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_HIDAction2Ant(), ")); + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_HID; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_PAN; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_A2DP; + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + RTPRINT(FBT, BT_TRACE, ("[BC4]\n")); + btdm_HIDActionBC42Ant(padapter); + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + RTPRINT(FBT, BT_TRACE, ("[BC8]\n")); + if (IS_HARDWARE_TYPE_8192D(padapter)) + btdm_HIDActionBC82Ant92d(padapter); + else + btdm_HIDActionBC42Ant(padapter); + } + return _TRUE; + } + else + { + return _FALSE; + } +} + +void btdm_SCOActionBC42Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + btdm_WLANActOff(padapter); + BTDM_SWCoexAllOff(padapter); +} + +void btdm_SCOActionBC82Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (BTDM_IsHT40(padapter)) + { + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0, BT_FW_NAV_OFF); + + // Then do the SW mechanism + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0, BT_FW_NAV_OFF); + + // Then do the SW mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + BTDM_SWCoexAllOff(padapter); + } + } +} + +void btdm_SCOActionBC82Ant92d(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, rssiState1; + + rssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (BTDM_IsHT40(padapter)) + { + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0, BT_FW_NAV_OFF); + + // Then do the SW mechanism + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + // Do the FW mechanism first + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0, BT_FW_NAV_OFF); + + // Then do the SW mechanism + if ((rssiState1 == BT_RSSI_STATE_HIGH) || + (rssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + } +} + +u8 btdm_SCOAction2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 bEnter = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_SCO) + bEnter = _TRUE; + } + else + { + if (pBtMgnt->ExtConfig.NumberOfSCO > 0) + bEnter = _TRUE; + } + if (bEnter) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_SCOAction2Ant(), ")); + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_SCO; + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + RTPRINT(FBT, BT_TRACE, ("[BC4]\n")); + btdm_SCOActionBC42Ant(padapter); + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + RTPRINT(FBT, BT_TRACE, ("[BC8]\n")); + if (IS_HARDWARE_TYPE_8192D(padapter)) + btdm_SCOActionBC82Ant92d(padapter); + else + btdm_SCOActionBC82Ant(padapter); + } + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_PROFILE_SCO; + return _FALSE; + } +} + +void btdm_HIDA2DPActionBC42Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; +#if 0 + // Do the FW mechanism first + BTDM_FWCoexAllOff(padapter); +#else + // Do the FW mechanism first + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0x7, 0x20); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + BTDM_FWCoexAllOff(padapter); + } +#endif + // Then do the SW mechanism + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; +#if 0 + // Do the FW mechanism first + BTDM_FWCoexAllOff(padapter); +#else + // Do the FW mechanism first + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0x7, 0x20); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + BTDM_FWCoexAllOff(padapter); + } +#endif + + // Then do the SW mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +void btdm_HIDA2DPActionBC82Ant(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + // Do the FW mechanism first + BTDM_FWCoexAllOff(padapter); + + // Then do the SW mechanism + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + BTDM_FWCoexAllOff(padapter); + + // Then do the SW mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +void btdm_HIDA2DPActionBC82Ant92d(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState, rssiState1; + + rssiState1 = BTDM_CheckCoexRSSIState1(padapter, 2, BT_FW_COEX_THRESH_35, 0); + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle!\n")); + + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + // Do the FW mechanism first + BTDM_FWCoexAllOff(padapter); + + // Then do the SW mechanism + if ((rssiState1 == BT_RSSI_STATE_HIGH) || + (rssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_47, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + BTDM_FWCoexAllOff(padapter); + + // Then do the SW mechanism + if ((rssiState1 == BT_RSSI_STATE_HIGH) || + (rssiState1 == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + } + else + { + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + } + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + else + { + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle!\n")); + BTDM_CoexAllOff(padapter); + } +} + +u8 btdm_HIDA2DPAction2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 bEnter = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_HID_A2DP) + bEnter = _TRUE; + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + bEnter = _TRUE; + } + + if (bEnter) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_HIDA2DPAction2Ant(), ")); + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_A2DP); + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + RTPRINT(FBT, BT_TRACE, ("[BC4]\n")); + btdm_HIDA2DPActionBC42Ant(padapter); + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + RTPRINT(FBT, BT_TRACE, ("[BC8]\n")); + if (IS_HARDWARE_TYPE_8192D(padapter)) + btdm_HIDA2DPActionBC82Ant92d(padapter); + else + btdm_HIDA2DPActionBC82Ant(padapter); + } + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~(BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_A2DP); + return _FALSE; + } +} + +void btdm_HIDPANActionBC42Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + if (pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("[BT 3.0]\n")); + btdm_WLANActBTPrecedence(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT 2.1]\n")); + if (BTDM_Legacy(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("B/G mode \n")); + btdm_WLANActBTPrecedence(padapter); + } + else if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink \n")); + btdm_WLANActBTPrecedence(padapter); + } + else if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink \n")); + rtw_write8(padapter, REG_GPIO_MUXCFG, 0x0); + BTDM_Balance(padapter, _TRUE, 0x20, 0x10); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else if (!pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Idel \n")); + btdm_WLANActOff(padapter); + } + } + BTDM_SWCoexAllOff(padapter); +} + +void btdm_HIDPANActionBC82Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (!pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("[BT 2.1]\n")); + + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_25, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + if ((pBtMgnt->ExtConfig.bBTBusy && padapter->mlmepriv.LinkDetectInfo.bBusyTraffic)) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle, ")); + + // Do the FW mechanism first + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0x15, 0x20); + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + BTDM_Balance(padapter, _TRUE, 0x10, 0x20); + } + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + + // Then do the SW mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + } + else + { + BTDM_SWCoexAllOff(padapter); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT 3.0]\n")); +#ifdef CONFIG_USB_HCI + if (BTDM_IsWifiUplink(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Uplink\n")); + btdm_WLANActBTPrecedence(padapter); + if (pHalData->CustomerID == RT_CID_PLANEX) + btdm_DacSwing(padapter, BT_DACSWING_M10); + else + btdm_DacSwing(padapter, BT_DACSWING_M7); + } + else if (BTDM_IsWifiDownlink(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Wifi Downlink\n")); + if (pHalData->CustomerID == RT_CID_PLANEX) + btdm_DacSwing(padapter, BT_DACSWING_M10); + else + btdm_DacSwing(padapter, BT_DACSWING_M7); + } +#elif defined(CONFIG_PCI_HCI) + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle\n")); + BTDM_FWCoexAllOff(padapter); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle\n")); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } +#endif + } +} + +u8 btdm_HIDPANAction2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 bEnter = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_HID_PAN) + bEnter = _TRUE; + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN)) + bEnter = _TRUE; + } + + if (bEnter) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_HIDPANAction2Ant(), ")); + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_PAN); + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + RTPRINT(FBT, BT_TRACE, ("[BC4]\n")); + btdm_HIDPANActionBC42Ant(padapter); + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + RTPRINT(FBT, BT_TRACE, ("[BC8]\n")); + btdm_HIDPANActionBC82Ant(padapter); + } + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~(BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_PAN); + return _FALSE; + } + +} + +void btdm_PANA2DPActionBC42Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + rtw_write8(padapter, REG_GPIO_MUXCFG, 0x0); + if (pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("[BT 3.0]\n")); + + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle\n")); + BTDM_FWCoexAllOff(padapter); + + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle\n")); + BTDM_CoexAllOff(padapter); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT 2.1]\n")); + if (pBtMgnt->ExtConfig.bBTBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle!\n")); + BTDM_Balance(padapter, _TRUE, 0x20, 0x10); + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0x0, BT_FW_NAV_OFF); + } + BTDM_SWCoexAllOff(padapter); + } +} + +void btdm_PANA2DPActionBC82Ant(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 btRssiState; + + if (!pBtMgnt->BtOperationOn) + { + RTPRINT(FBT, BT_TRACE, ("[BT 2.1]\n")); + + btRssiState = BTDM_CheckCoexRSSIState(padapter, 2, BT_FW_COEX_THRESH_25, 0); + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return; + + if ((pBtMgnt->ExtConfig.bBTBusy && pmlmepriv->LinkDetectInfo.bBusyTraffic)) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle && Wifi is non-idle, ")); + + // Do the FW mechanism first + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Uplink\n")); + BTDM_Balance(padapter, _TRUE, 0x15, 0x20); + } + else if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + { + RTPRINT(FBT, BT_TRACE, ("BT Downlink\n")); + BTDM_Balance(padapter, _TRUE, 0x10, 0x20); + } + BTDM_DiminishWiFi(padapter, _TRUE, _FALSE, 0x20, BT_FW_NAV_OFF); + + // Then do the SW mechanism + if ((btRssiState == BT_RSSI_STATE_HIGH) || + (btRssiState == BT_RSSI_STATE_STAY_HIGH)) + { + if (BTDM_IsHT40(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("HT40\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + else + { + RTPRINT(FBT, BT_TRACE, ("HT20 or Legacy\n")); + BTDM_AGCTable(padapter, BT_AGCTABLE_ON); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_ON); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + } + else + { + BTDM_SWCoexAllOff(padapter); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle or Wifi is idle!\n")); + BTDM_CoexAllOff(padapter); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("[BT 3.0]\n")); + if (pBtMgnt->ExtConfig.bBTBusy) + { + RTPRINT(FBT, BT_TRACE, ("BT is non-idle\n")); + BTDM_FWCoexAllOff(padapter); + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_M4); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT is idle\n")); + btdm_DacSwing(padapter, BT_DACSWING_OFF); + } + } +} + +u8 btdm_PANA2DPAction2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_DBG pBtDbg = &pBTInfo->BtDbg; + u8 bEnter = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_PAN_A2DP) + bEnter = _TRUE; + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + bEnter = _TRUE; + } + + if (bEnter) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_PANA2DPAction2Ant(), ")); + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_PAN|BT_COEX_STATE_PROFILE_A2DP); + + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) + { + RTPRINT(FBT, BT_TRACE, ("[BC4]\n")); + btdm_PANA2DPActionBC42Ant(padapter); + } + else if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8) + { + RTPRINT(FBT, BT_TRACE, ("[BC8]\n")); + btdm_PANA2DPActionBC82Ant(padapter); + } + return _TRUE; + } + else + { + pHalData->bt_coexist.CurrentState &= ~(BT_COEX_STATE_PROFILE_PAN|BT_COEX_STATE_PROFILE_A2DP); + return _FALSE; + } +} + +//============================================================ +// extern function start with BTDM_ +//============================================================ + +void BTDM_SwCoexAllOff92C(PADAPTER padapter) +{ + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_OFF); +} + +void BTDM_SwCoexAllOff92D(PADAPTER padapter) +{ + BTDM_AGCTable(padapter, BT_AGCTABLE_OFF); + BTDM_BBBackOffLevel(padapter, BT_BB_BACKOFF_OFF); + btdm_DacSwing(padapter, BT_DACSWING_OFF); +} + +void +BTDM_DiminishWiFi( + PADAPTER padapter, + u8 bDACOn, + u8 bInterruptOn, + u8 DACSwingLevel, + u8 bNAVOn + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 H2C_Parameter[3] = {0}; + + if (pHalData->bt_coexist.BT_Ant_Num != Ant_x2) + return; + + if ((pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_RSSI_LOW) && + (DACSwingLevel == 0x20)) + { + RTPRINT(FBT, BT_TRACE, ("[BT]DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n")); + DACSwingLevel = 0x18; + } + + H2C_Parameter[2] = 0; + H2C_Parameter[1] = DACSwingLevel; + H2C_Parameter[0] = 0; + if (bDACOn) + { + H2C_Parameter[2] |= 0x01; //BIT0 + if (bInterruptOn) + { + H2C_Parameter[2] |= 0x02; //BIT1 + } + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + if (bNAVOn) + { + H2C_Parameter[2] |= 0x08; //BIT3 + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], bDACOn = %s, bInterruptOn = %s, write 0xe = 0x%x\n", + bDACOn?"ON":"OFF", bInterruptOn?"ON":"OFF", + H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], bNAVOn = %s\n", + bNAVOn?"ON":"OFF")); + + if (IS_HARDWARE_TYPE_8192C(padapter)) + { + FillH2CCmd(padapter, 0xe, 3, H2C_Parameter); + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + FillH2CCmd(padapter, 0x12, 3, H2C_Parameter); + } +} + +void BTDM_BTCoexistWithProfile2Ant(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bManualControl) + return; + + RTPRINT(FIOCTL, IOCTL_BT_FLAG_MON, ("CurrentBTConnectionCnt=%d, BtOperationOn=%d, bBTConnectInProgress=%d !!\n", + pBtMgnt->CurrentBTConnectionCnt, pBtMgnt->BtOperationOn, pBtMgnt->bBTConnectInProgress)); + + if ((pHalData->bt_coexist.BluetoothCoexist) && + ((pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) || + (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8))) + { + BTHCI_GetProfileNameMoto(padapter); + BTHCI_GetBTRSSI(padapter); + btdm_CheckBTState2Ant(padapter); + BTDM_CheckWiFiState(padapter); + + if (btdm_SCOAction2Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action SCO\n")); + } + else if (btdm_HIDAction2Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action HID\n")); + } + else if (btdm_A2DPAction2Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action A2DP\n")); + } + else if (btdm_PANAction2Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action PAN\n")); + } + else if (btdm_HIDA2DPAction2Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action HID_A2DP\n")); + } + else if (btdm_HIDPANAction2Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action HID_PAN\n")); + } + else if (btdm_PANA2DPAction2Ant(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("Action PAN_A2DP\n")); + } + else + { + RTPRINT(FBT, BT_TRACE, ("No Action Matched \n")); + } + + if (pHalData->bt_coexist.PreviousState != pHalData->bt_coexist.CurrentState) + { + RTPRINT(FBT, BT_TRACE, ("Coexist State change from 0x%"i64fmt"x to 0x%"i64fmt"x\n", + pHalData->bt_coexist.PreviousState, + pHalData->bt_coexist.CurrentState)); + pHalData->bt_coexist.PreviousState = pHalData->bt_coexist.CurrentState; + + RTPRINT(FBT, BT_TRACE, ("[")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT30) + RTPRINT(FBT, BT_TRACE, ("BT 3.0, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_HT20) + RTPRINT(FBT, BT_TRACE, ("HT20, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_HT40) + RTPRINT(FBT, BT_TRACE, ("HT40, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_LEGACY) + RTPRINT(FBT, BT_TRACE, ("Legacy, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_LOW) + RTPRINT(FBT, BT_TRACE, ("Rssi_Low, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_MEDIUM) + RTPRINT(FBT, BT_TRACE, ("Rssi_Mid, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_RSSI_HIGH) + RTPRINT(FBT, BT_TRACE, ("Rssi_High, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_IDLE) + RTPRINT(FBT, BT_TRACE, ("Wifi_Idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_UPLINK) + RTPRINT(FBT, BT_TRACE, ("Wifi_Uplink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_WIFI_DOWNLINK) + RTPRINT(FBT, BT_TRACE, ("Wifi_Downlink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_IDLE) + RTPRINT(FBT, BT_TRACE, ("BT_idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_PAN_IDLE) + RTPRINT(FBT, BT_TRACE, ("BT_PAN_idle, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_PAN_UPLINK) + RTPRINT(FBT, BT_TRACE, ("BT_PAN_uplink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_PAN_DOWNLINK) + RTPRINT(FBT, BT_TRACE, ("BT_PAN_downlink, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_HID) + RTPRINT(FBT, BT_TRACE, ("PRO_HID, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_A2DP) + RTPRINT(FBT, BT_TRACE, ("PRO_A2DP, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_PAN) + RTPRINT(FBT, BT_TRACE, ("PRO_PAN, ")); + if (pHalData->bt_coexist.CurrentState & BT_COEX_STATE_PROFILE_SCO) + RTPRINT(FBT, BT_TRACE, ("PRO_SCO, ")); + RTPRINT(FBT, BT_TRACE, ("]\n")); + } + } +} + +// ===== End of sync from SD7 driver HAL/BTCoexist/HalBtcCsr2Ant.c ===== +#endif + +#ifdef __HALBTCOEXIST_C__ // HAL/BTCoexist/HalBtCoexist.c +// ===== Below this line is sync from SD7 driver HAL/BTCoexist/HalBtCoexist.c ===== + +//============================================================ +// local function +//============================================================ +void btdm_BTCoexistWithProfile(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.BT_Ant_Num == Ant_x2) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], 2 Ant mechanism\n")); + BTDM_BTCoexistWithProfile2Ant(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], 1 Ant mechanism\n")); + BTDM_BTCoexistWithProfile1Ant(padapter); + } +} + +void btdm_ResetFWCoexState(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + pHalData->bt_coexist.CurrentState = 0; + pHalData->bt_coexist.PreviousState = 0; +} + +void btdm_InitBtCoexistDM(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + // 20100415 Joseph: Restore RF register 0x1E and 0x1F value for further usage. + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + pHalData->bt_coexist.BtRfRegOrigin1E = PHY_QueryRFReg(padapter, PathA, RF_RCK1, bRFRegOffsetMask); + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + pHalData->bt_coexist.BtRfRegOrigin1E = PHY_QueryRFReg(padapter, PathA, RF_RCK1, bRFRegOffsetMask); + } + else + { + pHalData->bt_coexist.BtRfRegOrigin1E = PHY_QueryRFReg(padapter, PathA, RF_RCK1, 0xf0); + } + pHalData->bt_coexist.BtRfRegOrigin1F = PHY_QueryRFReg(padapter, PathA, RF_RCK2, 0xf0); + + pHalData->bt_coexist.CurrentState = 0; + pHalData->bt_coexist.PreviousState = 0; + + pHalData->bt_coexist.halCoex8723.bBusyTrafficForCoex = _FALSE; + + BTDM_8723AInit(padapter); + pHalData->bt_coexist.bInitlized = _TRUE; +} +#if 0 +void btdm_FWCoexAllOff92C(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.BT_Ant_Num == Ant_x2) + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0, BT_FW_NAV_OFF); + } + else + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + } +} + +void btdm_FWCoexAllOff92D(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.BT_Ant_Num == Ant_x2) + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_DiminishWiFi(padapter, _FALSE, _FALSE, 0, BT_FW_NAV_OFF); + } + else + { + BTDM_Balance(padapter, _FALSE, 0, 0); + BTDM_SingleAnt(padapter, _FALSE, _FALSE, _FALSE); + } +} + +void +btdm_BTCoexist8192C( + PADAPTER padapter + ) +{ + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + PBT_MGNT pBtMgnt=GET_BT_INFO(padapter)->BtMgnt; + + if (pBtMgnt->bSupportProfile) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], profile notification co-exist mechanism\n")); + btdm_BTCoexistWithProfile(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], No profile notification!!\n")); + } +} + +u8 btdm_IsBTCoexistEnter(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + struct mlme_priv *pmlmepriv; + struct mlme_ext_priv *pmlmeext; + PBT_MGNT pBtMgnt; + PHAL_DATA_TYPE pHalData; + u8 bRet; + + + pmlmepriv = &padapter->mlmepriv; + pmlmeext = &padapter->mlmeextpriv; + pHalData = GET_HAL_DATA(padapter); + pBtMgnt = &pHalData->BtInfo.BtMgnt; + bRet = _TRUE; + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], padapter->interfaceIndex = %d\n", + padapter->interfaceIndex)); + + if (SINGLEMAC_SINGLEPHY == pHalData->MacPhyMode92D) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Single Mac & Single Phy\n")); + } + else if (DUALMAC_SINGLEPHY == pHalData->MacPhyMode92D) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Dual Mac & Single Phy, do nothing!\n")); + bRet = _FALSE; + } + else if (DUALMAC_DUALPHY == pHalData->MacPhyMode92D) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Dual Mac & Dual Phy, do nothing!\n")); + bRet = _FALSE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Unknown Mac & Phy, do nothing!\n")); + bRet = _FALSE; + } + +// switch (pHalData->RF_Type) + switch (pHalData->rf_type) + { + case RF_1T2R: + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RF 1T2R\n")); + break; + case RF_2T4R: + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RF 2T4R\n")); + break; + case RF_2T2R: + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RF 2T2R\n")); + break; + case RF_1T1R: + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RF 1T1R\n")); + break; + default: + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Unknown RF type!\n")); + bRet = _FALSE; + break; + } + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], CurrentBssWirelessMode=%d, \ + dot11CurrentWirelessMode=%d, Hal CurrentWirelessMode=%d \n", \ + pMgntInfo->CurrentBssWirelessMode, pMgntInfo->dot11CurrentWirelessMode, + pHalData->CurrentWirelessMode)); + + if (WIRELESS_MODE_N_5G == pMgntInfo->dot11CurrentWirelessMode || + WIRELESS_MODE_A == pMgntInfo->dot11CurrentWirelessMode) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], 5G or A band, do nothing and disable all bt coex mechanism!\n")); + BTDM_CoexAllOff(padapter); + bRet = _FALSE; + } + + return bRet; +} + +void btdm_BTCoexist8192D(PADAPTER padapter) +{ + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + PBT_MGNT pBtMgnt=GET_BT_INFO(padapter)->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!btdm_IsBTCoexistEnter(padapter)) + return; + + if ((pBtMgnt->bSupportProfile) || + (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8)) + { + if (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8 && + !pBtMgnt->bSupportProfile) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BTDM_Coexist(): Not specify condition\n")); + } + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BTDM_CoexistWithProfile()\n")); + btdm_BTCoexistWithProfile(padapter); + } + else + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], No profile notification!!\n")); + } +} + +void +btdm_AgcTable92d( + PADAPTER padapter, + u8 type + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (type == BT_AGCTABLE_OFF) + { + RTPRINT(FBT, BT_TRACE, ("[BT]AGCTable Off!\n")); + PHY_SetRFReg(padapter, PathA, RF_RX_G1, bRFRegOffsetMask, 0x30a99); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0xdc000); + + rtw_write32(padapter, 0xc78, 0x7B000001); + rtw_write32(padapter, 0xc78, 0x7B010001); + rtw_write32(padapter, 0xc78, 0x7B020001); + rtw_write32(padapter, 0xc78, 0x7B030001); + rtw_write32(padapter, 0xc78, 0x7B040001); + rtw_write32(padapter, 0xc78, 0x7B050001); + rtw_write32(padapter, 0xc78, 0x7B060001); + rtw_write32(padapter, 0xc78, 0x7A070001); + rtw_write32(padapter, 0xc78, 0x79080001); + rtw_write32(padapter, 0xc78, 0x78090001); + rtw_write32(padapter, 0xc78, 0x770A0001); + rtw_write32(padapter, 0xc78, 0x760B0001); + rtw_write32(padapter, 0xc78, 0x750C0001); + rtw_write32(padapter, 0xc78, 0x740D0001); + rtw_write32(padapter, 0xc78, 0x730E0001); + rtw_write32(padapter, 0xc78, 0x720F0001); + rtw_write32(padapter, 0xc78, 0x71100001); + rtw_write32(padapter, 0xc78, 0x70110001); + rtw_write32(padapter, 0xc78, 0x6F120001); + rtw_write32(padapter, 0xc78, 0x6E130001); + rtw_write32(padapter, 0xc78, 0x6D140001); + rtw_write32(padapter, 0xc78, 0x6C150001); + rtw_write32(padapter, 0xc78, 0x6B160001); + rtw_write32(padapter, 0xc78, 0x6A170001); + rtw_write32(padapter, 0xc78, 0x69180001); + rtw_write32(padapter, 0xc78, 0x68190001); + rtw_write32(padapter, 0xc78, 0x671A0001); + rtw_write32(padapter, 0xc78, 0x661B0001); + rtw_write32(padapter, 0xc78, 0x651C0001); + rtw_write32(padapter, 0xc78, 0x641D0001); + rtw_write32(padapter, 0xc78, 0x631E0001); + rtw_write32(padapter, 0xc78, 0x621F0001); + rtw_write32(padapter, 0xc78, 0x61200001); + rtw_write32(padapter, 0xc78, 0x60210001); + rtw_write32(padapter, 0xc78, 0x49220001); + rtw_write32(padapter, 0xc78, 0x48230001); + rtw_write32(padapter, 0xc78, 0x47240001); + rtw_write32(padapter, 0xc78, 0x46250001); + rtw_write32(padapter, 0xc78, 0x45260001); + rtw_write32(padapter, 0xc78, 0x44270001); + rtw_write32(padapter, 0xc78, 0x43280001); + rtw_write32(padapter, 0xc78, 0x42290001); + rtw_write32(padapter, 0xc78, 0x412A0001); + rtw_write32(padapter, 0xc78, 0x402B0001); + + pHalData->bt_coexist.b92DAgcTableOn = _FALSE; + } + else if (type == BT_AGCTABLE_ON) + { + RTPRINT(FBT, BT_TRACE, ("[BT]AGCTable ON!\n")); + PHY_SetRFReg(padapter, PathA, RF_RX_G1, bRFRegOffsetMask, 0xa99); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0xd4000); + + rtw_write32(padapter, 0xc78, 0x7b000001); + rtw_write32(padapter, 0xc78, 0x7b010001); + rtw_write32(padapter, 0xc78, 0x7b020001); + rtw_write32(padapter, 0xc78, 0x7b030001); + rtw_write32(padapter, 0xc78, 0x7b040001); + rtw_write32(padapter, 0xc78, 0x7b050001); + rtw_write32(padapter, 0xc78, 0x7b060001); + rtw_write32(padapter, 0xc78, 0x7b070001); + rtw_write32(padapter, 0xc78, 0x7b080001); + rtw_write32(padapter, 0xc78, 0x7b090001); + rtw_write32(padapter, 0xc78, 0x7b0A0001); + rtw_write32(padapter, 0xc78, 0x7b0B0001); + rtw_write32(padapter, 0xc78, 0x7a0C0001); + rtw_write32(padapter, 0xc78, 0x790D0001); + rtw_write32(padapter, 0xc78, 0x780E0001); + rtw_write32(padapter, 0xc78, 0x770F0001); + rtw_write32(padapter, 0xc78, 0x76100001); + rtw_write32(padapter, 0xc78, 0x75110001); + rtw_write32(padapter, 0xc78, 0x74120001); + rtw_write32(padapter, 0xc78, 0x73130001); + rtw_write32(padapter, 0xc78, 0x72140001); + rtw_write32(padapter, 0xc78, 0x71150001); + rtw_write32(padapter, 0xc78, 0x70160001); + rtw_write32(padapter, 0xc78, 0x6f170001); + rtw_write32(padapter, 0xc78, 0x6e180001); + rtw_write32(padapter, 0xc78, 0x6d190001); + rtw_write32(padapter, 0xc78, 0x6c1A0001); + rtw_write32(padapter, 0xc78, 0x6b1B0001); + rtw_write32(padapter, 0xc78, 0x6a1C0001); + rtw_write32(padapter, 0xc78, 0x691D0001); + rtw_write32(padapter, 0xc78, 0x4f1E0001); + rtw_write32(padapter, 0xc78, 0x4e1F0001); + rtw_write32(padapter, 0xc78, 0x4d200001); + rtw_write32(padapter, 0xc78, 0x4c210001); + rtw_write32(padapter, 0xc78, 0x4b220001); + rtw_write32(padapter, 0xc78, 0x4a230001); + rtw_write32(padapter, 0xc78, 0x49240001); + rtw_write32(padapter, 0xc78, 0x48250001); + rtw_write32(padapter, 0xc78, 0x47260001); + rtw_write32(padapter, 0xc78, 0x46270001); + rtw_write32(padapter, 0xc78, 0x45280001); + rtw_write32(padapter, 0xc78, 0x44290001); + rtw_write32(padapter, 0xc78, 0x432A0001); + rtw_write32(padapter, 0xc78, 0x422B0001); + + pHalData->bt_coexist.b92DAgcTableOn = _TRUE; + pHalData->bt_coexist.bSWCoexistAllOff = _FALSE; + } +} +#endif +//============================================================ +// extern function +//============================================================ +void BTDM_CheckAntSelMode(PADAPTER padapter) +{ +#if 0 + if (!IS_HARDWARE_TYPE_8192C(padapter)) + return; + BTDM_CheckBTIdleChange1Ant(padapter); +#endif +} + +u8 BTDM_NeedToRoamForBtEnableDisable(PADAPTER padapter) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (IS_HARDWARE_TYPE_8192D(padapter)) + { + if (pHalData->bt_coexist.bNeedToRoamForBtDisableEnable) + { + pHalData->bt_coexist.bNeedToRoamForBtDisableEnable = _FALSE; + RTPRINT(FBT, BT_TRACE, ("92D bt need to roam caused by bt enable/disable!!!\n")); + return _TRUE; + } + } +#endif + return _FALSE; +} + +void BTDM_FwC2hBtRssi(PADAPTER padapter, u8 *tmpBuf) +{ + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_FwC2hBtRssi8723A(padapter, tmpBuf); +} + +void BTDM_FwC2hBtInfo(PADAPTER padapter, u8 *tmpBuf, u8 length) +{ + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_FwC2hBtInfo8723A(padapter, tmpBuf, length); +} + +void BTDM_DisplayBtCoexInfo(PADAPTER padapter) +{ + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_Display8723ABtCoexInfo(padapter); +} + +void BTDM_RejectAPAggregatedPacket(PADAPTER padapter, u8 bReject) +{ +#if 0 + PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); + PRX_TS_RECORD pRxTs = NULL; + + { + if (bReject) + { + // Do not allow receiving A-MPDU aggregation. + if (pMgntInfo->IOTPeer == HT_IOT_PEER_CISCO) + { + if (pHTInfo->bAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU \n")); + pHTInfo->bAcceptAddbaReq = _FALSE; + if (GetTs(padapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, _FALSE)) + TsInitDelBA(padapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); + } + } + else + { + if (!pHTInfo->bAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT Idle\n")); + pHTInfo->bAcceptAddbaReq = _TRUE; + } + } + } + else + { + if (pMgntInfo->IOTPeer == HT_IOT_PEER_CISCO) + { + if (!pHTInfo->bAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU \n")); + pHTInfo->bAcceptAddbaReq = _TRUE; + } + } + } + } +#endif +} + +u8 BTDM_IsHT40(PADAPTER padapter) +{ + u8 isHT40 = _TRUE; + HT_CHANNEL_WIDTH bw; + +#if 0 + rtw_hal_get_hwreg(padapter, HW_VAR_BW_MODE, (pu8)(&bw)); +#else +#if 0 + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + bw = pHalData->CurrentChannelBW; +#else + bw = padapter->mlmeextpriv.cur_bwmode; +#endif +#endif + + if (bw == HT_CHANNEL_WIDTH_20) + { + isHT40 = _FALSE; + } + else if (bw == HT_CHANNEL_WIDTH_40) + { + isHT40 = _TRUE; + } + + return isHT40; +} + +u8 BTDM_Legacy(PADAPTER padapter) +{ + struct mlme_ext_priv *pmlmeext; + u8 isLegacy = _FALSE; + + pmlmeext = &padapter->mlmeextpriv; + if ((pmlmeext->cur_wireless_mode == WIRELESS_11B) || + (pmlmeext->cur_wireless_mode == WIRELESS_11G) || + (pmlmeext->cur_wireless_mode == WIRELESS_11BG)) + isLegacy = _TRUE; + + return isLegacy; +} + +void BTDM_CheckWiFiState(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + struct mlme_priv *pmlmepriv; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + + + pHalData = GET_HAL_DATA(padapter); + pmlmepriv = &padapter->mlmepriv; + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + + if (pmlmepriv->LinkDetectInfo.bBusyTraffic) + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_IDLE; + + if (pmlmepriv->LinkDetectInfo.bTxBusyTraffic) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_UPLINK; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_UPLINK; + } + + if (pmlmepriv->LinkDetectInfo.bRxBusyTraffic) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_DOWNLINK; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_DOWNLINK; + } + } + else + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_IDLE; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_UPLINK; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_DOWNLINK; + } + + if (BTDM_Legacy(padapter)) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_LEGACY; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_HT20; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_HT40; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_LEGACY; + if (BTDM_IsHT40(padapter)) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_HT40; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_HT20; + } + else + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_HT20; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_HT40; + } + } + + if (pBtMgnt->BtOperationOn) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_BT30; + } + else + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_BT30; + } +} + +s32 BTDM_GetRxSS(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PHAL_DATA_TYPE pHalData; + s32 UndecoratedSmoothedPWDB = 0; + + + pHalData = GET_HAL_DATA(padapter); + +// if (pMgntInfo->bMediaConnect) // Default port + if (BTDM_CheckFWState(padapter, _FW_LINKED) == _TRUE) + { + UndecoratedSmoothedPWDB = GET_UNDECORATED_AVERAGE_RSSI(padapter); + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB; + //pHalData->BT_EntryMinUndecoratedSmoothedPWDB + } + RTPRINT(FBT, BT_TRACE, ("BTDM_GetRxSS() = %d\n", UndecoratedSmoothedPWDB)); + return UndecoratedSmoothedPWDB; +} + +s32 BTDM_GetRxBeaconSS(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PHAL_DATA_TYPE pHalData; + s32 pwdbBeacon = 0; + + + pHalData = GET_HAL_DATA(padapter); + +// if (pMgntInfo->bMediaConnect) // Default port + if (BTDM_CheckFWState(padapter, _FW_LINKED) == _TRUE) + { + //pwdbBeacon = pHalData->dmpriv.UndecoratedSmoothedBeacon; + pwdbBeacon= pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB; + } + RTPRINT(FBT, BT_TRACE, ("BTDM_GetRxBeaconSS() = %d\n", pwdbBeacon)); + return pwdbBeacon; +} + +// Get beacon rssi state +u8 +BTDM_CheckCoexBcnRssiState( + PADAPTER padapter, + u8 levelNum, + u8 RssiThresh, + u8 RssiThresh1 + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + s32 pwdbBeacon = 0; + u8 bcnRssiState; + + pwdbBeacon = BTDM_GetRxBeaconSS(padapter); + + if (levelNum == 2) + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_MEDIUM; + + if ((pHalData->bt_coexist.preRssiStateBeacon == BT_RSSI_STATE_LOW) || + (pHalData->bt_coexist.preRssiStateBeacon == BT_RSSI_STATE_STAY_LOW)) + { + if (pwdbBeacon >= (RssiThresh+BT_FW_COEX_THRESH_TOL)) + { + bcnRssiState = BT_RSSI_STATE_HIGH; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_BEACON_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state switch to High\n")); + } + else + { + bcnRssiState = BT_RSSI_STATE_STAY_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state stay at Low\n")); + } + } + else + { + if (pwdbBeacon < RssiThresh) + { + bcnRssiState = BT_RSSI_STATE_LOW; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_BEACON_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state switch to Low\n")); + } + else + { + bcnRssiState = BT_RSSI_STATE_STAY_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state stay at High\n")); + } + } + } + else if (levelNum == 3) + { + if (RssiThresh > RssiThresh1) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON thresh error!!\n")); + return pHalData->bt_coexist.preRssiStateBeacon; + } + + if ((pHalData->bt_coexist.preRssiStateBeacon == BT_RSSI_STATE_LOW) || + (pHalData->bt_coexist.preRssiStateBeacon == BT_RSSI_STATE_STAY_LOW)) + { + if (pwdbBeacon >= (RssiThresh+BT_FW_COEX_THRESH_TOL)) + { + bcnRssiState = BT_RSSI_STATE_MEDIUM; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_BEACON_MEDIUM; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state switch to Medium\n")); + } + else + { + bcnRssiState = BT_RSSI_STATE_STAY_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state stay at Low\n")); + } + } + else if ((pHalData->bt_coexist.preRssiStateBeacon == BT_RSSI_STATE_MEDIUM) || + (pHalData->bt_coexist.preRssiStateBeacon == BT_RSSI_STATE_STAY_MEDIUM)) + { + if (pwdbBeacon >= (RssiThresh1+BT_FW_COEX_THRESH_TOL)) + { + bcnRssiState = BT_RSSI_STATE_HIGH; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_BEACON_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state switch to High\n")); + } + else if (pwdbBeacon < RssiThresh) + { + bcnRssiState = BT_RSSI_STATE_LOW; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_BEACON_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state switch to Low\n")); + } + else + { + bcnRssiState = BT_RSSI_STATE_STAY_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state stay at Medium\n")); + } + } + else + { + if (pwdbBeacon < RssiThresh1) + { + bcnRssiState = BT_RSSI_STATE_MEDIUM; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_BEACON_MEDIUM; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_BEACON_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state switch to Medium\n")); + } + else + { + bcnRssiState = BT_RSSI_STATE_STAY_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_BEACON state stay at High\n")); + } + } + } + + pHalData->bt_coexist.preRssiStateBeacon = bcnRssiState; + + return bcnRssiState; +} + +u8 +BTDM_CheckCoexRSSIState1( + PADAPTER padapter, + u8 levelNum, + u8 RssiThresh, + u8 RssiThresh1 + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + s32 UndecoratedSmoothedPWDB = 0; + u8 btRssiState; + + UndecoratedSmoothedPWDB = BTDM_GetRxSS(padapter); + + if (levelNum == 2) + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_MEDIUM; + + if ((pHalData->bt_coexist.preRssiState1 == BT_RSSI_STATE_LOW) || + (pHalData->bt_coexist.preRssiState1 == BT_RSSI_STATE_STAY_LOW)) + { + if (UndecoratedSmoothedPWDB >= (RssiThresh+BT_FW_COEX_THRESH_TOL)) + { + btRssiState = BT_RSSI_STATE_HIGH; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_1_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state switch to High\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state stay at Low\n")); + } + } + else + { + if (UndecoratedSmoothedPWDB < RssiThresh) + { + btRssiState = BT_RSSI_STATE_LOW; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_1_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state switch to Low\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state stay at High\n")); + } + } + } + else if (levelNum == 3) + { + if (RssiThresh > RssiThresh1) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 thresh error!!\n")); + return pHalData->bt_coexist.preRssiState1; + } + + if ((pHalData->bt_coexist.preRssiState1 == BT_RSSI_STATE_LOW) || + (pHalData->bt_coexist.preRssiState1 == BT_RSSI_STATE_STAY_LOW)) + { + if (UndecoratedSmoothedPWDB >= (RssiThresh+BT_FW_COEX_THRESH_TOL)) + { + btRssiState = BT_RSSI_STATE_MEDIUM; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_1_MEDIUM; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state switch to Medium\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state stay at Low\n")); + } + } + else if ((pHalData->bt_coexist.preRssiState1 == BT_RSSI_STATE_MEDIUM) || + (pHalData->bt_coexist.preRssiState1 == BT_RSSI_STATE_STAY_MEDIUM)) + { + if (UndecoratedSmoothedPWDB >= (RssiThresh1+BT_FW_COEX_THRESH_TOL)) + { + btRssiState = BT_RSSI_STATE_HIGH; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_1_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state switch to High\n")); + } + else if (UndecoratedSmoothedPWDB < RssiThresh) + { + btRssiState = BT_RSSI_STATE_LOW; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_1_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state switch to Low\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state stay at Medium\n")); + } + } + else + { + if (UndecoratedSmoothedPWDB < RssiThresh1) + { + btRssiState = BT_RSSI_STATE_MEDIUM; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_1_MEDIUM; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_1_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state switch to Medium\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI_1 state stay at High\n")); + } + } + } + + pHalData->bt_coexist.preRssiState1 = btRssiState; + + return btRssiState; +} + +u8 +BTDM_CheckCoexRSSIState( + PADAPTER padapter, + u8 levelNum, + u8 RssiThresh, + u8 RssiThresh1 + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + s32 UndecoratedSmoothedPWDB = 0; + u8 btRssiState; + + UndecoratedSmoothedPWDB = BTDM_GetRxSS(padapter); + + if (levelNum == 2) + { + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_MEDIUM; + + if ((pHalData->bt_coexist.preRssiState == BT_RSSI_STATE_LOW) || + (pHalData->bt_coexist.preRssiState == BT_RSSI_STATE_STAY_LOW)) + { + if (UndecoratedSmoothedPWDB >= (RssiThresh+BT_FW_COEX_THRESH_TOL)) + { + btRssiState = BT_RSSI_STATE_HIGH; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state switch to High\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state stay at Low\n")); + } + } + else + { + if (UndecoratedSmoothedPWDB < RssiThresh) + { + btRssiState = BT_RSSI_STATE_LOW; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state switch to Low\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state stay at High\n")); + } + } + } + else if (levelNum == 3) + { + if (RssiThresh > RssiThresh1) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI thresh error!!\n")); + return pHalData->bt_coexist.preRssiState; + } + + if ((pHalData->bt_coexist.preRssiState == BT_RSSI_STATE_LOW) || + (pHalData->bt_coexist.preRssiState == BT_RSSI_STATE_STAY_LOW)) + { + if (UndecoratedSmoothedPWDB >= (RssiThresh+BT_FW_COEX_THRESH_TOL)) + { + btRssiState = BT_RSSI_STATE_MEDIUM; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_MEDIUM; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state switch to Medium\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state stay at Low\n")); + } + } + else if ((pHalData->bt_coexist.preRssiState == BT_RSSI_STATE_MEDIUM) || + (pHalData->bt_coexist.preRssiState == BT_RSSI_STATE_STAY_MEDIUM)) + { + if (UndecoratedSmoothedPWDB >= (RssiThresh1+BT_FW_COEX_THRESH_TOL)) + { + btRssiState = BT_RSSI_STATE_HIGH; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state switch to High\n")); + } + else if (UndecoratedSmoothedPWDB < RssiThresh) + { + btRssiState = BT_RSSI_STATE_LOW; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_LOW; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state switch to Low\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_MEDIUM; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state stay at Medium\n")); + } + } + else + { + if (UndecoratedSmoothedPWDB < RssiThresh1) + { + btRssiState = BT_RSSI_STATE_MEDIUM; + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_WIFI_RSSI_MEDIUM; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_HIGH; + pHalData->bt_coexist.CurrentState &= ~BT_COEX_STATE_WIFI_RSSI_LOW; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state switch to Medium\n")); + } + else + { + btRssiState = BT_RSSI_STATE_STAY_HIGH; + RTPRINT(FBT, BT_TRACE, ("[DM][BT], RSSI state stay at High\n")); + } + } + } + + pHalData->bt_coexist.preRssiState = btRssiState; + + return btRssiState; +} + +u8 BTDM_DisableEDCATurbo(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT_MGNT pBtMgnt; + PHAL_DATA_TYPE pHalData; + u8 bBtChangeEDCA = _FALSE; + u32 EDCA_BT_BE = 0x5ea42b, cur_EDCA_reg; + u16 aggr_num; + u8 bRet = _FALSE; + + + pHalData = GET_HAL_DATA(padapter); + pBtMgnt = &pHalData->BtInfo.BtMgnt; + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + bRet = _FALSE; + pHalData->bt_coexist.lastBtEdca = 0; + return bRet; + } + if (!((pBtMgnt->bSupportProfile) || + (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC8))) + { + bRet = _FALSE; + pHalData->bt_coexist.lastBtEdca = 0; + return bRet; + } + + if (BT_1Ant(padapter)) + { + bRet = _FALSE; + pHalData->bt_coexist.lastBtEdca = 0; + return bRet; + } + + if (pHalData->bt_coexist.exec_cnt < 3) + pHalData->bt_coexist.exec_cnt++; + else + pHalData->bt_coexist.bEDCAInitialized = _TRUE; + + // When BT is non idle + if (!(pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_IDLE)) + { + RTPRINT(FBT, BT_TRACE, ("BT state non idle, set bt EDCA\n")); + + //aggr_num = 0x0909; + if (pHalData->odmpriv.DM_EDCA_Table.bCurrentTurboEDCA == _TRUE) + { + bBtChangeEDCA = _TRUE; + pHalData->odmpriv.DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; +// pHalData->bIsCurRDLState = _FALSE; + pHalData->dmpriv.prv_traffic_idx = 3; + } + cur_EDCA_reg = rtw_read32(padapter, REG_EDCA_BE_PARAM); + + if (cur_EDCA_reg != EDCA_BT_BE) + { + bBtChangeEDCA = _TRUE; + } + if (bBtChangeEDCA || !pHalData->bt_coexist.bEDCAInitialized) + { + rtw_write32(padapter, REG_EDCA_BE_PARAM, EDCA_BT_BE); + pHalData->bt_coexist.lastBtEdca = EDCA_BT_BE; + } + bRet = _TRUE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT state idle, set original EDCA\n")); + pHalData->bt_coexist.lastBtEdca = 0; + bRet = _FALSE; + } + +#ifdef CONFIG_PCI_HCI + if (IS_HARDWARE_TYPE_8192C(padapter)) + { + // When BT is non idle + if (!(pHalData->bt_coexist.CurrentState & BT_COEX_STATE_BT_IDLE)) + { + aggr_num = 0x0909; + } + else + { + aggr_num = 0x0A0A; + } + + if ((pHalData->bt_coexist.last_aggr_num != aggr_num) || !pHalData->bt_coexist.bEDCAInitialized) + { + RTPRINT(FBT, BT_TRACE, ("BT write AGGR NUM = 0x%x\n", aggr_num)); + rtw_write8(padapter, REG_MAX_AGGR_NUM, aggr_num); + pHalData->bt_coexist.last_aggr_num = aggr_num; + } + } +#endif + + return bRet; +} + +void +BTDM_Balance( + PADAPTER padapter, + u8 bBalanceOn, + u8 ms0, + u8 ms1 + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 H2C_Parameter[3] = {0}; + + if (bBalanceOn) + { + H2C_Parameter[2] = 1; + H2C_Parameter[1] = ms1; + H2C_Parameter[0] = ms0; + pHalData->bt_coexist.bFWCoexistAllOff = _FALSE; + } + else + { + H2C_Parameter[2] = 0; + H2C_Parameter[1] = 0; + H2C_Parameter[0] = 0; + } + pHalData->bt_coexist.bBalanceOn = bBalanceOn; + + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", + bBalanceOn?"ON":"OFF", ms0, ms1, + H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); + + FillH2CCmd(padapter, 0xc, 3, H2C_Parameter); +} + +void BTDM_AGCTable(PADAPTER padapter, u8 type) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +#if 0 + if (IS_HARDWARE_TYPE_8192D(padapter)) + { + btdm_AgcTable92d(padapter, type); + return; + } +#endif + if (type == BT_AGCTABLE_OFF) + { + RTPRINT(FBT, BT_TRACE, ("[BT]AGCTable Off!\n")); + rtw_write32(padapter, 0xc78,0x641c0001); + rtw_write32(padapter, 0xc78,0x631d0001); + rtw_write32(padapter, 0xc78,0x621e0001); + rtw_write32(padapter, 0xc78,0x611f0001); + rtw_write32(padapter, 0xc78,0x60200001); + + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0x32000); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0x71000); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0xb0000); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0xfc000); + if (IS_HARDWARE_TYPE_8723A(padapter)) + PHY_SetRFReg(padapter, PathA, RF_RX_G1, bRFRegOffsetMask, 0x30355); + else + PHY_SetRFReg(padapter, PathA, RF_RX_G1, bRFRegOffsetMask, 0x10255); + + if (IS_HARDWARE_TYPE_8723A(padapter)) + pHalData->bt_coexist.b8723aAgcTableOn = _FALSE; + } + else if (type == BT_AGCTABLE_ON) + { + RTPRINT(FBT, BT_TRACE, ("[BT]AGCTable On!\n")); + rtw_write32(padapter, 0xc78,0x4e1c0001); + rtw_write32(padapter, 0xc78,0x4d1d0001); + rtw_write32(padapter, 0xc78,0x4c1e0001); + rtw_write32(padapter, 0xc78,0x4b1f0001); + rtw_write32(padapter, 0xc78,0x4a200001); + + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0xdc000); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0x90000); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0x51000); + PHY_SetRFReg(padapter, PathA, RF_RX_AGC_HP, bRFRegOffsetMask, 0x12000); + if (IS_HARDWARE_TYPE_8723A(padapter)) + PHY_SetRFReg(padapter, PathA, RF_RX_G1, bRFRegOffsetMask, 0x00355); + else + PHY_SetRFReg(padapter, PathA, RF_RX_G1, bRFRegOffsetMask, 0x00255); + + if (IS_HARDWARE_TYPE_8723A(padapter)) + pHalData->bt_coexist.b8723aAgcTableOn = _TRUE; + + pHalData->bt_coexist.bSWCoexistAllOff = _FALSE; + } +} + +void BTDM_BBBackOffLevel(PADAPTER padapter, u8 type) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (type == BT_BB_BACKOFF_OFF) + { + RTPRINT(FBT, BT_TRACE, ("[BT]BBBackOffLevel Off!\n")); + rtw_write32(padapter, 0xc04,0x3a05611); + } + else if (type == BT_BB_BACKOFF_ON) + { + RTPRINT(FBT, BT_TRACE, ("[BT]BBBackOffLevel On!\n")); + rtw_write32(padapter, 0xc04,0x3a07611); + pHalData->bt_coexist.bSWCoexistAllOff = _FALSE; + } +} + +void BTDM_FWCoexAllOff(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);; + + + RTPRINT(FBT, BT_TRACE, ("BTDM_FWCoexAllOff()\n")); +#if 0 + if (!pBtMgnt->bSupportProfile) + return; +#endif + if (pHalData->bt_coexist.bFWCoexistAllOff) + return; + RTPRINT(FBT, BT_TRACE, ("BTDM_FWCoexAllOff(), real Do\n")); + +#if 0 + if (IS_HARDWARE_TYPE_8192C(padapter)) + { + btdm_FWCoexAllOff92C(padapter); + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + btdm_FWCoexAllOff92D(padapter); + } + else if (IS_HARDWARE_TYPE_8723A(padapter)) + { + BTDM_FWCoexAllOff8723A(padapter); + } +#else + BTDM_FWCoexAllOff8723A(padapter); +#endif + + pHalData->bt_coexist.bFWCoexistAllOff = _TRUE; +} + +void BTDM_SWCoexAllOff(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);; + + + RTPRINT(FBT, BT_TRACE, ("BTDM_SWCoexAllOff()\n")); +#if 0 + if (!pBtMgnt->bSupportProfile) + return; +#endif + if (pHalData->bt_coexist.bSWCoexistAllOff) + return; + RTPRINT(FBT, BT_TRACE, ("BTDM_SWCoexAllOff(), real Do\n")); +#if 0 + if (IS_HARDWARE_TYPE_8192C(padapter)) + { + BTDM_SwCoexAllOff92C(padapter); + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + BTDM_SwCoexAllOff92D(padapter); + } + else if (IS_HARDWARE_TYPE_8723A(padapter)) + { + BTDM_SWCoexAllOff8723A(padapter); + } +#else + BTDM_SWCoexAllOff8723A(padapter); +#endif + + pHalData->bt_coexist.bSWCoexistAllOff = _TRUE; +} + +void BTDM_HWCoexAllOff(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);; + + + RTPRINT(FBT, BT_TRACE, ("BTDM_HWCoexAllOff()\n")); +#if 0 + if (!pBtMgnt->bSupportProfile) + return; +#endif + if (pHalData->bt_coexist.bHWCoexistAllOff) + return; + RTPRINT(FBT, BT_TRACE, ("BTDM_HWCoexAllOff(), real Do\n")); + + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + BTDM_HWCoexAllOff8723A(padapter); + } + + pHalData->bt_coexist.bHWCoexistAllOff = _TRUE; +} + +void BTDM_CoexAllOff(PADAPTER padapter) +{ + BTDM_FWCoexAllOff(padapter); + BTDM_SWCoexAllOff(padapter); + BTDM_HWCoexAllOff(padapter); +} + +void BTDM_TurnOffBtCoexistBeforeEnterLPS(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +// PRT_POWER_SAVE_CONTROL pPSC = GET_POWER_SAVE_CONTROL(pMgntInfo); + struct pwrctrl_priv *ppwrctrl = adapter_to_pwrctl(padapter); + + + // Add temporarily. + if ((!pHalData->bt_coexist.BluetoothCoexist) ||(!pBtMgnt->bSupportProfile)) + return; + + // 8723 1Ant doesn't need to turn off bt coexist mechanism. + if (BTDM_1Ant8723A(padapter)) + return; + + if (IS_HARDWARE_TYPE_8192C(padapter) || + IS_HARDWARE_TYPE_8192D(padapter) || + IS_HARDWARE_TYPE_8723A(padapter)) + { + // + // Before enter LPS, turn off FW BT Co-exist mechanism + // + if (ppwrctrl->bLeisurePs) + { + RTPRINT(FBT, BT_TRACE, ("[BT][DM], Before enter LPS, turn off all Coexist DM\n")); + btdm_ResetFWCoexState(padapter); + BTDM_CoexAllOff(padapter); + BTDM_SetAntenna(padapter, BTDM_ANT_BT); + } + } +} + +void BTDM_TurnOffBtCoexistBeforeEnterIPS(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +// PRT_POWER_SAVE_CONTROL pPSC = GET_POWER_SAVE_CONTROL(pMgntInfo); + struct pwrctrl_priv *ppwrctrl = adapter_to_pwrctl(padapter); + + if (!pHalData->bt_coexist.BluetoothCoexist) + return; + + // 8723 1Ant doesn't need to turn off bt coexist mechanism. + if (BTDM_1Ant8723A(padapter)) + return; + + if (IS_HARDWARE_TYPE_8192C(padapter) || + IS_HARDWARE_TYPE_8192D(padapter) || + IS_HARDWARE_TYPE_8723A(padapter)) + { + // + // Before enter IPS, turn off FW BT Co-exist mechanism + // +// if (pPSC->bInactivePs) + if (ppwrctrl->reg_rfoff == rf_on) + { + RTPRINT(FBT, BT_TRACE, ("[BT][DM], Before enter IPS, turn off all Coexist DM\n")); + btdm_ResetFWCoexState(padapter); + BTDM_CoexAllOff(padapter); + BTDM_SetAntenna(padapter, BTDM_ANT_BT); + } + } +} + +void BTDM_SignalCompensation(PADAPTER padapter, u8 *rssi_wifi, u8 *rssi_bt) +{ + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + BTDM_8723ASignalCompensation(padapter, rssi_wifi, rssi_bt); + } +} +#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) +/* +0. write 0xa3 = 0x05 + +1. 0xa0 == 0x04 + write 0xF6?1:0] = 0x01 + write 0x3A[7:0] = 0x31 + +2. read 0xC0[31:0] == 0 + write 0xcc{2]= 1 + +3. read X=0x6b[4] + if X== 1 + { + write 0x6b[4] = 0 + write 0xcc{2]= 0 + } + else if X == 0 + { + write 0x6b[4] = 1 + write 0xcc{2]= 0 + } + +*/ +void dm_CheckBTState(_adapter *pAdapter) +{ + u8 value=0,regValue8=0; + u32 regvalue32=0; + //_adapter *pAdapter = (_adapter*)context; + +// if (pAdapter->drv_in_test == CMCC_TEST) +// return; + + rtw_write8(pAdapter, 0xa3, 5); + + //DBG_871X("------>%s,get 0xa3=%0x\n",__func__,rtw_read8(pAdapter, 0xa3)); + + regValue8 = rtw_read8(pAdapter, 0xa0); + //DBG_871X("Get 0xa0 = 0x%x\n",regValue8); + if(regValue8 == 0x4){ + value = rtw_read8(pAdapter, 0xf6); + value &= ~3; + value |= 1; + rtw_write8(pAdapter, 0xf6, value); + rtw_write8(pAdapter, 0x3A, 0x31); + } + else{ + return; + } + + regvalue32 = rtw_read32(pAdapter, 0xc0); + //DBG_871X("Get 0xc0 = 0x%x\n",regvalue32); + if(rtw_read32(pAdapter, 0xc0) == 0x0){ + value = rtw_read8(pAdapter, 0xcc); + value |= 0x4; + rtw_write8(pAdapter, 0xcc, value); + } + else{ + return; + } + + regValue8 = rtw_read8(pAdapter, 0x6b); //0x6b[28] + //DBG_871X("Get 0x6b = 0x%x\n",regValue8); + + if((regValue8 & 0x10) == 0x10){ + regValue8 &= 0xEF; + rtw_write8(pAdapter, 0x6b, regValue8); + value = rtw_read8(pAdapter, 0xcc); + value &= 0xfb; + rtw_write8(pAdapter, 0xcc, value); + } + else if ((regValue8 & 0x10) == 0){ + regValue8 |= 0x10; + rtw_write8(pAdapter, 0x6b, regValue8); + value = rtw_read8(pAdapter, 0xcc); + value &= 0xfb; + rtw_write8(pAdapter, 0xcc, value); + } + + //DBG_871X("<------%s,get 0x6b=0x%0x,0xcc=0x%x\n",__func__,rtw_read8(pAdapter, 0x6b),rtw_read8(pAdapter, 0xcc)); +} + +void check_bt_status_work(void *data) +{ + struct delayed_work *dwork; + PADAPTER padapter; + struct pwrctrl_priv *pwrpriv ; + + dwork = container_of(data, struct delayed_work, work); + padapter = container_of(dwork, struct _ADAPTER, checkbt_work); + if(!padapter) + { + DBG_871X("%s padapter == NULL\n", __func__); + return; + }; + + pwrpriv = adapter_to_pwrctl(padapter); + if (pwrpriv->bInSuspend == _FALSE) + dm_CheckBTState(padapter); +} +#endif +void BTDM_Coexist(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + +#if defined(CONFIG_CONCURRENT_MODE) + if (padapter->adapter_type != PRIMARY_ADAPTER) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], CONFIG_CONCURRENT_MODE !!\n")); + RTPRINT(FBT, BT_TRACE, ("[DM][BT], padapter->adapter_type != PRIMARY_ADAPTER !!\n")); + return; + } +#endif + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT not exists!!\n")); + return; + } + + if (!pHalData->bt_coexist.bInitlized) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], btdm_InitBtCoexistDM()\n")); + btdm_InitBtCoexistDM(padapter); + } + + RTPRINT(FBT, BT_TRACE, ("\n\n[DM][BT], BTDM start!!\n")); + + BTDM_PWDBMonitor(padapter); + + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], HW type is 8723\n")); + BTDM_BTCoexist8723A(padapter); + } +#if 0 + else if (IS_HARDWARE_TYPE_8192C(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], HW type is 88C\n")); + btdm_BTCoexist8192C(padapter); + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], HW type is 92D\n")); + btdm_BTCoexist8192D(padapter); + } +#endif + RTPRINT(FBT, BT_TRACE, ("[DM][BT], BTDM end!!\n\n")); +} + +void BTDM_UpdateCoexState(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!BTDM_IsSameCoexistState(padapter)) + { + RTPRINT(FBT, BT_TRACE, ("[BTCoex], Coexist State[bitMap] change from 0x%"i64fmt"x to 0x%"i64fmt"x, changeBits=0x%"i64fmt"x\n", + pHalData->bt_coexist.PreviousState, + pHalData->bt_coexist.CurrentState, + (pHalData->bt_coexist.PreviousState^pHalData->bt_coexist.CurrentState))); + pHalData->bt_coexist.PreviousState = pHalData->bt_coexist.CurrentState; + } +} + +u8 BTDM_IsSameCoexistState(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + { + return _TRUE; + } + else + { + RTPRINT(FBT, BT_TRACE, ("[DM][BT], Coexist state changed!!\n")); + return _FALSE; + } +} + +void BTDM_PWDBMonitor(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &(GetDefaultAdapter(padapter)->MgntInfo); + PBT30Info pBTInfo = GET_BT_INFO(GetDefaultAdapter(padapter)); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 H2C_Parameter[3] = {0}; + s32 tmpBTEntryMaxPWDB=0, tmpBTEntryMinPWDB=0xff; + u8 i; + + if (pBtMgnt->BtOperationOn) + { + for (i = 0; i < MAX_BT_ASOC_ENTRY_NUM; i++) + { + if (pBTInfo->BtAsocEntry[i].bUsed) + { + if (pBTInfo->BtAsocEntry[i].UndecoratedSmoothedPWDB < tmpBTEntryMinPWDB) + tmpBTEntryMinPWDB = pBTInfo->BtAsocEntry[i].UndecoratedSmoothedPWDB; + if (pBTInfo->BtAsocEntry[i].UndecoratedSmoothedPWDB > tmpBTEntryMaxPWDB) + tmpBTEntryMaxPWDB = pBTInfo->BtAsocEntry[i].UndecoratedSmoothedPWDB; + + // + // Report every BT connection (HS mode) RSSI to FW + // + H2C_Parameter[2] = (u8)(pBTInfo->BtAsocEntry[i].UndecoratedSmoothedPWDB & 0xFF); + H2C_Parameter[0] = (MAX_FW_SUPPORT_MACID_NUM-1-i); + RTPRINT(FDM, DM_BT30, ("RSSI report for BT[%d], H2C_Par = 0x%x\n", i, H2C_Parameter[0])); + FillH2CCmd(padapter, RSSI_SETTING_EID, 3, H2C_Parameter); + RTPRINT_ADDR(FDM, (DM_PWDB|DM_BT30), ("BT_Entry Mac :"), pBTInfo->BtAsocEntry[i].BTRemoteMACAddr) + RTPRINT(FDM, (DM_PWDB|DM_BT30), ("BT rx pwdb[%d] = 0x%x(%d)\n", i, pBTInfo->BtAsocEntry[i].UndecoratedSmoothedPWDB, + pBTInfo->BtAsocEntry[i].UndecoratedSmoothedPWDB)); + } + } + if (tmpBTEntryMaxPWDB != 0) // If associated entry is found + { + pHalData->dmpriv.BT_EntryMaxUndecoratedSmoothedPWDB = tmpBTEntryMaxPWDB; + RTPRINT(FDM, (DM_PWDB|DM_BT30), ("BT_EntryMaxPWDB = 0x%x(%d)\n", + tmpBTEntryMaxPWDB, tmpBTEntryMaxPWDB)); + } + else + { + pHalData->dmpriv.BT_EntryMaxUndecoratedSmoothedPWDB = 0; + } + if (tmpBTEntryMinPWDB != 0xff) // If associated entry is found + { + pHalData->dmpriv.BT_EntryMinUndecoratedSmoothedPWDB = tmpBTEntryMinPWDB; + RTPRINT(FDM, (DM_PWDB|DM_BT30), ("BT_EntryMinPWDB = 0x%x(%d)\n", + tmpBTEntryMinPWDB, tmpBTEntryMinPWDB)); + } + else + { + pHalData->dmpriv.BT_EntryMinUndecoratedSmoothedPWDB = 0; + } + } +} + +u8 BTDM_DigByBtRssi(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &(GetDefaultAdapter(padapter)->MgntInfo); + PBT30Info pBTInfo = GET_BT_INFO(GetDefaultAdapter(padapter)); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 bRet = _FALSE; + PDM_ODM_T pDM_OutSrc = &pHalData->odmpriv; + u8 digForBtHs=0, cckCcaThres=0; + + + // + // When running under HS mode, use bt related Dig and cck threshold. + // + if (pBtMgnt->BtOperationOn) + { + if (pBtMgnt->bBTConnectInProgress) + { + if (IS_HARDWARE_TYPE_8723A(padapter)) + digForBtHs = 0x28; + else + digForBtHs = 0x22; + } + else + { + // + // Decide DIG value by BT RSSI. + // + digForBtHs = (u8)pHalData->dmpriv.BT_EntryMinUndecoratedSmoothedPWDB; + + if (IS_HARDWARE_TYPE_8723A(padapter)) + digForBtHs += 0x04; + + if (digForBtHs > DM_DIG_MAX_NIC) + digForBtHs = DM_DIG_MAX_NIC; + if (digForBtHs < DM_DIG_MIN_NIC) + digForBtHs = DM_DIG_MIN_NIC; + + RTPRINT(FDM, DM_BT30, ("BTDM_DigByBtRssi(), digForBtHs=0x%x\n", + digForBtHs)); + } + ODM_Write_DIG(pDM_OutSrc, digForBtHs); + + // + // Decide cck packet threshold + // + cckCcaThres = 0xcd; + ODM_Write_CCK_CCA_Thres(pDM_OutSrc, cckCcaThres); + + bRet = _TRUE; + } + + return bRet; +} + +u8 BTDM_IsBTBusy(PADAPTER padapter) +{ + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_MGNT pBtMgnt = &pBTInfo->BtMgnt; + + if (pBtMgnt->ExtConfig.bBTBusy) + return _TRUE; + else + return _FALSE; +} + +u8 BTDM_IsWifiBusy(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &(GetDefaultAdapter(padapter)->MgntInfo); + struct mlme_priv *pmlmepriv = &(GetDefaultAdapter(padapter)->mlmepriv); + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PBT30Info pBTInfo = GET_BT_INFO(padapter); + PBT_TRAFFIC pBtTraffic = &pBTInfo->BtTraffic; + +#ifdef CONFIG_CONCURRENT_MODE + struct mlme_priv *pbuddy_mlmepriv; + PHAL_DATA_TYPE pBuddyHalData; + + if (padapter->pbuddy_adapter != NULL) + { + pbuddy_mlmepriv = &(padapter->pbuddy_adapter->mlmepriv); + pBuddyHalData = GET_HAL_DATA(padapter->pbuddy_adapter); + +#if 1 + if ((btdm_BtWifiAntNum(padapter) == Ant_x1) && ((BT_IsBtDisabled(padapter) == _TRUE) || ((BT_IsBtDisabled(padapter) == _FALSE && (BT_GetBtState(padapter) <= BT_INFO_STATE_CONNECT_IDLE))))) + { + if (((padapter->iface_type == IFACE_PORT0) && (check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE)) || + ((padapter->iface_type == IFACE_PORT1) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE))) + return _TRUE; + } +#endif + + if (pHalData->bt_coexist.halCoex8723.bBusyTrafficForCoex ||pBuddyHalData->bt_coexist.halCoex8723.bBusyTrafficForCoex || + pBtTraffic->Bt30TrafficStatistics.bTxBusyTraffic || + pBtTraffic->Bt30TrafficStatistics.bRxBusyTraffic) + return _TRUE; + else + return _FALSE; + } +#endif + + if (pHalData->bt_coexist.halCoex8723.bBusyTrafficForCoex || + pBtTraffic->Bt30TrafficStatistics.bTxBusyTraffic || + pBtTraffic->Bt30TrafficStatistics.bRxBusyTraffic) + return _TRUE; + else + return _FALSE; +} + +u8 BTDM_IsCoexistStateChanged(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.PreviousState == pHalData->bt_coexist.CurrentState) + return _FALSE; + else + return _TRUE; +} + +u8 BTDM_IsWifiUplink(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &(GetDefaultAdapter(padapter)->MgntInfo); + struct mlme_priv *pmlmepriv; + PBT30Info pBTInfo; + PBT_TRAFFIC pBtTraffic; + + + pmlmepriv = &padapter->mlmepriv; + pBTInfo = GET_BT_INFO(padapter); + pBtTraffic = &pBTInfo->BtTraffic; + + if ((pmlmepriv->LinkDetectInfo.bTxBusyTraffic) || + (pBtTraffic->Bt30TrafficStatistics.bTxBusyTraffic)) + return _TRUE; + else + return _FALSE; +} + +u8 BTDM_IsWifiDownlink(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &(GetDefaultAdapter(padapter)->MgntInfo); + struct mlme_priv *pmlmepriv; + PBT30Info pBTInfo; + PBT_TRAFFIC pBtTraffic; + + + pmlmepriv = &padapter->mlmepriv; + pBTInfo = GET_BT_INFO(padapter); + pBtTraffic = &pBTInfo->BtTraffic; + + if ((pmlmepriv->LinkDetectInfo.bRxBusyTraffic) || + (pBtTraffic->Bt30TrafficStatistics.bRxBusyTraffic)) + return _TRUE; + else + return _FALSE; +} + +u8 BTDM_IsBTHSMode(PADAPTER padapter) +{ +// PMGNT_INFO pMgntInfo = &(GetDefaultAdapter(padapter)->MgntInfo); + PHAL_DATA_TYPE pHalData; + PBT_MGNT pBtMgnt; + + + pHalData = GET_HAL_DATA(padapter); + pBtMgnt = &pHalData->BtInfo.BtMgnt; + + if (pBtMgnt->BtOperationOn) + return _TRUE; + else + return _FALSE; +} + +u8 BTDM_IsBTUplink(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.BT21TrafficStatistics.bTxBusyTraffic) + return _TRUE; + else + return _FALSE; +} + +u8 BTDM_IsBTDownlink(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.BT21TrafficStatistics.bRxBusyTraffic) + return _TRUE; + else + return _FALSE; +} + +void BTDM_AdjustForBtOperation(PADAPTER padapter) +{ + RTPRINT(FBT, BT_TRACE, ("[BT][DM], BTDM_AdjustForBtOperation()\n")); + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + BTDM_AdjustForBtOperation8723A(padapter); + } +} + +u8 BTDM_AdjustRssiForAgcTableOn(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!IS_HARDWARE_TYPE_8192D(padapter) && + !IS_HARDWARE_TYPE_8723A(padapter)) + return 0; + + if (pHalData->bt_coexist.b92DAgcTableOn) + return 12; + + if (pHalData->bt_coexist.b8723aAgcTableOn) + return 6; + + return 0; +} + +void BTDM_SetBtCoexCurrAntNum(PADAPTER padapter, u8 antNum) +{ + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_Set8723ABtCoexCurrAntNum(padapter, antNum); +} + +void BTDM_ForHalt(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + return; + } + + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + BTDM_ForHalt8723A(padapter); + GET_HAL_DATA(padapter)->bt_coexist.bInitlized = _FALSE; + } +} + +void BTDM_WifiScanNotify(PADAPTER padapter, u8 scanType) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + return; + } + + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_WifiScanNotify8723A(padapter, scanType); +} + +void BTDM_WifiAssociateNotify(PADAPTER padapter, u8 action) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + return; + } + + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_WifiAssociateNotify8723A(padapter, action); +} + +void BTDM_MediaStatusNotify(PADAPTER padapter, RT_MEDIA_STATUS mstatus) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + return; + } + + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_MediaStatusNotify8723A(padapter, mstatus); +} + +void BTDM_ForDhcp(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + return; + } + + if (IS_HARDWARE_TYPE_8723A(padapter)) + BTDM_ForDhcp8723A(padapter); +} + +void BTDM_ResetActionProfileState(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + pHalData->bt_coexist.CurrentState &= ~\ + (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_A2DP| + BT_COEX_STATE_PROFILE_PAN|BT_COEX_STATE_PROFILE_SCO); +} + +u8 BTDM_IsActionSCO(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_DBG pBtDbg; + u8 bRet; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtDbg = &pBTInfo->BtDbg; + bRet = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_SCO) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_SCO; + bRet = _TRUE; + } + } + else + { + if (pBtMgnt->ExtConfig.NumberOfSCO > 0) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_SCO; + bRet = _TRUE; + } + } + return bRet; +} + +u8 BTDM_IsActionHID(PADAPTER padapter) +{ + PBT30Info pBTInfo; + PHAL_DATA_TYPE pHalData; + PBT_MGNT pBtMgnt; + PBT_DBG pBtDbg; + u8 bRet; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtDbg = &pBTInfo->BtDbg; + bRet = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_HID) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_HID; + bRet = _TRUE; + } + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && pBtMgnt->ExtConfig.NumberOfHandle==1) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_HID; + bRet = _TRUE; + } + } + return bRet; +} + +u8 BTDM_IsActionA2DP(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_DBG pBtDbg; + u8 bRet; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtDbg = &pBTInfo->BtDbg; + bRet = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_A2DP) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_A2DP; + bRet = _TRUE; + } + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP) && pBtMgnt->ExtConfig.NumberOfHandle==1) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_A2DP; + bRet = _TRUE; + } + } + return bRet; +} + +u8 BTDM_IsActionPAN(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_DBG pBtDbg; + u8 bRet; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtDbg = &pBTInfo->BtDbg; + bRet = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_PAN) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_PAN; + bRet = _TRUE; + } + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && pBtMgnt->ExtConfig.NumberOfHandle==1) + { + pHalData->bt_coexist.CurrentState |= BT_COEX_STATE_PROFILE_PAN; + bRet = _TRUE; + } + } + return bRet; +} + +u8 BTDM_IsActionHIDA2DP(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_MGNT pBtMgnt; + PBT_DBG pBtDbg; + u8 bRet; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTInfo->BtMgnt; + pBtDbg = &pBTInfo->BtDbg; + bRet = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_HID_A2DP) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_A2DP); + bRet = _TRUE; + } + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_A2DP); + bRet = _TRUE; + } + } + return bRet; +} + +u8 BTDM_IsActionHIDPAN(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_DBG pBtDbg; + u8 bRet; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtDbg = &pBTInfo->BtDbg; + bRet = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_HID_PAN) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_PAN); + bRet = _TRUE; + } + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_HID) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN)) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_HID|BT_COEX_STATE_PROFILE_PAN); + bRet = _TRUE; + } + } + return bRet; +} + +u8 BTDM_IsActionPANA2DP(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PBT30Info pBTInfo; + PBT_DBG pBtDbg; + u8 bRet; + + + pHalData = GET_HAL_DATA(padapter); + pBTInfo = GET_BT_INFO(padapter); + pBtDbg = &pBTInfo->BtDbg; + bRet = _FALSE; + + if (pBtDbg->dbgCtrl == _TRUE ) + { + if (pBtDbg->dbgProfile == BT_DBG_PROFILE_PAN_A2DP) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_PAN|BT_COEX_STATE_PROFILE_A2DP); + bRet = _TRUE; + } + } + else + { + if (BTHCI_CheckProfileExist(padapter,BT_PROFILE_PAN) && BTHCI_CheckProfileExist(padapter,BT_PROFILE_A2DP)) + { + pHalData->bt_coexist.CurrentState |= (BT_COEX_STATE_PROFILE_PAN|BT_COEX_STATE_PROFILE_A2DP); + bRet = _TRUE; + } + } + return bRet; +} + +u8 BTDM_IsBtDisabled(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.bCurBtDisabled) + return _TRUE; + else + return _FALSE; +} + +sint BTDM_CheckFWState(PADAPTER padapter, sint state) +{ + if (check_fwstate(&padapter->mlmepriv, state) == _FALSE) + { +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->pbuddy_adapter != NULL) + { + if (check_fwstate(&padapter->pbuddy_adapter->mlmepriv, state) == _TRUE) + { + return _TRUE; + } + } +#endif + return _FALSE; + } + + return _TRUE; +} + +//============================================ +// Started with "WA_" means this is a work around function. +// Because fw need to count bt HW counters +//(BT_ACTIVE/BT_STATE/BT_POLLING) +// in beacon related interrupt, so we have to write beacon control +// register now. +//============================================ +void WA_BTDM_EnableBTFwCounterPolling(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + // Currently, only 88cu and 92de need to enter the function + if (!IS_HARDWARE_TYPE_8192CU(padapter) && + !IS_HARDWARE_TYPE_8192DE(padapter)) + return; + + if (!pHalData->bt_coexist.BluetoothCoexist) + { + return; + } + else + { + // + // Enable BT firmware counter statistics. + // We have to set 0x550[3]=1 to enable it. + // Advised by Scott. + // + u8 u1val = 0; + u1val = rtw_read8(padapter, REG_BCN_CTRL); + u1val |= BIT3; + rtw_write8(padapter, REG_BCN_CTRL, u1val); + } +} + +// ===== End of sync from SD7 driver HAL/BTCoexist/HalBtCoexist.c ===== +#endif + +#ifdef __HALBT_C__ // HAL/HalBT.c +// ===== Below this line is sync from SD7 driver HAL/HalBT.c ===== + +//================================================== +// local function +//================================================== +#if 0 +static void halbt_SetBTSwitchCtrl(PADAPTER padapter) +{ + // switch control, here we set pathA to control + // 0x878[13] = 1, 0:pathB, 1:pathA(default) + PHY_SetBBReg(padapter, rFPGA0_XAB_RFParameter, BIT(13), 0x1); + + // antsel control, here we use phy0 and enable antsel. + // 0x87c[16:15] = b'11, enable antsel, antsel output pin + // 0x87c[30] = 0, 0: phy0, 1:phy 1 + PHY_SetBBReg(padapter, rFPGA0_XCD_RFParameter, bMaskDWord, 0x1fff8); + + // antsel to Bt or Wifi, it depends Bt on/off. + // 0x860[9:8] = 'b10, b10:Bt On, WL2G off(default), b01:Bt off, WL2G on. + PHY_SetBBReg(padapter, rFPGA0_XA_RFInterfaceOE, BIT(9)|BIT(8), 0x2); + + // sw/hw control switch, here we set sw control + // 0x870[9:8] = 'b11 sw control, 'b00 hw control + PHY_SetBBReg(padapter, rFPGA0_XAB_RFInterfaceSW, BIT(9)|BIT(8), 0x3); +} +#endif + +static void halbt_InitHwConfig8723A(PADAPTER padapter) +{ +} + +//================================================== +// extern function +//================================================== +u8 HALBT_GetPGAntNum(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + return pHalData->bt_coexist.BT_Ant_Num; +} + +void HALBT_SetKey(PADAPTER padapter, u8 EntryNum) +{ + PBT30Info pBTinfo; + PBT_ASOC_ENTRY pBtAssocEntry; + u16 usConfig = 0; + + +// RT_TRACE(COMP_SEC , DBG_LOUD , (" ==> HALBT_SetKey\n")); + + pBTinfo = GET_BT_INFO(padapter); + pBtAssocEntry = &(pBTinfo->BtAsocEntry[EntryNum]); + + pBtAssocEntry->HwCAMIndex = BT_HWCAM_STAR + EntryNum; + + usConfig = CAM_VALID | (CAM_AES << 2); +// CAM_program_entry(padapter, pBtAssocEntry->HwCAMIndex, pBtAssocEntry->BTRemoteMACAddr, pBtAssocEntry->PTK + TKIP_ENC_KEY_POS, usConfig); + write_cam(padapter, pBtAssocEntry->HwCAMIndex, usConfig, pBtAssocEntry->BTRemoteMACAddr, pBtAssocEntry->PTK + TKIP_ENC_KEY_POS); +} + +void HALBT_RemoveKey(PADAPTER padapter, u8 EntryNum) +{ + PBT30Info pBTinfo; + PBT_ASOC_ENTRY pBtAssocEntry; + + +// RT_TRACE(COMP_SEC , DBG_LOUD , (" ==> HALBT_RemoveKey\n")); + + pBTinfo = GET_BT_INFO(padapter); + pBtAssocEntry = &(pBTinfo->BtAsocEntry[EntryNum]); + + if (pBTinfo->BtAsocEntry[EntryNum].HwCAMIndex != 0) + { + // ToDo : add New HALBT_RemoveKey function !! + if (pBtAssocEntry->HwCAMIndex >= BT_HWCAM_STAR && pBtAssocEntry->HwCAMIndex < HALF_CAM_ENTRY) + { +// CamDeleteOneEntry(padapter, pBtAssocEntry->BTRemoteMACAddr , pBtAssocEntry->HwCAMIndex); + CAM_empty_entry(padapter, pBtAssocEntry->HwCAMIndex); +// RT_TRACE(COMP_SEC , DBG_LOUD , (" BT_ResetEntry Remove Key Index : %d \n",pBtAssocEntry->HwCAMIndex)); + } + pBTinfo->BtAsocEntry[EntryNum].HwCAMIndex = 0; + } +} + +void HALBT_InitBTVars8723A(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + + + pHalData = GET_HAL_DATA(padapter); + + pHalData->bt_coexist.BluetoothCoexist = pHalData->EEPROMBluetoothCoexist; + pHalData->bt_coexist.BT_Ant_Num = pHalData->EEPROMBluetoothAntNum; + pHalData->bt_coexist.BT_CoexistType = pHalData->EEPROMBluetoothType; + pHalData->bt_coexist.BT_Ant_isolation = pHalData->EEPROMBluetoothAntIsolation; + pHalData->bt_coexist.BT_RadioSharedType = pHalData->EEPROMBluetoothRadioShared; + + RT_TRACE(_module_hal_init_c_, _drv_info_, ("BT Coexistance = 0x%x\n", pHalData->bt_coexist.BluetoothCoexist)); + if (pHalData->bt_coexist.BluetoothCoexist) + { + if (pHalData->bt_coexist.BT_Ant_Num == Ant_x2) + { + BTDM_SetBtCoexCurrAntNum(padapter, 2); + RT_TRACE(_module_hal_init_c_, _drv_info_,("BlueTooth BT_Ant_Num = Antx2\n")); +// DBG_871X("%s WiFi BT coexist Ant_Num = Antx2\n",__func__); + } + else if (pHalData->bt_coexist.BT_Ant_Num == Ant_x1) + { + BTDM_SetBtCoexCurrAntNum(padapter, 1); + RT_TRACE(_module_hal_init_c_, _drv_info_,("BlueTooth BT_Ant_Num = Antx1\n")); +// DBG_871X("%s WiFi BT coexist Ant_Num Ant_Num = Antx1\n",__func__); + } + pHalData->bt_coexist.bBTBusyTraffic = _FALSE; + pHalData->bt_coexist.bBTTrafficModeSet = _FALSE; + pHalData->bt_coexist.bBTNonTrafficModeSet = _FALSE; + pHalData->bt_coexist.CurrentState = 0; + pHalData->bt_coexist.PreviousState = 0; + + RT_TRACE(_module_hal_init_c_, _drv_info_,("BT_RadioSharedType = 0x%x\n", pHalData->bt_coexist.BT_RadioSharedType)); + } +} + +u8 HALBT_IsBTExist(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bt_coexist.BluetoothCoexist) + return _TRUE; + else + return _FALSE; +} + +u8 HALBT_BTChipType(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + return pHalData->bt_coexist.BT_CoexistType; +} + +void HALBT_InitHwConfig(PADAPTER padapter) +{ +#if 0 + if (IS_HARDWARE_TYPE_8192C(padapter)) + { + halbt_InitHwConfig92C(padapter); + } + else if (IS_HARDWARE_TYPE_8192D(padapter)) + { + halbt_InitHwConfig92D(padapter); + } + else if (IS_HARDWARE_TYPE_8723A(padapter)) +#endif + { + halbt_InitHwConfig8723A(padapter); + BTDM_Coexist(padapter); + } +} + +void HALBT_IPSRFOffCheck(PADAPTER padapter) +{ + PBT30Info pBTinfo; + PBT_MGNT pBtMgnt; + PHAL_DATA_TYPE pHalData; + + + pBTinfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTinfo->BtMgnt; + pHalData = GET_HAL_DATA(padapter); + + if (IS_HARDWARE_TYPE_8192C(padapter) || + IS_HARDWARE_TYPE_8192D(padapter) || + IS_HARDWARE_TYPE_8723A(padapter)) + { + if ((pHalData->bt_coexist.BluetoothCoexist) && + (pBtMgnt->bSupportProfile)) + { + RTPRINT(FBT, BT_TRACE, ("[BT][DM], HALBT_IPSRFOffCheck(), turn off all Coexist DM\n")); + BTDM_CoexAllOff(padapter); + } + } +} + +void HALBT_LPSRFOffCheck(PADAPTER padapter) +{ + PBT30Info pBTinfo; + PBT_MGNT pBtMgnt; + PHAL_DATA_TYPE pHalData; + + + pBTinfo = GET_BT_INFO(padapter); + pBtMgnt = &pBTinfo->BtMgnt; + pHalData = GET_HAL_DATA(padapter); + + if (IS_HARDWARE_TYPE_8192C(padapter) || + IS_HARDWARE_TYPE_8192D(padapter) || + IS_HARDWARE_TYPE_8723A(padapter)) + { + if ((pHalData->bt_coexist.BluetoothCoexist) && + (pBtMgnt->bSupportProfile)) + { + RTPRINT(FBT, BT_TRACE, ("[BT][DM], HALBT_LPSRFOffCheck(), turn off all Coexist DM\n")); + BTDM_CoexAllOff(padapter); + } + } +} + +void HALBT_SetRtsCtsNoLenLimit(PADAPTER padapter) +{ +#if (RTS_CTS_NO_LEN_LIMIT == 1) + rtw_write32(padapter, 0x4c8, 0xc140402); +#endif +} + +u8 HALBT_OnlySupport1T(PADAPTER padapter) +{ +#if 0 + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (IS_HARDWARE_TYPE_8192DE(padapter)) + { + if ((SINGLEMAC_SINGLEPHY == pHalData->MacPhyMode92D) && + (pHalData->bt_coexist.BluetoothCoexist) && + (pHalData->CurrentBandType92D==BAND_ON_2_4G) && + (!pHalData->bt_coexist.bCurBtDisabled)) + { + RTPRINT(FIOCTL, IOCTL_STATE, ("[92d], 1T condition!!\n")); + return _TRUE; + } + } + RTPRINT(FIOCTL, IOCTL_STATE, ("[92d], 2T condition!!\n")); +#endif + return _FALSE; +} + +u8 +HALBT_BtRegAccess( + PADAPTER padapter, + u32 accessType, + u32 regType, + u32 regOffset, + u32 wValue, + u32 *pRetVal + ) +{ + u8 H2C_Parameter[5] = {0}; + + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + *pRetVal = 0x223; + //FillH2CCmd(padapter, 0xaf, 5, H2C_Parameter); + } + else + { + *pRetVal = 0xffffffff; + return _FALSE; + } + + return _TRUE; +} + +void HALBT_SwitchWirelessMode(PADAPTER padapter, u8 targetWirelessMode) +{ +#if 0 + PMGNT_INFO pMgntInfo = &padapter->MgntInfo; + u8 band; + + if (!IS_HARDWARE_TYPE_8192D(padapter)) + return; + + RTPRINT(FIOCTL, IOCTL_STATE, ("switch to wireless mode = 0x%x!!\n", targetWirelessMode)); + pMgntInfo->dot11CurrentWirelessMode = targetWirelessMode; + pMgntInfo->SettingBeforeScan.WirelessMode = pMgntInfo->dot11CurrentWirelessMode;//For N solution won't be change the wireless mode in scan + padapter->HalFunc.SetWirelessModeHandler(padapter, pMgntInfo->dot11CurrentWirelessMode); + + if ((targetWirelessMode == WIRELESS_MODE_N_5G) || + (targetWirelessMode == WIRELESS_MODE_A)) + band = BAND_ON_5G; + else + band = BAND_ON_2_4G; + rtw_hal_set_hwreg(padapter, HW_VAR_DUAL_SWITCH_BAND, &band); + rtw_mdelay_os(50); +#endif +} + +// ===== End of sync from SD7 driver HAL/HalBT.c ===== +#endif + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_cmd.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_cmd.c new file mode 100755 index 000000000000..3125d6da1d0e --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_cmd.c @@ -0,0 +1,1185 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723A_CMD_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <recv_osdep.h> +#include <cmd_osdep.h> +#include <mlme_osdep.h> +#include <rtw_byteorder.h> +#include <circ_buf.h> +#include <rtw_ioctl_set.h> + +#include <rtl8723a_hal.h> + + +#define RTL92C_MAX_H2C_BOX_NUMS 4 +#define RTL92C_MAX_CMD_LEN 5 +#define MESSAGE_BOX_SIZE 4 +#define EX_MESSAGE_BOX_SIZE 2 + + +static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num) +{ + u8 read_down = _FALSE; + int retry_cnts = 100; + + u8 valid; + + //DBG_8192C(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); + + do{ + valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); + + if(0 == valid ){ + read_down = _TRUE; + } + }while( (!read_down) && (retry_cnts--)); + + return read_down; + +} + + +/***************************************** +* H2C Msg format : +*| 31 - 8 |7 | 6 - 0 | +*| h2c_msg |Ext_bit |CMD_ID | +* +******************************************/ +s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) +{ + u8 bcmd_down = _FALSE; + s32 retry_cnts = 100; + u8 h2c_box_num; + u32 msgbox_addr; + u32 msgbox_ex_addr; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u32 h2c_cmd = 0; + u16 h2c_cmd_ex = 0; + s32 ret = _FAIL; + +_func_enter_; + + padapter = GET_PRIMARY_ADAPTER(padapter); + pHalData = GET_HAL_DATA(padapter); + + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); + + if (!pCmdBuffer) { + goto exit; + } + if (CmdLen > RTL92C_MAX_CMD_LEN) { + goto exit; + } + if (padapter->bSurpriseRemoved == _TRUE) + goto exit; + + //pay attention to if race condition happened in H2C cmd setting. + do{ + h2c_box_num = pHalData->LastHMEBoxNum; + + if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){ + DBG_8192C(" fw read cmd failed...\n"); + goto exit; + } + + if(CmdLen<=3) + { + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); + } + else{ + _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer, EX_MESSAGE_BOX_SIZE); + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer+2,( CmdLen-EX_MESSAGE_BOX_SIZE)); + *(u8*)(&h2c_cmd) |= BIT(7); + } + + *(u8*)(&h2c_cmd) |= ElementID; + + if(h2c_cmd & BIT(7)){ + msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *EX_MESSAGE_BOX_SIZE); + h2c_cmd_ex = le16_to_cpu( h2c_cmd_ex ); + rtw_write16(padapter, msgbox_ex_addr, h2c_cmd_ex); + } + msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *MESSAGE_BOX_SIZE); + h2c_cmd = le32_to_cpu( h2c_cmd ); + rtw_write32(padapter,msgbox_addr, h2c_cmd); + + bcmd_down = _TRUE; + + //DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" + // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); + + pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL92C_MAX_H2C_BOX_NUMS; + + }while((!bcmd_down) && (retry_cnts--)); + + ret = _SUCCESS; + +exit: + + _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); + +_func_exit_; + + return ret; +} + +u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) +{ + u8 ElementID, CmdLen; + u8 *pCmdBuffer; + struct cmd_msg_parm *pcmdmsg; + + if(!pbuf) + return H2C_PARAMETERS_ERROR; + + pcmdmsg = (struct cmd_msg_parm*)pbuf; + ElementID = pcmdmsg->eid; + CmdLen = pcmdmsg->sz; + pCmdBuffer = pcmdmsg->buf; + + FillH2CCmd(padapter, ElementID, CmdLen, pCmdBuffer); + + return H2C_SUCCESS; +} + +#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) +u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) +{ + u8 res=_SUCCESS; + struct H2C_SS_RFOFF_PARAM param; + DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); + param.gpio_period = period;//Polling GPIO_11 period time + param.ROFOn = (_TRUE == bfwpoll)?1:0; + FillH2CCmd(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); + return res; +} +#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED + +u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param) +{ + u8 res=_SUCCESS; + +_func_enter_; + + *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); + + FillH2CCmd(padapter, RSSI_SETTING_EID, 3, param); + +_func_exit_; + + return res; +} + +u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg) +{ + u8 buf[5]; + u8 res=_SUCCESS; + +_func_enter_; + + _rtw_memset(buf, 0, 5); + mask = cpu_to_le32( mask ); + _rtw_memcpy(buf, &mask, 4); + buf[4] = arg; + + FillH2CCmd(padapter, MACID_CONFIG_EID, 5, buf); + +_func_exit_; + + return res; + +} + +//bitmap[0:27] = tx_rate_bitmap +//bitmap[28:31]= Rate Adaptive id +//arg[0:4] = macid +//arg[5] = Short GI +void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + u8 macid = arg&0x1f; + +#ifdef CONFIG_ODM_REFRESH_RAMASK + u8 raid = (bitmap>>28) & 0x0f; + bitmap &=0x0fffffff; + if(rssi_level != DM_RATR_STA_INIT) + bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level); + + bitmap |= ((raid<<28)&0xf0000000); +#endif //CONFIG_ODM_REFRESH_RAMASK + + + if(pHalData->fw_ractrl == _TRUE) + { + rtl8192c_set_raid_cmd(pAdapter, bitmap, arg); + } + else + { + u8 init_rate, shortGIrate=_FALSE; + + init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; + + + shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE; + + if (shortGIrate==_TRUE) + init_rate |= BIT(6); + + rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate); + } + +} + +void rtl8723a_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode) +{ + SETPWRMODE_PARM H2CSetPwrMode; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + +_func_enter_; + + H2CSetPwrMode.Mode = Mode; + H2CSetPwrMode.SmartPS = pwrpriv->smart_ps; + H2CSetPwrMode.AwakeInterval = 1; + H2CSetPwrMode.bAllQueueUAPSD = padapter->registrypriv.uapsd_enable; + + if(0 == Mode) + { + /* Leave LPS, set BcnAntMode to 0 */ + H2CSetPwrMode.BcnAntMode = 0; + } + else + { + H2CSetPwrMode.BcnAntMode = pwrpriv->bcn_ant_mode; + } + + DBG_871X("%s: Mode=%d SmartPS=%d UAPSD=%d BcnMode=0x%02x\n", __FUNCTION__, + H2CSetPwrMode.Mode, H2CSetPwrMode.SmartPS, H2CSetPwrMode.bAllQueueUAPSD, H2CSetPwrMode.BcnAntMode); + + FillH2CCmd(padapter, SET_PWRMODE_EID, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); + +_func_exit_; +} + + +void rtl8723a_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ) +{ + u8 opmode,macid; + u16 mst_rpt = cpu_to_le16 (mstatus_rpt); + u32 reg_macid_no_link = REG_MACID_NO_LINK; + opmode = (u8) mst_rpt; + macid = (u8)(mst_rpt >> 8) ; + DBG_871X("### %s: MStatus=%x MACID=%d \n", __FUNCTION__,opmode,macid); + + //Delete select macid (MACID 0~63) from queue list. + if(opmode == 1)// 1:connect + { + rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link) & (~BIT(macid)))); + } + else//0: disconnect + { + rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link)|BIT(macid))); + } +} + + +void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 rate_len, pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); + //pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_BEACON); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); + + //timestamp will be inserted by hardware + pframe += 8; + pktlen += 8; + + // beacon interval: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + // capability info: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + { + //DBG_871X("ie len=%d\n", cur_network->IELength); + pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); + _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); + + goto _ConstructBeacon; + } + + //below for ad-hoc mode + + // SSID + pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); + + // supported rates... + rate_len = rtw_get_rateset_len(cur_network->SupportedRates); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); + + // DS parameter set + pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); + + if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) + { + u32 ATIMWindow; + // IBSS Parameter Set... + //ATIMWindow = cur->Configuration.ATIMWindow; + ATIMWindow = 0; + pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); + } + + + //todo: ERP IE + + + // EXTERNDED SUPPORTED RATE + if (rate_len > 8) + { + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); + } + + + //todo:HT for adhoc + +_ConstructBeacon: + + if ((pktlen + TXDESC_SIZE) > 512) + { + DBG_871X("beacon frame too large\n"); + return; + } + + *pLength = pktlen; + + //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); + +} + +void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + // Frame control. + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + SetPwrMgt(fctrl); + SetFrameSubType(pframe, WIFI_PSPOLL); + + // AID. + SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); + + // BSSID. + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + // TA. + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + + *pLength = 16; +} + +void ConstructNullFunctionData( + PADAPTER padapter, + u8 *pframe, + u32 *pLength, + u8 *StaAddr, + u8 bQoS, + u8 AC, + u8 bEosp, + u8 bForcePowerSave) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + + //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); + + pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; + + fctrl = &pwlanhdr->frame_ctl; + *(fctrl) = 0; + if (bForcePowerSave) + { + SetPwrMgt(fctrl); + } + + switch(cur_network->network.InfrastructureMode) + { + case Ndis802_11Infrastructure: + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); + break; + case Ndis802_11APMode: + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); + break; + case Ndis802_11IBSS: + default: + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + break; + } + + SetSeqNum(pwlanhdr, 0); + + if (bQoS == _TRUE) { + struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; + + SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); + + pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos*)pframe; + SetPriority(&pwlanqoshdr->qc, AC); + SetEOSP(&pwlanqoshdr->qc, bEosp); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); + } else { + SetFrameSubType(pframe, WIFI_DATA_NULL); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + } + + *pLength = pktlen; +} + +void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u8 *mac, *bssid; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + mac = myid(&(padapter->eeprompriv)); + bssid = cur_network->MacAddress; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); + SetFrameSubType(fctrl, WIFI_PROBERSP); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + pframe += pktlen; + + if(cur_network->IELength>MAX_IE_SZ) + return; + + _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); + pframe += cur_network->IELength; + pktlen += cur_network->IELength; + + *pLength = pktlen; +} + +// To check if reserved page content is destroyed by beacon beacuse beacon is too large. +// 2010.06.23. Added by tynli. +VOID +CheckFwRsvdPageContent( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); + u32 MaxBcnPageNum; + + if(pHalData->FwRsvdPageStartOffset != 0) + { + /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); + RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), + ("CheckFwRsvdPageContent(): The reserved page content has been"\ + "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", + MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ + } +} + +// +// Description: Fill the reserved packets that FW will use to RSVD page. +// Now we just send 4 types packet to rsvd page. +// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. +// Input: +// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, +// so we need to set the packet length to total lengh. +// TRUE: At the second time, we should send the first packet (default:beacon) +// to Hw again and set the lengh in descriptor to the real beacon lengh. +// 2009.10.15 by tynli. +static void SetFwRsvdPagePkt(PADAPTER padapter, BOOLEAN bDLFinished) +{ + PHAL_DATA_TYPE pHalData; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct xmit_priv *pxmitpriv; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + u32 BeaconLength, ProbeRspLength, PSPollLength; + u32 NullDataLength, QosNullLength, BTQosNullLength; + u8 *ReservedPagePacket; + u8 PageNum, PageNeed, TxDescLen; + u16 BufIndex; + u32 TotalPacketLen; + RSVDPAGE_LOC RsvdPageLoc; + + + DBG_871X("%s\n", __FUNCTION__); + + ReservedPagePacket = (u8*)rtw_zmalloc(1000); + if (ReservedPagePacket == NULL) { + DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); + return; + } + + pHalData = GET_HAL_DATA(padapter); + pxmitpriv = &padapter->xmitpriv; + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; + + TxDescLen = TXDESC_SIZE; + PageNum = 0; + + //3 (1) beacon + BufIndex = TXDESC_OFFSET; + ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); + + // When we count the first page size, we need to reserve description size for the RSVD + // packet, it will be filled in front of the packet in TXPKTBUF. + PageNeed = (u8)PageNum_128(TxDescLen + BeaconLength); + // To reserved 2 pages for beacon buffer. 2010.06.24. + if (PageNeed == 1) + PageNeed += 1; + PageNum += PageNeed; + pHalData->FwRsvdPageStartOffset = PageNum; + + BufIndex += PageNeed*128; + + //3 (2) ps-poll + RsvdPageLoc.LocPsPoll = PageNum; + ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3 (3) null data + RsvdPageLoc.LocNullData = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &NullDataLength, + get_my_bssid(&pmlmeinfo->network), + _FALSE, 0, 0, _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3 (4) probe response + RsvdPageLoc.LocProbeRsp = PageNum; + ConstructProbeRsp( + padapter, + &ReservedPagePacket[BufIndex], + &ProbeRspLength, + get_my_bssid(&pmlmeinfo->network), + _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3 (5) Qos null data + RsvdPageLoc.LocQosNull = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &QosNullLength, + get_my_bssid(&pmlmeinfo->network), + _TRUE, 0, 0, _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3 (6) BT Qos null data + RsvdPageLoc.LocBTQosNull = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &BTQosNullLength, + get_my_bssid(&pmlmeinfo->network), + _TRUE, 0, 0, _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], BTQosNullLength, _FALSE, _TRUE); + + TotalPacketLen = BufIndex + BTQosNullLength; + + pmgntframe = alloc_mgtxmitframe(pxmitpriv); + if (pmgntframe == NULL) + goto exit; + + // update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + pattrib->qsel = 0x10; + pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET; + _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); + + rtw_hal_mgnt_xmit(padapter, pmgntframe); + + DBG_871X("%s: Set RSVD page location to Fw\n", __FUNCTION__); + FillH2CCmd(padapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8*)&RsvdPageLoc); + +exit: + rtw_mfree(ReservedPagePacket, 1000); +} + +void rtl8723a_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) +{ + JOINBSSRPT_PARM JoinBssRptParm; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +_func_enter_; + + DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); + + if(mstatus == 1) + { + BOOLEAN bRecover = _FALSE; + u8 v8; + + // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. + // Suggested by filen. Added by tynli. + rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); + // Do not set TSF again here or vWiFi beacon DMA INT will not work. + //correct_TSF(padapter, pmlmeext); + // Hw sequende enable by dedault. 2010.06.23. by tynli. + //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); + //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); + + // set REG_CR bit 8 + v8 = rtw_read8(padapter, REG_CR+1); + v8 |= BIT(0); // ENSWBCN + rtw_write8(padapter, REG_CR+1, v8); + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. +// SetBcnCtrlReg(padapter, 0, BIT(3)); +// SetBcnCtrlReg(padapter, BIT(4), 0); + SetBcnCtrlReg(padapter, BIT(4), BIT(3)); + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + if (pHalData->RegFwHwTxQCtrl & BIT(6)) + bRecover = _TRUE; + + // To tell Hw the packet is not a real beacon frame. + //U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6)); + pHalData->RegFwHwTxQCtrl &= ~BIT(6); + SetFwRsvdPagePkt(padapter, 0); + + // 2010.05.11. Added by tynli. +// SetBcnCtrlReg(padapter, BIT3, 0); +// SetBcnCtrlReg(padapter, 0, BIT4); + SetBcnCtrlReg(padapter, BIT(3), BIT(4)); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if(bRecover) + { + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl | BIT(6)); + pHalData->RegFwHwTxQCtrl |= BIT(6); + } + + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. + v8 = rtw_read8(padapter, REG_CR+1); + v8 &= ~BIT(0); // ~ENSWBCN + rtw_write8(padapter, REG_CR+1, v8); + } + + JoinBssRptParm.OpMode = mstatus; + + FillH2CCmd(padapter, JOINBSS_RPT_EID, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); + +_func_exit_; +} + +#ifdef CONFIG_BT_COEXIST +static void SetFwRsvdPagePkt_BTCoex(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct xmit_priv *pxmitpriv; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + u8 fakemac[6]={0x00,0xe0,0x4c,0x00,0x00,0x00}; + u32 BeaconLength, ProbeRspLength, PSPollLength; + u32 NullDataLength, QosNullLength, BTQosNullLength; + u8 *ReservedPagePacket; + u8 PageNum, PageNeed, TxDescLen; + u16 BufIndex; + u32 TotalPacketLen; + RSVDPAGE_LOC RsvdPageLoc; + + + DBG_871X("+%s\n", __FUNCTION__); + + ReservedPagePacket = (u8*)rtw_zmalloc(1024); + if (ReservedPagePacket == NULL) { + DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); + return; + } + + pHalData = GET_HAL_DATA(padapter); + pxmitpriv = &padapter->xmitpriv; + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; + + TxDescLen = TXDESC_SIZE; + PageNum = 0; + + //3 (1) beacon + BufIndex = TXDESC_OFFSET; +#if 0 + ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); + + // When we count the first page size, we need to reserve description size for the RSVD + // packet, it will be filled in front of the packet in TXPKTBUF. + PageNeed = (u8)PageNum_128(TxDescLen + BeaconLength); + // To reserved 2 pages for beacon buffer. 2010.06.24. + if (PageNeed == 1) + PageNeed += 1; +#else + // skip Beacon Packet + PageNeed = 3; +#endif + + PageNum += PageNeed; + pHalData->FwRsvdPageStartOffset = PageNum; + + BufIndex += PageNeed*128; + + //3 (2) ps-poll +#if 0 // skip + RsvdPageLoc.LocPsPoll = PageNum; + ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; +#endif + + //3 (3) null data + RsvdPageLoc.LocNullData = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &NullDataLength, + fakemac, + _FALSE, 0, 0, _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3 (4) probe response +#if 0 // skip + RsvdPageLoc.LocProbeRsp = PageNum; + ConstructProbeRsp( + padapter, + &ReservedPagePacket[BufIndex], + &ProbeRspLength, + get_my_bssid(&pmlmeinfo->network), + _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; +#endif + + //3 (5) Qos null data +#if 0 // skip + RsvdPageLoc.LocQosNull = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &QosNullLength, + get_my_bssid(&pmlmeinfo->network), + _TRUE, 0, 0, _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; +#endif + + //3 (6) BT Qos null data + RsvdPageLoc.LocBTQosNull = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &BTQosNullLength, + fakemac, + _TRUE, 0, 0, _FALSE); + rtl8723a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], BTQosNullLength, _FALSE, _TRUE); + + TotalPacketLen = BufIndex + BTQosNullLength; + + pmgntframe = alloc_mgtxmitframe(pxmitpriv); + if (pmgntframe == NULL) + goto exit; + + // update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + pattrib->qsel = 0x10; + pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET; + _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); + + rtw_hal_mgnt_xmit(padapter, pmgntframe); + + DBG_8192C("%s: Set RSVD page location to Fw\n", __FUNCTION__); + FillH2CCmd(padapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8*)&RsvdPageLoc); + +exit: + rtw_mfree(ReservedPagePacket, 1024); +} + +void rtl8723a_set_BTCoex_AP_mode_FwRsvdPkt_cmd(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u8 bRecover = _FALSE; + + + DBG_8192C("+%s\n", __FUNCTION__); + + pHalData = GET_HAL_DATA(padapter); + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + if (pHalData->RegFwHwTxQCtrl & BIT(6)) + bRecover = _TRUE; + + // To tell Hw the packet is not a real beacon frame. + pHalData->RegFwHwTxQCtrl &= ~BIT(6); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl); + SetFwRsvdPagePkt_BTCoex(padapter); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if (bRecover) + { + pHalData->RegFwHwTxQCtrl |= BIT(6); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl); + } +} +#endif + +#ifdef CONFIG_P2P_PS +void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); + struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; + u8 i; + +_func_enter_; + + switch(p2p_ps_state) + { + case P2P_PS_DISABLE: + DBG_8192C("P2P_PS_DISABLE \n"); + _rtw_memset(p2p_ps_offload, 0 ,1); + break; + case P2P_PS_ENABLE: + DBG_8192C("P2P_PS_ENABLE \n"); + // update CTWindow value. + if( pwdinfo->ctwindow > 0 ) + { + p2p_ps_offload->CTWindow_En = 1; + rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); + } + + // hw only support 2 set of NoA + for( i=0 ; i<pwdinfo->noa_num ; i++) + { + // To control the register setting for which NOA + rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); + if(i == 0) + p2p_ps_offload->NoA0_En = 1; + else + p2p_ps_offload->NoA1_En = 1; + + // config P2P NoA Descriptor Register + //DBG_8192C("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); + rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); + + //DBG_8192C("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); + rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); + + //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); + rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); + + //DBG_8192C("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); + rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); + } + + if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) + { + // rst p2p circuit + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); + + p2p_ps_offload->Offload_En = 1; + + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + p2p_ps_offload->role= 1; + p2p_ps_offload->AllStaSleep = 0; + } + else + { + p2p_ps_offload->role= 0; + } + + p2p_ps_offload->discovery = 0; + } + break; + case P2P_PS_SCAN: + DBG_8192C("P2P_PS_SCAN \n"); + p2p_ps_offload->discovery = 1; + break; + case P2P_PS_SCAN_DONE: + DBG_8192C("P2P_PS_SCAN_DONE \n"); + p2p_ps_offload->discovery = 0; + pwdinfo->p2p_ps_state = P2P_PS_ENABLE; + break; + default: + break; + } + + FillH2CCmd(padapter, P2P_PS_OFFLOAD_EID, 1, (u8 *)p2p_ps_offload); + +_func_exit_; + +} +#endif //CONFIG_P2P_PS + +#ifdef CONFIG_IOL +#include <rtw_iol.h> +#ifdef CONFIG_USB_HCI +#include <usb_ops.h> +#endif +int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) +{ + IO_OFFLOAD_LOC IoOffloadLoc; + u32 start_time = rtw_get_current_time(); + u32 passing_time_ms; + u8 polling_ret; + int ret = _FAIL; + + if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) + goto exit; +#ifdef CONFIG_USB_HCI + { + struct pkt_attrib *pattrib = &xmit_frame->attrib; + if(rtw_usb_bulk_size_boundary(adapter,TXDESC_SIZE+pattrib->last_txcmdsz)) + { + if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) + goto exit; + } + } +#endif //CONFIG_USB_HCI + + + dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms); + + IoOffloadLoc.LocCmd = 0; + if(_SUCCESS != FillH2CCmd(adapter, H2C_92C_IO_OFFLOAD, sizeof(IO_OFFLOAD_LOC), (u8 *)&IoOffloadLoc)) + goto exit; + + //polling if the IO offloading is done + while( (passing_time_ms=rtw_get_passing_time_ms(start_time)) <= max_wating_ms) { + #if 0 //C2H + if(0xff == rtw_read8(adapter, REG_C2HEVT_CLEAR)) + break; + #else// 0x1c3 + if(0x00 != (polling_ret=rtw_read8(adapter, 0x1c3))) + break; + #endif + rtw_msleep_os(5); + } + #if 0 //debug + DBG_871X("IOL %s, polling_ret:0x%02x, 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" + , polling_ret==0xff?"success":"error" + , polling_ret + , rtw_read32(adapter, 0x1c0) + , rtw_read32(adapter, 0x1c4) + , rtw_read32(adapter, 0x1cc) + , rtw_read32(adapter, 0x1e8) + , rtw_read32(adapter, 0x130) + , rtw_read32(adapter, 0x134) + ); + rtw_write32(adapter, 0x1c0, 0x0); + #endif + + if(polling_ret == 0xff) + ret =_SUCCESS; + else { + DBG_871X("IOL %s, polling_ret:0x%02x\n" + //", 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" + , polling_ret==0xff?"success":"error" + , polling_ret + //, rtw_read32(adapter, 0x1c0) + //, rtw_read32(adapter, 0x1c4) + //, rtw_read32(adapter, 0x1cc) + //, rtw_read32(adapter, 0x1e8) + //, rtw_read32(adapter, 0x130) + //, rtw_read32(adapter, 0x134) + ); + #if 0 //debug + rtw_write16(adapter, 0x1c4, 0x0000); + rtw_msleep_os(10); + DBG_871X("after reset, 0x1c4=0x%08x\n", rtw_read32(adapter, 0x1c4)); + #endif + + } + + { + #if 0 //C2H + u32 c2h_evt; + int i; + c2h_evt = rtw_read32(adapter, REG_C2HEVT_MSG_NORMAL); + DBG_871X("%s io-offloading complete, in %ums: 0x%08x\n", __FUNCTION__, passing_time_ms, c2h_evt); + rtw_write8(adapter, REG_C2HEVT_CLEAR, 0x0); + #else// 0x1c3 + //DBG_871X("%s IOF complete in %ums\n", __FUNCTION__, passing_time_ms); + rtw_write8(adapter, 0x1c3, 0x0); + #endif + } + +exit: + return ret; + +} +#endif //CONFIG_IOL + +#ifdef CONFIG_TSF_RESET_OFFLOAD +/* + ask FW to Reset sync register at Beacon early interrupt +*/ +u8 rtl8723c_reset_tsf(_adapter *padapter, u8 reset_port ) +{ + u8 buf[2]; + u8 res=_SUCCESS; + +_func_enter_; + if (IFACE_PORT0==reset_port) { + buf[0] = 0x1; buf[1] = 0; + + } else{ + buf[0] = 0x0; buf[1] = 0x1; + } + FillH2CCmd(padapter, H2C_RESET_TSF, 2, buf); +_func_exit_; + + return res; +} +#endif // CONFIG_TSF_RESET_OFFLOAD + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_dm.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_dm.c new file mode 100755 index 000000000000..84062c161655 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_dm.c @@ -0,0 +1,597 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +//============================================================ +// Description: +// +// This file is for 92CE/92CU dynamic mechanism only +// +// +//============================================================ +#define _RTL8723A_DM_C_ + +//============================================================ +// include files +//============================================================ +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <rtw_byteorder.h> + +#include <rtl8723a_hal.h> + +//============================================================ +// Global var +//============================================================ + + +static VOID +dm_CheckProtection( + IN PADAPTER Adapter + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u1Byte CurRate, RateThreshold; + + if(pMgntInfo->pHTInfo->bCurBW40MHz) + RateThreshold = MGN_MCS1; + else + RateThreshold = MGN_MCS3; + + if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) + { + pMgntInfo->bDmDisableProtect = TRUE; + DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } + else + { + pMgntInfo->bDmDisableProtect = FALSE; + DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } +#endif +} + +static VOID +dm_CheckStatistics( + IN PADAPTER Adapter + ) +{ +#if 0 + if(!Adapter->MgntInfo.bMediaConnect) + return; + + //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. + rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); + + // Calculate current Tx Rate(Successful transmited!!) + + // Calculate current Rx Rate(Successful received!!) + + //for tx tx retry count + rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); +#endif +} + +static void dm_CheckPbcGPIO(_adapter *padapter) +{ + u8 tmp1byte; + u8 bPbcPressed = _FALSE; + + if(!padapter->registrypriv.hw_wps_pbc) + return; + +#ifdef CONFIG_USB_HCI + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode + + tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level + + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode + + tmp1byte =rtw_read8(padapter, GPIO_IN); + + if (tmp1byte == 0xff) + return ; + + if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) + { + bPbcPressed = _TRUE; + } +#else + tmp1byte = rtw_read8(padapter, GPIO_IN); + //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); + + if (tmp1byte == 0xff || padapter->init_adpt_in_progress) + return ; + + if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0) + { + bPbcPressed = _TRUE; + } +#endif + + if( _TRUE == bPbcPressed) + { + // Here we only set bPbcPressed to true + // After trigger PBC, the variable will be set to false + DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); + +#ifdef RTK_DMP_PLATFORM +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) + kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); +#else + kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); +#endif +#else + + if ( padapter->pid[0] == 0 ) + { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. + return; + } + +#ifdef PLATFORM_LINUX + rtw_signal_process(padapter->pid[0], SIGUSR1); +#endif +#endif + } +} + +#ifdef CONFIG_PCI_HCI +// +// Description: +// Perform interrupt migration dynamically to reduce CPU utilization. +// +// Assumption: +// 1. Do not enable migration under WIFI test. +// +// Created by Roger, 2010.03.05. +// +VOID +dm_InterruptMigration( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bCurrentIntMt, bCurrentACIntDisable; + BOOLEAN IntMtToSet = _FALSE; + BOOLEAN ACIntToSet = _FALSE; + + + // Retrieve current interrupt migration and Tx four ACs IMR settings first. + bCurrentIntMt = pHalData->bInterruptMigration; + bCurrentACIntDisable = pHalData->bDisableTxInt; + + // + // <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics + // when interrupt migration is set before. 2010.03.05. + // + if(!Adapter->registrypriv.wifi_spec && + (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && + pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) + { + IntMtToSet = _TRUE; + + // To check whether we should disable Tx interrupt or not. + if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) + ACIntToSet = _TRUE; + } + + //Update current settings. + if( bCurrentIntMt != IntMtToSet ){ + DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); + if(IntMtToSet) + { + // + // <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter. + // timer 25ns*0xfa0=100us for 0xf packets. + // 2010.03.05. + // + rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx + pHalData->bInterruptMigration = IntMtToSet; + } + else + { + // Reset all interrupt migration settings. + rtw_write32(Adapter, REG_INT_MIG, 0); + pHalData->bInterruptMigration = IntMtToSet; + } + } + + /*if( bCurrentACIntDisable != ACIntToSet ){ + DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); + if(ACIntToSet) // Disable four ACs interrupts. + { + // + // <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. + // When extremely highly Rx OK occurs, we will disable Tx interrupts. + // 2010.03.05. + // + UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); + pHalData->bDisableTxInt = ACIntToSet; + } + else// Enable four ACs interrupts. + { + UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); + pHalData->bDisableTxInt = ACIntToSet; + } + }*/ + +} + +#endif + +// +// Initialize GPIO setting registers +// +static void +dm_InitGPIOSetting( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + u8 tmp1byte; + + tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); + tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); + + rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); +} +//============================================================ +// functions +//============================================================ +static void Init_ODM_ComInfo_8723a(PADAPTER Adapter) +{ + + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + u8 cut_ver,fab_ver; + + // + // Init Value + // + _rtw_memset(pDM_Odm,0,sizeof(pDM_Odm)); + + pDM_Odm->Adapter = Adapter; + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE); + if(Adapter->interface_type == RTW_GSPI ) + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO); + else + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE + + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8723A); + + + if(IS_8723A_A_CUT(pHalData->VersionID)) + { + fab_ver = ODM_UMC; + cut_ver = ODM_CUT_A; + } + else if(IS_8723A_B_CUT(pHalData->VersionID)) + { + fab_ver = ODM_UMC; + cut_ver = ODM_CUT_B; + } + else + { + fab_ver = ODM_TSMC; + cut_ver = ODM_CUT_A; + } + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID)); + +#ifdef CONFIG_USB_HCI + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType); + + if(pHalData->BoardType == BOARD_USB_High_PA){ + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE); + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE); + } +#endif + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID); + // ODM_CMNINFO_BINHCT_TEST only for MP Team + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec); + + + if(pHalData->rf_type == RF_1T1R){ + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R); + } + else if(pHalData->rf_type == RF_2T2R){ + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R); + } + else if(pHalData->rf_type == RF_1T2R){ + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R); + } +} +static void Update_ODM_ComInfo_8723a(PADAPTER Adapter) +{ + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + int i; + + pdmpriv->InitODMFlag = 0 + | ODM_BB_DIG +#ifdef CONFIG_ODM_REFRESH_RAMASK + | ODM_BB_RA_MASK +#endif + | ODM_BB_DYNAMIC_TXPWR + | ODM_BB_FA_CNT + | ODM_BB_RSSI_MONITOR + | ODM_BB_CCK_PD + | ODM_BB_PWR_SAVE + | ODM_MAC_EDCA_TURBO + | ODM_RF_TX_PWR_TRACK + | ODM_RF_CALIBRATION +#ifdef CONFIG_ODM_ADAPTIVITY + | ODM_BB_ADAPTIVITY +#endif + ; + +#ifdef CONFIG_ANTENNA_DIVERSITY + if(pHalData->AntDivCfg) + pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; +#endif + +#if (MP_DRIVER==1) + if (Adapter->registrypriv.mp_mode == 1) { + pdmpriv->InitODMFlag = 0 + | ODM_RF_CALIBRATION + | ODM_RF_TX_PWR_TRACK + ; + } +#endif//(MP_DRIVER==1) + +#ifdef CONFIG_DISABLE_ODM + pdmpriv->InitODMFlag = 0; +#endif//CONFIG_DISABLE_ODM + + // + // Pointer reference + // + //ODM_CMNINFO_MAC_PHY_MODE pHalData->MacPhyMode92D + // ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_MAC_PHY_MODE,&(pDM_Odm->u1Byte_temp)); + + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); + + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_TX_UNI,&(Adapter->xmitpriv.tx_bytes)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_RX_UNI,&(Adapter->recvpriv.rx_bytes)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_WM_MODE,&(pmlmeext->cur_wireless_mode)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SEC_CHNL_OFFSET,&(pHalData->nCur40MhzPrimeSC)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SEC_MODE,&(Adapter->securitypriv.dot11PrivacyAlgrthm)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BW,&(pHalData->CurrentChannelBW )); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_CHNL,&( pHalData->CurrentChannel)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_NET_CLOSED,&( Adapter->net_closed)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_MP_MODE,&(Adapter->registrypriv.mp_mode)); + + //================= only for 8192D ================= + /* + //pHalData->CurrentBandType92D + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BAND,&(pDM_Odm->u1Byte_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_GET_VALUE,&(pDM_Odm->u1Byte_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BUDDY_ADAPTOR,&(pDM_Odm->PADAPTER_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_IS_MASTER,&(pDM_Odm->u1Byte_temp)); + //================= only for 8192D ================= + // driver havn't those variable now + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_OPERATION,&(pDM_Odm->u1Byte_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_DISABLE_EDCA,&(pDM_Odm->u1Byte_temp)); + */ + + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SCAN,&(pmlmepriv->bScanInProcess)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_POWER_SAVING,&(pwrctrlpriv->bpower_saving)); + + + for(i=0; i< NUM_STA; i++) + { + //pDM_Odm->pODM_StaInfo[i] = NULL; + ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS,i,NULL); + } +} + +void +rtl8723a_InitHalDm( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + + u8 i; + + pdmpriv->DM_Type = DM_Type_ByDriver; + pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; + +#ifdef CONFIG_BT_COEXIST + pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; +// btdm_InitBtCoexistDM(Adapter); // Move to BT_CoexistMechanism() +#endif + pdmpriv->InitDMFlag = pdmpriv->DMFlag; + + Update_ODM_ComInfo_8723a(Adapter); + ODM_DMInit(pDM_Odm); + // Save REG_INIDATA_RATE_SEL value for TXDESC. + for(i = 0 ; i<32 ; i++) + { + pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f; + } + +} + +VOID +rtl8723a_HalDmWatchDog( + IN PADAPTER Adapter + ) +{ + BOOLEAN bFwCurrentInPSMode = _FALSE; + BOOLEAN bFwPSAwake = _TRUE; + u8 hw_init_completed = _FALSE; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; +#ifdef CONFIG_CONCURRENT_MODE + PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; +#endif //CONFIG_CONCURRENT_MODE + + hw_init_completed = Adapter->hw_init_completed; + +#if (MP_DRIVER == 1) +if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm ==0) + return; +#endif + + if (hw_init_completed == _FALSE) + goto skip_dm; + +#ifdef CONFIG_LPS + bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; + rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); +#endif + +#ifdef CONFIG_P2P_PS + // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. + // modifed by thomas. 2011.06.11. + if(Adapter->wdinfo.p2p_ps_mode) + bFwPSAwake = _FALSE; +#endif //CONFIG_P2P_PS + + if( (hw_init_completed == _TRUE) + && ((!bFwCurrentInPSMode) && bFwPSAwake)) + { + // + // Calculate Tx/Rx statistics. + // + dm_CheckStatistics(Adapter); + + +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->adapter_type > PRIMARY_ADAPTER) + goto _record_initrate; +#endif + + // + // Dynamically switch RTS/CTS protection. + // + //dm_CheckProtection(Adapter); + +#ifdef CONFIG_PCI_HCI + // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. + // Tx Migration settings. + //dm_InterruptMigration(Adapter); + + //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) + // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); +#endif +_record_initrate: + + // Read REG_INIDATA_RATE_SEL value for TXDESC. + if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) + { + pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f; + } + else + { + u8 i; + for(i=1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++) + { + pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f; + } + } + } + + + //ODM + if (hw_init_completed == _TRUE) + { + u8 bLinked=_FALSE; + u8 bsta_state=_FALSE; + + #ifdef CONFIG_DISABLE_ODM + pHalData->odmpriv.SupportAbility = 0; + #endif + + if(rtw_linked_check(Adapter)) + bLinked = _TRUE; + +#ifdef CONFIG_CONCURRENT_MODE + if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) + bLinked = _TRUE; +#endif //CONFIG_CONCURRENT_MODE + + ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); + + if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) + bsta_state = _TRUE; +#ifdef CONFIG_CONCURRENT_MODE + if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE)) + bsta_state = _TRUE; +#endif //CONFIG_CONCURRENT_MODE + ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state); + + + ODM_DMWatchdog(&pHalData->odmpriv); + + } + +skip_dm: + + // Check GPIO to determine current RF on/off and Pbc status. + // Check Hardware Radio ON/OFF or not +#ifdef CONFIG_PCI_HCI + if(pHalData->bGpioHwWpsPbc) +#endif + { + dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11 + } + +} + +void rtl8723a_init_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T podmpriv = &pHalData->odmpriv; + _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); + Init_ODM_ComInfo_8723a(Adapter); +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + //_init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , odm_SW_AntennaSwitchCallback, Adapter); + ODM_InitAllTimers(podmpriv ); +#endif +} + +void rtl8723a_deinit_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T podmpriv = &pHalData->odmpriv; +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + //_cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); + ODM_CancelAllTimers(podmpriv); +#endif +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_hal_init.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_hal_init.c new file mode 100755 index 000000000000..f5d3716cd140 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_hal_init.c @@ -0,0 +1,5743 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _HAL_INIT_C_ + +#include <drv_types.h> +#include <rtw_byteorder.h> +#include <rtw_efuse.h> + +#include <rtl8723a_hal.h> +#include "rtw_bt_mp.h" + + +static VOID +_FWDownloadEnable( + IN PADAPTER padapter, + IN BOOLEAN enable + ) +{ + u8 tmp; + + if(enable) + { + // MCU firmware download enable. + tmp = rtw_read8(padapter, REG_MCUFWDL); + rtw_write8(padapter, REG_MCUFWDL, tmp|0x01); + + // 8051 reset + tmp = rtw_read8(padapter, REG_MCUFWDL+2); + rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7); + } + else + { + // MCU firmware download disable. + tmp = rtw_read8(padapter, REG_MCUFWDL); + rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe); + + // Reserved for fw extension. + rtw_write8(padapter, REG_MCUFWDL+1, 0x00); + } +} + +static int +_BlockWrite( + IN PADAPTER padapter, + IN PVOID buffer, + IN u32 buffSize + ) +{ + int ret = _SUCCESS; + u32 blockSize_p1 = 4; // (Default) Phase #1 : PCI muse use 4-byte write to download FW + u32 blockSize_p2 = 8; // Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. + u32 blockSize_p3 = 1; // Phase #3 : Use 1-byte, the remnant of FW image. + u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; + u32 remainSize_p1 = 0, remainSize_p2 = 0; + u8 *bufferPtr = (u8*)buffer; + u32 i=0, offset=0; + +#ifdef CONFIG_USB_HCI + blockSize_p1 = 254; +#endif + + //3 Phase #1 + blockCount_p1 = buffSize / blockSize_p1; + remainSize_p1 = buffSize % blockSize_p1; + + if (blockCount_p1) { + RT_TRACE(_module_hal_init_c_, _drv_notice_, + ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n", + buffSize, blockSize_p1, blockCount_p1, remainSize_p1)); + } + + for (i = 0; i < blockCount_p1; i++) + { +#ifdef CONFIG_USB_HCI + ret = rtw_writeN(padapter, (FW_8723A_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1)); +#else + ret = rtw_write32(padapter, (FW_8723A_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32*)(bufferPtr + i * blockSize_p1)))); +#endif + if(ret == _FAIL) + goto exit; + } + + //3 Phase #2 + if (remainSize_p1) + { + offset = blockCount_p1 * blockSize_p1; + + blockCount_p2 = remainSize_p1/blockSize_p2; + remainSize_p2 = remainSize_p1%blockSize_p2; + + if (blockCount_p2) { + RT_TRACE(_module_hal_init_c_, _drv_notice_, + ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n", + (buffSize-offset), blockSize_p2 ,blockCount_p2, remainSize_p2)); + } + +#ifdef CONFIG_USB_HCI + for (i = 0; i < blockCount_p2; i++) { + ret = rtw_writeN(padapter, (FW_8723A_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2)); + + if(ret == _FAIL) + goto exit; + } +#endif + } + + //3 Phase #3 + if (remainSize_p2) + { + offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2); + + blockCount_p3 = remainSize_p2 / blockSize_p3; + + RT_TRACE(_module_hal_init_c_, _drv_notice_, + ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n", + (buffSize-offset), blockSize_p3, blockCount_p3)); + + for(i = 0 ; i < blockCount_p3 ; i++){ + ret = rtw_write8(padapter, (FW_8723A_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); + + if(ret == _FAIL) + goto exit; + } + } + +exit: + return ret; +} + +static int +_PageWrite( + IN PADAPTER padapter, + IN u32 page, + IN PVOID buffer, + IN u32 size + ) +{ + u8 value8; + u8 u8Page = (u8) (page & 0x07) ; + + value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page ; + rtw_write8(padapter, REG_MCUFWDL+2,value8); + + return _BlockWrite(padapter,buffer,size); +} + +static VOID +_FillDummy( + u8* pFwBuf, + u32* pFwLen + ) +{ + u32 FwLen = *pFwLen; + u8 remain = (u8)(FwLen%4); + remain = (remain==0)?0:(4-remain); + + while(remain>0) + { + pFwBuf[FwLen] = 0; + FwLen++; + remain--; + } + + *pFwLen = FwLen; +} + +static int +_WriteFW( + IN PADAPTER padapter, + IN PVOID buffer, + IN u32 size + ) +{ + // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. + // We can remove _ReadChipVersion from ReadpadapterInfo8192C later. + int ret = _SUCCESS; + u32 pageNums,remainSize ; + u32 page, offset; + u8 *bufferPtr = (u8*)buffer; + +#ifdef CONFIG_PCI_HCI + // 20100120 Joseph: Add for 88CE normal chip. + // Fill in zero to make firmware image to dword alignment. + _FillDummy(bufferPtr, &size); +#endif + + pageNums = size / MAX_PAGE_SIZE ; + //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n")); + remainSize = size % MAX_PAGE_SIZE; + + for (page = 0; page < pageNums; page++) { + offset = page * MAX_PAGE_SIZE; + ret = _PageWrite(padapter, page, bufferPtr+offset, MAX_PAGE_SIZE); + + if(ret == _FAIL) + goto exit; + } + if (remainSize) { + offset = pageNums * MAX_PAGE_SIZE; + page = pageNums; + ret = _PageWrite(padapter, page, bufferPtr+offset, remainSize); + + if(ret == _FAIL) + goto exit; + } + RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n")); + +exit: + return ret; +} + +void _8051Reset8723A(PADAPTER padapter) +{ + u8 tmp; + + // Reset 8051 + tmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); + rtw_write8(padapter, REG_SYS_FUNC_EN + 1, tmp & (~BIT2)); + + // Reset wrapper + tmp = rtw_read8(padapter, REG_RSV_CTRL + 1); + rtw_write8(padapter, REG_RSV_CTRL + 1, tmp & (~BIT0)); + + // Enable wrapper + tmp = rtw_read8(padapter, REG_RSV_CTRL + 1); + rtw_write8(padapter, REG_RSV_CTRL + 1, tmp | BIT0); + + // 8051 enable + tmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); + rtw_write8(padapter, REG_SYS_FUNC_EN+1, tmp|BIT2); + + DBG_871X("=====> _8051Reset8723A(): 8051 reset success .\n"); +} + +extern u8 g_fwdl_chksum_fail; +static s32 polling_fwdl_chksum(_adapter *adapter, u32 min_cnt, u32 timeout_ms) +{ + s32 ret = _FAIL; + u32 value32; + u32 start = rtw_get_current_time(); + u32 cnt = 0; + + /* polling CheckSum report */ + do { + cnt++; + value32 = rtw_read32(adapter, REG_MCUFWDL); + if (value32 & FWDL_ChkSum_rpt || adapter->bSurpriseRemoved || adapter->bDriverStopped) + break; + rtw_yield_os(); + } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); + + if (!(value32 & FWDL_ChkSum_rpt)) { + goto exit; + } + + if (g_fwdl_chksum_fail) { + DBG_871X("%s: fwdl test case: fwdl_chksum_fail\n", __FUNCTION__); + g_fwdl_chksum_fail--; + goto exit; + } + + ret = _SUCCESS; + +exit: + DBG_871X("%s: Checksum report %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ + , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32); + + return ret; +} + +extern u8 g_fwdl_wintint_rdy_fail; +static s32 _FWFreeToGo(_adapter *adapter, u32 min_cnt, u32 timeout_ms) +{ + s32 ret = _FAIL; + u32 value32; + u32 start = rtw_get_current_time(); + u32 cnt = 0; + + value32 = rtw_read32(adapter, REG_MCUFWDL); + value32 |= MCUFWDL_RDY; + value32 &= ~WINTINI_RDY; + rtw_write32(adapter, REG_MCUFWDL, value32); + + _8051Reset8723A(adapter); + + /* polling for FW ready */ + do { + cnt++; + value32 = rtw_read32(adapter, REG_MCUFWDL); + if (value32 & WINTINI_RDY || adapter->bSurpriseRemoved || adapter->bDriverStopped) + break; + rtw_yield_os(); + } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); + + if (!(value32 & WINTINI_RDY)) { + goto exit; + } + + if (g_fwdl_wintint_rdy_fail) { + DBG_871X("%s: fwdl test case: wintint_rdy_fail\n", __FUNCTION__); + g_fwdl_wintint_rdy_fail--; + goto exit; + } + + ret = _SUCCESS; + +exit: + DBG_871X("%s: Polling FW ready %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ + , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32); + + return ret; +} + +#define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0) + +void rtl8723a_FirmwareSelfReset(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 u1bTmp; + u8 Delay = 100; + + + if (!(IS_FW_81xxC(padapter) && + ((pHalData->FirmwareVersion < 0x21) || + (pHalData->FirmwareVersion == 0x21 && + pHalData->FirmwareSubVersion < 0x01)))) // after 88C Fw v33.1 + { + //0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test + rtw_write8(padapter, REG_HMETFR+3, 0x20); + + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); + while (u1bTmp & BIT2) + { + Delay--; + if(Delay == 0) + break; + rtw_udelay_os(50); + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); + } + RT_TRACE(_module_hal_init_c_, _drv_info_, ("-%s: 8051 reset success (%d)\n", __FUNCTION__, Delay)); + + if ((Delay == 0) && IS_HARDWARE_TYPE_8723AU(padapter)) + { + //force firmware reset + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); + rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2)); + } + } +} + +// +#ifdef CONFIG_MP_INCLUDED + +int _WriteBTFWtoTxPktBuf8723A( + IN PADAPTER Adapter, + IN PVOID buffer, + IN u4Byte FwBufLen, + IN u1Byte times + ) +{ + int rtStatus = _SUCCESS; + //u4Byte value32; + //u1Byte numHQ, numLQ, numPubQ;//, txpktbuf_bndy; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u1Byte BcnValidReg; + u1Byte count=0, DLBcnCount=0; + pu1Byte FwbufferPtr = (pu1Byte)buffer; + //PRT_TCB pTcb, ptempTcb; + //PRT_TX_LOCAL_BUFFER pBuf; + BOOLEAN bRecover=_FALSE; + pu1Byte ReservedPagePacket = NULL; + pu1Byte pGenBufReservedPagePacket = NULL; + u4Byte TotalPktLen; + //u1Byte tmpReg422; + //u1Byte u1bTmp; + u8 *pframe; + struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + +#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + TotalPktLen = FwBufLen; +#else + TotalPktLen = FwBufLen+pHalData->HWDescHeadLength; +#endif +#if 0 + pGenBufReservedPagePacket = rtw_zmalloc(TotalPktLen);//GetGenTempBuffer (Adapter, TotalPktLen); + if (!pGenBufReservedPagePacket) + return _FAIL; + + ReservedPagePacket = (u1Byte *)pGenBufReservedPagePacket; + + _rtw_memset(ReservedPagePacket, 0, TotalPktLen); + + _rtw_memcpy(ReservedPagePacket, FwbufferPtr, FwBufLen); + +#else + //PlatformMoveMemory(ReservedPagePacket+Adapter->HWDescHeadLength , FwbufferPtr, FwBufLen); +#endif + + //--------------------------------------------------------- + // 1. Pause BCN + //--------------------------------------------------------- + //Set REG_CR bit 8. DMA beacon by SW. +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR+1); + PlatformEFIOWrite1Byte(Adapter, REG_CR+1, (u1bTmp|BIT0)); +#else + // Remove for temparaily because of the code on v2002 is not sync to MERGE_TMEP for USB/SDIO. + // De not remove this part on MERGE_TEMP. by tynli. + //pHalData->RegCR_1 |= (BIT0); + //PlatformEFIOWrite1Byte(Adapter, REG_CR+1, pHalData->RegCR_1); +#endif + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. + SetBcnCtrlReg(Adapter, 0, BIT(3)); + SetBcnCtrlReg(Adapter, BIT(4), 0); + +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL+2); + if( tmpReg422&BIT6) + bRecover = TRUE; + PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, tmpReg422&(~BIT6)); +#else + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + if(pHalData->RegFwHwTxQCtrl & BIT(6)) + bRecover=_TRUE; + PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&( ~BIT(6)))); + pHalData->RegFwHwTxQCtrl &= (~BIT(6)); +#endif + + //--------------------------------------------------------- + // 2. Adjust LLT table to an even boundary. + //--------------------------------------------------------- +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + if(LLT_table_init(Adapter, TRUE, 10) == RT_STATUS_FAILURE) + { + DbgPrint("Init self define for BT Fw patch LLT table fail.\n"); + return RT_STATUS_FAILURE; + } +#endif + + //--------------------------------------------------------- + // 3. Write Fw to Tx packet buffer by reseverd page. + //--------------------------------------------------------- + do + { + // download rsvd page. + // Clear beacon valid check bit. + BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2); + PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+2, BcnValidReg&(~BIT(0))); + + //BT patch is big, we should set 0x209 < 0x40 suggested from Gimmy + RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n", + PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1)));//209 < 0x40 +#if 0//def CONFIG_RTL8723A_SDIO + PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, 0x30); + RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n", + PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1))); +#else + if(times == 1) + PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, 0x90); //0x70); + else if(times ==2) + PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, 0x70); //0x70); + else if(times ==3) + PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, 0x50); //0x70); + else + PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, 0x30); //0x70); + + RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n", + PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1))); +#endif + +#if 0 + // Acquice TX spin lock before GetFwBuf and send the packet to prevent system deadlock. + // Advertised by Roger. Added by tynli. 2010.02.22. + PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); + if(MgntGetFWBuffer(Adapter, &pTcb, &pBuf)) + { + PlatformMoveMemory(pBuf->Buffer.VirtualAddress, ReservedPagePacket, TotalPktLen); + CmdSendPacket(Adapter, pTcb, pBuf, TotalPktLen, DESC_PACKET_TYPE_NORMAL, FALSE); + } + else + dbgdump("SetFwRsvdPagePkt(): MgntGetFWBuffer FAIL!!!!!!!!.\n"); + PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); +#else + /*--------------------------------------------------------- + tx reserved_page_packet + ----------------------------------------------------------*/ + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { + rtStatus = _FAIL; + goto exit; + } + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(Adapter, pattrib); + + pattrib->qsel = QSLT_BEACON; + pattrib->pktlen = pattrib->last_txcmdsz = FwBufLen ; + + //_rtw_memset(pmgntframe->buf_addr, 0, TotalPktLen+TXDESC_SIZE); + //pmgntframe->buf_addr = ReservedPagePacket ; + + //_rtw_memcpy( (u8*) (pmgntframe->buf_addr + TXDESC_OFFSET), ReservedPagePacket, FwBufLen); + _rtw_memcpy( (u8*) (pmgntframe->buf_addr + TXDESC_OFFSET), FwbufferPtr, FwBufLen); + DBG_871X("===>TotalPktLen + TXDESC_OFFSET TotalPacketLen:%d ", (FwBufLen + TXDESC_OFFSET)); + + dump_mgntframe(Adapter, pmgntframe); + +#endif +#if 1 + // check rsvd page download OK. + BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2); + while(!(BcnValidReg & BIT(0)) && count <200) + { + count++; + //PlatformSleepUs(10); + rtw_msleep_os(1); + BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2); + RT_TRACE(_module_mp_, _drv_info_,("Poll 0x20A = %x\n", BcnValidReg)); + } + DLBcnCount++; + DBG_871X("##0x208:%08x,0x210=%08x\n",PlatformEFIORead4Byte(Adapter, REG_TDECTRL),PlatformEFIORead4Byte(Adapter, 0x210)); + + PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+2,BcnValidReg); + + }while((!(BcnValidReg&BIT(0))) && DLBcnCount<5); + + +#endif + if(DLBcnCount >=5){ + DBG_871X(" check rsvd page download OK DLBcnCount =%d \n",DLBcnCount); + rtStatus = _FAIL; + goto exit; + } + + if(!(BcnValidReg&BIT(0))) + { + DBG_871X("_WriteFWtoTxPktBuf(): 1 Download RSVD page failed!\n"); + rtStatus = _FAIL; + goto exit; + } + + //--------------------------------------------------------- + // 4. Set Tx boundary to the initial value + //--------------------------------------------------------- + + + //--------------------------------------------------------- + // 5. Reset beacon setting to the initial value. + // After _CheckWLANFwPatchBTFwReady(). + //--------------------------------------------------------- + +exit: + + if(pGenBufReservedPagePacket) + { + DBG_871X("_WriteBTFWtoTxPktBuf8723A => rtw_mfree pGenBufReservedPagePacket!\n"); + rtw_mfree((u8*)pGenBufReservedPagePacket, TotalPktLen); + } + return rtStatus; +} + + +extern s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); + +// +// Description: Determine the contents of H2C BT_FW_PATCH Command sent to FW. +// 2011.10.20 by tynli +// +void +SetFwBTFwPatchCmd( + IN PADAPTER Adapter, + IN u2Byte FwSize + ) +{ + u1Byte u1BTFwPatchParm[H2C_BT_FW_PATCH_LEN]={0}; + + RT_TRACE(_module_mp_, _drv_notice_,("SetFwBTFwPatchCmd(): FwSize = %d\n", FwSize)); + + //bit1: 1---24k, 0----16k + //SET_H2CCMD_BT_FW_PATCH_ENABLE(u1BTFwPatchParm, 0x03); + + SET_H2CCMD_BT_FW_PATCH_ENABLE(u1BTFwPatchParm, 1); + + SET_H2CCMD_BT_FW_PATCH_SIZE(u1BTFwPatchParm, FwSize); + + u1BTFwPatchParm[0] |= BIT1; + + FillH2CCmd(Adapter, H2C_BT_FW_PATCH, H2C_BT_FW_PATCH_LEN, u1BTFwPatchParm); + + RT_TRACE(_module_mp_, _drv_notice_,("<----SetFwBTFwPatchCmd(): FwSize = %d \n", FwSize)); +} + +void +SetFwBTPwrCmd( + IN PADAPTER Adapter, + IN u1Byte PwrIdx + ) +{ + u1Byte u1BTPwrIdxParm[H2C_BT_PWR_FORCE_LEN]={0}; + + RT_TRACE(_module_mp_, _drv_info_,("SetFwBTPwrCmd(): idx = %d\n", PwrIdx)); + SET_H2CCMD_BT_PWR_IDX(u1BTPwrIdxParm, PwrIdx); + + RT_TRACE(_module_mp_, _drv_info_,("SetFwBTPwrCmd(): %x %x %x\n", + u1BTPwrIdxParm[0],u1BTPwrIdxParm[1],u1BTPwrIdxParm[2])); + + FillH2CCmd(Adapter, FORCE_BT_TX_PWR_EID, H2C_BT_PWR_FORCE_LEN, u1BTPwrIdxParm); +} + +// +// Description: WLAN Fw will write BT Fw to BT XRAM and signal driver. +// +// 2011.10.20. by tynli. +// +void +_CheckWLANFwPatchBTFwReady( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u4Byte count=0; + u1Byte u1bTmp; + + //--------------------------------------------------------- + // Check if BT FW patch procedure is ready. + //--------------------------------------------------------- + do{ + u1bTmp = PlatformEFIORead1Byte(Adapter, REG_MCUFWDL+1); + if(u1bTmp&BIT(7)) + break; + + count++; + RT_TRACE(_module_mp_, _drv_info_,("0x81=%x, wait for 50 ms (%d) times.\n", + u1bTmp, count)); + rtw_msleep_os(50); // 50ms + }while(!(u1bTmp&BIT(7)) && count < 50); + + RT_TRACE(_module_mp_, _drv_notice_,("_CheckWLANFwPatchBTFwReady():" + " Polling ready bit 0x81[7] for %d times.\n", count)); + + if(count >= 50) + { + RT_TRACE(_module_mp_, _drv_notice_,("_CheckWLANFwPatchBTFwReady():" + " Polling ready bit 0x81[7] FAIL!!\n")); + Adapter->bBTFWReady = _FALSE; + }else{ + Adapter->bBTFWReady = _TRUE; + } + + //--------------------------------------------------------- + // Reset beacon setting to the initial value. + //--------------------------------------------------------- +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + if(LLT_table_init(Adapter, FALSE, 0) == RT_STATUS_FAILURE) + { + dbgdump("Init self define for BT Fw patch LLT table fail.\n"); + //return RT_STATUS_FAILURE; + } +#endif + SetBcnCtrlReg(Adapter, BIT(3), 0); + SetBcnCtrlReg(Adapter, 0, BIT(4)); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + u1bTmp = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL+2); + PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, (u1bTmp|BIT6)); +#else + PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT(6))); + pHalData->RegFwHwTxQCtrl |= BIT(6); +#endif + + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR+1); + PlatformEFIOWrite1Byte(Adapter, REG_CR+1, (u1bTmp&(~BIT0))); +#else + // Remove for temparaily because of the code on v2002 is not sync to MERGE_TMEP for USB/SDIO. + // De not remove this part on MERGE_TEMP. by tynli. + //pHalData->RegCR_1 &= (~BIT0); + //PlatformEFIOWrite1Byte(Adapter, REG_CR+1, pHalData->RegCR_1); +#endif +} + + +int +FirmwareDownloadBT(IN PADAPTER Adapter, PRT_FIRMWARE_8723A pFirmware) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // BT pacth + u1Byte *BTFwImage; + u4Byte BTFwImageLen; + + u1Byte *pBTFirmwareBuf; + u4Byte BTFirmwareLen; + u8 i; + // + // Patch BT Fw. Download BT RAM code to Tx packet buffer. Added by tynli. 2011.10. + // Only for 8723AE for Toshiba. Suggested by SD1 Jackie. + // + if( !(IS_HARDWARE_TYPE_8723A(Adapter)) && IS_8723A_B_CUT(pHalData->VersionID)) + return _FAIL ; //&& (Adapter->registrypriv.bBtFwSupport))) + /* + if (Adapter->bBTFWReady){ + DBG_871X("BT Firmware is ready!!\n"); + return _FAIL; + }*/ + PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x2d); + PlatformEFIOWrite4Byte(Adapter, 0x68, 0xa005000c); + rtw_msleep_os(5); + PlatformEFIOWrite4Byte(Adapter, 0x68, 0xb005000c); + PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x29); + for(i=0; i<10; i++) + rtw_msleep_os(100); + BTFwImage = (pu1Byte)Rtl8723EFwBTImgArray; + BTFwImageLen = Rtl8723EBTImgArrayLength; + DBG_871X("BT Firmware is size= %zu!!\n",sizeof(Rtl8723EFwBTImgArray)); + + // Download BT patch Fw. + RT_TRACE(_module_mp_, _drv_info_,("Download BT Fw (patch version) from header.\n")); + DBG_871X("Download BT Fw (patch version) from header.\n"); + +#ifdef CONFIG_EMBEDDED_FWIMG + pFirmware->szBTFwBuffer = BTFwImage; + DBG_871X("CONFIG_EMBEDDED_FWIMG pFirmware->szBTFwBuffer = BTFwImage;\n"); +#else + DBG_871X("_rtw_memcpy BTFwImage to pFirmware->szBTFwBuffer.\n"); + _rtw_memcpy(pFirmware->szBTFwBuffer, (PVOID)BTFwImage, BTFwImageLen); +#endif + pFirmware->ulBTFwLength = BTFwImageLen; + RT_TRACE(_module_mp_, _drv_notice_,("Download BT Fw (patch version) from header " + "pFirmware->ulBTFwLength:%d.\n", pFirmware->ulBTFwLength)); + + // BT FW +#if 0 + pBTFirmwareBuf = BTFwImage; + //pFirmware->szBTFwBuffer; + BTFirmwareLen = BTFwImageLen; + //pFirmware->ulBTFwLength; +#else + pBTFirmwareBuf = pFirmware->szBTFwBuffer; + BTFirmwareLen = pFirmware->ulBTFwLength; + +#endif + //for h2c cam here should be set to true + Adapter->bFWReady = _TRUE; + DBG_871X("FirmwareDownloadBT to _WriteBTFWtoTxPktBuf8723A !\n"); +#ifdef CONFIG_RTL8723A_SDIO + rtStatus = _WriteBTFWtoTxPktBuf8723A(Adapter, pBTFirmwareBuf, BTFirmwareLen, 0); +#else + //rtStatus = _WriteBTFWtoTxPktBuf8723A(Adapter, pBTFirmwareBuf, BTFirmwareLen); + rtStatus = _WriteBTFWtoTxPktBuf8723A(Adapter, pBTFirmwareBuf+(4096*3), (BTFirmwareLen-(4096*3)), 1); + if(rtStatus != _SUCCESS) + { + DBG_871X("BT Firmware download to Tx packet buffer first fail! \n"); + return rtStatus; + } + rtStatus = _WriteBTFWtoTxPktBuf8723A(Adapter, pBTFirmwareBuf+(4096*2), 4096, 2); + if(rtStatus != _SUCCESS) + { + DBG_871X("BT Firmware download to Tx packet buffer second fail! \n"); + return rtStatus; + } + rtStatus = _WriteBTFWtoTxPktBuf8723A(Adapter, pBTFirmwareBuf+(4096), 4096, 3); + if(rtStatus != _SUCCESS) + { + DBG_871X("BT Firmware download to Tx packet buffer third fail! \n"); + return rtStatus; + } + rtStatus = _WriteBTFWtoTxPktBuf8723A(Adapter, pBTFirmwareBuf, 4096, 4); +#endif + if(rtStatus != _SUCCESS) + { + RT_TRACE(_module_mp_, _drv_info_,("BT Firmware download to Tx packet buffer four fail! \n")); + DBG_871X("BT Firmware download to Tx packet buffer four fail!!\n"); + } + else + { + + SetFwBTFwPatchCmd(Adapter, (u2Byte)BTFirmwareLen); + _CheckWLANFwPatchBTFwReady(Adapter); + } + + DBG_871X("<===FirmwareDownloadBT(),return %s!\n",rtStatus?"SUCCESS":"FAIL"); + return rtStatus; + +} + +#endif + +#ifdef CONFIG_FILE_FWIMG +extern char *rtw_fw_file_path; +u8 fw_buffer_8723a[FW_8723A_SIZE]; +#endif //CONFIG_FILE_FWIMG +// +// Description: +// Download 8192C firmware code. +// +// +s32 rtl8723a_FirmwareDownload(PADAPTER padapter) +{ + s32 rtStatus = _SUCCESS; + u8 write_fw = 0; + u32 fwdl_start_time; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + s8 R8723FwImageFileName_UMC[] ={RTL8723_FW_UMC_IMG}; + s8 R8723FwImageFileName_UMC_B[] ={RTL8723_FW_UMC_B_IMG}; + u8 *FwImage; + u32 FwImageLen; + u8 *pFwImageFileName; + u8 *pucMappedFile = NULL; + PRT_FIRMWARE_8723A pFirmware = NULL; + PRT_FIRMWARE_8723A pBTFirmware = NULL; + PRT_8723A_FIRMWARE_HDR pFwHdr = NULL; + u8 *pFirmwareBuf; + u32 FirmwareLen; + + + RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __FUNCTION__)); + pFirmware = (PRT_FIRMWARE_8723A)rtw_zmalloc(sizeof(RT_FIRMWARE_8723A)); + pBTFirmware = (PRT_FIRMWARE_8723A)rtw_zmalloc(sizeof(RT_FIRMWARE_8723A)); + + if(!pFirmware||!pBTFirmware) + { + rtStatus = _FAIL; + goto exit; + } + + if (IS_HARDWARE_TYPE_8723A(padapter)) + { + if (IS_8723A_A_CUT(pHalData->VersionID)) + { + pFwImageFileName = R8723FwImageFileName_UMC; + FwImage = (u8*)Rtl8723_FwImageArray; + FwImageLen = Rtl8723_ImgArrayLength; + RT_TRACE(_module_hal_init_c_, _drv_info_, ("rtl8723a_FirmwareDownload: R8723FwImageArray_UMC for RTL8723A A CUT\n")); + } + else if (IS_8723A_B_CUT(pHalData->VersionID)) + { + if(padapter->registrypriv.mp_mode == 1) + { + FwImage = (u8*)Rtl8723_FwUMCBCutMPImageArray; + FwImageLen = Rtl8723_UMCBCutMPImgArrayLength; + DBG_871X(" Rtl8723_FwUMCBCutMPImageArray for RTL8723A B CUT length:%d\n",FwImageLen); + } + else + { + // WLAN Fw. + if (padapter->registrypriv.wifi_spec == 1) + { + FwImage = (u8*)Rtl8723_FwUMCBCutImageArrayWithoutBT; + FwImageLen = Rtl8723_UMCBCutImgArrayWithoutBTLength; + DBG_871X(" Rtl8723_FwUMCBCutImageArrayWithoutBT for RTL8723A B CUT\n"); + } + else + { +#ifdef CONFIG_BT_COEXIST + FwImage = (u8*)Rtl8723_FwUMCBCutImageArrayWithBT; + FwImageLen = Rtl8723_UMCBCutImgArrayWithBTLength; + DBG_871X(" Rtl8723_FwUMCBCutImageArrayWithBT for RTL8723A B CUT\n"); +#else + FwImage = (u8*)Rtl8723_FwUMCBCutImageArrayWithoutBT; + FwImageLen = Rtl8723_UMCBCutImgArrayWithoutBTLength; + DBG_871X(" Rtl8723_FwUMCBCutImageArrayWithoutBT for RTL8723A B CUT\n"); +#endif + } + } + pFwImageFileName = R8723FwImageFileName_UMC_B; + } + else + { + // <Roger_TODO> We should download proper RAM Code here to match the ROM code. + RT_TRACE(_module_hal_init_c_, _drv_err_, ("%s: unknow version!\n", __FUNCTION__)); +// return RT_STATUS_FAILURE; + rtStatus = _FAIL; + goto exit; + } + } + else + { + RT_TRACE(_module_hal_init_c_, _drv_err_, ("%s: unknow chip!\n", __FUNCTION__)); + rtStatus = _FAIL; + goto exit; + } + +// RT_TRACE(_module_hal_init_c_, _drv_err_, ("rtl8723a_FirmwareDownload: %s\n", pFwImageFileName)); + + #ifdef CONFIG_FILE_FWIMG + if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE) + { + DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path); + pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg. + } + else + #endif //CONFIG_FILE_FWIMG + { + DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__); + pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; + } + + switch(pFirmware->eFWSource) + { + case FW_SOURCE_IMG_FILE: + #ifdef CONFIG_FILE_FWIMG + rtStatus = rtw_retrive_from_file(rtw_fw_file_path, fw_buffer_8723a, FW_8723A_SIZE); + pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; + pFirmware->szFwBuffer = fw_buffer_8723a; + #endif //CONFIG_FILE_FWIMG + + if(pFirmware->ulFwLength <= 0) + { + rtStatus = _FAIL; + goto exit; + } + break; + case FW_SOURCE_HEADER_FILE: + if (FwImageLen > FW_8723A_SIZE) { + rtStatus = _FAIL; + RT_TRACE(_module_hal_init_c_, _drv_err_, ("Firmware size exceed 0x%X. Check it.\n", FW_8723A_SIZE) ); + goto exit; + } + + pFirmware->szFwBuffer = FwImage; + pFirmware->ulFwLength = FwImageLen; + break; + } + + #ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file... + if(pFirmware->ulFwLength > 0) + { + rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength); + } + #endif + + pFirmwareBuf = pFirmware->szFwBuffer; + FirmwareLen = pFirmware->ulFwLength; + + // To Check Fw header. Added by tynli. 2009.12.04. + pFwHdr = (PRT_8723A_FIRMWARE_HDR)pFirmware->szFwBuffer; + + pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version); + pHalData->FirmwareSubVersion = pFwHdr->Subversion; + pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature); + + DBG_871X("%s: fw_ver=%d fw_subver=%d sig=0x%x\n", + __FUNCTION__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature); + + if (IS_FW_HEADER_EXIST(pFwHdr)) + { + // Shift 32 bytes for FW header + pFirmwareBuf = pFirmwareBuf + 32; + FirmwareLen = FirmwareLen - 32; + } + + // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, + // or it will cause download Fw fail. 2010.02.01. by tynli. + if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) //8051 RAM code + { + rtl8723a_FirmwareSelfReset(padapter); + rtw_write8(padapter, REG_MCUFWDL, 0x00); + } + + _FWDownloadEnable(padapter, _TRUE); + fwdl_start_time = rtw_get_current_time(); + while(!padapter->bDriverStopped && !padapter->bSurpriseRemoved + && (write_fw++ < 3 || rtw_get_passing_time_ms(fwdl_start_time) < 500)) + { + /* reset FWDL chksum */ + rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL)|FWDL_ChkSum_rpt); + + rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen); + if (rtStatus != _SUCCESS) + continue; + + rtStatus = polling_fwdl_chksum(padapter, 5, 50); + if (rtStatus == _SUCCESS) + break; + } + _FWDownloadEnable(padapter, _FALSE); + if(_SUCCESS != rtStatus) + goto fwdl_stat; + + rtStatus = _FWFreeToGo(padapter, 10, 200); + if (_SUCCESS != rtStatus) + goto fwdl_stat; + +#ifdef CONFIG_MP_INCLUDED//BT_MP + if (padapter->registrypriv.mp_mode == 1) + { + DBG_871X("rtl8723a_FirmwareDownload go to FirmwareDownloadBT !\n"); + FirmwareDownloadBT(padapter, pBTFirmware); + } +#endif + +fwdl_stat: + DBG_871X("FWDL %s. write_fw:%u, %dms\n" + , (rtStatus == _SUCCESS)?"success":"fail" + , write_fw + , rtw_get_passing_time_ms(fwdl_start_time) + ); + +exit: + if (pFirmware) + rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8723A)); + if (pBTFirmware) + rtw_mfree((u8*)pBTFirmware, sizeof(RT_FIRMWARE_8723A)); + + return rtStatus; +} + +void rtl8723a_InitializeFirmwareVars(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + // Init Fw LPS related. + adapter_to_pwrctl(padapter)->bFwCurrentInPSMode = _FALSE; + + // Init H2C counter. by tynli. 2009.12.09. + pHalData->LastHMEBoxNum = 0; +// pHalData->H2CQueueHead = 0; +// pHalData->H2CQueueTail = 0; +// pHalData->H2CStopInsertQueue = _FALSE; +} + +static void rtl8723a_free_hal_data(PADAPTER padapter) +{ +_func_enter_; + + if(padapter->HalData) + { + rtw_vmfree(padapter->HalData, sizeof(HAL_DATA_TYPE)); + padapter->HalData = NULL; + } + +_func_exit_; +} + +//=========================================================== +// Efuse related code +//=========================================================== +static u8 +hal_EfuseSwitchToBank( + PADAPTER padapter, + u8 bank, + u8 bPseudoTest) +{ + u8 bRet = _FALSE; + u32 value32 = 0; +#ifdef HAL_EFUSE_MEMORY + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; +#endif + + + DBG_8192C("%s: Efuse switch bank to %d\n", __FUNCTION__, bank); + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + pEfuseHal->fakeEfuseBank = bank; +#else + fakeEfuseBank = bank; +#endif + bRet = _TRUE; + } + else + { + value32 = rtw_read32(padapter, EFUSE_TEST); + bRet = _TRUE; + switch (bank) + { + case 0: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); + break; + case 1: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0); + break; + case 2: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1); + break; + case 3: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2); + break; + default: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); + bRet = _FALSE; + break; + } + rtw_write32(padapter, EFUSE_TEST, value32); + } + + return bRet; +} + +static void +Hal_GetEfuseDefinition( + PADAPTER padapter, + u8 efuseType, + u8 type, + void *pOut, + u8 bPseudoTest) +{ + switch (type) + { + case TYPE_EFUSE_MAX_SECTION: + { + u8 *pMax_section; + pMax_section = (u8*)pOut; + + if (efuseType == EFUSE_WIFI) + *pMax_section = EFUSE_MAX_SECTION_8723A; + else + *pMax_section = EFUSE_BT_MAX_SECTION; + } + break; + + case TYPE_EFUSE_REAL_CONTENT_LEN: + { + u16 *pu2Tmp; + pu2Tmp = (u16*)pOut; + + if (efuseType == EFUSE_WIFI) + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8723A; + else + *pu2Tmp = EFUSE_BT_REAL_CONTENT_LEN; + } + break; + + case TYPE_AVAILABLE_EFUSE_BYTES_BANK: + { + u16 *pu2Tmp; + pu2Tmp = (u16*)pOut; + + if (efuseType == EFUSE_WIFI) + *pu2Tmp = (EFUSE_REAL_CONTENT_LEN_8723A-EFUSE_OOB_PROTECT_BYTES); + else + *pu2Tmp = (EFUSE_BT_REAL_BANK_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK); + } + break; + + case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: + { + u16 *pu2Tmp; + pu2Tmp = (u16*)pOut; + + if (efuseType == EFUSE_WIFI) + *pu2Tmp = (EFUSE_REAL_CONTENT_LEN_8723A-EFUSE_OOB_PROTECT_BYTES); + else + *pu2Tmp = (EFUSE_BT_REAL_CONTENT_LEN-(EFUSE_PROTECT_BYTES_BANK*3)); + } + break; + + case TYPE_EFUSE_MAP_LEN: + { + u16 *pu2Tmp; + pu2Tmp = (u16*)pOut; + + if (efuseType == EFUSE_WIFI) + *pu2Tmp = EFUSE_MAP_LEN_8723A; + else + *pu2Tmp = EFUSE_BT_MAP_LEN; + } + break; + + case TYPE_EFUSE_PROTECT_BYTES_BANK: + { + u8 *pu1Tmp; + pu1Tmp = (u8*)pOut; + + if (efuseType == EFUSE_WIFI) + *pu1Tmp = EFUSE_OOB_PROTECT_BYTES; + else + *pu1Tmp = EFUSE_PROTECT_BYTES_BANK; + } + break; + + case TYPE_EFUSE_CONTENT_LEN_BANK: + { + u16 *pu2Tmp; + pu2Tmp = (u16*)pOut; + + if (efuseType == EFUSE_WIFI) + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8723A; + else + *pu2Tmp = EFUSE_BT_REAL_BANK_CONTENT_LEN; + } + break; + + default: + { + u8 *pu1Tmp; + pu1Tmp = (u8*)pOut; + *pu1Tmp = 0; + } + break; + } +} + +#define VOLTAGE_V25 0x03 +#define LDOE25_SHIFT 28 + +static void +Hal_EfusePowerSwitch( + PADAPTER padapter, + u8 bWrite, + u8 PwrState) +{ + u8 tempval; + u16 tmpV16; + + if (PwrState == _TRUE) + { + rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); + + // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid + tmpV16 = rtw_read16(padapter, REG_SYS_ISO_CTRL); + if (!(tmpV16 & PWC_EV12V)) { + tmpV16 |= PWC_EV12V ; + rtw_write16(padapter, REG_SYS_ISO_CTRL, tmpV16); + } + // Reset: 0x0000h[28], default valid + tmpV16 = rtw_read16(padapter, REG_SYS_FUNC_EN); + if (!(tmpV16 & FEN_ELDR)) { + tmpV16 |= FEN_ELDR ; + rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16); + } + + // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid + tmpV16 = rtw_read16(padapter, REG_SYS_CLKR); + if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) { + tmpV16 |= (LOADER_CLK_EN | ANA8M) ; + rtw_write16(padapter, REG_SYS_CLKR, tmpV16); + } + + if (bWrite == _TRUE) + { + // Enable LDO 2.5V before read/write action + tempval = rtw_read8(padapter, EFUSE_TEST+3); + tempval &= 0x0F; + tempval |= (VOLTAGE_V25 << 4); + rtw_write8(padapter, EFUSE_TEST+3, (tempval | 0x80)); + } + } + else + { + rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); + + if (bWrite == _TRUE) { + // Disable LDO 2.5V after read/write action + tempval = rtw_read8(padapter, EFUSE_TEST+3); + rtw_write8(padapter, EFUSE_TEST+3, (tempval & 0x7F)); + } + } +} + +static void +hal_ReadEFuse_WiFi( + PADAPTER padapter, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + u8 bPseudoTest) +{ +#ifdef HAL_EFUSE_MEMORY + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; +#endif + u8 *efuseTbl = NULL; + u16 eFuse_Addr=0; + u8 offset, wden; + u8 efuseHeader, efuseExtHdr, efuseData; + u16 i, total, used; + u8 efuse_usage = 0; + + + // + // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. + // + if ((_offset+_size_byte) > EFUSE_MAP_LEN_8723A) + { + DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte); + return; + } + + efuseTbl = (u8*)rtw_malloc(EFUSE_MAP_LEN_8723A); + if (efuseTbl == NULL) + { + DBG_8192C("%s: alloc efuseTbl fail!\n", __FUNCTION__); + return; + } + // 0xff will be efuse default value instead of 0x00. + _rtw_memset(efuseTbl, 0xFF, EFUSE_MAP_LEN_8723A); + + // switch bank back to bank 0 for later BT and wifi use. + hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); + + while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) + { + ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); + if (efuseHeader == 0xFF) + { + DBG_8192C("%s: data end at address=%#x\n", __FUNCTION__, eFuse_Addr); + break; + } +// DBG_8192C("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseHeader); + + // Check PG header for section num. + if (EXT_HEADER(efuseHeader)) //extended header + { + offset = GET_HDR_OFFSET_2_0(efuseHeader); +// DBG_8192C("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset_2_0); + + ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); +// DBG_8192C("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseExtHdr); + if (ALL_WORDS_DISABLED(efuseExtHdr)) + { + continue; + } + + offset |= ((efuseExtHdr & 0xF0) >> 1); + wden = (efuseExtHdr & 0x0F); + } + else + { + offset = ((efuseHeader >> 4) & 0x0f); + wden = (efuseHeader & 0x0f); + } + + if (offset < EFUSE_MAX_SECTION_8723A) + { + u16 addr; + // Get word enable value from PG header +// DBG_8192C("%s: Offset=%d Worden=0x%X\n", __FUNCTION__, offset, wden); + + addr = offset * PGPKT_DATA_SIZE; + for (i=0; i<EFUSE_MAX_WORD_UNIT; i++) + { + // Check word enable condition in the section + if (!(wden & (0x01<<i))) + { + ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); +// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData); + efuseTbl[addr] = efuseData; + + ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); +// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData); + efuseTbl[addr+1] = efuseData; + } + addr += 2; + } + } + else + { + DBG_8192C(KERN_ERR "%s: offset(%d) is illegal!!\n", __FUNCTION__, offset); + eFuse_Addr += Efuse_CalculateWordCnts(wden)*2; + } + } + + // Copy from Efuse map to output pointer memory!!! + for (i=0; i<_size_byte; i++) + pbuf[i] = efuseTbl[_offset+i]; + + // Calculate Efuse utilization + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &total, bPseudoTest); + used = eFuse_Addr - 1; + efuse_usage = (u8)((used*100)/total); + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + pEfuseHal->fakeEfuseUsedBytes = used; +#else + fakeEfuseUsedBytes = used; +#endif + } + else + { + rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8*)&used); + rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_USAGE, (u8*)&efuse_usage); + } + + if (efuseTbl) + rtw_mfree(efuseTbl, EFUSE_MAP_LEN_8723A); +} + +static VOID +hal_ReadEFuse_BT( + PADAPTER padapter, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + u8 bPseudoTest + ) +{ +#ifdef HAL_EFUSE_MEMORY + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; +#endif + u8 *efuseTbl; + u8 bank; + u16 eFuse_Addr; + u8 efuseHeader, efuseExtHdr, efuseData; + u8 offset, wden; + u16 i, total, used; + u8 efuse_usage; + + + // + // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. + // + if ((_offset+_size_byte) > EFUSE_BT_MAP_LEN) + { + DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte); + return; + } + + efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN); + if (efuseTbl == NULL) { + DBG_8192C("%s: efuseTbl malloc fail!\n", __FUNCTION__); + return; + } + // 0xff will be efuse default value instead of 0x00. + _rtw_memset(efuseTbl, 0xFF, EFUSE_BT_MAP_LEN); + + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &total, bPseudoTest); + + for (bank=1; bank<EFUSE_MAX_BANK; bank++) + { + if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE) + { + DBG_8192C("%s: hal_EfuseSwitchToBank Fail!!\n", __FUNCTION__); + goto exit; + } + + eFuse_Addr = 0; + + while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) + { + ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); + if (efuseHeader == 0xFF) break; +// DBG_8192C("%s: efuse[%#X]=0x%02x (header)\n", __FUNCTION__, (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseHeader); + + // Check PG header for section num. + if (EXT_HEADER(efuseHeader)) //extended header + { + offset = GET_HDR_OFFSET_2_0(efuseHeader); +// DBG_8192C("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset_2_0); + + ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); +// DBG_8192C("%s: efuse[%#X]=0x%02x (ext header)\n", __FUNCTION__, (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseExtHdr); + if (ALL_WORDS_DISABLED(efuseExtHdr)) + { + continue; + } + + offset |= ((efuseExtHdr & 0xF0) >> 1); + wden = (efuseExtHdr & 0x0F); + } + else + { + offset = ((efuseHeader >> 4) & 0x0f); + wden = (efuseHeader & 0x0f); + } + + if (offset < EFUSE_BT_MAX_SECTION) + { + u16 addr; + + // Get word enable value from PG header +// DBG_8192C("%s: Offset=%d Worden=%#X\n", __FUNCTION__, offset, wden); + + addr = offset * PGPKT_DATA_SIZE; + for (i=0; i<EFUSE_MAX_WORD_UNIT; i++) + { + // Check word enable condition in the section + if (!(wden & (0x01<<i))) + { + ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); +// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData); + efuseTbl[addr] = efuseData; + + ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); +// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData); + efuseTbl[addr+1] = efuseData; + } + addr += 2; + } + } + else + { + DBG_8192C(KERN_ERR "%s: offset(%d) is illegal!!\n", __FUNCTION__, offset); + eFuse_Addr += Efuse_CalculateWordCnts(wden)*2; + } + } + + if ((eFuse_Addr-1) < total) + { + DBG_8192C("%s: bank(%d) data end at %#x\n", __FUNCTION__, bank, eFuse_Addr-1); + break; + } + } + + // switch bank back to bank 0 for later BT and wifi use. + hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); + + // Copy from Efuse map to output pointer memory!!! + for (i=0; i<_size_byte; i++) + pbuf[i] = efuseTbl[_offset+i]; + + // + // Calculate Efuse utilization. + // + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &total, bPseudoTest); + used = (EFUSE_BT_REAL_BANK_CONTENT_LEN*(bank-1)) + eFuse_Addr - 1; + efuse_usage = (u8)((used*100)/total); + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + pEfuseHal->fakeBTEfuseUsedBytes = used; +#else + fakeBTEfuseUsedBytes = used; +#endif + } + else + { + rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8*)&used); + rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_USAGE, (u8*)&efuse_usage); + } + +exit: + if (efuseTbl) + rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN); +} + +static void +Hal_ReadEFuse( + PADAPTER padapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + u8 bPseudoTest) +{ + if (efuseType == EFUSE_WIFI) + hal_ReadEFuse_WiFi(padapter, _offset, _size_byte, pbuf, bPseudoTest); + else + hal_ReadEFuse_BT(padapter, _offset, _size_byte, pbuf, bPseudoTest); +} + +static u16 +hal_EfuseGetCurrentSize_WiFi( + PADAPTER padapter, + u8 bPseudoTest) +{ +#ifdef HAL_EFUSE_MEMORY + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; +#endif + u16 efuse_addr=0; + u8 hoffset=0, hworden=0; + u8 efuse_data, word_cnts=0; + + + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + efuse_addr = (u16)pEfuseHal->fakeEfuseUsedBytes; +#else + efuse_addr = (u16)fakeEfuseUsedBytes; +#endif + } + else + { + rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8*)&efuse_addr); + } + DBG_8192C("%s: start_efuse_addr=0x%X\n", __FUNCTION__, efuse_addr); + + // switch bank back to bank 0 for later BT and wifi use. + hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); + + while (AVAILABLE_EFUSE_ADDR(efuse_addr)) + { + if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == _FALSE) + { + DBG_8192C(KERN_ERR "%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr); + break; + } + + if (efuse_data == 0xFF) break; + + if (EXT_HEADER(efuse_data)) + { + hoffset = GET_HDR_OFFSET_2_0(efuse_data); + efuse_addr++; + efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest); + if (ALL_WORDS_DISABLED(efuse_data)) + { + continue; + } + + hoffset |= ((efuse_data & 0xF0) >> 1); + hworden = efuse_data & 0x0F; + } + else + { + hoffset = (efuse_data>>4) & 0x0F; + hworden = efuse_data & 0x0F; + } + + word_cnts = Efuse_CalculateWordCnts(hworden); + efuse_addr += (word_cnts*2)+1; + } + + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + pEfuseHal->fakeEfuseUsedBytes = efuse_addr; +#else + fakeEfuseUsedBytes = efuse_addr; +#endif + } + else + { + rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8*)&efuse_addr); + } + DBG_8192C("%s: CurrentSize=%d\n", __FUNCTION__, efuse_addr); + + return efuse_addr; +} + +static u16 +hal_EfuseGetCurrentSize_BT( + PADAPTER padapter, + u8 bPseudoTest) +{ +#ifdef HAL_EFUSE_MEMORY + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; +#endif + u16 btusedbytes; + u16 efuse_addr; + u8 bank, startBank; + u8 hoffset=0, hworden=0; + u8 efuse_data, word_cnts=0; + u16 retU2=0; + + + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + btusedbytes = pEfuseHal->fakeBTEfuseUsedBytes; +#else + btusedbytes = fakeBTEfuseUsedBytes; +#endif + } + else + { + rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8*)&btusedbytes); + } + efuse_addr = (u16)((btusedbytes%EFUSE_BT_REAL_BANK_CONTENT_LEN)); + startBank = (u8)(1+(btusedbytes/EFUSE_BT_REAL_BANK_CONTENT_LEN)); + + DBG_8192C("%s: start from bank=%d addr=0x%X\n", __FUNCTION__, startBank, efuse_addr); + + EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &retU2, bPseudoTest); + + for (bank=startBank; bank<EFUSE_MAX_BANK; bank++) + { + if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE) + { + DBG_8192C(KERN_ERR "%s: switch bank(%d) Fail!!\n", __FUNCTION__, bank); + bank = EFUSE_MAX_BANK; + break; + } + + // only when bank is switched we have to reset the efuse_addr. + if (bank != startBank) + efuse_addr = 0; + + while (AVAILABLE_EFUSE_ADDR(efuse_addr)) + { + if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == _FALSE) + { + DBG_8192C(KERN_ERR "%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr); + bank = EFUSE_MAX_BANK; + break; + } + + if (efuse_data == 0xFF) break; + + if (EXT_HEADER(efuse_data)) + { + hoffset = GET_HDR_OFFSET_2_0(efuse_data); + efuse_addr++; + efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest); + if (ALL_WORDS_DISABLED(efuse_data)) + { + efuse_addr++; + continue; + } + + hoffset |= ((efuse_data & 0xF0) >> 1); + hworden = efuse_data & 0x0F; + } + else + { + hoffset = (efuse_data>>4) & 0x0F; + hworden = efuse_data & 0x0F; + } + word_cnts = Efuse_CalculateWordCnts(hworden); + //read next header + efuse_addr += (word_cnts*2)+1; + } + + // Check if we need to check next bank efuse + if (efuse_addr < retU2) + { + break;// don't need to check next bank. + } + } + + retU2 = ((bank-1)*EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr; + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + pEfuseHal->fakeBTEfuseUsedBytes = retU2; +#else + fakeBTEfuseUsedBytes = retU2; +#endif + } + else + { + rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8*)&retU2); + } + + DBG_8192C("%s: CurrentSize=%d\n", __FUNCTION__, retU2); + return retU2; +} + +static u16 +Hal_EfuseGetCurrentSize( + PADAPTER pAdapter, + u8 efuseType, + u8 bPseudoTest) +{ + u16 ret = 0; + + if (efuseType == EFUSE_WIFI) + ret = hal_EfuseGetCurrentSize_WiFi(pAdapter, bPseudoTest); + else + ret = hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest); + + return ret; +} + +static u8 +Hal_EfuseWordEnableDataWrite( + PADAPTER padapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + u8 bPseudoTest) +{ + u16 tmpaddr = 0; + u16 start_addr = efuse_addr; + u8 badworden = 0x0F; + u8 tmpdata[PGPKT_DATA_SIZE]; + + +// DBG_8192C("%s: efuse_addr=%#x word_en=%#x\n", __FUNCTION__, efuse_addr, word_en); + _rtw_memset(tmpdata, 0xFF, PGPKT_DATA_SIZE); + + if (!(word_en & BIT(0))) + { + tmpaddr = start_addr; + efuse_OneByteWrite(padapter, start_addr++, data[0], bPseudoTest); + efuse_OneByteWrite(padapter, start_addr++, data[1], bPseudoTest); + + efuse_OneByteRead(padapter, tmpaddr, &tmpdata[0], bPseudoTest); + efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[1], bPseudoTest); + if ((data[0]!=tmpdata[0]) || (data[1]!=tmpdata[1])) { + badworden &= (~BIT(0)); + } + } + if (!(word_en & BIT(1))) + { + tmpaddr = start_addr; + efuse_OneByteWrite(padapter, start_addr++, data[2], bPseudoTest); + efuse_OneByteWrite(padapter, start_addr++, data[3], bPseudoTest); + + efuse_OneByteRead(padapter, tmpaddr, &tmpdata[2], bPseudoTest); + efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[3], bPseudoTest); + if ((data[2]!=tmpdata[2]) || (data[3]!=tmpdata[3])) { + badworden &= (~BIT(1)); + } + } + if (!(word_en & BIT(2))) + { + tmpaddr = start_addr; + efuse_OneByteWrite(padapter, start_addr++, data[4], bPseudoTest); + efuse_OneByteWrite(padapter, start_addr++, data[5], bPseudoTest); + + efuse_OneByteRead(padapter, tmpaddr, &tmpdata[4], bPseudoTest); + efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[5], bPseudoTest); + if ((data[4]!=tmpdata[4]) || (data[5]!=tmpdata[5])) { + badworden &= (~BIT(2)); + } + } + if (!(word_en & BIT(3))) + { + tmpaddr = start_addr; + efuse_OneByteWrite(padapter, start_addr++, data[6], bPseudoTest); + efuse_OneByteWrite(padapter, start_addr++, data[7], bPseudoTest); + + efuse_OneByteRead(padapter, tmpaddr, &tmpdata[6], bPseudoTest); + efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[7], bPseudoTest); + if ((data[6]!=tmpdata[6]) || (data[7]!=tmpdata[7])) { + badworden &= (~BIT(3)); + } + } + + return badworden; +} + +static s32 +Hal_EfusePgPacketRead( + PADAPTER padapter, + u8 offset, + u8 *data, + u8 bPseudoTest) +{ + u8 bDataEmpty = _TRUE; + u8 efuse_data, word_cnts=0; + u16 efuse_addr=0; + u8 hoffset=0, hworden=0; + u8 i; + u8 max_section = 0; + s32 ret; + + + if (data == NULL) + return _FALSE; + + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, &max_section, bPseudoTest); + if (offset > max_section) + { + DBG_8192C("%s: Packet offset(%d) is illegal(>%d)!\n", __FUNCTION__, offset, max_section); + return _FALSE; + } + + _rtw_memset(data, 0xFF, PGPKT_DATA_SIZE); + ret = _TRUE; + + // + // <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. + // Skip dummy parts to prevent unexpected data read from Efuse. + // By pass right now. 2009.02.19. + // + while (AVAILABLE_EFUSE_ADDR(efuse_addr)) + { + if (efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest) == _FALSE) + { + ret = _FALSE; + break; + } + + if (efuse_data == 0xFF) break; + + if (EXT_HEADER(efuse_data)) + { + hoffset = GET_HDR_OFFSET_2_0(efuse_data); + efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest); + if (ALL_WORDS_DISABLED(efuse_data)) + { + DBG_8192C("%s: Error!! All words disabled!\n", __FUNCTION__); + continue; + } + + hoffset |= ((efuse_data & 0xF0) >> 1); + hworden = efuse_data & 0x0F; + } + else + { + hoffset = (efuse_data>>4) & 0x0F; + hworden = efuse_data & 0x0F; + } + + if (hoffset == offset) + { + for (i=0; i<EFUSE_MAX_WORD_UNIT; i++) + { + // Check word enable condition in the section + if (!(hworden & (0x01<<i))) + { + ReadEFuseByte(padapter, efuse_addr++, &efuse_data, bPseudoTest); +// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data); + data[i*2] = efuse_data; + + ReadEFuseByte(padapter, efuse_addr++, &efuse_data, bPseudoTest); +// DBG_8192C("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data); + data[(i*2)+1] = efuse_data; + } + } + } + else + { + word_cnts = Efuse_CalculateWordCnts(hworden); + efuse_addr += word_cnts*2; + } + } + + return ret; +} + +static u8 +hal_EfusePgCheckAvailableAddr( + PADAPTER pAdapter, + u8 efuseType, + u8 bPseudoTest) +{ + u16 max_available=0; + u16 current_size; + + + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &max_available, bPseudoTest); +// DBG_8192C("%s: max_available=%d\n", __FUNCTION__, max_available); + + current_size = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); + if (current_size >= max_available) + { + DBG_8192C("%s: Error!! current_size(%d)>max_available(%d)\n", __FUNCTION__, current_size, max_available); + return _FALSE; + } + return _TRUE; +} + +static void +hal_EfuseConstructPGPkt( + u8 offset, + u8 word_en, + u8 *pData, + PPGPKT_STRUCT pTargetPkt) +{ + _rtw_memset(pTargetPkt->data, 0xFF, PGPKT_DATA_SIZE); + pTargetPkt->offset = offset; + pTargetPkt->word_en = word_en; + efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); + pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); +} + +#if 0 +static u8 +wordEnMatched( + PPGPKT_STRUCT pTargetPkt, + PPGPKT_STRUCT pCurPkt, + u8 *pWden) +{ + u8 match_word_en = 0x0F; // default all words are disabled + u8 i; + + // check if the same words are enabled both target and current PG packet + if (((pTargetPkt->word_en & BIT(0)) == 0) && + ((pCurPkt->word_en & BIT(0)) == 0)) + { + match_word_en &= ~BIT(0); // enable word 0 + } + if (((pTargetPkt->word_en & BIT(1)) == 0) && + ((pCurPkt->word_en & BIT(1)) == 0)) + { + match_word_en &= ~BIT(1); // enable word 1 + } + if (((pTargetPkt->word_en & BIT(2)) == 0) && + ((pCurPkt->word_en & BIT(2)) == 0)) + { + match_word_en &= ~BIT(2); // enable word 2 + } + if (((pTargetPkt->word_en & BIT(3)) == 0) && + ((pCurPkt->word_en & BIT(3)) == 0)) + { + match_word_en &= ~BIT(3); // enable word 3 + } + + *pWden = match_word_en; + + if (match_word_en != 0xf) + return _TRUE; + else + return _FALSE; +} + +static u8 +hal_EfuseCheckIfDatafollowed( + PADAPTER pAdapter, + u8 word_cnts, + u16 startAddr, + u8 bPseudoTest) +{ + u8 bRet=_FALSE; + u8 i, efuse_data; + + for (i=0; i<(word_cnts*2); i++) + { + if (efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest) == _FALSE) + { + DBG_8192C("%s: efuse_OneByteRead FAIL!!\n", __FUNCTION__); + bRet = _TRUE; + break; + } + + if (efuse_data != 0xFF) + { + bRet = _TRUE; + break; + } + } + + return bRet; +} +#endif + +static u8 +hal_EfusePartialWriteCheck( + PADAPTER padapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; + u8 bRet=_FALSE; + u16 startAddr=0, efuse_max_available_len=0, efuse_max=0; + u8 efuse_data=0; +#if 0 + u8 i, cur_header=0; + u8 new_wden=0, matched_wden=0, badworden=0; + PGPKT_STRUCT curPkt; +#endif + + + EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, bPseudoTest); + EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, &efuse_max, bPseudoTest); + + if (efuseType == EFUSE_WIFI) + { + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + startAddr = (u16)pEfuseHal->fakeEfuseUsedBytes; +#else + startAddr = (u16)fakeEfuseUsedBytes; +#endif + } + else + { + rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8*)&startAddr); + } + } + else + { + if (bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + startAddr = (u16)pEfuseHal->fakeBTEfuseUsedBytes; +#else + startAddr = (u16)fakeBTEfuseUsedBytes; +#endif + } + else + { + rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8*)&startAddr); + } + } + startAddr %= efuse_max; +// DBG_8192C("%s: startAddr=%#X\n", __FUNCTION__, startAddr); + + while (1) + { + if (startAddr >= efuse_max_available_len) + { + bRet = _FALSE; + DBG_8192C("%s: startAddr(%d) >= efuse_max_available_len(%d)\n", + __FUNCTION__, startAddr, efuse_max_available_len); + break; + } + + if (efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF)) + { +#if 1 + bRet = _FALSE; + DBG_8192C("%s: Something Wrong! last bytes(%#X=0x%02X) is not 0xFF\n", + __FUNCTION__, startAddr, efuse_data); + break; +#else + if (EXT_HEADER(efuse_data)) + { + cur_header = efuse_data; + startAddr++; + efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest); + if (ALL_WORDS_DISABLED(efuse_data)) + { + DBG_8192C("%s: Error condition, all words disabled!", __FUNCTION__); + bRet = _FALSE; + break; + } + else + { + curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); + curPkt.word_en = efuse_data & 0x0F; + } + } + else + { + cur_header = efuse_data; + curPkt.offset = (cur_header>>4) & 0x0F; + curPkt.word_en = cur_header & 0x0F; + } + + curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); + // if same header is found but no data followed + // write some part of data followed by the header. + if ((curPkt.offset == pTargetPkt->offset) && + (hal_EfuseCheckIfDatafollowed(padapter, curPkt.word_cnts, startAddr+1, bPseudoTest) == _FALSE) && + wordEnMatched(pTargetPkt, &curPkt, &matched_wden) == _TRUE) + { + DBG_8192C("%s: Need to partial write data by the previous wrote header\n", __FUNCTION__); + // Here to write partial data + badworden = Efuse_WordEnableDataWrite(padapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest); + if (badworden != 0x0F) + { + u32 PgWriteSuccess=0; + // if write fail on some words, write these bad words again + if (efuseType == EFUSE_WIFI) + PgWriteSuccess = Efuse_PgPacketWrite(padapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + else + PgWriteSuccess = Efuse_PgPacketWrite_BT(padapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + + if (!PgWriteSuccess) + { + bRet = _FALSE; // write fail, return + break; + } + } + // partial write ok, update the target packet for later use + for (i=0; i<4; i++) + { + if ((matched_wden & (0x1<<i)) == 0) // this word has been written + { + pTargetPkt->word_en |= (0x1<<i); // disable the word + } + } + pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); + } + // read from next header + startAddr = startAddr + (curPkt.word_cnts*2) + 1; +#endif + } + else + { + // not used header, 0xff + *pAddr = startAddr; +// DBG_8192C("%s: Started from unused header offset=%d\n", __FUNCTION__, startAddr)); + bRet = _TRUE; + break; + } + } + + return bRet; +} + +static u8 +hal_EfusePgPacketWrite1ByteHeader( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u8 bRet=_FALSE; + u8 pg_header=0, tmp_header=0; + u16 efuse_addr=*pAddr; + u8 repeatcnt=0; + + +// DBG_8192C("%s\n", __FUNCTION__); + pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en; + + do { + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + if (tmp_header != 0xFF) break; + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + { + DBG_8192C("%s: Repeat over limit for pg_header!!\n", __FUNCTION__); + return _FALSE; + } + } while (1); + + if (tmp_header != pg_header) + { + DBG_8192C(KERN_ERR "%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); + return _FALSE; + } + + *pAddr = efuse_addr; + + return _TRUE; +} + +static u8 +hal_EfusePgPacketWrite2ByteHeader( + PADAPTER padapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u16 efuse_addr, efuse_max_available_len=0; + u8 pg_header=0, tmp_header=0; + u8 repeatcnt=0; + + +// DBG_8192C("%s\n", __FUNCTION__); + EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &efuse_max_available_len, bPseudoTest); + + efuse_addr = *pAddr; + if (efuse_addr >= efuse_max_available_len) + { + DBG_8192C("%s: addr(%d) over avaliable(%d)!!\n", __FUNCTION__, efuse_addr, efuse_max_available_len); + return _FALSE; + } + + pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; +// DBG_8192C("%s: pg_header=0x%x\n", __FUNCTION__, pg_header); + + do { + efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest); + if (tmp_header != 0xFF) break; + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + { + DBG_8192C("%s: Repeat over limit for pg_header!!\n", __FUNCTION__); + return _FALSE; + } + } while (1); + + if (tmp_header != pg_header) + { + DBG_8192C(KERN_ERR "%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); + return _FALSE; + } + + // to write ext_header + efuse_addr++; + pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; + + do { + efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest); + if (tmp_header != 0xFF) break; + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + { + DBG_8192C("%s: Repeat over limit for ext_header!!\n", __FUNCTION__); + return _FALSE; + } + } while (1); + + if (tmp_header != pg_header) //offset PG fail + { + DBG_8192C(KERN_ERR "%s: PG EXT Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); + return _FALSE; + } + + *pAddr = efuse_addr; + + return _TRUE; +} + +static u8 +hal_EfusePgPacketWriteHeader( + PADAPTER padapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u8 bRet=_FALSE; + + if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) + { + bRet = hal_EfusePgPacketWrite2ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + } + else + { + bRet = hal_EfusePgPacketWrite1ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + } + + return bRet; +} + +static u8 +hal_EfusePgPacketWriteData( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + u8 bPseudoTest) +{ + u16 efuse_addr; + u8 badworden; + + + efuse_addr = *pAddr; + badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); + if (badworden != 0x0F) + { + DBG_8192C("%s: Fail!!\n", __FUNCTION__); + return _FALSE; + } + +// DBG_8192C("%s: ok\n", __FUNCTION__); + return _TRUE; +} + +static s32 +Hal_EfusePgPacketWrite( + PADAPTER padapter, + u8 offset, + u8 word_en, + u8 *pData, + u8 bPseudoTest) +{ + PGPKT_STRUCT targetPkt; + u16 startAddr=0; + u8 efuseType=EFUSE_WIFI; + + if (!hal_EfusePgCheckAvailableAddr(padapter, efuseType, bPseudoTest)) + return _FALSE; + + hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); + + if (!hal_EfusePartialWriteCheck(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if (!hal_EfusePgPacketWriteHeader(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if (!hal_EfusePgPacketWriteData(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + return _TRUE; +} + +static u8 +Hal_EfusePgPacketWrite_BT( + PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *pData, + u8 bPseudoTest) +{ + PGPKT_STRUCT targetPkt; + u16 startAddr=0; + u8 efuseType=EFUSE_BT; + + if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) + return _FALSE; + + hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); + + if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + return _TRUE; +} + +static HAL_VERSION +ReadChipVersion8723A( + IN PADAPTER padapter + ) +{ + u32 value32; + HAL_VERSION ChipVersion; + HAL_DATA_TYPE *pHalData; + + + pHalData = GET_HAL_DATA(padapter); + + value32 = rtw_read32(padapter, REG_SYS_CFG); + ChipVersion.ICType = CHIP_8723A; + ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); + ChipVersion.RFType = RF_TYPE_1T1R ; + ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); + ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT) + + // For regulator mode. by tynli. 2011.01.14 + pHalData->RegulatorMode = ((value32 & SPS_SEL) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); + + value32 = rtw_read32(padapter, REG_GPIO_OUTSTS); + ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20); // ROM code version. + + // For multi-function consideration. Added by Roger, 2010.10.06. + pHalData->MultiFunc = RT_MULTI_FUNC_NONE; + value32 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL); + pHalData->MultiFunc |= ((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0); + pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0); + pHalData->MultiFunc |= ((value32 & GPS_FUNC_EN) ? RT_MULTI_FUNC_GPS : 0); + pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT); +//#if DBG +#if 1 + dump_chip_info(ChipVersion); +#endif + pHalData->VersionID = ChipVersion; + + if (IS_1T2R(ChipVersion)) + pHalData->rf_type = RF_1T2R; + else if (IS_2T2R(ChipVersion)) + pHalData->rf_type = RF_2T2R; + else + pHalData->rf_type = RF_1T1R; + + MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type); + + return ChipVersion; +} + + +static void rtl8723a_read_chip_version(PADAPTER padapter) +{ + ReadChipVersion8723A(padapter); +} + +//==================================================================================== +// +// 20100209 Joseph: +// This function is used only for 92C to set REG_BCN_CTRL(0x550) register. +// We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate +// the value of the register via atomic operation. +// This prevents from race condition when setting this register. +// The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. +// +void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits) +{ + PHAL_DATA_TYPE pHalData; + u32 addr; + u8 *pRegBcnCtrlVal; + + + pHalData = GET_HAL_DATA(padapter); + pRegBcnCtrlVal = (u8*)&pHalData->RegBcnCtrlVal; + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + { + addr = REG_BCN_CTRL_1; + pRegBcnCtrlVal++; + } + else +#endif + { + addr = REG_BCN_CTRL; + } + + *pRegBcnCtrlVal = rtw_read8(padapter, addr); + *pRegBcnCtrlVal |= SetBits; + *pRegBcnCtrlVal &= ~ClearBits; + +#if 0 +//#ifdef CONFIG_SDIO_HCI + if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)) + *pRegBcnCtrlVal |= EN_TXBCN_RPT; +#endif + + rtw_write8(padapter, addr, *pRegBcnCtrlVal); +} + +void rtl8723a_InitBeaconParameters(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + rtw_write16(padapter, REG_BCN_CTRL, 0x1010); + pHalData->RegBcnCtrlVal = 0x1010; + + // TODO: Remove these magic number + rtw_write16(padapter, REG_TBTT_PROHIBIT, 0x6404);// ms + // Firmware will control REG_DRVERLYINT when power saving is enable, + // so don't set this register on STA mode. + if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _FALSE) + rtw_write8(padapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME); // 5ms + rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms + + // Suggested by designer timchen. Change beacon AIFS to the largest number + // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 + rtw_write16(padapter, REG_BCNTCFG, 0x660F); +} + +void rtl8723a_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode) +{ +#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING + rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); +#else + //rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); +#endif +} + +static void ResumeTxBeacon(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value + // which should be read from register to a global variable. + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ResumeTxBeacon\n")); + + pHalData->RegFwHwTxQCtrl |= BIT(6); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl); + rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff); + pHalData->RegReg542 |= BIT(0); + rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); +} + +static void StopTxBeacon(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value + // which should be read from register to a global variable. + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+StopTxBeacon\n")); + + pHalData->RegFwHwTxQCtrl &= ~BIT(6); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl); + rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64); + pHalData->RegReg542 &= ~BIT(0); + rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); + + CheckFwRsvdPageContent(padapter); // 2010.06.23. Added by tynli. +} + +static void _BeaconFunctionEnable(PADAPTER padapter, u8 Enable, u8 Linked) +{ + SetBcnCtrlReg(padapter, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB, 0); + rtw_write8(padapter, REG_RD_CTRL+1, 0x6F); +} + +static void rtl8723a_SetBeaconRelatedRegisters(PADAPTER padapter) +{ + u32 value32; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + + + //reset TSF, enable update TSF, correcting TSF On Beacon + + //REG_BCN_INTERVAL + //REG_BCNDMATIM + //REG_ATIMWND + //REG_TBTT_PROHIBIT + //REG_DRVERLYINT + //REG_BCN_MAX_ERR + //REG_BCNTCFG //(0x510) + //REG_DUAL_TSF_RST + //REG_BCN_CTRL //(0x550) + + // + // ATIM window + // + rtw_write16(padapter, REG_ATIMWND, 2); + + // + // Beacon interval (in unit of TU). + // + rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); + + rtl8723a_InitBeaconParameters(padapter); + + rtw_write8(padapter, REG_SLOT, 0x09); + + // + // Reset TSF Timer to zero, added by Roger. 2008.06.24 + // + value32 = rtw_read32(padapter, REG_TCR); + value32 &= ~TSFRST; + rtw_write32(padapter, REG_TCR, value32); + + value32 |= TSFRST; + rtw_write32(padapter, REG_TCR, value32); + + // NOTE: Fix test chip's bug (about contention windows's randomness) + if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE) == _TRUE) + { + rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); + rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); + } + + _BeaconFunctionEnable(padapter, _TRUE, _TRUE); + + ResumeTxBeacon(padapter); + SetBcnCtrlReg(padapter, DIS_BCNQ_SUB, 0); +} + +void rtl8723a_GetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + BOOLEAN bSet) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T podmpriv = &pHalData->odmpriv; + switch(eVariable){ + case HAL_ODM_STA_INFO: + break; + default: + break; + } +} + +void rtl8723a_SetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + BOOLEAN bSet) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T podmpriv = &pHalData->odmpriv; + switch(eVariable){ + case HAL_ODM_STA_INFO: + { + struct sta_info *psta = (struct sta_info *)pValue1; + if(bSet){ + DBG_8192C("Set STA_(%d) info\n",psta->mac_id); + ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); + } + else{ + DBG_8192C("Clean STA_(%d) info\n",psta->mac_id); + ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); + } + } + break; + case HAL_ODM_P2P_STATE: + ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); + break; + case HAL_ODM_WIFI_DISPLAY_STATE: + ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); + break; + default: + break; + } +} +void hal_notch_filter_8723a(_adapter *adapter, bool enable) +{ + if (enable) { + DBG_871X("Enable notch filter\n"); + rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1); + } else { + DBG_871X("Disable notch filter\n"); + rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); + } +} + +s32 c2h_id_filter_ccx_8723a(u8 id) +{ + s32 ret = _FALSE; + if (id == C2H_CCX_TX_RPT) + ret = _TRUE; + + return ret; +} + +static s32 c2h_handler_8723a(_adapter *padapter, struct c2h_evt_hdr *c2h_evt) +{ + s32 ret = _SUCCESS; + u8 i = 0; + + if (c2h_evt == NULL) { + DBG_8192C("%s c2h_evt is NULL\n",__FUNCTION__); + ret = _FAIL; + goto exit; + } + + switch (c2h_evt->id) { + case C2H_DBG: + RT_TRACE(_module_hal_init_c_, _drv_info_, ("C2HCommandHandler: %s\n", c2h_evt->payload)); + break; + + case C2H_CCX_TX_RPT: + handle_txrpt_ccx_8723a(padapter, c2h_evt->payload); + break; + +#ifdef CONFIG_BT_COEXIST +#ifdef CONFIG_PCI_HCI + case C2H_BT_RSSI: + BT_FwC2hBtRssi(padapter, c2h_evt->payload); + break; +#endif +#endif + + case C2H_EXT_RA_RPT: +// C2HExtRaRptHandler(padapter, tmpBuf, C2hEvent.CmdLen); + break; + + case C2H_HW_INFO_EXCH: + RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], C2H_HW_INFO_EXCH\n")); + for (i = 0; i < c2h_evt->plen; i++) { + RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], tmpBuf[%d]=0x%x\n", i, c2h_evt->payload[i])); + } + break; + + case C2H_C2H_H2C_TEST: + RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], C2H_H2C_TEST\n")); + RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], tmpBuf[0]/[1]/[2]/[3]/[4]=0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x\n", + c2h_evt->payload[0], c2h_evt->payload[1], c2h_evt->payload[2], c2h_evt->payload[3], c2h_evt->payload[4])); + break; + +#ifdef CONFIG_BT_COEXIST + case C2H_BT_INFO: + DBG_8192C("%s , Got C2H_BT_INFO \n",__FUNCTION__); + BT_FwC2hBtInfo(padapter, c2h_evt->payload, c2h_evt->plen); + break; +#endif + +#ifdef CONFIG_MP_INCLUDED + case C2H_BT_MP_INFO: + DBG_8192C("%s , Got C2H_BT_MP_INFO \n",__FUNCTION__); + MPTBT_FwC2hBtMpCtrl(padapter, c2h_evt->payload, c2h_evt->plen); + break; +#endif + default: + ret = _FAIL; + break; + } + +exit: + return ret; +} + +void rtl8723a_set_hal_ops(struct hal_ops *pHalFunc) +{ + pHalFunc->free_hal_data = &rtl8723a_free_hal_data; + + pHalFunc->dm_init = &rtl8723a_init_dm_priv; + pHalFunc->dm_deinit = &rtl8723a_deinit_dm_priv; + + pHalFunc->read_chip_version = &rtl8723a_read_chip_version; + + pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; + pHalFunc->set_channel_handler = &PHY_SwChnl8192C; + + pHalFunc->hal_dm_watchdog = &rtl8723a_HalDmWatchDog; + + pHalFunc->SetBeaconRelatedRegistersHandler = &rtl8723a_SetBeaconRelatedRegisters; + + pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; + + pHalFunc->run_thread= &rtl8723a_start_thread; + pHalFunc->cancel_thread= &rtl8723a_stop_thread; + +#ifdef CONFIG_ANTENNA_DIVERSITY + pHalFunc->AntDivBeforeLinkHandler = &odm_AntDivBeforeLink8192C; + pHalFunc->AntDivCompareHandler = &odm_AntDivCompare8192C; +#endif + + pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg; + pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg; + pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg; + pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg; + + // Efuse related function + pHalFunc->EfusePowerSwitch = &Hal_EfusePowerSwitch; + pHalFunc->ReadEFuse = &Hal_ReadEFuse; + pHalFunc->EFUSEGetEfuseDefinition = &Hal_GetEfuseDefinition; + pHalFunc->EfuseGetCurrentSize = &Hal_EfuseGetCurrentSize; + pHalFunc->Efuse_PgPacketRead = &Hal_EfusePgPacketRead; + pHalFunc->Efuse_PgPacketWrite = &Hal_EfusePgPacketWrite; + pHalFunc->Efuse_WordEnableDataWrite = &Hal_EfuseWordEnableDataWrite; + pHalFunc->Efuse_PgPacketWrite_BT = &Hal_EfusePgPacketWrite_BT; + +#ifdef DBG_CONFIG_ERROR_DETECT + pHalFunc->sreset_init_value = &sreset_init_value; + pHalFunc->sreset_reset_value = &sreset_reset_value; + pHalFunc->silentreset = &sreset_reset; + pHalFunc->sreset_xmit_status_check = &rtl8723a_sreset_xmit_status_check; + pHalFunc->sreset_linked_status_check = &rtl8723a_sreset_linked_status_check; + pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; + pHalFunc->sreset_inprogress= &sreset_inprogress; +#endif + pHalFunc->GetHalODMVarHandler = &rtl8723a_GetHalODMVar; + pHalFunc->SetHalODMVarHandler = &rtl8723a_SetHalODMVar; + +#ifdef CONFIG_XMIT_THREAD_MODE + pHalFunc->xmit_thread_handler = &hal_xmit_handler; +#endif + pHalFunc->hal_notch_filter = &hal_notch_filter_8723a; + + pHalFunc->c2h_handler = c2h_handler_8723a; + pHalFunc->c2h_id_filter_ccx = c2h_id_filter_ccx_8723a; + +#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) + pHalFunc->hal_init_checkbthang_workqueue = &rtl8723a_init_checkbthang_workqueue; + pHalFunc->hal_free_checkbthang_workqueue = &rtl8723a_free_checkbthang_workqueue; + pHalFunc->hal_cancel_checkbthang_workqueue = &rtl8723a_cancel_checkbthang_workqueue; + pHalFunc->hal_checke_bt_hang = &rtl8723a_hal_check_bt_hang; +#endif +} + +void rtl8723a_InitAntenna_Selection(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u8 val; + + + pHalData = GET_HAL_DATA(padapter); + + val = rtw_read8(padapter, REG_LEDCFG2); + // Let 8051 take control antenna settting + val |= BIT(7); // DPDT_SEL_EN, 0x4C[23] + rtw_write8(padapter, REG_LEDCFG2, val); +} + +void rtl8723a_CheckAntenna_Selection(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u8 val; + + + pHalData = GET_HAL_DATA(padapter); + + val = rtw_read8(padapter, REG_LEDCFG2); + // Let 8051 take control antenna settting + if(!(val &BIT(7))){ + val |= BIT(7); // DPDT_SEL_EN, 0x4C[23] + rtw_write8(padapter, REG_LEDCFG2, val); + } +} +void rtl8723a_DeinitAntenna_Selection(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u8 val; + + + pHalData = GET_HAL_DATA(padapter); + val = rtw_read8(padapter, REG_LEDCFG2); + // Let 8051 take control antenna settting + val &= ~BIT(7); // DPDT_SEL_EN, clear 0x4C[23] + rtw_write8(padapter, REG_LEDCFG2, val); + +} + +void rtl8723a_init_default_value(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + struct dm_priv *pdmpriv; + u8 i; + + + pHalData = GET_HAL_DATA(padapter); + pdmpriv = &pHalData->dmpriv; + + // init default value + pHalData->fw_ractrl = _FALSE; + pHalData->bIQKInitialized = _FALSE; + if (!adapter_to_pwrctl(padapter)->bkeepfwalive) + pHalData->LastHMEBoxNum = 0; + + pHalData->bIQKInitialized = _FALSE; + + // init dm default value + pdmpriv->TM_Trigger = 0;//for IQK +// pdmpriv->binitialized = _FALSE; +// pdmpriv->prv_traffic_idx = 3; +// pdmpriv->initialize = 0; + + pdmpriv->ThermalValue_HP_index = 0; + for (i=0; i<HP_THERMAL_NUM; i++) + pdmpriv->ThermalValue_HP[i] = 0; + + // init Efuse variables + pHalData->EfuseUsedBytes = 0; + pHalData->EfuseUsedPercentage = 0; +#ifdef HAL_EFUSE_MEMORY + pHalData->EfuseHal.fakeEfuseBank = 0; + pHalData->EfuseHal.fakeEfuseUsedBytes = 0; + _rtw_memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE); + _rtw_memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN); + _rtw_memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN); + pHalData->EfuseHal.BTEfuseUsedBytes = 0; + pHalData->EfuseHal.BTEfuseUsedPercentage = 0; + _rtw_memset(pHalData->EfuseHal.BTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK*EFUSE_MAX_HW_SIZE); + _rtw_memset(pHalData->EfuseHal.BTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); + _rtw_memset(pHalData->EfuseHal.BTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); + pHalData->EfuseHal.fakeBTEfuseUsedBytes = 0; + _rtw_memset(pHalData->EfuseHal.fakeBTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK*EFUSE_MAX_HW_SIZE); + _rtw_memset(pHalData->EfuseHal.fakeBTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); + _rtw_memset(pHalData->EfuseHal.fakeBTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); +#endif +} + +u8 GetEEPROMSize8723A(PADAPTER padapter) +{ + u8 size = 0; + u32 cr; + + cr = rtw_read16(padapter, REG_9346CR); + // 6: EEPROM used is 93C46, 4: boot from E-Fuse. + size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; + + MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); + + return size; +} + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +//------------------------------------------------------------------------- +// +// LLT R/W/Init function +// +//------------------------------------------------------------------------- +s32 _LLTWrite(PADAPTER padapter, u32 address, u32 data) +{ + s32 status = _SUCCESS; + s32 count = 0; + u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); + u16 LLTReg = REG_LLT_INIT; + + + rtw_write32(padapter, LLTReg, value); + + //polling + do { + value = rtw_read32(padapter, LLTReg); + if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { + break; + } + + if (count > POLLING_LLT_THRESHOLD) { + RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address)); + status = _FAIL; + break; + } + } while (count++); + + return status; +} + +u8 _LLTRead(PADAPTER padapter, u32 address) +{ + s32 count = 0; + u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); + u16 LLTReg = REG_LLT_INIT; + + + rtw_write32(padapter, LLTReg, value); + + //polling and get value + do { + value = rtw_read32(padapter, LLTReg); + if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { + return (u8)value; + } + + if (count > POLLING_LLT_THRESHOLD) { + RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling read LLT done at address %d!\n", address)); + break; + } + } while (count++); + + return 0xFF; +} + +s32 InitLLTTable(PADAPTER padapter, u32 boundary) +{ + s32 status = _SUCCESS; + u32 i; + u32 txpktbuf_bndy = boundary; + u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + +#if 0 + if (IS_HARDWARE_TYPE_8192DU(padapter)) + { + if (pHalData->MacPhyMode92D != SINGLEMAC_SINGLEPHY) { + // for 92du two mac: The page size is different from 92c and 92s + txpktbuf_bndy = TX_PAGE_BOUNDARY_DUAL_MAC; + Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC; + } else { + txpktbuf_bndy = boundary; + Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER; + //txpktbuf_bndy =253; + //Last_Entry_Of_TxPktBuf=255; + } + } +#endif + for (i = 0; i < (txpktbuf_bndy - 1); i++) { + status = _LLTWrite(padapter, i, i + 1); + if (_SUCCESS != status) { + return status; + } + } + + // end of list + status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF); + if (_SUCCESS != status) { + return status; + } + + // Make the other pages as ring buffer + // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. + // Otherwise used as local loopback buffer. + for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { + status = _LLTWrite(padapter, i, (i + 1)); + if (_SUCCESS != status) { + return status; + } + } + + // Let last entry point to the start entry of ring buffer + status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); + if (_SUCCESS != status) { + return status; + } + + return status; +} +#endif + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +void _DisableGPIO(PADAPTER padapter) +{ +/*************************************** +j. GPIO_PIN_CTRL 0x44[31:0]=0x000 // +k.Value = GPIO_PIN_CTRL[7:0] +l. GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); //write external PIN level +m. GPIO_MUXCFG 0x42 [15:0] = 0x0780 +n. LEDCFG 0x4C[15:0] = 0x8080 +***************************************/ + u8 value8; + u16 value16; + u32 value32; + u32 u4bTmp; + + + //1. Disable GPIO[7:0] + rtw_write16(padapter, REG_GPIO_PIN_CTRL+2, 0x0000); + value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF; + u4bTmp = value32 & 0x000000FF; + value32 |= ((u4bTmp<<8) | 0x00FF0000); + rtw_write32(padapter, REG_GPIO_PIN_CTRL, value32); + + if (IS_HARDWARE_TYPE_8723AU(padapter) || + IS_HARDWARE_TYPE_8723AS(padapter)) + { + // + // <Roger_Notes> For RTL8723u multi-function configuration which was autoload from Efuse offset 0x0a and 0x0b, + // WLAN HW GPIO[9], GPS HW GPIO[10] and BT HW GPIO[11]. + // Added by Roger, 2010.10.07. + // + //2. Disable GPIO[8] and GPIO[12] + rtw_write16(padapter, REG_GPIO_IO_SEL_2, 0x0000); // Configure all pins as input mode. + value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F; + u4bTmp = value32 & 0x0000001F; +// if( IS_MULTI_FUNC_CHIP(padapter) ) +// value32 |= ((u4bTmp<<8) | 0x00110000); // Set pin 8 and pin 12 to output mode. +// else + value32 |= ((u4bTmp<<8) | 0x001D0000); // Set pin 8, 10, 11 and pin 12 to output mode. + rtw_write32(padapter, REG_GPIO_PIN_CTRL_2, value32); + } + else + { + //2. Disable GPIO[10:8] + rtw_write8(padapter, REG_MAC_PINMUX_CFG, 0x00); + value16 = rtw_read16(padapter, REG_GPIO_IO_SEL) & 0xFF0F; + value8 = (u8) (value16&0x000F); + value16 |= ((value8<<4) | 0x0780); + rtw_write16(padapter, REG_GPIO_IO_SEL, value16); + } + + //3. Disable LED0 & 1 + if(IS_HARDWARE_TYPE_8192DU(padapter)) + { + rtw_write16(padapter, REG_LEDCFG0, 0x8888); + } + else + { + rtw_write16(padapter, REG_LEDCFG0, 0x8080); + } +// RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n")); +} //end of _DisableGPIO() + +void _DisableRFAFEAndResetBB8192C(PADAPTER padapter) +{ +/************************************** +a. TXPAUSE 0x522[7:0] = 0xFF //Pause MAC TX queue +b. RF path 0 offset 0x00 = 0x00 // disable RF +c. APSD_CTRL 0x600[7:0] = 0x40 +d. SYS_FUNC_EN 0x02[7:0] = 0x16 //reset BB state machine +e. SYS_FUNC_EN 0x02[7:0] = 0x14 //reset BB state machine +***************************************/ + u8 eRFPath = 0, value8 = 0; + + rtw_write8(padapter, REG_TXPAUSE, 0xFF); + + PHY_SetRFReg(padapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); + + value8 |= APSDOFF; + rtw_write8(padapter, REG_APSD_CTRL, value8);//0x40 + + // Set BB reset at first + value8 = 0 ; + value8 |= (FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); + rtw_write8(padapter, REG_SYS_FUNC_EN, value8 );//0x16 + + // Set global reset. + value8 &= ~FEN_BB_GLB_RSTn; + rtw_write8(padapter, REG_SYS_FUNC_EN, value8); //0x14 + + // 2010/08/12 MH We need to set BB/GLBAL reset to save power for SS mode. + +// RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n")); +} + +void _DisableRFAFEAndResetBB(PADAPTER padapter) +{ +#if 0 + if (IS_HARDWARE_TYPE_8192D(padapter)) + _DisableRFAFEAndResetBB8192D(padapter); + else +#endif + _DisableRFAFEAndResetBB8192C(padapter); +} + +void _ResetDigitalProcedure1_92C(PADAPTER padapter, BOOLEAN bWithoutHWSM) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (IS_FW_81xxC(padapter) && (pHalData->FirmwareVersion <= 0x20)) + { + #if 0 +/***************************** + f. SYS_FUNC_EN 0x03[7:0]=0x54 // reset MAC register, DCORE + g. MCUFWDL 0x80[7:0]=0 // reset MCU ready status +******************************/ + u32 value32 = 0; + rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x54); + rtw_write8(padapter, REG_MCUFWDL, 0); + #else + /***************************** + f. MCUFWDL 0x80[7:0]=0 // reset MCU ready status + g. SYS_FUNC_EN 0x02[10]= 0 // reset MCU register, (8051 reset) + h. SYS_FUNC_EN 0x02[15-12]= 5 // reset MAC register, DCORE + i. SYS_FUNC_EN 0x02[10]= 1 // enable MCU register, (8051 enable) + ******************************/ + u16 valu16 = 0; + rtw_write8(padapter, REG_MCUFWDL, 0); + + valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN); + rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));//reset MCU ,8051 + + valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN)&0x0FFF; + rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 |(FEN_HWPDN|FEN_ELDR)));//reset MAC + + valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN); + rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));//enable MCU ,8051 + #endif + } + else + { + u8 retry_cnts = 0; + + // 2010/08/12 MH For USB SS, we can not stop 8051 when we are trying to + // enter IPS/HW&SW radio off. For S3/S4/S5/Disable, we can stop 8051 because + // we will init FW when power on again. + //if(!pDevice->RegUsbSS) + { // If we want to SS mode, we can not reset 8051. + if(rtw_read8(padapter, REG_MCUFWDL) & BIT1) + { //IF fw in RAM code, do reset + + + if(padapter->bFWReady) + { + // 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other + // HRCV INT to influence 8051 reset. + rtw_write8(padapter, REG_FWIMR, 0x20); + // 2011/02/15 MH According to Alex's suggestion, close mask to prevent incorrect FW write operation. + rtw_write8(padapter, REG_FTIMR, 0x00); + rtw_write8(padapter, REG_FSIMR, 0x00); + + rtw_write8(padapter, REG_HMETFR+3, 0x20);//8051 reset by self + + while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(padapter, REG_SYS_FUNC_EN))) + { + rtw_udelay_os(50);//us + // 2010/08/25 For test only We keep on reset 5051 to prevent fail. + //rtw_write8(padapter, REG_HMETFR+3, 0x20);//8051 reset by self + } +// RT_ASSERT((retry_cnts < 100), ("8051 reset failed!\n")); + + if (retry_cnts >= 100) + { + // if 8051 reset fail we trigger GPIO 0 for LA + //rtw_write32( padapter, + // REG_GPIO_PIN_CTRL, + // 0x00010100); + // 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly. + rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x50); //Reset MAC and Enable 8051 + rtw_mdelay_os(10); + } +// else +// RT_TRACE(COMP_INIT, DBG_LOUD, ("=====> 8051 reset success (%d) .\n",retry_cnts)); + } + } +// else +// { +// RT_TRACE(COMP_INIT, DBG_LOUD, ("=====> 8051 in ROM.\n")); +// } + rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x54); //Reset MAC and Enable 8051 + rtw_write8(padapter, REG_MCUFWDL, 0); + } + } + + //if(pDevice->RegUsbSS) + //bWithoutHWSM = TRUE; // Sugest by Filen and Issau. + + if(bWithoutHWSM) + { + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + /***************************** + Without HW auto state machine + g. SYS_CLKR 0x08[15:0] = 0x30A3 //disable MAC clock + h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL + i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK + j. SYS_ISO_CTRL 0x00[7:0] = 0xF9 // isolated digital to PON + ******************************/ + //rtw_write16(padapter, REG_SYS_CLKR, 0x30A3); + //if(!pDevice->RegUsbSS) + // 2011/01/26 MH SD4 Scott suggest to fix UNC-B cut bug. + //if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) + //rtw_write16(padapter, REG_SYS_CLKR, (0x70A3|BIT6)); //modify to 0x70A3 by Scott. + //else + rtw_write16(padapter, REG_SYS_CLKR, 0x70A3); //modify to 0x70A3 by Scott. + rtw_write8(padapter, REG_AFE_PLL_CTRL, 0x80); + rtw_write16(padapter, REG_AFE_XTAL_CTRL, 0x880F); + //if(!pDevice->RegUsbSS) + rtw_write8(padapter, REG_SYS_ISO_CTRL, 0xF9); + } + else + { + // Disable all RF/BB power + rtw_write8(padapter, REG_RF_CTRL, 0x00); + } +// RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n")); + +} + +void _ResetDigitalProcedure1(PADAPTER padapter, BOOLEAN bWithoutHWSM) +{ +#if 0 + if(IS_HARDWARE_TYPE_8192D(padapter)) + _ResetDigitalProcedure1_92D(padapter, bWithoutHWSM); + else +#endif + _ResetDigitalProcedure1_92C(padapter, bWithoutHWSM); +} + +void _ResetDigitalProcedure2(PADAPTER padapter) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +/***************************** +k. SYS_FUNC_EN 0x03[7:0] = 0x44 // disable ELDR runction +l. SYS_CLKR 0x08[15:0] = 0x3083 // disable ELDR clock +m. SYS_ISO_CTRL 0x01[7:0] = 0x83 // isolated ELDR to PON +******************************/ + //rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x44); //marked by Scott. + // 2011/01/26 MH SD4 Scott suggest to fix UNC-B cut bug. + //if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) + //rtw_write16(padapter, REG_SYS_CLKR, 0x70a3|BIT6); + //else + rtw_write16(padapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott. + rtw_write8(padapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott. +} + +void _DisableAnalog(PADAPTER padapter, BOOLEAN bWithoutHWSM) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u16 value16 = 0; + u8 value8 = 0; + + + if (bWithoutHWSM) + { + /***************************** + n. LDOA15_CTRL 0x20[7:0] = 0x04 // disable A15 power + o. LDOV12D_CTRL 0x21[7:0] = 0x54 // disable digital core power + r. When driver call disable, the ASIC will turn off remaining clock automatically + ******************************/ + + rtw_write8(padapter, REG_LDOA15_CTRL, 0x04); + //rtw_write8(padapter, REG_LDOV12D_CTRL, 0x54); + + value8 = rtw_read8(padapter, REG_LDOV12D_CTRL); + value8 &= (~LDV12_EN); + rtw_write8(padapter, REG_LDOV12D_CTRL, value8); +// RT_TRACE(COMP_INIT, DBG_LOUD, (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8)); + } + + /***************************** + h. SPS0_CTRL 0x11[7:0] = 0x23 //enter PFM mode + i. APS_FSMCO 0x04[15:0] = 0x4802 // set USB suspend + ******************************/ + value8 = 0x23; + if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) + value8 |= BIT3; + + rtw_write8(padapter, REG_SPS0_CTRL, value8); + + if(bWithoutHWSM) + { + //value16 |= (APDM_HOST | /*AFSM_HSUS |*/PFM_ALDN); + // 2010/08/31 According to Filen description, we need to use HW to shut down 8051 automatically. + // Becasue suspend operatione need the asistance of 8051 to wait for 3ms. + value16 |= (APDM_HOST | AFSM_HSUS | PFM_ALDN); + } + else + { + value16 |= (APDM_HOST | AFSM_HSUS | PFM_ALDN); + } + + rtw_write16(padapter, REG_APS_FSMCO, value16);//0x4802 + + rtw_write8(padapter, REG_RSV_CTRL, 0x0e); + +#if 0 + //tynli_test for suspend mode. + if(!bWithoutHWSM){ + rtw_write8(padapter, 0xfe10, 0x19); + } +#endif + +// RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16)); +} + +// HW Auto state machine +s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU) +{ + int rtStatus = _SUCCESS; + + + if (padapter->bSurpriseRemoved){ + return rtStatus; + } + //==== RF Off Sequence ==== + _DisableRFAFEAndResetBB(padapter); + + // ==== Reset digital sequence ====== + _ResetDigitalProcedure1(padapter, _FALSE); + + // ==== Pull GPIO PIN to balance level and LED control ====== + _DisableGPIO(padapter); + + // ==== Disable analog sequence === + _DisableAnalog(padapter, _FALSE); + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======> Card disable finished.\n")); + + return rtStatus; +} + +// without HW Auto state machine +s32 CardDisableWithoutHWSM(PADAPTER padapter) +{ + s32 rtStatus = _SUCCESS; + + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Card Disable Without HWSM .\n")); + if (padapter->bSurpriseRemoved) { + return rtStatus; + } + + //==== RF Off Sequence ==== + _DisableRFAFEAndResetBB(padapter); + + // ==== Reset digital sequence ====== + _ResetDigitalProcedure1(padapter, _TRUE); + + // ==== Pull GPIO PIN to balance level and LED control ====== + _DisableGPIO(padapter); + + // ==== Reset digital sequence ====== + _ResetDigitalProcedure2(padapter); + + // ==== Disable analog sequence === + _DisableAnalog(padapter, _TRUE); + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== Card Disable Without HWSM .\n")); + return rtStatus; +} + +#endif + +void +Hal_InitPGData( + PADAPTER padapter, + u8 *PROMContent) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u32 i; + u16 value16; + + if(_FALSE == pEEPROM->bautoload_fail_flag) + { // autoload OK. +// if (IS_BOOT_FROM_EEPROM(padapter)) + if (_TRUE == pEEPROM->EepromOrEfuse) + { + // Read all Content from EEPROM or EFUSE. + for(i = 0; i < HWSET_MAX_SIZE; i += 2) + { +// value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); +// *((u16*)(&PROMContent[i])) = value16; + } + } + else + { + // Read EFUSE real map to shadow. + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE); + } + } + else + {//autoload fail + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n")); +// pHalData->AutoloadFailFlag = _TRUE; + //update to default value 0xFF + if (_FALSE == pEEPROM->EepromOrEfuse) + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE); + } +} + +void +Hal_EfuseParseIDCode( + IN PADAPTER padapter, + IN u8 *hwinfo + ) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u16 EEPROMId; + + + // Checl 0x8129 again for making sure autoload status!! + EEPROMId = le16_to_cpu(*((u16*)hwinfo)); + if (EEPROMId != RTL_EEPROM_ID) + { + DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); + pEEPROM->bautoload_fail_flag = _TRUE; + } + else + { + pEEPROM->bautoload_fail_flag = _FALSE; + } + + RT_TRACE(_module_hal_init_c_, _drv_info_, ("EEPROM ID=0x%04x\n", EEPROMId)); +} + +static void +Hal_EEValueCheck( + IN u8 EEType, + IN PVOID pInValue, + OUT PVOID pOutValue + ) +{ + switch(EEType) + { + case EETYPE_TX_PWR: + { + u8 *pIn, *pOut; + pIn = (u8*)pInValue; + pOut = (u8*)pOutValue; + if(*pIn >= 0 && *pIn <= 63) + { + *pOut = *pIn; + } + else + { + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("EETYPE_TX_PWR, value=%d is invalid, set to default=0x%x\n", + *pIn, EEPROM_Default_TxPowerLevel)); + *pOut = EEPROM_Default_TxPowerLevel; + } + } + break; + default: + break; + } +} + +static void +Hal_ReadPowerValueFromPROM_8723A( + IN PTxPowerInfo pwrInfo, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + u32 rfPath, eeAddr, group, rfPathMax=1; + + _rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo)); + + if(AutoLoadFail) + { + for (group = 0; group < MAX_CHNL_GROUP; group++) + { + for(rfPath = 0 ; rfPath < rfPathMax ; rfPath++) + { + pwrInfo->CCKIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; + pwrInfo->HT40_1SIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; + pwrInfo->HT40_2SIndexDiff[rfPath][group]= EEPROM_Default_HT40_2SDiff; + pwrInfo->HT20IndexDiff[rfPath][group] = EEPROM_Default_HT20_Diff; + pwrInfo->OFDMIndexDiff[rfPath][group] = EEPROM_Default_LegacyHTTxPowerDiff; + pwrInfo->HT40MaxOffset[rfPath][group] = EEPROM_Default_HT40_PwrMaxOffset; + pwrInfo->HT20MaxOffset[rfPath][group] = EEPROM_Default_HT20_PwrMaxOffset; + } + } + pwrInfo->TSSI_A[0] = EEPROM_Default_TSSI; + return; + } + + for(rfPath = 0 ; rfPath < rfPathMax ; rfPath++) + { + for (group = 0; group < MAX_CHNL_GROUP; group++) + { + eeAddr = EEPROM_CCK_TX_PWR_INX_8723A + (rfPath * 3) + group; + //pwrInfo->CCKIndex[rfPath][group] = PROMContent[eeAddr]; + Hal_EEValueCheck(EETYPE_TX_PWR, &PROMContent[eeAddr], &pwrInfo->CCKIndex[rfPath][group]); + eeAddr = EEPROM_HT40_1S_TX_PWR_INX_8723A + (rfPath * 3) + group; + //pwrInfo->HT40_1SIndex[rfPath][group] = PROMContent[eeAddr]; + Hal_EEValueCheck(EETYPE_TX_PWR, &PROMContent[eeAddr], &pwrInfo->HT40_1SIndex[rfPath][group]); + } + } + + for (group = 0; group < MAX_CHNL_GROUP; group++) + { + for(rfPath = 0 ; rfPath < rfPathMax ; rfPath++) + { + pwrInfo->HT40_2SIndexDiff[rfPath][group] = 0; + pwrInfo->HT20IndexDiff[rfPath][group] = + (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF_8723A + group] >> (rfPath * 4)) & 0xF; + if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0; + + pwrInfo->OFDMIndexDiff[rfPath][group] = + (PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF_8723A + group] >> (rfPath * 4)) & 0xF; + + pwrInfo->HT40MaxOffset[rfPath][group] = + (PROMContent[EEPROM_HT40_MAX_PWR_OFFSET_8723A + group] >> (rfPath * 4)) & 0xF; + + pwrInfo->HT20MaxOffset[rfPath][group] = + (PROMContent[EEPROM_HT20_MAX_PWR_OFFSET_8723A + group] >> (rfPath * 4)) & 0xF; + } + } + + pwrInfo->TSSI_A[0] = PROMContent[EEPROM_TSSI_A_8723A]; +} + +static u8 +Hal_GetChnlGroup( + IN u8 chnl + ) +{ + u8 group=0; + + if (chnl < 3) // Cjanel 1-3 + group = 0; + else if (chnl < 9) // Channel 4-9 + group = 1; + else // Channel 10-14 + group = 2; + + return group; +} + +void +Hal_EfuseParseTxPowerInfo_8723A( + IN PADAPTER padapter, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + TxPowerInfo pwrInfo; + u8 rfPath, ch, group, rfPathMax=1; + u8 pwr, diff; + + Hal_ReadPowerValueFromPROM_8723A(&pwrInfo, PROMContent, AutoLoadFail); + for(rfPath = 0 ; rfPath < rfPathMax ; rfPath++) + { + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) + { + group = Hal_GetChnlGroup(ch); + + pHalData->TxPwrLevelCck[rfPath][ch] = pwrInfo.CCKIndex[rfPath][group]; + pHalData->TxPwrLevelHT40_1S[rfPath][ch] = pwrInfo.HT40_1SIndex[rfPath][group]; + + pHalData->TxPwrHt20Diff[rfPath][ch] = pwrInfo.HT20IndexDiff[rfPath][group]; + pHalData->TxPwrLegacyHtDiff[rfPath][ch] = pwrInfo.OFDMIndexDiff[rfPath][group]; + pHalData->PwrGroupHT20[rfPath][ch] = pwrInfo.HT20MaxOffset[rfPath][group]; + pHalData->PwrGroupHT40[rfPath][ch] = pwrInfo.HT40MaxOffset[rfPath][group]; + + pwr = pwrInfo.HT40_1SIndex[rfPath][group]; + diff = pwrInfo.HT40_2SIndexDiff[rfPath][group]; + + pHalData->TxPwrLevelHT40_2S[rfPath][ch] = (pwr > diff) ? (pwr - diff) : 0; + } + } +#if 1 + for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++) + { + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, + ("RF(%u)-Ch(%u) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", + rfPath, ch, pHalData->TxPwrLevelCck[rfPath][ch], + pHalData->TxPwrLevelHT40_1S[rfPath][ch], + pHalData->TxPwrLevelHT40_2S[rfPath][ch])); + + } + } + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RF-A Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch, + pHalData->TxPwrHt20Diff[RF_PATH_A][ch], pHalData->TxPwrHt20Diff[RF_PATH_A][ch])); + } + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RF-A Legacy to Ht40 Diff[%u] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch])); + } + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RF-B Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch, + pHalData->TxPwrHt20Diff[RF_PATH_B][ch], pHalData->TxPwrHt20Diff[RF_PATH_B][ch])); + } + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RF-B Legacy to HT40 Diff[%u] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch])); + } +#endif + if(!AutoLoadFail) + { + struct registry_priv *registry_par = &padapter->registrypriv; + if( registry_par->regulatory_tid == 0xff){ + if( PROMContent[RF_OPTION1_8723A] == 0xff) + pHalData->EEPROMRegulatory = 0 ; + else + pHalData->EEPROMRegulatory = PROMContent[RF_OPTION1_8723A]&0x7; //bit0~2 + } + else{ + pHalData->EEPROMRegulatory = registry_par->regulatory_tid; + } + } + else + { + pHalData->EEPROMRegulatory = 0; + } + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory)); + + if(!AutoLoadFail) + pHalData->bTXPowerDataReadFromEEPORM = _TRUE; +} + +VOID +Hal_EfuseParseBTCoexistInfo_8723A( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 tempval; + u32 tmpu4; + + if (!AutoLoadFail) + { + tmpu4 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL); + if (tmpu4 & BT_FUNC_EN) + pHalData->EEPROMBluetoothCoexist = 1; + else + pHalData->EEPROMBluetoothCoexist = 0; + pHalData->EEPROMBluetoothType = BT_RTL8723A; + + // The following need to be checked with newer version of + // eeprom spec + tempval = hwinfo[RF_OPTION4_8723A]; + pHalData->EEPROMBluetoothAntNum = (tempval&0x1); // bit [0] + pHalData->EEPROMBluetoothAntIsolation = ((tempval&0x10)>>4); // bit [4] + pHalData->EEPROMBluetoothRadioShared = ((tempval&0x20)>>5); // bit [5] + } + else + { + pHalData->EEPROMBluetoothCoexist = 0; + pHalData->EEPROMBluetoothType = BT_RTL8723A; + pHalData->EEPROMBluetoothAntNum = Ant_x2; + pHalData->EEPROMBluetoothAntIsolation = 0; + pHalData->EEPROMBluetoothRadioShared = BT_Radio_Shared; + } +#ifdef CONFIG_BT_COEXIST + BT_InitHalVars(padapter); +#endif +} + +VOID +Hal_EfuseParseEEPROMVer( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if(!AutoLoadFail) + pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_8723A]; + else + pHalData->EEPROMVersion = 1; + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n", + pHalData->EEPROMVersion)); +} + +VOID +rtl8723a_EfuseParseChnlPlan( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + padapter->mlmepriv.ChannelPlan = hal_com_get_channel_plan( + padapter + , hwinfo?hwinfo[EEPROM_ChannelPlan_8723A]:0xFF + , padapter->registrypriv.channel_plan + , RT_CHANNEL_DOMAIN_WORLD_WIDE_13 + , AutoLoadFail + ); + + DBG_871X("mlmepriv.ChannelPlan=0x%02x\n", padapter->mlmepriv.ChannelPlan); +} + +VOID +Hal_EfuseParseCustomerID( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (!AutoLoadFail) + { + pHalData->EEPROMCustomerID = hwinfo[EEPROM_CustomID_8723A]; + pHalData->EEPROMSubCustomerID = hwinfo[EEPROM_SubCustomID_8723A]; + } + else + { + pHalData->EEPROMCustomerID = 0; + pHalData->EEPROMSubCustomerID = 0; + } + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID)); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("EEPROM SubCustomer ID: 0x%02x\n", pHalData->EEPROMSubCustomerID)); +} + +VOID +Hal_EfuseParseAntennaDiversity( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ +#ifdef CONFIG_ANTENNA_DIVERSITY + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct registry_priv *registry_par = &padapter->registrypriv; + + + if(!AutoLoadFail) + { + // Antenna Diversity setting. + if(registry_par->antdiv_cfg == 2) // 2: From Efuse + pHalData->AntDivCfg = (hwinfo[RF_OPTION1_8723A]&0x18)>>3; + else + pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, + + if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1) + pHalData->AntDivCfg = 0; + + DBG_8192C("### AntDivCfg(%x) EEPROMBluetoothCoexist(%x) EEPROMBluetoothAntNum(%x)\n" + ,pHalData->AntDivCfg,pHalData->EEPROMBluetoothCoexist,pHalData->EEPROMBluetoothAntNum); + } + else + { + pHalData->AntDivCfg = 0; + } + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("SWAS: bHwAntDiv = %x\n", pHalData->AntDivCfg)); +#endif +} + +VOID +Hal_EfuseParseRateIndicationOption( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + + // Rate indication option + if(pMgntInfo->ShowRateMode == 0) + { + if(!AutoLoadFail) + { + switch((hwinfo[RF_OPTION3_8723A] & 0x0c) >> 2) + { + case 1: // Rx rate + pMgntInfo->bForcedShowRxRate = TRUE; + break; + + case 2: // Max Rx rate + pMgntInfo->bForcedShowRateStill = TRUE; + pMgntInfo->bForcedShowRxRate = TRUE; + break; + + default: + break; + } + } + else + { + pMgntInfo->bForcedShowRxRate = TRUE; + } + } + else if(pMgntInfo->ShowRateMode == 2) + { + pMgntInfo->bForcedShowRxRate = TRUE; + } + else if(pMgntInfo->ShowRateMode == 3) + { + pMgntInfo->bForcedShowRxRate = TRUE; + pMgntInfo->bForcedShowRxRate = TRUE; + } +#endif +} + +void +Hal_EfuseParseXtal_8723A( + PADAPTER pAdapter, + u8 *hwinfo, + u8 AutoLoadFail + ) +{ +#if 1 + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + + if (!AutoLoadFail){ + pHalData->CrystalCap = hwinfo[EEPROM_XTAL_K_8723A]; + if(pHalData->CrystalCap == 0xFF) + pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723A; + } + else{ + pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723A; + } + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: CrystalCap=0x%2x\n", __FUNCTION__, pHalData->CrystalCap)); +#endif +} + +void +Hal_EfuseParseThermalMeter_8723A( + PADAPTER padapter, + u8 *PROMContent, + u8 AutoloadFail + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + // + // ThermalMeter from EEPROM + // + if (_FALSE == AutoloadFail) + pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_8723A]; + else + pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter; + + if ((pHalData->EEPROMThermalMeter == 0xff) || (_TRUE == AutoloadFail)) + { + pHalData->bAPKThermalMeterIgnore = _TRUE; + pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter; + } + + DBG_8192C("%s: ThermalMeter=0x%x\n", __FUNCTION__, pHalData->EEPROMThermalMeter); +} + +VOID +Hal_InitChannelPlan( + IN PADAPTER padapter + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if((pMgntInfo->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)) + { + pMgntInfo->ChannelPlan = hal_MapChannelPlan8192C(padapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK)))); + pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? _TRUE : _FALSE; // User cannot change channel plan. + } + else + { + pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan; + } + + switch(pMgntInfo->ChannelPlan) + { + case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN: + { + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo); + + pDot11dInfo->bEnabled = TRUE; + } + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n")); + break; + + default: //for MacOSX compiler warning. + break; + } + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan)); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt ChannelPlan = %d\n" , pMgntInfo->ChannelPlan)); +#endif +} + +#ifdef CONFIG_RF_GAIN_OFFSET +void Hal_ReadRFGainOffset( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail) +{ + // + // BB_RF Gain Offset from EEPROM + // + if(!AutoloadFail ){ + Adapter->eeprompriv.EEPROMRFGainOffset =PROMContent[EEPROM_RF_GAIN_OFFSET]; + DBG_871X("AutoloadFail =%x,\n", AutoloadFail); + Adapter->eeprompriv.EEPROMRFGainVal=EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL); + DBG_871X("Adapter->eeprompriv.EEPROMRFGainVal=%x\n", Adapter->eeprompriv.EEPROMRFGainVal); + } + else{ + Adapter->eeprompriv.EEPROMRFGainOffset = 0; + Adapter->eeprompriv.EEPROMRFGainVal=0xFF; + DBG_871X("else AutoloadFail =%x,\n", AutoloadFail); + } + DBG_871X("EEPRORFGainOffset = 0x%02x\n", Adapter->eeprompriv.EEPROMRFGainOffset); +} +#endif //CONFIG_RF_GAIN_OFFSET + + + + +void rtl8723a_cal_txdesc_chksum(struct tx_desc *ptxdesc) +{ + u16 *usPtr = (u16*)ptxdesc; + u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times + u32 index; + u16 checksum = 0; + + + // Clear first + ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); + + for (index = 0; index < count; index++) { + checksum ^= le16_to_cpu(*(usPtr + index)); + } + + ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff); +} + +static void fill_txdesc_sectype(struct pkt_attrib *pattrib, PTXDESC ptxdesc) +{ + if ((pattrib->encrypt > 0) && !pattrib->bswenc) + { + switch (pattrib->encrypt) + { + // SEC_TYPE + case _WEP40_: + case _WEP104_: + case _TKIP_: + case _TKIP_WTMIC_: + ptxdesc->sectype = 1; + break; + +#ifdef CONFIG_WAPI_SUPPORT + case _SMS4_: + ptxdesc->sectype = 2; + break; +#endif + case _AES_: + ptxdesc->sectype = 3; + break; + + case _NO_PRIVACY_: + default: + break; + } + } +} + +static void fill_txdesc_vcs(struct pkt_attrib *pattrib, PTXDESC ptxdesc) +{ + //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); + + switch (pattrib->vcs_mode) + { + case RTS_CTS: + ptxdesc->rtsen = 1; + break; + + case CTS_TO_SELF: + ptxdesc->cts2self = 1; + break; + + case NONE_VCS: + default: + break; + } + + if(pattrib->vcs_mode) { + ptxdesc->hw_rts_en = 1; // ENABLE HW RTS + + // Set RTS BW + if(pattrib->ht_en) + { + if (pattrib->bwmode & HT_CHANNEL_WIDTH_40) + ptxdesc->rts_bw = 1; + + switch (pattrib->ch_offset) + { + case HAL_PRIME_CHNL_OFFSET_DONT_CARE: + ptxdesc->rts_sc = 0; + break; + + case HAL_PRIME_CHNL_OFFSET_LOWER: + ptxdesc->rts_sc = 1; + break; + + case HAL_PRIME_CHNL_OFFSET_UPPER: + ptxdesc->rts_sc = 2; + break; + + default: + ptxdesc->rts_sc = 3; // Duplicate + break; + } + } + } +} + +static void fill_txdesc_phy(struct pkt_attrib *pattrib, PTXDESC ptxdesc) +{ + //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); + + if (pattrib->ht_en) + { + if (pattrib->bwmode & HT_CHANNEL_WIDTH_40) + ptxdesc->data_bw = 1; + + switch (pattrib->ch_offset) + { + case HAL_PRIME_CHNL_OFFSET_DONT_CARE: + ptxdesc->data_sc = 0; + break; + + case HAL_PRIME_CHNL_OFFSET_LOWER: + ptxdesc->data_sc = 1; + break; + + case HAL_PRIME_CHNL_OFFSET_UPPER: + ptxdesc->data_sc = 2; + break; + + default: + ptxdesc->data_sc = 3; // Duplicate + break; + } + } +} + +void rtl8723a_fill_default_txdesc( + struct xmit_frame *pxmitframe, + u8 *pbuf) +{ + PADAPTER padapter; + HAL_DATA_TYPE *pHalData; + struct dm_priv *pdmpriv; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + struct pkt_attrib *pattrib; + PTXDESC ptxdesc; + s32 bmcst; + + + padapter = pxmitframe->padapter; + pHalData = GET_HAL_DATA(padapter); + pdmpriv = &pHalData->dmpriv; + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &(pmlmeext->mlmext_info); + + pattrib = &pxmitframe->attrib; + bmcst = IS_MCAST(pattrib->ra); + + ptxdesc = (PTXDESC)pbuf; + + if (pxmitframe->frame_tag == DATA_FRAMETAG) + { + ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) + + if (pattrib->ampdu_en == _TRUE) + ptxdesc->agg_en = 1; // AGG EN + else + ptxdesc->bk = 1; // AGG BK + + ptxdesc->qsel = pattrib->qsel; + ptxdesc->rate_id = pattrib->raid; + + fill_txdesc_sectype(pattrib, ptxdesc); + + ptxdesc->seq = pattrib->seqnum; + + if ((pattrib->ether_type != 0x888e) && + (pattrib->ether_type != 0x0806) && + (pattrib->dhcp_pkt != 1)) + { + // Non EAP & ARP & DHCP type data packet + + fill_txdesc_vcs(pattrib, ptxdesc); + fill_txdesc_phy(pattrib, ptxdesc); + + ptxdesc->rtsrate = 8; // RTS Rate=24M + ptxdesc->data_ratefb_lmt = 0x1F; + ptxdesc->rts_ratefb_lmt = 0xF; + + // use REG_INIDATA_RATE_SEL value + ptxdesc->datarate = pdmpriv->INIDATA_RATE[pattrib->mac_id]; + +#if 0 + ptxdesc->userate = 1; // driver uses rate + + if (pattrib->ht_en) + ptxdesc->sgi = 1; // SGI + + ptxdesc->datarate = 0x13; // init rate - mcs7 +#endif + } + else + { + // EAP data packet and ARP packet. + // Use the 1M data rate to send the EAP/ARP packet. + // This will maybe make the handshake smooth. + + ptxdesc->bk = 1; // AGG BK + ptxdesc->userate = 1; // driver uses rate + if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) + ptxdesc->data_short = 1;// DATA_SHORT + ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); + } +#if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + ptxdesc->usb_txagg_num = pxmitframe->agg_num; +#endif + } + else if (pxmitframe->frame_tag == MGNT_FRAMETAG) + { +// RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MGNT_FRAMETAG\n", __FUNCTION__)); + + ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) + ptxdesc->qsel = pattrib->qsel; + ptxdesc->rate_id = pattrib->raid; // Rate ID + ptxdesc->seq = pattrib->seqnum; + ptxdesc->userate = 1; // driver uses rate, 1M + ptxdesc->rty_lmt_en = 1; // retry limit enable + ptxdesc->data_rt_lmt = 6; // retry limit = 6 + +#ifdef CONFIG_XMIT_ACK + //CCX-TXRPT ack for xmit mgmt frames. + if (pxmitframe->ack_report) { + #ifdef DBG_CCX + static u16 ccx_sw = 0x123; + txdesc_set_ccx_sw_8723a(ptxdesc, ccx_sw); + DBG_871X("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); + ccx_sw = (ccx_sw+1)%0xfff; + #endif + ptxdesc->ccx = 1; + } +#endif //CONFIG_XMIT_ACK + +#ifdef CONFIG_INTEL_PROXIM + if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ + DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); + ptxdesc->datarate = pattrib->rate; + } + else +#endif + { + ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); + } + } + else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) + { + RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: TXAGG_FRAMETAG\n", __FUNCTION__)); + } +#ifdef CONFIG_MP_INCLUDED + else if (pxmitframe->frame_tag == MP_FRAMETAG) + { + struct tx_desc *pdesc; + + pdesc = (struct tx_desc*)ptxdesc; + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MP_FRAMETAG\n", __FUNCTION__)); + fill_txdesc_for_mp(padapter, pdesc); + + pdesc->txdw0 = le32_to_cpu(pdesc->txdw0); + pdesc->txdw1 = le32_to_cpu(pdesc->txdw1); + pdesc->txdw2 = le32_to_cpu(pdesc->txdw2); + pdesc->txdw3 = le32_to_cpu(pdesc->txdw3); + pdesc->txdw4 = le32_to_cpu(pdesc->txdw4); + pdesc->txdw5 = le32_to_cpu(pdesc->txdw5); + pdesc->txdw6 = le32_to_cpu(pdesc->txdw6); + pdesc->txdw7 = le32_to_cpu(pdesc->txdw7); +#ifdef CONFIG_PCI_HCI + pdesc->txdw8 = le32_to_cpu(pdesc->txdw8); + pdesc->txdw9 = le32_to_cpu(pdesc->txdw9); + pdesc->txdw10 = le32_to_cpu(pdesc->txdw10); + pdesc->txdw11 = le32_to_cpu(pdesc->txdw11); + pdesc->txdw12 = le32_to_cpu(pdesc->txdw12); + pdesc->txdw13 = le32_to_cpu(pdesc->txdw13); + pdesc->txdw14 = le32_to_cpu(pdesc->txdw14); + pdesc->txdw15 = le32_to_cpu(pdesc->txdw15); +#endif + } +#endif + else + { + RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: frame_tag=0x%x\n", __FUNCTION__, pxmitframe->frame_tag)); + + ptxdesc->macid = 4; // CAM_ID(MAC_ID) + ptxdesc->rate_id = 6; // Rate ID + ptxdesc->seq = pattrib->seqnum; + ptxdesc->userate = 1; // driver uses rate + ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); + } + + ptxdesc->pktlen = pattrib->last_txcmdsz; + ptxdesc->offset = TXDESC_SIZE + OFFSET_SZ; + if (bmcst) ptxdesc->bmc = 1; + ptxdesc->ls = 1; + ptxdesc->fs = 1; + ptxdesc->own = 1; + + // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. + // (1) The sequence number of each non-Qos frame / broadcast / multicast / + // mgnt frame should be controled by Hw because Fw will also send null data + // which we cannot control when Fw LPS enable. + // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. + // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. + // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. + // 2010.06.23. Added by tynli. + if (!pattrib->qos_en) + { + // Hw set sequence number + ptxdesc->hwseq_en = 1; // HWSEQ_EN + ptxdesc->hwseq_sel = 0; // HWSEQ_SEL + } +} + +/* + * Description: + * + * Parameters: + * pxmitframe xmitframe + * pbuf where to fill tx desc + */ +void rtl8723a_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf) +{ + struct tx_desc *pdesc; + + + pdesc = (struct tx_desc*)pbuf; + _rtw_memset(pdesc, 0, sizeof(struct tx_desc)); + + rtl8723a_fill_default_txdesc(pxmitframe, pbuf); + + pdesc->txdw0 = cpu_to_le32(pdesc->txdw0); + pdesc->txdw1 = cpu_to_le32(pdesc->txdw1); + pdesc->txdw2 = cpu_to_le32(pdesc->txdw2); + pdesc->txdw3 = cpu_to_le32(pdesc->txdw3); + pdesc->txdw4 = cpu_to_le32(pdesc->txdw4); + pdesc->txdw5 = cpu_to_le32(pdesc->txdw5); + pdesc->txdw6 = cpu_to_le32(pdesc->txdw6); + pdesc->txdw7 = cpu_to_le32(pdesc->txdw7); +#ifdef CONFIG_PCI_HCI + pdesc->txdw8 = cpu_to_le32(pdesc->txdw8); + pdesc->txdw9 = cpu_to_le32(pdesc->txdw9); + pdesc->txdw10 = cpu_to_le32(pdesc->txdw10); + pdesc->txdw11 = cpu_to_le32(pdesc->txdw11); + pdesc->txdw12 = cpu_to_le32(pdesc->txdw12); + pdesc->txdw13 = cpu_to_le32(pdesc->txdw13); + pdesc->txdw14 = cpu_to_le32(pdesc->txdw14); + pdesc->txdw15 = cpu_to_le32(pdesc->txdw15); +#endif + + rtl8723a_cal_txdesc_chksum(pdesc); +} + +// +// Description: In normal chip, we should send some packet to Hw which will be used by Fw +// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then +// Fw can tell Hw to send these packet derectly. +// Added by tynli. 2009.10.15. +// +void rtl8723a_fill_fake_txdesc( + PADAPTER padapter, + u8* pDesc, + u32 BufferLen, + u8 IsPsPoll, + u8 IsBTQosNull) +{ + struct tx_desc *ptxdesc; + + + // Clear all status + ptxdesc = (struct tx_desc*)pDesc; + _rtw_memset(pDesc, 0, TXDESC_SIZE); + + //offset 0 + ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; + + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); //32 bytes for TX Desc + + ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<<QSEL_SHT)&0x00001f00); // Fixed queue of Mgnt queue + + //Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. + if (IsPsPoll) + { + ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR); + } + else + { + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. + } + + if (_TRUE == IsBTQosNull) + { + ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); // BT NULL + } + + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + // USB interface drop packet if the checksum of descriptor isn't correct. + // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). + rtl8723a_cal_txdesc_chksum(ptxdesc); +#endif +} + +#ifdef CONFIG_CONCURRENT_MODE +int reset_tsf(PADAPTER Adapter, u8 reset_port ) +{ + u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; + u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ? + REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1; + + rtw_scan_abort(Adapter->pbuddy_adapter); /* site survey will cause reset_tsf fail */ + reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt); + rtl8723c_reset_tsf(Adapter, reset_port); + + while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) { + rtw_msleep_os(100); + loop_cnt++; + reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt); + } + + return(loop_cnt >= 10) ? _FAIL : _TRUE; +} +#endif + +static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val) +{ + u8 val8; + u8 mode = *val; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) + { +#ifdef CONFIG_CONCURRENT_MODE + if (!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE)) +#endif + { + StopTxBeacon(padapter); + } + + // disable atim wnd +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + val8 = DIS_TSF_UDT|DIS_ATIM; + else +#endif + val8 = DIS_TSF_UDT|EN_BCN_FUNCTION|DIS_ATIM; + SetBcnCtrlReg(padapter, val8, ~val8); + } + else if ((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) + { + ResumeTxBeacon(padapter); + + val8 = DIS_TSF_UDT|EN_BCN_FUNCTION|DIS_BCNQ_SUB; + SetBcnCtrlReg(padapter, val8, ~val8); + } + else if (mode == _HW_STATE_AP_) + { +#ifdef CONFIG_BT_COEXIST + // add NULL Data and BT NULL Data Packets to FW RSVD Page + rtl8723a_set_BTCoex_AP_mode_FwRsvdPkt_cmd(padapter); +#endif + + ResumeTxBeacon(padapter); + + val8 = DIS_TSF_UDT|DIS_BCNQ_SUB; + SetBcnCtrlReg(padapter, val8, ~val8); + + // Set RCR + //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 + rtw_write32(padapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 + // enable to rx data frame + rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); + // enable to rx ps-poll + rtw_write16(padapter, REG_RXFLTMAP1, 0x0400); + + // Beacon Control related register for first time + rtw_write8(padapter, REG_BCNDMATIM, 0x02); // 2ms + rtw_write8(padapter, REG_DRVERLYINT, 0x05); // 5ms + //rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + rtw_write8(padapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 + else +#endif + { + rtw_write8(padapter, REG_ATIMWND, 0x0a); // 10ms for port0 + } + rtw_write16(padapter, REG_BCNTCFG, 0x00); + rtw_write16(padapter, REG_TBTT_PROHIBIT, 0xff04); + rtw_write16(padapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) + + // reset TSF +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1)); + else +#endif + { + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(0)); + } + + // enable BCN Function + // don't enable update TSF (due to TSF update when beacon/probe rsp are received) + val8 = DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB; + SetBcnCtrlReg(padapter, val8, ~val8); + + // dis BCN ATIM WND of another port if it is station +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) { + if(check_buddy_fwstate(padapter, WIFI_FW_NULL_STATE)) + rtw_write8(padapter, REG_BCN_CTRL, + rtw_read8(padapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); + } else { + if(check_buddy_fwstate(padapter, WIFI_FW_NULL_STATE)) + rtw_write8(padapter, REG_BCN_CTRL_1, + rtw_read8(padapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); + } + + if (padapter->pbuddy_adapter) + SetBcnCtrlReg(padapter->pbuddy_adapter, DIS_ATIM, 0); +#else +// val8 = rtw_read8(padapter, REG_BCN_CTRL_1); +// val8 |= DIS_ATIM; +// rtw_write8(padapter, REG_BCN_CTRL_1, val8); +#endif + +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Reset TSF for STA+AP concurrent mode + if ( check_buddy_fwstate(padapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { + if (reset_tsf(padapter, padapter->iface_type) == _FALSE) + DBG_871X("ERROR! %s()-%d: Reset port%d TSF fail\n", + __FUNCTION__, __LINE__, + (padapter->iface_type==IFACE_PORT1)? 1 : 0); + } +#endif // CONFIG_TSF_RESET_OFFLOAD + } + + val8 = rtw_read8(padapter, MSR); +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + val8 = (val8 & 0x3) | (mode << 2); + else +#endif + { + val8 = (val8 & 0xC) | mode; + } + rtw_write8(padapter, MSR, val8); +} + +static void hw_var_set_macaddr(PADAPTER padapter, u8 variable, u8 *val) +{ + u8 idx = 0; + u32 reg_macid; + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + { + reg_macid = REG_MACID1; + } + else +#endif + { + reg_macid = REG_MACID; + } + + for (idx = 0 ; idx < 6; idx++) + { + rtw_write8(padapter, (reg_macid+idx), val[idx]); + } +} + +static void hw_var_set_bssid(PADAPTER padapter, u8 variable, u8 *val) +{ + u8 idx = 0; + u32 reg_bssid; + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + { + reg_bssid = REG_BSSID1; + } + else +#endif + { + reg_bssid = REG_BSSID; + } + + for (idx = 0 ; idx < 6; idx++) + { + rtw_write8(padapter, (reg_bssid+idx), val[idx]); + } +} + +static void hw_var_set_correct_tsf(PADAPTER padapter, u8 variable, u8 *val) +{ + u64 tsf; + u32 reg_tsftr; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + + + //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) - 1024; //us + tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; //us + + if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || + ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) + //rtw_write8(padapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); + StopTxBeacon(padapter); + } + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + { + reg_tsftr = REG_TSFTR1; + } + else +#endif + { + reg_tsftr = REG_TSFTR; + } + + // disable related TSF function + SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION); + + rtw_write32(padapter, reg_tsftr, tsf); + rtw_write32(padapter, reg_tsftr+4, tsf>>32); + +#ifdef CONFIG_CONCURRENT_MODE + + // Update buddy port's TSF if it is SoftAP for beacon TX issue! + if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE + && check_buddy_fwstate(padapter, WIFI_AP_STATE) + ) { + //disable related TSF function + if (padapter->pbuddy_adapter) + SetBcnCtrlReg(padapter->pbuddy_adapter, 0, EN_BCN_FUNCTION); + if (padapter->iface_type == IFACE_PORT1) + { + reg_tsftr = REG_TSFTR; + } + else + { + reg_tsftr = REG_TSFTR1; + } + + rtw_write32(padapter, reg_tsftr, tsf); + rtw_write32(padapter, reg_tsftr+4, tsf>>32); + + //enable related TSF function + if (padapter->pbuddy_adapter) + SetBcnCtrlReg(padapter->pbuddy_adapter, EN_BCN_FUNCTION,0); + } +#endif + //enable related TSF function + SetBcnCtrlReg(padapter, EN_BCN_FUNCTION, 0); + +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Reset TSF for STA+AP concurrent mode + if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE + && check_buddy_fwstate(padapter, WIFI_AP_STATE) ) { + if (padapter->iface_type == IFACE_PORT1) { + if (reset_tsf(padapter, IFACE_PORT0) == _FALSE) + DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", + __FUNCTION__, __LINE__); + } else { + if (reset_tsf(padapter, IFACE_PORT1) == _FALSE) + DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", + __FUNCTION__, __LINE__); + } + } +#endif // CONFIG_TSF_RESET_OFFLOAD + + if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || + ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause &= (~STOP_BCNQ); + //rtw_write8(padapter, REG_TXPAUSE, (rtw_read8(padapter, REG_TXPAUSE)&(~BIT(6)))); + ResumeTxBeacon(padapter); + } +} + +static void hw_var_set_mlme_disconnect(PADAPTER padapter, u8 variable, u8 *val) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +#ifdef CONFIG_CONCURRENT_MODE + if (check_buddy_mlmeinfo_state(padapter, _HW_STATE_NOLINK_)) +#endif + { + // Set RCR to not to receive data frame when NO LINK state + //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF); + // reject all data frames + rtw_write16(padapter, REG_RXFLTMAP2, 0); + } + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + { + // reset TSF1 + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1)); + + // disable update TSF1, disble BCN function + SetBcnCtrlReg(padapter, DIS_TSF_UDT, EN_BCN_FUNCTION); + } + else +#endif + { + // reset TSF + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(0)); + + // disable update TSF + SetBcnCtrlReg(padapter, DIS_TSF_UDT, 0); + } +} + +#ifdef CONFIG_CONCURRENT_MODE +static void hw_var_set_mlme_sitesurvey(PADAPTER padapter, u8 variable, u8 *val) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u32 v32; + + + if (*val)//under sitesurvey + { + // config RCR to receive different BSSID & not to receive data frame + v32 = rtw_read32(padapter, REG_RCR); + v32 &= ~(RCR_CBSSID_BCN); + rtw_write32(padapter, REG_RCR, v32); + + // disable update TSF + if ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) + SetBcnCtrlReg(padapter, DIS_TSF_UDT, 0); + + if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && + (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE)) + { + StopTxBeacon(padapter); + } + } + else//sitesurvey done + { + // enable to rx data frame + //write32(padapter, REG_RCR, read32(padapter, REG_RCR)|RCR_ADF); + rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); + + // enable update TSF + SetBcnCtrlReg(padapter, 0, DIS_TSF_UDT); + + v32 = rtw_read32(padapter, REG_RCR); + v32 |= RCR_CBSSID_BCN; + rtw_write32(padapter, REG_RCR, v32); + + if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && + (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE)) + { + ResumeTxBeacon(padapter); +#if 0 + // reset TSF 1/2 after ResumeTxBeacon + if (pbuddy_adapter->iface_type == IFACE_PORT1) + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1)); + else + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(0)); +#endif + + } + } +} +#endif + +static void hw_var_set_mlme_join(PADAPTER padapter, u8 variable, u8 *val) +{ + u8 RetryLimit = 0x30; + u8 type = *val; + + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + + if (type == 0) // prepare to join + { + u32 v32; + +#ifdef CONFIG_CONCURRENT_MODE + if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && + (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE)) + { + StopTxBeacon(padapter); + } +#endif + + // enable to rx data frame.Accept all data frame + //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); + rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); + + v32 = rtw_read32(padapter, REG_RCR); +#ifdef CONFIG_CONCURRENT_MODE + if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE)) + v32 |= RCR_CBSSID_BCN; + else +#endif + { + v32 |= RCR_CBSSID_DATA | RCR_CBSSID_BCN; + } + rtw_write32(padapter, REG_RCR, v32); + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + else // Ad-hoc Mode + RetryLimit = 0x7; + } + else if (type == 1) // joinbss_event callback when join res < 0 + { +#ifdef CONFIG_CONCURRENT_MODE + if (check_buddy_mlmeinfo_state(padapter, _HW_STATE_NOLINK_)) + rtw_write16(padapter, REG_RXFLTMAP2, 0); + + if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && + (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE)) + { + ResumeTxBeacon(padapter); + + // reset TSF 1/2 after ResumeTxBeacon + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); + } +#else + // config RCR to receive different BSSID & not to receive data frame during linking + //v32 = rtw_read32(padapter, REG_RCR); + //v32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);//| RCR_ADF + //rtw_write32(padapter, REG_RCR, v32); + rtw_write16(padapter, REG_RXFLTMAP2, 0); +#endif + } + else if (type == 2) // sta add event callback + { + // enable update TSF + SetBcnCtrlReg(padapter, 0, DIS_TSF_UDT); + + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + // fixed beacon issue for 8191su........... + rtw_write8(padapter, 0x542, 0x02); + RetryLimit = 0x7; + } + +#ifdef CONFIG_CONCURRENT_MODE + if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && + (check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE)) + { + ResumeTxBeacon(padapter); + + // reset TSF 1/2 after ResumeTxBeacon + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); + } +#endif + } + + rtw_write16(padapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); +} + +void SetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + +_func_enter_; + + switch (variable) + { + case HW_VAR_MEDIA_STATUS: + { + u8 val8; + + val8 = rtw_read8(padapter, MSR) & 0x0c; + val8 |= *val; + rtw_write8(padapter, MSR, val8); + } + break; + + case HW_VAR_MEDIA_STATUS1: + { + u8 val8; + + val8 = rtw_read8(padapter, MSR) & 0x03; + val8 |= *val << 2; + rtw_write8(padapter, MSR, val8); + } + break; + + case HW_VAR_SET_OPMODE: + hw_var_set_opmode(padapter, variable, val); + break; + + case HW_VAR_MAC_ADDR: + hw_var_set_macaddr(padapter, variable, val); + break; + + case HW_VAR_BSSID: + hw_var_set_bssid(padapter, variable, val); + break; + + case HW_VAR_BASIC_RATE: + { + u16 BrateCfg = 0; + u8 RateIndex = 0; + + // 2007.01.16, by Emily + // Select RRSR (in Legacy-OFDM and CCK) + // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. + // We do not use other rates. + HalSetBrateCfg(padapter, val, &BrateCfg); + + //2011.03.30 add by Luke Lee + //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT + //because CCK 2M has poor TXEVM + //CCK 5.5M & 11M ACK should be enabled for better performance + + pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d; + BrateCfg |= 0x01; // default enable 1M ACK rate + DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); + + // Set RRSR rate table. + rtw_write8(padapter, REG_RRSR, BrateCfg&0xff); + rtw_write8(padapter, REG_RRSR+1, (BrateCfg>>8)&0xff); + rtw_write8(padapter, REG_RRSR+2, rtw_read8(padapter, REG_RRSR+2)&0xf0); + + // Set RTS initial rate + while (BrateCfg > 0x1) + { + BrateCfg = (BrateCfg >> 1); + RateIndex++; + } + // Ziv - Check + rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); + } + break; + + case HW_VAR_TXPAUSE: + rtw_write8(padapter, REG_TXPAUSE, *val); + break; + + case HW_VAR_BCN_FUNC: + if (*val) + SetBcnCtrlReg(padapter, EN_BCN_FUNCTION | EN_TXBCN_RPT, 0); + else + SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION | EN_TXBCN_RPT); + break; + + case HW_VAR_CORRECT_TSF: + hw_var_set_correct_tsf(padapter, variable, val); + break; + + case HW_VAR_CHECK_BSSID: + { + u32 val32; + val32 = rtw_read32(padapter, REG_RCR); + if (*val) + val32 |= RCR_CBSSID_DATA|RCR_CBSSID_BCN; + else + val32 &= ~(RCR_CBSSID_DATA|RCR_CBSSID_BCN); + rtw_write32(padapter, REG_RCR, val32); + } + break; + + case HW_VAR_MLME_DISCONNECT: + hw_var_set_mlme_disconnect(padapter, variable, val); + break; + + case HW_VAR_MLME_SITESURVEY: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_mlme_sitesurvey(padapter, variable, val); +#else + if (*val)//under sitesurvey + { + u32 v32; + + // config RCR to receive different BSSID & not to receive data frame + v32 = rtw_read32(padapter, REG_RCR); + v32 &= ~(RCR_CBSSID_BCN); + rtw_write32(padapter, REG_RCR, v32); + // reject all data frame + rtw_write16(padapter, REG_RXFLTMAP2, 0); + + // disable update TSF + SetBcnCtrlReg(padapter, DIS_TSF_UDT, 0); + } + else//sitesurvey done + { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + u32 v32; + + if ((is_client_associated_to_ap(padapter) == _TRUE) || + ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || + ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + // enable to rx data frame +#if 0 + v32 = rtw_read32(padapter, REG_RCR); + v32 |= RCR_ADF; + rtw_write32(padapter, REG_RCR, v32); +#else + rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); +#endif + + // enable update TSF + SetBcnCtrlReg(padapter, 0, DIS_TSF_UDT); + } + + v32 = rtw_read32(padapter, REG_RCR); + v32 |= RCR_CBSSID_BCN; + rtw_write32(padapter, REG_RCR, v32); + } +#endif + +#ifdef CONFIG_BT_COEXIST + BT_WifiScanNotify(padapter, *val?_TRUE:_FALSE); +#endif + break; + + case HW_VAR_MLME_JOIN: + hw_var_set_mlme_join(padapter, variable, val); + +#ifdef CONFIG_BT_COEXIST + switch (*val) + { + case 0: + // prepare to join + BT_WifiAssociateNotify(padapter, _TRUE); + break; + case 1: + // joinbss_event callback when join res < 0 + BT_WifiAssociateNotify(padapter, _FALSE); + break; + case 2: + // sta add event callback +// BT_WifiMediaStatusNotify(padapter, RT_MEDIA_CONNECT); + break; + } +#endif + break; + + case HW_VAR_ON_RCR_AM: + rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_AM); + DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(padapter, REG_RCR)); + break; + + case HW_VAR_OFF_RCR_AM: + rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)& (~RCR_AM)); + DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(padapter, REG_RCR)); + break; + + case HW_VAR_BEACON_INTERVAL: + rtw_write16(padapter, REG_BCN_INTERVAL, *((u16*)val)); + break; + + case HW_VAR_SLOT_TIME: + { + u8 u1bAIFS, aSifsTime; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + + rtw_write8(padapter, REG_SLOT, *val); + + if (pmlmeinfo->WMM_enable == 0) + { + if (pmlmeext->cur_wireless_mode == WIRELESS_11B) + aSifsTime = 10; + else + aSifsTime = 16; + + u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); + + // <Roger_EXP> Temporary removed, 2008.06.20. + rtw_write8(padapter, REG_EDCA_VO_PARAM, u1bAIFS); + rtw_write8(padapter, REG_EDCA_VI_PARAM, u1bAIFS); + rtw_write8(padapter, REG_EDCA_BE_PARAM, u1bAIFS); + rtw_write8(padapter, REG_EDCA_BK_PARAM, u1bAIFS); + } + } + break; + + case HW_VAR_RESP_SIFS: +#if 0 + // SIFS for OFDM Data ACK + rtw_write8(padapter, REG_SIFS_CTX+1, val[0]); + // SIFS for OFDM consecutive tx like CTS data! + rtw_write8(padapter, REG_SIFS_TRX+1, val[1]); + + rtw_write8(padapter, REG_SPEC_SIFS+1, val[0]); + rtw_write8(padapter, REG_MAC_SPEC_SIFS+1, val[0]); + + // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. + rtw_write8(padapter, REG_R2T_SIFS+1, val[0]); + rtw_write8(padapter, REG_T2T_SIFS+1, val[0]); + +#else + //SIFS_Timer = 0x0a0a0808; + //RESP_SIFS for CCK + rtw_write8(padapter, REG_R2T_SIFS, val[0]); // SIFS_T2T_CCK (0x08) + rtw_write8(padapter, REG_R2T_SIFS+1, val[1]); //SIFS_R2T_CCK(0x08) + //RESP_SIFS for OFDM + rtw_write8(padapter, REG_T2T_SIFS, val[2]); //SIFS_T2T_OFDM (0x0a) + rtw_write8(padapter, REG_T2T_SIFS+1, val[3]); //SIFS_R2T_OFDM(0x0a) +#endif + break; + + case HW_VAR_ACK_PREAMBLE: + { + u8 regTmp; + u8 bShortPreamble = *val; + + // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) + regTmp = (pHalData->nCur40MhzPrimeSC)<<5; + //regTmp = 0; + if (bShortPreamble) regTmp |= 0x80; + rtw_write8(padapter, REG_RRSR+2, regTmp); + } + break; + + case HW_VAR_SEC_CFG: +#ifdef CONFIG_CONCURRENT_MODE + rtw_write8(padapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC +#else + rtw_write8(padapter, REG_SECCFG, *val); +#endif + break; + + case HW_VAR_DM_FLAG: + pHalData->odmpriv.SupportAbility = *((u32*)val); + break; + + case HW_VAR_DM_FUNC_OP: + if (*val) // save dm flag + pHalData->odmpriv.BK_SupportAbility = pHalData->odmpriv.SupportAbility; + else // restore dm flag + pHalData->odmpriv.SupportAbility = pHalData->odmpriv.BK_SupportAbility; + break; + + case HW_VAR_DM_FUNC_SET: + if (*((u32*)val) == DYNAMIC_ALL_FUNC_ENABLE) { + pHalData->dmpriv.DMFlag = pHalData->dmpriv.InitDMFlag; + pHalData->odmpriv.SupportAbility = pHalData->dmpriv.InitODMFlag; + } else { + pHalData->odmpriv.SupportAbility |= *((u32*)val); + } + break; + + case HW_VAR_DM_FUNC_CLR: + pHalData->odmpriv.SupportAbility &= *((u32*)val); + break; + + case HW_VAR_CAM_EMPTY_ENTRY: + { + u8 ucIndex = *val; + u8 i; + u32 ulCommand = 0; + u32 ulContent = 0; + u32 ulEncAlgo = CAM_AES; + + for (i=0; i<CAM_CONTENT_COUNT; i++) + { + // filled id in CAM config 2 byte + if (i == 0) + { + ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2); + //ulContent |= CAM_VALID; + } + else + { + ulContent = 0; + } + // polling bit, and No Write enable, and address + ulCommand = CAM_CONTENT_COUNT*ucIndex+i; + ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE; + // write content 0 is equall to mark invalid + rtw_write32(padapter, WCAMI, ulContent); //delay_ms(40); + //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %lx \n",ulContent)); + rtw_write32(padapter, RWCAM, ulCommand); //delay_ms(40); + //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %lx \n",ulCommand)); + } + } + break; + + case HW_VAR_CAM_INVALID_ALL: + rtw_write32(padapter, RWCAM, BIT(31)|BIT(30)); + break; + + case HW_VAR_CAM_WRITE: + { + u32 cmd; + u32 *cam_val = (u32*)val; + + rtw_write32(padapter, WCAMI, cam_val[0]); + + cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1]; + rtw_write32(padapter, RWCAM, cmd); + } + break; + + case HW_VAR_AC_PARAM_VO: + rtw_write32(padapter, REG_EDCA_VO_PARAM, *((u32*)val)); + break; + + case HW_VAR_AC_PARAM_VI: + rtw_write32(padapter, REG_EDCA_VI_PARAM, *((u32*)val)); + break; + + case HW_VAR_AC_PARAM_BE: + pHalData->AcParam_BE = ((u32*)(val))[0]; + rtw_write32(padapter, REG_EDCA_BE_PARAM, *((u32*)val)); + break; + + case HW_VAR_AC_PARAM_BK: + rtw_write32(padapter, REG_EDCA_BK_PARAM, *((u32*)val)); + break; + + case HW_VAR_ACM_CTRL: + { + u8 ctrl = *((u8*)val); + u8 hwctrl = 0; + + if (ctrl != 0) + { + hwctrl |= AcmHw_HwEn; + + if (ctrl & BIT(1)) // BE + hwctrl |= AcmHw_BeqEn; + + if (ctrl & BIT(2)) // VI + hwctrl |= AcmHw_ViqEn; + + if (ctrl & BIT(3)) // VO + hwctrl |= AcmHw_VoqEn; + } + + DBG_8192C("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl); + rtw_write8(padapter, REG_ACMHWCTRL, hwctrl); + } + break; + + case HW_VAR_AMPDU_MIN_SPACE: + { + u8 MinSpacingToSet; + u8 SecMinSpace; + + MinSpacingToSet = *val; + if (MinSpacingToSet <= 7) + { + switch (padapter->securitypriv.dot11PrivacyAlgrthm) + { + case _NO_PRIVACY_: + case _AES_: + SecMinSpace = 0; + break; + + case _WEP40_: + case _WEP104_: + case _TKIP_: + case _TKIP_WTMIC_: + SecMinSpace = 6; + break; + default: + SecMinSpace = 7; + break; + } + + if (MinSpacingToSet < SecMinSpace) + MinSpacingToSet = SecMinSpace; + + //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", padapter->MgntInfo.MinSpaceCfg)); + MinSpacingToSet |= rtw_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8; + rtw_write8(padapter, REG_AMPDU_MIN_SPACE, MinSpacingToSet); + } + } + break; + + case HW_VAR_AMPDU_FACTOR: + { + u8 RegToSet_Normal[4] = {0x41,0xa8,0x72, 0xb9}; + u8 MaxAggNum; + u8 FactorToSet; + u8 *pRegToSet; + u8 index = 0; + + pRegToSet = RegToSet_Normal; // 0xb972a841; +#ifdef CONFIG_BT_COEXIST + if ((BT_IsBtDisabled(padapter) == _FALSE) && + (BT_1Ant(padapter) == _TRUE)) + { + MaxAggNum = 0x8; + } + else +#endif // CONFIG_BT_COEXIST + { + MaxAggNum = 0xF; + } + + FactorToSet = *val; + if (FactorToSet <= 3) + { + FactorToSet = (1 << (FactorToSet + 2)); + if (FactorToSet > MaxAggNum) + FactorToSet = MaxAggNum; + + for (index=0; index<4; index++) + { + if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4)) + pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4); + + if ((pRegToSet[index] & 0x0f) > FactorToSet) + pRegToSet[index] = (pRegToSet[index] & 0xf0) | FactorToSet; + + rtw_write8(padapter, REG_AGGLEN_LMT+index, pRegToSet[index]); + } + + //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); + } + } + break; + + case HW_VAR_RXDMA_AGG_PG_TH: + rtw_write8(padapter, REG_RXDMA_AGG_PG_TH, *val); + break; + + case HW_VAR_H2C_FW_PWRMODE: + { + u8 psmode = *val; + + // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power + // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. + if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) + { + ODM_RF_Saving(&pHalData->odmpriv, _TRUE); + } + rtl8723a_set_FwPwrMode_cmd(padapter, psmode); + } + break; + + case HW_VAR_H2C_FW_JOINBSSRPT: + rtl8723a_set_FwJoinBssReport_cmd(padapter, *val); + break; + +#ifdef CONFIG_P2P_PS + case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: + rtl8192c_set_p2p_ps_offload_cmd(padapter, *val); + break; +#endif //CONFIG_P2P_PS + + case HW_VAR_INITIAL_GAIN: + { + DIG_T *pDigTable = &pHalData->odmpriv.DM_DigTable; + u32 rx_gain = *(u32*)val; + + if (rx_gain == 0xff) {//restore rx gain + ODM_Write_DIG(&pHalData->odmpriv, pDigTable->BackupIGValue); + } else { + pDigTable->BackupIGValue = pDigTable->CurIGValue; + ODM_Write_DIG(&pHalData->odmpriv, rx_gain); + } + } + break; + +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + case HW_VAR_ANTENNA_DIVERSITY_LINK: + //SwAntDivRestAfterLink8192C(padapter); + ODM_SwAntDivRestAfterLink(&pHalData->odmpriv); + break; + + case HW_VAR_ANTENNA_DIVERSITY_SELECT: + { + u8 Optimum_antenna = *val; + + //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); + + //PHY_SetBBReg(padapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna); + ODM_SetAntenna(&pHalData->odmpriv, Optimum_antenna); + } + break; +#endif + + case HW_VAR_EFUSE_USAGE: + pHalData->EfuseUsedPercentage = *val; + break; + + case HW_VAR_EFUSE_BYTES: + pHalData->EfuseUsedBytes = *((u16*)val); + break; + + case HW_VAR_EFUSE_BT_USAGE: +#ifdef HAL_EFUSE_MEMORY + pHalData->EfuseHal.BTEfuseUsedPercentage = *val; +#endif + break; + + case HW_VAR_EFUSE_BT_BYTES: +#ifdef HAL_EFUSE_MEMORY + pHalData->EfuseHal.BTEfuseUsedBytes = *((u16*)val); +#else + BTEfuseUsedBytes = *((u16*)val); +#endif + break; + + case HW_VAR_FIFO_CLEARN_UP: + { + #define RW_RELEASE_EN BIT(18) + #define RXDMA_IDLE BIT(17) + + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + u8 trycnt = 100; + + // pause tx + rtw_write8(padapter, REG_TXPAUSE, 0xff); + + // keep sn + padapter->xmitpriv.nqos_ssn = rtw_read16(padapter, REG_NQOS_SEQ); + + if (pwrpriv->bkeepfwalive != _TRUE) + { + u32 v32; + + // RX DMA stop + v32 = rtw_read32(padapter, REG_RXPKT_NUM); + v32 |= RW_RELEASE_EN; + rtw_write32(padapter, REG_RXPKT_NUM, v32); + do { + v32 = rtw_read32(padapter, REG_RXPKT_NUM) & RXDMA_IDLE; + if (!v32) break; + } while (trycnt--); + if (trycnt == 0) { + DBG_8192C("Stop RX DMA failed......\n"); + } + + // RQPN Load 0 + rtw_write16(padapter, REG_RQPN_NPQ, 0); + rtw_write32(padapter, REG_RQPN, 0x80000000); + rtw_mdelay_os(10); + } + } + break; + + case HW_VAR_CHECK_TXBUF: +#ifdef CONFIG_CONCURRENT_MODE + { + u16 v16; + u32 i; + #if 0 + u8 RetryLimit = 0x01; + + //rtw_write16(padapter, REG_RL,0x0101); + v16 = RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT; + rtw_write16(padapter, REG_RL, v16); + #endif + for (i=0; i<1000; i++) + { + if (rtw_read32(padapter, 0x200) != rtw_read32(padapter, 0x204)) + { + //DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(padapter, 0x204), rtw_read32(padapter, 0x200), i); + rtw_msleep_os(10); + } + else + { + DBG_871X("no packet in tx packet buffer (%d)\n", i); + break; + } + } + #if 0 + RetryLimit = 0x30; + v16 = RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT; + rtw_write16(padapter, REG_RL, v16); + #endif + } +#endif + break; + + case HW_VAR_APFM_ON_MAC: + pHalData->bMacPwrCtrlOn = *val; +#ifdef PLATFORM_LINUX + DBG_8192C("%s: bMacPwrCtrlOn=%d\n", __func__, pHalData->bMacPwrCtrlOn); +#endif + break; + + case HW_VAR_NAV_UPPER: + { + u32 usNavUpper = *((u32*)val); + + if (usNavUpper > HAL_8723A_NAV_UPPER_UNIT * 0xFF) + { + RT_TRACE(_module_hal_init_c_, _drv_notice_, ("The setting value (0x%08X us) of NAV_UPPER is larger than (%d * 0xFF)!!!\n", usNavUpper, HAL_8723A_NAV_UPPER_UNIT)); + break; + } + + // The value of ((usNavUpper + HAL_8723A_NAV_UPPER_UNIT - 1) / HAL_8723A_NAV_UPPER_UNIT) + // is getting the upper integer. + usNavUpper = (usNavUpper + HAL_8723A_NAV_UPPER_UNIT - 1) / HAL_8723A_NAV_UPPER_UNIT; + rtw_write8(padapter, REG_NAV_UPPER, (u8)usNavUpper); + } + break; + case HW_VAR_H2C_MEDIA_STATUS_RPT: + { + rtl8723a_set_FwMediaStatus_cmd(padapter , (*(u16 *)val)); + } + break; + case HW_VAR_BCN_VALID: + //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw + rtw_write8(padapter, REG_TDECTRL+2, rtw_read8(padapter, REG_TDECTRL+2) | BIT0); + break; + + default: + break; + } + +_func_exit_; +} + +void GetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + switch (variable) + { + case HW_VAR_BASIC_RATE: + *((u16*)val) = pHalData->BasicRateSet; + break; + + case HW_VAR_TXPAUSE: + *val = rtw_read8(padapter, REG_TXPAUSE); + break; + + case HW_VAR_BCN_VALID: + //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 + val[0] = (BIT0 & rtw_read8(padapter, REG_TDECTRL+2))?_TRUE:_FALSE; + break; + + case HW_VAR_RF_TYPE: + *val = pHalData->rf_type; + break; + + case HW_VAR_DM_FLAG: + { + PDM_ODM_T podmpriv = &pHalData->odmpriv; + *((u32*)val) = podmpriv->SupportAbility; + } + break; + + case HW_VAR_CAM_READ: + { + u32 cmd; + u32 *cam_val = (u32*)val; + + cmd = CAM_POLLINIG | CAM_READ | cam_val[1]; + rtw_write32(padapter, RWCAM, cmd); + + cam_val[0]=rtw_read32(padapter, RCAMO); + } + break; + + case HW_VAR_FWLPS_RF_ON: + { + // When we halt NIC, we should check if FW LPS is leave. + u32 valRCR; + + if ((padapter->bSurpriseRemoved == _TRUE) || + (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) + { + // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, + // because Fw is unload. + *val = _TRUE; + } + else + { + valRCR = rtw_read32(padapter, REG_RCR); + valRCR &= 0x00070000; + if(valRCR) + *val = _FALSE; + else + *val = _TRUE; + } + } + break; + +#ifdef CONFIG_ANTENNA_DIVERSITY + case HW_VAR_CURRENT_ANTENNA: + *val = pHalData->CurAntenna; + break; +#endif + + case HW_VAR_EFUSE_USAGE: + *val = pHalData->EfuseUsedPercentage; + break; + + case HW_VAR_EFUSE_BYTES: + *((u16*)val) = pHalData->EfuseUsedBytes; + break; + + case HW_VAR_EFUSE_BT_USAGE: +#ifdef HAL_EFUSE_MEMORY + *val = pHalData->EfuseHal.BTEfuseUsedPercentage; +#endif + break; + + case HW_VAR_EFUSE_BT_BYTES: +#ifdef HAL_EFUSE_MEMORY + *((u16*)val) = pHalData->EfuseHal.BTEfuseUsedBytes; +#else + *((u16*)val) = BTEfuseUsedBytes; +#endif + break; + + case HW_VAR_APFM_ON_MAC: + *val = pHalData->bMacPwrCtrlOn; + break; + case HW_VAR_CHK_HI_QUEUE_EMPTY: + *val = ((rtw_read32(padapter, REG_HGQ_INFORMATION)&0x0000ff00)==0) ? _TRUE:_FALSE; + break; + case HW_VAR_C2HEVT_CLEAR: + *val = rtw_read8(padapter, REG_C2HEVT_CLEAR); + break; + case HW_VAR_C2HEVT_MSG_NORMAL: + *val = rtw_read8(padapter, REG_C2HEVT_MSG_NORMAL); + break; + } +} + +#ifdef CONFIG_BT_COEXIST + +void rtl8723a_SingleDualAntennaDetection(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + PDM_ODM_T pDM_Odm; + pSWAT_T pDM_SWAT_Table; + u8 btAntNum; + u8 i; + + + pHalData = GET_HAL_DATA(padapter); + pDM_Odm = &pHalData->odmpriv; + pDM_SWAT_Table= &pDM_Odm->DM_SWAT_Table; + + // + // <Roger_Notes> RTL8723A Single and Dual antenna dynamic detection mechanism when RF power state is on. + // We should take power tracking, IQK, LCK, RCK RF read/write operation into consideration. + // 2011.12.15. + // + if (IS_HARDWARE_TYPE_8723A(padapter) && !pHalData->bAntennaDetected) + { + u8 btAntNum = BT_GetPGAntNum(padapter); + + // Set default antenna B status + if (btAntNum == Ant_x2) + pDM_SWAT_Table->ANTB_ON = _TRUE; + else if (btAntNum == Ant_x1) + pDM_SWAT_Table->ANTB_ON = _FALSE; + else + pDM_SWAT_Table->ANTB_ON = _TRUE; + + if (pHalData->CustomerID != RT_CID_TOSHIBA ) + { + for (i=0; i<MAX_ANTENNA_DETECTION_CNT; i++) + { + if (ODM_SingleDualAntennaDetection(&pHalData->odmpriv, ANTTESTALL) == _TRUE) + break; + } + + // Set default antenna number for BT coexistence + if (btAntNum == Ant_x2) + BT_SetBtCoexCurrAntNum(padapter, pDM_SWAT_Table->ANTB_ON ? 2 : 1); + } + pHalData->bAntennaDetected = _TRUE; + } +} +#endif // CONFIG_BT_COEXIST + +void rtl8723a_start_thread(_adapter *padapter) +{ +#if (defined CONFIG_SDIO_HCI) || (defined CONFIG_GSPI_HCI) +#ifndef CONFIG_SDIO_TX_TASKLET + struct xmit_priv *xmitpriv = &padapter->xmitpriv; + + xmitpriv->SdioXmitThread = kthread_run(rtl8723as_xmit_thread, padapter, "RTWHALXT"); + if (IS_ERR(xmitpriv->SdioXmitThread)) + { + RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8723as_xmit_thread FAIL!!\n", __FUNCTION__)); + } +#endif +#endif +} + +void rtl8723a_stop_thread(_adapter *padapter) +{ +#if (defined CONFIG_SDIO_HCI) || (defined CONFIG_GSPI_HCI) +#ifndef CONFIG_SDIO_TX_TASKLET + struct xmit_priv *xmitpriv = &padapter->xmitpriv; + + // stop xmit_buf_thread + if (xmitpriv->SdioXmitThread ) { + _rtw_up_sema(&xmitpriv->SdioXmitSema); + _rtw_down_sema(&xmitpriv->SdioXmitTerminateSema); + xmitpriv->SdioXmitThread = 0; + } +#endif +#endif +} +#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) +extern void check_bt_status_work(void *data); +void rtl8723a_init_checkbthang_workqueue(_adapter * adapter) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + adapter->priv_checkbt_wq = alloc_workqueue("sdio_wq", 0, 0); +#else + adapter->priv_checkbt_wq = create_workqueue("sdio_wq"); +#endif + INIT_DELAYED_WORK(&adapter->checkbt_work, (void*)check_bt_status_work); +} + +void rtl8723a_free_checkbthang_workqueue(_adapter * adapter) +{ + if (adapter->priv_checkbt_wq) { + cancel_delayed_work_sync(&adapter->checkbt_work); + flush_workqueue(adapter->priv_checkbt_wq); + destroy_workqueue(adapter->priv_checkbt_wq); + adapter->priv_checkbt_wq = NULL; + } +} + +void rtl8723a_cancel_checkbthang_workqueue(_adapter * adapter) +{ + if (adapter->priv_checkbt_wq) { + cancel_delayed_work_sync(&adapter->checkbt_work); + } +} + +void rtl8723a_hal_check_bt_hang(_adapter * adapter) +{ + if (adapter->priv_checkbt_wq) + queue_delayed_work(adapter->priv_checkbt_wq, &(adapter->checkbt_work), 0); +} +#endif diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_mp.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_mp.c new file mode 100755 index 000000000000..742a3fac9575 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_mp.c @@ -0,0 +1,1214 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723A_MP_C_ +#ifdef CONFIG_MP_INCLUDED + +#include <drv_types.h> +#include <rtw_mp.h> +#include <rtl8723a_hal.h> + + +/*----------------------------------------------------------------------------- + * Function: mpt_SwitchRfSetting + * + * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. + * + * Input: IN PADAPTER pAdapter + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. + * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. + * + *---------------------------------------------------------------------------*/ + static void phy_SwitchRfSetting8723A(PADAPTER pAdapter,u8 channel ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u32 u4RF_IPA[3], u4RF_TXBIAS, u4RF_SYN_G2; + + DBG_8192C("phy_SwitchRfSetting8723A channel=%d\n",channel); + + + if(channel >= 1 && channel <= 9) + { + DBG_8192C("phy_SwitchRfSetting8723A REG_AFE_PLL_CTRL 0xF0FFFF83\n"); + PHY_SetBBReg(pAdapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xF0FFFF83); + } + else if (channel >= 10 && channel <= 14) + { + DBG_8192C("phy_SwitchRfSetting8723A REG_AFE_PLL_CTRL 0xF2FFFF83\n"); + PHY_SetBBReg(pAdapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xF2FFFF83); + } + + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + u4Byte u4RF_IPA[3], u4RF_TXBIAS, u4RF_SYN_G2; + //default value + { + u4RF_IPA[0] = 0x4F424; //CCK + u4RF_IPA[1] = 0xCF424; //OFDM + u4RF_IPA[2] = 0x8F424; //MCS + u4RF_TXBIAS = 0xC0356; + u4RF_SYN_G2 = 0x4F200; + } + + switch(channel) + { + case 1: + u4RF_IPA[0] = 0x4F40C; + u4RF_IPA[1] = 0xCF466; + u4RF_TXBIAS = 0xC0350; + u4RF_SYN_G2 = 0x0F400; + break; + + case 2: + u4RF_IPA[0] = 0x4F407; + u4RF_TXBIAS = 0xC0350; + u4RF_SYN_G2 = 0x0F400; + break; + + case 3: + u4RF_IPA[0] = 0x4F407; + u4RF_IPA[2] = 0x8F466; + u4RF_TXBIAS = 0xC0350; + u4RF_SYN_G2 = 0x0F400; + break; + + case 5: + case 8: + u4RF_SYN_G2 = 0x0F400; + break; + + case 6: + case 13: + u4RF_IPA[0] = 0x4F40C; + break; + + case 7: + u4RF_IPA[0] = 0x4F40C; + u4RF_SYN_G2 = 0x0F400; + break; + + case 9: + u4RF_IPA[2] = 0x8F454; + u4RF_SYN_G2 = 0x0F400; + break; + + case 11: + u4RF_IPA[0] = 0x4F40C; + u4RF_IPA[1] = 0xCF454; + u4RF_SYN_G2 = 0x0F400; + break; + + default: + u4RF_IPA[0] = 0x4F424; + u4RF_IPA[1] = 0x8F424; + u4RF_IPA[2] = 0xCF424; + u4RF_TXBIAS = 0xC0356; + u4RF_SYN_G2 = 0x4F200; + break; + } + + PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_IPA, bRFRegOffsetMask, u4RF_IPA[0]); + PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_IPA, bRFRegOffsetMask, u4RF_IPA[1]); + PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_IPA, bRFRegOffsetMask, u4RF_IPA[2]); + PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_TXBIAS, bRFRegOffsetMask, u4RF_TXBIAS); + PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_SYN_G2, bRFRegOffsetMask, u4RF_SYN_G2); + + if((channel >= 1 && channel <= 5) || (channel >= 8 && channel <= 9)) + { + PHY_SetBBReg(pAdapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xF0FFFF83); + } + else + { + PHY_SetBBReg(pAdapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xF2FFFF83); + } + +#endif + + +} + + + + +void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); + u8 ChannelToSw ; + + pMptCtx->MptChannelToSw=pAdapter->mppriv.channel; + ChannelToSw =pMptCtx->MptChannelToSw; + + phy_SwitchRfSetting8723A(pAdapter, ChannelToSw); +} + + + + +s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + + if (!netif_running(padapter->pnetdev)) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); + return _FAIL; + } + + if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); + return _FAIL; + } + + if (enable) + pdmpriv->TxPowerTrackControl = _TRUE; + else + pdmpriv->TxPowerTrackControl = _FALSE; + + return _SUCCESS; +} + +void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + + *enable = pdmpriv->TxPowerTrackControl; +} + +static void Hal_disable_dm(PADAPTER padapter) +{ + u8 v8; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + + //3 1. disable firmware dynamic mechanism + // disable Power Training, Rate Adaptive + v8 = rtw_read8(padapter, REG_BCN_CTRL); + v8 &= ~EN_BCN_FUNCTION; + rtw_write8(padapter, REG_BCN_CTRL, v8); + + //3 2. disable driver dynamic mechanism + // disable Dynamic Initial Gain + // disable High Power + // disable Power Tracking + Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); + + // enable APK, LCK and IQK but disable power tracking + pdmpriv->TxPowerTrackControl = _FALSE; + Switch_DM_Func(padapter, DYNAMIC_RF_TX_PWR_TRACK , _TRUE); +} + +void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) +{ + u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; + u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; + u8 i; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + // get current cck swing value and check 0xa22 & 0xa23 later to match the table. + CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); + + if (!bInCH14) + { + // Readback the current bb cck swing value and compare with the table to + // get the current swing index + for (i = 0; i < CCK_TABLE_SIZE; i++) + { + if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && + (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) + { + CCKSwingIndex = i; +// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", +// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); + break; + } + } + + //Write 0xa22 0xa23 + TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ; + + + //Write 0xa24 ~ 0xa27 + TempVal2 = 0; + TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+ + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); + + //Write 0xa28 0xa29 + TempVal3 = 0; + TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ; + } + else + { + for (i = 0; i < CCK_TABLE_SIZE; i++) + { + if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && + (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) + { + CCKSwingIndex = i; +// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", +// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); + break; + } + } + + //Write 0xa22 0xa23 + TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + + (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ; + + //Write 0xa24 ~ 0xa27 + TempVal2 = 0; + TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + + (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + + (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+ + (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); + + //Write 0xa28 0xa29 + TempVal3 = 0; + TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + + (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ; + } + + write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); + write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); + write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); +} + +void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) +{ + s32 TempCCk; + u8 CCK_index, CCK_index_old; + u8 Action = 0; //0: no action, 1: even->odd, 2:odd->even + u8 TimeOut = 100; + s32 i = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; + + + if (!IS_92C_SERIAL(pHalData->VersionID)) + return; +#if 0 + while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE) + { + PlatformSleepUs(100); + TimeOut--; + if(TimeOut <= 0) + { + RTPRINT(FINIT, INIT_TxPower, + ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" )); + break; + } + } +#endif + if (beven && !pMptCtx->bMptIndexEven) //odd->even + { + Action = 2; + pMptCtx->bMptIndexEven = _TRUE; + } + else if (!beven && pMptCtx->bMptIndexEven) //even->odd + { + Action = 1; + pMptCtx->bMptIndexEven = _FALSE; + } + + if (Action != 0) + { + //Query CCK default setting From 0xa24 + TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK; + for (i = 0; i < CCK_TABLE_SIZE; i++) + { + if (pHalData->dmpriv.bCCKinCH14) + { + if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE) + { + CCK_index_old = (u8) i; +// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n", +// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); + break; + } + } + else + { + if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE) + { + CCK_index_old = (u8) i; +// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n", +// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); + break; + } + } + } + + if (Action == 1) + CCK_index = CCK_index_old - 1; + else + CCK_index = CCK_index_old + 1; + +// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n", +// CCK_index)); + + //Adjust CCK according to gain index + if (!pHalData->dmpriv.bCCKinCH14) { + rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); + rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); + rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); + rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); + rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); + rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); + rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); + rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); + } else { + rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); + rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); + rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); + rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); + rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); + rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); + rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); + rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); + } + } +#if 0 + RTPRINT(FINIT, INIT_TxPower, + ("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20))); + + PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE); +#endif +} +/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ + +/* + * SetChannel + * Description + * Use H2C command to change channel, + * not only modify rf register, but also other setting need to be done. + */ +void Hal_SetChannel(PADAPTER pAdapter) +{ +#if 0 + struct mp_priv *pmp = &pAdapter->mppriv; + +// SelectChannel(pAdapter, pmp->channel); + set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth); +#else + u8 eRFPath; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct mp_priv *pmp = &pAdapter->mppriv; + u8 channel = pmp->channel; + u8 bandwidth = pmp->bandwidth; + u8 rate = pmp->rateidx; + + + // set RF channel register + for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) + { + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + _write_rfreg(pAdapter, (RF_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel); + else + _write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel); + } + Hal_mpt_SwitchRfSetting(pAdapter); + + SelectChannel(pAdapter, channel); + + if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) { + pHalData->dmpriv.bCCKinCH14 = _TRUE; + Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); + } + else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) { + pHalData->dmpriv.bCCKinCH14 = _FALSE; + Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); + } + +#endif +} + +/* + * Notice + * Switch bandwitdth may change center frequency(channel) + */ +void Hal_SetBandwidth(PADAPTER pAdapter) +{ + struct mp_priv *pmp = &pAdapter->mppriv; + + + SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); + Hal_mpt_SwitchRfSetting(pAdapter); +} + +void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) +{ + u32 tmpval = 0; + + + // rf-A cck tx power + write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); + tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A]; + write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); + + // rf-B cck tx power + write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); + tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B]; + write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); + + RT_TRACE(_module_mp_, _drv_notice_, + ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n", + TxPower[RF_PATH_A], TxPower[RF_PATH_B])); +} + +void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) +{ + u32 TxAGC = 0; + u8 tmpval = 0; + PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + + // HT Tx-rf(A) + tmpval = TxPower[RF_PATH_A]; + TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; + + write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); + + if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) + { + if (tmpval > pMptCtx->APK_bound[RF_PATH_A]) + write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][0]); + else + write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][1]); + } + + // HT Tx-rf(B) + tmpval = TxPower[RF_PATH_B]; + TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; + + write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); + + if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) + { + if (tmpval > pMptCtx->APK_bound[RF_PATH_B]) + write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][0]); + else + write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][1]); + } + + RT_TRACE(_module_mp_, _drv_notice_, + ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n", + TxPower[RF_PATH_A], TxPower[RF_PATH_B])); +} + +void Hal_SetAntennaPathPower(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 TxPowerLevel[MAX_RF_PATH_NUMS]; + u8 rfPath; + + TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx; + TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b; + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + default: + rfPath = RF_PATH_A; + break; + case ANTENNA_B: + rfPath = RF_PATH_B; + break; + case ANTENNA_C: + rfPath = RF_PATH_C; + break; + } + + switch (pHalData->rf_chip) + { + case RF_8225: + case RF_8256: + case RF_6052: + Hal_SetCCKTxPower(pAdapter, TxPowerLevel); + if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate + Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); + Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); + break; + + default: + break; + } +} + +void Hal_SetTxPower(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 TxPower = pAdapter->mppriv.txpoweridx; + u8 TxPowerLevel[MAX_RF_PATH_NUMS]; + u8 rf, rfPath; + + for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++) { + TxPowerLevel[rf] = TxPower; + } + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + default: + rfPath = RF_PATH_A; + break; + case ANTENNA_B: + rfPath = RF_PATH_B; + break; + case ANTENNA_C: + rfPath = RF_PATH_C; + break; + } + + switch (pHalData->rf_chip) + { + // 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! + // We should call normal driver API later!! + case RF_8225: + case RF_8256: + case RF_6052: + Hal_SetCCKTxPower(pAdapter, TxPowerLevel); + if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate + Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); + Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); + break; + + default: + break; + } + +// SetCCKTxPower(pAdapter, TxPower); +// SetOFDMTxPower(pAdapter, TxPower); +} + +void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) +{ + u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; + + return ; + + TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); + TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); + TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); + + tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); + write_bbreg(pAdapter, rFPGA0_TxGainStage, + (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); +} + +void Hal_SetDataRate(PADAPTER pAdapter) +{ + if(!IS_HARDWARE_TYPE_8723A(pAdapter)) + Hal_mpt_SwitchRfSetting(pAdapter); +} + + +void Hal_SetAntenna(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ + R_ANTENNA_SELECT_CCK *p_cck_txrx; + + u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; + u8 chgTx = 0, chgRx = 0; + u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; + + + p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; + p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; + + p_ofdm_tx->r_ant_ht1 = 0x1; + p_ofdm_tx->r_ant_ht2 = 0x2; // Second TX RF path is A + p_ofdm_tx->r_ant_non_ht = 0x3; // 0x1+0x2=0x3 + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + p_ofdm_tx->r_tx_antenna = 0x1; + r_ofdm_tx_en_val = 0x1; + p_ofdm_tx->r_ant_l = 0x1; + p_ofdm_tx->r_ant_ht_s1 = 0x1; + p_ofdm_tx->r_ant_non_ht_s1 = 0x1; + p_cck_txrx->r_ccktx_enable = 0x8; + chgTx = 1; + + // From SD3 Willis suggestion !!! Set RF A=TX and B as standby +// if (IS_HARDWARE_TYPE_8192S(pAdapter)) + { + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); + r_ofdm_tx_en_val = 0x3; + + // Power save + //cosa r_ant_select_ofdm_val = 0x11111111; + + // We need to close RFB by SW control + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); + } + } + break; + + case ANTENNA_B: + p_ofdm_tx->r_tx_antenna = 0x2; + r_ofdm_tx_en_val = 0x2; + p_ofdm_tx->r_ant_l = 0x2; + p_ofdm_tx->r_ant_ht_s1 = 0x2; + p_ofdm_tx->r_ant_non_ht_s1 = 0x2; + p_cck_txrx->r_ccktx_enable = 0x4; + chgTx = 1; + + // From SD3 Willis suggestion !!! Set RF A as standby + //if (IS_HARDWARE_TYPE_8192S(pAdapter)) + { + PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); +// r_ofdm_tx_en_val = 0x3; + + // Power save + //cosa r_ant_select_ofdm_val = 0x22222222; + + // 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. + // 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control + if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) + { + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); +// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); + } + } + break; + + case ANTENNA_AB: // For 8192S + p_ofdm_tx->r_tx_antenna = 0x3; + r_ofdm_tx_en_val = 0x3; + p_ofdm_tx->r_ant_l = 0x3; + p_ofdm_tx->r_ant_ht_s1 = 0x3; + p_ofdm_tx->r_ant_non_ht_s1 = 0x3; + p_cck_txrx->r_ccktx_enable = 0xC; + chgTx = 1; + + // From SD3 Willis suggestion !!! Set RF B as standby + //if (IS_HARDWARE_TYPE_8192S(pAdapter)) + { + PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); + PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); + + // Disable Power save + //cosa r_ant_select_ofdm_val = 0x3321333; +#if 0 + // 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table. + if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07. + { + mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF_PATH_A); + } +#endif + // 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); +// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); + } + } + break; + + default: + break; + } + + // + // r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D + // r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D + // r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D + // + switch (pAdapter->mppriv.antenna_rx) + { + case ANTENNA_A: + r_rx_antenna_ofdm = 0x1; // A + p_cck_txrx->r_cckrx_enable = 0x0; // default: A + p_cck_txrx->r_cckrx_enable_2 = 0x0; // option: A + chgRx = 1; + break; + + case ANTENNA_B: + r_rx_antenna_ofdm = 0x2; // B + p_cck_txrx->r_cckrx_enable = 0x1; // default: B + p_cck_txrx->r_cckrx_enable_2 = 0x1; // option: B + chgRx = 1; + break; + + case ANTENNA_AB: + r_rx_antenna_ofdm = 0x3; // AB + p_cck_txrx->r_cckrx_enable = 0x0; // default:A + p_cck_txrx->r_cckrx_enable_2 = 0x1; // option:B + chgRx = 1; + break; + + default: + break; + } + + if (chgTx && chgRx) + { + switch(pHalData->rf_chip) + { + case RF_8225: + case RF_8256: + case RF_6052: + //r_ant_sel_cck_val = r_ant_select_cck_val; + PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); //OFDM Tx + PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); //OFDM Tx + PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx + PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx + PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val); //CCK TxRx + + break; + + default: + break; + } + } + + RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); +} + +s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + + if (!netif_running(pAdapter->pnetdev)) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); + return _FAIL; + } + + if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); + return _FAIL; + } + + target_ther &= 0xff; + if (target_ther < 0x07) + target_ther = 0x07; + else if (target_ther > 0x1d) + target_ther = 0x1d; + + pHalData->EEPROMThermalMeter = target_ther; + + return _SUCCESS; +} + +void Hal_TriggerRFThermalMeter(PADAPTER pAdapter) +{ + + write_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x60); // 0x24: RF Reg[6:5] + +// RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" )); +} + +u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter) +{ + u32 ThermalValue = 0; + + ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F); // 0x24: RF Reg[4:0] +// RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue)); + return (u8)ThermalValue; +} + +void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value) +{ +#if 0 + fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); + rtw_msleep_os(1000); + fw_cmd_data(pAdapter, value, 1); + *value &= 0xFF; +#else + + Hal_TriggerRFThermalMeter(pAdapter); + rtw_msleep_os(1000); + *value = Hal_ReadRFThermalMeter(pAdapter); +#endif +} + +void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; + if (bStart)// Start Single Carrier. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n")); + // 1. if OFDM block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on + + { + // 2. set CCK test mode off, set to CCK normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); + // 3. turn on scramble setting + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); + } + // 4. Turn On Single Carrier Tx and turn off the other test modes. + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); +#ifdef CONFIG_RTL8192C + // 5. Disable TX power saving at STF & LLTF + write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 1); +#endif + } + else// Stop Single Carrier. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n")); + + // Turn off all test modes. + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); +#ifdef CONFIG_RTL8192C + // Cancel disable TX power saving at STF&LLTF + write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 0); +#endif + //Delay 10 ms //delay_ms(10); + rtw_msleep_os(10); + + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + } +} + + +void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); + + u8 rfPath; + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + default: + rfPath = RF_PATH_A; + break; + case ANTENNA_B: + rfPath = RF_PATH_B; + break; + case ANTENNA_C: + rfPath = RF_PATH_C; + break; + } + + pAdapter->mppriv.MptCtx.bSingleTone = bStart; + if (bStart)// Start Single Tone. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test start\n")); + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); + + if (is92C) + { + _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01); + rtw_usleep_os(100); + if (rfPath == RF_PATH_A) + write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); // PAD all on. + else if (rfPath == RF_PATH_B) + write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); // PAD all on. + write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on. + rtw_usleep_os(100); + } + else + { + write_rfreg(pAdapter, rfPath, 0x21, 0xd4000); + rtw_usleep_os(100); + write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on. + rtw_usleep_os(100); + } + + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); + + } + else// Stop Single Tone. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n")); + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); + + if (is92C) { + _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00); + rtw_usleep_os(100); + write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on. + write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on. + rtw_usleep_os(100); + } else { + write_rfreg(pAdapter, rfPath, 0x21, 0x54000); + rtw_usleep_os(100); + write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on. + rtw_usleep_os(100); + } + + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); + + } + +} + + +void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) +{ + pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; + if (bStart) // Start Carrier Suppression. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n")); + //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) + if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) + { + // 1. if CCK block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on + + //Turn Off All Test Mode + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); //turn off scramble setting + + //Set CCK Tx Test Rate + //PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate); + write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); //Set FTxRate to 1Mbps + } + + //Set for dynamic set Power index + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); + + } + else// Stop Carrier Suppression. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); + //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) + if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) { + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting + + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + } + //Stop for dynamic set Power index + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); + } + //DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n"); +} + +void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) +{ + u32 cckrate; + + if (bStart) + { + RT_TRACE(_module_mp_, _drv_alert_, + ("SetCCKContinuousTx: test start\n")); + + // 1. if CCK block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on + + //Turn Off All Test Mode + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + //Set CCK Tx Test Rate + #if 0 + switch(pAdapter->mppriv.rateidx) + { + case 2: + cckrate = 0; + break; + case 4: + cckrate = 1; + break; + case 11: + cckrate = 2; + break; + case 22: + cckrate = 3; + break; + default: + cckrate = 0; + break; + } + #else + cckrate = pAdapter->mppriv.rateidx; + #endif + write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting + + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); + + // Patch for CCK 11M waveform + if (cckrate == MPT_RATE_1M) + write_bbreg(pAdapter, 0xA71, BIT(6), bDisable); + else + write_bbreg(pAdapter, 0xA71, BIT(6), bEnable); + + + } + else { + RT_TRACE(_module_mp_, _drv_info_, + ("SetCCKContinuousTx: test stop\n")); + + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting + + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); + } + + pAdapter->mppriv.MptCtx.bCckContTx = bStart; + pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; +}/* mpt_StartCckContTx */ + +void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if (bStart) { + RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n")); + // 1. if OFDM block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on + { + + // 2. set CCK test mode off, set to CCK normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); + + // 3. turn on scramble setting + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); + } + // 4. Turn On Continue Tx and turn off the other test modes. + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); + + } else { + RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n")); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + //Delay 10 ms + rtw_msleep_os(10); + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); + } + + pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; + pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; +}/* mpt_StartOfdmContTx */ + +void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart) +{ +#if 0 + // ADC turn off [bit24-21] adc port0 ~ port1 + if (bStart) { + write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF); + rtw_usleep_os(100); + } +#endif + RT_TRACE(_module_mp_, _drv_info_, + ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); + + pAdapter->mppriv.MptCtx.bStartContTx = bStart; + if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) + { + Hal_SetCCKContinuousTx(pAdapter, bStart); + } + else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) && + (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15)) + { + Hal_SetOFDMContinuousTx(pAdapter, bStart); + } +#if 0 + // ADC turn on [bit24-21] adc port0 ~ port1 + if (!bStart) { + write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000); + } +#endif +} + +#endif // CONFIG_MP_INCLUDE + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_phycfg.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_phycfg.c new file mode 100755 index 000000000000..3f76775ada42 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_phycfg.c @@ -0,0 +1,3406 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723A_PHYCFG_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <rtw_byteorder.h> + +#ifdef CONFIG_IOL +#include <rtw_iol.h> +#endif + +#include <rtl8723a_hal.h> + + +/*---------------------------Define Local Constant---------------------------*/ +/* Channel switch:The size of command tables for switch channel*/ +#define MAX_PRECMD_CNT 16 +#define MAX_RFDEPENDCMD_CNT 16 +#define MAX_POSTCMD_CNT 16 + +#define MAX_DOZE_WAITING_TIMES_9x 64 + +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ + +/*------------------------Define local variable------------------------------*/ + + +/*--------------------Define export function prototype-----------------------*/ +// Please refer to header file +/*--------------------Define export function prototype-----------------------*/ + +/*----------------------------Function Body----------------------------------*/ +// +// 1. BB register R/W API +// + +/** +* Function: phy_CalculateBitShift +* +* OverView: Get shifted position of the BitMask +* +* Input: +* u4Byte BitMask, +* +* Output: none +* Return: u4Byte Return the shift bit bit position of the mask +*/ +static u32 +phy_CalculateBitShift( + u32 BitMask + ) +{ + u32 i; + + for(i=0; i<=31; i++) + { + if ( ((BitMask>>i) & 0x1 ) == 1) + break; + } + + return (i); +} + + +/** +* Function: PHY_QueryBBReg +* +* OverView: Read "sepcific bits" from BB register +* +* Input: +* PADAPTER Adapter, +* u4Byte RegAddr, //The target address to be readback +* u4Byte BitMask //The target bit position in the target address +* //to be readback +* Output: None +* Return: u4Byte Data //The readback register value +* Note: This function is equal to "GetRegSetting" in PHY programming guide +*/ +u32 +rtl8192c_PHY_QueryBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 ReturnValue = 0, OriginalValue, BitShift; + u16 BBWaitCounter = 0; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); + + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + ReturnValue = (OriginalValue & BitMask) >> BitShift; + + //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); + + return (ReturnValue); + +} + + +/** +* Function: PHY_SetBBReg +* +* OverView: Write "Specific bits" to BB register (page 8~) +* +* Input: +* PADAPTER Adapter, +* u4Byte RegAddr, //The target address to be modified +* u4Byte BitMask //The target bit position in the target address +* //to be modified +* u4Byte Data //The new register value in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRegSetting" in PHY programming guide +*/ + +VOID +rtl8192c_PHY_SetBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u16 BBWaitCounter = 0; + u32 OriginalValue, BitShift; + +#if (DISABLE_BB_RF == 1) + return; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); + + if(BitMask!= bMaskDWord){//if not "double word" write + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); + } + + rtw_write32(Adapter, RegAddr, Data); + + //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); + +} + + +// +// 2. RF register R/W API +// + +/*----------------------------------------------------------------------------- + * Function: phy_FwRFSerialRead() + * + * Overview: We support firmware to execute RF-R/W. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 01/21/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +static u32 +phy_FwRFSerialRead( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset ) +{ + u32 retValue = 0; + //RT_ASSERT(FALSE,("deprecate!\n")); + return (retValue); + +} /* phy_FwRFSerialRead */ + + +/*----------------------------------------------------------------------------- + * Function: phy_FwRFSerialWrite() + * + * Overview: We support firmware to execute RF-R/W. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 01/21/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +static VOID +phy_FwRFSerialWrite( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data ) +{ + //RT_ASSERT(FALSE,("deprecate!\n")); +} + + +/** +* Function: phy_RFSerialRead +* +* OverView: Read regster from RF chips +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte Offset, //The target address to be read +* +* Output: None +* Return: u4Byte reback value +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() +*/ +static u32 +phy_RFSerialRead( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset + ) +{ + u32 retValue = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + u32 tmplong,tmplong2; + u8 RfPiEnable=0; +#if 0 + if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs + return retValue; + if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs + return retValue; +#endif + // + // Make sure RF register offset is correct + // + Offset &= 0x3f; + + // + // Switch page for 8256 RF IC + // + NewOffset = Offset; + + // 2009/06/17 MH We can not execute IO for power save or other accident mode. + //if(RT_CANNOT_IO(Adapter)) + //{ + // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); + // return 0xFFFFFFFF; + //} + + // For 92S LSSI Read RFLSSIRead + // For RF A/B write 0x824/82c(does not work in the future) + // We must use 0x824 for RF A and B to execute read trigger + tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); + if(eRFPath == RF_PATH_A) + tmplong2 = tmplong; + else + tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); + + tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF + + PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); + rtw_udelay_os(10);// PlatformStallExecution(10); + + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); + rtw_udelay_os(100);//PlatformStallExecution(100); + + PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); + rtw_udelay_os(10);//PlatformStallExecution(10); + + if(eRFPath == RF_PATH_A) + RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); + else if(eRFPath == RF_PATH_B) + RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); + + if(RfPiEnable) + { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF + retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); + //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); + } + else + { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF + retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); + //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); + } + //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); + + return retValue; + +} + + + +/** +* Function: phy_RFSerialWrite +* +* OverView: Write data to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte Offset, //The target address to be read +* u4Byte Data //The new register Data in the target bit position +* //of the target to be read +* +* Output: None +* Return: None +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() + * + * Note: For RF8256 only + * The total count of RTL8256(Zebra4) register is around 36 bit it only employs + * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) + * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration + * programming guide" for more details. + * Thus, we define a sub-finction for RTL8526 register address conversion + * =========================================================== + * Register Mode RegCTL[1] RegCTL[0] Note + * (Reg00[12]) (Reg00[10]) + * =========================================================== + * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * + * 2008/09/02 MH Add 92S RF definition + * + * + * +*/ +static VOID +phy_RFSerialWrite( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data + ) +{ + u32 DataAndAddr = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + +#if 0 + //<Roger_TODO> We should check valid regs for RF_6052 case. + if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs + return; + if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs + return; +#endif + + // 2009/06/17 MH We can not execute IO for power save or other accident mode. + //if(RT_CANNOT_IO(Adapter)) + //{ + // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); + // return; + //} + + Offset &= 0x3f; + + // + // Shadow Update + // + //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); + + // + // Switch page for 8256 RF IC + // + NewOffset = Offset; + + // + // Put write addr in [5:0] and write data in [31:16] + // + //DataAndAddr = (Data<<16) | (NewOffset&0x3f); + DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF + + // + // Write Operation + // + PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); + //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); + +} + + +/** +* Function: PHY_QueryRFReg +* +* OverView: Query "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte RegAddr, //The target address to be read +* u4Byte BitMask //The target bit position in the target address +* //to be read +* +* Output: None +* Return: u4Byte Readback value +* Note: This function is equal to "GetRFRegSetting" in PHY programming guide +*/ +u32 +rtl8192c_PHY_QueryRFReg( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 Original_Value, Readback_Value, BitShift; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u8 RFWaitCounter = 0; + //_irqL irqL; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); + +#ifdef CONFIG_USB_HCI + //PlatformAcquireMutex(&pHalData->mxRFOperate); +#else + //_enter_critical(&pHalData->rf_lock, &irqL); +#endif + + + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + + BitShift = phy_CalculateBitShift(BitMask); + Readback_Value = (Original_Value & BitMask) >> BitShift; + +#ifdef CONFIG_USB_HCI + //PlatformReleaseMutex(&pHalData->mxRFOperate); +#else + //_exit_critical(&pHalData->rf_lock, &irqL); +#endif + + + //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", + // RegAddr, eRFPath, Original_Value)); + + return (Readback_Value); +} + +/** +* Function: PHY_SetRFReg +* +* OverView: Write "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte RegAddr, //The target address to be modified +* u4Byte BitMask //The target bit position in the target address +* //to be modified +* u4Byte Data //The new register Data in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRFRegSetting" in PHY programming guide +*/ +VOID +rtl8192c_PHY_SetRFReg( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u1Byte RFWaitCounter = 0; + u32 Original_Value, BitShift; + //_irqL irqL; + +#if (DISABLE_BB_RF == 1) + return; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + + +#ifdef CONFIG_USB_HCI + //PlatformAcquireMutex(&pHalData->mxRFOperate); +#else + //_enter_critical(&pHalData->rf_lock, &irqL); +#endif + + + // RF data is 12 bits only + if (BitMask != bRFRegOffsetMask) + { + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); + } + + phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); + + +#ifdef CONFIG_USB_HCI + //PlatformReleaseMutex(&pHalData->mxRFOperate); +#else + //_exit_critical(&pHalData->rf_lock, &irqL); +#endif + + //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + +} + + +// +// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. +// + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigMACWithParaFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: The format of MACPHY_REG.txt is different from PHY and RF. + * [Register][Mask][Value] + *---------------------------------------------------------------------------*/ +static int +phy_ConfigMACWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + return rtStatus; +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigMACWithHeaderFile() + * + * Overview: This function read BB parameters from Header file we gen, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: The format of MACPHY_REG.txt is different from PHY and RF. + * [Register][Mask][Value] + *---------------------------------------------------------------------------*/ +#ifndef CONFIG_PHY_SETTING_WITH_ODM +static int +phy_ConfigMACWithHeaderFile( + IN PADAPTER Adapter +) +{ + u32 i = 0; + u32 ArrayLength = 0; + u32* ptrArray; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //2008.11.06 Modified by tynli. + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n")); + ArrayLength = Rtl8723_MAC_ArrayLength; + ptrArray = (u32*)Rtl8723_MAC_Array; + +#ifdef CONFIG_IOL_MAC + { + struct xmit_frame *xmit_frame; + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) + return _FAIL; + + for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column + rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]); + } + + return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } +#else + for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column + rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]); + } +#endif + + return _SUCCESS; + +} +#endif//#ifndef CONFIG_PHY_SETTING_WITH_ODM + +/*----------------------------------------------------------------------------- + * Function: PHY_MACConfig8192C + * + * Overview: Condig MAC by header file or parameter file. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 08/12/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +s32 PHY_MACConfig8723A(PADAPTER Adapter) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s8 *pszMACRegFile; + s8 sz8723MACRegFile[] = RTL8723_PHY_MACREG; + BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); + + + pszMACRegFile = sz8723MACRegFile; + + // + // Config MAC + // +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv)) + rtStatus = _FAIL; + #else + rtStatus = phy_ConfigMACWithHeaderFile(Adapter); + #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + + // Not make sure EEPROM, add later + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n")); + rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); +#endif//CONFIG_EMBEDDED_FWIMG + +#ifdef CONFIG_PCI_HCI + //this switching setting cause some 8192cu hw have redownload fw fail issue + //improve 2-stream TX EVM by Jenyu + if(is92C) + rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71); +#endif + + + // 2010.07.13 AMPDU aggregation number 9 + //rtw_write8(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); + rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18. +#ifdef CONFIG_USB_HCI + if(is92C && (BOARD_USB_DONGLE == pHalData->BoardType)) + rtw_write8(Adapter, 0x40,0x04); +#endif + + return rtStatus; + +} + + +/** +* Function: phy_InitBBRFRegisterDefinition +* +* OverView: Initialize Register definition offset for Radio Path A/B/C/D +* +* Input: +* PADAPTER Adapter, +* +* Output: None +* Return: None +* Note: The initialization value is constant and it should never be changes +*/ +static VOID +phy_InitBBRFRegisterDefinition( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // RF Interface Sowrtware Control + pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 + pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) + pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 + pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) + + // RF Interface Readback Value + pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0 + pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) + pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4 + pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) + + // RF Interface Output (and Enable) + pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 + pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 + + // RF Interface (Output and) Enable + pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) + pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) + + //Addr of LSSI. Wirte RF register by driver + pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter + pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; + + // RF parameter + pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select + pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; + pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; + pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; + + // Tx AGC Gain Stage (same for all path. Should we remove this?) + pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + + // Tranceiver A~D HSSI Parameter-1 + pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 + pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1 + + // Tranceiver A~D HSSI Parameter-2 + pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 + pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 + + // RF switch Control + pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control + pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; + pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; + pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; + + // AGC control 1 + pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; + pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; + pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; + pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; + + // AGC control 2 + pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; + pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; + pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; + pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; + + // RX AFE control 1 + pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; + pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; + pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; + pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; + + // RX AFE control 1 + pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE; + pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; + pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; + pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; + + // Tx AFE control 1 + pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; + pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; + pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; + pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; + + // Tx AFE control 2 + pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE; + pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; + pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; + pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; + + // Tranceiver LSSI Readback SI mode + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; + + // Tranceiver LSSI Readback PI mode + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; + //pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; + //pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; + +} + + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithParaFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * 2008/11/06 MH For 92S we do not support silent reset now. Disable + * parameter file compare!!!!!!?? + * + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + return rtStatus; +} + + + +//**************************************** +// The following is for High Power PA +//**************************************** +VOID +phy_ConfigBBExternalPA( + IN PADAPTER Adapter +) +{ +#ifdef CONFIG_USB_HCI + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 i=0; + u32 temp=0; + + if(!pHalData->ExternalPA) + { + return; + } + + // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the + // same code as SU. It is already updated in PHY_REG_1T_HP.txt. +#if 0 + PHY_SetBBReg(Adapter, 0xee8, BIT28, 1); + temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord); + temp |= (BIT26|BIT21|BIT10|BIT5); + PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp); + PHY_SetBBReg(Adapter, 0x870, BIT10, 0); + PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080); + PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100); +#endif + +#endif +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithHeaderFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * u1Byte ConfigType 0 => PHY_CONFIG + * 1 =>AGC_TAB + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + *---------------------------------------------------------------------------*/ +#ifndef CONFIG_PHY_SETTING_WITH_ODM +static int +phy_ConfigBBWithHeaderFile( + IN PADAPTER Adapter, + IN u8 ConfigType +) +{ + int i; + u32* Rtl819XPHY_REGArray_Table; + u32* Rtl819XAGCTAB_Array_Table; + u16 PHY_REGArrayLen, AGCTAB_ArrayLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int ret = _SUCCESS; + + + AGCTAB_ArrayLen = Rtl8723_AGCTAB_1TArrayLength; + Rtl819XAGCTAB_Array_Table = (u32*)Rtl8723_AGCTAB_1TArray; + PHY_REGArrayLen = Rtl8723_PHY_REG_1TArrayLength; + Rtl819XPHY_REGArray_Table = (u32*)Rtl8723_PHY_REG_1TArray; +// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8723AGCTAB_1TArray\n")); +// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8723PHY_REG_1TArray\n")); + + if(ConfigType == BaseBand_Config_PHY_REG) + { + #ifdef CONFIG_IOL_BB_PHY_REG + { + struct xmit_frame *xmit_frame; + u32 tmp_value; + + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + ret = _FAIL; + goto exit; + } + + for(i=0;i<PHY_REGArrayLen;i=i+2) + { + tmp_value=Rtl819XPHY_REGArray_Table[i+1]; + + if (Rtl819XPHY_REGArray_Table[i] == 0xfe) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50); + else if (Rtl819XPHY_REGArray_Table[i] == 0xfd) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5); + else if (Rtl819XPHY_REGArray_Table[i] == 0xfc) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1); + else if (Rtl819XPHY_REGArray_Table[i] == 0xfb) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50); + else if (Rtl819XPHY_REGArray_Table[i] == 0xfa) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5); + else if (Rtl819XPHY_REGArray_Table[i] == 0xf9) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1); + + rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XPHY_REGArray_Table[i], tmp_value); + //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1])); + } + + ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } + #else + for(i=0;i<PHY_REGArrayLen;i=i+2) + { + if (Rtl819XPHY_REGArray_Table[i] == 0xfe){ + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + } + else if (Rtl819XPHY_REGArray_Table[i] == 0xfd) + rtw_mdelay_os(5); + else if (Rtl819XPHY_REGArray_Table[i] == 0xfc) + rtw_mdelay_os(1); + else if (Rtl819XPHY_REGArray_Table[i] == 0xfb) + rtw_udelay_os(50); + else if (Rtl819XPHY_REGArray_Table[i] == 0xfa) + rtw_udelay_os(5); + else if (Rtl819XPHY_REGArray_Table[i] == 0xf9) + rtw_udelay_os(1); + + PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]); + + // Add 1us delay between BB/RF register setting. + rtw_udelay_os(1); + + //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1])); + } + #endif + // for External PA + phy_ConfigBBExternalPA(Adapter); + } + else if(ConfigType == BaseBand_Config_AGC_TAB) + { + #ifdef CONFIG_IOL_BB_AGC_TAB + { + struct xmit_frame *xmit_frame; + + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + ret = _FAIL; + goto exit; + } + + for(i=0;i<AGCTAB_ArrayLen;i=i+2) + { + rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]); + //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1])); + } + + ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } + #else + for(i=0;i<AGCTAB_ArrayLen;i=i+2) + { + PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]); + + // Add 1us delay between BB/RF register setting. + rtw_udelay_os(1); + + //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1])); + } + #endif + } + +exit: + return ret; +} + +#endif +VOID +storePwrIndexDiffRateOffset( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(RegAddr == rTxAGC_A_Rate18_06) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0])); + } + if(RegAddr == rTxAGC_A_Rate54_24) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1])); + } + if(RegAddr == rTxAGC_A_CCK1_Mcs32) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6])); + } + if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7])); + } + if(RegAddr == rTxAGC_A_Mcs03_Mcs00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2])); + } + if(RegAddr == rTxAGC_A_Mcs07_Mcs04) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3])); + } + if(RegAddr == rTxAGC_A_Mcs11_Mcs08) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4])); + } + if(RegAddr == rTxAGC_A_Mcs15_Mcs12) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5])); + } + if(RegAddr == rTxAGC_B_Rate18_06) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8])); + } + if(RegAddr == rTxAGC_B_Rate54_24) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9])); + } + if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14])); + } + if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15])); + } + if(RegAddr == rTxAGC_B_Mcs03_Mcs00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10])); + } + if(RegAddr == rTxAGC_B_Mcs07_Mcs04) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11])); + } + if(RegAddr == rTxAGC_B_Mcs11_Mcs08) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12])); + } + if(RegAddr == rTxAGC_B_Mcs15_Mcs12) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13])); + pHalData->pwrGroupCnt++; + } +} +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithPgParaFile + * + * Overview: + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/06/2008 MHC Create Version 0. + * 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithPgParaFile( + IN PADAPTER Adapter, + IN u8* pFileName) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + + return rtStatus; + +} /* phy_ConfigBBWithPgParaFile */ + + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithPgHeaderFile + * + * Overview: Config PHY_REG_PG array + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!! + * 11/10/2008 tynli Modify to mew files. + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithPgHeaderFile( + IN PADAPTER Adapter, + IN u8 ConfigType) +{ + int i; + u32* Rtl819XPHY_REGArray_Table_PG; + u16 PHY_REGArrayPGLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + PHY_REGArrayPGLen = Rtl8723_PHY_REG_Array_PGLength; + Rtl819XPHY_REGArray_Table_PG = (u32*)Rtl8723_PHY_REG_Array_PG; + + if(ConfigType == BaseBand_Config_PHY_REG) + { + for(i=0;i<PHY_REGArrayPGLen;i=i+3) + { + #if 0 //without IO, no delay is neeeded... + if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfe){ + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + } + else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfd) + rtw_mdelay_os(5); + else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfc) + rtw_mdelay_os(1); + else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfb) + rtw_udelay_os(50); + else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfa) + rtw_udelay_os(5); + else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xf9) + rtw_udelay_os(1); + //PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1], Rtl819XPHY_REGArray_Table_PG[i+2]); + #endif + + storePwrIndexDiffRateOffset(Adapter, Rtl819XPHY_REGArray_Table_PG[i], + Rtl819XPHY_REGArray_Table_PG[i+1], + Rtl819XPHY_REGArray_Table_PG[i+2]); + //RT_TRACE(COMP_SEND, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table_PG[0] is %lx Rtl819XPHY_REGArray_Table_PG[1] is %lx \n",Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1])); + } + } + else + { + + //RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithPgHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n")); + } + + return _SUCCESS; + +} /* phy_ConfigBBWithPgHeaderFile */ + +#if (MP_DRIVER == 1) + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithMpParaFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * 2008/11/06 MH For 92S we do not support silent reset now. Disable + * parameter file compare!!!!!!?? + * + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithMpParaFile( + IN PADAPTER Adapter, + IN u8* pFileName +) +{ +#if 1 + int rtStatus = _SUCCESS; +#else + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s4Byte nLinesRead, ithLine; + RT_STATUS rtStatus = RT_STATUS_SUCCESS; + ps1Byte szLine; + u4Byte u4bRegOffset, u4bRegMask, u4bRegValue; + u4Byte u4bMove; + + if(ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FIRST_INIT)) + { + rtStatus = PlatformReadFile( + Adapter, + pFileName, + (pu1Byte)(pHalData->BufOfLines), + MAX_LINES_HWCONFIG_TXT, + MAX_BYTES_LINE_HWCONFIG_TXT, + &nLinesRead + ); + if(rtStatus == RT_STATUS_SUCCESS) + { + PlatformMoveMemory(pHalData->BufOfLines6, pHalData->BufOfLines, nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesRead6 = nLinesRead; + } + else + { + // Temporarily skip PHY_REG_MP.txt if file does not exist. + pHalData->nLinesRead6 = 0; + RT_TRACE(COMP_INIT, DBG_LOUD, ("No matched file \r\n")); + return RT_STATUS_SUCCESS; + } + } + else + { + PlatformMoveMemory(pHalData->BufOfLines, pHalData->BufOfLines6, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + nLinesRead = pHalData->nLinesRead6; + rtStatus = RT_STATUS_SUCCESS; + } + + + if(rtStatus == RT_STATUS_SUCCESS) + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName)); + + for(ithLine = 0; ithLine < nLinesRead; ithLine++) + { + szLine = pHalData->BufOfLines[ithLine]; + + if(!IsCommentString(szLine)) + { + // Get 1st hex value as register offset. + if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) + { + if(u4bRegOffset == 0xff) + { // Ending. + break; + } + else if (u4bRegOffset == 0xfe) + delay_ms(50); + else if (u4bRegOffset == 0xfd) + delay_ms(5); + else if (u4bRegOffset == 0xfc) + delay_ms(1); + else if (u4bRegOffset == 0xfb) + PlatformStallExecution(50); + else if (u4bRegOffset == 0xfa) + PlatformStallExecution(5); + else if (u4bRegOffset == 0xf9) + PlatformStallExecution(1); + + // Get 2nd hex value as register value. + szLine += u4bMove; + if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) + { + RT_TRACE(COMP_FPGA, DBG_TRACE, ("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue)); + PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); + + // Add 1us delay between BB/RF register setting. + PlatformStallExecution(1); + } + } + } + } + } + else + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): Failed%s\n", pFileName)); + } +#endif + + return rtStatus; +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithMpHeaderFile + * + * Overview: Config PHY_REG_MP array + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 02/04/2010 chiyokolin Modify to new files. + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithMpHeaderFile( + IN PADAPTER Adapter, + IN u1Byte ConfigType) +{ + int i; + u32* Rtl8192CPHY_REGArray_Table_MP; + u16 PHY_REGArrayMPLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + PHY_REGArrayMPLen = Rtl8723_PHY_REG_Array_MPLength; + Rtl8192CPHY_REGArray_Table_MP = (u32*)Rtl8723_PHY_REG_Array_MP; + + if(ConfigType == BaseBand_Config_PHY_REG) + { + for(i=0;i<PHY_REGArrayMPLen;i=i+2) + { + if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfe) { + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + } + else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfd) + rtw_mdelay_os(5); + else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfc) + rtw_mdelay_os(1); + else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfb) { + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + } + else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfa) + rtw_mdelay_os(5); + else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xf9) + rtw_mdelay_os(1); + PHY_SetBBReg(Adapter, Rtl8192CPHY_REGArray_Table_MP[i], bMaskDWord, Rtl8192CPHY_REGArray_Table_MP[i+1]); + + // Add 1us delay between BB/RF register setting. + rtw_mdelay_os(1); + +// RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl8192CPHY_REGArray_Table_MP[%d] is %lx Rtl8192CPHY_REGArray_Table_MP[%d] is %lx \n", i, i+1, Rtl8192CPHY_REGArray_Table_MP[i], Rtl8192CPHY_REGArray_Table_MP[i+1])); + } + } + else + { +// RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithMpHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n")); + } + + return _SUCCESS; +} /* phy_ConfigBBWithMpHeaderFile */ + +#endif // #if (MP_DRIVER == 1) + +static VOID +phy_BB8192C_Config_1T( + IN PADAPTER Adapter + ) +{ +#if 0 + //for path - A + PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x1); + PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x0303, 0x0101); + PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x1); + PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x1); + PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x1); + PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x1); + PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x1); +#endif + //for path - B + PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x2); + PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022); + + // 20100519 Joseph: Add for 1T2R config. Suggested by Kevin, Jenyu and Yunan. + PHY_SetBBReg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45); + PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23); + PHY_SetBBReg(Adapter, rOFDM0_AGCParameter1, 0x30, 0x1); // B path first AGC + + PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x2); + PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x2); + PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x2); + PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x2); + PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x2); + + +} + +// Joseph test: new initialize order!! +// Test only!! This part need to be re-organized. +// Now it is just for 8256. +static int +phy_BB8190_Config_HardCode( + IN PADAPTER Adapter + ) +{ + //RT_ASSERT(FALSE, ("This function is not implement yet!! \n")); + return _SUCCESS; +} + +static int +phy_BB8723a_Config_ParaFile( + IN PADAPTER Adapter + ) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + u8 sz8723BBRegFile[] = RTL8723_PHY_REG; + u8 sz8723AGCTableFile[] = RTL8723_AGC_TAB; + u8 sz8723BBRegPgFile[] = RTL8723_PHY_REG_PG; + u8 sz8723BBRegMpFile[] = RTL8723_PHY_REG_MP; + + u8 *pszBBRegFile = NULL, *pszAGCTableFile = NULL, *pszBBRegPgFile = NULL, *pszBBRegMpFile=NULL; + + + //RT_TRACE(COMP_INIT, DBG_TRACE, ("==>phy_BB8192S_Config_ParaFile\n")); + + pszBBRegFile = sz8723BBRegFile ; + pszAGCTableFile = sz8723AGCTableFile; + pszBBRegPgFile = sz8723BBRegPgFile; + pszBBRegMpFile = sz8723BBRegMpFile; + + // + // 1. Read PHY_REG.TXT BB INIT!! + // We will seperate as 88C / 92C according to chip version + // +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) + rtStatus = _FAIL; + #else + rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG); + #endif +#else + // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different + // type of parameter files to phy_reg.txt at first. + rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile); +#endif//#ifdef CONFIG_EMBEDDED_FWIMG + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } + +#if MP_DRIVER == 1 + if (Adapter->registrypriv.mp_mode == 1) + { + // + // 1.1 Read PHY_REG_MP.TXT BB INIT!! + // We will seperate as 88C / 92C according to chip version + // +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG); +#else + // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different + // type of parameter files to phy_reg.txt at first. + rtStatus = phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile); +#endif + + if(rtStatus != _SUCCESS){ +// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } + } +#endif // #if (MP_DRIVER == 1) + + // + // 20100318 Joseph: Config 2T2R to 1T2R if necessary. + // + if(pHalData->rf_type == RF_1T2R) + { + phy_BB8192C_Config_1T(Adapter); + DBG_8192C("phy_BB8723a_Config_ParaFile():Config to 1T!!\n"); + } + + // + // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt + // + if (pEEPROM->bautoload_fail_flag == _FALSE) + { + pHalData->pwrGroupCnt = 0; + +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG); +#else + rtStatus = phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile); +#endif + } + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } + + // + // 3. BB AGC table Initialization + // +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) + rtStatus = _FAIL; + #else + rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB); + #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + //RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); + rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile); +#endif + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); + goto phy_BB8190_Config_ParaFile_Fail; + } + +phy_BB8190_Config_ParaFile_Fail: + + return rtStatus; +} + + +int +PHY_BBConfig8723A( + IN PADAPTER Adapter + ) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 RegVal; + u8 TmpU1B=0; + u8 value8,CrystalCap; + + phy_InitBBRFRegisterDefinition(Adapter); + + if(IS_HARDWARE_TYPE_8723A(Adapter)) + { + // Suggested by Scott. tynli_test. 2010.12.30. + //1. 0x28[1] = 1 + TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL); + rtw_udelay_os(2); + rtw_write8(Adapter, REG_AFE_PLL_CTRL, (TmpU1B|BIT1)); + rtw_udelay_os(2); + + //2. 0x29[7:0] = 0xFF + rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xff); + rtw_udelay_os(2); + + //3. 0x02[1:0] = 2b'11 + TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN); + rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB)); + + //4. 0x25[6] = 0 + TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+1); + rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, (TmpU1B&(~BIT6))); + + //5. 0x24[20] = 0 //Advised by SD3 Alex Wang. 2011.02.09. + TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2); + rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, (TmpU1B&(~BIT4))); + + //6. 0x1f[7:0] = 0x07 + rtw_write8(Adapter, REG_RF_CTRL, 0x07); + } + else + { + // Enable BB and RF + RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); + rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); + + // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. + rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); + rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); + + rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); + +#ifdef CONFIG_USB_HCI + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); +#else + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); +#endif + + // 2009/10/21 by SD1 Jong. Modified by tynli. Not in Documented in V8.1. +#ifdef CONFIG_USB_HCI + //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. + rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); + rtw_write8(Adapter, 0x15, 0xe9); +#endif + + rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); + +#ifdef CONFIG_PCI_HCI + // Force use left antenna by default for 88C. + // if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) + if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) + { + RegVal = rtw_read32(Adapter, REG_LEDCFG0); + rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); + } +#endif + } + + // + // Config BB and AGC + // + rtStatus = phy_BB8723a_Config_ParaFile(Adapter); + +#ifdef CONFIG_USB_HCI + if(IS_HARDWARE_TYPE_8192CU(Adapter)&&IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) + &&(pHalData->BoardType == BOARD_USB_High_PA)) + rtw_write8(Adapter, 0xc72, 0x50); +#endif +//only for B-cut + if(IS_HARDWARE_TYPE_8723A(Adapter) && pHalData->EEPROMVersion >= 0x01) + { + CrystalCap = pHalData->CrystalCap & 0x3F; + PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); + } + + if(IS_HARDWARE_TYPE_8723AE(Adapter)) + PHY_SetBBReg(Adapter, REG_LDOA15_CTRL, bMaskDWord, 0x01572505); + return rtStatus; +} + + +int +PHY_RFConfig8723A( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // + // RF config + // + rtStatus = PHY_RF6052_Config8723A(Adapter); + return rtStatus; +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_ConfigRFWithParaFile() + * + * Overview: This function read RF parameters from general file format, and do RF 3-wire + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * RF_RADIO_PATH_E eRFPath + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: Delay may be required for RF configuration + *---------------------------------------------------------------------------*/ +int +rtl8192c_PHY_ConfigRFWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName, + RF_RADIO_PATH_E eRFPath +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + + return rtStatus; + +} + +//**************************************** +// The following is for High Power PA +//**************************************** +#define HighPowerRadioAArrayLen 22 +//This is for High power PA +u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { +0x013,0x00029ea4, +0x013,0x00025e74, +0x013,0x00020ea4, +0x013,0x0001ced0, +0x013,0x00019f40, +0x013,0x00014e70, +0x013,0x000106a0, +0x013,0x0000c670, +0x013,0x000082a0, +0x013,0x00004270, +0x013,0x00000240, +}; + +int +PHY_ConfigRFExternalPA( + IN PADAPTER Adapter, + RF_RADIO_PATH_E eRFPath +) +{ + int rtStatus = _SUCCESS; +#ifdef CONFIG_USB_HCI + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 i=0; + + if(!pHalData->ExternalPA) + { + return rtStatus; + } + + // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the + // same code as SU. It is already updated in radio_a_1T_HP.txt. +#if 0 + //add for SU High Power PA + for(i = 0;i<HighPowerRadioAArrayLen; i=i+2) + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("External PA, write RF 0x%lx=0x%lx\n", Rtl8192S_HighPower_RadioA_Array[i], Rtl8192S_HighPower_RadioA_Array[i+1])); + PHY_SetRFReg(Adapter, eRFPath, Rtl8192S_HighPower_RadioA_Array[i], bRFRegOffsetMask, Rtl8192S_HighPower_RadioA_Array[i+1]); + } +#endif + +#endif + return rtStatus; +} +//**************************************** +/*----------------------------------------------------------------------------- + * Function: PHY_ConfigRFWithHeaderFile() + * + * Overview: This function read RF parameters from general file format, and do RF 3-wire + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * RF_RADIO_PATH_E eRFPath + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: Delay may be required for RF configuration + *---------------------------------------------------------------------------*/ +#ifndef CONFIG_PHY_SETTING_WITH_ODM +int +rtl8723a_PHY_ConfigRFWithHeaderFile( + IN PADAPTER Adapter, + RF_RADIO_PATH_E eRFPath +) +{ + + int i; + int rtStatus = _SUCCESS; + u32* Rtl819XRadioA_Array_Table; + u32* Rtl819XRadioB_Array_Table; + u16 RadioA_ArrayLen,RadioB_ArrayLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + RadioA_ArrayLen = Rtl8723_RadioA_1TArrayLength; + Rtl819XRadioA_Array_Table = (u32*)Rtl8723_RadioA_1TArray; + RadioB_ArrayLen = Rtl8723_RadioB_1TArrayLength; + Rtl819XRadioB_Array_Table = (u32*)Rtl8723_RadioB_1TArray; +// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> PHY_ConfigRFWithHeaderFile() Radio_A:Rtl8723RadioA_1TArray\n")); +// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> PHY_ConfigRFWithHeaderFile() Radio_B:Rtl8723RadioB_1TArray\n")); + + switch (eRFPath) + { + case RF_PATH_A: + #ifdef CONFIG_IOL_RF_RF90_PATH_A + { + struct xmit_frame *xmit_frame; + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + rtStatus = _FAIL; + goto exit; + } + + for(i = 0;i<RadioA_ArrayLen; i=i+2) + { + if(Rtl819XRadioA_Array_Table[i] == 0xfe) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50); + else if (Rtl819XRadioA_Array_Table[i] == 0xfd) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5); + else if (Rtl819XRadioA_Array_Table[i] == 0xfc) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1); + else if (Rtl819XRadioA_Array_Table[i] == 0xfb) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50); + else if (Rtl819XRadioA_Array_Table[i] == 0xfa) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5); + else if (Rtl819XRadioA_Array_Table[i] == 0xf9) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1); + else + { + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset = 0; + u32 DataAndAddr = 0; + + NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f; + DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF + rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); + } + } + rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } + #else + for(i = 0;i<RadioA_ArrayLen; i=i+2) + { + if(Rtl819XRadioA_Array_Table[i] == 0xfe) { + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + } + else if (Rtl819XRadioA_Array_Table[i] == 0xfd) + rtw_mdelay_os(5); + else if (Rtl819XRadioA_Array_Table[i] == 0xfc) + rtw_mdelay_os(1); + else if (Rtl819XRadioA_Array_Table[i] == 0xfb) + rtw_udelay_os(50); + else if (Rtl819XRadioA_Array_Table[i] == 0xfa) + rtw_udelay_os(5); + else if (Rtl819XRadioA_Array_Table[i] == 0xf9) + rtw_udelay_os(1); + else + { + PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioA_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]); + // Add 1us delay between BB/RF register setting. + rtw_udelay_os(1); + } + } + #endif + //Add for High Power PA + PHY_ConfigRFExternalPA(Adapter, eRFPath); + break; + case RF_PATH_B: + #ifdef CONFIG_IOL_RF_RF_PATH_B + { + struct xmit_frame *xmit_frame; + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + rtStatus = _FAIL; + goto exit; + } + + for(i = 0;i<RadioB_ArrayLen; i=i+2) + { + if(Rtl819XRadioB_Array_Table[i] == 0xfe) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50); + else if (Rtl819XRadioB_Array_Table[i] == 0xfd) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5); + else if (Rtl819XRadioB_Array_Table[i] == 0xfc) + rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1); + else if (Rtl819XRadioB_Array_Table[i] == 0xfb) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50); + else if (Rtl819XRadioB_Array_Table[i] == 0xfa) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5); + else if (Rtl819XRadioB_Array_Table[i] == 0xf9) + rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1); + else + { + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset = 0; + u32 DataAndAddr = 0; + + NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f; + DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF + rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); + } + } + rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } + #else + for(i = 0;i<RadioB_ArrayLen; i=i+2) + { + if(Rtl819XRadioB_Array_Table[i] == 0xfe) + { // Deay specific ms. Only RF configuration require delay. +#if 0//#ifdef CONFIG_USB_HCI + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(1000); + #else + rtw_mdelay_os(1000); + #endif +#else + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif +#endif + } + else if (Rtl819XRadioB_Array_Table[i] == 0xfd) + rtw_mdelay_os(5); + else if (Rtl819XRadioB_Array_Table[i] == 0xfc) + rtw_mdelay_os(1); + else if (Rtl819XRadioB_Array_Table[i] == 0xfb) + rtw_udelay_os(50); + else if (Rtl819XRadioB_Array_Table[i] == 0xfa) + rtw_udelay_os(5); + else if (Rtl819XRadioB_Array_Table[i] == 0xf9) + rtw_udelay_os(1); + else + { + PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioB_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]); + // Add 1us delay between BB/RF register setting. + rtw_udelay_os(1); + } + } + #endif + break; + case RF_PATH_C: + break; + case RF_PATH_D: + break; + } + +exit: + return rtStatus; + +} +#endif + +/*----------------------------------------------------------------------------- + * Function: PHY_CheckBBAndRFOK() + * + * Overview: This function is write register and then readback to make sure whether + * BB[PHY0, PHY1], RF[Patha, path b, path c, path d] is Ok + * + * Input: PADAPTER Adapter + * HW90_BLOCK_E CheckBlock + * RF_RADIO_PATH_E eRFPath // it is used only when CheckBlock is HW90_BLOCK_RF + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: PHY is OK + * + * Note: This function may be removed in the ASIC + *---------------------------------------------------------------------------*/ +int +PHY_CheckBBAndRFOK( + IN PADAPTER Adapter, + IN HW90_BLOCK_E CheckBlock, + IN RF_RADIO_PATH_E eRFPath + ) +{ + int rtStatus = _SUCCESS; + + u32 i, CheckTimes = 4,ulRegRead = 0; + + u32 WriteAddr[4]; + u32 WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f}; + + // Initialize register address offset to be checked + WriteAddr[HW90_BLOCK_MAC] = 0x100; + WriteAddr[HW90_BLOCK_PHY0] = 0x900; + WriteAddr[HW90_BLOCK_PHY1] = 0x800; + WriteAddr[HW90_BLOCK_RF] = 0x3; + + for(i=0 ; i < CheckTimes ; i++) + { + + // + // Write Data to register and readback + // + switch(CheckBlock) + { + case HW90_BLOCK_MAC: + //RT_ASSERT(FALSE, ("PHY_CheckBBRFOK(): Never Write 0x100 here!")); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_CheckBBRFOK(): Never Write 0x100 here!\n")); + break; + + case HW90_BLOCK_PHY0: + case HW90_BLOCK_PHY1: + rtw_write32(Adapter, WriteAddr[CheckBlock], WriteData[i]); + ulRegRead = rtw_read32(Adapter, WriteAddr[CheckBlock]); + break; + + case HW90_BLOCK_RF: + // When initialization, we want the delay function(delay_ms(), delay_us() + // ==> actually we call PlatformStallExecution()) to do NdisStallExecution() + // [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK + // to run at Dispatch level to achive it. + //cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK); + WriteData[i] &= 0xfff; + PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]); + // TODO: we should not delay for such a long time. Ask SD3 + rtw_mdelay_os(10); + ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord); + rtw_mdelay_os(10); + //cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK); + break; + + default: + rtStatus = _FAIL; + break; + } + + + // + // Check whether readback data is correct + // + if(ulRegRead != WriteData[i]) + { + //RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); + rtStatus = _FAIL; + break; + } + } + + return rtStatus; +} + + +VOID +rtl8192c_PHY_GetHWRegOriginalValue( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // read rx initial gain + pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", + //pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], + //pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); + + // read framesync + pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); + pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", + // rOFDM0_RxDetector3, pHalData->framesync)); +} + + +// +// Description: +// Map dBm into Tx power index according to +// current HW model, for example, RF and PA, and +// current wireless mode. +// By Bruce, 2008-01-29. +// +static u8 +phy_DbmToTxPwrIdx( + IN PADAPTER Adapter, + IN WIRELESS_MODE WirelessMode, + IN int PowerInDbm + ) +{ + u8 TxPwrIdx = 0; + int Offset = 0; + + + // + // Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to + // 3dbm, and OFDM HT equals to 0dbm repectively. + // Note: + // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. + // By Bruce, 2008-01-29. + // + switch(WirelessMode) + { + case WIRELESS_MODE_B: + Offset = -7; + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + Offset = -8; + break; + default: + Offset = -8; + break; + } + + if((PowerInDbm - Offset) > 0) + { + TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); + } + else + { + TxPwrIdx = 0; + } + + // Tx Power Index is too large. + if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) + TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; + + return TxPwrIdx; +} + +// +// Description: +// Map Tx power index into dBm according to +// current HW model, for example, RF and PA, and +// current wireless mode. +// By Bruce, 2008-01-29. +// +int +phy_TxPwrIdxToDbm( + IN PADAPTER Adapter, + IN WIRELESS_MODE WirelessMode, + IN u8 TxPwrIdx + ) +{ + int Offset = 0; + int PwrOutDbm = 0; + + // + // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. + // Note: + // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. + // By Bruce, 2008-01-29. + // + switch(WirelessMode) + { + case WIRELESS_MODE_B: + Offset = -7; + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + Offset = -8; + default: + Offset = -8; + break; + } + + PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. + + return PwrOutDbm; +} + + +/*----------------------------------------------------------------------------- + * Function: GetTxPowerLevel8190() + * + * Overview: This function is export to "common" moudule + * + * Input: PADAPTER Adapter + * psByte Power Level + * + * Output: NONE + * + * Return: NONE + * + *---------------------------------------------------------------------------*/ +VOID +PHY_GetTxPowerLevel8192C( + IN PADAPTER Adapter, + OUT u32* powerlevel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 TxPwrLevel = 0; + int TxPwrDbm; + + // + // Because the Tx power indexes are different, we report the maximum of them to + // meet the CCX TPC request. By Bruce, 2008-01-31. + // + + // CCK + TxPwrLevel = pHalData->CurrentCckTxPwrIdx; + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); + + // Legacy OFDM + TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; + + // Compare with Legacy OFDM Tx power. + if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); + + // HT OFDM + TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; + + // Compare with HT OFDM Tx power. + if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); + + *powerlevel = TxPwrDbm; +} + + +static void getTxPowerIndex( + IN PADAPTER Adapter, + IN u8 channel, + IN OUT u8* cckPowerLevel, + IN OUT u8* ofdmPowerLevel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 index = (channel -1); + // 1. CCK + cckPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelCck[RF_PATH_A][index]; //RF-A + cckPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelCck[RF_PATH_B][index]; //RF-B + + // 2. OFDM for 1S or 2S + if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R) + { + // Read HT 40 OFDM TX power + ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF_PATH_A][index]; + ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF_PATH_B][index]; + } + else if (GET_RF_TYPE(Adapter) == RF_2T2R) + { + // Read HT 40 OFDM TX power + ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF_PATH_A][index]; + ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF_PATH_B][index]; + } + //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); +} + +static void ccxPowerIndexCheck( + IN PADAPTER Adapter, + IN u8 channel, + IN OUT u8* cckPowerLevel, + IN OUT u8* ofdmPowerLevel + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PRT_CCX_INFO pCcxInfo = GET_CCX_INFO(pMgntInfo); + + // + // CCX 2 S31, AP control of client transmit power: + // 1. We shall not exceed Cell Power Limit as possible as we can. + // 2. Tolerance is +/- 5dB. + // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit. + // + // TODO: + // 1. 802.11h power contraint + // + // 071011, by rcnjko. + // + if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && + pMgntInfo->mAssoc && + pCcxInfo->bUpdateCcxPwr && + pCcxInfo->bWithCcxCellPwr && + channel == pMgntInfo->dot11CurrentChannelNumber) + { + u1Byte CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr); + u1Byte LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr); + u1Byte OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr); + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", + pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx)); + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", + channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); + + // CCK + if(cckPowerLevel[0] > CckCellPwrIdx) + cckPowerLevel[0] = CckCellPwrIdx; + // Legacy OFDM, HT OFDM + if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx) + { + if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0) + { + ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff; + } + else + { + ofdmPowerLevel[0] = 0; + } + } + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", + cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); + } + + pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; + pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", + cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); +#endif +} +/*----------------------------------------------------------------------------- + * Function: SetTxPowerLevel8190() + * + * Overview: This function is export to "HalCommon" moudule + * We must consider RF path later!!!!!!! + * + * Input: PADAPTER Adapter + * u1Byte channel + * + * Output: NONE + * + * Return: NONE + * 2008/11/04 MHC We remove EEPROM_93C56. + * We need to move CCX relative code to independet file. + * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. + * + *---------------------------------------------------------------------------*/ +VOID +PHY_SetTxPowerLevel8192C( + IN PADAPTER Adapter, + IN u8 channel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 cckPowerLevel[2], ofdmPowerLevel[2]; // [0]:RF-A, [1]:RF-B +/* +#if(MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) + return; +#endif +*/ + if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE) + return; + + getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); + //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", + // channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1])); + + ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); + + rtl8192c_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); + rtl8192c_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); + +#if 0 + switch(pHalData->rf_chip) + { + case RF_8225: + PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]); + PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]); + break; + + case RF_8256: + PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]); + PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]); + break; + + case RF_6052: + PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); + PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); + break; + + case RF_8258: + break; + } +#endif + +} + + +// +// Description: +// Update transmit power level of all channel supported. +// +// TODO: +// A mode. +// By Bruce, 2008-02-04. +// +BOOLEAN +PHY_UpdateTxPowerDbm8192C( + IN PADAPTER Adapter, + IN int powerInDbm + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 idx; + u8 rf_path; + + // TODO: A mode Tx power. + u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); + u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); + + if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) + OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; + else + OfdmTxPwrIdx = 0; + + //RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx)); + + for(idx = 0; idx < 14; idx++) + { + for (rf_path = 0; rf_path < 2; rf_path++) + { + pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; + pHalData->TxPwrLevelHT40_1S[rf_path][idx] = + pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; + } + } + + //Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo + + return _TRUE; +} + + +/* + Description: + When beacon interval is changed, the values of the + hw registers should be modified. + By tynli, 2008.10.24. + +*/ + + +void +rtl8192c_PHY_SetBeaconHwReg( + IN PADAPTER Adapter, + IN u16 BeaconInterval + ) +{ + +} + + +VOID +PHY_ScanOperationBackup8192C( + IN PADAPTER Adapter, + IN u8 Operation + ) +{ +#if 0 + IO_TYPE IoType; + + if(!Adapter->bDriverStopped) + { + switch(Operation) + { + case SCAN_OPT_BACKUP: + IoType = IO_CMD_PAUSE_DM_BY_SCAN; + rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); + + break; + + case SCAN_OPT_RESTORE: + IoType = IO_CMD_RESUME_DM_BY_SCAN; + rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); + break; + + default: + RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); + break; + } + } +#endif +} + +/*----------------------------------------------------------------------------- + * Function: PHY_SetBWModeCallback8192C() + * + * Overview: Timer callback function for SetSetBWMode + * + * Input: PRT_TIMER pTimer + * + * Output: NONE + * + * Return: NONE + * + * Note: (1) We do not take j mode into consideration now + * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run + * concurrently? + *---------------------------------------------------------------------------*/ +static VOID +_PHY_SetBWMode92C( + IN PADAPTER Adapter +) +{ +// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 regBwOpMode; + u8 regRRSR_RSC; + + //return; + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //u4Byte NowL, NowH; + //u8Byte BeginTime, EndTime; + + /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ + pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SetBWModeInProgress= _FALSE; + return; + } + + // There is no 40MHz mode in RF_8225. + if(pHalData->rf_chip==RF_8225) + return; + + if(Adapter->bDriverStopped) + return; + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //NowL = PlatformEFIORead4Byte(Adapter, TSFR); + //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); + //BeginTime = ((u8Byte)NowH << 32) + NowL; + + //3// + //3//<1>Set MAC register + //3// + //Adapter->HalFunc.SetBWModeHandler(); + + regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); + regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); + //regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); + + switch(pHalData->CurrentChannelBW) + { + case HT_CHANNEL_WIDTH_20: + regBwOpMode |= BW_OPMODE_20MHZ; + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + break; + + case HT_CHANNEL_WIDTH_40: + regBwOpMode &= ~BW_OPMODE_20MHZ; + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + + regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); + rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); + break; + + default: + /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): + unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ + break; + } + + //3// + //3//<2>Set PHY related register + //3// + switch(pHalData->CurrentChannelBW) + { + /* 20 MHz channel*/ + case HT_CHANNEL_WIDTH_20: + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); + PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); + PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); + + break; + + + /* 40 MHz channel*/ + case HT_CHANNEL_WIDTH_40: + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); + PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); + + // Set Control channel to upper or lower. These settings are required only for 40MHz + PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); + PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); + PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); + + PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); + + break; + + + + default: + /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ + ,pHalData->CurrentChannelBW));*/ + break; + + } + //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //NowL = PlatformEFIORead4Byte(Adapter, TSFR); + //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); + //EndTime = ((u8Byte)NowH << 32) + NowL; + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); + + //3<3>Set RF related register + switch(pHalData->rf_chip) + { + case RF_8225: + //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + case RF_8256: + // Please implement this function in Hal8190PciPhy8256.c + //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + case RF_8258: + // Please implement this function in Hal8190PciPhy8258.c + // PHY_SetRF8258Bandwidth(); + break; + + case RF_PSEUDO_11N: + // Do Nothing + break; + + case RF_6052: + rtl8192c_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + default: + //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); + break; + } + + //pHalData->SetBWModeInProgress= FALSE; + + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); +} + + + /*----------------------------------------------------------------------------- + * Function: SetBWMode8190Pci() + * + * Overview: This function is export to "HalCommon" moudule + * + * Input: PADAPTER Adapter + * HT_CHANNEL_WIDTH Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: We do not take j mode into consideration now + *---------------------------------------------------------------------------*/ +VOID +PHY_SetBWMode8192C( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth, // 20M or 40M + IN unsigned char Offset // Upper, Lower, or Don't care +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; + // Modified it for 20/40 mhz switch by guangan 070531 + //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; + + //return; + + //if(pHalData->SwChnlInProgress) +// if(pMgntInfo->bScanInProgress) +// { +// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", +// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); +// return; +// } + +// if(pHalData->SetBWModeInProgress) +// { +// // Modified it for 20/40 mhz switch by guangan 070531 +// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", +// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); +// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); +// //return; +// } + + //if(pHalData->SetBWModeInProgress) + // return; + + //pHalData->SetBWModeInProgress= TRUE; + + pHalData->CurrentChannelBW = Bandwidth; + +#if 0 + if(Offset==HT_EXTCHNL_OFFSET_LOWER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; + else if(Offset==HT_EXTCHNL_OFFSET_UPPER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; + else + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +#else + pHalData->nCur40MhzPrimeSC = Offset; +#endif + + if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) + { + + #if 0 + //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); + #else + _PHY_SetBWMode92C(Adapter); + #endif + + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); + //pHalData->SetBWModeInProgress= FALSE; + pHalData->CurrentChannelBW = tmpBW; + } + +} + + +static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel) +{ + u8 eRFPath; + u32 param1, param2; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if ( Adapter->bNotifyChannelChange ) + { + DBG_871X( "[%s] ch = %d\n", __FUNCTION__, channel ); + } + + //s1. pre common command - CmdID_SetTxPowerLevel + PHY_SetTxPowerLevel8192C(Adapter, channel); + + //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel + param1 = RF_CHNLBW; + param2 = channel; + for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) + { + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); + } + + if(channel >= 1 && channel <= 9) + { + //DBG_8192C("phy_SwitchRfSetting8723A REG_AFE_PLL_CTRL 0xF0FFFF83\n"); + PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xF0FFFF83); + } + else if (channel >= 10 && channel <= 14) + { + //DBG_8192C("phy_SwitchRfSetting8723A REG_AFE_PLL_CTRL 0xF2FFFF83\n"); + PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xF2FFFF83); + } + //s3. post common command - CmdID_End, None + +} + +VOID +PHY_SwChnl8192C( // Call after initialization + IN PADAPTER Adapter, + IN u8 channel + ) +{ + //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 tmpchannel = pHalData->CurrentChannel; + BOOLEAN bResult = _TRUE; + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SwChnlInProgress=FALSE; + return; //return immediately if it is peudo-phy + } + + //if(pHalData->SwChnlInProgress) + // return; + + //if(pHalData->SetBWModeInProgress) + // return; + + //-------------------------------------------- + switch(pHalData->CurrentWirelessMode) + { + case WIRELESS_MODE_A: + case WIRELESS_MODE_N_5G: + //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); + break; + + case WIRELESS_MODE_B: + //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); + break; + + default: + //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); + break; + } + //-------------------------------------------- + + //pHalData->SwChnlInProgress = TRUE; + if(channel == 0) + channel = 1; + + pHalData->CurrentChannel=channel; + + //pHalData->SwChnlStage=0; + //pHalData->SwChnlStep=0; + + if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) + { + + #if 0 + //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); + #else + _PHY_SwChnl8192C(Adapter, channel); + #endif + + if(bResult) + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); + //if(IS_HARDWARE_TYPE_8192SU(Adapter)) + //{ + // pHalData->SwChnlInProgress = FALSE; + pHalData->CurrentChannel = tmpchannel; + //} + } + + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); + //if(IS_HARDWARE_TYPE_8192SU(Adapter)) + //{ + // pHalData->SwChnlInProgress = FALSE; + pHalData->CurrentChannel = tmpchannel; + //} + } +} + + +static BOOLEAN +phy_SwChnlStepByStep( + IN PADAPTER Adapter, + IN u8 channel, + IN u8 *stage, + IN u8 *step, + OUT u32 *delay + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PCHANNEL_ACCESS_SETTING pChnlAccessSetting; + SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT]; + u4Byte PreCommonCmdCnt; + SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT]; + u4Byte PostCommonCmdCnt; + SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT]; + u4Byte RfDependCmdCnt; + SwChnlCmd *CurrentCmd; + u1Byte eRFPath; + u4Byte RfTXPowerCtrl; + BOOLEAN bAdjRfTXPowerCtrl = _FALSE; + + + RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n")); +#if(MP_DRIVER != 1) + RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel)); +#endif + RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n")); + + pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting; + RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n")); + + //for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) + //for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) + //{ + // <1> Fill up pre common command. + PreCommonCmdCnt = 0; + phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, + CmdID_SetTxPowerLevel, 0, 0, 0); + phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, + CmdID_End, 0, 0, 0); + + // <2> Fill up post common command. + PostCommonCmdCnt = 0; + + phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, + CmdID_End, 0, 0, 0); + + // <3> Fill up RF dependent command. + RfDependCmdCnt = 0; + switch( pHalData->RFChipID ) + { + case RF_8225: + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + // 2008/09/04 MH Change channel. + if(channel==14) channel++; + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + break; + + case RF_8256: + // TEST!! This is not the table for 8256!! + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, rRfChannel, channel, 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + break; + + case RF_6052: + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, RF_CHNLBW, channel, 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + + break; + + case RF_8258: + break; + + // For FPGA two MAC verification + case RF_PSEUDO_11N: + return TRUE; + default: + RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); + return FALSE; + break; + } + + + do{ + switch(*stage) + { + case 0: + CurrentCmd=&PreCommonCmd[*step]; + break; + case 1: + CurrentCmd=&RfDependCmd[*step]; + break; + case 2: + CurrentCmd=&PostCommonCmd[*step]; + break; + } + + if(CurrentCmd->CmdID==CmdID_End) + { + if((*stage)==2) + { + return TRUE; + } + else + { + (*stage)++; + (*step)=0; + continue; + } + } + + switch(CurrentCmd->CmdID) + { + case CmdID_SetTxPowerLevel: + PHY_SetTxPowerLevel8192C(Adapter,channel); + break; + case CmdID_WritePortUlong: + PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2); + break; + case CmdID_WritePortUshort: + PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2); + break; + case CmdID_WritePortUchar: + PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2); + break; + case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!! + for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) + { +#if 1 + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); +#else + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2)); +#endif + } + break; + } + + break; + }while(TRUE); + //cosa }/*for(Number of RF paths)*/ + + (*delay)=CurrentCmd->msDelay; + (*step)++; + return FALSE; +#endif + return _TRUE; +} + + +static BOOLEAN +phy_SetSwChnlCmdArray( + SwChnlCmd* CmdTable, + u32 CmdTableIdx, + u32 CmdTableSz, + SwChnlCmdID CmdID, + u32 Para1, + u32 Para2, + u32 msDelay + ) +{ + SwChnlCmd* pCmd; + + if(CmdTable == NULL) + { + //RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n")); + return _FALSE; + } + if(CmdTableIdx >= CmdTableSz) + { + //RT_ASSERT(FALSE, + // ("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n", + // CmdTableIdx, CmdTableSz)); + return _FALSE; + } + + pCmd = CmdTable + CmdTableIdx; + pCmd->CmdID = CmdID; + pCmd->Para1 = Para1; + pCmd->Para2 = Para2; + pCmd->msDelay = msDelay; + + return _TRUE; +} + + +static void +phy_FinishSwChnlNow( // We should not call this function directly + IN PADAPTER Adapter, + IN u8 channel + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 delay; + + while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay)) + { + if(delay>0) + rtw_mdelay_os(delay); + } +#endif +} + + + +// +// Description: +// Switch channel synchronously. Called by SwChnlByDelayHandler. +// +// Implemented by Bruce, 2008-02-14. +// The following procedure is operted according to SwChanlCallback8190Pci(). +// However, this procedure is performed synchronously which should be running under +// passive level. +// +VOID +PHY_SwChnlPhy8192C( // Only called during initialize + IN PADAPTER Adapter, + IN u8 channel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel)); + + // Cannot IO. + //if(RT_CANNOT_IO(Adapter)) + // return; + + // Channel Switching is in progress. + //if(pHalData->SwChnlInProgress) + // return; + + //return immediately if it is peudo-phy + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SwChnlInProgress=FALSE; + return; + } + + //pHalData->SwChnlInProgress = TRUE; + if( channel == 0) + channel = 1; + + pHalData->CurrentChannel=channel; + + //pHalData->SwChnlStage = 0; + //pHalData->SwChnlStep = 0; + + phy_FinishSwChnlNow(Adapter,channel); + + //pHalData->SwChnlInProgress = FALSE; +} + + +// +// Description: +// Configure H/W functionality to enable/disable Monitor mode. +// Note, because we possibly need to configure BB and RF in this function, +// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. +// +VOID +PHY_SetMonitorMode8192C( + IN PADAPTER pAdapter, + IN BOOLEAN bEnableMonitorMode + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; + + //2 Note: we may need to stop antenna diversity. + if(bEnableMonitorMode) + { + bFilterOutNonAssociatedBSSID = FALSE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); + + pHalData->bInMonitorMode = TRUE; + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); + rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); + } + else + { + bFilterOutNonAssociatedBSSID = TRUE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); + + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); + pHalData->bInMonitorMode = FALSE; + rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); + } +#endif +} + + +/*----------------------------------------------------------------------------- + * Function: PHYCheckIsLegalRfPath8190Pci() + * + * Overview: Check different RF type to execute legal judgement. If RF Path is illegal + * We will return false. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/15/2007 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +BOOLEAN +PHY_CheckIsLegalRfPath8192C( + IN PADAPTER pAdapter, + IN u32 eRFPath) +{ +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN rtValue = _TRUE; + + // NOt check RF Path now.! +#if 0 + if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) + { + rtValue = FALSE; + } + if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) + { + + } +#endif + return rtValue; + +} /* PHY_CheckIsLegalRfPath8192C */ + +static VOID _PHY_SetRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ + u8 u1bTmp; + + if(!pAdapter->hw_init_completed) + { + u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; + rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); + //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) + { + if(bMain) + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A + else + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT + } + else + { + + if(bMain) + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main + else + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux + } + +} + +//return value TRUE => Main; FALSE => Aux + +static BOOLEAN _PHY_QueryRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN is2T + ) +{ +// if(is2T) +// return _TRUE; + + if(!pAdapter->hw_init_completed) + { + PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) + { + if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) + return _TRUE; + else + return _FALSE; + } + else + { + if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) + return _TRUE; + else + return _FALSE; + } +} + + +static VOID +_PHY_DumpRFReg(IN PADAPTER pAdapter) +{ + u32 rfRegValue,rfRegOffset; + + //RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); + + for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ + rfRegValue = PHY_QueryRFReg(pAdapter,RF_PATH_A, rfRegOffset, bMaskDWord); + //RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); + } + //RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); +} + + +VOID rtl8192c_PHY_SetRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN bMain + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#if DISABLE_BB_RF + return; +#endif + + if(IS_92C_SERIAL( pHalData->VersionID)){ + _PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE); + } + else{ + // For 88C 1T1R + _PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE); + } +} + +// +// Move from phycfg.c to gen.c to be code independent later +// +//-------------------------Move to other DIR later----------------------------*/ +#ifdef CONFIG_USB_HCI + +// +// Description: +// To dump all Tx FIFO LLT related link-list table. +// Added by Roger, 2009.03.10. +// +VOID +DumpBBDbgPort_92CU( + IN PADAPTER Adapter + ) +{ + + //RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n")); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n")); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); + PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); + PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord))); + +} +#endif + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_rf6052.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_rf6052.c new file mode 100755 index 000000000000..c86782f695e6 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_rf6052.c @@ -0,0 +1,985 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +/****************************************************************************** + * + * + * Module: rtl8192c_rf6052.c ( Source C File) + * + * Note: Provide RF 6052 series relative API. + * + * Function: + * + * Export: + * + * Abbrev: + * + * History: + * Data Who Remark + * + * 09/25/2008 MHC Create initial version. + * 11/05/2008 MHC Add API for tw power setting. + * + * +******************************************************************************/ + +#define _RTL8723A_RF6052_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <rtw_byteorder.h> + +#include <rtl8723a_hal.h> + +/*---------------------------Define Local Constant---------------------------*/ +// Define local structure for debug!!!!! +typedef struct RF_Shadow_Compare_Map { + // Shadow register value + u32 Value; + // Compare or not flag + u8 Compare; + // Record If it had ever modified unpredicted + u8 ErrorOrNot; + // Recorver Flag + u8 Recorver; + // + u8 Driver_Write; +}RF_SHADOW_T; +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ +/*------------------------Define global variable-----------------------------*/ + + +/*------------------------Define local variable------------------------------*/ +// 2008/11/20 MH For Debug only, RF +//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; +static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; +/*------------------------Define local variable------------------------------*/ + + +/*----------------------------------------------------------------------------- + * Function: RF_ChangeTxPath + * + * Overview: For RL6052, we must change some RF settign for 1T or 2T. + * + * Input: u2Byte DataRate // 0x80-8f, 0x90-9f + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 09/25/2008 MHC Create Version 0. + * Firmwaer support the utility later. + * + *---------------------------------------------------------------------------*/ +void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, + IN u16 DataRate) +{ +// We do not support gain table change inACUT now !!!! Delete later !!! +#if 0//(RTL92SE_FPGA_VERIFY == 0) + static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T + static u4Byte tx_gain_tbl1[6] + = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; + static u4Byte tx_gain_tbl2[6] + = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; + u1Byte i; + + if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) + { + // Set TX SYNC power G2G3 loop filter + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); + + // Change TX AGC gain table + for (i = 0; i < 6; i++) + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); + + // Set PA to high value + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); + } + else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) + { + // Set TX SYNC power G2G3 loop filter + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x04440); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); + + // Change TX AGC gain table + for (i = 0; i < 6; i++) + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); + + // Set PA low gain + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); + } +#endif + +} /* RF_ChangeTxPath */ + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetBandwidth() + * + * Overview: This function is called by SetBWModeCallback8190Pci() only + * + * Input: PADAPTER Adapter + * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: For RF type 0222D + *---------------------------------------------------------------------------*/ +VOID +rtl8192c_PHY_RF6052SetBandwidth( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth) //20M or 40M +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(Bandwidth) + { + case HT_CHANNEL_WIDTH_20: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400); + PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + case HT_CHANNEL_WIDTH_40: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)); + PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + default: + //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); + break; + } + +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetCckTxPower + * + * Overview: + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/05/2008 MHC Simulate 8192series.. + * + *---------------------------------------------------------------------------*/ + +VOID +rtl8192c_PHY_RF6052SetCckTxPower( + IN PADAPTER Adapter, + IN u8* pPowerlevel) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; + u32 TxAGC[2]={0, 0}, tmpval=0; + BOOLEAN TurboScanOff = _FALSE; + u8 idx1, idx2; + u8* ptr; + + // 2010/10/18 MH Accorsing to SD3 eechou's suggestion, we need to disable turbo scan for RU. + // Otherwise, external PA will be broken if power index > 0x20. +#ifdef CONFIG_USB_HCI + if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA) +#else + if (pHalData->EEPROMRegulatory != 0) +#endif + { + //DbgPrint("TurboScanOff=1 EEPROMRegulatory=%d ExternalPA=%d\n", pHalData->EEPROMRegulatory, pHalData->ExternalPA); + TurboScanOff = _TRUE; + } + + if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) + { + TxAGC[RF_PATH_A] = 0x3f3f3f3f; + TxAGC[RF_PATH_B] = 0x3f3f3f3f; + + TurboScanOff = _TRUE;//disable turbo scan + + if(TurboScanOff) + { + for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) + { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | + (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); +#ifdef CONFIG_USB_HCI + // 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. + if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) + TxAGC[idx1] = 0x20; +#endif + } + } + } + else + { +// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. +// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. +// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + { + TxAGC[RF_PATH_A] = 0x10101010; + TxAGC[RF_PATH_B] = 0x10101010; + } + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + { + TxAGC[RF_PATH_A] = 0x00000000; + TxAGC[RF_PATH_B] = 0x00000000; + } + else + { + for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) + { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | + (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); + } + + if(pHalData->EEPROMRegulatory==0) + { + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); + TxAGC[RF_PATH_A] += tmpval; + + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); + TxAGC[RF_PATH_B] += tmpval; + } + } + } + + for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) + { + ptr = (u8*)(&(TxAGC[idx1])); + for(idx2=0; idx2<4; idx2++) + { + if(*ptr > RF6052_MAX_TX_PWR) + *ptr = RF6052_MAX_TX_PWR; + ptr++; + } + } + + // rf-A cck tx power + tmpval = TxAGC[RF_PATH_A]&0xff; + PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32)); + tmpval = TxAGC[RF_PATH_A]>>8; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); + + // rf-B cck tx power + tmpval = TxAGC[RF_PATH_B]>>24; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); + tmpval = TxAGC[RF_PATH_B]&0x00ffffff; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", + // tmpval, rTxAGC_B_CCK1_55_Mcs32)); + +} /* PHY_RF6052SetCckTxPower */ + +// +// powerbase0 for OFDM rates +// powerbase1 for HT MCS rates +// +static void getPowerBase( + IN PADAPTER Adapter, + IN u8* pPowerLevel, + IN u8 Channel, + IN OUT u32* OfdmBase, + IN OUT u32* MCSBase + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 powerBase0, powerBase1; + u8 Legacy_pwrdiff=0; + s8 HT20_pwrdiff=0; + u8 i, powerlevel[2]; + + for(i=0; i<2; i++) + { + powerlevel[i] = pPowerLevel[i]; + Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1]; + powerBase0 = powerlevel[i] + Legacy_pwrdiff; + + powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; + *(OfdmBase+i) = powerBase0; + //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i))); + } + + for(i=0; i<2; i++) + { + //Check HT20 to HT40 diff + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + { + HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1]; + powerlevel[i] += HT20_pwrdiff; + } + powerBase1 = powerlevel[i]; + powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; + *(MCSBase+i) = powerBase1; + //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i))); + } +} + +static void getTxPowerWriteValByRegulatory( + IN PADAPTER Adapter, + IN u8 Channel, + IN u8 index, + IN u32* powerBase0, + IN u32* powerBase1, + OUT u32* pOutWriteVal + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 i, chnlGroup, pwr_diff_limit[4]; + u32 writeVal, customer_limit, rf; + + // + // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate + // + for(rf=0; rf<2; rf++) + { + switch(pHalData->EEPROMRegulatory) + { + case 0: // Realtek better performance + // increase power diff defined by Realtek for large power + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 1: // Realtek regulatory + // increase power diff defined by Realtek for regulatory + { + if(pHalData->pwrGroupCnt == 1) + chnlGroup = 0; + if(pHalData->pwrGroupCnt >= 3) + { + if(Channel <= 3) + chnlGroup = 0; + else if(Channel >= 4 && Channel <= 9) + chnlGroup = 1; + else if(Channel > 9) + chnlGroup = 2; + + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + chnlGroup++; + else + chnlGroup+=4; + } + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + } + break; + case 2: // Better regulatory + // don't increase any power diff + writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 3: // Customer defined power diff. + // increase power diff defined by customer. + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) + { + //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", + // ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); + } + else + { + //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", + // ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); + } + for (i=0; i<4; i++) + { + pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) + { + if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1]) + pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1]; + } + else + { + if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1]) + pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1]; + } + } + customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | + (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); + + writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + default: + chnlGroup = 0; + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + } + +// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. +// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. +// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. + + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + writeVal = 0x14141414; + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + writeVal = 0x00000000; + + + // 20100628 Joseph: High power mode for BT-Coexist mechanism. + // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); + writeVal = writeVal - 0x06060606; + } + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); + writeVal = writeVal; + } + *(pOutWriteVal+rf) = writeVal; + } +} + +static void writeOFDMPowerReg( + IN PADAPTER Adapter, + IN u8 index, + IN u32* pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, + rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, + rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; + u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, + rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, + rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; + u8 i, rf, pwr_val[4]; + u32 writeVal; + u16 RegOffset; + + for(rf=0; rf<2; rf++) + { + writeVal = pValue[rf]; + for(i=0; i<4; i++) + { + pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); + if (pwr_val[i] > RF6052_MAX_TX_PWR) + pwr_val[i] = RF6052_MAX_TX_PWR; + } + writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0]; + + if(rf == 0) + RegOffset = RegOffset_A[index]; + else + RegOffset = RegOffset_B[index]; + + PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); + //RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal)); + + // 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. + if(((pHalData->rf_type == RF_2T2R) && + (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))|| + ((pHalData->rf_type != RF_2T2R) && + (RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) ) + { + writeVal = pwr_val[3]; + if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04) + RegOffset = 0xc90; + if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04) + RegOffset = 0xc98; + for(i=0; i<3; i++) + { + if(i!=2) + writeVal = (writeVal>8)?(writeVal-8):0; + else + writeVal = (writeVal>6)?(writeVal-6):0; + rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal); + } + } + } +} +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetOFDMTxPower + * + * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for + * different channel and read original value in TX power register area from + * 0xe00. We increase offset and original value to be correct tx pwr. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/05/2008 MHC Simulate 8192 series method. + * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to + * A/B pwr difference or legacy/HT pwr diff. + * 2. We concern with path B legacy/HT OFDM difference. + * 01/22/2009 MHC Support new EPRO format from SD3. + * + *---------------------------------------------------------------------------*/ +VOID +rtl8192c_PHY_RF6052SetOFDMTxPower( + IN PADAPTER Adapter, + IN u8* pPowerLevel, + IN u8 Channel) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 writeVal[2], powerBase0[2], powerBase1[2]; + u8 index = 0; + + getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]); + + for(index=0; index<6; index++) + { + getTxPowerWriteValByRegulatory(Adapter, Channel, index, + &powerBase0[0], &powerBase1[0], &writeVal[0]); + + writeOFDMPowerReg(Adapter, index, &writeVal[0]); + } + +} + + +static VOID +phy_RF6052_Config_HardCode( + IN PADAPTER Adapter + ) +{ + + // Set Default Bandwidth to 20M + //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); + + // TODO: Set Default Channel to channel one for RTL8225 + +} + +static int +phy_RF6052_Config_ParaFile( + IN PADAPTER Adapter + ) +{ + u32 u4RegValue; + u8 eRFPath; + BB_REGISTER_DEFINITION_T *pPhyReg; + + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + static char sz8723RadioAFile[] = RTL8723_PHY_RADIO_A; + static char sz8723RadioBFile[] = RTL8723_PHY_RADIO_B; + char *pszRadioAFile, *pszRadioBFile; + + + pszRadioAFile = sz8723RadioAFile; + pszRadioBFile = sz8723RadioBFile; + + + //3//----------------------------------------------------------------- + //3// <2> Initialize RF + //3//----------------------------------------------------------------- + //for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) + for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) + { + + pPhyReg = &pHalData->PHYRegDef[eRFPath]; + + /*----Store original RFENV control type----*/ + switch(eRFPath) + { + case RF_PATH_A: + case RF_PATH_C: + u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); + break; + case RF_PATH_B : + case RF_PATH_D: + u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); + break; + } + + /*----Set RF_ENV enable----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); + rtw_udelay_os(1);//PlatformStallExecution(1); + + /*----Set RF_ENV output high----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); + rtw_udelay_os(1);//PlatformStallExecution(1); + + /* Set bit number of Address and Data for RF register */ + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 + rtw_udelay_os(1);//PlatformStallExecution(1); + + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 + rtw_udelay_os(1);//PlatformStallExecution(1); + + /*----Initialize RF fom connfiguration file----*/ + switch(eRFPath) + { + case RF_PATH_A: +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath)) + rtStatus= _FAIL; + #else + rtStatus= rtl8723a_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); + #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath); +#endif//#ifdef CONFIG_EMBEDDED_FWIMG + break; + case RF_PATH_B: +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath)) + rtStatus= _FAIL; + #else + rtStatus = rtl8723a_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); + #endif +#else + rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath); +#endif + break; + case RF_PATH_C: + break; + case RF_PATH_D: + break; + } + + /*----Restore RFENV control type----*/; + switch(eRFPath) + { + case RF_PATH_A: + case RF_PATH_C: + PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); + break; + case RF_PATH_B : + case RF_PATH_D: + PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); + break; + } + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); + goto phy_RF6052_Config_ParaFile_Fail; + } + + } + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); + return rtStatus; + +phy_RF6052_Config_ParaFile_Fail: + return rtStatus; +} + + +int +PHY_RF6052_Config8723A( + IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // + // Initialize general global value + // + // TODO: Extend RF_PATH_C and RF_PATH_D in the future + if(pHalData->rf_type == RF_1T1R) + pHalData->NumTotalRFPath = 1; + else + pHalData->NumTotalRFPath = 2; + + // + // Config BB and RF + // + rtStatus = phy_RF6052_Config_ParaFile(Adapter); + return rtStatus; + +} + + +// +// ==> RF shadow Operation API Code Section!!! +// +/*----------------------------------------------------------------------------- + * Function: PHY_RFShadowRead + * PHY_RFShadowWrite + * PHY_RFShadowCompare + * PHY_RFShadowRecorver + * PHY_RFShadowCompareAll + * PHY_RFShadowRecorverAll + * PHY_RFShadowCompareFlagSet + * PHY_RFShadowRecorverFlagSet + * + * Overview: When we set RF register, we must write shadow at first. + * When we are running, we must compare shadow abd locate error addr. + * Decide to recorver or not. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/20/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +u32 +PHY_RFShadowRead( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + return RF_Shadow[eRFPath][Offset].Value; + +} /* PHY_RFShadowRead */ + + +VOID +PHY_RFShadowWrite( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data) +{ + RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); + RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; + +} /* PHY_RFShadowWrite */ + + +BOOLEAN +PHY_RFShadowCompare( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + u32 reg; + // Check if we need to check the register + if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) + { + reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask); + // Compare shadow and real rf register for 20bits!! + if (RF_Shadow[eRFPath][Offset].Value != reg) + { + // Locate error position. + RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", + //eRFPath, Offset, reg)); + } + return RF_Shadow[eRFPath][Offset].ErrorOrNot ; + } + return _FALSE; +} /* PHY_RFShadowCompare */ + + +VOID +PHY_RFShadowRecorver( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + // Check if the address is error + if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) + { + // Check if we need to recorver the register. + if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) + { + PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, + RF_Shadow[eRFPath][Offset].Value); + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", + //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); + } + } + +} /* PHY_RFShadowRecorver */ + + +VOID +PHY_RFShadowCompareAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + PHY_RFShadowCompare(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); + } + } + +} /* PHY_RFShadowCompareAll */ + + +VOID +PHY_RFShadowRecorverAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + PHY_RFShadowRecorver(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); + } + } + +} /* PHY_RFShadowRecorverAll */ + + +VOID +PHY_RFShadowCompareFlagSet( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u8 Type) +{ + // Set True or False!!! + RF_Shadow[eRFPath][Offset].Compare = Type; + +} /* PHY_RFShadowCompareFlagSet */ + + +VOID +PHY_RFShadowRecorverFlagSet( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u8 Type) +{ + // Set True or False!!! + RF_Shadow[eRFPath][Offset].Recorver= Type; + +} /* PHY_RFShadowRecorverFlagSet */ + + +VOID +PHY_RFShadowCompareFlagSetAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! + if (Offset != 0x26 && Offset != 0x27) + PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); + else + PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); + } + } + +} /* PHY_RFShadowCompareFlagSetAll */ + + +VOID +PHY_RFShadowRecorverFlagSetAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! + if (Offset != 0x26 && Offset != 0x27) + PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); + else + PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); + } + } + +} /* PHY_RFShadowCompareFlagSetAll */ + +VOID +PHY_RFShadowRefresh( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + RF_Shadow[eRFPath][Offset].Value = 0; + RF_Shadow[eRFPath][Offset].Compare = _FALSE; + RF_Shadow[eRFPath][Offset].Recorver = _FALSE; + RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; + RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; + } + } + +} /* PHY_RFShadowRead */ + +/* End of HalRf6052.c */ + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_rxdesc.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_rxdesc.c new file mode 100755 index 000000000000..f030eb821291 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_rxdesc.c @@ -0,0 +1,750 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723A_REDESC_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <rtl8723a_hal.h> + +static s32 translate2dbm(u8 signal_strength_idx) +{ + s32 signal_power; // in dBm. + + + // Translate to dBm (x=0.5y-95). + signal_power = (s32)((signal_strength_idx + 1) >> 1); + signal_power -= 95; + + return signal_power; +} +#if 0 +static u8 evm_db2percentage(s8 value) +{ + // + // -33dB~0dB to 0%~99% + // + s8 ret_val; + + ret_val = value; + //ret_val /= 2; + + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val)); + + if(ret_val >= 0) + ret_val = 0; + if(ret_val <= -33) + ret_val = -33; + + ret_val = 0 - ret_val; + ret_val*=3; + + if(ret_val == 99) + ret_val = 100; + + return(ret_val); +} + + +static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig ) +{ + s32 ret_sig; + +#ifdef CONFIG_USB_HCI + if(cur_sig >= 51 && cur_sig <= 100) + { + ret_sig = 100; + } + else if(cur_sig >= 41 && cur_sig <= 50) + { + ret_sig = 80 + ((cur_sig - 40)*2); + } + else if(cur_sig >= 31 && cur_sig <= 40) + { + ret_sig = 66 + (cur_sig - 30); + } + else if(cur_sig >= 21 && cur_sig <= 30) + { + ret_sig = 54 + (cur_sig - 20); + } + else if(cur_sig >= 10 && cur_sig <= 20) + { + ret_sig = 42 + (((cur_sig - 10) * 2) / 3); + } + else if(cur_sig >= 5 && cur_sig <= 9) + { + ret_sig = 22 + (((cur_sig - 5) * 3) / 2); + } + else if(cur_sig >= 1 && cur_sig <= 4) + { + ret_sig = 6 + (((cur_sig - 1) * 3) / 2); + } + else + { + ret_sig = cur_sig; + } +#else + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if(pHalData->CustomerID == RT_CID_819x_Lenovo) + { + // Step 1. Scale mapping. + // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. + // 20100426 Joseph: Modify Signal strength mapping. + // This modification makes the RSSI indication similar to Intel solution. + // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. + if(cur_sig >= 54 && cur_sig <= 100) + { + ret_sig = 100; + } + else if(cur_sig>=42 && cur_sig <= 53 ) + { + ret_sig = 95; + } + else if(cur_sig>=36 && cur_sig <= 41 ) + { + ret_sig = 74 + ((cur_sig - 36) *20)/6; + } + else if(cur_sig>=33 && cur_sig <= 35 ) + { + ret_sig = 65 + ((cur_sig - 33) *8)/2; + } + else if(cur_sig>=18 && cur_sig <= 32 ) + { + ret_sig = 62 + ((cur_sig - 18) *2)/15; + } + else if(cur_sig>=15 && cur_sig <= 17 ) + { + ret_sig = 33 + ((cur_sig - 15) *28)/2; + } + else if(cur_sig>=10 && cur_sig <= 14 ) + { + ret_sig = 39; + } + else if(cur_sig>=8 && cur_sig <= 9 ) + { + ret_sig = 33; + } + else if(cur_sig <= 8 ) + { + ret_sig = 19; + } + } + else + { + // Step 1. Scale mapping. + if(cur_sig >= 61 && cur_sig <= 100) + { + ret_sig = 90 + ((cur_sig - 60) / 4); + } + else if(cur_sig >= 41 && cur_sig <= 60) + { + ret_sig = 78 + ((cur_sig - 40) / 2); + } + else if(cur_sig >= 31 && cur_sig <= 40) + { + ret_sig = 66 + (cur_sig - 30); + } + else if(cur_sig >= 21 && cur_sig <= 30) + { + ret_sig = 54 + (cur_sig - 20); + } + else if(cur_sig >= 5 && cur_sig <= 20) + { + ret_sig = 42 + (((cur_sig - 5) * 2) / 3); + } + else if(cur_sig == 4) + { + ret_sig = 36; + } + else if(cur_sig == 3) + { + ret_sig = 27; + } + else if(cur_sig == 2) + { + ret_sig = 18; + } + else if(cur_sig == 1) + { + ret_sig = 9; + } + else + { + ret_sig = cur_sig; + } + } +#endif + + return ret_sig; +} + + + +void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat) +{ + PHY_STS_OFDM_8192CD_T *pOfdm_buf; + PHY_STS_CCK_8192CD_T *pCck_buf; + u8 i, max_spatial_stream, evm; + s8 rx_pwr[4], rx_pwr_all = 0; + u8 pwdb_all; + u32 rssi,total_rssi=0; + u8 bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0; + _adapter *padapter = prframe->u.hdr.adapter; + struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 tmp_rxsnr; + s8 rx_snrX; + +#ifdef CONFIG_HW_ANTENNA_DIVERSITY + PHY_RX_DRIVER_INFO_8192CD *pDrvInfo = ((PHY_RX_DRIVER_INFO_8192CD *)pphy_stat); + u8 bant1_sel = (pDrvInfo->ANTSEL == 1)?_TRUE:_FALSE; +#endif + if(pphy_stat==NULL){ + // DBG_8192C("\n%s pphy_stat is NULL, Return\n",__FUNCTION__); + return; + } + + // Record it for next packet processing + bcck_rate=(pattrib->mcs_rate<=3? 1:0); + + if(bcck_rate) //CCK + { + u8 report; +#ifdef CONFIG_HW_ANTENNA_DIVERSITY + if(bant1_sel == _TRUE) + pHalData->CCK_Ant1_Cnt++; + else + pHalData->CCK_Ant2_Cnt++; +#endif + + // CCK Driver info Structure is not the same as OFDM packet. + pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat; + //Adapter->RxStats.NumQryPhyStatusCCK++; + + // + // (1)Hardware does not provide RSSI for CCK + // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) + // + + if(adapter_to_pwrctl(padapter)->rf_pwrstate == rf_on) + cck_highpwr = (u8)pHalData->bCckHighPower; + else + cck_highpwr = _FALSE; + + if(!cck_highpwr) + { + report = pCck_buf->cck_agc_rpt&0xc0; + report = report>>6; + switch(report) + { + // 03312009 modified by cosa + // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion + // Note: different RF with the different RNA gain. + case 0x3: + rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e); + break; + case 0x2: + rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e); + break; + case 0x1: + rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e); + break; + case 0x0: + rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e); + break; + } + } + else + { + report = pCck_buf->cck_agc_rpt & 0x60; + report = report>>5; + switch(report) + { + case 0x3: + rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; + break; + case 0x2: + rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1); + break; + case 0x1: + rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; + break; + case 0x0: + rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; + break; + } + } + + pwdb_all= query_rx_pwr_percentage(rx_pwr_all); + if(pHalData->CustomerID == RT_CID_819x_Lenovo) + { + // CCK gain is smaller than OFDM/MCS gain, + // so we add gain diff by experiences, the val is 6 + pwdb_all+=6; + if(pwdb_all > 100) + pwdb_all = 100; + // modify the offset to make the same gain index with OFDM. + if(pwdb_all > 34 && pwdb_all <= 42) + pwdb_all -= 2; + else if(pwdb_all > 26 && pwdb_all <= 34) + pwdb_all -= 6; + else if(pwdb_all > 14 && pwdb_all <= 26) + pwdb_all -= 8; + else if(pwdb_all > 4 && pwdb_all <= 14) + pwdb_all -= 4; + } + + pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive + pattrib->RecvSignalPower = rx_pwr_all; //dBM + padapter->recvpriv.rxpwdb = rx_pwr_all; + // + // (3) Get Signal Quality (EVM) + // + //if(bPacketMatchBSSID) + { + u8 sq; + + if(pHalData->CustomerID == RT_CID_819x_Lenovo) + { + // mapping to 5 bars for vista signal strength + // signal quality in driver will be displayed to signal strength + // in vista. + if(pwdb_all >= 50) + sq = 100; + else if(pwdb_all >= 35 && pwdb_all < 50) + sq = 80; + else if(pwdb_all >= 22 && pwdb_all < 35) + sq = 60; + else if(pwdb_all >= 18 && pwdb_all < 22) + sq = 40; + else + sq = 20; + } + else + { + if(pwdb_all> 40) + { + sq = 100; + } + else + { + sq = pCck_buf->SQ_rpt; + + if(pCck_buf->SQ_rpt > 64) + sq = 0; + else if (pCck_buf->SQ_rpt < 20) + sq= 100; + else + sq = ((64-sq) * 100) / 44; + + } + } + + pattrib->signal_qual=sq; + pattrib->rx_mimo_signal_qual[0]=sq; + pattrib->rx_mimo_signal_qual[1]=(-1); + } + + } + else //OFDM/HT + { +#ifdef CONFIG_HW_ANTENNA_DIVERSITY + if(bant1_sel == _TRUE) + pHalData->OFDM_Ant1_Cnt++; + else + pHalData->OFDM_Ant2_Cnt++; +#endif + pdmpriv->OFDM_Pkt_Cnt++; + + pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat; + + // + // (1)Get RSSI per-path + // + for(i=0; i<pHalData->NumTotalRFPath; i++) + { + // 2008/01/30 MH we will judge RF RX path now. + if (pHalData->bRFPathRxEnable[i]) + rf_rx_num++; + //else + //continue; + + rx_pwr[i] = ((pOfdm_buf->trsw_gain_X[i]&0x3F)*2) - 110; + + /* Translate DBM to percentage. */ + rssi=query_rx_pwr_percentage(rx_pwr[i]); + total_rssi += rssi; + + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi)); + + //Get Rx snr value in DB + tmp_rxsnr = pOfdm_buf->rxsnr_X[i]; + rx_snrX = (s8)(tmp_rxsnr); + rx_snrX >>= 1; + padapter->recvpriv.RxSNRdB[i] = (int)rx_snrX; + + /* Record Signal Strength for next packet */ + //if(bPacketMatchBSSID) + { + //pRfd->Status.RxMIMOSignalStrength[i] =(u1Byte) RSSI; + + //The following is for lenovo signal strength in vista + if(pHalData->CustomerID == RT_CID_819x_Lenovo) + { + u8 sq; + + if(i == 0) + { + // mapping to 5 bars for vista signal strength + // signal quality in driver will be displayed to signal strength + // in vista. + if(rssi >= 50) + sq = 100; + else if(rssi >= 35 && rssi < 50) + sq = 80; + else if(rssi >= 22 && rssi < 35) + sq = 60; + else if(rssi >= 18 && rssi < 22) + sq = 40; + else + sq = 20; + //DbgPrint("ofdm/mcs RSSI=%d\n", RSSI); + //pRfd->Status.SignalQuality = SQ; + //DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality); + } + } + } + } + + + // + // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive),average + // + rx_pwr_all = (((pOfdm_buf->pwdb_all ) >> 1 )& 0x7f) -110;//for OFDM Average RSSI + pwdb_all = query_rx_pwr_percentage(rx_pwr_all); + + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n", pwdb_all)); + + pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive + pattrib->RecvSignalPower = rx_pwr_all;//dBM + padapter->recvpriv.rxpwdb = rx_pwr_all; + // + // (3)EVM of HT rate + // + if(pHalData->CustomerID != RT_CID_819x_Lenovo) + { + if(pattrib->rxht && pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27) + max_spatial_stream = 2; //both spatial stream make sense + else + max_spatial_stream = 1; //only spatial stream 1 makes sense + + for(i=0; i<max_spatial_stream; i++) + { + // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment + // fill most significant bit to "zero" when doing shifting operation which may change a negative + // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. + evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i]/*/ 2*/));//dbm + + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", + pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm)); + + //if(bPacketMatchBSSID) + { + if(i==0) // Fill value in RFD, Get the first spatial stream only + { + pattrib->signal_qual = (u8)(evm & 0xff); + } + pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff); + } + } + + } + + // + // 4. Record rx statistics for debug + // + + } + + + //UI BSS List signal strength(in percentage), make it good looking, from 0~100. + //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). + if(bcck_rate) + { + pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all); + } + else + { + if (rf_rx_num != 0) + { + pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num)); + } + } + //DBG_8192C("%s,rx_pwr_all(%d),RxPWDBAll(%d)\n",__FUNCTION__,rx_pwr_all,pattrib->RxPWDBAll); + +} + +#endif + +static void process_rssi(_adapter *padapter,union recv_frame *prframe) +{ + u32 last_rssi, tmp_val; + struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + + //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); + //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) + { + + #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + if(signal_stat->update_req) { + signal_stat->total_num = 0; + signal_stat->total_val = 0; + signal_stat->update_req = 0; + } + + signal_stat->total_num++; + signal_stat->total_val += pattrib->phy_info.SignalStrength; + signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; + #else //CONFIG_NEW_SIGNAL_STAT_PROCESS + + //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test + if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) + { + padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; + last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; + padapter->recvpriv.signal_strength_data.total_val -= last_rssi; + } + padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength; + + padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength; + if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) + padapter->recvpriv.signal_strength_data.index = 0; + + + tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; + + if(padapter->recvpriv.is_signal_dbg) { + padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; + padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg); + } else { + padapter->recvpriv.signal_strength= tmp_val; + padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val); + } + + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); + #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + } + +}// Process_UI_RSSI_8192C + +#if 0 +static void process_PWDB(_adapter *padapter, union recv_frame *prframe) +{ + int UndecoratedSmoothedPWDB; + int UndecoratedSmoothedCCK; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct rx_pkt_attrib *pattrib= &prframe->u.hdr.attrib; + struct sta_info *psta = prframe->u.hdr.psta; + u8 isCCKrate=(pattrib->mcs_rate<=3? 1:0); + + + if(psta) + { + UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + UndecoratedSmoothedCCK = psta->rssi_stat.UndecoratedSmoothedCCK; + } + else + { + UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; + UndecoratedSmoothedCCK = pdmpriv->UndecoratedSmoothedCCK; + } + + //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) + + if(!isCCKrate) + { + // Process OFDM RSSI + if(UndecoratedSmoothedPWDB < 0) // initialize + { + UndecoratedSmoothedPWDB = pattrib->RxPWDBAll; + } + + if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB) + { + UndecoratedSmoothedPWDB = + ( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + + (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); + + UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1; + } + else + { + UndecoratedSmoothedPWDB = + ( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + + (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); + } + } + else + { + // Process CCK RSSI + if(UndecoratedSmoothedCCK < 0) // initialize + { + UndecoratedSmoothedCCK = pattrib->RxPWDBAll; + } + + if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedCCK) + { + UndecoratedSmoothedCCK = + ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + + (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); + + UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; + } + else + { + UndecoratedSmoothedCCK = + ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + + (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); + } + } + + + + if(psta) + { + //psta->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;//todo: + pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; + + if(pdmpriv->RSSI_Select == RSSI_OFDM) + psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; + else if(pdmpriv->RSSI_Select == RSSI_CCK) + psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; + + psta->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; + } + else + { + //pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; + + if(pdmpriv->RSSI_Select == RSSI_OFDM) + pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; + else if(pdmpriv->RSSI_Select == RSSI_CCK) + pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; + + pdmpriv->UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; + } + + //UpdateRxSignalStatistics8192C(padapter, prframe); + +} + +#endif + +static void process_link_qual(_adapter *padapter,union recv_frame *prframe) +{ + u32 last_evm=0, tmpVal; + struct rx_pkt_attrib *pattrib; +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + struct signal_stat * signal_stat; +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + + if(prframe == NULL || padapter==NULL){ + return; + } + + pattrib = &prframe->u.hdr.attrib; +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + signal_stat = &padapter->recvpriv.signal_qual_data; +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + + //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); + +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + if(signal_stat->update_req) { + signal_stat->total_num = 0; + signal_stat->total_val = 0; + signal_stat->update_req = 0; + } + + signal_stat->total_num++; + signal_stat->total_val += pattrib->phy_info.SignalQuality; + signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; + +#else //CONFIG_NEW_SIGNAL_STAT_PROCESS + if(pattrib->phy_info.SignalQuality != 0) + { + // + // 1. Record the general EVM to the sliding window. + // + if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) + { + padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; + last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; + padapter->recvpriv.signal_qual_data.total_val -= last_evm; + } + padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality; + + padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality; + if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) + padapter->recvpriv.signal_qual_data.index = 0; + + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality)); + + // <1> Showed on UI for user, in percentage. + tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; + padapter->recvpriv.signal_qual=(u8)tmpVal; + + } + else + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->phy_info.SignalQuality)); + } +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + +}// Process_UiLinkQuality8192S + + +//void rtl8192c_process_phy_info(_adapter *padapter, union recv_frame *prframe) +void rtl8192c_process_phy_info(_adapter *padapter, void *prframe) +{ + union recv_frame *precvframe = (union recv_frame *)prframe; + // + // Check RSSI + // + process_rssi(padapter, precvframe); + // + // Check PWDB. + // + //process_PWDB(padapter, precvframe); + + //UpdateRxSignalStatistics8192C(Adapter, pRfd); + // + // Check EVM + // + process_link_qual(padapter, precvframe); + +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_sreset.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_sreset.c new file mode 100755 index 000000000000..b0d925b6d6cb --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_sreset.c @@ -0,0 +1,111 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723A_SRESET_C_ + +#include <rtl8723a_sreset.h> +#include <rtl8723a_hal.h> + + +#ifdef DBG_CONFIG_ERROR_DETECT +void rtl8723a_sreset_xmit_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + unsigned long current_time; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + unsigned int diff_time; + u32 txdma_status; + + + if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ + DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); + rtw_hal_sreset_reset(padapter); + } + +#ifdef CONFIG_USB_HCI + //total xmit irp = 4 + //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); + //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) + current_time = rtw_get_current_time(); + + if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { + + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); + + if (diff_time > 2000) { + if (psrtpriv->last_tx_complete_time == 0) { + psrtpriv->last_tx_complete_time = current_time; + } + else{ + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); + if (diff_time > 4000) { + u32 ability; + + //padapter->Wifi_Error_Status = WIFI_TX_HANG; + rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC, &ability); + + DBG_871X("%s tx hang %s\n", __FUNCTION__, + (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); + + if (!(ability & ODM_BB_ADAPTIVITY)) + rtw_hal_sreset_reset(padapter); + } + } + } + } +#endif // #ifdef CONFIG_USB_HCI + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} + +void rtl8723a_sreset_linked_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; +#if 0 + u32 regc50,regc58,reg824,reg800; + regc50 = rtw_read32(padapter,0xc50); + regc58 = rtw_read32(padapter,0xc58); + reg824 = rtw_read32(padapter,0x824); + reg800 = rtw_read32(padapter,0x800); + if( ((regc50&0xFFFFFF00)!= 0x69543400)|| + ((regc58&0xFFFFFF00)!= 0x69543400)|| + (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| + ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) + { + DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, + regc50, regc58, reg824, reg800); + rtw_hal_sreset_reset(padapter); + } +#endif + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} +#endif + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_xmit.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_xmit.c new file mode 100755 index 000000000000..d2dc99074f20 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/rtl8723a_xmit.c @@ -0,0 +1,65 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723A_XMIT_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <rtl8723a_hal.h> + +#ifdef CONFIG_XMIT_ACK +void dump_txrpt_ccx_8723a(void *buf) +{ + struct txrpt_ccx_8723a *txrpt_ccx = buf; + + DBG_871X("%s:\n" + "tag1:%u, rsvd:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n" + "mac_id:%u, pkt_drop:%u, pkt_ok:%u, bmc:%u\n" + "retry_cnt:%u, lifetime_over:%u, retry_over:%u\n" + "ccx_qtime:%u\n" + "final_data_rate:0x%02x\n" + "qsel:%u, sw:0x%03x\n" + , __func__ + , txrpt_ccx->tag1, txrpt_ccx->rsvd, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx + , txrpt_ccx->mac_id, txrpt_ccx->pkt_drop, txrpt_ccx->pkt_ok, txrpt_ccx->bmc + , txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over + , txrpt_ccx_qtime_8723a(txrpt_ccx) + , txrpt_ccx->final_data_rate + , txrpt_ccx->qsel, txrpt_ccx_sw_8723a(txrpt_ccx) + ); +} + +void handle_txrpt_ccx_8723a(_adapter *adapter, void *buf) +{ + struct txrpt_ccx_8723a *txrpt_ccx = buf; + + #ifdef DBG_CCX + dump_txrpt_ccx_8723a(buf); + #endif + + if (txrpt_ccx->int_ccx) { + if (txrpt_ccx->pkt_ok) + rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); + else + rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); + } +} +#endif //CONFIG_XMIT_ACK + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_led.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_led.c new file mode 100755 index 000000000000..b7511deaf49f --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_led.c @@ -0,0 +1,129 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723AS_LED_C_ + +#include "drv_types.h" +#include "rtl8723a_hal.h" + +//================================================================================ +// LED object. +//================================================================================ + + +//================================================================================ +// Prototype of protected function. +//================================================================================ + +//================================================================================ +// LED_819xUsb routines. +//================================================================================ + +// +// Description: +// Turn on LED according to LedPin specified. +// +void +SwLedOn( + _adapter *padapter, + PLED_871x pLed +) +{ + u8 LedCfg; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + return; + } + + pLed->bLedOn = _TRUE; + +} + + +// +// Description: +// Turn off LED according to LedPin specified. +// +void +SwLedOff( + _adapter *padapter, + PLED_871x pLed +) +{ + u8 LedCfg; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + goto exit; + } + +exit: + pLed->bLedOn = _FALSE; + +} + +//================================================================================ +// Interface to manipulate LED objects. +//================================================================================ + +//================================================================================ +// Default LED behavior. +//================================================================================ + +// +// Description: +// Initialize all LED_871x objects. +// +void +rtl8723as_InitSwLeds( + _adapter *padapter + ) +{ + struct led_priv *pledpriv = &(padapter->ledpriv); + + pledpriv->LedControlHandler = LedControl871x; +#if 0 + + InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); + + InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); +#endif +} + + +// +// Description: +// DeInitialize all LED_819xUsb objects. +// +void +rtl8723as_DeInitSwLeds( + _adapter *padapter + ) +{ +#if 0 + struct led_priv *ledpriv = &(padapter->ledpriv); + + DeInitLed871x( &(ledpriv->SwLed0) ); + DeInitLed871x( &(ledpriv->SwLed1) ); +#endif +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_recv.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_recv.c new file mode 100755 index 000000000000..d9923679de72 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_recv.c @@ -0,0 +1,997 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723AS_RECV_C_ + +#include <drv_conf.h> + +#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) +#error "Shall be Linux or Windows, but not both!\n" +#endif + +#include <drv_types.h> +#include <recv_osdep.h> +#include <rtl8723a_hal.h> + + + +static s32 initrecvbuf(struct recv_buf *precvbuf, PADAPTER padapter) +{ + _rtw_init_listhead(&precvbuf->list); + _rtw_spinlock_init(&precvbuf->recvbuf_lock); + + precvbuf->adapter = padapter; + + return _SUCCESS; +} + +static void freerecvbuf(struct recv_buf *precvbuf) +{ + _rtw_spinlock_free(&precvbuf->recvbuf_lock); +} + +static void update_recvframe_attrib( + union recv_frame *precvframe, + struct recv_stat *prxstat) +{ + struct rx_pkt_attrib *pattrib; + struct recv_stat report; + PRXREPORT prxreport; + + + report.rxdw0 = le32_to_cpu(prxstat->rxdw0); + report.rxdw1 = le32_to_cpu(prxstat->rxdw1); + report.rxdw2 = le32_to_cpu(prxstat->rxdw2); + report.rxdw3 = le32_to_cpu(prxstat->rxdw3); + report.rxdw4 = le32_to_cpu(prxstat->rxdw4); + report.rxdw5 = le32_to_cpu(prxstat->rxdw5); + + prxreport = (PRXREPORT)&report; + + pattrib = &precvframe->u.hdr.attrib; + _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); + + // update rx report to recv_frame attribute + pattrib->pkt_len = (u16)prxreport->pktlen; + pattrib->drvinfo_sz = (u8)(prxreport->drvinfosize << 3); + pattrib->physt = (u8)prxreport->physt; + + pattrib->crc_err = (u8)prxreport->crc32; + pattrib->icv_err = (u8)prxreport->icverr; + + pattrib->bdecrypted = (u8)(prxreport->swdec ? 0 : 1); + pattrib->encrypt = (u8)prxreport->security; + + pattrib->qos = (u8)prxreport->qos; + pattrib->priority = (u8)prxreport->tid; + + pattrib->amsdu = (u8)prxreport->amsdu; + + pattrib->seq_num = (u16)prxreport->seq; + pattrib->frag_num = (u8)prxreport->frag; + pattrib->mfrag = (u8)prxreport->mf; + pattrib->mdata = (u8)prxreport->md; + + pattrib->mcs_rate = (u8)prxreport->rxmcs; + pattrib->rxht = (u8)prxreport->rxht; +} + +/* + * Notice: + * Before calling this function, + * precvframe->u.hdr.rx_data should be ready! + */ +void update_recvframe_phyinfo( + union recv_frame *precvframe, + struct phy_stat *pphy_status) +{ + PADAPTER padapter= precvframe->u.hdr.adapter; + struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); + + u8 *wlanhdr; + ODM_PACKET_INFO_T pkt_info; + u8 *sa; + //_irqL irqL; + struct sta_priv *pstapriv; + struct sta_info *psta; + + pkt_info.bPacketMatchBSSID =_FALSE; + pkt_info.bPacketToSelf = _FALSE; + pkt_info.bPacketBeacon = _FALSE; + + + wlanhdr = get_recvframe_data(precvframe); + + pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) && + !pattrib->icv_err && !pattrib->crc_err && + _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN)); + + pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_da(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN)); + + pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON); + + if(pkt_info.bPacketBeacon){ + if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ + sa = padapter->mlmepriv.cur_network.network.MacAddress; + #if 0 + { + DBG_8192C("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]\n", + sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]); + } + #endif + } + //to do Ad-hoc + } + else{ + sa = get_sa(wlanhdr); + } + + pkt_info.StationID = 0xFF; + + pstapriv = &padapter->stapriv; + psta = rtw_get_stainfo(pstapriv, sa); + if (psta) + { + pkt_info.StationID = psta->mac_id; + //DBG_8192C("%s ==> StationID(%d)\n",__FUNCTION__,pkt_info.StationID); + } + pkt_info.Rate = pattrib->mcs_rate; + + + //rtl8192c_query_rx_phy_status(precvframe, pphy_status); + //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,(u8 *)pphy_status,&(pkt_info)); + //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + precvframe->u.hdr.psta = NULL; + if (pkt_info.bPacketMatchBSSID && + (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) + { + if (psta) + { + precvframe->u.hdr.psta = psta; + rtl8192c_process_phy_info(padapter, precvframe); + } + } + else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) + { + if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + if (psta) + { + precvframe->u.hdr.psta = psta; + } + } + rtl8192c_process_phy_info(padapter, precvframe); + } +} + +static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbuf, struct phy_stat *pphy_status) +{ + s32 ret=_SUCCESS; +#ifdef CONFIG_CONCURRENT_MODE + u8 *primary_myid, *secondary_myid, *paddr1; + union recv_frame *precvframe_if2 = NULL; + _adapter *primary_padapter = precvframe->u.hdr.adapter; + _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; + struct recv_priv *precvpriv = &primary_padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(primary_padapter); + + if(!secondary_padapter) + return ret; + + paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); + + if(IS_MCAST(paddr1) == _FALSE)//unicast packets + { + //primary_myid = myid(&primary_padapter->eeprompriv); + secondary_myid = myid(&secondary_padapter->eeprompriv); + + if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) + { + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + } + + //ret = recv_entry(precvframe); + + } + else // Handle BC/MC Packets + { + //clone/copy to if2 + _pkt *pkt_copy = NULL; + struct rx_pkt_attrib *pattrib = NULL; + + precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); + + if(!precvframe_if2) + return _FAIL; + + precvframe_if2->u.hdr.adapter = secondary_padapter; + _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); + pattrib = &precvframe_if2->u.hdr.attrib; + + //driver need to set skb len for rtw_skb_copy(). + //If skb->len is zero, rtw_skb_copy() will not copy data from original skb. + skb_put(precvframe->u.hdr.pkt, pattrib->pkt_len); + + pkt_copy = rtw_skb_copy(precvframe->u.hdr.pkt); + if (pkt_copy == NULL) + { + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) + { + DBG_8192C("pre_recv_entry(): rtw_skb_copy fail , drop frag frame \n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + return ret; + } + + pkt_copy = rtw_skb_clone(precvframe->u.hdr.pkt); + if(pkt_copy == NULL) + { + DBG_8192C("pre_recv_entry(): rtw_skb_clone fail , drop frame\n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + return ret; + } + } + + pkt_copy->dev = secondary_padapter->pnetdev; + + precvframe_if2->u.hdr.pkt = pkt_copy; + precvframe_if2->u.hdr.rx_head = pkt_copy->head; + precvframe_if2->u.hdr.rx_data = pkt_copy->data; + precvframe_if2->u.hdr.rx_tail = skb_tail_pointer(pkt_copy); + precvframe_if2->u.hdr.rx_end = skb_end_pointer(pkt_copy); + precvframe_if2->u.hdr.len = pkt_copy->len; + + //recvframe_put(precvframe_if2, pattrib->pkt_len); + + if ( pHalData->ReceiveConfig & RCR_APPFCS) + recvframe_pull_tail(precvframe_if2, IEEE80211_FCS_LEN); + + if (pattrib->physt) + update_recvframe_phyinfo(precvframe_if2, pphy_status); + + if(rtw_recv_entry(precvframe_if2) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } + } + + if (precvframe->u.hdr.attrib.physt) + update_recvframe_phyinfo(precvframe, pphy_status); + + ret = rtw_recv_entry(precvframe); +#endif + + return ret; + +} + + +#ifdef CONFIG_SDIO_RX_COPY +#ifdef CONFIG_DIRECT_RECV +void rtl8723as_recv(PADAPTER padapter, struct recv_buf *precvbuf) +{ + //PADAPTER padapter; + PHAL_DATA_TYPE pHalData; + struct recv_priv *precvpriv; + //struct recv_buf *precvbuf; + union recv_frame *precvframe; + struct recv_frame_hdr *phdr; + struct rx_pkt_attrib *pattrib; + _irqL irql; + u8 *ptr; + u32 pkt_len, pkt_offset, skb_len, alloc_sz; + _pkt *pkt_copy = NULL; + u8 shift_sz = 0, rx_report_sz = 0; + + pHalData = GET_HAL_DATA(padapter); + precvpriv = &padapter->recvpriv; + + ptr = precvbuf->pdata; + + while (ptr < precvbuf->ptail) + { + precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); + if (precvframe == NULL) { + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: no enough recv frame!\n",__FUNCTION__)); + break; + } + + //rx desc parsing + update_recvframe_attrib(precvframe, (struct recv_stat*)ptr); + + pattrib = &precvframe->u.hdr.attrib; + + // fix Hardware RX data error, drop whole recv_buffer + if ((!(pHalData->ReceiveConfig & RCR_ACRC32)) && pattrib->crc_err) + { + DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); + + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + + if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) + rx_report_sz = RXDESC_SIZE + 4 + pattrib->drvinfo_sz; + else + rx_report_sz = RXDESC_SIZE + pattrib->drvinfo_sz; + + pkt_offset = rx_report_sz + pattrib->pkt_len; + + if ((ptr + pkt_offset) > precvbuf->ptail) { + DBG_8192C("%s()-%d: : next pkt len(%p,%d) exceed ptail(%p)!\n", __FUNCTION__, __LINE__, ptr, pkt_offset, precvbuf->ptail); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + + if ((pattrib->crc_err) || (pattrib->icv_err)) + { + #ifdef CONFIG_MP_INCLUDED + if (padapter->registrypriv.mp_mode == 1) + { + if ((check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) + { + if (pattrib->crc_err == 1) + padapter->mppriv.rx_crcerrpktcount++; + } + } + #endif + DBG_8192C("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + } + else + { + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { + shift_sz = 6; + } + else + { + shift_sz = 0; + } + + skb_len = pattrib->pkt_len; + + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) + alloc_sz = 1664; + else + alloc_sz = skb_len + 14; + } + else { + alloc_sz = skb_len; + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. + alloc_sz += 14; + } + + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = padapter->pnetdev; + precvframe->u.hdr.pkt = pkt_copy; + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, (ptr + rx_report_sz), skb_len); + precvframe->u.hdr.rx_head = pkt_copy->head; + precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; + precvframe->u.hdr.rx_end = skb_end_pointer(pkt_copy); + } + else + { + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) + { + DBG_8192C("rtl8723as_recv_tasklet: alloc_skb fail , drop frag frame \n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + + precvframe->u.hdr.pkt = rtw_skb_clone(precvbuf->pskb); + if(precvframe->u.hdr.pkt) + { + _pkt *pkt_clone = precvframe->u.hdr.pkt; + + pkt_clone->data = ptr + rx_report_sz; + skb_reset_tail_pointer(pkt_clone); + precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail + = pkt_clone->data; + precvframe->u.hdr.rx_end = pkt_clone->data + skb_len; + } + else + { + DBG_8192C("rtl8723as_recv_tasklet: rtw_skb_clone fail\n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + } + + recvframe_put(precvframe, skb_len); + //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); + + if (pHalData->ReceiveConfig & RCR_APPFCS) + recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); + + // move to drv info position + ptr += RXDESC_SIZE; + + // update drv info + if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) { + //rtl8723s_update_bassn(padapter, pdrvinfo); + ptr += 4; + } + +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + { + if(pre_recv_entry(precvframe, precvbuf, (struct phy_stat*)ptr) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } + } + else +#endif + { + if (pattrib->physt) + update_recvframe_phyinfo(precvframe, (struct phy_stat*)ptr); + + if (rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: rtw_recv_entry(precvframe) != _SUCCESS\n",__FUNCTION__)); + } + } + } + + // Page size of receive package is 128 bytes alignment =>DMA AGG + // refer to _InitTransferPageSize() + pkt_offset = _RND128(pkt_offset); + precvbuf->pdata += pkt_offset; + ptr = precvbuf->pdata; + precvframe = NULL; + pkt_copy = NULL; + + } + + rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); + +} +#endif //CONFIG_DIRECT_RECV + +static void rtl8723as_recv_tasklet(void *priv) +{ + PADAPTER padapter; + PHAL_DATA_TYPE pHalData; + struct recv_priv *precvpriv; + struct recv_buf *precvbuf; + union recv_frame *precvframe; + struct recv_frame_hdr *phdr; + struct rx_pkt_attrib *pattrib; + _irqL irql; + u8 *ptr; + u32 pkt_len, pkt_offset, skb_len, alloc_sz; + _pkt *pkt_copy = NULL; + u8 shift_sz = 0, rx_report_sz = 0; + + + padapter = (PADAPTER)priv; + pHalData = GET_HAL_DATA(padapter); + precvpriv = &padapter->recvpriv; + + do { + precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); + if (NULL == precvbuf) break; + + ptr = precvbuf->pdata; + + while (ptr < precvbuf->ptail) + { + precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); + if (precvframe == NULL) { + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: no enough recv frame!\n",__FUNCTION__)); + rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); + + // The case of can't allocte recvframe should be temporary, + // schedule again and hope recvframe is available next time. +#ifdef PLATFORM_LINUX + tasklet_schedule(&precvpriv->recv_tasklet); +#endif + return; + } + + //rx desc parsing + update_recvframe_attrib(precvframe, (struct recv_stat*)ptr); + + pattrib = &precvframe->u.hdr.attrib; + + // fix Hardware RX data error, drop whole recv_buffer + if ((!(pHalData->ReceiveConfig & RCR_ACRC32)) && pattrib->crc_err) + { + DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); + + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + + if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) + rx_report_sz = RXDESC_SIZE + 4 + pattrib->drvinfo_sz; + else + rx_report_sz = RXDESC_SIZE + pattrib->drvinfo_sz; + + pkt_offset = rx_report_sz + pattrib->pkt_len; + + if ((ptr + pkt_offset) > precvbuf->ptail) { + DBG_8192C("%s()-%d: : next pkt len(%p,%d) exceed ptail(%p)!\n", __FUNCTION__, __LINE__, ptr, pkt_offset, precvbuf->ptail); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + + if ((pattrib->crc_err) || (pattrib->icv_err)) + { + #ifdef CONFIG_MP_INCLUDED + if (padapter->registrypriv.mp_mode == 1) + { + if ((check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) + { + if (pattrib->crc_err == 1) + padapter->mppriv.rx_crcerrpktcount++; + } + } + #endif + DBG_8192C("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + } + else + { + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { + shift_sz = 6; + } + else + { + shift_sz = 0; + } + + skb_len = pattrib->pkt_len; + + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) + alloc_sz = 1664; + else + alloc_sz = skb_len + 14; + } + else { + alloc_sz = skb_len; + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. + alloc_sz += 14; + } + + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = padapter->pnetdev; + precvframe->u.hdr.pkt = pkt_copy; + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, (ptr + rx_report_sz), skb_len); + precvframe->u.hdr.rx_head = pkt_copy->head; + precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; + precvframe->u.hdr.rx_end = skb_end_pointer(pkt_copy); + } + else + { + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) + { + DBG_8192C("rtl8723as_recv_tasklet: alloc_skb fail , drop frag frame \n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + + precvframe->u.hdr.pkt = rtw_skb_clone(precvbuf->pskb); + if(precvframe->u.hdr.pkt) + { + _pkt *pkt_clone = precvframe->u.hdr.pkt; + + pkt_clone->data = ptr + rx_report_sz; + skb_reset_tail_pointer(pkt_clone); + precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail + = pkt_clone->data; + precvframe->u.hdr.rx_end = pkt_clone->data + skb_len; + } + else + { + DBG_8192C("rtl8723as_recv_tasklet: rtw_skb_clone fail\n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + } + + recvframe_put(precvframe, skb_len); + //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); + + if (pHalData->ReceiveConfig & RCR_APPFCS) + recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); + + // move to drv info position + ptr += RXDESC_SIZE; + + // update drv info + if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) { + //rtl8723s_update_bassn(padapter, pdrvinfo); + ptr += 4; + } + +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + { + if(pre_recv_entry(precvframe, precvbuf, (struct phy_stat*)ptr) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } + } + else +#endif + { + if (pattrib->physt) + update_recvframe_phyinfo(precvframe, (struct phy_stat*)ptr); + + if (rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: rtw_recv_entry(precvframe) != _SUCCESS\n",__FUNCTION__)); + } + } + } + + // Page size of receive package is 128 bytes alignment =>DMA AGG + // refer to _InitTransferPageSize() + pkt_offset = _RND128(pkt_offset); + precvbuf->pdata += pkt_offset; + ptr = precvbuf->pdata; + precvframe = NULL; + pkt_copy = NULL; + } + + rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); + } while (1); + +} +#else +static void rtl8723as_recv_tasklet(void *priv) +{ + PADAPTER padapter; + PHAL_DATA_TYPE pHalData; + struct recv_priv *precvpriv; + struct recv_buf *precvbuf; + union recv_frame *precvframe; + struct recv_frame_hdr *phdr; + struct rx_pkt_attrib *pattrib; + u8 *ptr; + _pkt *ppkt; + u32 pkt_offset; + _irqL irql; + + + padapter = (PADAPTER)priv; + pHalData = GET_HAL_DATA(padapter); + precvpriv = &padapter->recvpriv; + + do { + precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); + if (NULL == precvbuf) break; + + ptr = precvbuf->pdata; + + while (ptr < precvbuf->ptail) + { + precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); + if (precvframe == NULL) { + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("rtl8723as_recv_tasklet: no enough recv frame!\n")); + rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); + + // The case of can't allocte recvframe should be temporary, + // schedule again and hope recvframe is available next time. +#ifdef PLATFORM_LINUX + tasklet_schedule(&precvpriv->recv_tasklet); +#endif + return; + } + + phdr = &precvframe->u.hdr; + pattrib = &phdr->attrib; + + update_recvframe_attrib(precvframe, (struct recv_stat*)ptr); + + // fix Hardware RX data error, drop whole recv_buffer + if ((!(pHalData->ReceiveConfig & RCR_ACRC32)) && pattrib->crc_err) + { + DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } + + pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->pkt_len; +#if 0 // reduce check to speed up + if ((ptr + pkt_offset) > precvbuf->ptail) { + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, + ("%s: next pkt len(%p,%d) exceed ptail(%p)!\n", + __FUNCTION__, ptr, pkt_offset, precvbuf->ptail)); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + break; + } +#endif + + if ((pattrib->crc_err) || (pattrib->icv_err)) + { + #ifdef CONFIG_MP_INCLUDED + if (padapter->registrypriv.mp_mode == 1) + { + if ((check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) + { + if (pattrib->crc_err == 1) + padapter->mppriv.rx_crcerrpktcount++; + } + } + #endif + DBG_8192C("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + } + else + { + ppkt = rtw_skb_clone(precvbuf->pskb); + if (ppkt == NULL) + { + RT_TRACE(_module_rtl871x_recv_c_, _drv_crit_, ("rtl8723as_recv_tasklet: no enough memory to allocate SKB!\n")); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); + rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); + + // The case of can't allocte skb is serious and may never be recovered, + // once bDriverStopped is enable, this task should be stopped. + if (padapter->bDriverStopped == _FALSE) { +#ifdef PLATFORM_LINUX + tasklet_schedule(&precvpriv->recv_tasklet); +#endif + } + + return; + } + + phdr->pkt = ppkt; + phdr->len = 0; + phdr->rx_head = precvbuf->phead; + phdr->rx_data = phdr->rx_tail = precvbuf->pdata; + phdr->rx_end = precvbuf->pend; + recvframe_put(precvframe, pkt_offset); + recvframe_pull(precvframe, RXDESC_SIZE + pattrib->drvinfo_sz); + if (pHalData->ReceiveConfig & RCR_APPFCS) + recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); + + // move to drv info position + ptr += RXDESC_SIZE; + + // update drv info + if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) { +// rtl8723s_update_bassn(padapter, pdrvinfo); + ptr += 4; + } + +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + { + if(pre_recv_entry(precvframe, precvbuf, (struct phy_stat*)ptr) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } + } + else +#endif + { + if (pattrib->physt) + update_recvframe_phyinfo(precvframe, (struct phy_stat*)ptr); + + if (rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("rtl8723as_recv_tasklet: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } + } + } + + // Page size of receive package is 128 bytes alignment => DMA agg + // refer to _InitTransferPageSize() + pkt_offset = _RND128(pkt_offset); + precvbuf->pdata += pkt_offset; + ptr = precvbuf->pdata; + } + + rtw_skb_free(precvbuf->pskb); + precvbuf->pskb = NULL; + rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); + } while (1); +} +#endif + +/* + * Initialize recv private variable for hardware dependent + * 1. recv buf + * 2. recv tasklet + * + */ +s32 rtl8723as_init_recv_priv(PADAPTER padapter) +{ + s32 res; + u32 i, n; + struct recv_priv *precvpriv; + struct recv_buf *precvbuf; + + + res = _SUCCESS; + precvpriv = &padapter->recvpriv; + + //3 1. init recv buffer + _rtw_init_queue(&precvpriv->free_recv_buf_queue); + _rtw_init_queue(&precvpriv->recv_buf_pending_queue); + + n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; + precvpriv->pallocated_recv_buf = rtw_zmalloc(n); + if (precvpriv->pallocated_recv_buf == NULL) { + res = _FAIL; + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n")); + goto exit; + } + + precvpriv->precv_buf = (u8*)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); + + // init each recv buffer + precvbuf = (struct recv_buf*)precvpriv->precv_buf; + for (i = 0; i < NR_RECVBUFF; i++) + { + res = initrecvbuf(precvbuf, padapter); + if (res == _FAIL) + break; + + res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); + if (res == _FAIL) { + freerecvbuf(precvbuf); + break; + } + +#ifdef CONFIG_SDIO_RX_COPY + if (precvbuf->pskb == NULL) { + SIZE_PTR tmpaddr=0; + SIZE_PTR alignment=0; + + precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); + + if(precvbuf->pskb) + { + precvbuf->pskb->dev = padapter->pnetdev; + + tmpaddr = (SIZE_PTR)precvbuf->pskb->data; + alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); + skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); + } + + if (precvbuf->pskb == NULL) { + DBG_871X("%s: alloc_skb fail!\n", __FUNCTION__); + } + } +#endif + + rtw_list_insert_tail(&precvbuf->list, &precvpriv->free_recv_buf_queue.queue); + + precvbuf++; + } + precvpriv->free_recv_buf_queue_cnt = i; + + if (res == _FAIL) + goto initbuferror; + + //3 2. init tasklet +#ifdef PLATFORM_LINUX + tasklet_init(&precvpriv->recv_tasklet, + (void(*)(unsigned long))rtl8723as_recv_tasklet, + (unsigned long)padapter); +#endif + + goto exit; + +initbuferror: + precvbuf = (struct recv_buf*)precvpriv->precv_buf; + if (precvbuf) { + n = precvpriv->free_recv_buf_queue_cnt; + precvpriv->free_recv_buf_queue_cnt = 0; + for (i = 0; i < n ; i++) + { + rtw_list_delete(&precvbuf->list); + rtw_os_recvbuf_resource_free(padapter, precvbuf); + freerecvbuf(precvbuf); + precvbuf++; + } + precvpriv->precv_buf = NULL; + } + + if (precvpriv->pallocated_recv_buf) { + n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; + rtw_mfree(precvpriv->pallocated_recv_buf, n); + precvpriv->pallocated_recv_buf = NULL; + } + +exit: + return res; +} + +/* + * Free recv private variable of hardware dependent + * 1. recv buf + * 2. recv tasklet + * + */ +void rtl8723as_free_recv_priv(PADAPTER padapter) +{ + u32 i, n; + struct recv_priv *precvpriv; + struct recv_buf *precvbuf; + + + precvpriv = &padapter->recvpriv; + + //3 1. kill tasklet +#ifdef PLATFORM_LINUX + tasklet_kill(&precvpriv->recv_tasklet); +#endif + + //3 2. free all recv buffers + precvbuf = (struct recv_buf*)precvpriv->precv_buf; + if (precvbuf) { + n = NR_RECVBUFF; + precvpriv->free_recv_buf_queue_cnt = 0; + for (i = 0; i < n ; i++) + { + rtw_list_delete(&precvbuf->list); + rtw_os_recvbuf_resource_free(padapter, precvbuf); + freerecvbuf(precvbuf); + precvbuf++; + } + precvpriv->precv_buf = NULL; + } + + if (precvpriv->pallocated_recv_buf) { + n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; + rtw_mfree(precvpriv->pallocated_recv_buf, n); + precvpriv->pallocated_recv_buf = NULL; + } +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_xmit.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_xmit.c new file mode 100755 index 000000000000..f4d5d65585b8 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/rtl8723as_xmit.c @@ -0,0 +1,705 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8723AS_XMIT_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <sdio_ops.h> +#include <rtl8723a_hal.h> + +#ifdef CONFIG_TX_AGGREGATION +#define SDIO_TX_AGG_MAX 5 +#else +#define SDIO_TX_AGG_MAX 1 +#endif + +s32 rtl8723_dequeue_writeport(PADAPTER padapter, u8 *freePage) +{ + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct xmit_buf *pxmitbuf; + //struct xmit_frame *pframe; + PADAPTER pri_padapter = padapter; + u32 deviceId; + u32 requiredPage; + u8 PageIdx; + _irqL irql; + u32 n; + s32 ret = 0; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +#ifdef CONFIG_CONCURRENT_MODE + s32 buddy_rm_stop = _FAIL; +#endif + +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + ret = check_buddy_fwstate( padapter, _FW_UNDER_SURVEY); +#endif + + ret = ret || check_fwstate(pmlmepriv, _FW_UNDER_SURVEY); + + if (_TRUE == ret) + pxmitbuf = dequeue_pending_xmitbuf_under_survey(pxmitpriv); + else + pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); + + if (pxmitbuf == NULL) + return _TRUE; + + //pframe = (struct xmit_frame*)pxmitbuf->priv_data; + //requiredPage = pframe->pg_num; + requiredPage = pxmitbuf->pg_num; + + //translate queue index to sdio fifo addr + deviceId = pdvobjpriv->Queue2Pipe[pxmitbuf->ff_hwaddr]; + + // translate sdio fifo addr to tx fifo page index + switch (deviceId) + { + case WLAN_TX_HIQ_DEVICE_ID: + PageIdx = HI_QUEUE_IDX; + break; + + case WLAN_TX_MIQ_DEVICE_ID: + PageIdx = MID_QUEUE_IDX; + break; + + case WLAN_TX_LOQ_DEVICE_ID: + PageIdx = LOW_QUEUE_IDX; + break; + } + + // check if hardware tx fifo page is enough + n = 0; +// _enter_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); + do { + if (requiredPage <= freePage[PageIdx]) { + freePage[PageIdx] -= requiredPage; + break; + } + // The number of page which public page included is available. + if ((freePage[PageIdx] + freePage[PUBLIC_QUEUE_IDX]) > (requiredPage + 1)) + { + u8 requiredPublicPage; + + requiredPublicPage = requiredPage - freePage[PageIdx]; + freePage[PageIdx] = 0; + freePage[PUBLIC_QUEUE_IDX] -= requiredPublicPage; + break; + } +// _exit_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); + + ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE) +#ifdef CONFIG_CONCURRENT_MODE + ||((padapter->pbuddy_adapter) + && ((padapter->pbuddy_adapter->bSurpriseRemoved) ||(padapter->pbuddy_adapter->bDriverStopped))) +#endif + ; + + if (ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: bSurpriseRemoved(update TX FIFO page)\n", __func__)); + goto free_xmitbuf; + } + + n++; + //if ((n & 0x3FF) == 0) + if ((n % 100) == 0) + { + if (n >= 5000) { + u8 reg_value_1 = 0; + u8 reg_value_2 = 0; + u8 reg_value_3 = 0; + + DBG_8192C(KERN_NOTICE "%s: FIFO starvation!(%d) len=%d agg=%d page=(R)%d(A)%d\n", + __func__, n, pxmitbuf->len, pxmitbuf->agg_num, pxmitbuf->pg_num, freePage[PageIdx] + freePage[PUBLIC_QUEUE_IDX]); + + //try to recover the transmission + reg_value_1 = rtw_read8(padapter, REG_SYS_FUNC_EN); + reg_value_2 = rtw_read8(padapter, REG_CR); + reg_value_3 = rtw_read8(padapter, REG_TXPAUSE); + DBG_871X("Before recovery: REG_SYS_FUNC_EN = 0x%X, REG_CR = 0x%X, REG_TXPAUSE = 0x%X\n", reg_value_1, reg_value_2, reg_value_3); + + rtw_write8(padapter, REG_SYS_FUNC_EN, reg_value_1 | 0x01); + rtw_write8(padapter, REG_CR, reg_value_2 | 0xC0); + rtw_write8(padapter, REG_TXPAUSE, 0); + DBG_871X("After recovery: REG_SYS_FUNC_EN = 0x%X, REG_CR = 0x%X, REG_TXPAUSE = 0x%X\n", + rtw_read8(padapter, REG_SYS_FUNC_EN), rtw_read8(padapter, REG_CR), rtw_read8(padapter, REG_TXPAUSE)); + } else { + //RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + // ("%s: FIFO starvation!(%d) len=%d agg=%d page=(R)%d(A)%d\n", + // __FUNCTION__, n, pxmitbuf->len, pxmitbuf->agg_num, pxmitbuf->pg_num, freePage[PageIdx] + freePage[PUBLIC_QUEUE_IDX])); + } + //rtw_yield_os(); + rtw_msleep_os(1); + } + + // Total number of page is NOT available, so update current FIFO status +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->adapter_type > 0) + pri_padapter = padapter->pbuddy_adapter; +#endif + HalQueryTxBufferStatus8723ASdio(pri_padapter); + + } while (1); + + if ((padapter->bSurpriseRemoved == _TRUE) +#ifdef CONFIG_CONCURRENT_MODE + ||((padapter->pbuddy_adapter)&& (padapter->pbuddy_adapter->bSurpriseRemoved)) +#endif + ){ + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: bSurpriseRemoved(wirte port)\n", __FUNCTION__)); + goto free_xmitbuf; + } + rtw_write_port(padapter, deviceId, pxmitbuf->len, (u8 *)pxmitbuf); + +free_xmitbuf: + //rtw_free_xmitframe(pxmitpriv, pframe); + //pxmitbuf->priv_data = NULL; + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + + return _FAIL; +} + +/* + * Description + * Transmit xmitbuf to hardware tx fifo + * + * Return + * _SUCCESS ok + * _FAIL something error + */ +s32 rtl8723as_xmit_buf_handler(PADAPTER padapter) +{ + PHAL_DATA_TYPE phal; + struct mlme_priv *pmlmepriv; + struct xmit_priv *pxmitpriv; + struct dvobj_priv *pdvobjpriv; + struct xmit_buf *pxmitbuf; + struct xmit_frame *pframe; + u8 *freePage; + u32 deviceId; + u32 requiredPage; + u8 PageIdx, queue_empty; + _irqL irql; + u32 n; + s32 ret; + + + phal = GET_HAL_DATA(padapter); + pmlmepriv = &padapter->mlmepriv; + pxmitpriv = &padapter->xmitpriv; + pdvobjpriv = adapter_to_dvobj(padapter); + freePage = phal->SdioTxFIFOFreePage; + + ret = _rtw_down_sema(&pxmitpriv->xmit_sema); + if (_FAIL == ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, + ("%s: down SdioXmitBufSema fail!\n", __FUNCTION__)); + return _FAIL; + } + + ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE); + if (ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_err_, + ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)!\n", + __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); + return _FAIL; + } + +#ifdef CONFIG_LPS_LCLK + ret = rtw_register_tx_alive(padapter); + if (ret != _SUCCESS) { + return _SUCCESS; + } +#endif + + do { + queue_empty = rtl8723_dequeue_writeport(padapter, freePage); +// dump secondary adapter xmitbuf +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + queue_empty &= rtl8723_dequeue_writeport(padapter->pbuddy_adapter, freePage); +#endif + } while ( !queue_empty); + +#ifdef CONFIG_LPS_LCLK + rtw_unregister_tx_alive(padapter); +#endif + + return _SUCCESS; +} + +/* + * Description: + * Aggregation packets and send to hardware + * + * Return: + * 0 Success + * -1 Hardware resource(TX FIFO) not ready + * -2 Software resource(xmitbuf) not ready + */ +static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) +{ + s32 err, ret; + u32 k; + struct hw_xmit *hwxmits; + u8 no_res, idx, hwentry; + _irqL irql; +// _irqL irqL0, irqL1; + struct tx_servq *ptxservq; + _list *sta_plist, *sta_phead, *frame_plist, *frame_phead; + struct xmit_frame *pxmitframe; + _queue *pframe_queue; + struct xmit_buf *pxmitbuf; + u32 txlen; + + + err = 0; + no_res = _FALSE; + hwxmits = pxmitpriv->hwxmits; + hwentry = pxmitpriv->hwxmit_entry; + ptxservq = NULL; + pxmitframe = NULL; + pframe_queue = NULL; + pxmitbuf = NULL; + + // 0(VO), 1(VI), 2(BE), 3(BK) + for (idx = 0; idx < hwentry; idx++, hwxmits++) + { +// _enter_critical(&hwxmits->sta_queue->lock, &irqL0); + _enter_critical_bh(&pxmitpriv->lock, &irql); + + sta_phead = get_list_head(hwxmits->sta_queue); + sta_plist = get_next(sta_phead); + + while (rtw_end_of_queue_search(sta_phead, sta_plist) == _FALSE) + { + ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); + sta_plist = get_next(sta_plist); + + pframe_queue = &ptxservq->sta_pending; + +// _enter_critical(&pframe_queue->lock, &irqL1); + //_enter_critical_bh(&pxmitpriv->lock, &irql); + + frame_phead = get_list_head(pframe_queue); + + while (rtw_is_list_empty(frame_phead) == _FALSE) + { + frame_plist = get_next(frame_phead); + pxmitframe = LIST_CONTAINOR(frame_plist, struct xmit_frame, list); + + // check xmit_buf size enough or not + txlen = TXDESC_SIZE + rtw_wlan_pkt_size(pxmitframe); + if ((NULL == pxmitbuf) || + ((pxmitbuf->ptail + txlen) > pxmitbuf->pend) +#ifdef SDIO_TX_AGG_MAX + || (k >= SDIO_TX_AGG_MAX) +#endif + ) + { + if (pxmitbuf) { + struct xmit_frame *pframe; + pframe = (struct xmit_frame*)pxmitbuf->priv_data; + pframe->agg_num = k; + pxmitbuf->agg_num = k; + rtl8723a_update_txdesc(pframe, pframe->buf_addr); + rtw_free_xmitframe(pxmitpriv, pframe); + pxmitbuf->priv_data = NULL; + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); + //rtw_yield_os(); + } + + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) { + RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: xmit_buf is not enough!\n", __FUNCTION__)); + err = -2; + break; + } + k = 0; + } + + // ok to send, remove frame from queue + //_enter_critical_bh(&pxmitpriv->lock, &irql); +#ifdef CONFIG_AP_MODE + if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) + { + if ((pxmitframe->attrib.psta->state & WIFI_SLEEP_STATE) && + (pxmitframe->attrib.triggered == 0)) + { + //_exit_critical_bh(&pxmitpriv->lock, &irql); + + DBG_8192C("%s: one not triggered pkt in queue when STA sleep\n", __func__); + break; + } + } +#endif + rtw_list_delete(&pxmitframe->list); + ptxservq->qcnt--; + hwxmits->accnt--; + + + if (k == 0) { + pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); + pxmitbuf->priv_data = (u8*)pxmitframe; + } + + // coalesce the xmitframe to xmitbuf + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->ptail; + + ret = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + if (ret == _FAIL) { + RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: coalesce FAIL!", __FUNCTION__)); + // Todo: error handler + DBG_871X("%s: coalesce FAIL!", __FUNCTION__); + } else { + k++; + if (k != 1) + rtl8723a_update_txdesc(pxmitframe, pxmitframe->buf_addr); + rtw_count_tx_stats(padapter, pxmitframe, pxmitframe->attrib.last_txcmdsz); + + txlen = TXDESC_SIZE + pxmitframe->attrib.last_txcmdsz; + pxmitframe->pg_num = (txlen + 127)/128; + pxmitbuf->pg_num += (txlen + 127)/128; + //if (k != 1) + // ((struct xmit_frame*)pxmitbuf->priv_data)->pg_num += pxmitframe->pg_num; + pxmitbuf->ptail += _RND(txlen, 8); // round to 8 bytes alignment + pxmitbuf->len = _RND(pxmitbuf->len, 8) + txlen; + } + + if (k != 1) + rtw_free_xmitframe(pxmitpriv, pxmitframe); + pxmitframe = NULL; + } + + //_enter_critical_bh(&pxmitpriv->lock, &irql); + if (_rtw_queue_empty(pframe_queue) == _TRUE) + rtw_list_delete(&ptxservq->tx_pending); + //_exit_critical_bh(&pxmitpriv->lock, &irql); + +// _exit_critical(&pframe_queue->lock, &irqL1); + //_exit_critical_bh(&pxmitpriv->lock, &irql); + + if (err) break; + } + +// _exit_critical(&hwxmits->sta_queue->lock, &irqL0); + _exit_critical_bh(&pxmitpriv->lock, &irql); + + // dump xmit_buf to hw tx fifo + if (pxmitbuf) + { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("pxmitbuf->len=%d enqueue\n",pxmitbuf->len)); + + if (pxmitbuf->len > 0) { + struct xmit_frame *pframe; + pframe = (struct xmit_frame*)pxmitbuf->priv_data; + pframe->agg_num = k; + pxmitbuf->agg_num = k; + rtl8723a_update_txdesc(pframe, pframe->buf_addr); + rtw_free_xmitframe(pxmitpriv, pframe); + pxmitbuf->priv_data = NULL; + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); + rtw_yield_os(); + } + else + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + + pxmitbuf = NULL; + } + + if (err) break; + } + + return err; +} + +/* + * Description + * Transmit xmitframe from queue + * + * Return + * _SUCCESS ok + * _FAIL something error + */ +s32 rtl8723as_xmit_handler(PADAPTER padapter) +{ + struct xmit_priv *pxmitpriv; + s32 ret; + _irqL irql; + + + pxmitpriv = &padapter->xmitpriv; + +wait: + ret = _rtw_down_sema(&pxmitpriv->SdioXmitSema); + if (_FAIL == ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, ("%s: down sema fail!\n", __FUNCTION__)); + return _FAIL; + } + +next: + if ((padapter->bDriverStopped == _TRUE) || + (padapter->bSurpriseRemoved == _TRUE)) { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)\n", + __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); + return _FAIL; + } + + _enter_critical_bh(&pxmitpriv->lock, &irql); + ret = rtw_txframes_pending(padapter); + _exit_critical_bh(&pxmitpriv->lock, &irql); + if (ret == 0) { + return _SUCCESS; + } + + // dequeue frame and write to hardware + + ret = xmit_xmitframes(padapter, pxmitpriv); + if (ret == -2) { + rtw_msleep_os(1); + goto next; + } + + _enter_critical_bh(&pxmitpriv->lock, &irql); + ret = rtw_txframes_pending(padapter); + _exit_critical_bh(&pxmitpriv->lock, &irql); + if (ret == 1) { + rtw_msleep_os(1); + goto next; + } + + return _SUCCESS; +} + +thread_return rtl8723as_xmit_thread(thread_context context) +{ + PADAPTER padapter; + struct xmit_priv *pxmitpriv; + s32 ret; + + + padapter = (PADAPTER)context; + pxmitpriv = &padapter->xmitpriv; + ret = _SUCCESS; + + thread_enter("RTWHALXT"); + + do { + ret = rtl8723as_xmit_handler(padapter); + if (signal_pending(current)) { + flush_signals(current); + } + } while (_SUCCESS == ret); + + _rtw_up_sema(&pxmitpriv->SdioXmitTerminateSema); + + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("-%s\n", __FUNCTION__)); + + thread_exit(); +} + +s32 rtl8723as_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe) +{ + s32 ret = _SUCCESS; + struct pkt_attrib *pattrib; + struct xmit_buf *pxmitbuf; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + u8 *pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + + RT_TRACE(_module_hal_xmit_c_, _drv_info_, ("+%s\n", __FUNCTION__)); + + pattrib = &pmgntframe->attrib; + pxmitbuf = pmgntframe->pxmitbuf; + + rtl8723a_update_txdesc(pmgntframe, pmgntframe->buf_addr); + + pxmitbuf->len = TXDESC_SIZE + pattrib->last_txcmdsz; + //pmgntframe->pg_num = (pxmitbuf->len + 127)/128; // 128 is tx page size + pxmitbuf->pg_num = (pxmitbuf->len + 127)/128; // 128 is tx page size + pxmitbuf->ptail = pmgntframe->buf_addr + pxmitbuf->len; + pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pmgntframe); + + rtw_count_tx_stats(padapter, pmgntframe, pattrib->last_txcmdsz); + + rtw_free_xmitframe(pxmitpriv, pmgntframe); + + pxmitbuf->priv_data = NULL; + + if(GetFrameSubType(pframe)==WIFI_BEACON) //dump beacon directly + { + rtw_write_port(padapter, pdvobjpriv->Queue2Pipe[pxmitbuf->ff_hwaddr], pxmitbuf->len, (u8 *)pxmitbuf); + + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + } + else + { + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); + } + + if (ret != _SUCCESS) + rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); + + return ret; +} + +/* + * Description: + * Handle xmitframe(packet) come from rtw_xmit() + * + * Return: + * _TRUE dump packet directly ok + * _FALSE enqueue, temporary can't transmit packets to hardware + */ +s32 rtl8723as_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe) +{ + struct xmit_priv *pxmitpriv; + _irqL irql; + s32 err; + + + pxmitframe->attrib.qsel = pxmitframe->attrib.priority; + pxmitpriv = &padapter->xmitpriv; + +#ifdef CONFIG_80211N_HT + if ((pxmitframe->frame_tag == DATA_FRAMETAG) && + (pxmitframe->attrib.ether_type != 0x0806) && + (pxmitframe->attrib.ether_type != 0x888e) && + (pxmitframe->attrib.dhcp_pkt != 1)) + { + if (padapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) + rtw_issue_addbareq_cmd(padapter, pxmitframe); + } +#endif + + _enter_critical_bh(&pxmitpriv->lock, &irql); + err = rtw_xmitframe_enqueue(padapter, pxmitframe); + _exit_critical_bh(&pxmitpriv->lock, &irql); + if (err != _SUCCESS) { + RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("rtl8723as_hal_xmit: enqueue xmitframe fail\n")); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + // Trick, make the statistics correct + pxmitpriv->tx_pkts--; + pxmitpriv->tx_drop++; + return _TRUE; + } + + _rtw_up_sema(&pxmitpriv->SdioXmitSema); + + return _FALSE; +} + +s32 rtl8723as_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + s32 err; + + if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) + { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + // Trick, make the statistics correct + pxmitpriv->tx_pkts--; + pxmitpriv->tx_drop++; + } + else + { +#ifdef CONFIG_SDIO_TX_TASKLET + tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); +#else + _rtw_up_sema(&pxmitpriv->SdioXmitSema); +#endif + } + + return err; + +} + +/* + * Return + * _SUCCESS start thread ok + * _FAIL start thread fail + * + */ +s32 rtl8723as_init_xmit_priv(PADAPTER padapter) +{ + struct xmit_priv *xmitpriv = &padapter->xmitpriv; + PHAL_DATA_TYPE phal; + + + phal = GET_HAL_DATA(padapter); + + _rtw_spinlock_init(&phal->SdioTxFIFOFreePageLock); + _rtw_init_sema(&xmitpriv->SdioXmitSema, 0); + _rtw_init_sema(&xmitpriv->SdioXmitTerminateSema, 0); + + return _SUCCESS; +} + +void rtl8723as_free_xmit_priv(PADAPTER padapter) +{ + PHAL_DATA_TYPE phal; + struct xmit_priv *pxmitpriv; + struct xmit_buf *pxmitbuf; + _queue *pqueue; + _list *plist, *phead; + _list tmplist; + _irqL irql; + + + phal = GET_HAL_DATA(padapter); + pxmitpriv = &padapter->xmitpriv; + pqueue = &pxmitpriv->pending_xmitbuf_queue; + phead = get_list_head(pqueue); + _rtw_init_listhead(&tmplist); + + _enter_critical_bh(&pqueue->lock, &irql); + if (_rtw_queue_empty(pqueue) == _FALSE) + { + // Insert tmplist to end of queue, and delete phead + // then tmplist become head of queue. + rtw_list_insert_tail(&tmplist, phead); + rtw_list_delete(phead); + } + _exit_critical_bh(&pqueue->lock, &irql); + + phead = &tmplist; + while (rtw_is_list_empty(phead) == _FALSE) + { + plist = get_next(phead); + rtw_list_delete(plist); + + pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); + rtw_free_xmitframe(pxmitpriv, (struct xmit_frame*)pxmitbuf->priv_data); + pxmitbuf->priv_data = NULL; + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + } + + _rtw_spinlock_free(&phal->SdioTxFIFOFreePageLock); +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/sdio_halinit.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/sdio_halinit.c new file mode 100755 index 000000000000..61a6c1b0a3ae --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/sdio_halinit.c @@ -0,0 +1,2420 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _SDIO_HALINIT_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> + +#ifndef CONFIG_SDIO_HCI +#error "CONFIG_SDIO_HCI shall be on!\n" +#endif + +#include <rtw_efuse.h> +#include <HalPwrSeqCmd.h> +#include <Hal8723PwrSeq.h> +#include <rtl8723a_hal.h> +#include <rtl8723a_led.h> +#include <sdio_ops.h> + +#ifdef CONFIG_EFUSE_CONFIG_FILE +#include <linux/fs.h> +#include <asm/uaccess.h> +#endif + +/* + * Description: + * Call this function to make sure power on successfully + * + * Return: + * _SUCCESS enable success + * _FAIL enable fail + */ + +static int PowerOnCheck(PADAPTER padapter) +{ + u32 val_offset0, val_offset1, val_offset2, val_offset3; + u32 val_mix = 0; + u32 res = 0; + u8 ret = _FAIL; + int index = 0; + + val_offset0 = rtw_read8(padapter, REG_CR); + val_offset1 = rtw_read8(padapter, REG_CR+1); + val_offset2 = rtw_read8(padapter, REG_CR+2); + val_offset3 = rtw_read8(padapter, REG_CR+3); + + if (val_offset0 == 0xEA || val_offset1 == 0xEA || + val_offset2 == 0xEA || val_offset3 ==0xEA) { + DBG_871X("%s: power on fail, do Power on again\n", __func__); + return ret; + } + + val_mix = val_offset3 << 24 | val_mix; + val_mix = val_offset2 << 16 | val_mix; + val_mix = val_offset1 << 8 | val_mix; + val_mix = val_offset0 | val_mix; + + res = rtw_read32(padapter, REG_CR); + + DBG_871X("%s: val_mix:0x%08x, res:0x%08x\n", __func__, val_mix, res); + + while(index < 100) { + if (res == val_mix) { + DBG_871X("%s: 0x100 the result of cmd52 and cmd53 is the same.\n", __func__); + ret = _SUCCESS; + break; + } else { + DBG_871X("%s: 0x100 cmd52 and cmd53 is not the same(index:%d).\n", __func__, index); + res = rtw_read32(padapter, REG_CR); + index ++; + ret = _FAIL; + } + } + + if (ret) { + index = 0; + while(index < 100) { + rtw_write32(padapter, 0x1B8, 0x12345678); + res = rtw_read32(padapter, 0x1B8); + if (res == 0x12345678) { + DBG_871X("%s: 0x1B8 test Pass.\n", __func__); + ret = _SUCCESS; + break; + } else { + index ++; + DBG_871X("%s: 0x1B8 test Fail(index: %d).\n", __func__, index); + ret = _FAIL; + } + } + } else { + DBG_871X("%s: fail at cmd52, cmd53.\n", __func__); + } + return ret; +} + + +/* + * Description: + * Call power on sequence to enable card + * + * Return: + * _SUCCESS enable success + * _FAIL enable fail + */ +static u8 CardEnable(PADAPTER padapter) +{ + u8 bMacPwrCtrlOn; + u8 ret; + + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (bMacPwrCtrlOn == _FALSE) + { + // RSV_CTRL 0x1C[7:0] = 0x00 + // unlock ISO/CLK/Power control register + rtw_write8(padapter, REG_RSV_CTRL, 0x0); + + ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723A_card_enable_flow); + if (ret == _SUCCESS) { + u8 bMacPwrCtrlOn = _TRUE; + rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + } + } else + ret = _SUCCESS; + + return ret; +} + +//static +u8 _InitPowerOn(PADAPTER padapter) +{ + u8 value8; + u16 value16; + u32 value32; + u8 ret; +// u8 bMacPwrCtrlOn; + + + ret = CardEnable(padapter); + if (ret == _FALSE) { + RT_TRACE(_module_hci_hal_init_c_, _drv_emerg_, + ("%s: run power on flow fail\n", __FUNCTION__)); + return _FAIL; + } + + // Radio-Off Pin Trigger + value8 = rtw_read8(padapter, REG_GPIO_INTM+1); + value8 |= BIT(1); // Enable falling edge triggering interrupt + rtw_write8(padapter, REG_GPIO_INTM+1, value8); + value8 = rtw_read8(padapter, REG_GPIO_IO_SEL_2+1); + value8 |= BIT(1); + rtw_write8(padapter, REG_GPIO_IO_SEL_2+1, value8); + + // Enable power down and GPIO interrupt + value16 = rtw_read16(padapter, REG_APS_FSMCO); + value16 |= EnPDN; // Enable HW power down and RF on + rtw_write16(padapter, REG_APS_FSMCO, value16); + + // Enable CMD53 R/W Operation +// bMacPwrCtrlOn = _TRUE; +// rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + + // Enable MAC DMA/WMAC/SCHEDULE/SEC block + value16 = rtw_read16(padapter, REG_CR); + value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN + | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); + rtw_write16(padapter, REG_CR, value16); + + return _SUCCESS; +} + +static void _InitQueueReservedPage(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct registry_priv *pregistrypriv = &padapter->registrypriv; + u32 outEPNum = (u32)pHalData->OutEpNumber; + u32 numHQ = 0; + u32 numLQ = 0; + u32 numNQ = 0; + u32 numPubQ; + u32 value32; + u8 value8; + BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; + //u32 txQPageNum, txQPageUnit,txQRemainPage; + + + { //for WMM + + numPubQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_PUBQ : NORMAL_PAGE_NUM_PUBQ; + + if (pHalData->OutEpQueueSel & TX_SELE_HQ) + { + numHQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_HPQ : NORMAL_PAGE_NUM_HPQ; + } + + if (pHalData->OutEpQueueSel & TX_SELE_LQ) + { + numLQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_LPQ : NORMAL_PAGE_NUM_LPQ; + } + + // NOTE: This step shall be proceed before writting REG_RQPN. + if (pHalData->OutEpQueueSel & TX_SELE_NQ) { + numNQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_NPQ : NORMAL_PAGE_NUM_NPQ; + } + value8 = (u8)_NPQ(numNQ); + rtw_write8(padapter, REG_RQPN_NPQ, value8); + } + + // TX DMA + value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; + rtw_write32(padapter, REG_RQPN, value32); +} + +static void _InitTxBufferBoundary(PADAPTER padapter) +{ + struct registry_priv *pregistrypriv = &padapter->registrypriv; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + //u16 txdmactrl; + u8 txpktbuf_bndy; + + if (!pregistrypriv->wifi_spec) { + txpktbuf_bndy = TX_PAGE_BOUNDARY; + } else { + //for WMM + txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY; + } + + rtw_write8(padapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); + rtw_write8(padapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); + rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); + rtw_write8(padapter, REG_TRXFF_BNDY, txpktbuf_bndy); + rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); +} + +static VOID +_InitNormalChipRegPriority( + IN PADAPTER Adapter, + IN u16 beQ, + IN u16 bkQ, + IN u16 viQ, + IN u16 voQ, + IN u16 mgtQ, + IN u16 hiQ + ) +{ + u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); + + value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | + _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | + _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); + + rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); +} + +static VOID +_InitNormalChipOneOutEpPriority( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + u16 value = 0; + switch(pHalData->OutEpQueueSel) + { + case TX_SELE_HQ: + value = QUEUE_HIGH; + break; + case TX_SELE_LQ: + value = QUEUE_LOW; + break; + case TX_SELE_NQ: + value = QUEUE_NORMAL; + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; + } + + _InitNormalChipRegPriority(Adapter, + value, + value, + value, + value, + value, + value + ); + +} + +static VOID +_InitNormalChipTwoOutEpPriority( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; + + + u16 valueHi = 0; + u16 valueLow = 0; + + switch(pHalData->OutEpQueueSel) + { + case (TX_SELE_HQ | TX_SELE_LQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_NQ | TX_SELE_LQ): + valueHi = QUEUE_NORMAL; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_HQ | TX_SELE_NQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_NORMAL; + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; + } + + if(!pregistrypriv->wifi_spec ){ + beQ = valueLow; + bkQ = valueLow; + viQ = valueHi; + voQ = valueHi; + mgtQ = valueHi; + hiQ = valueHi; + } + else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE + beQ = valueLow; + bkQ = valueHi; + viQ = valueHi; + voQ = valueLow; + mgtQ = valueHi; + hiQ = valueHi; + } + + _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); + +} + +static VOID +_InitNormalChipThreeOutEpPriority( + IN PADAPTER padapter + ) +{ + struct registry_priv *pregistrypriv = &padapter->registrypriv; + u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; + + if (!pregistrypriv->wifi_spec){// typical setting + beQ = QUEUE_LOW; + bkQ = QUEUE_LOW; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + else {// for WMM + beQ = QUEUE_LOW; + bkQ = QUEUE_NORMAL; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + _InitNormalChipRegPriority(padapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); +} + +static VOID +_InitNormalChipQueuePriority( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(pHalData->OutEpNumber) + { + case 1: + _InitNormalChipOneOutEpPriority(Adapter); + break; + case 2: + _InitNormalChipTwoOutEpPriority(Adapter); + break; + case 3: + _InitNormalChipThreeOutEpPriority(Adapter); + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; + } + + +} + +static void _InitQueuePriority(PADAPTER padapter) +{ + _InitNormalChipQueuePriority(padapter); +} + +static void _InitPageBoundary(PADAPTER padapter) +{ + // RX Page Boundary + //srand(static_cast<unsigned int>(time(NULL)) ); + u16 rxff_bndy = 0x27FF;//(rand() % 1) ? 0x27FF : 0x23FF; + + rtw_write16(padapter, (REG_TRXFF_BNDY + 2), rxff_bndy); + + // TODO: ?? shall we set tx boundary? +} + +static void _InitTransferPageSize(PADAPTER padapter) +{ + // Tx page size is always 128. + + u8 value8; + value8 = _PSRX(PBP_128) | _PSTX(PBP_128); + rtw_write8(padapter, REG_PBP, value8); +} + +void _InitDriverInfoSize(PADAPTER padapter, u8 drvInfoSize) +{ + rtw_write8(padapter, REG_RX_DRVINFO_SZ, drvInfoSize); +} + +void _InitNetworkType(PADAPTER padapter) +{ + u32 value32; + + value32 = rtw_read32(padapter, REG_CR); + + // TODO: use the other function to set network type +// value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); + value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); + + rtw_write32(padapter, REG_CR, value32); +} + +void _InitWMACSetting(PADAPTER padapter) +{ + u16 value16; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + + //pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYSTS | RCR_APP_ICV | RCR_APP_MIC; + // don't turn on AAP, it will allow all packets to driver + pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC; +#ifdef CONFIG_MAC_LOOPBACK_DRIVER + pHalData->ReceiveConfig |= RCR_ADD3 | RCR_APWRMGT | RCR_ACRC32 | RCR_ADF; +#endif + + // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() + rtw_write32(padapter, REG_RCR, pHalData->ReceiveConfig); + + // Accept all multicast address + rtw_write32(padapter, REG_MAR, 0xFFFFFFFF); + rtw_write32(padapter, REG_MAR + 4, 0xFFFFFFFF); + + // Accept all data frames + value16 = 0xFFFF; + rtw_write16(padapter, REG_RXFLTMAP2, value16); + + // 2010.09.08 hpfan + // Since ADF is removed from RCR, ps-poll will not be indicate to driver, + // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. + value16 = 0x400; + rtw_write16(padapter, REG_RXFLTMAP1, value16); + + // Accept all management frames + value16 = 0xFFFF; + rtw_write16(padapter, REG_RXFLTMAP0, value16); +} + +void _InitAdaptiveCtrl(PADAPTER padapter) +{ + u16 value16; + u32 value32; + + // Response Rate Set + value32 = rtw_read32(padapter, REG_RRSR); + value32 &= ~RATE_BITMAP_ALL; + value32 |= RATE_RRSR_CCK_ONLY_1M; + rtw_write32(padapter, REG_RRSR, value32); + + // CF-END Threshold + //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); + + // SIFS (used in NAV) + value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); + rtw_write16(padapter, REG_SPEC_SIFS, value16); + + // Retry Limit + value16 = _LRL(0x30) | _SRL(0x30); + rtw_write16(padapter, REG_RL, value16); +} + +void _InitEDCA(PADAPTER padapter) +{ + // Set Spec SIFS (used in NAV) + rtw_write16(padapter, REG_SPEC_SIFS, 0x100a); + rtw_write16(padapter, REG_MAC_SPEC_SIFS, 0x100a); + + // Set SIFS for CCK + rtw_write16(padapter, REG_SIFS_CTX, 0x100a); + + // Set SIFS for OFDM + rtw_write16(padapter, REG_SIFS_TRX, 0x100a); + + // TXOP + rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x005EA42B); + rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A44F); + rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005EA324); + rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002FA226); +} + +void _InitRateFallback(PADAPTER padapter) +{ + // Set Data Auto Rate Fallback Retry Count register. + rtw_write32(padapter, REG_DARFRC, 0x00000000); + rtw_write32(padapter, REG_DARFRC+4, 0x10080404); + rtw_write32(padapter, REG_RARFRC, 0x04030201); + rtw_write32(padapter, REG_RARFRC+4, 0x08070605); + +} + +void _InitRetryFunction(PADAPTER padapter) +{ + u8 value8; + + value8 = rtw_read8(padapter, REG_FWHW_TXQ_CTRL); + value8 |= EN_AMPDU_RTY_NEW; + rtw_write8(padapter, REG_FWHW_TXQ_CTRL, value8); + + // Set ACK timeout + rtw_write8(padapter, REG_ACKTO, 0x40); +} + +static void HalRxAggr8723ASdio(PADAPTER padapter) +{ +#if 1 + struct registry_priv *pregistrypriv; + u8 valueDMATimeout; + u8 valueDMAPageCount; + + + pregistrypriv = &padapter->registrypriv; + + if (pregistrypriv->wifi_spec) + { + // 2010.04.27 hpfan + // Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer + // Timeout value is calculated by 34 / (2^n) + valueDMATimeout = 0x0f; + valueDMAPageCount = 0x01; + } + else + { + valueDMATimeout = 0x06; + //valueDMAPageCount = 0x0F; + valueDMAPageCount = 0x24; + + } + + rtw_write8(padapter, REG_RXDMA_AGG_PG_TH+1, valueDMATimeout); + rtw_write8(padapter, REG_RXDMA_AGG_PG_TH, valueDMAPageCount); +#endif +} + +void sdio_AggSettingRxUpdate(PADAPTER padapter) +{ +#if 1 + HAL_DATA_TYPE *pHalData; + u8 valueDMA; + + + pHalData = GET_HAL_DATA(padapter); + + valueDMA = rtw_read8(padapter, REG_TRXDMA_CTRL); + valueDMA |= RXDMA_AGG_EN; + rtw_write8(padapter, REG_TRXDMA_CTRL, valueDMA); + +#if 0 + switch (RX_PAGE_SIZE_REG_VALUE) + { + case PBP_64: + pHalData->HwRxPageSize = 64; + break; + case PBP_128: + pHalData->HwRxPageSize = 128; + break; + case PBP_256: + pHalData->HwRxPageSize = 256; + break; + case PBP_512: + pHalData->HwRxPageSize = 512; + break; + case PBP_1024: + pHalData->HwRxPageSize = 1024; + break; + default: + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, + ("%s: RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n", __FUNCTION__)); + break; + } +#endif +#endif +} + +void _initSdioAggregationSetting(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + // Tx aggregation setting +// sdio_AggSettingTxUpdate(padapter); + + // Rx aggregation setting + HalRxAggr8723ASdio(padapter); + sdio_AggSettingRxUpdate(padapter); + + // 201/12/10 MH Add for USB agg mode dynamic switch. + pHalData->UsbRxHighSpeedMode = _FALSE; +} + + +void _InitOperationMode(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + struct mlme_ext_priv *pmlmeext; + u8 regBwOpMode = 0; + u32 regRATR = 0, regRRSR = 0; + u8 MinSpaceCfg; + + + pHalData = GET_HAL_DATA(padapter); + pmlmeext = &padapter->mlmeextpriv; + + //1 This part need to modified according to the rate set we filtered!! + // + // Set RRSR, RATR, and REG_BWOPMODE registers + // + switch(pmlmeext->cur_wireless_mode) + { + case WIRELESS_MODE_B: + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK; + regRRSR = RATE_ALL_CCK; + break; + case WIRELESS_MODE_A: +// RT_ASSERT(FALSE,("Error wireless a mode\n")); +#if 0 + regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; + regRATR = RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_OFDM_AG; +#endif + break; + case WIRELESS_MODE_G: + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + break; + case WIRELESS_MODE_AUTO: +#if 0 + if (padapter->bInHctTest) + { + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + } + else +#endif + { + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + } + break; + case WIRELESS_MODE_N_24G: + // It support CCK rate by default. + // CCK rate will be filtered out only when associated AP does not support it. + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + break; + case WIRELESS_MODE_N_5G: +// RT_ASSERT(FALSE,("Error wireless mode")); +#if 0 + regBwOpMode = BW_OPMODE_5G; + regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_OFDM_AG; +#endif + break; + + default: //for MacOSX compiler warning. + break; + } + + rtw_write8(padapter, REG_BWOPMODE, regBwOpMode); + + // For Min Spacing configuration. + switch(pHalData->rf_type) + { + case RF_1T2R: + case RF_1T1R: + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter: RF_Type%s\n", (pHalData->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"))); +// padapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3); + MinSpaceCfg = (MAX_MSS_DENSITY_1T << 3); + break; + case RF_2T2R: + case RF_2T2R_GREEN: + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter:RF_Type(2T2R)\n")); +// padapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3); + MinSpaceCfg = (MAX_MSS_DENSITY_2T << 3); + break; + } + +// rtw_write8(padapter, REG_AMPDU_MIN_SPACE, padapter->MgntInfo.MinSpaceCfg); + rtw_write8(padapter, REG_AMPDU_MIN_SPACE, MinSpaceCfg); +} + +void _InitInterrupt(PADAPTER padapter) +{ + // HISR - turn all off + rtw_write32(padapter, REG_HISR, 0); + + // HIMR - turn all off + rtw_write32(padapter, REG_HIMR, 0); + + // + // Initialize and enable SDIO Host Interrupt. + // + InitInterrupt8723ASdio(padapter); + + // + // Initialize and enable system Host Interrupt. + // + InitSysInterrupt8723ASdio(padapter); + + EnableInterrupt8723ASdio(padapter); +} + +void _InitRDGSetting(PADAPTER padapter) +{ + rtw_write8(padapter, REG_RD_CTRL, 0xFF); + rtw_write16(padapter, REG_RD_NAV_NXT, 0x200); + rtw_write8(padapter, REG_RD_RESP_PKT_TH, 0x05); +} + +#if (MP_DRIVER == 1 ) +static void _InitRxSetting(PADAPTER padapter) +{ + rtw_write32(padapter, REG_MACID, 0x87654321); + rtw_write32(padapter, 0x0700, 0x87654321); +} +#endif + +static void _InitRFType(PADAPTER padapter) +{ + struct registry_priv *pregpriv = &padapter->registrypriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); + + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; + return; +#endif + + pHalData->rf_chip = RF_6052; + + if (_FALSE == is92CU) { + pHalData->rf_type = RF_1T1R; + DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); + return; + } + + // TODO: Consider that EEPROM set 92CU to 1T1R later. + // Force to overwrite setting according to chip version. Ignore EEPROM setting. + //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; + MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); +} + +// Set CCK and OFDM Block "ON" +static void _BBTurnOnBlock(PADAPTER padapter) +{ +#if (DISABLE_BB_RF) + return; +#endif + + PHY_SetBBReg(padapter, rFPGA0_RFMOD, bCCKEn, 0x1); + PHY_SetBBReg(padapter, rFPGA0_RFMOD, bOFDMEn, 0x1); +} + +static void _RfPowerSave(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; +// PMGNT_INFO pMgntInfo; + struct pwrctrl_priv *pwrctrlpriv; + u8 u1bTmp; + rt_rf_power_state eRfPowerStateToSet; + + +#if (DISABLE_BB_RF) + return; +#endif + + pHalData = GET_HAL_DATA(padapter); +// pMgntInfo = &padapter->MgntInfo; + pwrctrlpriv = adapter_to_pwrctl(padapter); + + // + // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status + // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not + // call init_adapter. May cause some problem?? + // + // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed + // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState + // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. + // Added by tynli. 2010.03.30. + pwrctrlpriv->rf_pwrstate = rf_on; + RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); + //Added by chiyokolin, 2011.10.12 for Tx + rtw_write8(padapter, REG_TXPAUSE, 0x00); + + // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. + // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. +#if 1 + pwrctrlpriv->b_hw_radio_off = _FALSE; + eRfPowerStateToSet = rf_on; +#else + eRfPowerStateToSet = (rt_rf_power_state)RfOnOffDetect(padapter); + pMgntInfo->RfOffReason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW; + pMgntInfo->RfOffReason |= (pMgntInfo->RegRfOff) ? RF_CHANGE_BY_SW : 0; + + if (pMgntInfo->RfOffReason & RF_CHANGE_BY_HW) + pHalData->bHwRadioOff = _TRUE; + + if (pMgntInfo->RegRfOff == _TRUE) + { // User disable RF via registry. + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s: Turn off RF for RegRfOff\n", __FUNCTION__)); + MgntActSet_RF_State(padapter, rf_off, RF_CHANGE_BY_SW, _TRUE); + + if (padapter->bSlaveOfDMSP) + return; + + // Those action will be discard in MgntActSet_RF_State because off the same state +// for (eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) +// PHY_SetRFReg(padapter, (RF_RADIO_PATH_E)eRFPath, RF_BS_PA_APSET_G5_G8, 0xC00, 0x0); + } + else if (pMgntInfo->RfOffReason > RF_CHANGE_BY_PS) + { // H/W or S/W RF OFF before sleep. + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s: Turn off RF for RfOffReason(%x)\n", __FUNCTION__, pMgntInfo->RfOffReason)); + + // Selective suspend mode Resume from S3/S4 CU need to enable RF and turn off again. + //MgntActSet_RF_State(padapter, rf_on, pMgntInfo->RfOffReason, _TRUE); + pHalData->eRFPowerState = rf_on; + MgntActSet_RF_State(padapter, rf_off, pMgntInfo->RfOffReason, _TRUE); + + // Those action will be discard in MgntActSet_RF_State because off the same state +// for (eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) +// PHY_SetRFReg(padapter, (RF_RADIO_PATH_E)eRFPath, RF_BS_PA_APSET_G5_G8, 0xC00, 0x0); + } + else + { + // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09. + if( RT_GetInterfaceSelection(padapter)==INTF_SEL2_MINICARD && + (padapter->MgntInfo.PowerSaveControl.bGpioRfSw)) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_ ("%s: RF=%d \n", __FUNCTION__, eRfPowerStateToSet)); + if (eRfPowerStateToSet == rf_off) + { + MgntActSet_RF_State(padapter, rf_off, RF_CHANGE_BY_HW, _TRUE); + pHalData->bHwRadioOff = _TRUE; + } + else + { + pHalData->eRFPowerState = rf_off; + pMgntInfo->RfOffReason = RF_CHANGE_BY_INIT; + pHalData->bHwRadioOff = _FALSE; + MgntActSet_RF_State(padapter, rf_on, pMgntInfo->RfOffReason, _TRUE); + //DrvIFIndicateCurrentPhyStatus(padapter); + } + } + else + { + pHalData->eRFPowerState = rf_off; + pMgntInfo->RfOffReason = RF_CHANGE_BY_INIT; + MgntActSet_RF_State(padapter, rf_on, pMgntInfo->RfOffReason, _TRUE); + //DrvIFIndicateCurrentPhyStatus(padapter); + } + + pMgntInfo->RfOffReason = 0; + pHalData->bHwRadioOff = _FALSE; + pHalData->eRFPowerState = rf_on; + padapter->HalFunc.LedControlHandler(padapter, LED_CTL_POWER_ON); + } +#endif + // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. + // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. + if (pHalData->pwrdown && eRfPowerStateToSet == rf_off) + { + // Enable register area 0x0-0xc. + rtw_write8(padapter, REG_RSV_CTRL, 0x0); + + // + // <Roger_Notes> We should configure HW PDn source for WiFi ONLY, and then + // our HW will be set in power-down mode if PDn source from all functions are configured. + // 2010.10.06. + // + if (IS_HARDWARE_TYPE_8723AS(padapter)) + { + u1bTmp = rtw_read8(padapter, REG_MULTI_FUNC_CTRL); + u1bTmp |= WL_HWPDN_EN; + rtw_write8(padapter, REG_MULTI_FUNC_CTRL, u1bTmp); + } + else + { + rtw_write16(padapter, REG_APS_FSMCO, 0x8812); + } + } + //DrvIFIndicateCurrentPhyStatus(padapter); +} + +static void _InitAntenna_Selection(PADAPTER padapter) +{ + rtw_write8(padapter, REG_LEDCFG2, 0x82); +} + +static void _InitPABias(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 pa_setting; + BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); + + //FIXED PA current issue + //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); + pa_setting = EFUSE_Read1Byte(padapter, 0x1FA); + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); + + if(!(pa_setting & BIT0)) + { + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406); + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406); + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406); + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); + } + + if(!(pa_setting & BIT1) && is92C) + { + PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406); + PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406); + PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406); + PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n")); + } + + if(!(pa_setting & BIT4)) + { + pa_setting = rtw_read8(padapter, 0x16); + pa_setting &= 0x0F; + rtw_write8(padapter, 0x16, pa_setting | 0x80); + rtw_write8(padapter, 0x16, pa_setting | 0x90); + } +} + +// +// 2010/08/09 MH Add for power down check. +// +static BOOLEAN HalDetectPwrDownMode(PADAPTER Adapter) +{ + u8 tmpvalue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + + + EFUSE_ShadowRead(Adapter, 1, 0x7B/*EEPROM_RF_OPT3_92C*/, (u32 *)&tmpvalue); + + // 2010/08/25 MH INF priority > PDN Efuse value. + if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode) + { + pHalData->pwrdown = _TRUE; + } + else + { + pHalData->pwrdown = _FALSE; + } + + DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); + + return pHalData->pwrdown; +} // HalDetectPwrDownMode + +static u32 rtl8723as_hal_init(PADAPTER padapter) +{ + s32 ret; + u32 boundary; + PHAL_DATA_TYPE pHalData; + struct pwrctrl_priv *pwrctrlpriv; + struct registry_priv *pregistrypriv; + u8 is92C; + rt_rf_power_state eRfPowerStateToSet; + u32 NavUpper = WiFiNavUpperUs; + u8 u1bTmp; + u16 value16; + + + pHalData = GET_HAL_DATA(padapter); + pwrctrlpriv = adapter_to_pwrctl(padapter); + pregistrypriv = &padapter->registrypriv; + is92C = IS_92C_SERIAL(pHalData->VersionID); + + // Disable Interrupt first. +// rtw_hal_disable_interrupt(padapter); + + ret = _InitPowerOn(padapter); + if (_FAIL == ret) { + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init Power On!\n")); + return _FAIL; + } + + ret = PowerOnCheck(padapter); + if (_FAIL == ret ) { + DBG_871X("Power on Fail! do it again\n"); + ret = _InitPowerOn(padapter); + if (_FAIL == ret) { + DBG_871X("Failed to init Power On!\n"); + return _FAIL; + } + } + DBG_871X("Power on ok!\n"); + + +// padapter->HalFunc.HalRxAggrHandler(padapter, _TRUE); + +#ifdef CONFIG_BT_COEXIST + // + // 2010/09/23 MH Accordgin to Alfred's siggestion. we need to enable SIC to prevent HW + // to enter suspend mode automatically. If host does not send SOF every 3ms. Or under DTM + // test with rtl8188cu selective suspend enabler filter driver, WIN host will trigger the device to + // enter suspend mode after some test (unknow reason now). We need to prevent the case otherwise + // the register will be 0xea and all TX/RX path stop accidently. + // + // + // 2010/10/01 MH If the OS is XP, host will trigger USB device to enter D3 mode. In CU HW design + // it will enter suspend mode automatically. In slim combo card, the BT clock will be cut off if HW + // enter suspend mode. We need to seperate differet case. + // + if (HALBT_IsBTExist(padapter)) + { +#if 0 +#if OS_WIN_FROM_VISTA(OS_VERSION) + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("Slim_combo win7/vista need not enable SIC\n")); +#else + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("Slim_combo XP enable SIC\n")); + // 2010/10/15 MH According to Alfre's description, e need to enable bit14 at first an then enable bit12. + // Otherwise, HW will enter debug mode and 8051 can not work. We need to stay at test mode to enable SIC. + rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)|BIT14); + rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)|BIT12); +#endif +#endif + } +#endif + + if (!pregistrypriv->wifi_spec) { + boundary = TX_PAGE_BOUNDARY; + } else { + boundary = WMM_NORMAL_TX_PAGE_BOUNDARY; // for WMM + } + ret = InitLLTTable(padapter, boundary); + if (_SUCCESS != ret) { + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT Table!\n")); + return _FAIL; + } + +#if 0 + if(pHTInfo->bRDGEnable){ + _InitRDGSetting(Adapter); + } + + if (pHalData->bEarlyModeEnable) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n")); + + u1bTmp = rtw_read8(padapter, REG_EARLY_MODE_CONTROL); + u1bTmp |= 0xf; + rtw_write8(padapter, REG_EARLY_MODE_CONTROL, u1bTmp); + + rtw_write8(padapter, REG_EARLY_MODE_CONTROL+3, 0x80); + + u1bTmp = rtw_read8(padapter, REG_TCR+1); + u1bTmp |= 0x40; + rtw_write8(padapter,REG_TCR+1, u1bTmp); + } + else +#endif + //rtw_write8(padapter, REG_EARLY_MODE_CONTROL, 0); + +#if (MP_DRIVER == 1) + if (padapter->registrypriv.mp_mode == 1) + { + _InitRxSetting(padapter); + //RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: Don't Download Firmware!!\n", __FUNCTION__)); + //padapter->bFWReady = _FALSE; + } +// else +#endif + { + ret = rtl8723a_FirmwareDownload(padapter); + if (ret != _SUCCESS) { + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: Download Firmware failed!!\n", __FUNCTION__)); + padapter->bFWReady = _FALSE; + pHalData->fw_ractrl = _FALSE; + return ret; + } else { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter8192CSdio(): Download Firmware Success!!\n")); + padapter->bFWReady = _TRUE; + pHalData->fw_ractrl = _TRUE; + } + } + + rtl8723a_InitializeFirmwareVars(padapter); + +// SIC_Init(padapter); + + if (pwrctrlpriv->reg_rfoff == _TRUE) { + pwrctrlpriv->rf_pwrstate = rf_off; + } + + // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting + // HW GPIO pin. Before PHY_RFConfig8192C. + HalDetectPwrDownMode(padapter); + + + // Set RF type for BB/RF configuration + _InitRFType(padapter); + + // Save target channel + // <Roger_Notes> Current Channel will be updated again later. + pHalData->CurrentChannel = 6; + +#if (HAL_MAC_ENABLE == 1) + ret = PHY_MACConfig8723A(padapter); + if(ret != _SUCCESS){ +// RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure MAC!!\n")); + return ret; + } +#endif + // + //d. Initialize BB related configurations. + // +#if (HAL_BB_ENABLE == 1) + ret = PHY_BBConfig8723A(padapter); + if(ret != _SUCCESS){ +// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Initializepadapter8192CSdio(): Fail to configure BB!!\n")); + return ret; + } +#endif + // If RF is on, we need to init RF. Otherwise, skip the procedure. + // We need to follow SU method to change the RF cfg.txt. Default disable RF TX/RX mode. + //if(pHalData->eRFPowerState == eRfOn) + { +#if (HAL_RF_ENABLE == 1) + ret = PHY_RFConfig8723A(padapter); + + if(ret != _SUCCESS){ +// RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure RF!!\n")); + return ret; + } + + if (IS_81xxC_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID)) + { + PHY_SetRFReg(padapter, RF_PATH_A, RF_RX_G1, bMaskDWord, 0x30255); + PHY_SetRFReg(padapter, RF_PATH_A, RF_RX_G2, bMaskDWord, 0x50a00); + } + +#endif + } + // + // Joseph Note: Keep RfRegChnlVal for later use. + // + pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(padapter, (RF_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask); + pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(padapter, (RF_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask); + + if (!pHalData->bMACFuncEnable) { + _InitQueueReservedPage(padapter); + _InitTxBufferBoundary(padapter); + } + _InitQueuePriority(padapter); + _InitPageBoundary(padapter); + _InitTransferPageSize(padapter); + + // Get Rx PHY status in order to report RSSI and others. + _InitDriverInfoSize(padapter, DRVINFO_SZ); + hal_init_macaddr(padapter); + _InitNetworkType(padapter); + _InitWMACSetting(padapter); + _InitAdaptiveCtrl(padapter); + _InitEDCA(padapter); + _InitRateFallback(padapter); + _InitRetryFunction(padapter); + _initSdioAggregationSetting(padapter); + _InitOperationMode(padapter); + rtl8723a_InitBeaconParameters(padapter); + rtl8723a_InitBeaconMaxError(padapter, _TRUE); + _InitInterrupt(padapter); + +#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) + +#ifdef CONFIG_CHECK_AC_LIFETIME + // Enable lifetime check for the four ACs + rtw_write8(padapter, REG_LIFETIME_EN, 0x0F); +#endif // CONFIG_CHECK_AC_LIFETIME + +#ifdef CONFIG_TX_MCAST2UNI + rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms + rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms +#else // CONFIG_TX_MCAST2UNI + rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s + rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s +#endif // CONFIG_TX_MCAST2UNI +#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI + + + + // The FW command register update must after MAC and FW init ready. +#if 0 + if (padapter->bFWReady == TRUE) + { + if(pDevice->RegUsbSS) + { + H2C_SS_RFOFF_PARAM param; + param.gpio_period = 500; + param.ROFOn = 1; + FillH2CCmd92C(padapter, H2C_SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (pu8)(¶m)); + RT_TRACE(COMP_INIT, DBG_LOUD, + ("SS Set H2C_CMD for FW detect GPIO time=%d\n", param.gpio_period)); + } + else + RT_TRACE(COMP_INIT, DBG_LOUD, ("Non-SS Driver detect GPIO by itself\n")); + } + else + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("padapter->bFWReady == FALSE\n")); + } +#endif + + _BBTurnOnBlock(padapter); +#if 0 +#if RT_PLATFORM == PLATFORM_WINDOWS + if(PlatformIsOverrideAddress(padapter)) + NicIFSetMacAddress(padapter, PlatformGetOverrideAddress(padapter)); + else +#endif + NicIFSetMacAddress(padapter, padapter->PermanentAddress); + + if(padapter->ResetProgress == RESET_TYPE_NORESET){ + RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializepadapter8192CSdio():RegWirelessMode(%#x) \n", padapter->RegWirelessMode)); + padapter->HalFunc.SetWirelessModeHandler(padapter, padapter->RegWirelessMode); + } +#endif + +#if 1 + invalidate_cam_all(padapter); +#else + CamResetAllEntry(padapter); + padapter->HalFunc.EnableHWSecCfgHandler(padapter); +#endif + + // 2010/12/17 MH We need to set TX power according to EFUSE content at first. + PHY_SetTxPowerLevel8192C(padapter, pHalData->CurrentChannel); + // Record original value for template. This is arough data, we can only use the data + // for power adjust. The value can not be adjustde according to different power!!! +// pHalData->OriginalCckTxPwrIdx = pHalData->CurrentCckTxPwrIdx; +// pHalData->OriginalOfdm24GTxPwrIdx = pHalData->CurrentOfdm24GTxPwrIdx; + +// Move by Neo for USB SS to below setp +//_RfPowerSave(padapter); + + rtl8723a_InitAntenna_Selection(padapter); + + // + // Disable BAR, suggested by Scott + // 2010.04.09 add by hpfan + // + rtw_write32(padapter, REG_BAR_MODE_CTRL, 0x0201ffff); + + // HW SEQ CTRL + // set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. + rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); + + +#ifdef CONFIG_MAC_LOOPBACK_DRIVER + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN); + u1bTmp &= ~(FEN_BBRSTB|FEN_BB_GLB_RSTn); + rtw_write8(padapter, REG_SYS_FUNC_EN,u1bTmp); + + rtw_write8(padapter, REG_RD_CTRL, 0x0F); + rtw_write8(padapter, REG_RD_CTRL+1, 0xCF); + rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, 0x80); + rtw_write32(padapter, REG_CR, 0x0b0202ff); +#endif + + // + // Configure SDIO TxRx Control to enable Rx DMA timer masking. + // 2010.02.24. + // + SdioLocalCmd52Write1Byte(padapter, SDIO_REG_TX_CTRL, 0); + + _RfPowerSave(padapter); + +// RT_TRACE(COMP_INIT|COMP_MLME, DBG_LOUD, ("HighestOperaRate = %x\n", padapter->MgntInfo.HighestOperaRate)); +#if 0 +#if (0 == RTL8192SU_FPGA_UNSPECIFIED_NETWORK) + PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) ); +#endif + +#if SILENT_RESET + PlatformStartWorkItem( &(pHalData->RtUsbCheckResetWorkItem) ); +#endif +#endif +#if (MP_DRIVER == 1) + if (padapter->registrypriv.mp_mode == 1) + { + padapter->mppriv.channel = pHalData->CurrentChannel; + MPT_InitializeAdapter(padapter, padapter->mppriv.channel); + } +// else +#endif //#if (MP_DRIVER == 1) + { + // 2010/08/26 MH Merge from 8192CE. + if (pwrctrlpriv->rf_pwrstate == rf_on) + { + if (pHalData->bIQKInitialized) +// PHY_IQCalibrate(padapter, _TRUE); + rtl8192c_PHY_IQCalibrate(padapter,_TRUE); + else + { +// PHY_IQCalibrate(padapter, _FALSE); + rtl8192c_PHY_IQCalibrate(padapter,_FALSE); + pHalData->bIQKInitialized = _TRUE; + } + +// dm_CheckTXPowerTracking(padapter); +// PHY_LCCalibrate(padapter); + rtl8192c_odm_CheckTXPowerTracking(padapter); + rtl8192c_PHY_LCCalibrate(padapter); + +#ifdef CONFIG_BT_COEXIST + rtl8723a_SingleDualAntennaDetection(padapter); +#endif + } + } + +#if 0 + //if(pHalData->eRFPowerState == eRfOn) + { + _InitPABias(padapter); + } +#endif + +#ifdef CONFIG_BT_COEXIST + // Init BT hw config. + HALBT_InitHwConfig(padapter); +#endif + +// InitHalDm(padapter); + rtl8723a_InitHalDm(padapter); + + // 2010/05/20 MH We need to init timer after update setting. Otherwise, we can not get correct inf setting. + // 2010/05/18 MH For SE series only now. Init GPIO detect time +#if 0 + if (pDevice->RegUsbSS) + { + RT_TRACE(COMP_INIT, DBG_LOUD, (" call GpioDetectTimerStart\n")); + GpioDetectTimerStart(padapter); // Disable temporarily + } +#endif + + //DbgPrint("pHalData->DefaultTxPwrDbm = %d\n", pHalData->DefaultTxPwrDbm); + +// if(pHalData->SwBeaconType < HAL92CSDIO_DEFAULT_BEACON_TYPE) // The lowest Beacon Type that HW can support +// pHalData->SwBeaconType = HAL92CSDIO_DEFAULT_BEACON_TYPE; + + // + // Update current Tx FIFO page status. + // + HalQueryTxBufferStatus8723ASdio(padapter); + + // Enable MACTXEN/MACRXEN block + u1bTmp = rtw_read8(padapter, REG_CR); + u1bTmp |= (MACTXEN | MACRXEN); + rtw_write8(padapter, REG_CR, u1bTmp); + + rtw_hal_set_hwreg(padapter, HW_VAR_NAV_UPPER, (u8*)&NavUpper); + +// pHalData->PreRpwmVal = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HRPWM1) & 0x80; + +#ifdef CONFIG_XMIT_ACK + //ack for xmit mgmt frames. + rtw_write32(padapter, REG_FWHW_TXQ_CTRL, rtw_read32(padapter, REG_FWHW_TXQ_CTRL)|BIT(12)); +#endif //CONFIG_XMIT_ACK + + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("-%s\n", __FUNCTION__)); + + return _SUCCESS; +} +#if 0 +static void rtl8723as_hw_power_down(PADAPTER padapter) +{ + // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. + // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. + + // Enable register area 0x0-0xc. + rtw_write8(padapter,REG_RSV_CTRL, 0x0); + rtw_write16(padapter, REG_APS_FSMCO, 0x8812); +} + +// +// Description: RTL8723e card disable power sequence v003 which suggested by Scott. +// First created by tynli. 2011.01.28. +// +static void PowerDownRTL8723ASdio(PADAPTER padapter) +{ + u8 v8; + u32 retry; + + rtw_write8(padapter, REG_RF_CTRL, 0); + + v8 = rtw_read8(padapter, REG_LEDCFG2); + v8 &= ~BIT(7); + rtw_write8(padapter, REG_LEDCFG2, v8); + + v8 = rtw_read8(padapter, REG_APS_FSMCO+1); + v8 |= BIT(1); + rtw_write8(padapter, REG_APS_FSMCO+1, v8); + + retry = 0; + do { + v8 = rtw_read8(padapter, REG_APS_FSMCO+1); + if (!(v8 & BIT(1))) break; + retry++; + if (retry == 1000) break; + } while (1); + if (retry == 1000) + DBG_8192C(KERN_ERR "%s: can't wait REG_APS_FSMCO BIT9 to 0! (0x%02x)\n", __func__, v8); + + v8 = rtw_read8(padapter, REG_APS_FSMCO+2); + v8 &= ~BIT(0); + rtw_write8(padapter, REG_APS_FSMCO+2, v8); + + v8 = rtw_read8(padapter, REG_APS_FSMCO+1); + v8 |= BIT(7); + rtw_write8(padapter, REG_APS_FSMCO+1, v8); +} + +// +// Description: RTL8723e card disable power sequence v003 which suggested by Scott. +// First created by tynli. 2011.01.28. +// +static void LPSRadioOffRTL8723ASdio(PADAPTER padapter) +{ + u8 u1bTmp; + u32 v32; + u32 retry; + + // 1. 0x522[7:0] = 0xFF // TX pause + rtw_write8(padapter, REG_TXPAUSE, 0x7F); + + retry = 0; + v32 = 0; + do { + v32 = rtw_read32(padapter, 0x5F8); + if (v32 == 0) break; + retry++; + if (retry == 1000) break; + } while (1); + if (retry == 1000) + DBG_8192C(KERN_ERR "%s: polling 0x5F8 to 0 fail! (0x%08x)\n", __func__, v32); + + // 2. 0x02[1:0] = 2b'10 // Reset BB TRX + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN); + u1bTmp &= ~BIT0; + rtw_write8(padapter, REG_SYS_FUNC_EN, u1bTmp); + + rtw_udelay_os(2); + + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN); + u1bTmp &= ~BIT1; + rtw_write8(padapter, REG_SYS_FUNC_EN, u1bTmp); + + // 3. 0x100[7:0] = 0x3F // Reset MAC TRX + rtw_write8(padapter, REG_CR, 0x3F); + + // 4. 0x101[1] = 0 // check if removed later + u1bTmp = rtw_read8(padapter, REG_CR+1); + rtw_write8(padapter, REG_CR+1, u1bTmp&(~BIT1)); + + // 5. 0x553[5] = 1 // respond TX ok to scheduler + u1bTmp = rtw_read8(padapter, REG_DUAL_TSF_RST); + rtw_write8(padapter, REG_DUAL_TSF_RST, (u1bTmp|BIT5)); +} +#endif +// +// Description: +// RTL8723e card disable power sequence v003 which suggested by Scott. +// +// First created by tynli. 2011.01.28. +// +static void CardDisableRTL8723ASdio(PADAPTER padapter) +{ + u8 u1bTmp; + u16 u2bTmp; + u32 u4bTmp; + u8 bMacPwrCtrlOn; + u8 ret; + + + // Run LPS WL RFOFF flow + ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723A_enter_lps_flow); + if (ret == _FALSE) { + DBG_8192C(KERN_ERR "%s: run RF OFF flow fail!\n", __func__); + } + + // ==== Reset digital sequence ====== + + u1bTmp = rtw_read8(padapter, REG_MCUFWDL); + if ((u1bTmp & RAM_DL_SEL) && padapter->bFWReady) //8051 RAM code + rtl8723a_FirmwareSelfReset(padapter); + + // Reset MCU 0x2[10]=0. Suggested by Filen. 2011.01.26. by tynli. + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); + u1bTmp &= ~BIT(2); // 0x2[10], FEN_CPUEN + rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp); + + // MCUFWDL 0x80[1:0]=0 + // reset MCU ready status + rtw_write8(padapter, REG_MCUFWDL, 0); + + // ==== Reset digital sequence end ====== + + // Power down. + bMacPwrCtrlOn = _FALSE; // Disable CMD53 R/W + rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723A_card_disable_flow); + if (ret == _FALSE) { + DBG_8192C(KERN_ERR "%s: run CARD DISABLE flow fail!\n", __func__); + } + + // Reset MCU IO Wrapper, added by Roger, 2011.08.30 + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); + u1bTmp &= ~BIT(0); + rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp); + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); + u1bTmp |= BIT(0); + rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp); + + // RSV_CTRL 0x1C[7:0]=0x0E + // lock ISO/CLK/Power control register + rtw_write8(padapter, REG_RSV_CTRL, 0x0E); +} + +static u32 rtl8723as_hal_deinit(PADAPTER padapter) +{ +#ifdef CONFIG_MP_INCLUDED + if (padapter->registrypriv.mp_mode == 1) + MPT_DeInitAdapter(padapter); +#endif + +#ifdef CONFIG_BT_COEXIST + BT_HaltProcess(padapter); +#endif + + if (padapter->hw_init_completed == _TRUE) + CardDisableRTL8723ASdio(padapter); + + return _SUCCESS; +} + +static u32 rtl8723as_inirp_init(PADAPTER padapter) +{ + u32 status; + +_func_enter_; + + status = _SUCCESS; + +_func_exit_; + + return status; +} + +static u32 rtl8723as_inirp_deinit(PADAPTER padapter) +{ + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("+rtl8723as_inirp_deinit\n")); + + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("-rtl8723as_inirp_deinit\n")); + + return _SUCCESS; +} + +static void rtl8723as_init_default_value(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + + + pHalData = GET_HAL_DATA(padapter); + + rtl8723a_init_default_value(padapter); + + // interface related variable + pHalData->SdioRxFIFOCnt = 0; +} + +static void rtl8723as_interface_configure(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct registry_priv *pregistrypriv = &padapter->registrypriv; + BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; + + + pdvobjpriv->RtOutPipe[0] = WLAN_TX_HIQ_DEVICE_ID; + pdvobjpriv->RtOutPipe[1] = WLAN_TX_MIQ_DEVICE_ID; + pdvobjpriv->RtOutPipe[2] = WLAN_TX_LOQ_DEVICE_ID; + + pHalData->OutEpNumber = SDIO_MAX_TX_QUEUE; + + switch(pHalData->OutEpNumber){ + case 3: + pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ; + break; + case 2: + pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ; + break; + case 1: + pHalData->OutEpQueueSel=TX_SELE_HQ; + break; + default: + break; + } + + Hal_MappingOutPipe(padapter, pHalData->OutEpNumber); +} + +// +// Description: +// We should set Efuse cell selection to WiFi cell in default. +// +// Assumption: +// PASSIVE_LEVEL +// +// Added by Roger, 2010.11.23. +// +static void +_EfuseCellSel( + IN PADAPTER padapter + ) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + u32 value32; + + //if(INCLUDE_MULTI_FUNC_BT(padapter)) + { + value32 = rtw_read32(padapter, EFUSE_TEST); + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); + rtw_write32(padapter, EFUSE_TEST, value32); + } +} + +static VOID +_ReadRFType( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; +#else + pHalData->rf_chip = RF_6052; +#endif +} + +static void +Hal_EfuseParsePIDVID_8723AS( + IN PADAPTER pAdapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + // + // <Roger_Notes> The PID/VID info was parsed from CISTPL_MANFID Tuple in CIS area before. + // VID is parsed from Manufacture code field and PID is parsed from Manufacture information field. + // 2011.04.01. + // + +// RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM VID = 0x%4x\n", pHalData->EEPROMVID)); +// RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM PID = 0x%4x\n", pHalData->EEPROMPID)); +} + +static void +Hal_EfuseParseMACAddr_8723AS( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + u16 i, usValue; + u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x87, 0x23, 0x00}; + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + + if (AutoLoadFail) + { +// sMacAddr[5] = (u1Byte)GetRandomNumber(1, 254); + for (i=0; i<6; i++) + pEEPROM->mac_addr[i] = sMacAddr[i]; + } + else + { + //Read Permanent MAC address +#if 1 + _rtw_memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_8723AS], ETH_ALEN); +#else + for(i=0; i<6; i+=2) + { + usValue = *(u16*)&hwinfo[EEPROM_MAC_ADDR_8723S+i]; + *((u16*)(&pEEPROM->mac_addr[i])) = usValue; + } +#endif + } +// NicIFSetMacAddress(pAdapter, pAdapter->PermanentAddress); + + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, + ("Hal_EfuseParseMACAddr_8723AS: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", + pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5])); +} + +static void +Hal_EfuseParseBoardType_8723AS( + IN PADAPTER pAdapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if (!AutoLoadFail) + pHalData->BoardType = (hwinfo[RF_OPTION1_8723A] & 0xE0) >> 5; + else + pHalData->BoardType = 0; + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Board Type: 0x%2x\n", pHalData->BoardType)); +} + +static void +Hal_CustomizeByCustomerID_8723AS( + IN PADAPTER padapter + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + // For customized behavior. + if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. + pMgntInfo->CustomerID = RT_CID_819x_HP; + + // Decide CustomerID according to VID/DID or EEPROM + switch(pHalData->EEPROMCustomerID) + { + case EEPROM_CID_DEFAULT: + if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) + pMgntInfo->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) + pMgntInfo->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) + pMgntInfo->CustomerID = RT_CID_DLINK; + break; + case EEPROM_CID_WHQL: + padapter->bInHctTest = TRUE; + + pMgntInfo->bSupportTurboMode = FALSE; + pMgntInfo->bAutoTurboBy8186 = FALSE; + + pMgntInfo->PowerSaveControl.bInactivePs = FALSE; + pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePsModeBackup =FALSE; + pMgntInfo->keepAliveLevel = 0; + + padapter->bUnloadDriverwhenS3S4 = FALSE; + break; + default: + pMgntInfo->CustomerID = RT_CID_DEFAULT; + break; + + } + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt Customer ID: 0x%02x\n", pMgntInfo->CustomerID)); + + hal_CustomizedBehavior_8723U(padapter); +#endif +} + +#ifdef CONFIG_EFUSE_CONFIG_FILE +static u32 Hal_readPGDataFromConfigFile( + PADAPTER padapter) +{ + u32 i; + struct file *fp; + mm_segment_t fs; + u8 temp[3]; + loff_t pos = 0; + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8 *PROMContent = pEEPROM->efuse_eeprom_data; + + + temp[2] = 0; // add end of string '\0' + + fp = filp_open("/system/etc/wifi/wifi_efuse.map", O_RDONLY, 0); + if (IS_ERR(fp)) { + pEEPROM->bloadfile_fail_flag = _TRUE; + DBG_871X("Error, Efuse configure file doesn't exist.\n"); + return _FAIL; + } + + fs = get_fs(); + set_fs(KERNEL_DS); + + DBG_871X("Efuse configure file:\n"); + for (i=0; i<HWSET_MAX_SIZE_88E; i++) { + vfs_read(fp, temp, 2, &pos); + PROMContent[i] = simple_strtoul(temp, NULL, 16 ); + pos += 1; // Filter the space character + DBG_871X("%02X \n", PROMContent[i]); + } + DBG_871X("\n"); + set_fs(fs); + + filp_close(fp, NULL); + pEEPROM->bloadfile_fail_flag = _FALSE; + return _SUCCESS; +} + +static void +Hal_ReadMACAddrFromFile_8723AS( + PADAPTER padapter + ) +{ + u32 i; + struct file *fp; + mm_segment_t fs; + u8 source_addr[18]; + loff_t pos = 0; + u32 curtime = rtw_get_current_time(); + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8 *head, *end; + + u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; + u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + _rtw_memset(source_addr, 0, 18); + _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); + + fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); + if (IS_ERR(fp)) { + pEEPROM->bloadmac_fail_flag = _TRUE; + DBG_871X("Error, wifi mac address file doesn't exist.\n"); + } else { + fs = get_fs(); + set_fs(KERNEL_DS); + + DBG_871X("wifi mac address:\n"); + vfs_read(fp, source_addr, 18, &pos); + source_addr[17] = ':'; + + head = end = source_addr; + for (i=0; i<ETH_ALEN; i++) { + while (end && (*end != ':') ) + end++; + + if (end && (*end == ':') ) + *end = '\0'; + + pEEPROM->mac_addr[i] = simple_strtoul(head, NULL, 16 ); + + if (end) { + end++; + head = end; + } + DBG_871X("%02x \n", pEEPROM->mac_addr[i]); + } + DBG_871X("\n"); + set_fs(fs); + pEEPROM->bloadmac_fail_flag = _FALSE; + filp_close(fp, NULL); + } + + if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || + (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { + pEEPROM->mac_addr[0] = 0x00; + pEEPROM->mac_addr[1] = 0xe0; + pEEPROM->mac_addr[2] = 0x4c; + pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; + pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; + pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; + } + + DBG_871X("Hal_ReadMACAddrFromFile_8723AS: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", + pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); +} +#endif + + +static VOID +readAdapterInfo( + IN PADAPTER padapter + ) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 hwinfo[HWSET_MAX_SIZE]; + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("====> readpadapterInfo_8723S()\n")); + + // + // This part read and parse the eeprom/efuse content + // + Hal_InitPGData(padapter, hwinfo); +#ifdef CONFIG_EFUSE_CONFIG_FILE + Hal_readPGDataFromConfigFile(padapter, hwinfo); +#endif + + Hal_EfuseParseIDCode(padapter, hwinfo); + Hal_EfuseParsePIDVID_8723AS(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + + Hal_EfuseParseMACAddr_8723AS(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +#ifdef CONFIG_EFUSE_CONFIG_FILE + Hal_ReadMACAddrFromFile_8723AS(padapter); +#endif + Hal_EfuseParseTxPowerInfo_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseBTCoexistInfo_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseEEPROMVer(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + rtl8723a_EfuseParseChnlPlan(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseCustomerID(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseAntennaDiversity(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseRateIndicationOption(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseBoardType_8723AS(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseXtal_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseThermalMeter_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + + // + // The following part initialize some vars by PG info. + // + Hal_InitChannelPlan(padapter); + Hal_CustomizeByCustomerID_8723AS(padapter); + +#ifdef CONFIG_RF_GAIN_OFFSET + Hal_ReadRFGainOffset(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +#endif //CONFIG_RF_GAIN_OFFSET + + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<==== readpadapterInfo_8723S()\n")); +} + +static void _ReadPROMContent( + IN PADAPTER padapter + ) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 eeValue; + + + eeValue = rtw_read8(padapter, REG_9346CR); + // To check system boot selection. + pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; + pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, + ("%s: 9346CR=0x%02X, Boot from %s, Autoload %s\n", + __FUNCTION__, eeValue, + (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), + (pEEPROM->bautoload_fail_flag ? "Fail" : "OK"))); + +// pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; + + readAdapterInfo(padapter); +} + +static VOID +_InitOtherVariable( + IN PADAPTER Adapter + ) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + //if(Adapter->bInHctTest){ + // pMgntInfo->PowerSaveControl.bInactivePs = FALSE; + // pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; + // pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; + // pMgntInfo->keepAliveLevel = 0; + //} + + + +} + +// +// Description: +// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported. +// +// Assumption: +// PASSIVE_LEVEL (SDIO interface) +// +// +static s32 _ReadAdapterInfo8723AS(PADAPTER padapter) +{ + u32 start; + + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ReadAdapterInfo8723AS\n")); + + // before access eFuse, make sure card enable has been called + CardEnable(padapter); + + start = rtw_get_current_time(); + + _EfuseCellSel(padapter); + _ReadRFType(padapter); + _ReadPROMContent(padapter); + _InitOtherVariable(padapter); + + MSG_8192C("<==== ReadAdapterInfo8723AS in %d ms\n", rtw_get_passing_time_ms(start)); + + return _SUCCESS; +} + +static void ReadAdapterInfo8723AS(PADAPTER padapter) +{ + // Read EEPROM size before call any EEPROM function + padapter->EepromAddressSize = GetEEPROMSize8723A(padapter); + + _ReadAdapterInfo8723AS(padapter); +} + +/* + * If variable not handled here, + * some variables will be processed in SetHwReg8723A() + */ +void SetHwReg8723AS(PADAPTER padapter, u8 variable, u8 *val) +{ + //PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + +_func_enter_; + + switch (variable) + { + case HW_VAR_SET_RPWM: + rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, *val); + break; + + default: + SetHwReg8723A(padapter, variable, val); + break; + } + +_func_exit_; +} + +/* + * If variable not handled here, + * some variables will be processed in GetHwReg8723A() + */ +void GetHwReg8723AS(PADAPTER padapter, u8 variable, u8 *val) +{ + //PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + +_func_enter_; + + switch (variable) + { + case HW_VAR_GET_CPWM: + *val = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1); + break; + case HW_VAR_SYS_CLKR: + *val = rtw_read8(padapter, REG_SYS_CLKR); + break; + default: + GetHwReg8723A(padapter, variable, val); + break; + } + +_func_exit_; +} + +// +// Description: +// Query setting of specified variable. +// +u8 +GetHalDefVar8723ASDIO( + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch(eVariable) + { + case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: + *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB; + break; + case HAL_DEF_IS_SUPPORT_ANT_DIV: +#ifdef CONFIG_ANTENNA_DIVERSITY + *((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE; +#endif + break; + case HAL_DEF_CURRENT_ANTENNA: +#ifdef CONFIG_ANTENNA_DIVERSITY + *(( u8*)pValue) = pHalData->CurAntenna; +#endif + break; + case HAL_DEF_DBG_DUMP_RXPKT: + *(( u8*)pValue) = pHalData->bDumpRxPkt; + break; + case HW_VAR_MAX_RX_AMPDU_FACTOR: + *(( u32*)pValue) = MAX_AMPDU_FACTOR_64K; + break; + default: + bResult = GetHalDefVar(Adapter, eVariable, pValue); + break; + } + + return bResult; +} + +// +// Description: +// Change default setting of specified variable. +// +u8 +SetHalDefVar8723ASDIO( + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch(eVariable) + { + case HAL_DEF_DBG_DUMP_RXPKT: + pHalData->bDumpRxPkt = *(( u8*)pValue); + break; + case HAL_DEF_DBG_DM_FUNC: + { + u8 dm_func = *(( u8*)pValue); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DM_ODM_T *podmpriv = &pHalData->odmpriv; + + if(dm_func == 0){ //disable all dynamic func + podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE; + DBG_8192C("==> Disable all dynamic function...\n"); + } + else if(dm_func == 1){//disable DIG + podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG); + DBG_8192C("==> Disable DIG...\n"); + } + else if(dm_func == 2){//disable High power + podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); + } + else if(dm_func == 3){//disable tx power tracking + podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); + DBG_8192C("==> Disable tx power tracking...\n"); + } + else if(dm_func == 4){//disable BT coexistence + pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT); + } + else if(dm_func == 5){//disable antenna diversity + podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); + } + else if(dm_func == 6){//turn on all dynamic func + if(!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) + { + DIG_T *pDigTable = &podmpriv->DM_DigTable; + pDigTable->CurIGValue= rtw_read8(Adapter,0xc50); + } + pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; + podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; + DBG_8192C("==> Turn on all dynamic function...\n"); + } + } + break; + default: + bResult = SetHalDefVar(Adapter, eVariable, pValue); + break; + } + + return bResult; +} + +void UpdateHalRAMask8192CUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level) +{ + //volatile unsigned int result; + u8 init_rate=0; + u8 networkType, raid; + u32 mask,rate_bitmap; + u8 shortGIrate = _FALSE; + int supportRateNum = 0; + struct sta_info *psta; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + + + if (mac_id >= NUM_STA) //CAM_SIZE + { + return; + } + + psta = pmlmeinfo->FW_sta_info[mac_id].psta; + if(psta == NULL) + { + return; + } + + switch (mac_id) + { + case 0:// for infra mode +#ifdef CONFIG_CONCURRENT_MODE + case 2:// first station uses macid=0, second station uses macid=2 +#endif + supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); + networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf; + //pmlmeext->cur_wireless_mode = networkType; + raid = networktype_to_raid(networkType); + + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0; + + if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) + { + shortGIrate = _TRUE; + } + + break; + + case 1://for broadcast/multicast + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + if(pmlmeext->cur_wireless_mode & WIRELESS_11B) + networkType = WIRELESS_11B; + else + networkType = WIRELESS_11G; + raid = networktype_to_raid(networkType); + + mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); + + break; + + default: //for each sta in IBSS + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; + //pmlmeext->cur_wireless_mode = networkType; + raid = networktype_to_raid(networkType); + + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + + //todo: support HT in IBSS + + break; + } + //mask &=0x0fffffff; + rate_bitmap = 0x0fffffff; +#ifdef CONFIG_ODM_REFRESH_RAMASK + { + rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level); + DBG_8192C("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", + __FUNCTION__,mac_id,networkType,mask,rssi_level,rate_bitmap); + } +#endif + mask &= rate_bitmap; + mask |= ((raid<<28)&0xf0000000); + + init_rate = get_highest_rate_idx(mask)&0x3f; + + if(pHalData->fw_ractrl == _TRUE) + { + u8 arg = 0; + + //arg = (cam_idx-4)&0x1f;//MACID + arg = mac_id&0x1f;//MACID + + arg |= BIT(7); + + if (shortGIrate==_TRUE) + arg |= BIT(5); + + DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); + + rtl8192c_set_raid_cmd(padapter, mask, arg); + + } + else + { + if (shortGIrate==_TRUE) + init_rate |= BIT(6); + + rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate); + } + + + //set ra_id + psta->raid = raid; + psta->init_rate = init_rate; + + //set correct initial date rate for each mac_id + pdmpriv->INIDATA_RATE[mac_id] = init_rate; +} + +void rtl8723as_set_hal_ops(PADAPTER padapter) +{ + struct hal_ops *pHalFunc = &padapter->HalFunc; + +_func_enter_; + + +#ifdef CONFIG_CONCURRENT_MODE + if(padapter->isprimary) +#endif //CONFIG_CONCURRENT_MODE + { + //set hardware operation functions + padapter->HalData = rtw_zvmalloc(sizeof(HAL_DATA_TYPE)); + if(padapter->HalData == NULL){ + DBG_8192C("cant not alloc memory for HAL DATA \n"); + } + } + + //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE)); + padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); + + + rtl8723a_set_hal_ops(pHalFunc); + + pHalFunc->hal_init = &rtl8723as_hal_init; + pHalFunc->hal_deinit = &rtl8723as_hal_deinit; + + pHalFunc->inirp_init = &rtl8723as_inirp_init; + pHalFunc->inirp_deinit = &rtl8723as_inirp_deinit; + + pHalFunc->init_xmit_priv = &rtl8723as_init_xmit_priv; + pHalFunc->free_xmit_priv = &rtl8723as_free_xmit_priv; + + pHalFunc->init_recv_priv = &rtl8723as_init_recv_priv; + pHalFunc->free_recv_priv = &rtl8723as_free_recv_priv; + + pHalFunc->InitSwLeds = &rtl8723as_InitSwLeds; + pHalFunc->DeInitSwLeds = &rtl8723as_DeInitSwLeds; + + pHalFunc->init_default_value = &rtl8723as_init_default_value; + pHalFunc->intf_chip_configure = &rtl8723as_interface_configure; + pHalFunc->read_adapter_info = &ReadAdapterInfo8723AS; + + pHalFunc->enable_interrupt = &EnableInterrupt8723ASdio; + pHalFunc->disable_interrupt = &DisableInterrupt8723ASdio; + + pHalFunc->SetHwRegHandler = &SetHwReg8723AS; + pHalFunc->GetHwRegHandler = &GetHwReg8723AS; + pHalFunc->GetHalDefVarHandler = &GetHalDefVar8723ASDIO; + pHalFunc->SetHalDefVarHandler = &SetHalDefVar8723ASDIO; + +// pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8723ASdio; + pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192CUsb; + + pHalFunc->hal_xmit = &rtl8723as_hal_xmit; + pHalFunc->mgnt_xmit = &rtl8723as_mgnt_xmit; + pHalFunc->hal_xmitframe_enqueue = &rtl8723as_hal_xmitframe_enqueue; + +#ifdef CONFIG_HOSTAPD_MLME + pHalFunc->hostap_mgnt_xmit_entry = NULL; +// pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry; +#endif + + +_func_exit_; +} + + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/sdio_ops.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/sdio_ops.c new file mode 100755 index 000000000000..7e702c2f817f --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/sdio/sdio_ops.c @@ -0,0 +1,1645 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + *******************************************************************************/ +#define _SDIO_OPS_C_ + +#include <drv_types.h> +#include <sdio_ops.h> +#include <rtl8723a_spec.h> +#include <rtl8723a_hal.h> + +//#define SDIO_DEBUG_IO 1 + +// +// Description: +// The following mapping is for SDIO host local register space. +// +// Creadted by Roger, 2011.01.31. +// +static void HalSdioGetCmdAddr8723ASdio( + IN PADAPTER padapter, + IN u8 DeviceID, + IN u32 Addr, + OUT u32* pCmdAddr + ) +{ + switch (DeviceID) + { + case SDIO_LOCAL_DEVICE_ID: + *pCmdAddr = ((SDIO_LOCAL_DEVICE_ID << 13) | (Addr & SDIO_LOCAL_MSK)); + break; + + case WLAN_IOREG_DEVICE_ID: + *pCmdAddr = ((WLAN_IOREG_DEVICE_ID << 13) | (Addr & WLAN_IOREG_MSK)); + break; + + case WLAN_TX_HIQ_DEVICE_ID: + *pCmdAddr = ((WLAN_TX_HIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); + break; + + case WLAN_TX_MIQ_DEVICE_ID: + *pCmdAddr = ((WLAN_TX_MIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); + break; + + case WLAN_TX_LOQ_DEVICE_ID: + *pCmdAddr = ((WLAN_TX_LOQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); + break; + + case WLAN_RX0FF_DEVICE_ID: + *pCmdAddr = ((WLAN_RX0FF_DEVICE_ID << 13) | (Addr & WLAN_RX0FF_MSK)); + break; + + default: + break; + } +} + +static u8 get_deviceid(u32 addr) +{ + u8 devideId; + u16 pseudoId; + + + pseudoId = (u16)(addr >> 16); + switch (pseudoId) + { + case 0x1025: + devideId = SDIO_LOCAL_DEVICE_ID; + break; + + case 0x1026: + devideId = WLAN_IOREG_DEVICE_ID; + break; + +// case 0x1027: +// devideId = SDIO_FIRMWARE_FIFO; +// break; + + case 0x1031: + devideId = WLAN_TX_HIQ_DEVICE_ID; + break; + + case 0x1032: + devideId = WLAN_TX_MIQ_DEVICE_ID; + break; + + case 0x1033: + devideId = WLAN_TX_LOQ_DEVICE_ID; + break; + + case 0x1034: + devideId = WLAN_RX0FF_DEVICE_ID; + break; + + default: +// devideId = (u8)((addr >> 13) & 0xF); + devideId = WLAN_IOREG_DEVICE_ID; + break; + } + + return devideId; +} + +/* + * Ref: + * HalSdioGetCmdAddr8723ASdio() + */ +static u32 _cvrt2ftaddr(const u32 addr, u8 *pdeviceId, u16 *poffset) +{ + u8 deviceId; + u16 offset; + u32 ftaddr; + + + deviceId = get_deviceid(addr); + offset = 0; + + switch (deviceId) + { + case SDIO_LOCAL_DEVICE_ID: + offset = addr & SDIO_LOCAL_MSK; + break; + + case WLAN_TX_HIQ_DEVICE_ID: + case WLAN_TX_MIQ_DEVICE_ID: + case WLAN_TX_LOQ_DEVICE_ID: + offset = addr & WLAN_FIFO_MSK; + break; + + case WLAN_RX0FF_DEVICE_ID: + offset = addr & WLAN_RX0FF_MSK; + break; + + case WLAN_IOREG_DEVICE_ID: + default: + deviceId = WLAN_IOREG_DEVICE_ID; + offset = addr & WLAN_IOREG_MSK; + break; + } + ftaddr = (deviceId << 13) | offset; + + if (pdeviceId) *pdeviceId = deviceId; + if (poffset) *poffset = offset; + + return ftaddr; +} + +u8 sdio_read8(struct intf_hdl *pintfhdl, u32 addr) +{ + u32 ftaddr; + u8 val; + +_func_enter_; + ftaddr = _cvrt2ftaddr(addr, NULL, NULL); + val = sd_read8(pintfhdl, ftaddr, NULL); + +_func_exit_; + + return val; +} + +u16 sdio_read16(struct intf_hdl *pintfhdl, u32 addr) +{ + u32 ftaddr; + u16 val; + +_func_enter_; + + ftaddr = _cvrt2ftaddr(addr, NULL, NULL); + sd_cmd52_read(pintfhdl, ftaddr, 2, (u8*)&val); + val = le16_to_cpu(val); + +_func_exit_; + + return val; +} + +u32 sdio_read32(struct intf_hdl *pintfhdl, u32 addr) +{ + PADAPTER padapter; + u8 bMacPwrCtrlOn; + u8 deviceId; + u16 offset; + u32 ftaddr; + u8 shift; + u32 val; + s32 err; + +_func_enter_; + + padapter = pintfhdl->padapter; + + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + err = sd_cmd52_read(pintfhdl, ftaddr, 4, (u8*)&val); +#ifdef SDIO_DEBUG_IO + if (!err) { +#endif + val = le32_to_cpu(val); + return val; +#ifdef SDIO_DEBUG_IO + } + + DBG_8192C(KERN_ERR "%s: Mac Power off, Read FAIL(%d)! addr=0x%x\n", __func__, err, addr); + return SDIO_ERR_VAL32; +#endif + } + + // 4 bytes alignment + shift = ftaddr & 0x3; + if (shift == 0) { + val = sd_read32(pintfhdl, ftaddr, NULL); + } else { + u8 *ptmpbuf; + + ptmpbuf = (u8*)rtw_malloc(8); + if (NULL == ptmpbuf) { + DBG_8192C(KERN_ERR "%s: Allocate memory FAIL!(size=8) addr=0x%x\n", __func__, addr); + return SDIO_ERR_VAL32; + } + + ftaddr &= ~(u16)0x3; + sd_read(pintfhdl, ftaddr, 8, ptmpbuf); + _rtw_memcpy(&val, ptmpbuf+shift, 4); + val = le32_to_cpu(val); + + rtw_mfree(ptmpbuf, 8); + } + +_func_exit_; + + return val; +} + +s32 sdio_readN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pbuf) +{ + PADAPTER padapter; + u8 bMacPwrCtrlOn; + u8 deviceId; + u16 offset; + u32 ftaddr; + u8 shift; + s32 err; + +_func_enter_; + + padapter = pintfhdl->padapter; + err = 0; + + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + err = sd_cmd52_read(pintfhdl, ftaddr, cnt, pbuf); + return err; + } + + // 4 bytes alignment + shift = ftaddr & 0x3; + if (shift == 0) { + err = sd_read(pintfhdl, ftaddr, cnt, pbuf); + } else { + u8 *ptmpbuf; + u32 n; + + ftaddr &= ~(u16)0x3; + n = cnt + shift; + ptmpbuf = rtw_malloc(n); + if (NULL == ptmpbuf) return -1; + err = sd_read(pintfhdl, ftaddr, n, ptmpbuf); + if (!err) + _rtw_memcpy(pbuf, ptmpbuf+shift, cnt); + rtw_mfree(ptmpbuf, n); + } + +_func_exit_; + + return err; +} + +s32 sdio_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) +{ + u32 ftaddr; + s32 err; + +_func_enter_; + + ftaddr = _cvrt2ftaddr(addr, NULL, NULL); + sd_write8(pintfhdl, ftaddr, val, &err); + +_func_exit_; + + return err; +} + +s32 sdio_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) +{ + u32 ftaddr; + u8 shift; + s32 err; + +_func_enter_; + + ftaddr = _cvrt2ftaddr(addr, NULL, NULL); + val = cpu_to_le16(val); + err = sd_cmd52_write(pintfhdl, ftaddr, 2, (u8*)&val); + +_func_exit_; + + return err; +} + +s32 sdio_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) +{ + PADAPTER padapter; + u8 bMacPwrCtrlOn; + u8 deviceId; + u16 offset; + u32 ftaddr; + u8 shift; + s32 err; + +_func_enter_; + + padapter = pintfhdl->padapter; + err = 0; + + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + val = cpu_to_le32(val); + err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); + return err; + } + + // 4 bytes alignment + shift = ftaddr & 0x3; +#if 1 + if (shift == 0) + { + sd_write32(pintfhdl, ftaddr, val, &err); + } + else + { + val = cpu_to_le32(val); + err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); + } +#else + if (shift == 0) { + sd_write32(pintfhdl, ftaddr, val, &err); + } else { + u8 *ptmpbuf; + + ptmpbuf = (u8*)rtw_malloc(8); + if (NULL == ptmpbuf) return (-1); + + ftaddr &= ~(u16)0x3; + err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf); + if (err) { + rtw_mfree(ptmpbuf, 8); + return err; + } + val = cpu_to_le32(val); + _rtw_memcpy(ptmpbuf+shift, &val, 4); + err = sd_write(pintfhdl, ftaddr, 8, ptmpbuf); + + rtw_mfree(ptmpbuf, 8); + } +#endif + +_func_exit_; + + return err; +} + +s32 sdio_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8* pbuf) +{ + PADAPTER padapter; + u8 bMacPwrCtrlOn; + u8 deviceId; + u16 offset; + u32 ftaddr; + u8 shift; + s32 err; + +_func_enter_; + + padapter = pintfhdl->padapter; + err = 0; + + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + err = sd_cmd52_write(pintfhdl, ftaddr, cnt, pbuf); + return err; + } + + shift = ftaddr & 0x3; + if (shift == 0) { + err = sd_write(pintfhdl, ftaddr, cnt, pbuf); + } else { + u8 *ptmpbuf; + u32 n; + + ftaddr &= ~(u16)0x3; + n = cnt + shift; + ptmpbuf = rtw_malloc(n); + if (NULL == ptmpbuf) return -1; + err = sd_read(pintfhdl, ftaddr, 4, ptmpbuf); + if (err) { + rtw_mfree(ptmpbuf, n); + return err; + } + _rtw_memcpy(ptmpbuf+shift, pbuf, cnt); + err = sd_write(pintfhdl, ftaddr, n, ptmpbuf); + rtw_mfree(ptmpbuf, n); + } + +_func_exit_; + + return err; +} + +void sdio_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) +{ + s32 err; + +_func_enter_; + + err = sdio_readN(pintfhdl, addr, cnt, rmem); + +_func_exit_; +} + +void sdio_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) +{ +_func_enter_; + + sdio_writeN(pintfhdl, addr, cnt, wmem); + +_func_exit_; +} + +/* + * Description: + * Read from RX FIFO + * Round read size to block size, + * and make sure data transfer will be done in one command. + * + * Parameters: + * pintfhdl a pointer of intf_hdl + * addr port ID + * cnt size to read + * rmem address to put data + * + * Return: + * _SUCCESS(1) Success + * _FAIL(0) Fail + */ +static u32 sdio_read_port( + struct intf_hdl *pintfhdl, + u32 addr, + u32 cnt, + u8 *mem) +{ + PADAPTER padapter; + PSDIO_DATA psdio; + PHAL_DATA_TYPE phal; + u32 oldcnt; +#ifdef SDIO_DYNAMIC_ALLOC_MEM + u8 *oldmem; +#endif + s32 err; + + + padapter = pintfhdl->padapter; + psdio = &adapter_to_dvobj(padapter)->intf_data; + phal = GET_HAL_DATA(padapter); + + HalSdioGetCmdAddr8723ASdio(padapter, addr, phal->SdioRxFIFOCnt++, &addr); + + oldcnt = cnt; + if (cnt > psdio->block_transfer_len) + cnt = _RND(cnt, psdio->block_transfer_len); +// cnt = sdio_align_size(cnt); + + if (oldcnt != cnt) { +#ifdef SDIO_DYNAMIC_ALLOC_MEM + oldmem = mem; + mem = rtw_malloc(cnt); + if (mem == NULL) { + DBG_8192C(KERN_WARNING "%s: allocate memory %d bytes fail!\n", __func__, cnt); + mem = oldmem; + oldmem == NULL; + } +#else + // in this case, caller should gurante the buffer is big enough + // to receive data after alignment +#endif + } + + err = _sd_read(pintfhdl, addr, cnt, mem); + +#ifdef SDIO_DYNAMIC_ALLOC_MEM + if ((oldcnt != cnt) && (oldmem)) { + _rtw_memcpy(oldmem, mem, oldcnt); + rtw_mfree(mem, cnt); + } +#endif + + if (err) return _FAIL; + return _SUCCESS; +} + +/* + * Description: + * Write to TX FIFO + * Align write size block size, + * and make sure data could be written in one command. + * + * Parameters: + * pintfhdl a pointer of intf_hdl + * addr port ID + * cnt size to write + * wmem data pointer to write + * + * Return: + * _SUCCESS(1) Success + * _FAIL(0) Fail + */ +static u32 sdio_write_port( + struct intf_hdl *pintfhdl, + u32 addr, + u32 cnt, + u8 *mem) +{ + PADAPTER padapter; + PSDIO_DATA psdio; + s32 err; + struct xmit_buf *xmitbuf = (struct xmit_buf *)mem; + + padapter = pintfhdl->padapter; + psdio = &adapter_to_dvobj(padapter)->intf_data; + + if(padapter->hw_init_completed == _FALSE) + { + DBG_871X("%s [addr=0x%x cnt=%d] padapter->hw_init_completed == _FALSE \n",__func__,addr,cnt); + return _FAIL; + } + + cnt = _RND4(cnt); + HalSdioGetCmdAddr8723ASdio(padapter, addr, cnt >> 2, &addr); + + if (cnt > psdio->block_transfer_len) + cnt = _RND(cnt, psdio->block_transfer_len); +// cnt = sdio_align_size(cnt); + + err = sd_write(pintfhdl, addr, cnt, xmitbuf->pdata); + + rtw_sctx_done_err(&xmitbuf->sctx, + err ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); + + if (err) return _FAIL; + return _SUCCESS; +} + +void sdio_set_intf_ops(struct _io_ops *pops) +{ +_func_enter_; + + pops->_read8 = &sdio_read8; + pops->_read16 = &sdio_read16; + pops->_read32 = &sdio_read32; + pops->_read_mem = &sdio_read_mem; + pops->_read_port = &sdio_read_port; + + pops->_write8 = &sdio_write8; + pops->_write16 = &sdio_write16; + pops->_write32 = &sdio_write32; + pops->_writeN = &sdio_writeN; + pops->_write_mem = &sdio_write_mem; + pops->_write_port = &sdio_write_port; + +_func_exit_; +} + +/* + * Todo: align address to 4 bytes. + */ +s32 _sdio_local_read( + PADAPTER padapter, + u32 addr, + u32 cnt, + u8 *pbuf) +{ + struct intf_hdl * pintfhdl; + u8 bMacPwrCtrlOn; + s32 err; + u8 *ptmpbuf; + u32 n; + + pintfhdl=&padapter->iopriv.intf; + + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (_FALSE == bMacPwrCtrlOn) + { + err = _sd_cmd52_read(pintfhdl, addr, cnt, pbuf); + return err; + } + + n = RND4(cnt); + ptmpbuf = (u8*)rtw_malloc(n); + if (!ptmpbuf) + return (-1); + + err = _sd_read(pintfhdl, addr, n, ptmpbuf); + if (!err) + _rtw_memcpy(pbuf, ptmpbuf, cnt); + + if (ptmpbuf) + rtw_mfree(ptmpbuf, n); + + return err; +} + +/* + * Todo: align address to 4 bytes. + */ +s32 sdio_local_read( + PADAPTER padapter, + u32 addr, + u32 cnt, + u8 *pbuf) +{ + struct intf_hdl * pintfhdl; + u8 bMacPwrCtrlOn; + s32 err; + u8 *ptmpbuf; + u32 n; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + err = sd_cmd52_read(pintfhdl, addr, cnt, pbuf); + return err; + } + + n = RND4(cnt); + ptmpbuf = (u8*)rtw_malloc(n); + if (!ptmpbuf) + return (-1); + + err = sd_read(pintfhdl, addr, n, ptmpbuf); + if (!err) + _rtw_memcpy(pbuf, ptmpbuf, cnt); + + if (ptmpbuf) + rtw_mfree(ptmpbuf, n); + + return err; +} + +/* + * Todo: align address to 4 bytes. + */ +s32 _sdio_local_write( + PADAPTER padapter, + u32 addr, + u32 cnt, + u8 *pbuf) +{ + struct intf_hdl * pintfhdl; + u8 bMacPwrCtrlOn; + s32 err; + u8 *ptmpbuf; + + if(addr & 0x3) + DBG_8192C("%s, address must be 4 bytes alignment\n", __FUNCTION__); + + if(cnt & 0x3) + DBG_8192C("%s, size must be the multiple of 4 \n", __FUNCTION__); + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + err = _sd_cmd52_write(pintfhdl, addr, cnt, pbuf); + return err; + } + + ptmpbuf = (u8*)rtw_malloc(cnt); + if (!ptmpbuf) + return (-1); + + _rtw_memcpy(ptmpbuf, pbuf, cnt); + + err = _sd_write(pintfhdl, addr, cnt, ptmpbuf); + + if (ptmpbuf) + rtw_mfree(ptmpbuf, cnt); + + return err; +} + +/* + * Todo: align address to 4 bytes. + */ +s32 sdio_local_write( + PADAPTER padapter, + u32 addr, + u32 cnt, + u8 *pbuf) +{ + struct intf_hdl * pintfhdl; + u8 bMacPwrCtrlOn; + s32 err; + u8 *ptmpbuf; + + if(addr & 0x3) + DBG_8192C("%s, address must be 4 bytes alignment\n", __FUNCTION__); + + if(cnt & 0x3) + DBG_8192C("%s, size must be the multiple of 4 \n", __FUNCTION__); + + pintfhdl=&padapter->iopriv.intf; + + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + err = sd_cmd52_write(pintfhdl, addr, cnt, pbuf); + return err; + } + + err = sd_write(pintfhdl, addr, cnt, pbuf); + + return err; +} + +u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr) +{ + struct intf_hdl * pintfhdl; + u8 val = 0; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + sd_cmd52_read(pintfhdl, addr, 1, &val); + + return val; +} + +u16 SdioLocalCmd52Read2Byte(PADAPTER padapter, u32 addr) +{ + struct intf_hdl * pintfhdl; + u16 val = 0; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + sd_cmd52_read(pintfhdl, addr, 2, (u8*)&val); + + val = le16_to_cpu(val); + + return val; +} + +u32 SdioLocalCmd52Read4Byte(PADAPTER padapter, u32 addr) +{ + struct intf_hdl * pintfhdl; + u32 val = 0; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + sd_cmd52_read(pintfhdl, addr, 4, (u8*)&val); + + val = le32_to_cpu(val); + + return val; +} + +u32 SdioLocalCmd53Read4Byte(PADAPTER padapter, u32 addr) +{ + struct intf_hdl * pintfhdl; + u8 bMacPwrCtrlOn; + u32 val=0; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) +#ifdef CONFIG_LPS_LCLK + || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) +#endif + ) + { + sd_cmd52_read(pintfhdl, addr, 4, (u8*)&val); + val = le32_to_cpu(val); + } + else + val = sd_read32(pintfhdl, addr, NULL); + + return val; +} + +void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v) +{ + struct intf_hdl * pintfhdl; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + sd_cmd52_write(pintfhdl, addr, 1, &v); +} + +void SdioLocalCmd52Write2Byte(PADAPTER padapter, u32 addr, u16 v) +{ + struct intf_hdl * pintfhdl; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + v = cpu_to_le16(v); + sd_cmd52_write(pintfhdl, addr, 2, (u8*)&v); +} + +void SdioLocalCmd52Write4Byte(PADAPTER padapter, u32 addr, u32 v) +{ + struct intf_hdl * pintfhdl; + + pintfhdl=&padapter->iopriv.intf; + HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + v = cpu_to_le32(v); + sd_cmd52_write(pintfhdl, addr, 4, (u8*)&v); +} + +#if 0 +void +DumpLoggedInterruptHistory8723Sdio( + PADAPTER padapter +) +{ + HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); + u4Byte DebugLevel = DBG_LOUD; + + if (DBG_Var.DbgPrintIsr == 0) + return; + + DBG_ChkDrvResource(padapter); + + + if(pHalData->InterruptLog.nISR_RX_REQUEST) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RX_REQUEST[%ld]\t\n", pHalData->InterruptLog.nISR_RX_REQUEST)); + + if(pHalData->InterruptLog.nISR_AVAL) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# AVAL[%ld]\t\n", pHalData->InterruptLog.nISR_AVAL)); + + if(pHalData->InterruptLog.nISR_TXERR) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXERR[%ld]\t\n", pHalData->InterruptLog.nISR_TXERR)); + + if(pHalData->InterruptLog.nISR_RXERR) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RXERR[%ld]\t\n", pHalData->InterruptLog.nISR_RXERR)); + + if(pHalData->InterruptLog.nISR_TXFOVW) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXFOVW[%ld]\t\n", pHalData->InterruptLog.nISR_TXFOVW)); + + if(pHalData->InterruptLog.nISR_RXFOVW) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RXFOVW[%ld]\t\n", pHalData->InterruptLog.nISR_RXFOVW)); + + if(pHalData->InterruptLog.nISR_TXBCNOK) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXBCNOK[%ld]\t\n", pHalData->InterruptLog.nISR_TXBCNOK)); + + if(pHalData->InterruptLog.nISR_TXBCNERR) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXBCNERR[%ld]\t\n", pHalData->InterruptLog.nISR_TXBCNERR)); + + if(pHalData->InterruptLog.nISR_BCNERLY_INT) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# BCNERLY_INT[%ld]\t\n", pHalData->InterruptLog.nISR_BCNERLY_INT)); + + if(pHalData->InterruptLog.nISR_C2HCMD) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# C2HCMD[%ld]\t\n", pHalData->InterruptLog.nISR_C2HCMD)); + + if(pHalData->InterruptLog.nISR_CPWM1) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CPWM1L[%ld]\t\n", pHalData->InterruptLog.nISR_CPWM1)); + + if(pHalData->InterruptLog.nISR_CPWM2) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CPWM2[%ld]\t\n", pHalData->InterruptLog.nISR_CPWM2)); + + if(pHalData->InterruptLog.nISR_HSISR_IND) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# HSISR_IND[%ld]\t\n", pHalData->InterruptLog.nISR_HSISR_IND)); + + if(pHalData->InterruptLog.nISR_GTINT3_IND) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# GTINT3_IND[%ld]\t\n", pHalData->InterruptLog.nISR_GTINT3_IND)); + + if(pHalData->InterruptLog.nISR_GTINT4_IND) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# GTINT4_IND[%ld]\t\n", pHalData->InterruptLog.nISR_GTINT4_IND)); + + if(pHalData->InterruptLog.nISR_PSTIMEOUT) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# PSTIMEOUT[%ld]\t\n", pHalData->InterruptLog.nISR_PSTIMEOUT)); + + if(pHalData->InterruptLog.nISR_OCPINT) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# OCPINT[%ld]\t\n", pHalData->InterruptLog.nISR_OCPINT)); + + if(pHalData->InterruptLog.nISR_ATIMEND) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# ATIMEND[%ld]\t\n", pHalData->InterruptLog.nISR_ATIMEND)); + + if(pHalData->InterruptLog.nISR_ATIMEND_E) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# ATIMEND_E[%ld]\t\n", pHalData->InterruptLog.nISR_ATIMEND_E)); + + if(pHalData->InterruptLog.nISR_CTWEND) + RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CTWEND[%ld]\t\n", pHalData->InterruptLog.nISR_CTWEND)); +} + +void +LogInterruptHistory8723Sdio( + PADAPTER padapter, + PRT_ISR_CONTENT pIsrContent +) +{ + HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); + + if((pHalData->IntrMask[0] & SDIO_HIMR_RX_REQUEST_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_RX_REQUEST)) + pHalData->InterruptLog.nISR_RX_REQUEST ++; + if((pHalData->IntrMask[0] & SDIO_HIMR_AVAL_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_AVAL)) + pHalData->InterruptLog.nISR_AVAL++; + if((pHalData->IntrMask[0] & SDIO_HIMR_TXERR_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_TXERR)) + pHalData->InterruptLog.nISR_TXERR++; + if((pHalData->IntrMask[0] & SDIO_HIMR_RXERR_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_RXERR)) + pHalData->InterruptLog.nISR_RXERR++; + if((pHalData->IntrMask[0] & SDIO_HIMR_TXFOVW_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_TXFOVW)) + pHalData->InterruptLog.nISR_TXFOVW++; + if((pHalData->IntrMask[0] & SDIO_HIMR_RXFOVW_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_RXFOVW)) + pHalData->InterruptLog.nISR_RXFOVW++; + if((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNOK_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNOK)) + pHalData->InterruptLog.nISR_TXBCNOK++; + if((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNERR_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNERR)) + pHalData->InterruptLog.nISR_TXBCNERR++; + if((pHalData->IntrMask[0] & SDIO_HIMR_BCNERLY_INT_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_BCNERLY_INT)) + pHalData->InterruptLog.nISR_BCNERLY_INT ++; + if((pHalData->IntrMask[0] & SDIO_HIMR_C2HCMD_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_C2HCMD)) + pHalData->InterruptLog.nISR_C2HCMD++; + if((pHalData->IntrMask[0] & SDIO_HIMR_CPWM1_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_CPWM1)) + pHalData->InterruptLog.nISR_CPWM1++; + if((pHalData->IntrMask[0] & SDIO_HIMR_CPWM2_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_CPWM2)) + pHalData->InterruptLog.nISR_CPWM2++; + if((pHalData->IntrMask[0] & SDIO_HIMR_HSISR_IND_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_HSISR_IND)) + pHalData->InterruptLog.nISR_HSISR_IND++; + if((pHalData->IntrMask[0] & SDIO_HIMR_GTINT3_IND_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_GTINT3_IND)) + pHalData->InterruptLog.nISR_GTINT3_IND++; + if((pHalData->IntrMask[0] & SDIO_HIMR_GTINT4_IND_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_GTINT4_IND)) + pHalData->InterruptLog.nISR_GTINT4_IND++; + if((pHalData->IntrMask[0] & SDIO_HIMR_PSTIMEOUT_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_PSTIMEOUT)) + pHalData->InterruptLog.nISR_PSTIMEOUT++; + if((pHalData->IntrMask[0] & SDIO_HIMR_OCPINT_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_OCPINT)) + pHalData->InterruptLog.nISR_OCPINT++; + if((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND)) + pHalData->InterruptLog.nISR_ATIMEND++; + if((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_E_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND_E)) + pHalData->InterruptLog.nISR_ATIMEND_E++; + if((pHalData->IntrMask[0] & SDIO_HIMR_CTWEND_MSK) && + (pIsrContent->IntArray[0] & SDIO_HISR_CTWEND)) + pHalData->InterruptLog.nISR_CTWEND++; + +} + +void +DumpHardwareProfile8723Sdio( + IN PADAPTER padapter +) +{ + DumpLoggedInterruptHistory8723Sdio(padapter); +} +#endif + +// +// Description: +// Initialize SDIO Host Interrupt Mask configuration variables for future use. +// +// Assumption: +// Using SDIO Local register ONLY for configuration. +// +// Created by Roger, 2011.02.11. +// +void InitInterrupt8723ASdio(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + + + pHalData = GET_HAL_DATA(padapter); + pHalData->sdio_himr = (u32)( \ + SDIO_HIMR_RX_REQUEST_MSK | +// SDIO_HIMR_AVAL_MSK | +// SDIO_HIMR_TXERR_MSK | +// SDIO_HIMR_RXERR_MSK | +// SDIO_HIMR_TXFOVW_MSK | +// SDIO_HIMR_RXFOVW_MSK | +// SDIO_HIMR_TXBCNOK_MSK | +// SDIO_HIMR_TXBCNERR_MSK | +// SDIO_HIMR_BCNERLY_INT_MSK | +#ifndef CONFIG_DETECT_C2H_BY_POLLING +#if defined( CONFIG_BT_COEXIST) || defined(CONFIG_MP_INCLUDED) + SDIO_HIMR_C2HCMD_MSK | +#endif +#endif +#ifndef CONFIG_DETECT_CPWM_BY_POLLING +#ifdef CONFIG_LPS_LCLK + SDIO_HIMR_CPWM1_MSK | +// SDIO_HIMR_CPWM2_MSK | +#endif +#endif +// SDIO_HIMR_HSISR_IND_MSK | +// SDIO_HIMR_GTINT3_IND_MSK | +// SDIO_HIMR_GTINT4_IND_MSK | +// SDIO_HIMR_PSTIMEOUT_MSK | +// SDIO_HIMR_OCPINT_MSK | +// SDIO_HIMR_ATIMEND_MSK | +// SDIO_HIMR_ATIMEND_E_MSK | +// SDIO_HIMR_CTWEND_MSK | + 0); +} + +// +// Description: +// Initialize System Host Interrupt Mask configuration variables for future use. +// +// Created by Roger, 2011.08.03. +// +void InitSysInterrupt8723ASdio(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + + + pHalData = GET_HAL_DATA(padapter); + + pHalData->SysIntrMask = ( \ +// HSIMR_GPIO12_0_INT_EN | +// HSIMR_SPS_OCP_INT_EN | +// HSIMR_RON_INT_EN | +// HSIMR_PDNINT_EN | +// HSIMR_GPIO9_INT_EN | + 0); +} + +// +// Description: +// Clear corresponding SDIO Host ISR interrupt service. +// +// Assumption: +// Using SDIO Local register ONLY for configuration. +// +// Created by Roger, 2011.02.11. +// +void ClearInterrupt8723ASdio(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u8 *clear; + + + if (_TRUE == padapter->bSurpriseRemoved) + return; + + pHalData = GET_HAL_DATA(padapter); + clear = rtw_zmalloc(4); + + // Clear corresponding HISR Content if needed + *(u32*)clear = cpu_to_le32(pHalData->sdio_hisr & MASK_SDIO_HISR_CLEAR); + if (*(u32*)clear) + { + // Perform write one clear operation + sdio_local_write(padapter, SDIO_REG_HISR, 4, clear); + } + + rtw_mfree(clear, 4); +} + +// +// Description: +// Clear corresponding system Host ISR interrupt service. +// +// +// Created by Roger, 2011.02.11. +// +void ClearSysInterrupt8723ASdio(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u32 clear; + + + if (_TRUE == padapter->bSurpriseRemoved) + return; + + pHalData = GET_HAL_DATA(padapter); + + // Clear corresponding HISR Content if needed + clear = pHalData->SysIntrStatus & MASK_HSISR_CLEAR; + if (clear) + { + // Perform write one clear operation + rtw_write32(padapter, REG_HSISR, clear); + } +} + +// +// Description: +// Enalbe SDIO Host Interrupt Mask configuration on SDIO local domain. +// +// Assumption: +// 1. Using SDIO Local register ONLY for configuration. +// 2. PASSIVE LEVEL +// +// Created by Roger, 2011.02.11. +// +void EnableInterrupt8723ASdio(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + u32 himr; + +#ifdef CONFIG_CONCURRENT_MODE + if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ + padapter = padapter->pbuddy_adapter; + } +#endif + pHalData = GET_HAL_DATA(padapter); + + himr = cpu_to_le32(pHalData->sdio_himr); + sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); + + RT_TRACE(_module_hci_ops_c_, _drv_notice_, + ("%s: enable SDIO HIMR=0x%08X\n", __FUNCTION__, pHalData->sdio_himr)); + + // Update current system IMR settings + himr = rtw_read32(padapter, REG_HSIMR); + rtw_write32(padapter, REG_HSIMR, himr|pHalData->SysIntrMask); + + RT_TRACE(_module_hci_ops_c_, _drv_notice_, + ("%s: enable HSIMR=0x%08X\n", __FUNCTION__, pHalData->SysIntrMask)); + + // + // <Roger_Notes> There are some C2H CMDs have been sent before system interrupt is enabled, e.g., C2H, CPWM. + // So we need to clear all C2H events that FW has notified, otherwise FW won't schedule any commands anymore. + // 2011.10.19. + // + rtw_write8(padapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); +} + +// +// Description: +// Disable SDIO Host IMR configuration to mask unnecessary interrupt service. +// +// Assumption: +// Using SDIO Local register ONLY for configuration. +// +// Created by Roger, 2011.02.11. +// +void DisableInterrupt8723ASdio(PADAPTER padapter) +{ + u32 himr; + +#ifdef CONFIG_CONCURRENT_MODE + if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ + padapter = padapter->pbuddy_adapter; + } +#endif + himr = cpu_to_le32(SDIO_HIMR_DISABLED); + sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); + +} + +// +// Description: +// Update SDIO Host Interrupt Mask configuration on SDIO local domain. +// +// Assumption: +// 1. Using SDIO Local register ONLY for configuration. +// 2. PASSIVE LEVEL +// +// Created by Roger, 2011.02.11. +// +void UpdateInterruptMask8723ASdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR) +{ + HAL_DATA_TYPE *pHalData; + +#ifdef CONFIG_CONCURRENT_MODE + if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ + padapter = padapter->pbuddy_adapter; + } +#endif + pHalData = GET_HAL_DATA(padapter); + + if (AddMSR) + pHalData->sdio_himr |= AddMSR; + + if (RemoveMSR) + pHalData->sdio_himr &= (~RemoveMSR); + + DisableInterrupt8723ASdio(padapter); + EnableInterrupt8723ASdio(padapter); +} + +#ifdef CONFIG_MAC_LOOPBACK_DRIVER +static void sd_recv_loopback(PADAPTER padapter, u32 size) +{ + PLOOPBACKDATA ploopback; + u32 readsize, allocsize; + u8 *preadbuf; + + + readsize = size; + DBG_8192C("%s: read size=%d\n", __func__, readsize); + allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len); + + ploopback = padapter->ploopback; + if (ploopback) { + ploopback->rxsize = readsize; + preadbuf = ploopback->rxbuf; + } + else { + preadbuf = rtw_malloc(allocsize); + if (preadbuf == NULL) { + DBG_8192C("%s: malloc fail size=%d\n", __func__, allocsize); + return; + } + } + +// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); + sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); + + if (ploopback) + _rtw_up_sema(&ploopback->sema); + else { + u32 i; + + DBG_8192C("%s: drop pkt\n", __func__); + for (i = 0; i < readsize; i+=4) { + DBG_8192C("%08X", *(u32*)(preadbuf + i)); + if ((i+4) & 0x1F) printk(" "); + else printk("\n"); + } + printk("\n"); + rtw_mfree(preadbuf, allocsize); + } +} +#endif // CONFIG_MAC_LOOPBACK_DRIVER + +#ifdef CONFIG_SDIO_RX_COPY +static struct recv_buf* sd_recv_rxfifo(PADAPTER padapter, u32 size) +{ + u32 readsize, ret; + u8 *preadbuf; + struct recv_priv *precvpriv; + struct recv_buf *precvbuf; + + + readsize = size; + + //3 1. alloc recvbuf + precvpriv = &padapter->recvpriv; + precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); + if (precvbuf == NULL) { + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc recvbuf FAIL!\n", __FUNCTION__)); + return NULL; + } + + //3 2. alloc skb + if (precvbuf->pskb == NULL) { + SIZE_PTR tmpaddr=0; + SIZE_PTR alignment=0; + + precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); + + if(precvbuf->pskb) + { + precvbuf->pskb->dev = padapter->pnetdev; + + tmpaddr = (SIZE_PTR)precvbuf->pskb->data; + alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); + skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); + } + + if (precvbuf->pskb == NULL) { + DBG_871X("%s: alloc_skb fail! read=%d\n", __FUNCTION__, readsize); + return NULL; + } + } + + //3 3. read data from rxfifo + preadbuf = precvbuf->pskb->data; +// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); + ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); + if (ret == _FAIL) { + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n", __FUNCTION__)); + return NULL; + } + + + //3 4. init recvbuf + precvbuf->len = readsize; + precvbuf->phead = precvbuf->pskb->head; + precvbuf->pdata = precvbuf->pskb->data; + skb_set_tail_pointer(precvbuf->pskb, readsize); + precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); + precvbuf->pend = skb_end_pointer(precvbuf->pskb); + + return precvbuf; +} +#else +static struct recv_buf* sd_recv_rxfifo(PADAPTER padapter, u32 size) +{ + u32 readsize, allocsize, ret; + u8 *preadbuf; + _pkt *ppkt; + struct recv_priv *precvpriv; + struct recv_buf *precvbuf; + + + readsize = size; + + //3 1. alloc skb + // align to block size + allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len); + + ppkt = rtw_skb_alloc(allocsize); + + if (ppkt == NULL) { + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc_skb fail! alloc=%d read=%d\n", __FUNCTION__, allocsize, readsize)); + return NULL; + } + + //3 2. read data from rxfifo + preadbuf = skb_put(ppkt, readsize); +// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); + ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); + if (ret == _FAIL) { + rtw_skb_free(ppkt); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n", __FUNCTION__)); + return NULL; + } + + //3 3. alloc recvbuf + precvpriv = &padapter->recvpriv; + precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); + if (precvbuf == NULL) { + rtw_skb_free(ppkt); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc recvbuf FAIL!\n", __FUNCTION__)); + return NULL; + } + + //3 4. init recvbuf + precvbuf->pskb = ppkt; + + precvbuf->len = ppkt->len; + + precvbuf->phead = ppkt->head; + precvbuf->pdata = ppkt->data; + precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); + precvbuf->pend = skb_end_pointer(precvbuf->pskb); + + return precvbuf; +} +#endif + +static void sd_rxhandler(PADAPTER padapter, struct recv_buf *precvbuf) +{ +#ifdef CONFIG_DIRECT_RECV + rtl8723as_recv(padapter, precvbuf); +#else //!CONFIG_DIRECT_RECV + struct recv_priv *precvpriv; + _queue *ppending_queue; + + + precvpriv = &padapter->recvpriv; + ppending_queue = &precvpriv->recv_buf_pending_queue; + + //3 1. enqueue recvbuf + rtw_enqueue_recvbuf(precvbuf, ppending_queue); + + //3 2. schedule tasklet +#ifdef PLATFORM_LINUX + tasklet_schedule(&precvpriv->recv_tasklet); +#endif +#endif //!CONFIG_DIRECT_RECV + +} + +void sd_int_dpc(PADAPTER padapter) +{ + HAL_DATA_TYPE *phal; + + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct intf_hdl * pintfhdl=&padapter->iopriv.intf; + phal = GET_HAL_DATA(padapter); + + if (phal->sdio_hisr & SDIO_HISR_CPWM1) + { + struct reportpwrstate_parm report; + +#ifdef CONFIG_LPS_RPWM_TIMER + u8 bcancelled; + _cancel_timer(&(adapter_to_pwrctl(padapter)->pwr_rpwm_timer), &bcancelled); +#endif // CONFIG_LPS_RPWM_TIMER + + _sdio_local_read(padapter, SDIO_REG_HCPWM1, 1, &report.state); + +#ifdef CONFIG_LPS_LCLK + //cpwm_int_hdl(padapter, &report); + _set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event)); +#endif + } + + if (phal->sdio_hisr & SDIO_HISR_TXERR) + { + u8 *status; + u32 addr; + + status = rtw_malloc(4); + if (status) + { + addr = REG_TXDMA_STATUS; + HalSdioGetCmdAddr8723ASdio(padapter, WLAN_IOREG_DEVICE_ID, addr, &addr); + _sd_read(pintfhdl, addr, 4, status); + _sd_write(pintfhdl, addr, 4, status); + DBG_8192C("%s: SDIO_HISR_TXERR (0x%08x)\n", __func__, le32_to_cpu(*(u32*)status)); + rtw_mfree(status, 4); + } else { + DBG_8192C("%s: SDIO_HISR_TXERR, but can't allocate memory to read status!\n", __func__); + } + } + + if (phal->sdio_hisr & SDIO_HISR_TXBCNOK) + { + DBG_8192C("%s: SDIO_HISR_TXBCNOK\n", __func__); + } + + if (phal->sdio_hisr & SDIO_HISR_TXBCNERR) + { + DBG_8192C("%s: SDIO_HISR_TXBCNERR\n", __func__); + } + + if (phal->sdio_hisr & SDIO_HISR_C2HCMD) + { + struct c2h_evt_hdr *c2h_evt; + + if ((c2h_evt = (struct c2h_evt_hdr *)rtw_zmalloc(16)) != NULL) { + if (c2h_evt_read(padapter, (u8 *)c2h_evt) == _SUCCESS) { + if (c2h_id_filter_ccx_8723a(c2h_evt->id)) { + /* Handle CCX report here */ + rtw_hal_c2h_handler(padapter, c2h_evt); + rtw_mfree((u8*)c2h_evt, 16); + } else { + rtw_c2h_wk_cmd(padapter, (u8 *)c2h_evt); + } + } + else + { + rtw_mfree((u8*)c2h_evt, 16); + } + } else { + /* Error handling for malloc fail */ + if (rtw_cbuf_push(padapter->evtpriv.c2h_queue, (void*)NULL) != _SUCCESS) + DBG_871X("%s rtw_cbuf_push fail\n", __func__); + _set_workitem(&padapter->evtpriv.c2h_wk); + } + } + + if (phal->sdio_hisr & SDIO_HISR_RX_REQUEST) + { + struct recv_buf *precvbuf; + u16 val=0; + +// DBG_8192C("%s: RX Request, size=%d\n", __func__, phal->SdioRxFIFOSize); + phal->sdio_hisr ^= SDIO_HISR_RX_REQUEST; + do{ + if (phal->SdioRxFIFOSize == 0) + { + _sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 2, (u8*)&val); + phal->SdioRxFIFOSize = le16_to_cpu(val); + DBG_8192C("%s: RX_REQUEST, read RXFIFOsize again size=%d\n", __func__, phal->SdioRxFIFOSize); + } + + if (phal->SdioRxFIFOSize != 0) + { +#ifdef CONFIG_MAC_LOOPBACK_DRIVER + sd_recv_loopback(padapter, phal->SdioRxFIFOSize); +#else + precvbuf = sd_recv_rxfifo(padapter, phal->SdioRxFIFOSize); + if (precvbuf) + sd_rxhandler(padapter, precvbuf); + else + break; +#endif + } + _sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 2, (u8*)&val); + phal->SdioRxFIFOSize = le16_to_cpu(val); + }while(phal->SdioRxFIFOSize !=0); + } +} + +void sd_int_hdl(PADAPTER padapter) +{ + u8 data[6]; + HAL_DATA_TYPE *phal; + + + if ((padapter->bDriverStopped == _TRUE) || + (padapter->bSurpriseRemoved == _TRUE)) + return; + + phal = GET_HAL_DATA(padapter); + + _sdio_local_read(padapter, SDIO_REG_HISR, 6, data); + phal->sdio_hisr = le32_to_cpu(*(u32*)data); + phal->SdioRxFIFOSize = le16_to_cpu(*(u16*)&data[4]); + + if (phal->sdio_hisr & phal->sdio_himr) + { + u32 v32; + + phal->sdio_hisr &= phal->sdio_himr; + + // clear HISR + v32 = phal->sdio_hisr & MASK_SDIO_HISR_CLEAR; + if (v32) { + v32 = cpu_to_le32(v32); + _sdio_local_write(padapter, SDIO_REG_HISR, 4, (u8*)&v32); + } + + sd_int_dpc(padapter); + } else { + RT_TRACE(_module_hci_ops_c_, _drv_err_, + ("%s: HISR(0x%08x) and HIMR(0x%08x) not match!\n", + __FUNCTION__, phal->sdio_hisr, phal->sdio_himr)); + } +} + +// +// Description: +// Query SDIO Local register to query current the number of Free TxPacketBuffer page. +// +// Assumption: +// 1. Running at PASSIVE_LEVEL +// 2. RT_TX_SPINLOCK is NOT acquired. +// +// Created by Roger, 2011.01.28. +// +u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter) +{ + PHAL_DATA_TYPE phal; + u32 NumOfFreePage; +// _irqL irql; + + + phal = GET_HAL_DATA(padapter); + + NumOfFreePage = SdioLocalCmd53Read4Byte(padapter, SDIO_REG_FREE_TXPG); + +// _enter_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); + _rtw_memcpy(phal->SdioTxFIFOFreePage, &NumOfFreePage, 4); + RT_TRACE(_module_hci_ops_c_, _drv_notice_, + ("%s: Free page for HIQ(%#x),MIDQ(%#x),LOWQ(%#x),PUBQ(%#x)\n", + __FUNCTION__, + phal->SdioTxFIFOFreePage[HI_QUEUE_IDX], + phal->SdioTxFIFOFreePage[MID_QUEUE_IDX], + phal->SdioTxFIFOFreePage[LOW_QUEUE_IDX], + phal->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX])); +// _exit_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); + + return _TRUE; +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_led.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_led.c new file mode 100755 index 000000000000..a7d28d79b01b --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_led.c @@ -0,0 +1,168 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "drv_types.h" +#include "rtl8723a_hal.h" + +//================================================================================ +// LED object. +//================================================================================ + + +//================================================================================ +// Prototype of protected function. +//================================================================================ + +//================================================================================ +// LED_819xUsb routines. +//================================================================================ + +// +// Description: +// Turn on LED according to LedPin specified. +// +void +SwLedOn( + _adapter *padapter, + PLED_871x pLed +) +{ + u8 LedCfg; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + return; + } + switch(pLed->LedPin) + { + case LED_PIN_GPIO0: + break; + + case LED_PIN_LED0: + rtw_write8(padapter, REG_LEDCFG0, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. + break; + + case LED_PIN_LED1: + rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT6); // SW control led1 on. + break; + + case LED_PIN_LED2: + LedCfg=rtw_read8(padapter, REG_LEDCFG2); + rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT5); // SW control led1 on. + break; + + default: + break; + + } + + pLed->bLedOn = _TRUE; + +} + + +// +// Description: +// Turn off LED according to LedPin specified. +// +void +SwLedOff( + _adapter *padapter, + PLED_871x pLed +) +{ + u8 LedCfg; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + goto exit; + } + + switch(pLed->LedPin) + { + case LED_PIN_GPIO0: + break; + + case LED_PIN_LED0: + rtw_write8(padapter, REG_LEDCFG0, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. + break; + + case LED_PIN_LED1: + rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT5|BIT6); // SW control led1 on. + break; + + case LED_PIN_LED2: + LedCfg=rtw_read8(padapter, REG_LEDCFG2); + rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT3|BIT5); // SW control led1 on. + break; + + default: + break; + + } +exit: + pLed->bLedOn = _FALSE; + +} + +//================================================================================ +// Interface to manipulate LED objects. +//================================================================================ + +//================================================================================ +// Default LED behavior. +//================================================================================ + +// +// Description: +// Initialize all LED_871x objects. +// +void +rtl8723au_InitSwLeds( + _adapter *padapter + ) +{ + struct led_priv *pledpriv = &(padapter->ledpriv); + + pledpriv->LedControlHandler = LedControl871x; + //8723as-vau wifi used led2 + InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED2); + +// InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED2); +} + + +// +// Description: +// DeInitialize all LED_819xUsb objects. +// +void +rtl8723au_DeInitSwLeds( + _adapter *padapter + ) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + + DeInitLed871x( &(ledpriv->SwLed0) ); +// DeInitLed871x( &(ledpriv->SwLed1) ); +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_recv.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_recv.c new file mode 100755 index 000000000000..330c41c8f044 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_recv.c @@ -0,0 +1,365 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8192CU_RECV_C_ +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <recv_osdep.h> +#include <mlme_osdep.h> +#include <ip.h> +#include <if_ether.h> +#include <ethernet.h> + +#include <usb_ops.h> + +#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) + +#error "Shall be Linux or Windows, but not both!\n" + +#endif + +#include <wifi.h> +#include <circ_buf.h> + +//#include <rtl8192c_hal.h> +#include <rtl8723a_hal.h> + +void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf) +{ + + precvbuf->transfer_len = 0; + + precvbuf->len = 0; + + precvbuf->ref_cnt = 0; + + if(precvbuf->pbuf) + { + precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf; + precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ; + } + +} + +int rtl8192cu_init_recv_priv(_adapter *padapter) +{ + struct recv_priv *precvpriv = &padapter->recvpriv; + int i, res = _SUCCESS; + struct recv_buf *precvbuf; + +#ifdef CONFIG_RECV_THREAD_MODE + _rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed + _rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed +#endif + +#ifdef PLATFORM_LINUX + tasklet_init(&precvpriv->recv_tasklet, + (void(*)(unsigned long))rtl8192cu_recv_tasklet, + (unsigned long)padapter); +#endif + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE +#ifdef PLATFORM_LINUX + precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL); + if(precvpriv->int_in_urb == NULL){ + DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n"); + } +#endif + precvpriv->int_in_buf = rtw_zmalloc(USB_INTR_CONTENT_LENGTH); + if(precvpriv->int_in_buf == NULL){ + DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n"); + } +#endif + + //init recv_buf + _rtw_init_queue(&precvpriv->free_recv_buf_queue); + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX + _rtw_init_queue(&precvpriv->recv_buf_pending_queue); +#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX + + precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4); + if(precvpriv->pallocated_recv_buf==NULL){ + res= _FAIL; + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n")); + goto exit; + } + _rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4); + + precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); + //precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 - + // ((uint) (precvpriv->pallocated_recv_buf) &(4-1)); + + + precvbuf = (struct recv_buf*)precvpriv->precv_buf; + + for(i=0; i < NR_RECVBUFF ; i++) + { + _rtw_init_listhead(&precvbuf->list); + + _rtw_spinlock_init(&precvbuf->recvbuf_lock); + + precvbuf->alloc_sz = MAX_RECVBUF_SZ; + + res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); + if(res==_FAIL) + break; + + precvbuf->ref_cnt = 0; + precvbuf->adapter =padapter; + + + //rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); + + precvbuf++; + + } + + precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF; + +#ifdef PLATFORM_LINUX + + skb_queue_head_init(&precvpriv->rx_skb_queue); + +#ifdef CONFIG_PREALLOC_RECV_SKB + { + int i; + SIZE_PTR tmpaddr=0; + SIZE_PTR alignment=0; + struct sk_buff *pskb=NULL; + + skb_queue_head_init(&precvpriv->free_recv_skb_queue); + + for(i=0; i<NR_PREALLOC_RECV_SKB; i++) + { + pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); + + if(pskb) + { + pskb->dev = padapter->pnetdev; + + tmpaddr = (SIZE_PTR)pskb->data; + alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); + skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); + + skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); + } + + pskb=NULL; + + } + } +#endif + +#endif + +exit: + + return res; + +} + +void rtl8192cu_free_recv_priv (_adapter *padapter) +{ + int i; + struct recv_buf *precvbuf; + struct recv_priv *precvpriv = &padapter->recvpriv; + + precvbuf = (struct recv_buf *)precvpriv->precv_buf; + + for(i=0; i < NR_RECVBUFF ; i++) + { + rtw_os_recvbuf_resource_free(padapter, precvbuf); + precvbuf++; + } + + if(precvpriv->pallocated_recv_buf) + rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4); + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE +#ifdef PLATFORM_LINUX + if(precvpriv->int_in_urb) + { + usb_free_urb(precvpriv->int_in_urb); + } +#endif + if(precvpriv->int_in_buf) + rtw_mfree(precvpriv->int_in_buf, USB_INTR_CONTENT_LENGTH); +#endif + +#ifdef PLATFORM_LINUX + + if (skb_queue_len(&precvpriv->rx_skb_queue)) { + DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n"); + } + + rtw_skb_queue_purge(&precvpriv->rx_skb_queue); + +#ifdef CONFIG_PREALLOC_RECV_SKB + + if (skb_queue_len(&precvpriv->free_recv_skb_queue)) { + DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); + } + + rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue); + +#endif + +#endif + +} + + +void update_recvframe_attrib( + union recv_frame *precvframe, + struct recv_stat *prxstat) +{ + struct rx_pkt_attrib *pattrib; + struct recv_stat report; + PRXREPORT prxreport; + + + report.rxdw0 = le32_to_cpu(prxstat->rxdw0); + report.rxdw1 = le32_to_cpu(prxstat->rxdw1); + report.rxdw2 = le32_to_cpu(prxstat->rxdw2); + report.rxdw3 = le32_to_cpu(prxstat->rxdw3); + report.rxdw4 = le32_to_cpu(prxstat->rxdw4); + report.rxdw5 = le32_to_cpu(prxstat->rxdw5); + + prxreport = (PRXREPORT)&report; + + pattrib = &precvframe->u.hdr.attrib; + _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); + + // update rx report to recv_frame attribute + pattrib->pkt_len = (u16)prxreport->pktlen; + pattrib->drvinfo_sz = (u8)(prxreport->drvinfosize << 3); + pattrib->physt = (u8)prxreport->physt; + + pattrib->crc_err = (u8)prxreport->crc32; + pattrib->icv_err = (u8)prxreport->icverr; + + pattrib->bdecrypted = (u8)(prxreport->swdec ? 0 : 1); + pattrib->encrypt = (u8)prxreport->security; + + pattrib->qos = (u8)prxreport->qos; + pattrib->priority = (u8)prxreport->tid; + + pattrib->amsdu = (u8)prxreport->amsdu; + + pattrib->seq_num = (u16)prxreport->seq; + pattrib->frag_num = (u8)prxreport->frag; + pattrib->mfrag = (u8)prxreport->mf; + pattrib->mdata = (u8)prxreport->md; + + pattrib->mcs_rate = (u8)prxreport->rxmcs; + pattrib->rxht = (u8)prxreport->rxht; +} + + + +/* + * Notice: + * Before calling this function, + * precvframe->u.hdr.rx_data should be ready! + */ +void update_recvframe_phyinfo( + union recv_frame *precvframe, + struct phy_stat *pphy_status) +{ + PADAPTER padapter = precvframe->u.hdr.adapter; + struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; + HAL_DATA_TYPE *pHalData= GET_HAL_DATA(padapter); + PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); + u8 *wlanhdr; + ODM_PACKET_INFO_T pkt_info; + u8 *sa; + //_irqL irqL; + struct sta_priv *pstapriv; + struct sta_info *psta; + + pkt_info.bPacketMatchBSSID =_FALSE; + pkt_info.bPacketToSelf = _FALSE; + pkt_info.bPacketBeacon = _FALSE; + + wlanhdr = get_recvframe_data(precvframe); + + pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) && + !pattrib->icv_err && !pattrib->crc_err && + _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN)); + + pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_da(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN)); + + pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON); + + pkt_info.StationID = 0xFF; + if(pkt_info.bPacketBeacon){ + if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ + sa = padapter->mlmepriv.cur_network.network.MacAddress; + #if 0 + { + printk("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]\n", + sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]); + } + #endif + } + //to do Ad-hoc + } + else{ + sa = get_sa(wlanhdr); + } + + pstapriv = &padapter->stapriv; + psta = rtw_get_stainfo(pstapriv, sa); + if (psta) + { + pkt_info.StationID = psta->mac_id; + //printk("%s ==> StationID(%d)\n",__FUNCTION__,pkt_info.StationID); + } + pkt_info.Rate = pattrib->mcs_rate; + + //rtl8192c_query_rx_phy_status(precvframe, pphy_status); + //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,(u8 *)pphy_status,&(pkt_info)); + //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + precvframe->u.hdr.psta = NULL; + if (pkt_info.bPacketMatchBSSID && + (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) + { + if (psta) + { + precvframe->u.hdr.psta = psta; + rtl8192c_process_phy_info(padapter, precvframe); + } + } + else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) + { + if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + if (psta) + { + precvframe->u.hdr.psta = psta; + } + } + + rtl8192c_process_phy_info(padapter, precvframe); + } +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_xmit.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_xmit.c new file mode 100755 index 000000000000..1ab9bafb7338 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/rtl8723au_xmit.c @@ -0,0 +1,1230 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8192C_XMIT_C_ +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <rtw_byteorder.h> +#include <wifi.h> +#include <osdep_intf.h> +#include <circ_buf.h> +#include <usb_ops.h> +//#include <rtl8192c_hal.h> +#include <rtl8723a_hal.h> +#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) +#error "Shall be Linux or Windows, but not both!\n" +#endif + + +s32 rtl8192cu_init_xmit_priv(_adapter *padapter) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + +#ifdef PLATFORM_LINUX + tasklet_init(&pxmitpriv->xmit_tasklet, + (void(*)(unsigned long))rtl8192cu_xmit_tasklet, + (unsigned long)padapter); +#endif + return _SUCCESS; +} + +void rtl8192cu_free_xmit_priv(_adapter *padapter) +{ +} + +static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) +{ + u8 qsel; + + qsel = pattrib->priority; + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("### do_queue_select priority=%d ,qsel = %d\n",pattrib->priority ,qsel)); + +#ifdef CONFIG_CONCURRENT_MODE + if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) + qsel = 7;// +#endif + + pattrib->qsel = qsel; +} + +int urb_zero_packet_chk(_adapter *padapter, int sz) +{ + int blnSetTxDescOffset; + struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); + + if ( pdvobj->ishighspeed ) + { + if ( ( (sz + TXDESC_SIZE) % 512 ) == 0 ) { + blnSetTxDescOffset = 1; + } else { + blnSetTxDescOffset = 0; + } + } + else + { + if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) { + blnSetTxDescOffset = 1; + } else { + blnSetTxDescOffset = 0; + } + } + + return blnSetTxDescOffset; + +} + +void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc) +{ + u16 *usPtr = (u16*)ptxdesc; + u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times + u32 index; + u16 checksum = 0; + + //Clear first + ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); + + for(index = 0 ; index < count ; index++){ + checksum = checksum ^ le16_to_cpu(*(usPtr + index)); + } + + ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum); + +} + +void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) +{ + if ((pattrib->encrypt > 0) && !pattrib->bswenc) + { + switch (pattrib->encrypt) + { + //SEC_TYPE + case _WEP40_: + case _WEP104_: + ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000); + break; + case _TKIP_: + case _TKIP_WTMIC_: + //ptxdesc->txdw1 |= cpu_to_le32((0x02<<22)&0x00c00000); + ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000); + break; + case _AES_: + ptxdesc->txdw1 |= cpu_to_le32((0x03<<22)&0x00c00000); + break; + case _NO_PRIVACY_: + default: + break; + + } + + } + +} + +void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw) +{ + //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); + + switch(pattrib->vcs_mode) + { + case RTS_CTS: + *pdw |= cpu_to_le32(BIT(12)); + break; + case CTS_TO_SELF: + *pdw |= cpu_to_le32(BIT(11)); + break; + case NONE_VCS: + default: + break; + } + + if(pattrib->vcs_mode) { + *pdw |= cpu_to_le32(BIT(13)); + + // Set RTS BW + if(pattrib->ht_en) + { + *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(27)):0; + + if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + *pdw |= cpu_to_le32((0x01<<28)&0x30000000); + else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + *pdw |= cpu_to_le32((0x02<<28)&0x30000000); + else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) + *pdw |= 0; + else + *pdw |= cpu_to_le32((0x03<<28)&0x30000000); + } + } +} + +void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw) +{ + //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); + + if(pattrib->ht_en) + { + *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0; + + if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + *pdw |= cpu_to_le32((0x01<<20)&0x003f0000); + else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + *pdw |= cpu_to_le32((0x02<<20)&0x003f0000); + else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) + *pdw |= 0; + else + *pdw |= cpu_to_le32((0x03<<20)&0x003f0000); + } +} + +static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt) +{ + int pull=0; + uint qsel; + _adapter *padapter = pxmitframe->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct tx_desc *ptxdesc = (struct tx_desc *)pmem; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + sint bmcst = IS_MCAST(pattrib->ra); +#ifdef CONFIG_P2P + struct wifidirect_info* pwdinfo = &padapter->wdinfo; +#endif //CONFIG_P2P + +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + if((_FALSE == bagg_pkt) && (urb_zero_packet_chk(padapter, sz)==0)) + { + ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ); + pull = 1; + pxmitframe->pkt_offset --; + } +#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX + + _rtw_memset(ptxdesc, 0, sizeof(struct tx_desc)); + + if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) + { + //DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n"); + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); + + qsel = (uint)(pattrib->qsel & 0x0000001f); + ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); + + ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000); + + fill_txdesc_sectype(pattrib, ptxdesc); + + if(pattrib->ampdu_en==_TRUE) + ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN + else + ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK + + //offset 8 + + + //offset 12 + ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); + + + //offset 16 , offset 20 + if (pattrib->qos_en) + ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS + + if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->dhcp_pkt != 1)) + { + //Non EAP & ARP & DHCP type data packet + + fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); + fill_txdesc_phy(pattrib, &ptxdesc->txdw4); + + ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M + ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);// + //ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M + + //use REG_INIDATA_RATE_SEL value + ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]); + + if(0)//for driver dbg + { + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + + if(pattrib->ht_en) + ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI + + ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7 + } + + } + else + { + // EAP data packet and ARP packet. + // Use the 1M data rate to send the EAP/ARP packet. + // This will maybe make the handshake smooth. + + ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK + + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + + if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) + ptxdesc->txdw4 |= cpu_to_le32(BIT(24));// DATA_SHORT + + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); + } + + //offset 24 +#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX + if ( pattrib->hw_tcp_csum == 1 ) { + // ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!! + u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8; + ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16); + DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7); + } +#endif + } + else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) + { + //DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); + + qsel = (uint)(pattrib->qsel&0x0000001f); + ptxdesc->txdw1 |= cpu_to_le32((qsel<<QSEL_SHT)&0x00001f00); + + ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000); + + //fill_txdesc_sectype(pattrib, ptxdesc); + + //offset 8 +#ifdef CONFIG_XMIT_ACK + //CCX-TXRPT ack for xmit mgmt frames. + if (pxmitframe->ack_report) { + #ifdef DBG_CCX + static u16 ccx_sw = 0x123; + ptxdesc->txdw7 |= cpu_to_le32((((ccx_sw>>8)&0x0f)<<16) | (((ccx_sw>>4)&0x0f)<<28) | (((ccx_sw)&0x0f)<<24)); + DBG_871X("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); + ccx_sw = (ccx_sw+1)%0xfff; + #endif + ptxdesc->txdw2 |= cpu_to_le32(BIT(19)); + } +#endif //CONFIG_XMIT_ACK + + //offset 12 + ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); + + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + + //offset 20 + ptxdesc->txdw5 |= cpu_to_le32(BIT(17));//retry limit enable + ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6 + +#ifdef CONFIG_INTEL_PROXIM + if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ + DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); + ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate); + } + else +#endif + { + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); + } + } + else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) + { + DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); + } +#ifdef CONFIG_MP_INCLUDED + else if(((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) && + (padapter->registrypriv.mp_mode == 1)) + { + fill_txdesc_for_mp(padapter, ptxdesc); + } +#endif + else + { + DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID) + + ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid + + //offset 8 + + //offset 12 + ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); + + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + + //offset 20 + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); + } + + // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. + // (1) The sequence number of each non-Qos frame / broadcast / multicast / + // mgnt frame should be controled by Hw because Fw will also send null data + // which we cannot control when Fw LPS enable. + // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. + // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. + // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. + // 2010.06.23. Added by tynli. + if(!pattrib->qos_en) + { + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. + } + + //offset 0 + ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff); + ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//32 bytes for TX Desc + + if(bmcst) + { + ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); + } + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("offset0-txdesc=0x%x\n", ptxdesc->txdw0)); + + //offset 4 + // pkt_offset, unit:8 bytes padding + if (pxmitframe->pkt_offset > 0) + ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); + +#ifdef CONFIG_USB_TX_AGGREGATION + if (pxmitframe->agg_num > 1) + ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000); +#endif + + rtl8192cu_cal_txdesc_chksum(ptxdesc); + + return pull; + +} + +#ifdef CONFIG_XMIT_THREAD_MODE +/* + * Description + * Transmit xmitbuf to hardware tx fifo + * + * Return + * _SUCCESS ok + * _FAIL something error + */ +s32 rtl8723au_xmit_buf_handler(PADAPTER padapter) +{ + //PHAL_DATA_TYPE phal; + struct xmit_priv *pxmitpriv; + struct xmit_buf *pxmitbuf; + s32 ret; + + + //phal = GET_HAL_DATA(padapter); + pxmitpriv = &padapter->xmitpriv; + + ret = _rtw_down_sema(&pxmitpriv->xmit_sema); + if (_FAIL == ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, + ("%s: down SdioXmitBufSema fail!\n", __FUNCTION__)); + return _FAIL; + } + + ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE); + if (ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)!\n", + __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); + return _FAIL; + } + + if(check_pending_xmitbuf(pxmitpriv) == _FALSE) + return _SUCCESS; + +#ifdef CONFIG_LPS_LCLK + ret = rtw_register_tx_alive(padapter); + if (ret != _SUCCESS) { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: wait to leave LPS_LCLK\n", __FUNCTION__)); + return _SUCCESS; + } +#endif + + do { + pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) break; + + rtw_write_port(padapter, pxmitbuf->ff_hwaddr, pxmitbuf->len, (unsigned char*)pxmitbuf); + + } while (1); + +#ifdef CONFIG_LPS_LCLK + rtw_unregister_tx_alive(padapter); +#endif + + return _SUCCESS; +} +#endif + + +static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + s32 ret = _SUCCESS; + s32 inner_ret = _SUCCESS; + int t, sz, w_sz, pull=0; + u8 *mem_addr; + u32 ff_hwaddr; + struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct security_priv *psecuritypriv = &padapter->securitypriv; + + if ((pxmitframe->frame_tag == DATA_FRAMETAG) && + (pxmitframe->attrib.ether_type != 0x0806) && + (pxmitframe->attrib.ether_type != 0x888e) && + (pxmitframe->attrib.dhcp_pkt != 1)) + { + rtw_issue_addbareq_cmd(padapter, pxmitframe); + } + + mem_addr = pxmitframe->buf_addr; + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n")); + + for (t = 0; t < pattrib->nr_frags; t++) + { + if (inner_ret != _SUCCESS && ret == _SUCCESS) + ret = _FAIL; + + if (t != (pattrib->nr_frags - 1)) + { + RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags)); + + sz = pxmitpriv->frag_len; + sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); + } + else //no frag + { + sz = pattrib->last_txcmdsz; + } + + pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE); + + if(pull) + { + mem_addr += PACKET_OFFSET_SZ; //pull txdesc head + + //pxmitbuf ->pbuf = mem_addr; + pxmitframe->buf_addr = mem_addr; + + w_sz = sz + TXDESC_SIZE; + } + else + { + w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; + } + + ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); +#ifdef CONFIG_XMIT_THREAD_MODE + pxmitbuf->len = w_sz; + pxmitbuf->ff_hwaddr = ff_hwaddr; + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); +#else + inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); +#endif + rtw_count_tx_stats(padapter, pxmitframe, sz); + + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz)); + //DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); + + mem_addr += w_sz; + + mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); + + } + + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + if (ret != _SUCCESS) + rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); + + return ret; +} + +#ifdef CONFIG_USB_TX_AGGREGATION +static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) +{ + struct pkt_attrib *pattrib = &pxmitframe->attrib; + + u32 len = 0; + + // no consider fragement + len = pattrib->hdrlen + pattrib->iv_len + + SNAP_SIZE + sizeof(u16) + + pattrib->pktlen + + ((pattrib->bswenc) ? pattrib->icv_len : 0); + + if(pattrib->encrypt ==_TKIP_) + len += 8; + + return len; +} + +#define IDEA_CONDITION 1 // check all packets before enqueue +s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct xmit_frame *pxmitframe = NULL; + struct xmit_frame *pfirstframe = NULL; + + // aggregate variable + struct hw_xmit *phwxmit; + struct sta_info *psta = NULL; + struct tx_servq *ptxservq = NULL; + + _irqL irqL; + _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; + + u32 pbuf; // next pkt address + u32 pbuf_tail; // last pkt tail + u32 len; // packet length, except TXDESC_SIZE and PKT_OFFSET + + u32 bulkSize = pHalData->UsbBulkOutSize; + u8 descCount; + u32 bulkPtr; + + // dump frame variable + u32 ff_hwaddr; + +#ifndef IDEA_CONDITION + int res = _SUCCESS; +#endif + + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n")); + + + // check xmitbuffer is ok + if (pxmitbuf == NULL) { + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) return _FALSE; + } + + + //3 1. pick up first frame + do { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); + if (pxmitframe == NULL) { + // no more xmit frame, release xmit buffer + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return _FALSE; + } + + +#ifndef IDEA_CONDITION + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", + pxmitframe->frame_tag, DATA_FRAMETAG)); +// rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + // TID 0~15 + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: TID(%d) should be 0~15!\n", + pxmitframe->attrib.priority)); +// rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } +#endif + + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf; + pxmitbuf->priv_data = pxmitframe; + + //pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1. + pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset + + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__); + continue; + } + + + // always return ndis_packet after rtw_xmitframe_coalesce + rtw_os_xmit_complete(padapter, pxmitframe); + + break; + } while (1); + + //3 2. aggregate same priority and same DA(AP or STA) frames + pfirstframe = pxmitframe; + len = xmitframe_need_length(pfirstframe) + TXDESC_OFFSET; + pbuf_tail = len; + pbuf = _RND8(pbuf_tail); + + // check pkt amount in one bluk + descCount = 0; + bulkPtr = bulkSize; + if (pbuf < bulkPtr) + descCount++; + else { + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize + } + + // dequeue same priority packet from station tx queue + psta = pfirstframe->attrib.psta; + switch (pfirstframe->attrib.priority) { + case 1: + case 2: + ptxservq = &(psta->sta_xmitpriv.bk_q); + phwxmit = pxmitpriv->hwxmits + 3; + break; + + case 4: + case 5: + ptxservq = &(psta->sta_xmitpriv.vi_q); + phwxmit = pxmitpriv->hwxmits + 1; + break; + + case 6: + case 7: + ptxservq = &(psta->sta_xmitpriv.vo_q); + phwxmit = pxmitpriv->hwxmits; + break; + + case 0: + case 3: + default: + ptxservq = &(psta->sta_xmitpriv.be_q); + phwxmit = pxmitpriv->hwxmits + 2; + break; + } + + _enter_critical_bh(&pxmitpriv->lock, &irqL); + + xmitframe_phead = get_list_head(&ptxservq->sta_pending); + xmitframe_plist = get_next(xmitframe_phead); + while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) + { + pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); + xmitframe_plist = get_next(xmitframe_plist); + + len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE; // no offset + if (pbuf + len > MAX_XMITBUF_SZ) break; + + rtw_list_delete(&pxmitframe->list); + ptxservq->qcnt--; + phwxmit->accnt--; + +#ifndef IDEA_CONDITION + // suppose only data frames would be in queue + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", + pxmitframe->frame_tag, DATA_FRAMETAG)); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + // TID 0~15 + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: TID(%d) should be 0~15!\n", + pxmitframe->attrib.priority)); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } +#endif + +// pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; + + pxmitframe->agg_num = 0; // not first frame of aggregation + pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset + + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + DBG_871X("%s coalesce failed \n",__FUNCTION__); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + + // always return ndis_packet after rtw_xmitframe_coalesce + rtw_os_xmit_complete(padapter, pxmitframe); + + // (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz + update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, _TRUE); + + // don't need xmitframe any more + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + // handle pointer and stop condition + pbuf_tail = pbuf + len; + pbuf = _RND8(pbuf_tail); + + pfirstframe->agg_num++; + if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) + break; + + if (pbuf < bulkPtr) { + descCount++; + if (descCount == pHalData->UsbTxAggDescNum) + break; + } else { + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; + } + } + if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) + rtw_list_delete(&ptxservq->tx_pending); + + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + if ((pfirstframe->attrib.ether_type != 0x0806) && + (pfirstframe->attrib.ether_type != 0x888e) && + (pfirstframe->attrib.dhcp_pkt != 1)) + { + rtw_issue_addbareq_cmd(padapter, pfirstframe); + } + +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + //3 3. update first frame txdesc + if ((pbuf_tail % bulkSize) == 0) { + // remove pkt_offset + pbuf_tail -= PACKET_OFFSET_SZ; + pfirstframe->buf_addr += PACKET_OFFSET_SZ; + pfirstframe->pkt_offset = 0; + } +#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX + update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, _TRUE); + + //3 4. write xmit buffer to USB FIFO + ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); + + // xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr + rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); + + + //3 5. update statisitc + pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); + if (pfirstframe->pkt_offset == 1) pbuf_tail -= PACKET_OFFSET_SZ; + + rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); + + rtw_free_xmitframe(pxmitpriv, pfirstframe); + + return _TRUE; +} + +#else + +s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + + struct hw_xmit *phwxmits; + sint hwentry; + struct xmit_frame *pxmitframe=NULL; + int res=_SUCCESS, xcnt = 0; + + phwxmits = pxmitpriv->hwxmits; + hwentry = pxmitpriv->hwxmit_entry; + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n")); + + if(pxmitbuf==NULL) + { + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if(!pxmitbuf) + { + return _FALSE; + } + } + + + do + { + pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); + + if(pxmitframe) + { + pxmitframe->pxmitbuf = pxmitbuf; + + pxmitframe->buf_addr = pxmitbuf->pbuf; + + pxmitbuf->priv_data = pxmitframe; + + if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) + { + if(pxmitframe->attrib.priority<=15)//TID0~15 + { + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + } + + rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce + } + + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n")); + + + if(res == _SUCCESS) + { + rtw_dump_xframe(padapter, pxmitframe); + } + else + { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + } + + xcnt++; + + } + else + { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return _FALSE; + } + + break; + + }while(0/*xcnt < (NR_XMITFRAME >> 3)*/); + + return _TRUE; + +} +#endif + + + +static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + s32 res = _SUCCESS; + + + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + if (res == _SUCCESS) { + rtw_dump_xframe(padapter, pxmitframe); + } + + return res; +} + +/* + * Return + * _TRUE dump packet directly + * _FALSE enqueue packet + */ +static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + _irqL irqL; + s32 res; + struct xmit_buf *pxmitbuf = NULL; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +#ifdef CONFIG_TDLS + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +#endif +#ifdef CONFIG_CONCURRENT_MODE + PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +#endif + + do_queue_select(padapter, pattrib); + + _enter_critical_bh(&pxmitpriv->lock, &irqL); + +#ifndef CONFIG_TDLS +#ifdef CONFIG_AP_MODE + if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) + { + struct sta_info *psta; + struct sta_priv *pstapriv = &padapter->stapriv; + + + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + if(pattrib->psta) + { + psta = pattrib->psta; + } + else + { + psta=rtw_get_stainfo(pstapriv, pattrib->ra); + } + + if(psta) + { + if(psta->sleepq_len > (NR_XMITFRAME>>3)) + { + wakeup_sta_to_xmit(padapter, psta); + } + } + + return _FALSE; + } +#endif +//else CONFIG_TDLS, process as TDLS Buffer STA +#else + if(pmlmeinfo->tdls_setup_state&TDLS_LINKED_STATE ){ //&& pattrib->ether_type!=0x0806) + res = xmit_tdls_enqueue_for_sleeping_sta(padapter, pxmitframe); + if(res==_TRUE){ + _exit_critical_bh(&pxmitpriv->lock, &irqL); + return _FALSE; + }else if(res==2){ + goto enqueue; + } + } +#endif + + if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) + goto enqueue; + + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) + goto enqueue; + +#ifdef CONFIG_CONCURRENT_MODE + if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) + goto enqueue; +#endif + + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) + goto enqueue; + + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf; + pxmitbuf->priv_data = pxmitframe; + + if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + } + + return _TRUE; + +enqueue: + res = rtw_xmitframe_enqueue(padapter, pxmitframe); + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + if (res != _SUCCESS) { + RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n")); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + // Trick, make the statistics correct + pxmitpriv->tx_pkts--; + pxmitpriv->tx_drop++; + return _TRUE; + } + + return _FALSE; +} + +s32 rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) +{ + return rtw_dump_xframe(padapter, pmgntframe); +} + +/* + * Return + * _TRUE dump packet directly ok + * _FALSE temporary can't transmit packets to hardware + */ +s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + return pre_xmitframe(padapter, pxmitframe); +} + +s32 rtl8723au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + s32 err; + + if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) + { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + // Trick, make the statistics correct + pxmitpriv->tx_pkts--; + pxmitpriv->tx_drop++; + } + else + { +#ifdef PLATFORM_LINUX + tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); +#endif + } + + return err; + +} + + +#ifdef CONFIG_HOSTAPD_MLME + +static void rtl8192cu_hostap_mgnt_xmit_cb(struct urb *urb) +{ +#ifdef PLATFORM_LINUX + struct sk_buff *skb = (struct sk_buff *)urb->context; + + //DBG_8192C("%s\n", __FUNCTION__); + + rtw_skb_free(skb); +#endif +} + +s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) +{ +#ifdef PLATFORM_LINUX + u16 fc; + int rc, len, pipe; + unsigned int bmcst, tid, qsel; + struct sk_buff *skb, *pxmit_skb; + struct urb *urb; + unsigned char *pxmitbuf; + struct tx_desc *ptxdesc; + struct ieee80211_hdr *tx_hdr; + struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; + struct net_device *pnetdev = padapter->pnetdev; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); + + + //DBG_8192C("%s\n", __FUNCTION__); + + skb = pkt; + + len = skb->len; + tx_hdr = (struct ieee80211_hdr *)(skb->data); + fc = le16_to_cpu(tx_hdr->frame_ctl); + bmcst = IS_MCAST(tx_hdr->addr1); + + if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_MGMT) + goto _exit; + + pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE); + + if(!pxmit_skb) + goto _exit; + + pxmitbuf = pxmit_skb->data; + + urb = usb_alloc_urb(0, GFP_ATOMIC); + if (!urb) { + goto _exit; + } + + // ----- fill tx desc ----- + ptxdesc = (struct tx_desc *)pxmitbuf; + _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); + + //offset 0 + ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//default = 32 bytes for TX Desc + ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); + + if(bmcst) + { + ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); + } + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID + + ptxdesc->txdw1 |= cpu_to_le32((0x12<<QSEL_SHT)&0x00001f00); + + ptxdesc->txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode + + //offset 8 + + //offset 12 + ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000); + + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + + //offset 20 + + + //HW append seq + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. + + + rtl8192cu_cal_txdesc_chksum(ptxdesc); + // ----- end of fill tx desc ----- + + // + skb_put(pxmit_skb, len + TXDESC_SIZE); + pxmitbuf = pxmitbuf + TXDESC_SIZE; + _rtw_memcpy(pxmitbuf, skb->data, len); + + //DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len); + + + // ----- prepare urb for submit ----- + + //translate DMA FIFO addr to pipehandle + //pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); + pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f); + + usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, + pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); + + urb->transfer_flags |= URB_ZERO_PACKET; + usb_anchor_urb(urb, &phostapdpriv->anchored); + rc = usb_submit_urb(urb, GFP_ATOMIC); + if (rc < 0) { + usb_unanchor_urb(urb); + kfree_skb(skb); + } + usb_free_urb(urb); + + +_exit: + + rtw_skb_free(skb); + +#endif + + return 0; + +} +#endif + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/usb_halinit.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/usb_halinit.c new file mode 100755 index 000000000000..626a54039a59 --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/usb_halinit.c @@ -0,0 +1,4055 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _HCI_HAL_INIT_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <rtw_efuse.h> + + +#include <HalPwrSeqCmd.h> +#include <Hal8723PwrSeq.h> +#include <rtl8723a_hal.h> +#include <rtl8723a_led.h> + +#ifdef CONFIG_IOL +#include <rtw_iol.h> +#endif + +#ifdef CONFIG_EFUSE_CONFIG_FILE +#include <linux/fs.h> +#include <asm/uaccess.h> +#endif //CONFIG_EFUSE_CONFIG_FILE + +#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) + +#error "Shall be Linux or Windows, but not both!\n" + +#endif + +#ifndef CONFIG_USB_HCI + +#error "CONFIG_USB_HCI shall be on!\n" + +#endif + +#include <usb_ops.h> +#include <usb_hal.h> +#include <usb_osintf.h> + +#if DISABLE_BB_RF + #define HAL_MAC_ENABLE 0 + #define HAL_BB_ENABLE 0 + #define HAL_RF_ENABLE 0 +#else + #define HAL_MAC_ENABLE 1 + #define HAL_BB_ENABLE 1 + #define HAL_RF_ENABLE 1 +#endif + + +static VOID +_ConfigChipOutEP( + IN PADAPTER pAdapter, + IN u8 NumOutPipe + ) +{ + u8 value8; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + pHalData->OutEpQueueSel = 0; + pHalData->OutEpNumber = 0; + + // Normal and High queue + value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1)); + + if(value8 & USB_NORMAL_SIE_EP_MASK){ + pHalData->OutEpQueueSel |= TX_SELE_HQ; + pHalData->OutEpNumber++; + } + + if((value8 >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK){ + pHalData->OutEpQueueSel |= TX_SELE_NQ; + pHalData->OutEpNumber++; + } + + // Low queue + value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2)); + if(value8 & USB_NORMAL_SIE_EP_MASK){ + pHalData->OutEpQueueSel |= TX_SELE_LQ; + pHalData->OutEpNumber++; + } + + // TODO: Error recovery for this case + //RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber)); + +} + +static BOOLEAN HalUsbSetQueuePipeMapping8192CUsb( + IN PADAPTER pAdapter, + IN u8 NumInPipe, + IN u8 NumOutPipe + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN result = _FALSE; + + _ConfigChipOutEP(pAdapter, NumOutPipe); + + // Normal chip with one IN and one OUT doesn't have interrupt IN EP. + if(1 == pHalData->OutEpNumber){ + if(1 != NumInPipe){ + return result; + } + } + + result = Hal_MappingOutPipe(pAdapter, NumOutPipe); + + return result; + +} + +void rtl8192cu_interface_configure(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + + if (pdvobjpriv->ishighspeed == _TRUE) + { + pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes + } + else + { + pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes + } + + pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber; + +#ifdef CONFIG_USB_TX_AGGREGATION + pHalData->UsbTxAggMode = 1; + pHalData->UsbTxAggDescNum = 0x6; // only 4 bits +#endif + +#ifdef CONFIG_USB_RX_AGGREGATION + pHalData->UsbRxAggMode = USB_RX_AGG_DMA;// USB_RX_AGG_DMA; + pHalData->UsbRxAggBlockCount = 8; //unit : 512b + pHalData->UsbRxAggBlockTimeout = 0x6; + pHalData->UsbRxAggPageCount = 48; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize + pHalData->UsbRxAggPageTimeout = 0x4; //6, absolute time = 34ms/(2^6) +#endif + + HalUsbSetQueuePipeMapping8192CUsb(padapter, + pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); + +} + +static u8 _InitPowerOn(PADAPTER padapter) +{ + u8 status = _SUCCESS; + u16 value16=0; + u8 value8 = 0; + + // RSV_CTRL 0x1C[7:0] = 0x00 // unlock ISO/CLK/Power control register + rtw_write8(padapter, REG_RSV_CTRL, 0x0); + + // HW Power on sequence + if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, rtl8723A_card_enable_flow )) + return _FAIL; + + // 0x04[19] = 1, suggest by Jackie 2011.05.09, reset 8051 + value8 = rtw_read8(padapter, REG_APS_FSMCO+2); + rtw_write8(padapter,REG_APS_FSMCO+2,(value8|BIT3)); + + // Enable MAC DMA/WMAC/SCHEDULE/SEC block + // Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. + value16 = rtw_read16(padapter, REG_CR); + value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN + | PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC | CALTMR_EN); + rtw_write16(padapter, REG_CR, value16); + + //for Efuse PG, suggest by Jackie 2011.11.23 + PHY_SetBBReg(padapter, REG_EFUSE_CTRL, BIT28|BIT29|BIT30, 0x06); + + return status; +} + + +static void _dbg_dump_macreg(_adapter *padapter) +{ + u32 offset = 0; + u32 val32 = 0; + u32 index =0 ; + for(index=0;index<64;index++) + { + offset = index*4; + val32 = rtw_read32(padapter,offset); + DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32); + } +} + +//------------------------------------------------------------------------- +// +// LLT R/W/Init function +// +//------------------------------------------------------------------------- +static u8 _LLTWrite( + IN PADAPTER Adapter, + IN u32 address, + IN u32 data + ) +{ + u8 status = _SUCCESS; + int count = 0; + u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); + + rtw_write32(Adapter, REG_LLT_INIT, value); + + //polling + do{ + + value = rtw_read32(Adapter, REG_LLT_INIT); + if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){ + break; + } + + if(count > POLLING_LLT_THRESHOLD){ + //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling write LLT done at address %d!\n", address)); + status = _FAIL; + break; + } + }while(count++); + + return status; + +} + + +static u8 _LLTRead( + IN PADAPTER Adapter, + IN u32 address + ) +{ + int count = 0; + u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); + + rtw_write32(Adapter, REG_LLT_INIT, value); + + //polling and get value + do{ + + value = rtw_read32(Adapter, REG_LLT_INIT); + if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){ + return (u8)value; + } + + if(count > POLLING_LLT_THRESHOLD){ + //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling read LLT done at address %d!\n", address)); + break; + } + }while(count++); + + return 0xFF; + +} + + +//--------------------------------------------------------------- +// +// MAC init functions +// +//--------------------------------------------------------------- +static VOID +_SetMacID( + IN PADAPTER Adapter, u8* MacID + ) +{ + u32 i; + for(i=0 ; i< MAC_ADDR_LEN ; i++){ +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + rtw_write32(Adapter, REG_MACID1+i, MacID[i]); + else +#endif + rtw_write32(Adapter, REG_MACID+i, MacID[i]); + } +} + +static VOID +_SetBSSID( + IN PADAPTER Adapter, u8* BSSID + ) +{ + u32 i; + for(i=0 ; i< MAC_ADDR_LEN ; i++){ +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + rtw_write32(Adapter, REG_BSSID1+i, BSSID[i]); + else +#endif + rtw_write32(Adapter, REG_BSSID+i, BSSID[i]); + } +} + + +// Shall USB interface init this? +static VOID +_InitInterrupt( + IN PADAPTER Adapter + ) +{ + u32 value32; + + // HISR - turn all on + value32 = 0xFFFFFFFF; + rtw_write32(Adapter, REG_HISR, value32); + + // HIMR - turn all on + rtw_write32(Adapter, REG_HIMR, value32); +} + + +static VOID +_InitQueueReservedPage( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + + u32 outEPNum = (u32)pHalData->OutEpNumber; + u32 numHQ = 0; + u32 numLQ = 0; + u32 numNQ = 0; + u32 numPubQ; + u32 value32; + u8 value8; + BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; + //u32 txQPageNum, txQPageUnit,txQRemainPage; + + if( (pregistrypriv->wifi_spec==_TRUE) ||(pregistrypriv->qos_opt_enable==_TRUE)) + bWiFiConfig = _TRUE; + + { //for WMM + //RT_ASSERT((outEPNum>=2), ("for WMM ,number of out-ep must more than or equal to 2!\n")); + + numPubQ = bWiFiConfig?WMM_NORMAL_PAGE_NUM_PUBQ:NORMAL_PAGE_NUM_PUBQ; + + if (pHalData->OutEpQueueSel & TX_SELE_HQ) + { + numHQ = bWiFiConfig?WMM_NORMAL_PAGE_NUM_HPQ:NORMAL_PAGE_NUM_HPQ; + } + + if (pHalData->OutEpQueueSel & TX_SELE_LQ) + { + numLQ = bWiFiConfig?WMM_NORMAL_PAGE_NUM_LPQ:NORMAL_PAGE_NUM_LPQ; + } + // NOTE: This step shall be proceed before writting REG_RQPN. + if(pHalData->OutEpQueueSel & TX_SELE_NQ){ + numNQ = bWiFiConfig?WMM_NORMAL_PAGE_NUM_NPQ:NORMAL_PAGE_NUM_NPQ; + } + value8 = (u8)_NPQ(numNQ); + rtw_write8(Adapter, REG_RQPN_NPQ, value8); + } + + // TX DMA + value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; + rtw_write32(Adapter, REG_RQPN, value32); +} + +static VOID +_InitTxBufferBoundary( + IN PADAPTER Adapter + ) +{ + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + u8 txpktbuf_bndy; + + if(!pregistrypriv->wifi_spec){ + txpktbuf_bndy = TX_PAGE_BOUNDARY; + } + else{//for WMM + txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY; + } + + rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); + rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); + rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); + rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); +#if 1 + rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); +#else + txdmactrl = PlatformIORead2Byte(Adapter, REG_TDECTRL); + txdmactrl &= ~BCN_HEAD_MASK; + txdmactrl |= BCN_HEAD(txpktbuf_bndy); + PlatformIOWrite2Byte(Adapter, REG_TDECTRL, txdmactrl); +#endif +} + +static VOID +_InitPageBoundary( + IN PADAPTER Adapter + ) +{ + // RX Page Boundary + //srand(static_cast<unsigned int>(time(NULL)) ); + u16 rxff_bndy = 0x27FF;//(rand() % 1) ? 0x27FF : 0x23FF; + + rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); + + // TODO: ?? shall we set tx boundary? +} + + +static VOID +_InitNormalChipRegPriority( + IN PADAPTER Adapter, + IN u16 beQ, + IN u16 bkQ, + IN u16 viQ, + IN u16 voQ, + IN u16 mgtQ, + IN u16 hiQ + ) +{ + u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); + + value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | + _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | + _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); + + rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); +} + +static VOID +_InitNormalChipOneOutEpPriority( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + u16 value = 0; + switch(pHalData->OutEpQueueSel) + { + case TX_SELE_HQ: + value = QUEUE_HIGH; + break; + case TX_SELE_LQ: + value = QUEUE_LOW; + break; + case TX_SELE_NQ: + value = QUEUE_NORMAL; + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; + } + + _InitNormalChipRegPriority(Adapter, + value, + value, + value, + value, + value, + value + ); + +} + +static VOID +_InitNormalChipTwoOutEpPriority( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; + + + u16 valueHi = 0; + u16 valueLow = 0; + + switch(pHalData->OutEpQueueSel) + { + case (TX_SELE_HQ | TX_SELE_LQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_NQ | TX_SELE_LQ): + valueHi = QUEUE_NORMAL; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_HQ | TX_SELE_NQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_NORMAL; + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; + } + + if(!pregistrypriv->wifi_spec ){ + beQ = valueLow; + bkQ = valueLow; + viQ = valueHi; + voQ = valueHi; + mgtQ = valueHi; + hiQ = valueHi; + } + else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE + beQ = valueLow; + bkQ = valueHi; + viQ = valueHi; + voQ = valueLow; + mgtQ = valueHi; + hiQ = valueHi; + } + + _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); + +} + +static VOID +_InitNormalChipThreeOutEpPriority( + IN PADAPTER Adapter + ) +{ + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; + + if(!pregistrypriv->wifi_spec ){// typical setting + beQ = QUEUE_LOW; + bkQ = QUEUE_LOW; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + else{// for WMM + beQ = QUEUE_LOW; + bkQ = QUEUE_NORMAL; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); +} + +static VOID +_InitNormalChipQueuePriority( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(pHalData->OutEpNumber) + { + case 1: + _InitNormalChipOneOutEpPriority(Adapter); + break; + case 2: + _InitNormalChipTwoOutEpPriority(Adapter); + break; + case 3: + _InitNormalChipThreeOutEpPriority(Adapter); + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; + } + + +} + +static VOID +_InitQueuePriority( + IN PADAPTER Adapter + ) +{ + _InitNormalChipQueuePriority(Adapter); +} + +static VOID +_InitHardwareDropIncorrectBulkOut( + IN PADAPTER Adapter + ) +{ +#ifdef ENABLE_USB_DROP_INCORRECT_OUT + u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); + value32 |= DROP_DATA_EN; + rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); +#endif +} + +static VOID +_InitNetworkType( + IN PADAPTER Adapter + ) +{ + u32 value32; + + value32 = rtw_read32(Adapter, REG_CR); + + // TODO: use the other function to set network type +#if RTL8191C_FPGA_NETWORKTYPE_ADHOC + value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); +#else + value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); +#endif + rtw_write32(Adapter, REG_CR, value32); +// RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2); +} + +static VOID +_InitTransferPageSize( + IN PADAPTER Adapter + ) +{ + // Tx page size is always 128. + + u8 value8; + value8 = _PSRX(PBP_128) | _PSTX(PBP_128); + rtw_write8(Adapter, REG_PBP, value8); +} + +static VOID +_InitDriverInfoSize( + IN PADAPTER Adapter, + IN u8 drvInfoSize + ) +{ + rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize); +} + +static VOID +_InitWMACSetting( + IN PADAPTER Adapter + ) +{ + //u4Byte value32; + //u16 value16; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; + //pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; + // don't turn on AAP, it will allow all packets to driver + pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; +#if (1 == RTL8192C_RX_PACKET_INCLUDE_CRC) + pHalData->ReceiveConfig |= ACRC32; +#endif + + // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() + rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); + + // Accept all multicast address + rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); + rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); + + + // Accept all data frames + //value16 = 0xFFFF; + //rtw_write16(Adapter, REG_RXFLTMAP2, value16); + + // 2010.09.08 hpfan + // Since ADF is removed from RCR, ps-poll will not be indicate to driver, + // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. + //value16 = 0x400; + //rtw_write16(Adapter, REG_RXFLTMAP1, value16); + + // Accept all management frames + //value16 = 0xFFFF; + //rtw_write16(Adapter, REG_RXFLTMAP0, value16); + + //enable RX_SHIFT bits + //rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); + +} + +static VOID +_InitAdaptiveCtrl( + IN PADAPTER Adapter + ) +{ + u16 value16; + u32 value32; + + // Response Rate Set + value32 = rtw_read32(Adapter, REG_RRSR); + value32 &= ~RATE_BITMAP_ALL; + value32 |= RATE_RRSR_CCK_ONLY_1M; + rtw_write32(Adapter, REG_RRSR, value32); + + // CF-END Threshold + //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); + + // SIFS (used in NAV) + value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); + rtw_write16(Adapter, REG_SPEC_SIFS, value16); + + // Retry Limit + value16 = _LRL(0x30) | _SRL(0x30); + rtw_write16(Adapter, REG_RL, value16); + +} + +static VOID +_InitRateFallback( + IN PADAPTER Adapter + ) +{ + // Set Data Auto Rate Fallback Retry Count register. + rtw_write32(Adapter, REG_DARFRC, 0x00000000); + rtw_write32(Adapter, REG_DARFRC+4, 0x10080404); + rtw_write32(Adapter, REG_RARFRC, 0x04030201); + rtw_write32(Adapter, REG_RARFRC+4, 0x08070605); + +} + + +static VOID +_InitEDCA( + IN PADAPTER Adapter + ) +{ + // Set Spec SIFS (used in NAV) + rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a); + rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a); + + // Set SIFS for CCK + rtw_write16(Adapter,REG_SIFS_CTX, 0x100a); + + // Set SIFS for OFDM + rtw_write16(Adapter,REG_SIFS_TRX, 0x100a); + + // TXOP + rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); + rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); + rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); + rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); +} + +#ifdef CONFIG_LED +static void _InitHWLed(PADAPTER Adapter) +{ + struct led_priv *pledpriv = &(Adapter->ledpriv); + + if( pledpriv->LedStrategy != HW_LED) + return; + +// HW led control +// to do .... +//must consider cases of antenna diversity/ commbo card/solo card/mini card + +} +#endif //CONFIG_LED + +static VOID +_InitRDGSetting( + IN PADAPTER Adapter + ) +{ + rtw_write8(Adapter,REG_RD_CTRL,0xFF); + rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); + rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05); +} + +static VOID +_InitRxSetting( + IN PADAPTER Adapter + ) +{ + rtw_write32(Adapter, REG_MACID, 0x87654321); + rtw_write32(Adapter, 0x0700, 0x87654321); +} + +static VOID +_InitRetryFunction( + IN PADAPTER Adapter + ) +{ + u8 value8; + + value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); + value8 |= EN_AMPDU_RTY_NEW; + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); + + // Set ACK timeout + rtw_write8(Adapter, REG_ACKTO, 0x40); +} + +/*----------------------------------------------------------------------------- + * Function: usb_AggSettingTxUpdate() + * + * Overview: Seperate TX/RX parameters update independent for TP detection and + * dynamic TX/RX aggreagtion parameters update. + * + * Input: PADAPTER + * + * Output/Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Seperate to smaller function. + * + *---------------------------------------------------------------------------*/ +static VOID +usb_AggSettingTxUpdate( + IN PADAPTER Adapter + ) +{ +#ifdef CONFIG_USB_TX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u32 value32; + + if(Adapter->registrypriv.wifi_spec) + pHalData->UsbTxAggMode = _FALSE; + + if(pHalData->UsbTxAggMode){ + value32 = rtw_read32(Adapter, REG_TDECTRL); + value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); + value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); + + rtw_write32(Adapter, REG_TDECTRL, value32); + } + +#endif +} // usb_AggSettingTxUpdate + + +/*----------------------------------------------------------------------------- + * Function: usb_AggSettingRxUpdate() + * + * Overview: Seperate TX/RX parameters update independent for TP detection and + * dynamic TX/RX aggreagtion parameters update. + * + * Input: PADAPTER + * + * Output/Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Seperate to smaller function. + * + *---------------------------------------------------------------------------*/ +static VOID +usb_AggSettingRxUpdate( + IN PADAPTER Adapter + ) +{ +#ifdef CONFIG_USB_RX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u8 valueDMA; + u8 valueUSB; + + valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL); + valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); + + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + valueDMA |= RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN; + break; + case USB_RX_AGG_USB: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN; + break; + case USB_RX_AGG_MIX: + valueDMA |= RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN; + break; + case USB_RX_AGG_DISABLE: + default: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN; + break; + } + + rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); + rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB); + + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); + rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout); + break; + case USB_RX_AGG_USB: + rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); + rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); + break; + case USB_RX_AGG_MIX: + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); + rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout); + rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); + rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); + break; + case USB_RX_AGG_DISABLE: + default: + // TODO: + break; + } + + switch(PBP_128) + { + case PBP_128: + pHalData->HwRxPageSize = 128; + break; + case PBP_64: + pHalData->HwRxPageSize = 64; + break; + case PBP_256: + pHalData->HwRxPageSize = 256; + break; + case PBP_512: + pHalData->HwRxPageSize = 512; + break; + case PBP_1024: + pHalData->HwRxPageSize = 1024; + break; + default: + //RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n")); + break; + } +#endif +} // usb_AggSettingRxUpdate + +static VOID +InitUsbAggregationSetting( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // Tx aggregation setting + usb_AggSettingTxUpdate(Adapter); + + // Rx aggregation setting + usb_AggSettingRxUpdate(Adapter); + + // 201/12/10 MH Add for USB agg mode dynamic switch. + pHalData->UsbRxHighSpeedMode = _FALSE; +} + +/*----------------------------------------------------------------------------- + * Function: USB_AggModeSwitch() + * + * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase + * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we + * need to monitor the influence of FTP/network share. + * For TX mode, we are still ubder investigation. + * + * Input: PADAPTER + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +VOID +USB_AggModeSwitch( + IN PADAPTER Adapter + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + //pHalData->UsbRxHighSpeedMode = FALSE; + // How to measure the RX speed? We assume that when traffic is more than + if (pMgntInfo->bRegAggDMEnable == _FALSE) + { + return; // Inf not support. + } + + + if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _TRUE && + pHalData->UsbRxHighSpeedMode == _FALSE) + { + pHalData->UsbRxHighSpeedMode = _TRUE; + DBG_8192C("UsbAggModeSwitchCheck to HIGH\n"); + } + else if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _FALSE && + pHalData->UsbRxHighSpeedMode == _TRUE) + { + pHalData->UsbRxHighSpeedMode = _FALSE; + DBG_8192C("UsbAggModeSwitchCheck to LOW\n"); + } + else + { + return; + } + + // 2010/12/10 MH Add for USB Aggregation judgement we need to + //if( pMgntInfo->LinkDetectInfo.NumRxOkInPeriod > 4000 || + // pMgntInfo->LinkDetectInfo.NumTxOkInPeriod > 4000 ) + +#ifdef CONFIG_USB_TX_AGGREGATION + //usb_AggSettingTxUpdate(Adapter); +#endif + +#ifdef CONFIG_USB_RX_AGGREGATION + if (pHalData->UsbRxHighSpeedMode == _TRUE) + { + // 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. + // USB mode + pHalData->UsbRxAggBlockCount = 40; + pHalData->UsbRxAggBlockTimeout = 5; + // Mix mode + pHalData->UsbRxAggPageCount = 72; + pHalData->UsbRxAggPageTimeout = 6; + } + else + { + // USB mode + pHalData->UsbRxAggBlockCount = pMgntInfo->RegUsbRxAggBlockCount; + pHalData->UsbRxAggBlockTimeout = pMgntInfo->RegUsbRxAggBlockTimeout; + // Mix mode + pHalData->UsbRxAggPageCount = pMgntInfo->RegUsbRxAggPageCount; + pHalData->UsbRxAggPageTimeout = pMgntInfo->RegUsbRxAggPageTimeout; + } +#endif +#endif +} // USB_AggModeSwitch + +static VOID +_InitOperationMode( + IN PADAPTER Adapter + ) +{ +#if 0//gtest + PHAL_DATA_8192CUSB pHalData = GetHalData8192CUsb(Adapter); + u1Byte regBwOpMode = 0; + u4Byte regRATR = 0, regRRSR = 0; + + + //1 This part need to modified according to the rate set we filtered!! + // + // Set RRSR, RATR, and REG_BWOPMODE registers + // + switch(Adapter->RegWirelessMode) + { + case WIRELESS_MODE_B: + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK; + regRRSR = RATE_ALL_CCK; + break; + case WIRELESS_MODE_A: + ASSERT(FALSE); +#if 0 + regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; + regRATR = RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_OFDM_AG; +#endif + break; + case WIRELESS_MODE_G: + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + break; + case WIRELESS_MODE_AUTO: + if (Adapter->bInHctTest) + { + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + } + else + { + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + } + break; + case WIRELESS_MODE_N_24G: + // It support CCK rate by default. + // CCK rate will be filtered out only when associated AP does not support it. + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + break; + case WIRELESS_MODE_N_5G: + ASSERT(FALSE); +#if 0 + regBwOpMode = BW_OPMODE_5G; + regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_OFDM_AG; +#endif + break; + } + + // Ziv ???????? + //PlatformEFIOWrite4Byte(Adapter, REG_INIRTS_RATE_SEL, regRRSR); + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + + // For Min Spacing configuration. + switch(pHalData->RF_Type) + { + case RF_1T2R: + case RF_1T1R: + RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter: RF_Type%s\n", (pHalData->RF_Type==RF_1T1R? "(1T1R)":"(1T2R)"))); + Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3); + break; + case RF_2T2R: + case RF_2T2R_GREEN: + RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter:RF_Type(2T2R)\n")); + Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3); + break; + } + + rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, Adapter->MgntInfo.MinSpaceCfg); +#endif +} + +static VOID +_InitRFType( + IN PADAPTER Adapter + ) +{ + struct registry_priv *pregpriv = &Adapter->registrypriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; + return; +#endif + + pHalData->rf_chip = RF_6052; + + if(_FALSE == is92CU){ + pHalData->rf_type = RF_1T1R; + DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); + return; + } + + // TODO: Consider that EEPROM set 92CU to 1T1R later. + // Force to overwrite setting according to chip version. Ignore EEPROM setting. + //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; + MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); + +} + +static VOID _InitAdhocWorkaroundParams(IN PADAPTER Adapter) +{ +#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); + pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); + pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); + pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); +#endif +} + +// Set CCK and OFDM Block "ON" +static VOID _BBTurnOnBlock( + IN PADAPTER Adapter + ) +{ +#if (DISABLE_BB_RF) + return; +#endif + + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); +} + +#define MgntActSet_RF_State(...) +static void _RfPowerSave(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + struct pwrctrl_priv *pwrctrl; + rt_rf_power_state eRfPowerStateToSet; + u8 u1bTmp; + + +#if (DISABLE_BB_RF) + return; +#endif + + pHalData = GET_HAL_DATA(padapter); + pwrctrl = adapter_to_pwrctl(padapter); + + // + // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status + // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not + // call init_adapter. May cause some problem?? + // + // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed + // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState + // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. + // Added by tynli. 2010.03.30. + pwrctrl->rf_pwrstate = rf_on; + RT_CLEAR_PS_LEVEL(pwrctrl, RT_RF_OFF_LEVL_HALT_NIC); + //Added by chiyokolin, 2011.10.12 for Tx + rtw_write8(padapter, REG_TXPAUSE, 0x00); + + // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. + // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. +#if 1 + pwrctrl->b_hw_radio_off = _FALSE; + eRfPowerStateToSet = rf_on; +#else + eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(padapter); + pwrctrl->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW; + pwrctrl->rfoff_reason |= (pwrctrl->reg_rfoff) ? RF_CHANGE_BY_SW : 0; + + if (pwrctrl->rfoff_reason & RF_CHANGE_BY_HW) + pwrctrl->b_hw_radio_off = _TRUE; + + if (pwrctrl->reg_rfoff == _TRUE) + { + // User disable RF via registry. + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s: Turn off RF for RegRfOff\n", __FUNCTION__)); + MgntActSet_RF_State(padapter, rf_off, RF_CHANGE_BY_SW, _TRUE); + +// if (padapter->bSlaveOfDMSP) +// return; + } + else if (pwrctrl->rfoff_reason > RF_CHANGE_BY_PS) + { + // H/W or S/W RF OFF before sleep. + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason)); + MgntActSet_RF_State(padapter, rf_off, pwrctrl->rfoff_reason, _TRUE); + } + else + { + // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09. +#if 0 +// if (RT_GetInterfaceSelection(padapter)==INTF_SEL2_MINICARD && + if ((pHalData->BoardType == BOARD_MINICARD) && + (padapter->MgntInfo.PowerSaveControl.bGpioRfSw)) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet)); + if (eRfPowerStateToSet == rf_off) + { + MgntActSet_RF_State(padapter, rf_off, RF_CHANGE_BY_HW, _TRUE); + ppwrctrl->b_hw_radio_off = _TRUE; + } + else + { + ppwrctrl->rf_pwrstate = rf_off; + ppwrctrl->rfoff_reason = RF_CHANGE_BY_INIT; + ppwrctrl->b_hw_radio_off = _FALSE; + MgntActSet_RF_State(padapter, rf_on, ppwrctrl->rfoff_reason, _TRUE); + } + } + else +#endif + { + pwrctrl->rf_pwrstate = rf_off; + pwrctrl->rfoff_reason = RF_CHANGE_BY_INIT; + MgntActSet_RF_State(padapter, rf_on, pwrctrl->rfoff_reason, _TRUE); + } + + pwrctrl->rfoff_reason = 0; + pwrctrl->b_hw_radio_off = _FALSE; + pwrctrl->rf_pwrstate = rf_on; + if (padapter->ledpriv.LedControlHandler) + padapter->ledpriv.LedControlHandler(padapter, LED_CTL_POWER_ON); + } +#endif + // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. + // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. + if (pHalData->pwrdown && eRfPowerStateToSet == rf_off) + { + DBG_871X("%s pwrdown\n", __FUNCTION__); + // Enable register area 0x0-0xc. + rtw_write8(padapter, REG_RSV_CTRL, 0x0); + + // + // <Roger_Notes> We should configure HW PDn source for WiFi ONLY, and then + // our HW will be set in power-down mode if PDn source from all functions are configured. + // 2010.10.06. + // + u1bTmp = rtw_read8(padapter, REG_MULTI_FUNC_CTRL); + u1bTmp |= WL_HWPDN_EN; + rtw_write8(padapter, REG_MULTI_FUNC_CTRL, u1bTmp); + } +} + +enum { + Antenna_Lfet = 1, + Antenna_Right = 2, +}; + +// +// 2010/08/09 MH Add for power down check. +// +static BOOLEAN +HalDetectPwrDownMode( + IN PADAPTER Adapter + ) +{ + u8 tmpvalue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + + EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_OPT3, (u32 *)&tmpvalue); + + // 2010/08/25 MH INF priority > PDN Efuse value. + if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode) + { + pHalData->pwrdown = _TRUE; + } + else + { + pHalData->pwrdown = _FALSE; + } + + DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); + return pHalData->pwrdown; + +} // HalDetectPwrDownMode + + +// +// 2010/08/26 MH Add for selective suspend mode check. +// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and +// slim card. +// +static VOID +HalDetectSelectiveSuspendMode( + IN PADAPTER Adapter + ) +{ + u8 tmpvalue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); + + // If support HW radio detect, we need to enable WOL ability, otherwise, we + // can not use FW to notify host the power state switch. + + EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); + + DBG_8192C("HalDetectSelectiveSuspendMode(): SS "); + if(tmpvalue & BIT1) + { + DBG_8192C("Enable\n"); + } + else + { + DBG_8192C("Disable\n"); + pdvobjpriv->RegUsbSS = _FALSE; + } + + // 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. + if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) + { + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + //if (!pMgntInfo->bRegDongleSS) + //{ + // RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n")); + pdvobjpriv->RegUsbSS = _FALSE; + //} + } +} // HalDetectSelectiveSuspendMode +/*----------------------------------------------------------------------------- + * Function: HwSuspendModeEnable92Cu() + * + * Overview: HW suspend mode switch. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 08/23/2010 MHC HW suspend mode switch test.. + *---------------------------------------------------------------------------*/ +static VOID +HwSuspendModeEnable92Cu( + IN PADAPTER pAdapter, + IN u8 Type + ) +{ + //PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(pAdapter); + u16 reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG); + + //if (!pDevice->RegUsbSS) + { + return; + } + + // + // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW + // to enter suspend mode automatically. Otherwise, it will shut down major power + // domain and 8051 will stop. When we try to enter selective suspend mode, we + // need to prevent HW to enter D2 mode aumotmatically. Another way, Host will + // issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli). + // We need to enable HW suspend mode when enter S3/S4 or disable. We need + // to disable HW suspend mode for IPS/radio_off. + // + //RT_TRACE(COMP_RF, DBG_LOUD, ("HwSuspendModeEnable92Cu = %d\n", Type)); + if (Type == _FALSE) + { + reg |= BIT14; + //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + reg |= BIT12; + //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + } + else + { + reg &= (~BIT12); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + reg &= (~BIT14); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + } + +} // HwSuspendModeEnable92Cu +rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 val8; + rt_rf_power_state rfpowerstate = rf_off; + + if(adapter_to_pwrctl(pAdapter)->bHWPowerdown) + { + val8 = rtw_read8(pAdapter, REG_HSISR); + DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8); + rfpowerstate = (val8 & BIT7) ? rf_off: rf_on; + } + else // rf on/off + { + rtw_write8( pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3)); + val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); + DBG_8192C("GPIO_IN=%02x\n", val8); + rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; + } + return rfpowerstate; +} // HalDetectPwrDownMode + +void _ps_open_RF(_adapter *padapter); + +u32 rtl8723au_hal_init(PADAPTER Adapter) +{ + u8 val8 = 0; + u32 boundary, status = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u8 is92C = IS_92C_SERIAL(pHalData->VersionID); + rt_rf_power_state eRfPowerStateToSet; + u32 NavUpper = WiFiNavUpperUs; + + u32 init_start_time = rtw_get_current_time(); + + +#ifdef DBG_HAL_INIT_PROFILING + + enum HAL_INIT_STAGES { + HAL_INIT_STAGES_BEGIN = 0, + HAL_INIT_STAGES_INIT_PW_ON, + HAL_INIT_STAGES_INIT_LLTT, + HAL_INIT_STAGES_MISC01, + HAL_INIT_STAGES_DOWNLOAD_FW, + HAL_INIT_STAGES_MAC, + HAL_INIT_STAGES_BB, + HAL_INIT_STAGES_RF, + HAL_INIT_STAGES_MISC02, + HAL_INIT_STAGES_TURN_ON_BLOCK, + HAL_INIT_STAGES_INIT_SECURITY, + HAL_INIT_STAGES_MISC11, + //HAL_INIT_STAGES_RF_PS, + HAL_INIT_STAGES_IQK, + HAL_INIT_STAGES_PW_TRACK, + HAL_INIT_STAGES_LCK, + HAL_INIT_STAGES_MISC21, + //HAL_INIT_STAGES_INIT_PABIAS, + #ifdef CONFIG_BT_COEXIST + HAL_INIT_STAGES_BT_COEXIST, + #endif + //HAL_INIT_STAGES_ANTENNA_SEL, + HAL_INIT_STAGES_INIT_HAL_DM, + HAL_INIT_STAGES_MISC31, + HAL_INIT_STAGES_END, + HAL_INIT_STAGES_NUM + }; + + char * hal_init_stages_str[] = { + "HAL_INIT_STAGES_BEGIN", + "HAL_INIT_STAGES_INIT_PW_ON", + "HAL_INIT_STAGES_INIT_LLTT", + "HAL_INIT_STAGES_MISC01", + "HAL_INIT_STAGES_DOWNLOAD_FW", + "HAL_INIT_STAGES_MAC", + "HAL_INIT_STAGES_BB", + "HAL_INIT_STAGES_RF", + "HAL_INIT_STAGES_MISC02", + "HAL_INIT_STAGES_TURN_ON_BLOCK", + "HAL_INIT_STAGES_INIT_SECURITY", + "HAL_INIT_STAGES_MISC11", + //"HAL_INIT_STAGES_RF_PS", + "HAL_INIT_STAGES_IQK", + "HAL_INIT_STAGES_PW_TRACK", + "HAL_INIT_STAGES_LCK", + "HAL_INIT_STAGES_MISC21", + //"HAL_INIT_STAGES_INIT_PABIAS", + #ifdef CONFIG_BT_COEXIST + "HAL_INIT_STAGES_BT_COEXIST", + #endif + //"HAL_INIT_STAGES_ANTENNA_SEL", + "HAL_INIT_STAGES_INIT_HAL_DM", + "HAL_INIT_STAGES_MISC31", + "HAL_INIT_STAGES_END", + }; + + int hal_init_profiling_i; + u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point + + for(hal_init_profiling_i=0;hal_init_profiling_i<HAL_INIT_STAGES_NUM;hal_init_profiling_i++) + hal_init_stages_timestamp[hal_init_profiling_i]=0; + + #define HAL_INIT_PROFILE_TAG(stage) hal_init_stages_timestamp[(stage)]=rtw_get_current_time(); +#else + #define HAL_INIT_PROFILE_TAG(stage) do {} while(0) +#endif //DBG_HAL_INIT_PROFILING + + + +_func_enter_; + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN); + if(pwrctrlpriv->bkeepfwalive) + { + _ps_open_RF(Adapter); + + if(pHalData->bIQKInitialized ){ + rtl8192c_PHY_IQCalibrate(Adapter,_TRUE); + } + else{ + rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); + pHalData->bIQKInitialized = _TRUE; + } + rtl8192c_odm_CheckTXPowerTracking(Adapter); + rtl8192c_PHY_LCCalibrate(Adapter); + + goto exit; + } + +// pHalData->bMACFuncEnable = _FALSE; + // Check if MAC has already power on. by tynli. 2011.05.27. + val8 = rtw_read8(Adapter, REG_CR); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, + ("%s: REG_CR 0x100=0x%02x\n", __FUNCTION__, val8)); + //Fix 92DU-VC S3 hang with the reason is that secondary mac is not initialized. + //0x100 value of first mac is 0xEA while 0x100 value of secondary is 0x00 + //by sherry 20111102 + if (val8 == 0xEA) { + pHalData->bMACFuncEnable = _FALSE; + } else { + pHalData->bMACFuncEnable = _TRUE; + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, + ("%s: MAC has already power on\n", __FUNCTION__)); + } + +#if 0 + if(bSupportRemoteWakeUp && Adapter->bWakeFromPnpSleep && pHalData->bMACFuncEnable) + { + if(IS_HARDWARE_TYPE_8723AU(Adapter)) + { + FW_CTRL_PS_MODE FwPwrMode = FW_PS_ACTIVE_MODE; + + pHalData->H2CStopInsertQueue = FALSE; + + if(pMgntInfo->mAssoc && + pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && + (pMgntInfo->PowerSaveControl.WoWLANLPSLevel > 0)) + { + RT_TRACE(COMP_POWER, DBG_LOUD, ("FwLPS: Active!!\n")); + rtw_hal_set_hwreg(Adapter, HW_VAR_H2C_FW_PWRMODE, (pu1Byte)(&FwPwrMode)); + } + + HalSetFWWoWlanMode92C(Adapter, FALSE); + + // Clear WoWLAN event FTISR[WWLAN_INT_EN]. + if(IS_FW_8723A(Adapter) && Adapter->MgntInfo.FirmwareVersion < 10) + { + // Fw revises the bug after version 10. + value8 = rtw_read8(Adapter, REG_FTISR+3); + rtw_write8(Adapter, REG_FTISR+3, value8|BIT2); + } + + SimpleInitializeAdapter8192CUsb(Adapter); + + pMgntInfo->init_adpt_in_progress = FALSE; + return RT_STATUS_SUCCESS; + } + } +#endif + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); + status = _InitPowerOn(Adapter); + if(status == _FAIL){ + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n")); + goto exit; + } + +#ifdef CONFIG_BT_COEXIST + // + // 2010/09/23 MH Accordgin to Alfred's siggestion. we need to enable SIC to prevent HW + // to enter suspend mode automatically. If host does not send SOF every 3ms. Or under DTM + // test with rtl8188cu selective suspend enabler filter driver, WIN host will trigger the device to + // enter suspend mode after some test (unknow reason now). We need to prevent the case otherwise + // the register will be 0xea and all TX/RX path stop accidently. + // + // + // 2010/10/01 MH If the OS is XP, host will trigger USB device to enter D3 mode. In CU HW design + // it will enter suspend mode automatically. In slim combo card, the BT clock will be cut off if HW + // enter suspend mode. We need to seperate differet case. + // + if (BT_IsBtExist(Adapter)) + { +#if 0 +#if OS_WIN_FROM_VISTA(OS_VERSION) + RT_TRACE(COMP_INIT, DBG_LOUD, ("Slim_combo win7/vista need not enable SIC\n")); +#else + RT_TRACE(COMP_INIT, DBG_LOUD, ("Slim_combo XP enable SIC\n")); + // 2010/10/15 MH According to Alfre's description, e need to enable bit14 at first an then enable bit12. + // Otherwise, HW will enter debug mode and 8051 can not work. We need to stay at test mode to enable SIC. + rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)|BIT14); + rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)|BIT12); +#endif +#endif + } +#endif // CONFIG_BT_COEXIST + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); + if (!pregistrypriv->wifi_spec) { + boundary = TX_PAGE_BOUNDARY; + } else { + // for WMM + boundary = WMM_NORMAL_TX_PAGE_BOUNDARY; + } + + if (!pHalData->bMACFuncEnable) + { + status = InitLLTTable(Adapter, boundary); + if(status == _FAIL){ + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n")); + goto exit; + } + } + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); + if(pHalData->bRDGEnable){ + _InitRDGSetting(Adapter); + } + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); +#if (1 == MP_DRIVER) +if (Adapter->registrypriv.mp_mode == 1) +{ + _InitRxSetting(Adapter); + // Don't Download Firmware + Adapter->bFWReady = _FALSE; +} +//else +#endif +{ + status = rtl8723a_FirmwareDownload(Adapter); + if(status != _SUCCESS) + { + Adapter->bFWReady = _FALSE; + pHalData->fw_ractrl = _FALSE; + DBG_8192C("fw download fail!\n"); + goto exit; + } + else + { + Adapter->bFWReady = _TRUE; + pHalData->fw_ractrl = _TRUE; + DBG_8192C("fw download ok!\n"); + } +} + + rtl8723a_InitializeFirmwareVars(Adapter); + + if(pwrctrlpriv->reg_rfoff == _TRUE){ + pwrctrlpriv->rf_pwrstate = rf_off; + } + + // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting + // HW GPIO pin. Before PHY_RFConfig8192C. + //HalDetectPwrDownMode(Adapter); + // 2010/08/26 MH If Efuse does not support sective suspend then disable the function. + //HalDetectSelectiveSuspendMode(Adapter); + + // Set RF type for BB/RF configuration + _InitRFType(Adapter);//->_ReadRFType() + + // Save target channel + // <Roger_Notes> Current Channel will be updated again later. + pHalData->CurrentChannel = 6;//default set to 6 + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); +#if (HAL_MAC_ENABLE == 1) + status = PHY_MACConfig8723A(Adapter); + if(status == _FAIL) + { + DBG_8192C("PHY_MACConfig8723A fault !!\n"); + goto exit; + } +#endif + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); + // + //d. Initialize BB related configurations. + // +#if (HAL_BB_ENABLE == 1) + status = PHY_BBConfig8723A(Adapter); + if(status == _FAIL) + { + DBG_8192C("PHY_BBConfig8723A fault !!\n"); + goto exit; + } +#endif + + // + // 2011/11/15 MH Add for tx power by rate fine tune. We need to call the function after BB config. + // Because the tx power by rate table is inited in BB config. + // +// HAL_AdjustPwrIndexDiffRateOffset(Adapter); +// HAL_AdjustPwrIndexbyRegistry(Adapter); + +#if 0 + // The FW command register update must after MAC and FW init ready. + if (Adapter->bFWReady == TRUE) + { + if(pDevice->RegUsbSS) + { + u1Byte u1H2CSSRf[3]={0}; + + SET_H2CCMD_SELECTIVE_SUSPEND_ROF_CMD_ON(u1H2CSSRf, 1); + SET_H2CCMD_SELECTIVE_SUSPEND_ROF_CMD_GPIO_PERIOD(u1H2CSSRf, 500); + + FillH2CCmd92C(Adapter, H2C_SELECTIVE_SUSPEND_ROF_CMD, 3, u1H2CSSRf); + RT_TRACE(COMP_INIT, DBG_LOUD, + ("SS Set H2C_CMD for FW detect GPIO time=%d\n", GET_H2CCMD_SELECTIVE_SUSPEND_ROF_CMD_GPIO_PERIOD(u1H2CSSRf))); + } + else + RT_TRACE(COMP_INIT, DBG_LOUD, ("Non-SS Driver detect GPIO by itself\n")); + } + else + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("Adapter->bFWReady == FALSE\n")); + // 2011/02/11 MH If FW is not ready, we can not enter seecitve suspend mode, otherwise, + // We can not support GPIO/PBC detection by FW with selectiev suspend support. + pDevice->RegUsbSS = FALSE; + } +#endif + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); +#if (HAL_RF_ENABLE == 1) + status = PHY_RFConfig8723A(Adapter); + if(status == _FAIL) + { + DBG_8192C("PHY_RFConfig8723A fault !!\n"); + goto exit; + } + + //reducing 80M spur + PHY_SetBBReg(Adapter, RF_T_METER, bMaskDWord, 0x0381808d); + PHY_SetBBReg(Adapter, RF_SYN_G4, bMaskDWord, 0xf2ffff83); + PHY_SetBBReg(Adapter, RF_SYN_G4, bMaskDWord, 0xf2ffff82); + PHY_SetBBReg(Adapter, RF_SYN_G4, bMaskDWord, 0xf2ffff83); + + //RFSW Control + PHY_SetBBReg(Adapter, rFPGA0_TxInfo, bMaskDWord, 0x00000003); //0x804[14]=0 + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, 0x07000760); //0x870[6:5]=b'11 + PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, 0x66F60210); //0x860[6:5]=b'00 + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: 0x870 = value 0x%x\n", __FUNCTION__, PHY_QueryBBReg(Adapter, 0x870, bMaskDWord))); + +#endif + + // + // Joseph Note: Keep RfRegChnlVal for later use. + // + pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask); + pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask); + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); + if (!pHalData->bMACFuncEnable) { + _InitQueueReservedPage(Adapter); + _InitTxBufferBoundary(Adapter); + } + _InitQueuePriority(Adapter); + _InitPageBoundary(Adapter); + _InitTransferPageSize(Adapter); + + // Get Rx PHY status in order to report RSSI and others. + _InitDriverInfoSize(Adapter, DRVINFO_SZ); + + _InitInterrupt(Adapter); + hal_init_macaddr(Adapter);//set mac_address + _InitNetworkType(Adapter);//set msr + _InitWMACSetting(Adapter); + _InitAdaptiveCtrl(Adapter); + _InitEDCA(Adapter); + _InitRateFallback(Adapter); + _InitRetryFunction(Adapter); + InitUsbAggregationSetting(Adapter); + _InitOperationMode(Adapter);//todo + rtl8723a_InitBeaconParameters(Adapter); + rtl8723a_InitBeaconMaxError(Adapter, _TRUE); + +#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING + _InitAdhocWorkaroundParams(Adapter); +#endif + + _InitHardwareDropIncorrectBulkOut(Adapter); + +#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) + +#ifdef CONFIG_CHECK_AC_LIFETIME + // Enable lifetime check for the four ACs + rtw_write8(Adapter, REG_LIFETIME_EN, 0x0F); +#endif // CONFIG_CHECK_AC_LIFETIME + +#ifdef CONFIG_TX_MCAST2UNI + rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms + rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms +#else // CONFIG_TX_MCAST2UNI + rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s + rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s +#endif // CONFIG_TX_MCAST2UNI +#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI + + +#ifdef CONFIG_LED + _InitHWLed(Adapter); +#endif //CONFIG_LED + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); + _BBTurnOnBlock(Adapter); + //NicIFSetMacAddress(padapter, padapter->PermanentAddress); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); + invalidate_cam_all(Adapter); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); + // 2010/12/17 MH We need to set TX power according to EFUSE content at first. + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + + rtl8723a_InitAntenna_Selection(Adapter); + + // HW SEQ CTRL + //set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. + rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); + + // + // Disable BAR, suggested by Scott + // 2010.04.09 add by hpfan + // + rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); + + if(pregistrypriv->wifi_spec) + rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0); + + // Move by Neo for USB SS from above setp + _RfPowerSave(Adapter); + +#if (MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) + { + Adapter->mppriv.channel = pHalData->CurrentChannel; + MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); + } + else +#endif + { + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + // 2010/08/26 MH Merge from 8192CE. + //sherry masked that it has been done in _RfPowerSave + //20110927 + //recovery for 8192cu and 9723Au 20111017 + if(pwrctrlpriv->rf_pwrstate == rf_on) + { + if(pHalData->bIQKInitialized ){ + rtl8192c_PHY_IQCalibrate(Adapter,_TRUE); + } else { + rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); + pHalData->bIQKInitialized = _TRUE; + } + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); + rtl8192c_odm_CheckTXPowerTracking(Adapter); + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); + rtl8192c_PHY_LCCalibrate(Adapter); + +#ifdef CONFIG_BT_COEXIST + rtl8723a_SingleDualAntennaDetection(Adapter); +#endif + } + } + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21); +#ifdef USB_INTERFERENCE_ISSUE + //fixed USB interface interference issue + rtw_write8(Adapter, 0xfe40, 0xe0); + rtw_write8(Adapter, 0xfe41, 0x8d); + rtw_write8(Adapter, 0xfe42, 0x80); + rtw_write32(Adapter,0x20c,0xfd0320); +#if 1 + //2011/01/07 ,suggest by Johnny,for solved the problem that too many protocol error on USB bus + if(!IS_81xxC_VENDOR_UMC_A_CUT(pHalData->VersionID) )//&& !IS_92C_SERIAL(pHalData->VersionID))// TSMC , 8188 + { + // 0xE6=0x94 + rtw_write8(Adapter, 0xFE40, 0xE6); + rtw_write8(Adapter, 0xFE41, 0x94); + rtw_write8(Adapter, 0xFE42, 0x80); + + // 0xE0=0x19 + rtw_write8(Adapter, 0xFE40, 0xE0); + rtw_write8(Adapter, 0xFE41, 0x19); + rtw_write8(Adapter, 0xFE42, 0x80); + + // 0xE5=0x91 + rtw_write8(Adapter, 0xFE40, 0xE5); + rtw_write8(Adapter, 0xFE41, 0x91); + rtw_write8(Adapter, 0xFE42, 0x80); + + // 0xE2=0x81 + rtw_write8(Adapter, 0xFE40, 0xE2); + rtw_write8(Adapter, 0xFE41, 0x81); + rtw_write8(Adapter, 0xFE42, 0x80); + + } + +#endif +#endif //USB_INTERFERENCE_ISSUE + +//HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); +// _InitPABias(Adapter); + +#ifdef CONFIG_BT_COEXIST +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST); + // Init BT hw config. + BT_InitHwConfig(Adapter); +#endif + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); + rtl8723a_InitHalDm(Adapter); + +#if 0 + // 2010/05/20 MH We need to init timer after update setting. Otherwise, we can not get correct inf setting. + // 2010/05/18 MH For SE series only now. Init GPIO detect time + if(pDevice->RegUsbSS) + { + RT_TRACE(COMP_INIT, DBG_LOUD, (" call GpioDetectTimerStart8192CU\n")); + GpioDetectTimerStart8192CU(Adapter); // Disable temporarily + } + + // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter + // suspend mode automatically. + HwSuspendModeEnable92Cu(Adapter, _FALSE); +#endif + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); + rtw_hal_set_hwreg(Adapter, HW_VAR_NAV_UPPER, (u8*)&NavUpper); + + // 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. + if (!IS_HARDWARE_TYPE_8192DU(Adapter) && ((rtw_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) != 0x83000000)) + { + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1); + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: IQK fail recorver\n", __FUNCTION__)); + } + else + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: IQK OK\n", __FUNCTION__)); + } + +#ifdef CONFIG_XMIT_ACK + //ack for xmit mgmt frames. + rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); +#endif //CONFIG_XMIT_ACK + + //_dbg_dump_macreg(padapter); + +exit: +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); + + DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); + + #ifdef DBG_HAL_INIT_PROFILING + hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); + + for(hal_init_profiling_i=0;hal_init_profiling_i<HAL_INIT_STAGES_NUM-1;hal_init_profiling_i++) { + DBG_871X("DBG_HAL_INIT_PROFILING: %35s, %u, %5u, %5u\n" + , hal_init_stages_str[hal_init_profiling_i] + , hal_init_stages_timestamp[hal_init_profiling_i] + , (hal_init_stages_timestamp[hal_init_profiling_i+1]-hal_init_stages_timestamp[hal_init_profiling_i]) + , rtw_get_time_interval_ms(hal_init_stages_timestamp[hal_init_profiling_i], hal_init_stages_timestamp[hal_init_profiling_i+1]) + ); + } + #endif + +_func_exit_; + + return status; +} + + +#define SYNC_SD7_20110802_phy_SsPwrSwitch92CU +#ifdef SYNC_SD7_20110802_phy_SsPwrSwitch92CU +VOID +phy_SsPwrSwitch92CU( + IN PADAPTER Adapter, + IN rt_rf_power_state eRFPowerState, + IN int bRegSSPwrLvl + ) +{ + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 value8; + + switch( eRFPowerState ) + { + case rf_on: + if (bRegSSPwrLvl == 1) + { + // 1. Enable MAC Clock. Can not be enabled now. + //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3)); + + // 2. Force PWM, Enable SPS18_LDO_Marco_Block + rtw_write8(Adapter, REG_SPS0_CTRL, + rtw_read8(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3)); + + // 3. restore BB, AFE control register. + //RF + if (pHalData->rf_type == RF_2T2R) + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1); + else + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1); + PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0); + + //AFE + //DbgPrint("0x0e70 = %x\n", Adapter->PS_BBRegBackup[PSBBREG_AFE0]); + //PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,Adapter->PS_BBRegBackup[PSBBREG_AFE0] ); + //PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,0x631B25A0 ); + if (pHalData->rf_type == RF_2T2R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 ); + else if (pHalData->rf_type == RF_1T1R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 ); + + // 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode. + // We can only prvide a usual value instead and then HW will modify the value by itself. + PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0x32D95); + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0x32D95); + } + } + else // Level 2 or others. + { + //h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL + rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x81); + + // i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK + rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x800F); + rtw_mdelay_os(1); + + // 1. Enable MAC Clock. Can not be enabled now. + //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3)); + + // 2. Force PWM, Enable SPS18_LDO_Marco_Block + rtw_write8(Adapter, REG_SPS0_CTRL, + rtw_read8(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3)); + + // 3. restore BB, AFE control register. + //RF + if (pHalData->rf_type == RF_2T2R) + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1); + else + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1); + PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0); + + //AFE + if (pHalData->rf_type == RF_2T2R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 ); + else if (pHalData->rf_type == RF_1T1R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 ); + + // 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode. + // We can only prvide a usual value instead and then HW will modify the value by itself. + PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0x32D95); + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0x32D95); + } + + // 5. gated MAC Clock + //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); + //rtw_write8(Adapter, REG_SYS_CLKR+1, rtw_read8(Adapter, REG_SYS_CLKR+1)|(BIT3)); + + { + //u8 eRFPath = RF_PATH_A,value8 = 0, retry = 0; + u8 bytetmp; + //PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); + // 2010/08/12 MH Add for B path under SS test. + //if (pHalData->RF_Type == RF_2T2R) + //PHY_SetRFReg(Adapter, RF_PATH_B, 0x0, bMaskByte0, 0x0); + + bytetmp = rtw_read8(Adapter, REG_APSD_CTRL); + rtw_write8(Adapter, REG_APSD_CTRL, bytetmp & ~BIT6); + + rtw_mdelay_os(10); + + // Set BB reset at first + rtw_write8(Adapter, REG_SYS_FUNC_EN, 0x17 );//0x16 + + // Enable TX + rtw_write8(Adapter, REG_TXPAUSE, 0x0); + } + //CardSelectiveSuspendLeave(Adapter); + } + + break; + + case rf_sleep: + case rf_off: + value8 = rtw_read8(Adapter, REG_SPS0_CTRL) ; + if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) + value8 &= ~(BIT0); + else + value8 &= ~(BIT0|BIT3); + if (bRegSSPwrLvl == 1) + { + RT_TRACE(_module_hal_init_c_, _drv_err_, ("SS LVL1\n")); + // Disable RF and BB only for SelectSuspend. + + // 1. Set BB/RF to shutdown. + // (1) Reg878[5:3]= 0 // RF rx_code for preamble power saving + // (2)Reg878[21:19]= 0 //Turn off RF-B + // (3) RegC04[7:4]= 0 // turn off all paths for packet detection + // (4) Reg800[1] = 1 // enable preamble power saving + pwrctl->PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord); + pwrctl->PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord); + pwrctl->PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord); + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0); + } + else if (pHalData->rf_type == RF_1T1R) + { + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0); + } + PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1); + + // 2 .AFE control register to power down. bit[30:22] + pwrctl->PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord); + if (pHalData->rf_type == RF_2T2R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0); + else if (pHalData->rf_type == RF_1T1R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0); + + // 3. issue 3-wire command that RF set to power down. + PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0); + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0); + } + + // 4. Force PFM , disable SPS18_LDO_Marco_Block + rtw_write8(Adapter, REG_SPS0_CTRL, value8); + + // 5. gated MAC Clock + //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); + } + else // Level 2 or others. + { + RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL2\n")); + { + u8 eRFPath = RF_PATH_A,value8 = 0; + rtw_write8(Adapter, REG_TXPAUSE, 0xFF); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); + // 2010/08/12 MH Add for B path under SS test. + //if (pHalData->RF_Type == RF_2T2R) + //PHY_SetRFReg(Adapter, RF_PATH_B, 0x0, bMaskByte0, 0x0); + + value8 |= APSDOFF; + rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40 + + // After switch APSD, we need to delay for stability + rtw_mdelay_os(10); + + // Set BB reset at first + value8 = 0 ; + value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); + rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16 + } + + // Disable RF and BB only for SelectSuspend. + + // 1. Set BB/RF to shutdown. + // (1) Reg878[5:3]= 0 // RF rx_code for preamble power saving + // (2)Reg878[21:19]= 0 //Turn off RF-B + // (3) RegC04[7:4]= 0 // turn off all paths for packet detection + // (4) Reg800[1] = 1 // enable preamble power saving + pwrctl->PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord); + pwrctl->PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord); + pwrctl->PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord); + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0); + } + else if (pHalData->rf_type == RF_1T1R) + { + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0); + } + PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1); + + // 2 .AFE control register to power down. bit[30:22] + pwrctl->PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord); + if (pHalData->rf_type == RF_2T2R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0); + else if (pHalData->rf_type == RF_1T1R) + PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0); + + // 3. issue 3-wire command that RF set to power down. + PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0); + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0); + } + + // 4. Force PFM , disable SPS18_LDO_Marco_Block + rtw_write8(Adapter, REG_SPS0_CTRL, value8); + + // 2010/10/13 MH/Isaachsu exchange sequence. + //h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL + rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80); + rtw_mdelay_os(1); + + // i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK + rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0xA80F); + + // 5. gated MAC Clock + //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); + //rtw_write8(Adapter, REG_SYS_CLKR+1, rtw_read8(Adapter, REG_SYS_CLKR+1)& ~(BIT3)) + + //CardSelectiveSuspendEnter(Adapter); + } + + break; + + default: + break; + } + +} // phy_PowerSwitch92CU + +void _ps_open_RF(_adapter *padapter) { + //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified + phy_SsPwrSwitch92CU(padapter, rf_on, 1); +} + +void _ps_close_RF(_adapter *padapter){ + //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified + phy_SsPwrSwitch92CU(padapter, rf_off, 1); +} +#endif //SYNC_SD7_20110802_phy_SsPwrSwitch92CU + + + +static VOID +_DisableGPIO( + IN PADAPTER Adapter + ) +{ +/*************************************** +j. GPIO_PIN_CTRL 0x44[31:0]=0x000 // +k. Value = GPIO_PIN_CTRL[7:0] +l. GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); //write external PIN level +m. GPIO_MUXCFG 0x42 [15:0] = 0x0780 +n. LEDCFG 0x4C[15:0] = 0x8080 +***************************************/ + u8 value8; + u16 value16; + u32 value32; + + //1. Disable GPIO[7:0] + rtw_write16(Adapter, REG_GPIO_PIN_CTRL+2, 0x0000); + value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF; + value8 = (u8) (value32&0x000000FF); + value32 |= ((value8<<8) | 0x00FF0000); + rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32); + + //2. Disable GPIO[10:8] + rtw_write8(Adapter, REG_GPIO_MUXCFG+3, 0x00); + value16 = rtw_read16(Adapter, REG_GPIO_MUXCFG+2) & 0xFF0F; + value8 = (u8) (value16&0x000F); + value16 |= ((value8<<4) | 0x0780); + rtw_write16(Adapter, REG_GPIO_MUXCFG+2, value16); + + //3. Disable LED0 & 1 + rtw_write16(Adapter, REG_LEDCFG0, 0x8080); + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n")); + +} //end of _DisableGPIO() + +static VOID +_ResetFWDownloadRegister( + IN PADAPTER Adapter + ) +{ + u32 value32; + + value32 = rtw_read32(Adapter, REG_MCUFWDL); + value32 &= ~(MCUFWDL_EN | MCUFWDL_RDY); + rtw_write32(Adapter, REG_MCUFWDL, value32); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset FW download register.\n")); +} + + +static int +_DisableRF_AFE( + IN PADAPTER Adapter + ) +{ + int rtStatus = _SUCCESS; + u32 pollingCount = 0; + u8 value8; + + //disable RF/ AFE AD/DA + value8 = APSDOFF; + rtw_write8(Adapter, REG_APSD_CTRL, value8); + + +#if (RTL8192CU_ASIC_VERIFICATION) + + do + { + if(rtw_read8(Adapter, REG_APSD_CTRL) & APSDOFF_STATUS){ + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE, AD, DA Done!\n")); + break; + } + + if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){ + //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Failed to polling APSDOFF_STATUS done!\n")); + return _FAIL; + } + + }while(_TRUE); + +#endif + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE,AD, DA.\n")); + return rtStatus; + +} + +static VOID +_ResetBB( + IN PADAPTER Adapter + ) +{ + u16 value16; + + //reset BB + value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); + value16 &= ~(FEN_BBRSTB | FEN_BB_GLB_RSTn); + rtw_write16(Adapter, REG_SYS_FUNC_EN, value16); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset BB.\n")); +} + +static VOID +_ResetMCU( + IN PADAPTER Adapter + ) +{ + u16 value16; + + // reset MCU + value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); + value16 &= ~FEN_CPUEN; + rtw_write16(Adapter, REG_SYS_FUNC_EN, value16); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset MCU.\n")); +} + +static VOID +_DisableMAC_AFE_PLL( + IN PADAPTER Adapter + ) +{ + u32 value32; + + //disable MAC/ AFE PLL + value32 = rtw_read32(Adapter, REG_APS_FSMCO); + value32 |= APDM_MAC; + rtw_write32(Adapter, REG_APS_FSMCO, value32); + + value32 |= APFM_OFF; + rtw_write32(Adapter, REG_APS_FSMCO, value32); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable MAC, AFE PLL.\n")); +} + +static VOID +_AutoPowerDownToHostOff( + IN PADAPTER Adapter + ) +{ + u32 value32; + rtw_write8(Adapter, REG_SPS0_CTRL, 0x22); + + value32 = rtw_read32(Adapter, REG_APS_FSMCO); + + value32 |= APDM_HOST;//card disable + rtw_write32(Adapter, REG_APS_FSMCO, value32); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Auto Power Down to Host-off state.\n")); + + // set USB suspend + value32 = rtw_read32(Adapter, REG_APS_FSMCO); + value32 &= ~AFSM_PCIE; + rtw_write32(Adapter, REG_APS_FSMCO, value32); + +} + +static VOID +_SetUsbSuspend( + IN PADAPTER Adapter + ) +{ + u32 value32; + + value32 = rtw_read32(Adapter, REG_APS_FSMCO); + + // set USB suspend + value32 |= AFSM_HSUS; + rtw_write32(Adapter, REG_APS_FSMCO, value32); + + //RT_ASSERT(0 == (rtw_read32(Adapter, REG_APS_FSMCO) & BIT(12)),("")); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Set USB suspend.\n")); + +} + +static VOID +_DisableRFAFEAndResetBB( + IN PADAPTER Adapter + ) +{ +/************************************** +a. TXPAUSE 0x522[7:0] = 0xFF //Pause MAC TX queue +b. RF path 0 offset 0x00 = 0x00 // disable RF +c. APSD_CTRL 0x600[7:0] = 0x40 +d. SYS_FUNC_EN 0x02[7:0] = 0x16 //reset BB state machine +e. SYS_FUNC_EN 0x02[7:0] = 0x14 //reset BB state machine +***************************************/ + u8 eRFPath = 0,value8 = 0; + rtw_write8(Adapter, REG_TXPAUSE, 0xFF); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); + + value8 |= APSDOFF; + rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40 + + value8 = 0 ; + value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); + rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16 + + value8 &=( ~FEN_BB_GLB_RSTn ); + rtw_write8(Adapter, REG_SYS_FUNC_EN, value8); //0x14 + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n")); +} + +static VOID +_ResetDigitalProcedure1( + IN PADAPTER Adapter, + IN BOOLEAN bWithoutHWSM + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(pHalData->FirmwareVersion <= 0x20){ + #if 0 + /***************************** + f. SYS_FUNC_EN 0x03[7:0]=0x54 // reset MAC register, DCORE + g. MCUFWDL 0x80[7:0]=0 // reset MCU ready status + ******************************/ + u4Byte value32 = 0; + PlatformIOWrite1Byte(Adapter, REG_SYS_FUNC_EN+1, 0x54); + PlatformIOWrite1Byte(Adapter, REG_MCUFWDL, 0); + #else + /***************************** + f. MCUFWDL 0x80[7:0]=0 // reset MCU ready status + g. SYS_FUNC_EN 0x02[10]= 0 // reset MCU register, (8051 reset) + h. SYS_FUNC_EN 0x02[15-12]= 5 // reset MAC register, DCORE + i. SYS_FUNC_EN 0x02[10]= 1 // enable MCU register, (8051 enable) + ******************************/ + u16 valu16 = 0; + rtw_write8(Adapter, REG_MCUFWDL, 0); + + valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); + rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));//reset MCU ,8051 + + valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN)&0x0FFF; + rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 |(FEN_HWPDN|FEN_ELDR)));//reset MAC + + #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE + { + u8 val; + if( (val=rtw_read8(Adapter, REG_MCUFWDL))) + DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); + } + #endif + + + valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); + rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));//enable MCU ,8051 + + + #endif + } + else{ + u8 retry_cnts = 0; + + if(rtw_read8(Adapter, REG_MCUFWDL) & BIT1) + { //IF fw in RAM code, do reset + + rtw_write8(Adapter, REG_MCUFWDL, 0); + if(Adapter->bFWReady){ + // 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other + // HRCV INT to influence 8051 reset. + rtw_write8(Adapter, REG_FWIMR, 0x20); + + rtw_write8(Adapter, REG_HMETFR+3, 0x20);//8051 reset by self + + while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(Adapter, REG_SYS_FUNC_EN))) + { + rtw_udelay_os(50);//PlatformStallExecution(50);//us + } + + if(retry_cnts >= 100){ + DBG_8192C("%s #####=> 8051 reset failed!.........................\n", __FUNCTION__); + // if 8051 reset fail we trigger GPIO 0 for LA + //PlatformEFIOWrite4Byte( Adapter, + // REG_GPIO_PIN_CTRL, + // 0x00010100); + // 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly. + rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x50); //Reset MAC and Enable 8051 + rtw_mdelay_os(10); + } + else { + //DBG_871X("%s =====> 8051 reset success (%d) .\n", __FUNCTION__, retry_cnts); + } + } + else { + DBG_871X("%s =====> 8051 in RAM but !Adapter->bFWReady\n", __FUNCTION__); + } + } + else{ + //DBG_871X("%s =====> 8051 in ROM.\n", __FUNCTION__); + } + + #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE + { + u8 val; + if( (val=rtw_read8(Adapter, REG_MCUFWDL))) + DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); + } + #endif + + rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x54); //Reset MAC and Enable 8051 + } + + // Clear rpwm value for initial toggle bit trigger. + rtw_write8(Adapter, REG_USB_HRPWM, 0x00); + + if(bWithoutHWSM){ + /***************************** + Without HW auto state machine + g. SYS_CLKR 0x08[15:0] = 0x30A3 //disable MAC clock + h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL + i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK + j. SYS_ISO_CTRL 0x00[7:0] = 0xF9 // isolated digital to PON + ******************************/ + //rtw_write16(Adapter, REG_SYS_CLKR, 0x30A3); + rtw_write16(Adapter, REG_SYS_CLKR, 0x70A3);//modify to 0x70A3 by Scott. + rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80); + rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x880F); + rtw_write8(Adapter, REG_SYS_ISO_CTRL, 0xF9); + } + else + { + // Disable all RF/BB power + rtw_write8(Adapter, REG_RF_CTRL, 0x00); + } + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n")); + +} + +static VOID +_ResetDigitalProcedure2( + IN PADAPTER Adapter +) +{ +/***************************** +k. SYS_FUNC_EN 0x03[7:0] = 0x44 // disable ELDR runction +l. SYS_CLKR 0x08[15:0] = 0x3083 // disable ELDR clock +m. SYS_ISO_CTRL 0x01[7:0] = 0x83 // isolated ELDR to PON +******************************/ + //rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x44);//marked by Scott. + //rtw_write16(Adapter, REG_SYS_CLKR, 0x3083); + //rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x83); + + rtw_write16(Adapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott. + rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott. +} + +static VOID +_DisableAnalog( + IN PADAPTER Adapter, + IN BOOLEAN bWithoutHWSM + ) +{ + u16 value16 = 0; + u8 value8=0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(bWithoutHWSM){ + /***************************** + n. LDOA15_CTRL 0x20[7:0] = 0x04 // disable A15 power + o. LDOV12D_CTRL 0x21[7:0] = 0x54 // disable digital core power + r. When driver call disable, the ASIC will turn off remaining clock automatically + ******************************/ + + rtw_write8(Adapter, REG_LDOA15_CTRL, 0x04); + //PlatformIOWrite1Byte(Adapter, REG_LDOV12D_CTRL, 0x54); + + value8 = rtw_read8(Adapter, REG_LDOV12D_CTRL); + value8 &= (~LDV12_EN); + rtw_write8(Adapter, REG_LDOV12D_CTRL, value8); + //RT_TRACE(COMP_INIT, DBG_LOUD, (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8)); + } + +/***************************** +h. SPS0_CTRL 0x11[7:0] = 0x23 //enter PFM mode +i. APS_FSMCO 0x04[15:0] = 0x4802 // set USB suspend +******************************/ + + + value8 = 0x23; + if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) + value8 |= BIT3; + + rtw_write8(Adapter, REG_SPS0_CTRL, value8); + + + if(bWithoutHWSM) + { + //value16 |= (APDM_HOST | /*AFSM_HSUS |*/PFM_ALDN); + // 2010/08/31 According to Filen description, we need to use HW to shut down 8051 automatically. + // Becasue suspend operatione need the asistance of 8051 to wait for 3ms. + value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN); + } + else + { + value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN); + } + + rtw_write16(Adapter, REG_APS_FSMCO,value16 );//0x4802 + + rtw_write8(Adapter, REG_RSV_CTRL, 0x0e); + + #if 0 + //tynli_test for suspend mode. + if(!bWithoutHWSM){ + rtw_write8(Adapter, 0xfe10, 0x19); + } +#endif + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16)); +} + +static void rtl8723au_hw_power_down(_adapter *padapter) +{ + u8 u1bTmp; + + DBG_8192C("PowerDownRTL8723U\n"); + + + // 1. Run Card Disable Flow + // Done before this function call. + + // 2. 0x04[16] = 0 // reset WLON + u1bTmp = rtw_read8(padapter, REG_APS_FSMCO+2); + rtw_write8(padapter, REG_APS_FSMCO+2, (u1bTmp&(~BIT0))); + + // 3. 0x04[12:11] = 2b'11 // enable suspend + // Done before this function call. + + // 4. 0x04[15] = 1 // enable PDN + u1bTmp = rtw_read8(padapter, REG_APS_FSMCO+1); + rtw_write8(padapter, REG_APS_FSMCO+1, (u1bTmp|BIT7)); +} + +// +// Description: RTL8723e card disable power sequence v003 which suggested by Scott. +// First created by tynli. 2011.01.28. +// +VOID +CardDisableRTL8723U( + PADAPTER Adapter +) +{ + u8 u1bTmp; +// PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + DBG_8192C("CardDisableRTL8723U\n"); + + // USB-MF Card Disable Flow + // 1. Run LPS WL RFOFF flow + HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, rtl8723A_enter_lps_flow); + + // 2. 0x1F[7:0] = 0 // turn off RF + rtw_write8(Adapter, REG_RF_CTRL, 0x00); + + // ==== Reset digital sequence ====== + if((rtw_read8(Adapter, REG_MCUFWDL)&BIT7) && + Adapter->bFWReady) //8051 RAM code + { + rtl8723a_FirmwareSelfReset(Adapter); + } + + // Reset MCU. Suggested by Filen. 2011.01.26. by tynli. + u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); + rtw_write8(Adapter, REG_SYS_FUNC_EN+1, (u1bTmp&(~BIT2))); + + // g. MCUFWDL 0x80[1:0]=0 // reset MCU ready status + rtw_write8(Adapter, REG_MCUFWDL, 0x00); + + // ==== Reset digital sequence end ====== +// if((pMgntInfo->RfOffReason & RF_CHANGE_BY_HW) ) + { + // Card disable power action flow + HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, rtl8723A_card_disable_flow); + } + + // Reset MCU IO Wrapper, added by Roger, 2011.08.30. + u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL+1); + rtw_write8(Adapter, REG_RSV_CTRL+1, (u1bTmp&(~BIT0))); + u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL+1); + rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp|BIT0); + + // 7. RSV_CTRL 0x1C[7:0] = 0x0E // lock ISO/CLK/Power control register + rtw_write8(Adapter, REG_RSV_CTRL, 0x0e); + +} + + +u32 rtl8723au_hal_deinit(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + DBG_8192C("==> %s\n", __FUNCTION__); + +#ifdef CONFIG_BT_COEXIST + BT_HaltProcess(padapter); +#endif +#ifdef CONFIG_MP_INCLUDED + if (padapter->registrypriv.mp_mode == 1) + MPT_DeInitAdapter(padapter); +#endif + // 2011/02/18 To Fix RU LNA power leakage problem. We need to execute below below in + // Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all + // IC. Accord to johnny's opinion, only RU need the support. + CardDisableRTL8723U(padapter); + + return _SUCCESS; +} + + +unsigned int rtl8723au_inirp_init(PADAPTER Adapter) +{ + u8 i; + struct recv_buf *precvbuf; + uint status; + struct dvobj_priv *pdev= adapter_to_dvobj(Adapter); + struct intf_hdl * pintfhdl=&Adapter->iopriv.intf; + struct recv_priv *precvpriv = &(Adapter->recvpriv); + u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); + HAL_DATA_TYPE *pHalData=GET_HAL_DATA(Adapter); +#endif //CONFIG_USB_INTERRUPT_IN_PIPE + +_func_enter_; + + _read_port = pintfhdl->io_ops._read_port; + + status = _SUCCESS; + + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n")); + + precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; + + //issue Rx irp to receive data + precvbuf = (struct recv_buf *)precvpriv->precv_buf; + for(i=0; i<NR_RECVBUFF; i++) + { + if(_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE ) + { + RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n")); + status = _FAIL; + goto exit; + } + + precvbuf++; + precvpriv->free_recv_buf_queue_cnt--; + } + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + _read_interrupt = pintfhdl->io_ops._read_interrupt; + if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE ) + { + RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n")); + status = _FAIL; + } + pHalData->IntrMask[0]=rtw_read32(Adapter, REG_USB_HIMR); + MSG_8192C("pHalData->IntrMask = 0x%04x\n", pHalData->IntrMask[0]); + pHalData->IntrMask[0]|=UHIMR_C2HCMD|UHIMR_CPWM; + rtw_write32(Adapter, REG_USB_HIMR,pHalData->IntrMask[0]); +#endif //CONFIG_USB_INTERRUPT_IN_PIPE + +exit: + + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n")); + +_func_exit_; + + return status; + +} + +unsigned int rtl8723au_inirp_deinit(PADAPTER Adapter) +{ +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); + HAL_DATA_TYPE *pHalData=GET_HAL_DATA(Adapter); +#endif //CONFIG_USB_INTERRUPT_IN_PIPE + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n")); + + rtw_read_port_cancel(Adapter); +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + pHalData->IntrMask[0]=rtw_read32(Adapter, REG_USB_HIMR); + MSG_8192C("%s pHalData->IntrMask = 0x%04x\n",__FUNCTION__, pHalData->IntrMask[0]); + pHalData->IntrMask[0]=0x0; + rtw_write32(Adapter, REG_USB_HIMR,pHalData->IntrMask[0]); + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n")); +#endif //CONFIG_USB_INTERRUPT_IN_PIPE + return _SUCCESS; +} + + +static u32 +_GetChannelGroup( + IN u32 channel + ) +{ + //RT_ASSERT((channel < 14), ("Channel %d no is supported!\n")); + + if(channel < 3){ // Channel 1~3 + return 0; + } + else if(channel < 9){ // Channel 4~9 + return 1; + } + + return 2; // Channel 10~14 +} + + +//------------------------------------------------------------------- +// +// EEPROM/EFUSE Content Parsing +// +//------------------------------------------------------------------- +static void +_ReadIDs( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(_FALSE == AutoloadFail){ + // VID, PID + pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]); + pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]); + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID]; + pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID]; + + } + else{ + pHalData->EEPROMVID = EEPROM_Default_VID; + pHalData->EEPROMPID = EEPROM_Default_PID; + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + + } + + // For customized behavior. + if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. + pHalData->CustomerID = RT_CID_819x_HP; + + // Decide CustomerID according to VID/DID or EEPROM + switch(pHalData->EEPROMCustomerID) + { + case EEPROM_CID_DEFAULT: + if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) + pHalData->CustomerID = RT_CID_DLINK; + break; + case EEPROM_CID_WHQL: +/* + Adapter->bInHctTest = TRUE; + + pMgntInfo->bSupportTurboMode = FALSE; + pMgntInfo->bAutoTurboBy8186 = FALSE; + + pMgntInfo->PowerSaveControl.bInactivePs = FALSE; + pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; + + pMgntInfo->keepAliveLevel = 0; + + Adapter->bUnloadDriverwhenS3S4 = FALSE; +*/ + break; + default: + pHalData->CustomerID = RT_CID_DEFAULT; + break; + + } + + MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID); + MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID); + MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID); + MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID); + + MSG_8192C("RT_CustomerID: 0x%02x\n", pHalData->CustomerID); + +} + + +static VOID +_ReadMACAddress( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); + + if(_FALSE == AutoloadFail){ + //Read Permanent MAC address and set value to hardware + _rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR], ETH_ALEN); + } + else{ + //Random assigh MAC address + u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; + //sMacAddr[5] = (u8)GetRandomNumber(1, 254); + _rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN); + } + DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr)); + //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); + //RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress); + +} + +static VOID +_ReadBoardType( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 value32; + u8 boardType = BOARD_USB_DONGLE; + + if(AutoloadFail){ + if(IS_8723_SERIES(pHalData->VersionID)) + pHalData->rf_type = RF_1T1R; + else + pHalData->rf_type = RF_2T2R; + + pHalData->BoardType = boardType; + return; + } + + boardType = PROMContent[EEPROM_NORMAL_BoardType]; + boardType &= BOARD_TYPE_NORMAL_MASK;//bit[7:5] + boardType >>= 5; + + pHalData->BoardType = boardType; + MSG_8192C("_ReadBoardType(%x)\n",pHalData->BoardType); + + if (boardType == BOARD_USB_High_PA) + pHalData->ExternalPA = 1; +} + + +static VOID +_ReadLEDSetting( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + struct led_priv *pledpriv = &(Adapter->ledpriv); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#ifdef CONFIG_SW_LED + pledpriv->bRegUseLed = _TRUE; + + // + // Led mode + // + switch(pHalData->CustomerID) + { + case RT_CID_DEFAULT: + pledpriv->LedStrategy = SW_LED_MODE1; + pledpriv->bRegUseLed = _TRUE; + break; + + case RT_CID_819x_HP: + pledpriv->LedStrategy = SW_LED_MODE6; + break; + + default: + pledpriv->LedStrategy = SW_LED_MODE1; + break; + } + + if( BOARD_MINICARD == pHalData->BoardType ) + { + pledpriv->LedStrategy = SW_LED_MODE6; + } + pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. +#else // HW LED + pledpriv->LedStrategy = HW_LED; +#endif //CONFIG_SW_LED +} + +static VOID +_ReadThermalMeter( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 tempval; + + // + // ThermalMeter from EEPROM + // + if(!AutoloadFail) + tempval = PROMContent[EEPROM_THERMAL_METER]; + else + tempval = EEPROM_Default_ThermalMeter; + + pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] + + if(pHalData->EEPROMThermalMeter == 0x1f || AutoloadFail) + pdmpriv->bAPKThermalMeterIgnore = _TRUE; + +#if 0 + if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c) + pHalData->EEPROMThermalMeter = 0x12; +#endif + + pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter; + + //RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter)); + +} + +static VOID +_ReadRFSetting( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ +} + + +#if 0 +static VOID +readAntennaDiversity( + IN PADAPTER pAdapter, + IN u8 *hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct registry_priv *registry_par = &pAdapter->registrypriv; + + if(!AutoLoadFail) + { + // Antenna Diversity setting. + if(registry_par->antdiv_cfg == 2) // 2: From Efuse + pHalData->AntDivCfg = (hwinfo[EEPROM_RF_OPT1]&0x18)>>3; + else + pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, + + DBG_8192C("### AntDivCfg(%x)\n",pHalData->AntDivCfg); + + //if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1) + // pHalData->AntDivCfg = 0; + } + else + { + pHalData->AntDivCfg = 0; + } + +} +#endif +// Read HW power down mode selection +static void _ReadPSSetting(IN PADAPTER Adapter,IN u8*PROMContent,IN u8 AutoloadFail) +{ + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); + + if(AutoloadFail){ + pwrctl->bHWPowerdown = _FALSE; + pwrctl->bSupportRemoteWakeup = _FALSE; + } + else { + //if(SUPPORT_HW_RADIO_DETECT(Adapter)) + pwrctl->bHWPwrPindetect = Adapter->registrypriv.hwpwrp_detect; + //else + //pwrctl->bHWPwrPindetect = _FALSE;//dongle not support new + + + //hw power down mode selection , 0:rf-off / 1:power down + + if(Adapter->registrypriv.hwpdn_mode==2) + pwrctl->bHWPowerdown = (PROMContent[EEPROM_RF_OPT3] & BIT4); + else + pwrctl->bHWPowerdown = Adapter->registrypriv.hwpdn_mode; + + // decide hw if support remote wakeup function + // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume + pwrctl->bSupportRemoteWakeup = (PROMContent[EEPROM_TEST_USB_OPT] & BIT1)?_TRUE :_FALSE; + + //if(SUPPORT_HW_RADIO_DETECT(Adapter)) + //Adapter->registrypriv.usbss_enable = pwrctl->bSupportRemoteWakeup ; + + DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, + pwrctl->bHWPwrPindetect, pwrctl->bHWPowerdown, pwrctl->bSupportRemoteWakeup); + + DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",Adapter->registrypriv.power_mgnt,Adapter->registrypriv.usbss_enable); + + } + +} + + + + + + +VOID +Hal_EfuseParsePIDVID_8723AU( + IN PADAPTER pAdapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if(AutoLoadFail) + { + pHalData->EEPROMVID = 0; + pHalData->EEPROMPID = 0; + } + else + { + // VID, PID + pHalData->EEPROMVID = le16_to_cpu(*(u16*)&hwinfo[EEPROM_VID_8723AU]); + pHalData->EEPROMPID = le16_to_cpu(*(u16*)&hwinfo[EEPROM_PID_8723AU]); + + } + + MSG_8192C("EEPROM VID = 0x%4x\n", pHalData->EEPROMVID); + MSG_8192C("EEPROM PID = 0x%4x\n", pHalData->EEPROMPID); +} + + +static void +Hal_EfuseParseMACAddr_8723AU( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + u16 i, usValue; + u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x87, 0x23, 0x00}; + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + + if (AutoLoadFail) + { +// sMacAddr[5] = (u1Byte)GetRandomNumber(1, 254); + for (i=0; i<6; i++) + pEEPROM->mac_addr[i] = sMacAddr[i]; + } + else + { + //Read Permanent MAC address +#if 1 + _rtw_memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_8723AU], ETH_ALEN); +#else + for(i=0; i<6; i+=2) + { + usValue = *(u16*)&hwinfo[EEPROM_MAC_ADDR_8723S+i]; + *((u16*)(&pEEPROM->mac_addr[i])) = usValue; + } +#endif + } +// NicIFSetMacAddress(pAdapter, pAdapter->PermanentAddress); + + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, + ("Hal_EfuseParseMACAddr_8723AU: Permanent Address=%02x:%02x:%02x:%02x:%02x:%02x\n", + pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5])); +} + + +#ifdef CONFIG_EFUSE_CONFIG_FILE +static u32 Hal_readPGDataFromConfigFile( + PADAPTER padapter) +{ + u32 i; + struct file *fp; + mm_segment_t fs; + u8 temp[3]; + loff_t pos = 0; + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8 *PROMContent = pEEPROM->efuse_eeprom_data; + + + temp[2] = 0; // add end of string '\0' + + fp = filp_open("/system/etc/wifi/wifi_efuse.map", O_RDWR, 0644); + if (IS_ERR(fp)) { + pEEPROM->bloadfile_fail_flag= _TRUE; + DBG_871X("Error, Efuse configure file doesn't exist.\n"); + return _FAIL; + } + + fs = get_fs(); + set_fs(KERNEL_DS); + + DBG_871X("Efuse configure file:\n"); + for (i=0; i<HWSET_MAX_SIZE_88E; i++) { + vfs_read(fp, temp, 2, &pos); + PROMContent[i] = simple_strtoul(temp, NULL, 16 ); + pos += 1; // Filter the space character + DBG_871X("%02X \n", PROMContent[i]); + } + DBG_871X("\n"); + set_fs(fs); + + filp_close(fp, NULL); + + pEEPROM->bloadfile_fail_flag= _FALSE; + return _SUCCESS; +} + + +static void +Hal_ReadMACAddrFromFile_8723AU( + PADAPTER padapter + ) +{ + u32 i; + struct file *fp; + mm_segment_t fs; + u8 source_addr[18]; + loff_t pos = 0; + u32 curtime = rtw_get_current_time(); + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8 *head, *end; + + u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; + u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + _rtw_memset(source_addr, 0, 18); + _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); + + fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); + if (IS_ERR(fp)) { + pEEPROM->bloadmac_fail_flag = _TRUE; + DBG_871X("Error, wifi mac address file doesn't exist.\n"); + } else { + fs = get_fs(); + set_fs(KERNEL_DS); + + DBG_871X("wifi mac address:\n"); + vfs_read(fp, source_addr, 18, &pos); + source_addr[17] = ':'; + + head = end = source_addr; + for (i=0; i<ETH_ALEN; i++) { + while (end && (*end != ':') ) + end++; + + if (end && (*end == ':') ) + *end = '\0'; + + pEEPROM->mac_addr[i] = simple_strtoul(head, NULL, 16 ); + + if (end) { + end++; + head = end; + } + DBG_871X("%02x \n", pEEPROM->mac_addr[i]); + } + DBG_871X("\n"); + set_fs(fs); + + filp_close(fp, NULL); + } + + if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || + (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { + pEEPROM->mac_addr[0] = 0x00; + pEEPROM->mac_addr[1] = 0xe0; + pEEPROM->mac_addr[2] = 0x4c; + pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; + pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; + pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; + } + + pEEPROM->bloadmac_fail_flag = _FALSE; + + DBG_871X("Hal_ReadMACAddrFromFile_8188ES: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", + pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); +} +#endif //CONFIG_EFUSE_CONFIG_FILE + + +static VOID +readAdapterInfo( + IN PADAPTER padapter + ) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + //PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 hwinfo[HWSET_MAX_SIZE]; + +#ifdef CONFIG_EFUSE_CONFIG_FILE + Hal_readPGDataFromConfigFile(padapter); +#else //CONFIG_EFUSE_CONFIG_FILE + Hal_InitPGData(padapter, hwinfo); +#endif //CONFIG_EFUSE_CONFIG_FILE + Hal_EfuseParseIDCode(padapter, hwinfo); + Hal_EfuseParsePIDVID_8723AU(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseEEPROMVer(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +#ifdef CONFIG_EFUSE_CONFIG_FILE + Hal_ReadMACAddrFromFile_8723AU(padapter); +#else //CONFIG_EFUSE_CONFIG_FILE + Hal_EfuseParseMACAddr_8723AU(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +#endif + Hal_EfuseParseTxPowerInfo_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + _ReadBoardType(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseBTCoexistInfo_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + + rtl8723a_EfuseParseChnlPlan(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseThermalMeter_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + _ReadLEDSetting(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +// _ReadRFSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); +// _ReadPSSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseAntennaDiversity(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + + Hal_EfuseParseEEPROMVer(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseCustomerID(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseRateIndicationOption(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseXtal_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag); + // + // The following part initialize some vars by PG info. + // + Hal_InitChannelPlan(padapter); + + + + //hal_CustomizedBehavior_8723U(Adapter); + +// Adapter->bDongle = (PROMContent[EEPROM_EASY_REPLACEMENT] == 1)? 0: 1; + DBG_8192C("%s(): REPLACEMENT = %x\n",__FUNCTION__,padapter->bDongle); +} + +static void _ReadPROMContent( + IN PADAPTER Adapter + ) +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 PROMContent[HWSET_MAX_SIZE]={0}; + u8 eeValue; + u32 i; + u16 value16; + + eeValue = rtw_read8(Adapter, REG_9346CR); + // To check system boot selection. + pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; + pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; + + + DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), + (pEEPROM->bautoload_fail_flag ? "Fail" : "OK") ); + + //pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; + + //if(IS_HARDWARE_TYPE_8723A(Adapter)) + // readAdapterInfo_8723U(Adapter); + //else + readAdapterInfo(Adapter); +} + + +static VOID +_InitOtherVariable( + IN PADAPTER Adapter + ) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + //if(Adapter->bInHctTest){ + // pMgntInfo->PowerSaveControl.bInactivePs = FALSE; + // pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; + // pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; + // pMgntInfo->keepAliveLevel = 0; + //} + + +} + +static VOID +_ReadRFType( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; +#else + pHalData->rf_chip = RF_6052; +#endif +} + +void _ReadSilmComboMode(PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + pHalData->SlimComboDbg = _FALSE; // Default is not debug mode. + + // 2010/11/22 MH We need to enter debug mode for TSMA and UMC A cut + //if ((Adapter->chip_type == RTL8188C_8192C) && +/* + if (IS_HARDWARE_TYPE_8192CU(Adapter) && + (pHalData->BoardType == BOARD_USB_COMBO)) + { + switch (pHalData->VersionID) + { + case VERSION_NORMAL_TSMC_CHIP_88C: + case VERSION_NORMAL_TSMC_CHIP_92C: + case VERSION_NORMAL_TSMC_CHIP_92C_1T2R: + case VERSION_NORMAL_UMC_CHIP_88C_A_CUT: + case VERSION_NORMAL_UMC_CHIP_92C_A_CUT: + case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT: + if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20) + pHalData->SlimComboDbg = _TRUE; + + break; + + case VERSION_NORMAL_UMC_CHIP_88C_B_CUT: + case VERSION_NORMAL_UMC_CHIP_92C_B_CUT: + case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT: + // 2011/02/15 MH UNC-B cut ECO fail, we need to support slim combo debug mode. + if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20) + pHalData->SlimComboDbg = _TRUE; + break; + + default: + break; + } + + } +*/ +} + +// +// Description: +// We should set Efuse cell selection to WiFi cell in default. +// +// Assumption: +// PASSIVE_LEVEL +// +// Added by Roger, 2010.11.23. +// +void +hal_EfuseCellSel( + IN PADAPTER Adapter + ) +{ + u32 value32; + + value32 = rtw_read32(Adapter, EFUSE_TEST); + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); + rtw_write32(Adapter, EFUSE_TEST, value32); +} + +static int _ReadAdapterInfo8723AU(PADAPTER Adapter) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 start=rtw_get_current_time(); + + MSG_8192C("====> _ReadAdapterInfo8723AU\n"); + + //Efuse_InitSomeVar(Adapter); + + hal_EfuseCellSel(Adapter); + + _ReadRFType(Adapter);//rf_chip -> _InitRFType() + _ReadPROMContent(Adapter); + + // 2010/10/25 MH THe function must be called after borad_type & IC-Version recognize. + _ReadSilmComboMode(Adapter); + + _InitOtherVariable(Adapter); + + //MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n", __FUNCTION__, pHalData->rf_chip, pHalData->rf_type); + + MSG_8192C("<==== _ReadAdapterInfo8723AU in %d ms\n", rtw_get_passing_time_ms(start)); + + return _SUCCESS; +} + + +static void ReadAdapterInfo8723AU(PADAPTER Adapter) +{ + // Read EEPROM size before call any EEPROM function + Adapter->EepromAddressSize = GetEEPROMSize8723A(Adapter); + + _ReadAdapterInfo8723AU(Adapter); +} + + +#define GPIO_DEBUG_PORT_NUM 0 +static void rtl8192cu_trigger_gpio_0(_adapter *padapter) +{ + + u32 gpioctrl; + DBG_8192C("==> trigger_gpio_0...\n"); + rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0); + rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF); + gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16); + rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); + gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8); + rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); + DBG_8192C("<=== trigger_gpio_0...\n"); + +} + +/* + * If variable not handled here, + * some variables will be processed in SetHwReg8723A() + */ +void SetHwReg8723AU(PADAPTER Adapter, u8 variable, u8* val) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + +_func_enter_; + + switch(variable) + { + case HW_VAR_RXDMA_AGG_PG_TH: +#ifdef CONFIG_USB_RX_AGGREGATION + { + u8 threshold = *val; + if (threshold == 0) + threshold = pHalData->UsbRxAggPageCount; + SetHwReg8723A(Adapter, HW_VAR_RXDMA_AGG_PG_TH, &threshold); + } +#endif + break; + + case HW_VAR_SET_RPWM: + rtw_write8(Adapter, REG_USB_HRPWM, *val); + break; + + case HW_VAR_TRIGGER_GPIO_0: + rtl8192cu_trigger_gpio_0(Adapter); + break; + + default: + SetHwReg8723A(Adapter, variable, val); + break; + } + +_func_exit_; +} + +/* + * If variable not handled here, + * some variables will be processed in GetHwReg8723A() + */ +void GetHwReg8723AU(PADAPTER Adapter, u8 variable, u8* val) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + +_func_enter_; + + switch (variable) + { + case HW_VAR_GET_CPWM: + *val = rtw_read8(Adapter, REG_USB_HCPWM); + break; + default: + GetHwReg8723A(Adapter, variable, val); + break; + } + +_func_exit_; +} + +// +// Description: +// Query setting of specified variable. +// +u8 +GetHalDefVar8192CUsb( + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch(eVariable) + { + case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: + *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB; + break; + case HAL_DEF_IS_SUPPORT_ANT_DIV: + #ifdef CONFIG_ANTENNA_DIVERSITY + *((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE; + #endif + break; + case HAL_DEF_CURRENT_ANTENNA: + #ifdef CONFIG_ANTENNA_DIVERSITY + *(( u8*)pValue) = pHalData->CurAntenna; + #endif + break; + case HAL_DEF_DRVINFO_SZ: + *(( u32*)pValue) = DRVINFO_SZ; + break; + case HAL_DEF_MAX_RECVBUF_SZ: + *(( u32*)pValue) = MAX_RECVBUF_SZ; + break; + case HAL_DEF_RX_PACKET_OFFSET: + *(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ; + break; + case HAL_DEF_DBG_DUMP_RXPKT: + *(( u8*)pValue) = pHalData->bDumpRxPkt; + break; + case HW_VAR_MAX_RX_AMPDU_FACTOR: + *(( u32*)pValue) = MAX_AMPDU_FACTOR_64K; + break; + default: + bResult = GetHalDefVar(Adapter, eVariable, pValue); + break; + } + + return bResult; +} + + + + +// +// Description: +// Change default setting of specified variable. +// +u8 +SetHalDefVar8192CUsb( + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch(eVariable) + { + case HAL_DEF_DBG_DUMP_RXPKT: + pHalData->bDumpRxPkt = *(( u8*)pValue); + break; + case HAL_DEF_DBG_DM_FUNC: + { + u8 dm_func = *(( u8*)pValue); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DM_ODM_T *podmpriv = &pHalData->odmpriv; + + if(dm_func == 0){ //disable all dynamic func + podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE; + DBG_8192C("==> Disable all dynamic function...\n"); + } + else if(dm_func == 1){//disable DIG + podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG); + DBG_8192C("==> Disable DIG...\n"); + } + else if(dm_func == 2){//disable High power + podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); + } + else if(dm_func == 3){//disable tx power tracking + podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); + DBG_8192C("==> Disable tx power tracking...\n"); + } + else if(dm_func == 4){//disable BT coexistence + pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT); + } + else if(dm_func == 5){//disable antenna diversity + podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); + } + else if(dm_func == 6){//turn on all dynamic func + if(!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) + { + DIG_T *pDigTable = &podmpriv->DM_DigTable; + pDigTable->CurIGValue= rtw_read8(Adapter,0xc50); + } + pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; + podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; + DBG_8192C("==> Turn on all dynamic function...\n"); + } + } + break; + default: + bResult = SetHalDefVar(Adapter, eVariable, pValue); + break; + } + + return bResult; +} + +/* +u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + unsigned int BrateCfg = 0; + + + if(pHalData->VersionID != VERSION_TEST_CHIP_88C) + BrateCfg = mask & 0x15F; + else //for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning + BrateCfg = mask & 0x159; + + BrateCfg |= 0x01; // default enable 1M ACK rate + + return BrateCfg; +} +*/ +void _update_response_rate(_adapter *padapter,unsigned int mask) +{ + u8 RateIndex = 0; + // Set RRSR rate table. + rtw_write8(padapter, REG_RRSR, mask&0xff); + rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff); + + // Set RTS initial rate + while(mask > 0x1) + { + mask = (mask>> 1); + RateIndex++; + } + rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); +} + +void UpdateHalRAMask8192CUsb(PADAPTER padapter, u32 mac_id,u8 rssi_level ) +{ + //volatile unsigned int result; + u8 init_rate=0; + u8 networkType, raid; + u32 mask,rate_bitmap; + u8 shortGIrate = _FALSE; + int supportRateNum = 0; + struct sta_info *psta; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + + if (mac_id >= NUM_STA) //CAM_SIZE + { + return; + } + + psta = pmlmeinfo->FW_sta_info[mac_id].psta; + if(psta == NULL) + { + return; + } + + switch (mac_id) + { + case 0:// for infra mode +#ifdef CONFIG_CONCURRENT_MODE + case 2:// first station uses macid=0, second station uses macid=2 +#endif + supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); + networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf; + //pmlmeext->cur_wireless_mode = networkType; + raid = networktype_to_raid(networkType); + + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0; + + + if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) + { + shortGIrate = _TRUE; + } + + break; + + case 1://for broadcast/multicast + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + if(pmlmeext->cur_wireless_mode & WIRELESS_11B) + networkType = WIRELESS_11B; + else + networkType = WIRELESS_11G; + raid = networktype_to_raid(networkType); + + mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); + + break; + + default: //for each sta in IBSS + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; + //pmlmeext->cur_wireless_mode = networkType; + raid = networktype_to_raid(networkType); + + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + + + //todo: support HT in IBSS + + break; + } + + //mask &=0x0fffffff; + rate_bitmap = 0x0fffffff; +#ifdef CONFIG_ODM_REFRESH_RAMASK + { + rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level); + printk("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", + __FUNCTION__,mac_id,networkType,mask,rssi_level,rate_bitmap); + } +#endif + + mask &= rate_bitmap; + mask |= ((raid<<28)&0xf0000000); + + + init_rate = get_highest_rate_idx(mask)&0x3f; + + if(pHalData->fw_ractrl == _TRUE) + { + u8 arg = 0; + + //arg = (cam_idx-4)&0x1f;//MACID + arg = mac_id&0x1f;//MACID + + arg |= BIT(7); + + if (shortGIrate==_TRUE) + arg |= BIT(5); + + DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); + + rtl8192c_set_raid_cmd(padapter, mask, arg); + + } + else + { + if (shortGIrate==_TRUE) + init_rate |= BIT(6); + + rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate); + } + + + //set ra_id + psta->raid = raid; + psta->init_rate = init_rate; + + //set correct initial date rate for each mac_id + pdmpriv->INIDATA_RATE[mac_id] = init_rate; +} + +static void rtl8723au_init_default_value(PADAPTER padapter) +{ + rtl8723a_init_default_value(padapter); +} + +static u8 rtl8192cu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) +{ + u8 bResult = _TRUE; + switch(efunc_id){ + + #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) + case HAL_USB_SELECT_SUSPEND: + { + u8 bfwpoll = *(( u8*)val); + rtl8192c_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect + } + break; + #endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED + + default: + break; + } + return bResult; +} + +void rtl8723au_set_hal_ops(_adapter * padapter) +{ + struct hal_ops *pHalFunc = &padapter->HalFunc; + +_func_enter_; + +#ifdef CONFIG_CONCURRENT_MODE + if(padapter->isprimary) +#endif //CONFIG_CONCURRENT_MODE + { + //set hardware operation functions + padapter->HalData = rtw_zvmalloc(sizeof(HAL_DATA_TYPE)); + if(padapter->HalData == NULL){ + DBG_8192C("cant not alloc memory for HAL DATA \n"); + } + } + + //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE)); + padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); + + pHalFunc->hal_init = &rtl8723au_hal_init; + pHalFunc->hal_deinit = &rtl8723au_hal_deinit; + + //pHalFunc->free_hal_data = &rtl8192c_free_hal_data; + + pHalFunc->inirp_init = &rtl8723au_inirp_init; + pHalFunc->inirp_deinit = &rtl8723au_inirp_deinit; + + pHalFunc->init_xmit_priv = &rtl8192cu_init_xmit_priv; + pHalFunc->free_xmit_priv = &rtl8192cu_free_xmit_priv; + + pHalFunc->init_recv_priv = &rtl8192cu_init_recv_priv; + pHalFunc->free_recv_priv = &rtl8192cu_free_recv_priv; +#ifdef CONFIG_SW_LED + pHalFunc->InitSwLeds = &rtl8723au_InitSwLeds; + pHalFunc->DeInitSwLeds = &rtl8723au_DeInitSwLeds; +#else //case of hw led or no led + pHalFunc->InitSwLeds = NULL; + pHalFunc->DeInitSwLeds = NULL; +#endif//CONFIG_SW_LED + + pHalFunc->init_default_value = &rtl8723au_init_default_value; + pHalFunc->intf_chip_configure = &rtl8192cu_interface_configure; + pHalFunc->read_adapter_info = &ReadAdapterInfo8723AU; + + //pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; + //pHalFunc->set_channel_handler = &PHY_SwChnl8192C; + + //pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; + + pHalFunc->SetHwRegHandler = &SetHwReg8723AU; + pHalFunc->GetHwRegHandler = &GetHwReg8723AU; + pHalFunc->GetHalDefVarHandler = &GetHalDefVar8192CUsb; + pHalFunc->SetHalDefVarHandler = &SetHalDefVar8192CUsb; + + pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192CUsb; + + pHalFunc->hal_xmit = &rtl8192cu_hal_xmit; + pHalFunc->mgnt_xmit = &rtl8192cu_mgnt_xmit; + pHalFunc->hal_xmitframe_enqueue = &rtl8723au_hal_xmitframe_enqueue; + +#ifdef CONFIG_HOSTAPD_MLME + pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry; +#endif + pHalFunc->interface_ps_func = &rtl8192cu_ps_func; + + rtl8723a_set_hal_ops(pHalFunc); + +_func_exit_; + +} + diff --git a/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/usb_ops_linux.c b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/usb_ops_linux.c new file mode 100755 index 000000000000..eb6a5bfaf33e --- /dev/null +++ b/drivers/net/wireless/rtlwifi/rtl8723as/hal/rtl8723a/usb/usb_ops_linux.c @@ -0,0 +1,1716 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _HCI_OPS_OS_C_ + +#include <drv_conf.h> +#include <osdep_service.h> +#include <drv_types.h> +#include <osdep_intf.h> +#include <usb_ops.h> +#include <circ_buf.h> +#include <recv_osdep.h> +//#include <rtl8192c_hal.h> +#include <rtl8723a_hal.h> +#include <rtl8723a_recv.h> +#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) + +#error "Shall be Linux or Windows, but not both!\n" + +#endif + +static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) +{ + _adapter *padapter = pintfhdl->padapter ; + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct usb_device *udev=pdvobjpriv->pusbdev; + + unsigned int pipe; + int status = 0; + u32 tmp_buflen=0; + u8 reqtype; + u8 *pIo_buf; + int vendorreq_times = 0; + + #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE + u8 *tmp_buf; + #else // use stack memory + u8 tmp_buf[MAX_USB_IO_CTL_SIZE]; + #endif + +#ifdef CONFIG_CONCURRENT_MODE + if(padapter->adapter_type > PRIMARY_ADAPTER) + { + padapter = padapter->pbuddy_adapter; + pdvobjpriv = adapter_to_dvobj(padapter); + udev = pdvobjpriv->pusbdev; + } +#endif + + + //DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid); + + if((padapter->bSurpriseRemoved) ||(dvobj_to_pwrctl(pdvobjpriv)->pnp_bstop_trx)){ + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); + status = -EPERM; + goto exit; + } + + if(len>MAX_VENDOR_REQ_CMD_SIZE){ + DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ ); + status = -EINVAL; + goto exit; + } + + #ifdef CONFIG_USB_VENDOR_REQ_MUTEX + _enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); + #endif + + + // Acquire IO memory for vendorreq +#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC + pIo_buf = pdvobjpriv->usb_vendor_req_buf; +#else + #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE + tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT); + tmp_buflen = (u32)len + ALIGNMENT_UNIT; + #else // use stack memory + tmp_buflen = MAX_USB_IO_CTL_SIZE; + #endif + + // Added by Albert 2010/02/09 + // For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment. + // Trying to fix it here. + pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f ); +#endif + + if ( pIo_buf== NULL) { + DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ ); + status = -ENOMEM; + goto release_mutex; + } + + while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES) + { + _rtw_memset(pIo_buf, 0, len); + + if (requesttype == 0x01) + { + pipe = usb_rcvctrlpipe(udev, 0);//read_in + reqtype = REALTEK_USB_VENQT_READ; + } + else + { + pipe = usb_sndctrlpipe(udev, 0);//write_out + reqtype = REALTEK_USB_VENQT_WRITE; + _rtw_memcpy( pIo_buf, pdata, len); + } + + #if 0 + //timeout test for firmware downloading + status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len + , ((value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) ||value!=0x1000) ?RTW_USB_CONTROL_MSG_TIMEOUT : RTW_USB_CONTROL_MSG_TIMEOUT_TEST + ); + #else + status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT); + #endif + + if ( status == len) // Success this control transfer. + { + rtw_reset_continual_io_error(pdvobjpriv); + if ( requesttype == 0x01 ) + { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. + _rtw_memcpy( pdata, pIo_buf, len ); + } + } + else { // error cases + DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n" + , value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times); + + if (status < 0) { + if(status == (-ESHUTDOWN) || status == -ENODEV ) + { + padapter->bSurpriseRemoved = _TRUE; + } else { + #ifdef DBG_CONFIG_ERROR_DETECT + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; + } + #endif + } + } + else // status != len && status >= 0 + { + if(status > 0) { + if ( requesttype == 0x01 ) + { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. + _rtw_memcpy( pdata, pIo_buf, len ); + } + } + } + + if(rtw_inc_and_chk_continual_io_error(pdvobjpriv) == _TRUE ){ + padapter->bSurpriseRemoved = _TRUE; + break; + } + + } + + // firmware download is checksumed, don't retry + if( (value >= FW_8723A_START_ADDRESS && value <= FW_8723A_END_ADDRESS) || status == len ) + break; + + } + + // release IO memory used by vendorreq + #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE + rtw_mfree(tmp_buf, tmp_buflen); + #endif + +release_mutex: + #ifdef CONFIG_USB_VENDOR_REQ_MUTEX + _exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); + #endif +exit: + return status; + +} + +static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u8 data=0; + + _func_enter_; + + request = 0x05; + requesttype = 0x01;//read_in + index = 0;//n/a + + wvalue = (u16)(addr&0x0000ffff); + len = 1; + + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; + + return data; + +} + +static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u16 data=0; + + _func_enter_; + + request = 0x05; + requesttype = 0x01;//read_in + index = 0;//n/a + + wvalue = (u16)(addr&0x0000ffff); + len = 2; + + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; + + return data; + +} + +static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u32 data=0; + + _func_enter_; + + request = 0x05; + requesttype = 0x01;//read_in + index = 0;//n/a + + wvalue = (u16)(addr&0x0000ffff); + len = 4; + + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; + + return data; + +} + +static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u8 data; + int ret; + + _func_enter_; + + request = 0x05; + requesttype = 0x00;//write_out + index = 0;//n/a + + wvalue = (u16)(addr&0x0000ffff); + len = 1; + + data = val; + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; + + return ret; + +} + +static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u16 data; + int ret; + + _func_enter_; + + request = 0x05; + requesttype = 0x00;//write_out + index = 0;//n/a + + wvalue = (u16)(addr&0x0000ffff); + len = 2; + + data = val; + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; + + return ret; + +} + +static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u32 data; + int ret; + + _func_enter_; + + request = 0x05; + requesttype = 0x00;//write_out + index = 0;//n/a + + wvalue = (u16)(addr&0x0000ffff); + len = 4; + data = val; + + + ret =usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; + + return ret; + +} + +static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0}; + int ret; + + _func_enter_; + + request = 0x05; + requesttype = 0x00;//write_out + index = 0;//n/a + + wvalue = (u16)(addr&0x0000ffff); + len = length; + _rtw_memcpy(buf, pdata, len ); + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype); + + _func_exit_; + + return ret; + +} + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE +#if 0 +/** +* Log the Interrupt value and update counter no matter STA is associated or not. It is +* implemented for FPGA verification stage because we need to now whether the current FPGA +* platform is alive +* +* \param pAdapter The adapter context for this minoport +* \param IsrContent The ISR value read from hardware in MPISR +* +* We sholud remove this function later because DDK suggest not to executing too many +* operations in MPISR +*/ +VOID +LogInterruptHistory8723AU( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData=GET_HAL_DATA(Adapter); + +// if(pHalData->IntArray[0] & IMR_COMDOK) +// pHalData->InterruptLog.nIMR_COMDOK++; + if(pHalData->IntArray[0] & UHIMR_VODOK) + { + pHalData->InterruptLog.nIMR_VODOK++; + DBG_8192C("UHIMR_VODOK %d \n", pHalData->InterruptLog.nIMR_VODOK); + } + if(pHalData->IntArray[0] & UHIMR_VIDOK) + { + pHalData->InterruptLog.nIMR_VIDOK++; + DBG_8192C("UHIMR_VIDOK %d\n", pHalData->InterruptLog.nIMR_VIDOK); + } + if(pHalData->IntArray[0] & UHIMR_MGNTDOK) + { + pHalData->InterruptLog.nIMR_MGNTDOK++; + DBG_8192C("UHIMR_MGNTDOK %d\n", pHalData->InterruptLog.nIMR_MGNTDOK); + } + if(pHalData->IntArray[0] & UHIMR_BEDOK) + { + pHalData->InterruptLog.nIMR_BEDOK++; + DBG_8192C("UHIMR_BEDOK %d\n", pHalData->InterruptLog.nIMR_BEDOK); + } + if(pHalData->IntArray[0] & UHIMR_BKDOK) + { + pHalData->InterruptLog.nIMR_BKDOK++; + DBG_8192C("UHIMR_BKDOK %d\n", pHalData->InterruptLog.nIMR_BKDOK); + } + if(pHalData->IntArray[0] & UHIMR_ROK) + { + pHalData->InterruptLog.nIMR_ROK++; + DBG_8192C("UHIMR_ROK %d\n", pHalData->InterruptLog.nIMR_ROK); + } + + if(pHalData->IntArray[0] & UHIMR_TXBCNOK) + { + pHalData->InterruptLog.nIMR_TBDOK++; + DBG_8192C("UHIMR_TXBCNOK %d\n", pHalData->InterruptLog.nIMR_TBDOK); + } + if(pHalData->IntArray[0] & UHIMR_BCNDOK0) + { + pHalData->InterruptLog.nIMR_BDOK++; + DBG_8192C("UHIMR_BCNDOK0 %d\n", pHalData->InterruptLog.nIMR_BDOK); + } + if(pHalData->IntArray[0] & UHIMR_C2HCMD) + { + pHalData->InterruptLog.nIMR_C2HCMD++; + DBG_8192C("UHIMR_C2HCMD %d\n", pHalData->InterruptLog.nIMR_C2HCMD); + } + if(pHalData->IntArray[0] & UHIMR_CPWM) + { + pHalData->InterruptLog.nIMR_C2HCMD++; + DBG_8192C("UHIMR_CPWM %d\n", pHalData->InterruptLog.nIMR_CPWM); + } + +// if(pHalData->IntArray[0] & IMR_RXCMDOK) +// pHalData->InterruptLog.nIMR_RCOK++; + if(pHalData->IntArray[0] & UHIMR_RDU) + { + pHalData->InterruptLog.nIMR_RDU++; + DBG_8192C("UHIMR_RDU %d\n", pHalData->InterruptLog.nIMR_RDU); + } + + if(pHalData->IntArray[1] & UHIMR_RXFOVW) + { + pHalData->InterruptLog.nIMR_RXFOVW++; + DBG_8192C("UHIMR_RXFOVW %d\n", pHalData->InterruptLog.nIMR_RXFOVW); + } + + +} +#endif +// +// Description: +// Recognize the interrupt content by reading the interrupt register or content and masking interrupt mask (IMR) +// if it is our NIC's interrupt. After recognizing, we may clear the all interrupts (ISR). +// Arguments: +// [in] Adapter - +// The adapter context. +// [in] pContent - +// Under PCI interface, this field is ignord. +// Under USB interface, the content is the interrupt content pointer. +// Under SDIO interface, this is the interrupt type which is Local interrupt or system interrupt. +// [in] ContentLen - +// The length in byte of pContent. +// Return: +// If any interrupt matches the mask (IMR), return TRUE, and return FALSE otherwise. +// +BOOLEAN +InterruptRecognized8723AU( + IN PADAPTER Adapter, + IN PVOID pContent, + IN u32 ContentLen +) +{ + HAL_DATA_TYPE *pHalData=GET_HAL_DATA(Adapter); + u8 * buffer = (u8 *)pContent; +// RT_PRINT_DATA(COMP_RECV, DBG_LOUD, ("InterruptRecognized8723AU Interrupt buffer \n"), buffer, MAX_RECEIVE_INTERRUPT_BUFFER_SIZE(Adapter)); + + _rtw_memcpy(&(pHalData->IntArray[0]), &(buffer[USB_INTR_CONTENT_HISR_OFFSET]), 4); +// PlatformMoveMemory(&(pHalData->IntArray[0]), &(buffer[USB_INTR_CONTENT_HISR_OFFSET]), sizeof(u4Byte)); +// DBG_8192C("InterruptRecognized8723AU HISR = 0x%x HIMR = 0x%x\n", pHalData->IntArray[0],pHalData->IntrMask[0]); + pHalData->IntArray[0] &= pHalData->IntrMask[0]; + + //For HISR extension. Added by tynli. 2009.10.07. + _rtw_memcpy(&(pHalData->IntArray[1]), &(buffer[USB_INTR_CONTENT_HISRE_OFFSET]), 4); +// PlatformMoveMemory(&(pHalData->IntArray[1]), &(buffer[USB_INTR_CONTENT_HISRE_OFFSET]), sizeof(u4Byte)); +// DBG_8192C("InterruptRecognized8192CUsb HISRE = 0x%x HIMRE = 0x%x\n", pHalData->IntArray[1], pHalData->IntrMask[1]); + pHalData->IntArray[1] &= pHalData->IntrMask[1]; + + // We sholud remove this function later because DDK suggest not to executing too many operations in MPISR +// if(pHalData->IntArray[0] != 0) +// LogInterruptHistory8723AU(Adapter); + + { + struct reportpwrstate_parm report; + _rtw_memcpy(&report.state, &(buffer[USB_INTR_CPWM_OFFSET]), 1); +#ifdef CONFIG_LPS_LCLK + if( ((pHalData->IntArray[0])&UHIMR_CPWM)){ +// DBG_8192C("%s HIMR=0x%x\n",__func__,pHalData->IntArray[0]); + //cpwm_int_hdl(Adapter, &report); + _set_workitem(&(adapter_to_pwrctl(Adapter)->cpwm_event)); + pHalData->IntArray[0]&= ~UHIMR_CPWM; +// DBG_8192C("%s HIMR=0x%x\n",__func__,pHalData->IntArray[0]); + } +#endif + } + return (((pHalData->IntArray[0])&pHalData->IntrMask[0])!=0 || + ((pHalData->IntArray[1])&pHalData->IntrMask[1])!=0); + +} + + +static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs) +{ + int err; + PADAPTER padapter = (PADAPTER)purb->context; + + + if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) + { + DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", + __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); + return; + } + + if (purb->status == 0)//SUCCESS + { + struct c2h_evt_hdr *c2h_evt = (struct c2h_evt_hdr *)purb->transfer_buffer; + + if (purb->actual_length > USB_INTR_CONTENT_LENGTH) { + DBG_8192C("usb_read_interrupt_complete: purb->actual_length > USB_INTR_CONTENT_LENGTH\n"); + goto urb_submit; + } + + InterruptRecognized8723AU(padapter, purb->transfer_buffer, purb->actual_length); + + if (c2h_evt_exist(c2h_evt)) { + if (0) + DBG_871X("%s C2H == %d\n", __func__, c2h_evt->id); + if (c2h_id_filter_ccx_8723a(c2h_evt->id)) { + /* Handle CCX report here */ + handle_txrpt_ccx_8723a(padapter, (void *)(c2h_evt->payload)); + /* Replace with special pointer to trigger c2h_evt_clear */ + if (rtw_cbuf_push(padapter->evtpriv.c2h_queue, (void*)&padapter->evtpriv) != _SUCCESS) + DBG_871X("%s rtw_cbuf_push fail\n", __func__); + _set_workitem(&padapter->evtpriv.c2h_wk); + } else if ((c2h_evt = (struct c2h_evt_hdr *)rtw_malloc(16)) != NULL) { + _rtw_memcpy(c2h_evt, purb->transfer_buffer, 16); + if (rtw_cbuf_push(padapter->evtpriv.c2h_queue, (void*)c2h_evt) != _SUCCESS) + DBG_871X("%s rtw_cbuf_push fail\n", __func__); + _set_workitem(&padapter->evtpriv.c2h_wk); + } else { + /* Error handling for malloc fail */ + if (rtw_cbuf_push(padapter->evtpriv.c2h_queue, (void*)NULL) != _SUCCESS) + DBG_871X("%s rtw_cbuf_push fail\n", __func__); + _set_workitem(&padapter->evtpriv.c2h_wk); + } + } + +urb_submit: + err = usb_submit_urb(purb, GFP_ATOMIC); + if ((err) && (err != (-EPERM))) + { + DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status); + } + } + else + { + DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status); + + switch (purb->status) + { + case -EINVAL: + case -EPIPE: + case -ENODEV: + case -ESHUTDOWN: + //padapter->bSurpriseRemoved = _TRUE; + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); + case -ENOENT: + padapter->bDriverStopped = _TRUE; + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bDriverStopped=TRUE\n")); + break; + case -EPROTO: + break; + case -EINPROGRESS: + DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); + break; + default: + break; + } + } +} + +static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr) +{ + int err; + unsigned int pipe; + u32 ret = _SUCCESS; + _adapter *adapter = pintfhdl->padapter; + struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); + struct recv_priv *precvpriv = &adapter->recvpriv; + struct usb_device *pusbd = pdvobj->pusbdev; + +_func_enter_; + + //translate DMA FIFO addr to pipehandle + pipe = ffaddr2pipehdl(pdvobj, addr); + + usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, + precvpriv->int_in_buf, + USB_INTR_CONTENT_LENGTH, + usb_read_interrupt_complete, + adapter, + 1); + + err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC); + if((err) && (err != (-EPERM))) + { + DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status); + ret = _FAIL; + } + +_func_exit_; + + return ret; +} +#endif + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX +static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf) +{ + u8 *pbuf; + u8 shift_sz = 0; + u16 pkt_cnt, drvinfo_sz; + u32 pkt_offset, skb_len, alloc_sz; + s32 transfer_len; + struct recv_stat *prxstat; + struct phy_stat *pphy_info = NULL; + _pkt *pkt_copy = NULL; + union recv_frame *precvframe = NULL; + struct rx_pkt_attrib *pattrib = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + + + transfer_len = (s32)precvbuf->transfer_len; + pbuf = precvbuf->pbuf; + + prxstat = (struct recv_stat *)pbuf; + pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; + +#if 0 //temp remove when disable usb rx aggregation + if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0)) + { + return _FAIL; + } +#endif + + do{ + RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, + ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n", + prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); + + prxstat = (struct recv_stat *)pbuf; + + precvframe = rtw_alloc_recvframe(pfree_recv_queue); + if(precvframe==NULL) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); + DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); + goto _exit_recvbuf2recvframe; + } + + _rtw_init_listhead(&precvframe->u.hdr.list); + precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. + precvframe->u.hdr.len=0; + +// rtl8192c_query_rx_desc_status(precvframe, prxstat); + update_recvframe_attrib(precvframe, prxstat); + + pattrib = &precvframe->u.hdr.attrib; + + if(padapter->registrypriv.mp_mode == 0) && (pattrib->crc_err)){ + DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; + + if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); + DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { + shift_sz = 6; + } + else + { + shift_sz = 0; + } + + skb_len = pattrib->pkt_len; + + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) + alloc_sz = 1664; + else + alloc_sz = skb_len + 14; + } + else { + alloc_sz = skb_len; + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. + alloc_sz += 14; + } + + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = padapter->pnetdev; + precvframe->u.hdr.pkt = pkt_copy; + precvframe->u.hdr.rx_head = pkt_copy->data; + precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); + precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; + } + else + { + DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n"); + //precvframe->u.hdr.pkt = rtw_skb_clone(pskb); + //precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; + //precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612); + + precvframe->u.hdr.pkt = NULL; + rtw_free_recvframe(precvframe, pfree_recv_queue); + + goto _exit_recvbuf2recvframe; + } + + recvframe_put(precvframe, skb_len); + //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); + + if (pattrib->physt) + { + pphy_info = (struct phy_stat*)(pbuf + RXDESC_OFFSET); + update_recvframe_phyinfo(precvframe, pphy_info); + } + +#ifdef CONFIG_USB_RX_AGGREGATION + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + case USB_RX_AGG_MIX: + pkt_offset = (u16)_RND128(pkt_offset); + break; + case USB_RX_AGG_USB: + pkt_offset = (u16)_RND4(pkt_offset); + break; + case USB_RX_AGG_DISABLE: + default: + break; + } +#endif + + if(rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } + + pkt_cnt--; + transfer_len -= pkt_offset; + pbuf += pkt_offset; + precvframe = NULL; + pkt_copy = NULL; + + if(transfer_len>0 && pkt_cnt==0) + pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; + + }while((transfer_len>0) && (pkt_cnt>0)); + +_exit_recvbuf2recvframe: + + return _SUCCESS; +} + +void rtl8192cu_recv_tasklet(void *priv) +{ + struct recv_buf *precvbuf = NULL; + _adapter *padapter = (_adapter*)priv; + struct recv_priv *precvpriv = &padapter->recvpriv; + + while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) + { + if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) + { + DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); + + break; + } + + + recvbuf2recvframe(padapter, precvbuf); + + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + } + +} + +static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) +{ + struct recv_buf *precvbuf = (struct recv_buf *)purb->context; + _adapter *padapter =(_adapter *)precvbuf->adapter; + struct recv_priv *precvpriv = &padapter->recvpriv; + + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); + + precvpriv->rx_pending_cnt --; + + if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); + + goto exit; + } + + if(purb->status==0)//SUCCESS + { + if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); + + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + } + else + { + rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); + + precvbuf->transfer_len = purb->actual_length; + + //rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf); + rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); + + tasklet_schedule(&precvpriv->recv_tasklet); + } + } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); + + DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); + + if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ + padapter->bSurpriseRemoved = _TRUE; + } + + switch(purb->status) { + case -EINVAL: + case -EPIPE: + case -ENODEV: + case -ESHUTDOWN: + //padapter->bSurpriseRemoved=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); + case -ENOENT: + padapter->bDriverStopped=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); + break; + case -EPROTO: + case -EILSEQ: + case -ETIME: + case -ECOMM: + case -EOVERFLOW: + #ifdef DBG_CONFIG_ERROR_DETECT + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; + } + #endif + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + break; + case -EINPROGRESS: + DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); + break; + default: + break; + } + + } + +exit: + +_func_exit_; + +} + +static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) +{ + int err; + unsigned int pipe; + u32 ret = _SUCCESS; + PURB purb = NULL; + struct recv_buf *precvbuf = (struct recv_buf *)rmem; + _adapter *adapter = pintfhdl->padapter; + struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); + struct recv_priv *precvpriv = &adapter->recvpriv; + struct usb_device *pusbd = pdvobj->pusbdev; + +_func_enter_; + + if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||dvobj_to_pwrctl(pdvobj)->pnp_bstop_trx) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); + return _FAIL; + } + + if(precvbuf !=NULL) + { + rtl8192cu_init_recvbuf(adapter, precvbuf); + + if(precvbuf->pbuf) + { + precvpriv->rx_pending_cnt++; + + purb = precvbuf->purb; + + //translate DMA FIFO addr to pipehandle + pipe = ffaddr2pipehdl(pdvobj, addr); + + usb_fill_bulk_urb(purb, pusbd, pipe, + precvbuf->pbuf, + MAX_RECVBUF_SZ, + usb_read_port_complete, + precvbuf);//context is precvbuf + + purb->transfer_dma = precvbuf->dma_transfer_addr; + purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + + err = usb_submit_urb(purb, GFP_ATOMIC); + if((err) && (err != (-EPERM))) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); + DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); + ret = _FAIL; + } + + } + + } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); + ret = _FAIL; + } + +_func_exit_; + + return ret; +} +#else // CONFIG_USE_USB_BUFFER_ALLOC_RX +static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxstat, struct phy_stat *pphy_info) +{ + s32 ret=_SUCCESS; +#ifdef CONFIG_CONCURRENT_MODE + u8 *primary_myid, *secondary_myid, *paddr1; + union recv_frame *precvframe_if2 = NULL; + _adapter *primary_padapter = precvframe->u.hdr.adapter; + _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; + struct recv_priv *precvpriv = &primary_padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + u8 *pbuf = precvframe->u.hdr.rx_data; + + if(!secondary_padapter) + return ret; + + paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); + + if(IS_MCAST(paddr1) == _FALSE)//unicast packets + { + //primary_myid = myid(&primary_padapter->eeprompriv); + secondary_myid = myid(&secondary_padapter->eeprompriv); + + if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) + { + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + } + + //ret = recv_entry(precvframe); + + } + else // Handle BC/MC Packets + { + + u8 clone = _TRUE; +#if 0 + u8 type, subtype, *paddr2, *paddr3; + + type = GetFrameType(pbuf); + subtype = GetFrameSubType(pbuf); //bit(7)~bit(2) + + switch (type) + { + case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets + if(subtype == WIFI_BEACON) + { + paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data); + + if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) && + _rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) + { + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + clone = _FALSE; + } + + if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) && + _rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN)) + { + if(clone==_FALSE) + { + clone = _TRUE; + } + else + { + clone = _FALSE; + } + + precvframe->u.hdr.adapter = primary_padapter; + } + + if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) || + check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)) + { + clone = _TRUE; + precvframe->u.hdr.adapter = primary_padapter; + } + + } + else if(subtype == WIFI_PROBEREQ) + { + //probe req frame is only for interface2 + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + clone = _FALSE; + } + break; + case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets + + break; + case WIFI_DATA_TYPE: //Handle BC/MC data Packets + //Notes: AP MODE never rx BC/MC data packets + + paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data); + + if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) + { + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + clone = _FALSE; + } + + break; + default: + + break; + } +#endif + + if(_TRUE == clone) + { + //clone/copy to if2 + u8 shift_sz = 0; + u32 alloc_sz, skb_len; + _pkt *pkt_copy = NULL; + struct rx_pkt_attrib *pattrib = NULL; + + precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); + if(precvframe_if2) + { + precvframe_if2->u.hdr.adapter = secondary_padapter; + + _rtw_init_listhead(&precvframe_if2->u.hdr.list); + precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. + precvframe_if2->u.hdr.len=0; + + _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); + + pattrib = &precvframe_if2->u.hdr.attrib; + + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { + shift_sz = 6; + } + else + { + shift_sz = 0; + } + + skb_len = pattrib->pkt_len; + + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) + alloc_sz = 1664; + else + alloc_sz = skb_len + 14; + } + else { + alloc_sz = skb_len; + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. + alloc_sz += 14; + } + + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = secondary_padapter->pnetdev; + precvframe_if2->u.hdr.pkt = pkt_copy; + precvframe_if2->u.hdr.rx_head = pkt_copy->data; + precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz; + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, pbuf, skb_len); + precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data; + + + recvframe_put(precvframe_if2, skb_len); + //recvframe_pull(precvframe_if2, drvinfo_sz + RXDESC_SIZE); + if(pphy_info) + update_recvframe_phyinfo(precvframe_if2, pphy_info); + //rtl8192c_translate_rx_signal_stuff(precvframe_if2, pphy_info); + + ret = rtw_recv_entry(precvframe_if2); + + } else { + rtw_free_recvframe(precvframe_if2, pfree_recv_queue); + DBG_8192C("%s()-%d: alloc_skb() failed!\n", __FUNCTION__, __LINE__); + } + + } + + } + + } + + ret = rtw_recv_entry(precvframe); + +#endif + + return ret; + +} + +static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb) +{ + u8 *pbuf; + u8 shift_sz = 0; + u16 pkt_cnt; + u32 pkt_offset, skb_len, alloc_sz; + s32 transfer_len; + struct recv_stat *prxstat; + struct phy_stat *pphy_info = NULL; + _pkt *pkt_copy = NULL; + union recv_frame *precvframe = NULL; + struct rx_pkt_attrib *pattrib = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + + + transfer_len = (s32)pskb->len; + pbuf = pskb->data; + + prxstat = (struct recv_stat *)pbuf; + pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; + +#if 0 //temp remove when disable usb rx aggregation + if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0)) + { + return _FAIL; + } +#endif + + do{ + RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, + ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n", + prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); + + prxstat = (struct recv_stat *)pbuf; + + precvframe = rtw_alloc_recvframe(pfree_recv_queue); + if(precvframe==NULL) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); + DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); + goto _exit_recvbuf2recvframe; + } + + _rtw_init_listhead(&precvframe->u.hdr.list); + precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. + precvframe->u.hdr.len=0; + +// rtl8192c_query_rx_desc_status(precvframe, prxstat); + update_recvframe_attrib(precvframe, prxstat); + + pattrib = &precvframe->u.hdr.attrib; + + if ((padapter->registrypriv.mp_mode == 0) && (pattrib->crc_err)){ + DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; + + if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); + DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { + shift_sz = 6; + } + else + { + shift_sz = 0; + } + + skb_len = pattrib->pkt_len; + + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) + alloc_sz = 1664; + else + alloc_sz = skb_len + 14; + } + else { + alloc_sz = skb_len; + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. + alloc_sz += 14; + } + + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = padapter->pnetdev; + precvframe->u.hdr.pkt = pkt_copy; + precvframe->u.hdr.rx_head = pkt_copy->data; + precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); + precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; + } + else + { + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) + { + DBG_8192C("recvbuf2recvframe: alloc_skb fail , drop frag frame \n"); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + precvframe->u.hdr.pkt = rtw_skb_clone(pskb); + if(precvframe->u.hdr.pkt) + { + precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail + = pbuf+ pattrib->drvinfo_sz + RXDESC_SIZE; + precvframe->u.hdr.rx_end = pbuf +pattrib->drvinfo_sz + RXDESC_SIZE+ alloc_sz; + } + else + { + DBG_8192C("recvbuf2recvframe: rtw_skb_clone fail\n"); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + } + + recvframe_put(precvframe, skb_len); + //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); + + if (pattrib->physt) + { + pphy_info = (struct phy_stat*)(pbuf + RXDESC_OFFSET); + update_recvframe_phyinfo(precvframe, pphy_info); + } + +#ifdef CONFIG_USB_RX_AGGREGATION + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + case USB_RX_AGG_MIX: + pkt_offset = (u16)_RND128(pkt_offset); + break; + case USB_RX_AGG_USB: + pkt_offset = (u16)_RND4(pkt_offset); + break; + case USB_RX_AGG_DISABLE: + default: + break; + } +#endif + +#ifdef CONFIG_CONCURRENT_MODE + if(pre_recv_entry(precvframe, prxstat, pphy_info) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } +#else + if(rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } +#endif + + pkt_cnt--; + transfer_len -= pkt_offset; + pbuf += pkt_offset; + precvframe = NULL; + pkt_copy = NULL; + + if(transfer_len>0 && pkt_cnt==0) + pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; + + }while((transfer_len>0) && (pkt_cnt>0)); + +_exit_recvbuf2recvframe: + + return _SUCCESS; +} + +void rtl8192cu_recv_tasklet(void *priv) +{ + _pkt *pskb; + _adapter *padapter = (_adapter*)priv; + struct recv_priv *precvpriv = &padapter->recvpriv; + + while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) + { + if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) + { + DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); + rtw_skb_free(pskb); + break; + } + + recvbuf2recvframe(padapter, pskb); + +#ifdef CONFIG_PREALLOC_RECV_SKB + + skb_reset_tail_pointer(pskb); + + pskb->len = 0; + + skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); + +#else + rtw_skb_free(pskb); +#endif + + } + +} + + +static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) +{ + _irqL irqL; + uint isevt, *pbuf; + struct recv_buf *precvbuf = (struct recv_buf *)purb->context; + _adapter *padapter =(_adapter *)precvbuf->adapter; + struct recv_priv *precvpriv = &padapter->recvpriv; + + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); + + //_enter_critical(&precvpriv->lock, &irqL); + //precvbuf->irp_pending=_FALSE; + //precvpriv->rx_pending_cnt --; + //_exit_critical(&precvpriv->lock, &irqL); + + precvpriv->rx_pending_cnt --; + + //if(precvpriv->rx_pending_cnt== 0) + //{ + // RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n")); + // _rtw_up_sema(&precvpriv->allrxreturnevt); + //} + + if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); + + #ifdef CONFIG_PREALLOC_RECV_SKB + precvbuf->reuse = _TRUE; + #else + if(precvbuf->pskb){ + DBG_8192C("==> free skb(%p)\n",precvbuf->pskb); + rtw_skb_free(precvbuf->pskb); + } + #endif + DBG_8192C("%s()-%d: RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", + __FUNCTION__, __LINE__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); + goto exit; + } + + if(purb->status==0)//SUCCESS + { + if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); + precvbuf->reuse = _TRUE; + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); + } + else + { + rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); + + precvbuf->transfer_len = purb->actual_length; + skb_put(precvbuf->pskb, purb->actual_length); + skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb); + + if (skb_queue_len(&precvpriv->rx_skb_queue)<=1) + tasklet_schedule(&precvpriv->recv_tasklet); + + precvbuf->pskb = NULL; + precvbuf->reuse = _FALSE; + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + } + } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); + + DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); + + if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ + padapter->bSurpriseRemoved = _TRUE; + } + + switch(purb->status) { + case -EINVAL: + case -EPIPE: + case -ENODEV: + case -ESHUTDOWN: + //padapter->bSurpriseRemoved=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); + case -ENOENT: + padapter->bDriverStopped=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); + break; + case -EPROTO: + case -EILSEQ: + case -ETIME: + case -ECOMM: + case -EOVERFLOW: + #ifdef DBG_CONFIG_ERROR_DETECT + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; + } + #endif + precvbuf->reuse = _TRUE; + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + break; + case -EINPROGRESS: + DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); + break; + default: + break; + } + + } + +exit: + +_func_exit_; + +} + +static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) +{ + _irqL irqL; + int err; + unsigned int pipe; + SIZE_PTR tmpaddr=0; + SIZE_PTR alignment=0; + u32 ret = _SUCCESS; + PURB purb = NULL; + struct recv_buf *precvbuf = (struct recv_buf *)rmem; + _adapter *adapter = pintfhdl->padapter; + struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); + struct recv_priv *precvpriv = &adapter->recvpriv; + struct usb_device *pusbd = pdvobj->pusbdev; + + +_func_enter_; + + if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||dvobj_to_pwrctl(pdvobj)->pnp_bstop_trx) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); + return _FAIL; + } + +#ifdef CONFIG_PREALLOC_RECV_SKB + if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) + { + if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue))) + { + precvbuf->reuse = _TRUE; + } + } +#endif + + + if(precvbuf !=NULL) + { + rtl8192cu_init_recvbuf(adapter, precvbuf); + + //re-assign for linux based on skb + if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) + { + precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); + + if(precvbuf->pskb == NULL) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n")); + return _FAIL; + } + + tmpaddr = (SIZE_PTR)precvbuf->pskb->data; + alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); + skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); + + precvbuf->phead = precvbuf->pskb->head; + precvbuf->pdata = precvbuf->pskb->data; + precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); + precvbuf->pend = skb_end_pointer(precvbuf->pskb); + precvbuf->pbuf = precvbuf->pskb->data; + } + else//reuse skb + { + precvbuf->phead = precvbuf->pskb->head; + precvbuf->pdata = precvbuf->pskb->data; + precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); + precvbuf->pend = skb_end_pointer(precvbuf->pskb); + precvbuf->pbuf = precvbuf->pskb->data; + + precvbuf->reuse = _FALSE; + } + + //_enter_critical(&precvpriv->lock, &irqL); + //precvpriv->rx_pending_cnt++; + //precvbuf->irp_pending = _TRUE; + //_exit_critical(&precvpriv->lock, &irqL); + + precvpriv->rx_pending_cnt++; + + purb = precvbuf->purb; + + //translate DMA FIFO addr to pipehandle + pipe = ffaddr2pipehdl(pdvobj, addr); + + usb_fill_bulk_urb(purb, pusbd, pipe, + precvbuf->pbuf, + MAX_RECVBUF_SZ, + usb_read_port_complete, + precvbuf);//context is precvbuf + + err = usb_submit_urb(purb, GFP_ATOMIC); + if((err) && (err != (-EPERM))) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); + DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); + ret = _FAIL; + } + } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); + ret = _FAIL; + } + +_func_exit_; + + return ret; +} +#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX + +void rtl8192cu_xmit_tasklet(void *priv) +{ + int ret = _FALSE; + _adapter *padapter = (_adapter*)priv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + + if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE) + return; + + while(1) + { + if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE)) + { + DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); + break; + } + + ret = rtl8192cu_xmitframe_complete(padapter, pxmitpriv, NULL); + + if(ret==_FALSE) + break; + + } + +} + +void rtl8723au_set_intf_ops(struct _io_ops *pops) +{ + _func_enter_; + + _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); + + pops->_read8 = &usb_read8; + pops->_read16 = &usb_read16; + pops->_read32 = &usb_read32; + pops->_read_mem = &usb_read_mem; + pops->_read_port = &usb_read_port; + + pops->_write8 = &usb_write8; + pops->_write16 = &usb_write16; + pops->_write32 = &usb_write32; + pops->_writeN = &usb_writeN; + +#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ + pops->_write8_async= &usb_async_write8; + pops->_write16_async = &usb_async_write16; + pops->_write32_async = &usb_async_write32; +#endif + pops->_write_mem = &usb_write_mem; + pops->_write_port = &usb_write_port; + + pops->_read_port_cancel = &usb_read_port_cancel; + pops->_write_port_cancel = &usb_write_port_cancel; + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + pops->_read_interrupt = &usb_read_interrupt; +#endif + + _func_exit_; + +} +void rtl8723au_set_hw_type(_adapter *padapter) +{ + padapter->chip_type = RTL8723A; + padapter->HardwareType = HARDWARE_TYPE_RTL8723AU; + DBG_871X("CHIP TYPE: RTL8723A\n"); +}
\ No newline at end of file |