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path: root/drivers/pinctrl/sh-pfc/pfc-shx3.c
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Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-shx3.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-shx3.c423
1 files changed, 200 insertions, 223 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
index 6594c8c48747..55262bd869ed 100644
--- a/drivers/pinctrl/sh-pfc/pfc-shx3.c
+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
@@ -56,26 +56,6 @@ enum {
PH3_IN, PH2_IN, PH1_IN, PH0_IN,
PINMUX_INPUT_END,
- PINMUX_INPUT_PULLUP_BEGIN,
- PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
- PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
- PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
- PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
- PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
- PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
- PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
- PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
- PE7_IN_PU, PE6_IN_PU, PE5_IN_PU, PE4_IN_PU,
- PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
- PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
- PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
- PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
- PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
-
- PH5_IN_PU, PH4_IN_PU,
- PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
- PINMUX_INPUT_PULLUP_END,
-
PINMUX_OUTPUT_BEGIN,
PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
@@ -147,85 +127,84 @@ enum {
PINMUX_MARK_END,
};
-static const pinmux_enum_t shx3_pinmux_data[] = {
-
+static const u16 pinmux_data[] = {
/* PA GPIO */
- PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
- PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
- PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
- PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
- PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
- PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
- PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
- PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
+ PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
+ PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
+ PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
+ PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
+ PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
+ PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
+ PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
+ PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
/* PB GPIO */
- PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
- PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
- PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
- PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
- PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
- PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
- PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
- PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
+ PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
+ PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
+ PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
+ PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
+ PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
+ PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
+ PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
+ PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
/* PC GPIO */
- PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
- PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
- PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
- PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
- PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
- PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
- PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
- PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
+ PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
+ PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
+ PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
+ PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
+ PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
+ PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
+ PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
+ PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
/* PD GPIO */
- PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
- PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
- PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
- PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
- PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
- PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
- PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
- PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
+ PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
+ PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
+ PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
+ PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
+ PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
+ PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
+ PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
+ PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
/* PE GPIO */
- PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
- PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
- PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
- PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
- PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
- PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
- PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
- PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
+ PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT),
+ PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT),
+ PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT),
+ PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT),
+ PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT),
+ PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT),
+ PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT),
+ PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT),
/* PF GPIO */
- PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
- PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
- PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
- PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
- PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
- PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
- PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
- PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
+ PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
+ PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
+ PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
+ PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
+ PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
+ PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
+ PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
+ PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
/* PG GPIO */
- PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
- PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
- PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
- PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
- PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
- PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
- PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
- PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
+ PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
+ PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
+ PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
+ PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT),
+ PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT),
+ PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT),
+ PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT),
+ PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT),
/* PH GPIO */
- PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
- PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
- PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
- PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
- PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
- PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
+ PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
+ PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
+ PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
+ PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
+ PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
+ PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
/* PA FN */
PINMUX_DATA(D31_MARK, PA7_FN),
@@ -306,89 +285,89 @@ static const pinmux_enum_t shx3_pinmux_data[] = {
PINMUX_DATA(IRQOUT_MARK, PH0_FN),
};
-static struct sh_pfc_pin shx3_pinmux_pins[] = {
+static struct sh_pfc_pin pinmux_pins[] = {
/* PA */
- PINMUX_GPIO(GPIO_PA7, PA7_DATA),
- PINMUX_GPIO(GPIO_PA6, PA6_DATA),
- PINMUX_GPIO(GPIO_PA5, PA5_DATA),
- PINMUX_GPIO(GPIO_PA4, PA4_DATA),
- PINMUX_GPIO(GPIO_PA3, PA3_DATA),
- PINMUX_GPIO(GPIO_PA2, PA2_DATA),
- PINMUX_GPIO(GPIO_PA1, PA1_DATA),
- PINMUX_GPIO(GPIO_PA0, PA0_DATA),
+ PINMUX_GPIO(PA7),
+ PINMUX_GPIO(PA6),
+ PINMUX_GPIO(PA5),
+ PINMUX_GPIO(PA4),
+ PINMUX_GPIO(PA3),
+ PINMUX_GPIO(PA2),
+ PINMUX_GPIO(PA1),
+ PINMUX_GPIO(PA0),
/* PB */
- PINMUX_GPIO(GPIO_PB7, PB7_DATA),
- PINMUX_GPIO(GPIO_PB6, PB6_DATA),
- PINMUX_GPIO(GPIO_PB5, PB5_DATA),
- PINMUX_GPIO(GPIO_PB4, PB4_DATA),
- PINMUX_GPIO(GPIO_PB3, PB3_DATA),
- PINMUX_GPIO(GPIO_PB2, PB2_DATA),
- PINMUX_GPIO(GPIO_PB1, PB1_DATA),
- PINMUX_GPIO(GPIO_PB0, PB0_DATA),
+ PINMUX_GPIO(PB7),
+ PINMUX_GPIO(PB6),
+ PINMUX_GPIO(PB5),
+ PINMUX_GPIO(PB4),
+ PINMUX_GPIO(PB3),
+ PINMUX_GPIO(PB2),
+ PINMUX_GPIO(PB1),
+ PINMUX_GPIO(PB0),
/* PC */
- PINMUX_GPIO(GPIO_PC7, PC7_DATA),
- PINMUX_GPIO(GPIO_PC6, PC6_DATA),
- PINMUX_GPIO(GPIO_PC5, PC5_DATA),
- PINMUX_GPIO(GPIO_PC4, PC4_DATA),
- PINMUX_GPIO(GPIO_PC3, PC3_DATA),
- PINMUX_GPIO(GPIO_PC2, PC2_DATA),
- PINMUX_GPIO(GPIO_PC1, PC1_DATA),
- PINMUX_GPIO(GPIO_PC0, PC0_DATA),
+ PINMUX_GPIO(PC7),
+ PINMUX_GPIO(PC6),
+ PINMUX_GPIO(PC5),
+ PINMUX_GPIO(PC4),
+ PINMUX_GPIO(PC3),
+ PINMUX_GPIO(PC2),
+ PINMUX_GPIO(PC1),
+ PINMUX_GPIO(PC0),
/* PD */
- PINMUX_GPIO(GPIO_PD7, PD7_DATA),
- PINMUX_GPIO(GPIO_PD6, PD6_DATA),
- PINMUX_GPIO(GPIO_PD5, PD5_DATA),
- PINMUX_GPIO(GPIO_PD4, PD4_DATA),
- PINMUX_GPIO(GPIO_PD3, PD3_DATA),
- PINMUX_GPIO(GPIO_PD2, PD2_DATA),
- PINMUX_GPIO(GPIO_PD1, PD1_DATA),
- PINMUX_GPIO(GPIO_PD0, PD0_DATA),
+ PINMUX_GPIO(PD7),
+ PINMUX_GPIO(PD6),
+ PINMUX_GPIO(PD5),
+ PINMUX_GPIO(PD4),
+ PINMUX_GPIO(PD3),
+ PINMUX_GPIO(PD2),
+ PINMUX_GPIO(PD1),
+ PINMUX_GPIO(PD0),
/* PE */
- PINMUX_GPIO(GPIO_PE7, PE7_DATA),
- PINMUX_GPIO(GPIO_PE6, PE6_DATA),
- PINMUX_GPIO(GPIO_PE5, PE5_DATA),
- PINMUX_GPIO(GPIO_PE4, PE4_DATA),
- PINMUX_GPIO(GPIO_PE3, PE3_DATA),
- PINMUX_GPIO(GPIO_PE2, PE2_DATA),
- PINMUX_GPIO(GPIO_PE1, PE1_DATA),
- PINMUX_GPIO(GPIO_PE0, PE0_DATA),
+ PINMUX_GPIO(PE7),
+ PINMUX_GPIO(PE6),
+ PINMUX_GPIO(PE5),
+ PINMUX_GPIO(PE4),
+ PINMUX_GPIO(PE3),
+ PINMUX_GPIO(PE2),
+ PINMUX_GPIO(PE1),
+ PINMUX_GPIO(PE0),
/* PF */
- PINMUX_GPIO(GPIO_PF7, PF7_DATA),
- PINMUX_GPIO(GPIO_PF6, PF6_DATA),
- PINMUX_GPIO(GPIO_PF5, PF5_DATA),
- PINMUX_GPIO(GPIO_PF4, PF4_DATA),
- PINMUX_GPIO(GPIO_PF3, PF3_DATA),
- PINMUX_GPIO(GPIO_PF2, PF2_DATA),
- PINMUX_GPIO(GPIO_PF1, PF1_DATA),
- PINMUX_GPIO(GPIO_PF0, PF0_DATA),
+ PINMUX_GPIO(PF7),
+ PINMUX_GPIO(PF6),
+ PINMUX_GPIO(PF5),
+ PINMUX_GPIO(PF4),
+ PINMUX_GPIO(PF3),
+ PINMUX_GPIO(PF2),
+ PINMUX_GPIO(PF1),
+ PINMUX_GPIO(PF0),
/* PG */
- PINMUX_GPIO(GPIO_PG7, PG7_DATA),
- PINMUX_GPIO(GPIO_PG6, PG6_DATA),
- PINMUX_GPIO(GPIO_PG5, PG5_DATA),
- PINMUX_GPIO(GPIO_PG4, PG4_DATA),
- PINMUX_GPIO(GPIO_PG3, PG3_DATA),
- PINMUX_GPIO(GPIO_PG2, PG2_DATA),
- PINMUX_GPIO(GPIO_PG1, PG1_DATA),
- PINMUX_GPIO(GPIO_PG0, PG0_DATA),
+ PINMUX_GPIO(PG7),
+ PINMUX_GPIO(PG6),
+ PINMUX_GPIO(PG5),
+ PINMUX_GPIO(PG4),
+ PINMUX_GPIO(PG3),
+ PINMUX_GPIO(PG2),
+ PINMUX_GPIO(PG1),
+ PINMUX_GPIO(PG0),
/* PH */
- PINMUX_GPIO(GPIO_PH5, PH5_DATA),
- PINMUX_GPIO(GPIO_PH4, PH4_DATA),
- PINMUX_GPIO(GPIO_PH3, PH3_DATA),
- PINMUX_GPIO(GPIO_PH2, PH2_DATA),
- PINMUX_GPIO(GPIO_PH1, PH1_DATA),
- PINMUX_GPIO(GPIO_PH0, PH0_DATA),
+ PINMUX_GPIO(PH5),
+ PINMUX_GPIO(PH4),
+ PINMUX_GPIO(PH3),
+ PINMUX_GPIO(PH2),
+ PINMUX_GPIO(PH1),
+ PINMUX_GPIO(PH0),
};
-#define PINMUX_FN_BASE ARRAY_SIZE(shx3_pinmux_pins)
+#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
-static const struct pinmux_func shx3_pinmux_func_gpios[] = {
+static const struct pinmux_func pinmux_func_gpios[] = {
/* FN */
GPIO_FN(D31),
GPIO_FN(D30),
@@ -454,83 +433,83 @@ static const struct pinmux_func shx3_pinmux_func_gpios[] = {
GPIO_FN(IRQOUT),
};
-static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
+static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) {
- PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
- PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
- PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
- PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
- PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
- PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
- PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
- PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU,
- PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
- PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
- PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
- PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
- PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
- PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
- PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
- PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU, },
+ PA7_FN, PA7_OUT, PA7_IN, 0,
+ PA6_FN, PA6_OUT, PA6_IN, 0,
+ PA5_FN, PA5_OUT, PA5_IN, 0,
+ PA4_FN, PA4_OUT, PA4_IN, 0,
+ PA3_FN, PA3_OUT, PA3_IN, 0,
+ PA2_FN, PA2_OUT, PA2_IN, 0,
+ PA1_FN, PA1_OUT, PA1_IN, 0,
+ PA0_FN, PA0_OUT, PA0_IN, 0,
+ PB7_FN, PB7_OUT, PB7_IN, 0,
+ PB6_FN, PB6_OUT, PB6_IN, 0,
+ PB5_FN, PB5_OUT, PB5_IN, 0,
+ PB4_FN, PB4_OUT, PB4_IN, 0,
+ PB3_FN, PB3_OUT, PB3_IN, 0,
+ PB2_FN, PB2_OUT, PB2_IN, 0,
+ PB1_FN, PB1_OUT, PB1_IN, 0,
+ PB0_FN, PB0_OUT, PB0_IN, 0, },
},
{ PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2) {
- PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
- PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
- PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
- PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
- PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
- PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
- PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
- PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU,
- PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
- PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
- PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
- PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
- PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
- PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
- PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
- PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU, },
+ PC7_FN, PC7_OUT, PC7_IN, 0,
+ PC6_FN, PC6_OUT, PC6_IN, 0,
+ PC5_FN, PC5_OUT, PC5_IN, 0,
+ PC4_FN, PC4_OUT, PC4_IN, 0,
+ PC3_FN, PC3_OUT, PC3_IN, 0,
+ PC2_FN, PC2_OUT, PC2_IN, 0,
+ PC1_FN, PC1_OUT, PC1_IN, 0,
+ PC0_FN, PC0_OUT, PC0_IN, 0,
+ PD7_FN, PD7_OUT, PD7_IN, 0,
+ PD6_FN, PD6_OUT, PD6_IN, 0,
+ PD5_FN, PD5_OUT, PD5_IN, 0,
+ PD4_FN, PD4_OUT, PD4_IN, 0,
+ PD3_FN, PD3_OUT, PD3_IN, 0,
+ PD2_FN, PD2_OUT, PD2_IN, 0,
+ PD1_FN, PD1_OUT, PD1_IN, 0,
+ PD0_FN, PD0_OUT, PD0_IN, 0, },
},
{ PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2) {
- PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
- PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
- PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
- PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
- PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
- PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
- PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
- PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU,
- PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
- PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
- PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
- PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
- PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
- PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
- PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
- PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU, },
+ PE7_FN, PE7_OUT, PE7_IN, 0,
+ PE6_FN, PE6_OUT, PE6_IN, 0,
+ PE5_FN, PE5_OUT, PE5_IN, 0,
+ PE4_FN, PE4_OUT, PE4_IN, 0,
+ PE3_FN, PE3_OUT, PE3_IN, 0,
+ PE2_FN, PE2_OUT, PE2_IN, 0,
+ PE1_FN, PE1_OUT, PE1_IN, 0,
+ PE0_FN, PE0_OUT, PE0_IN, 0,
+ PF7_FN, PF7_OUT, PF7_IN, 0,
+ PF6_FN, PF6_OUT, PF6_IN, 0,
+ PF5_FN, PF5_OUT, PF5_IN, 0,
+ PF4_FN, PF4_OUT, PF4_IN, 0,
+ PF3_FN, PF3_OUT, PF3_IN, 0,
+ PF2_FN, PF2_OUT, PF2_IN, 0,
+ PF1_FN, PF1_OUT, PF1_IN, 0,
+ PF0_FN, PF0_OUT, PF0_IN, 0, },
},
{ PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2) {
- PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
- PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
- PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
- PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
- PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
- PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
- PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
- PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU,
+ PG7_FN, PG7_OUT, PG7_IN, 0,
+ PG6_FN, PG6_OUT, PG6_IN, 0,
+ PG5_FN, PG5_OUT, PG5_IN, 0,
+ PG4_FN, PG4_OUT, PG4_IN, 0,
+ PG3_FN, PG3_OUT, PG3_IN, 0,
+ PG2_FN, PG2_OUT, PG2_IN, 0,
+ PG1_FN, PG1_OUT, PG1_IN, 0,
+ PG0_FN, PG0_OUT, PG0_IN, 0,
0, 0, 0, 0,
0, 0, 0, 0,
- PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
- PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
- PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
- PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
- PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
- PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU, },
+ PH5_FN, PH5_OUT, PH5_IN, 0,
+ PH4_FN, PH4_OUT, PH4_IN, 0,
+ PH3_FN, PH3_OUT, PH3_IN, 0,
+ PH2_FN, PH2_OUT, PH2_IN, 0,
+ PH1_FN, PH1_OUT, PH1_IN, 0,
+ PH0_FN, PH0_OUT, PH0_IN, 0, },
},
{ },
};
-static const struct pinmux_data_reg shx3_pinmux_data_regs[] = {
+static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PABDR", 0xffc70010, 32) {
0, 0, 0, 0, 0, 0, 0, 0,
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
@@ -569,16 +548,14 @@ static const struct pinmux_data_reg shx3_pinmux_data_regs[] = {
const struct sh_pfc_soc_info shx3_pinmux_info = {
.name = "shx3_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .input_pu = { PINMUX_INPUT_PULLUP_BEGIN,
- PINMUX_INPUT_PULLUP_END },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .pins = shx3_pinmux_pins,
- .nr_pins = ARRAY_SIZE(shx3_pinmux_pins),
- .func_gpios = shx3_pinmux_func_gpios,
- .nr_func_gpios = ARRAY_SIZE(shx3_pinmux_func_gpios),
- .gpio_data = shx3_pinmux_data,
- .gpio_data_size = ARRAY_SIZE(shx3_pinmux_data),
- .cfg_regs = shx3_pinmux_config_regs,
- .data_regs = shx3_pinmux_data_regs,
+ .pins = pinmux_pins,
+ .nr_pins = ARRAY_SIZE(pinmux_pins),
+ .func_gpios = pinmux_func_gpios,
+ .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
+ .gpio_data = pinmux_data,
+ .gpio_data_size = ARRAY_SIZE(pinmux_data),
+ .cfg_regs = pinmux_config_regs,
+ .data_regs = pinmux_data_regs,
};