diff options
Diffstat (limited to 'drivers/staging/gma500/psb_drm.h')
| -rw-r--r-- | drivers/staging/gma500/psb_drm.h | 152 |
1 files changed, 48 insertions, 104 deletions
diff --git a/drivers/staging/gma500/psb_drm.h b/drivers/staging/gma500/psb_drm.h index 49ffdd5b90e2..0da846835688 100644 --- a/drivers/staging/gma500/psb_drm.h +++ b/drivers/staging/gma500/psb_drm.h @@ -1,5 +1,5 @@ /************************************************************************** - * Copyright (c) 2007, Intel Corporation. + * Copyright (c) 2007-2011, Intel Corporation. * All Rights Reserved. * Copyright (c) 2008, Tungsten Graphics Inc. Cedar Park, TX., USA. * All Rights Reserved. @@ -22,84 +22,8 @@ #ifndef _PSB_DRM_H_ #define _PSB_DRM_H_ -#if defined(__linux__) && !defined(__KERNEL__) -#include<stdint.h> -#include <linux/types.h> -#include "drm_mode.h" -#endif - -#define DRM_PSB_SAREA_MAJOR 0 -#define DRM_PSB_SAREA_MINOR 2 -#define PSB_FIXED_SHIFT 16 - #define PSB_NUM_PIPE 3 -/* - * Public memory types. - */ - -typedef s32 psb_fixed; -typedef u32 psb_ufixed; - -static inline s32 psb_int_to_fixed(int a) -{ - return a * (1 << PSB_FIXED_SHIFT); -} - -static inline u32 psb_unsigned_to_ufixed(unsigned int a) -{ - return a << PSB_FIXED_SHIFT; -} - -/*Status of the command sent to the gfx device.*/ -typedef enum { - DRM_CMD_SUCCESS, - DRM_CMD_FAILED, - DRM_CMD_HANG -} drm_cmd_status_t; - -struct drm_psb_scanout { - u32 buffer_id; /* DRM buffer object ID */ - u32 rotation; /* Rotation as in RR_rotation definitions */ - u32 stride; /* Buffer stride in bytes */ - u32 depth; /* Buffer depth in bits (NOT) bpp */ - u32 width; /* Buffer width in pixels */ - u32 height; /* Buffer height in lines */ - s32 transform[3][3]; /* Buffer composite transform */ - /* (scaling, rot, reflect) */ -}; - -#define DRM_PSB_SAREA_OWNERS 16 -#define DRM_PSB_SAREA_OWNER_2D 0 -#define DRM_PSB_SAREA_OWNER_3D 1 - -#define DRM_PSB_SAREA_SCANOUTS 3 - -struct drm_psb_sarea { - /* Track changes of this data structure */ - - u32 major; - u32 minor; - - /* Last context to touch part of hw */ - u32 ctx_owners[DRM_PSB_SAREA_OWNERS]; - - /* Definition of front- and rotated buffers */ - u32 num_scanouts; - struct drm_psb_scanout scanouts[DRM_PSB_SAREA_SCANOUTS]; - - int planeA_x; - int planeA_y; - int planeA_w; - int planeA_h; - int planeB_x; - int planeB_y; - int planeB_w; - int planeB_h; - /* Number of active scanouts */ - u32 num_active_scanouts; -}; - #define PSB_GPU_ACCESS_READ (1ULL << 32) #define PSB_GPU_ACCESS_WRITE (1ULL << 33) #define PSB_GPU_ACCESS_MASK (PSB_GPU_ACCESS_READ | PSB_GPU_ACCESS_WRITE) @@ -194,10 +118,10 @@ struct drm_psb_register_rw_arg { u32 OGAMC3; u32 OGAMC4; u32 OGAMC5; - u32 IEP_ENABLED; - u32 IEP_BLE_MINMAX; - u32 IEP_BSSCC_CONTROL; - u32 b_wait_vblank; + u32 IEP_ENABLED; + u32 IEP_BLE_MINMAX; + u32 IEP_BSSCC_CONTROL; + u32 b_wait_vblank; } overlay; u32 sprite_enable_mask; @@ -221,44 +145,27 @@ struct drm_psb_register_rw_arg { /* Controlling the kernel modesetting buffers */ -#define DRM_PSB_KMS_OFF 0x00 -#define DRM_PSB_KMS_ON 0x01 -#define DRM_PSB_VT_LEAVE 0x02 -#define DRM_PSB_VT_ENTER 0x03 -#define DRM_PSB_EXTENSION 0x06 #define DRM_PSB_SIZES 0x07 #define DRM_PSB_FUSE_REG 0x08 -#define DRM_PSB_VBT 0x09 #define DRM_PSB_DC_STATE 0x0A #define DRM_PSB_ADB 0x0B #define DRM_PSB_MODE_OPERATION 0x0C #define DRM_PSB_STOLEN_MEMORY 0x0D #define DRM_PSB_REGISTER_RW 0x0E -#define DRM_PSB_GTT_MAP 0x0F -#define DRM_PSB_GTT_UNMAP 0x10 -#define DRM_PSB_GETPAGEADDRS 0x11 -/** + +/* * NOTE: Add new commands here, but increment * the values below and increment their * corresponding defines where they're * defined elsewhere. */ -#define DRM_PVR_RESERVED1 0x12 -#define DRM_PVR_RESERVED2 0x13 -#define DRM_PVR_RESERVED3 0x14 -#define DRM_PVR_RESERVED4 0x15 -#define DRM_PVR_RESERVED5 0x16 - -#define DRM_PSB_HIST_ENABLE 0x17 -#define DRM_PSB_HIST_STATUS 0x18 -#define DRM_PSB_UPDATE_GUARD 0x19 -#define DRM_PSB_INIT_COMM 0x1A + +#define DRM_PSB_GEM_CREATE 0x10 +#define DRM_PSB_2D_OP 0x11 +#define DRM_PSB_GEM_MMAP 0x12 #define DRM_PSB_DPST 0x1B #define DRM_PSB_GAMMA 0x1C #define DRM_PSB_DPST_BL 0x1D - -#define DRM_PVR_RESERVED6 0x1E - #define DRM_PSB_GET_PIPE_FROM_CRTC_ID 0x1F #define PSB_MODE_OPERATION_MODE_VALID 0x01 @@ -272,4 +179,41 @@ struct drm_psb_get_pipe_from_crtc_id_arg { u32 pipe; }; +/* FIXME: move this into a medfield header once we are sure it isn't needed for an + ioctl */ +struct psb_drm_dpu_rect { + int x, y; + int width, height; +}; + +struct drm_psb_gem_create { + __u64 size; + __u32 handle; + __u32 flags; +#define PSB_GEM_CREATE_STOLEN 1 /* Stolen memory can be used */ +}; + +#define PSB_2D_OP_BUFLEN 16 + +struct drm_psb_2d_op { + __u32 src; /* Handles, only src supported right now */ + __u32 dst; + __u32 mask; + __u32 pat; + __u32 size; /* In dwords of command */ + __u32 spare; /* And bumps array to u64 align */ + __u32 cmd[PSB_2D_OP_BUFLEN]; +}; + +struct drm_psb_gem_mmap { + __u32 handle; + __u32 pad; + /** + * Fake offset to use for subsequent mmap call + * + * This is a fixed-size type for 32/64 compatibility. + */ + __u64 offset; +}; + #endif |