diff options
Diffstat (limited to 'drivers/staging/sm750fb')
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_chip.c | 106 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_chip.h | 2 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_display.c | 15 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_display.h | 94 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_dvi.c | 8 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_hwi2c.c | 2 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_mode.c | 33 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_power.c | 6 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_sii164.c | 7 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_swi2c.c | 14 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/sm750.c | 2 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/sm750.h | 16 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/sm750_accel.c | 100 | ||||
| -rw-r--r-- | drivers/staging/sm750fb/sm750_hw.c | 114 |
14 files changed, 276 insertions, 243 deletions
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index f80ee776677f..839d6730bde9 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -6,11 +6,9 @@ #include "ddk750_chip.h" #include "ddk750_power.h" -/* n / d + 1 / 2 = (2n + d) / 2d */ -#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) #define MHz(x) ((x) * 1000000) -logical_chip_type_t getChipType(void) +logical_chip_type_t sm750_get_chip_type(void) { unsigned short physicalID; char physicalRev; @@ -37,7 +35,7 @@ static unsigned int get_mxclk_freq(void) unsigned int pll_reg; unsigned int M, N, OD, POD; - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return MHz(130); pll_reg = PEEK32(MXCLK_PLL_CTRL); @@ -60,7 +58,7 @@ static void setChipClock(unsigned int frequency) unsigned int ulActualMxClk; /* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */ - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return; if (frequency) { @@ -71,9 +69,10 @@ static void setChipClock(unsigned int frequency) pll.clockType = MXCLK_PLL; /* - * Call calcPllValue() to fill up the other fields for PLL structure. - * Sometime, the chip cannot set up the exact clock required by User. - * Return value from calcPllValue() gives the actual possible clock. + * Call calcPllValue() to fill the other fields of PLL structure. + * Sometime, the chip cannot set up the exact clock + * required by the User. + * Return value of calcPllValue gives the actual possible clock. */ ulActualMxClk = calcPllValue(frequency, &pll); @@ -86,18 +85,22 @@ static void setMemoryClock(unsigned int frequency) { unsigned int reg, divisor; - /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ - if (getChipType() == SM750LE) + /* Cheok_0509: For SM750LE, the memory clock is fixed. + * Nothing to set. + */ + if (sm750_get_chip_type() == SM750LE) return; if (frequency) { - /* Set the frequency to the maximum frequency that the DDR Memory can take - which is 336MHz. */ + /* + * Set the frequency to the maximum frequency + * that the DDR Memory can take which is 336MHz. + */ if (frequency > MHz(336)) frequency = MHz(336); /* Calculate the divisor */ - divisor = roundedDiv(get_mxclk_freq(), frequency); + divisor = DIV_ROUND_CLOSEST(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_M2XCLK_MASK; @@ -133,18 +136,21 @@ static void setMasterClock(unsigned int frequency) { unsigned int reg, divisor; - /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ - if (getChipType() == SM750LE) + /* Cheok_0509: For SM750LE, the memory clock is fixed. + * Nothing to set. + */ + if (sm750_get_chip_type() == SM750LE) return; if (frequency) { - /* Set the frequency to the maximum frequency that the SM750 engine can - run, which is about 190 MHz. */ + /* Set the frequency to the maximum frequency + * that the SM750 engine can run, which is about 190 MHz. + */ if (frequency > MHz(190)) frequency = MHz(190); /* Calculate the divisor */ - divisor = roundedDiv(get_mxclk_freq(), frequency); + divisor = DIV_ROUND_CLOSEST(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_MCLK_MASK; @@ -174,7 +180,7 @@ unsigned int ddk750_getVMSize(void) unsigned int data; /* sm750le only use 64 mb memory*/ - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return SZ_64M; /* for 750,always use power mode0*/ @@ -213,7 +219,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) reg |= (CURRENT_GATE_DISPLAY | CURRENT_GATE_LOCALMEM); setCurrentGate(reg); - if (getChipType() != SM750LE) { + if (sm750_get_chip_type() != SM750LE) { /* set panel pll and graphic mode via mmio_88 */ reg = PEEK32(VGA_CONFIGURATION); reg |= (VGA_CONFIGURATION_PLL | VGA_CONFIGURATION_MODE); @@ -236,9 +242,10 @@ int ddk750_initHw(initchip_param_t *pInitParam) setMasterClock(MHz(pInitParam->masterClock)); - /* Reset the memory controller. If the memory controller is not reset in SM750, - the system might hang when sw accesses the memory. - The memory should be resetted after changing the MXCLK. + /* Reset the memory controller. + * If the memory controller is not reset in SM750, + * the system might hang when sw accesses the memory. + * The memory should be resetted after changing the MXCLK. */ if (pInitParam->resetMemory == 1) { reg = PEEK32(MISC_CTRL); @@ -282,24 +289,27 @@ int ddk750_initHw(initchip_param_t *pInitParam) } /* - monk liu @ 4/6/2011: - re-write the calculatePLL function of ddk750. - the original version function does not use some mathematics tricks and shortcut - when it doing the calculation of the best N,M,D combination - I think this version gives a little upgrade in speed - - 750 pll clock formular: - Request Clock = (Input Clock * M )/(N * X) - - Input Clock = 14318181 hz - X = 2 power D - D ={0,1,2,3,4,5,6} - M = {1,...,255} - N = {2,...,15} -*/ + * monk liu @ 4/6/2011: + * re-write the calculatePLL function of ddk750. + * the original version function does not use + * some mathematics tricks and shortcut + * when it doing the calculation of the best N,M,D combination + * I think this version gives a little upgrade in speed + * + * 750 pll clock formular: + * Request Clock = (Input Clock * M )/(N * X) + * + * Input Clock = 14318181 hz + * X = 2 power D + * D ={0,1,2,3,4,5,6} + * M = {1,...,255} + * N = {2,...,15} + */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { - /* as sm750 register definition, N located in 2,15 and M located in 1,255 */ + /* as sm750 register definition, + * N located in 2,15 and M located in 1,255 + */ int N, M, X, d; int mini_diff; unsigned int RN, quo, rem, fl_quo; @@ -308,9 +318,11 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) const int max_OD = 3; int max_d = 6; - if (getChipType() == SM750LE) { - /* SM750LE don't have prgrammable PLL and M/N values to work on. - Just return the requested clock. */ + if (sm750_get_chip_type() == SM750LE) { + /* SM750LE don't have + * programmable PLL and M/N values to work on. + * Just return the requested clock. + */ return request_orig; } @@ -319,19 +331,23 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) request = request_orig / 1000; input = pll->inputFreq / 1000; - /* for MXCLK register , no POD provided, so need be treated differently */ + /* for MXCLK register, + * no POD provided, so need be treated differently + */ if (pll->clockType == MXCLK_PLL) max_d = 3; for (N = 15; N > 1; N--) { - /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */ + /* RN will not exceed maximum long + * if @request <= 285 MHZ (for 32bit cpu) + */ RN = N * request; quo = RN / input; rem = RN % input;/* rem always small than 14318181 */ fl_quo = (rem * 10000 / input); for (d = max_d; d >= 0; d--) { - X = (1 << d); + X = BIT(d); M = quo * X; M += fl_quo * X / 10000; /* round step */ diff --git a/drivers/staging/sm750fb/ddk750_chip.h b/drivers/staging/sm750fb/ddk750_chip.h index 0891384ef3e5..14357fd1cc6b 100644 --- a/drivers/staging/sm750fb/ddk750_chip.h +++ b/drivers/staging/sm750fb/ddk750_chip.h @@ -69,7 +69,7 @@ typedef struct _initchip_param_t { } initchip_param_t; -logical_chip_type_t getChipType(void); +logical_chip_type_t sm750_get_chip_type(void); unsigned int calcPllValue(unsigned int request, pll_value_t *pll); unsigned int formatPllReg(pll_value_t *pPLL); void ddk750_set_mmio(void __iomem *, unsigned short, char); diff --git a/drivers/staging/sm750fb/ddk750_display.c b/drivers/staging/sm750fb/ddk750_display.c index ca4973ee49e4..4023c476b9e4 100644 --- a/drivers/staging/sm750fb/ddk750_display.c +++ b/drivers/staging/sm750fb/ddk750_display.c @@ -68,8 +68,10 @@ static void waitNextVerticalSync(int ctrl, int delay) if (!ctrl) { /* primary controller */ - /* Do not wait when the Primary PLL is off or display control is already off. - This will prevent the software to wait forever. */ + /* + * Do not wait when the Primary PLL is off or display control is + * already off. This will prevent the software to wait forever. + */ if (!(PEEK32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) || !(PEEK32(PANEL_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING)) { return; @@ -88,9 +90,10 @@ static void waitNextVerticalSync(int ctrl, int delay) } } else { - - /* Do not wait when the Primary PLL is off or display control is already off. - This will prevent the software to wait forever. */ + /* + * Do not wait when the Primary PLL is off or display control is + * already off. This will prevent the software to wait forever. + */ if (!(PEEK32(CRT_PLL_CTRL) & PLL_CTRL_POWER) || !(PEEK32(CRT_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING)) { return; @@ -134,7 +137,6 @@ static void swPanelPowerSequence(int disp, int delay) reg |= (disp ? PANEL_DISPLAY_CTRL_FPEN : 0); POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); - } void ddk750_setLogicalDispOut(disp_output_t output) @@ -159,7 +161,6 @@ void ddk750_setLogicalDispOut(disp_output_t output) /*se blank off */ reg &= ~CRT_DISPLAY_CTRL_BLANK; POKE32(CRT_DISPLAY_CTRL, reg); - } if (output & PRI_TP_USAGE) { diff --git a/drivers/staging/sm750fb/ddk750_display.h b/drivers/staging/sm750fb/ddk750_display.h index ca35aa1df9d7..e3fde428c52b 100644 --- a/drivers/staging/sm750fb/ddk750_display.h +++ b/drivers/staging/sm750fb/ddk750_display.h @@ -2,100 +2,98 @@ #define DDK750_DISPLAY_H__ /* panel path select - 80000[29:28] -*/ + * 80000[29:28] + */ #define PNL_2_OFFSET 0 #define PNL_2_MASK (3 << PNL_2_OFFSET) #define PNL_2_USAGE (PNL_2_MASK << 16) -#define PNL_2_PRI ((0 << PNL_2_OFFSET)|PNL_2_USAGE) -#define PNL_2_SEC ((2 << PNL_2_OFFSET)|PNL_2_USAGE) +#define PNL_2_PRI ((0 << PNL_2_OFFSET) | PNL_2_USAGE) +#define PNL_2_SEC ((2 << PNL_2_OFFSET) | PNL_2_USAGE) /* primary timing & plane enable bit - 1: 80000[8] & 80000[2] on - 0: both off -*/ + * 1: 80000[8] & 80000[2] on + * 0: both off + */ #define PRI_TP_OFFSET 4 #define PRI_TP_MASK BIT(PRI_TP_OFFSET) #define PRI_TP_USAGE (PRI_TP_MASK << 16) -#define PRI_TP_ON ((0x1 << PRI_TP_OFFSET)|PRI_TP_USAGE) -#define PRI_TP_OFF ((0x0 << PRI_TP_OFFSET)|PRI_TP_USAGE) +#define PRI_TP_ON ((0x1 << PRI_TP_OFFSET) | PRI_TP_USAGE) +#define PRI_TP_OFF ((0x0 << PRI_TP_OFFSET) | PRI_TP_USAGE) /* panel sequency status - 80000[27:24] -*/ + * 80000[27:24] + */ #define PNL_SEQ_OFFSET 6 #define PNL_SEQ_MASK BIT(PNL_SEQ_OFFSET) #define PNL_SEQ_USAGE (PNL_SEQ_MASK << 16) -#define PNL_SEQ_ON (BIT(PNL_SEQ_OFFSET)|PNL_SEQ_USAGE) -#define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET)|PNL_SEQ_USAGE) +#define PNL_SEQ_ON (BIT(PNL_SEQ_OFFSET) | PNL_SEQ_USAGE) +#define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET) | PNL_SEQ_USAGE) /* dual digital output - 80000[19] -*/ + * 80000[19] + */ #define DUAL_TFT_OFFSET 8 #define DUAL_TFT_MASK BIT(DUAL_TFT_OFFSET) #define DUAL_TFT_USAGE (DUAL_TFT_MASK << 16) -#define DUAL_TFT_ON (BIT(DUAL_TFT_OFFSET)|DUAL_TFT_USAGE) -#define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET)|DUAL_TFT_USAGE) +#define DUAL_TFT_ON (BIT(DUAL_TFT_OFFSET) | DUAL_TFT_USAGE) +#define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET) | DUAL_TFT_USAGE) /* secondary timing & plane enable bit - 1:80200[8] & 80200[2] on - 0: both off -*/ + * 1:80200[8] & 80200[2] on + * 0: both off + */ #define SEC_TP_OFFSET 5 #define SEC_TP_MASK BIT(SEC_TP_OFFSET) #define SEC_TP_USAGE (SEC_TP_MASK << 16) -#define SEC_TP_ON ((0x1 << SEC_TP_OFFSET)|SEC_TP_USAGE) -#define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET)|SEC_TP_USAGE) +#define SEC_TP_ON ((0x1 << SEC_TP_OFFSET) | SEC_TP_USAGE) +#define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET) | SEC_TP_USAGE) /* crt path select - 80200[19:18] -*/ + * 80200[19:18] + */ #define CRT_2_OFFSET 2 #define CRT_2_MASK (3 << CRT_2_OFFSET) #define CRT_2_USAGE (CRT_2_MASK << 16) -#define CRT_2_PRI ((0x0 << CRT_2_OFFSET)|CRT_2_USAGE) -#define CRT_2_SEC ((0x2 << CRT_2_OFFSET)|CRT_2_USAGE) +#define CRT_2_PRI ((0x0 << CRT_2_OFFSET) | CRT_2_USAGE) +#define CRT_2_SEC ((0x2 << CRT_2_OFFSET) | CRT_2_USAGE) /* DAC affect both DVI and DSUB - 4[20] -*/ + * 4[20] + */ #define DAC_OFFSET 7 #define DAC_MASK BIT(DAC_OFFSET) #define DAC_USAGE (DAC_MASK << 16) -#define DAC_ON ((0x0 << DAC_OFFSET)|DAC_USAGE) -#define DAC_OFF ((0x1 << DAC_OFFSET)|DAC_USAGE) +#define DAC_ON ((0x0 << DAC_OFFSET) | DAC_USAGE) +#define DAC_OFF ((0x1 << DAC_OFFSET) | DAC_USAGE) /* DPMS only affect D-SUB head - 0[31:30] -*/ + * 0[31:30] + */ #define DPMS_OFFSET 9 #define DPMS_MASK (3 << DPMS_OFFSET) #define DPMS_USAGE (DPMS_MASK << 16) -#define DPMS_OFF ((3 << DPMS_OFFSET)|DPMS_USAGE) -#define DPMS_ON ((0 << DPMS_OFFSET)|DPMS_USAGE) +#define DPMS_OFF ((3 << DPMS_OFFSET) | DPMS_USAGE) +#define DPMS_ON ((0 << DPMS_OFFSET) | DPMS_USAGE) -/* - LCD1 means panel path TFT1 & panel path DVI (so enable DAC) - CRT means crt path DSUB -*/ +/* LCD1 means panel path TFT1 & panel path DVI (so enable DAC) + * CRT means crt path DSUB + */ typedef enum _disp_output_t { - do_LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON, - do_LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON, - do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON, - do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON, - /* - do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON, - do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON, - */ - do_CRT_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON, - do_CRT_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON, + do_LCD1_PRI = PNL_2_PRI | PRI_TP_ON | PNL_SEQ_ON | DAC_ON, + do_LCD1_SEC = PNL_2_SEC | SEC_TP_ON | PNL_SEQ_ON | DAC_ON, + do_LCD2_PRI = CRT_2_PRI | PRI_TP_ON | DUAL_TFT_ON, + do_LCD2_SEC = CRT_2_SEC | SEC_TP_ON | DUAL_TFT_ON, + /* do_DSUB_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON|DAC_ON, + * do_DSUB_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON|DAC_ON, + */ + do_CRT_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON | DAC_ON, + do_CRT_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON | DAC_ON, } disp_output_t; diff --git a/drivers/staging/sm750fb/ddk750_dvi.c b/drivers/staging/sm750fb/ddk750_dvi.c index a4a255007c8d..8252f771ef9e 100644 --- a/drivers/staging/sm750fb/ddk750_dvi.c +++ b/drivers/staging/sm750fb/ddk750_dvi.c @@ -6,9 +6,11 @@ #include "ddk750_sii164.h" -/* This global variable contains all the supported driver and its corresponding - function API. Please set the function pointer to NULL whenever the function - is not supported. */ +/* + * This global variable contains all the supported driver and its corresponding + * function API. Please set the function pointer to NULL whenever the function + * is not supported. + */ static dvi_ctrl_device_t g_dcftSupportedDviController[] = { #ifdef DVI_CTRL_SII164 { diff --git a/drivers/staging/sm750fb/ddk750_hwi2c.c b/drivers/staging/sm750fb/ddk750_hwi2c.c index 39c3e1cdbc0c..d391c127ead7 100644 --- a/drivers/staging/sm750fb/ddk750_hwi2c.c +++ b/drivers/staging/sm750fb/ddk750_hwi2c.c @@ -21,7 +21,7 @@ unsigned char bus_speed_mode POKE32(GPIO_MUX, value); /* Enable Hardware I2C power. - TODO: Check if we need to enable GPIO power? + * TODO: Check if we need to enable GPIO power? */ enableI2C(1); diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index ccb4e067661a..05b83646c2d5 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -4,15 +4,14 @@ #include "ddk750_mode.h" #include "ddk750_chip.h" -/* - SM750LE only: - This function takes care extra registers and bit fields required to set - up a mode in SM750LE - - Explanation about Display Control register: - HW only supports 7 predefined pixel clocks, and clock select is - in bit 29:27 of Display Control register. -*/ +/* SM750LE only: + * This function takes care extra registers and bit fields required to set + * up a mode in SM750LE + * + * Explanation about Display Control register: + * HW only supports 7 predefined pixel clocks, and clock select is + * in bit 29:27 of Display Control register. + */ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, unsigned long dispControl) { unsigned long x, y; @@ -21,9 +20,9 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, y = pModeParam->vertical_display_end; /* SM750LE has to set up the top-left and bottom-right - registers as well. - Note that normal SM750/SM718 only use those two register for - auto-centering mode. + * registers as well. + * Note that normal SM750/SM718 only use those two register for + * auto-centering mode. */ POKE32(CRT_AUTO_CENTERING_TL, 0); @@ -33,8 +32,8 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); /* Assume common fields in dispControl have been properly set before - calling this function. - This function only sets the extra fields in dispControl. + * calling this function. + * This function only sets the extra fields in dispControl. */ /* Clear bit 29:27 of display control register */ @@ -63,7 +62,7 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT); /* Set bit 14 of display controller */ - dispControl = DISPLAY_CTRL_CLOCK_PHASE; + dispControl |= DISPLAY_CTRL_CLOCK_PHASE; POKE32(CRT_DISPLAY_CTRL, dispControl); @@ -117,7 +116,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll) if (pModeParam->horizontal_sync_polarity) tmp |= DISPLAY_CTRL_HSYNC_PHASE; - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { displayControlAdjust_SM750LE(pModeParam, tmp); } else { reg = PEEK32(CRT_DISPLAY_CTRL) & @@ -209,7 +208,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock) pll.clockType = clock; uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll); - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { /* set graphic mode via IO method */ outb_p(0x88, 0x3d4); outb_p(0x06, 0x3d5); diff --git a/drivers/staging/sm750fb/ddk750_power.c b/drivers/staging/sm750fb/ddk750_power.c index b3c3791b95bd..7cc6169f884e 100644 --- a/drivers/staging/sm750fb/ddk750_power.c +++ b/drivers/staging/sm750fb/ddk750_power.c @@ -6,7 +6,7 @@ void ddk750_setDPMS(DPMS_t state) { unsigned int value; - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { value = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK; value |= (state << CRT_DISPLAY_CTRL_DPMS_SHIFT); POKE32(CRT_DISPLAY_CTRL, value); @@ -19,7 +19,7 @@ void ddk750_setDPMS(DPMS_t state) static unsigned int getPowerMode(void) { - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return 0; return PEEK32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK; } @@ -35,7 +35,7 @@ void setPowerMode(unsigned int powerMode) control_value = PEEK32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK; - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return; switch (powerMode) { diff --git a/drivers/staging/sm750fb/ddk750_sii164.c b/drivers/staging/sm750fb/ddk750_sii164.c index 67f36e71da7e..99a8683e6383 100644 --- a/drivers/staging/sm750fb/ddk750_sii164.c +++ b/drivers/staging/sm750fb/ddk750_sii164.c @@ -174,8 +174,8 @@ long sii164InitChip( i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); /* De-skew enabled with default 111b value. - This will fix some artifacts problem in some mode on board 2.2. - Somehow this fix does not affect board 2.1. + * This fixes some artifacts problem in some mode on board 2.2. + * Somehow this fix does not affect board 2.1. */ if (deskewEnable == 0) config = SII164_DESKEW_DISABLE; @@ -344,7 +344,8 @@ void sii164EnableHotPlugDetection( detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT); /* Depending on each DVI controller, need to enable the hot plug based on each - individual chip design. */ + * individual chip design. + */ if (enableHotPlug != 0) sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_USE_MDI); else diff --git a/drivers/staging/sm750fb/ddk750_swi2c.c b/drivers/staging/sm750fb/ddk750_swi2c.c index 8d644a7cba52..72a42330e7a1 100644 --- a/drivers/staging/sm750fb/ddk750_swi2c.c +++ b/drivers/staging/sm750fb/ddk750_swi2c.c @@ -89,12 +89,12 @@ static void sw_i2c_wait(void) * always be non-zero,which makes the while loop * never finish. * use non-ultimate for loop below is safe - * */ + */ /* Change wait algorithm to use PCI bus clock, - it's more reliable than counter loop .. - write 0x61 to 0x3ce and read from 0x3cf - */ + * it's more reliable than counter loop .. + * write 0x61 to 0x3ce and read from 0x3cf + */ int i, tmp; for (i = 0; i < 600; i++) { @@ -403,7 +403,7 @@ long sm750_sw_i2c_init( if ((clk_gpio > 31) || (data_gpio > 31)) return -1; - if (getChipType() == SM750LE) + if (sm750_get_chip_type() == SM750LE) return sm750le_i2c_init(clk_gpio, data_gpio); /* Initialize the GPIO pin for the i2c Clock Register */ @@ -501,8 +501,8 @@ long sm750_sw_i2c_write_reg( sw_i2c_start(); /* Send the device address and read the data. All should return success - in order for the writing processed to be successful - */ + * in order for the writing processed to be successful + */ if ((sw_i2c_write_byte(addr) != 0) || (sw_i2c_write_byte(reg) != 0) || (sw_i2c_write_byte(data) != 0)) { diff --git a/drivers/staging/sm750fb/sm750.c b/drivers/staging/sm750fb/sm750.c index 6ed004e40855..7d90e250142c 100644 --- a/drivers/staging/sm750fb/sm750.c +++ b/drivers/staging/sm750fb/sm750.c @@ -1176,7 +1176,7 @@ static int __init lynxfb_setup(char *options) else { strcat(tmp, opt); tmp += strlen(opt); - if (options != NULL) + if (options) *tmp++ = ':'; else *tmp++ = 0; diff --git a/drivers/staging/sm750fb/sm750.h b/drivers/staging/sm750fb/sm750.h index 8e70ce0d6da4..ff31c5c9cc6f 100644 --- a/drivers/staging/sm750fb/sm750.h +++ b/drivers/staging/sm750fb/sm750.h @@ -147,17 +147,17 @@ struct lynxfb_output { int dpms; int paths; /* which paths(s) this output stands for,for sm750: - paths=1:means output for panel paths - paths=2:means output for crt paths - paths=3:means output for both panel and crt paths - */ + * paths=1:means output for panel paths + * paths=2:means output for crt paths + * paths=3:means output for both panel and crt paths + */ int *channel; /* which channel these outputs linked with,for sm750: - *channel=0 means primary channel - *channel=1 means secondary channel - output->channel ==> &crtc->channel - */ + * *channel=0 means primary channel + * *channel=1 means secondary channel + * output->channel ==> &crtc->channel + */ void *priv; int (*proc_setBLANK)(struct lynxfb_output*, int); diff --git a/drivers/staging/sm750fb/sm750_accel.c b/drivers/staging/sm750fb/sm750_accel.c index 9aa4066ac86d..38adae6b5d83 100644 --- a/drivers/staging/sm750fb/sm750_accel.c +++ b/drivers/staging/sm750fb/sm750_accel.c @@ -67,7 +67,8 @@ void hw_de_init(struct lynx_accel *accel) /* set2dformat only be called from setmode functions * but if you need dual framebuffer driver,need call set2dformat - * every time you use 2d function */ + * every time you use 2d function + */ void hw_set2dformat(struct lynx_accel *accel, int fmt) { @@ -90,7 +91,8 @@ int hw_fillrect(struct lynx_accel *accel, if (accel->de_wait() != 0) { /* int time wait and always busy,seems hardware - * got something error */ + * got something error + */ pr_debug("De engine always busy\n"); return -1; } @@ -152,24 +154,26 @@ unsigned int rop2) /* ROP value */ /* Determine direction of operation */ if (sy < dy) { /* +----------+ - |S | - | +----------+ - | | | | - | | | | - +---|------+ | - | D| - +----------+ */ + * |S | + * | +----------+ + * | | | | + * | | | | + * +---|------+ | + * | D| + * +----------+ + */ nDirection = BOTTOM_TO_TOP; } else if (sy > dy) { /* +----------+ - |D | - | +----------+ - | | | | - | | | | - +---|------+ | - | S| - +----------+ */ + * |D | + * | +----------+ + * | | | | + * | | | | + * +---|------+ | + * | S| + * +----------+ + */ nDirection = TOP_TO_BOTTOM; } else { @@ -177,22 +181,24 @@ unsigned int rop2) /* ROP value */ if (sx <= dx) { /* +------+---+------+ - |S | | D| - | | | | - | | | | - | | | | - +------+---+------+ */ + * |S | | D| + * | | | | + * | | | | + * | | | | + * +------+---+------+ + */ nDirection = RIGHT_TO_LEFT; } else { /* sx > dx */ /* +------+---+------+ - |D | | S| - | | | | - | | | | - | | | | - +------+---+------+ */ + * |D | | S| + * | | | | + * | | | | + * | | | | + * +------+---+------+ + */ nDirection = LEFT_TO_RIGHT; } @@ -208,32 +214,36 @@ unsigned int rop2) /* ROP value */ } /* Note: - DE_FOREGROUND are DE_BACKGROUND are don't care. - DE_COLOR_COMPARE and DE_COLOR_COMPARE_MAKS are set by set deSetTransparency(). + * DE_FOREGROUND are DE_BACKGROUND are don't care. + * DE_COLOR_COMPARE and DE_COLOR_COMPARE_MAKS + * are set by set deSetTransparency(). */ /* 2D Source Base. - It is an address offset (128 bit aligned) from the beginning of frame buffer. + * It is an address offset (128 bit aligned) + * from the beginning of frame buffer. */ write_dpr(accel, DE_WINDOW_SOURCE_BASE, sBase); /* dpr40 */ /* 2D Destination Base. - It is an address offset (128 bit aligned) from the beginning of frame buffer. + * It is an address offset (128 bit aligned) + * from the beginning of frame buffer. */ write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); /* dpr44 */ /* Program pitch (distance between the 1st points of two adjacent lines). - Note that input pitch is BYTE value, but the 2D Pitch register uses - pixel values. Need Byte to pixel conversion. - */ + * Note that input pitch is BYTE value, but the 2D Pitch register uses + * pixel values. Need Byte to pixel conversion. + */ write_dpr(accel, DE_PITCH, ((dPitch / Bpp << DE_PITCH_DESTINATION_SHIFT) & DE_PITCH_DESTINATION_MASK) | (sPitch / Bpp & DE_PITCH_SOURCE_MASK)); /* dpr10 */ /* Screen Window width in Pixels. - 2D engine uses this value to calculate the linear address in frame buffer for a given point. - */ + * 2D engine uses this value to calculate the linear address in frame buffer + * for a given point. + */ write_dpr(accel, DE_WINDOW_WIDTH, ((dPitch / Bpp << DE_WINDOW_WIDTH_DST_SHIFT) & DE_WINDOW_WIDTH_DST_MASK) | @@ -307,33 +317,37 @@ int hw_imageblit(struct lynx_accel *accel, return -1; /* 2D Source Base. - Use 0 for HOST Blt. + * Use 0 for HOST Blt. */ write_dpr(accel, DE_WINDOW_SOURCE_BASE, 0); /* 2D Destination Base. - It is an address offset (128 bit aligned) from the beginning of frame buffer. + * It is an address offset (128 bit aligned) + * from the beginning of frame buffer. */ write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); /* Program pitch (distance between the 1st points of two adjacent lines). - Note that input pitch is BYTE value, but the 2D Pitch register uses - pixel values. Need Byte to pixel conversion. - */ + * Note that input pitch is BYTE value, but the 2D Pitch register uses + * pixel values. Need Byte to pixel conversion. + */ write_dpr(accel, DE_PITCH, ((dPitch / bytePerPixel << DE_PITCH_DESTINATION_SHIFT) & DE_PITCH_DESTINATION_MASK) | (dPitch / bytePerPixel & DE_PITCH_SOURCE_MASK)); /* dpr10 */ /* Screen Window width in Pixels. - 2D engine uses this value to calculate the linear address in frame buffer for a given point. + * 2D engine uses this value to calculate the linear address + * in frame buffer for a given point. */ write_dpr(accel, DE_WINDOW_WIDTH, ((dPitch / bytePerPixel << DE_WINDOW_WIDTH_DST_SHIFT) & DE_WINDOW_WIDTH_DST_MASK) | (dPitch / bytePerPixel & DE_WINDOW_WIDTH_SRC_MASK)); - /* Note: For 2D Source in Host Write, only X_K1_MONO field is needed, and Y_K2 field is not used. - For mono bitmap, use startBit for X_K1. */ + /* Note: For 2D Source in Host Write, only X_K1_MONO field is needed, + * and Y_K2 field is not used. + * For mono bitmap, use startBit for X_K1. + */ write_dpr(accel, DE_SOURCE, (startBit << DE_SOURCE_X_K1_SHIFT) & DE_SOURCE_X_K1_MONO_MASK); /* dpr00 */ diff --git a/drivers/staging/sm750fb/sm750_hw.c b/drivers/staging/sm750fb/sm750_hw.c index 2daeedd88c30..7dd208caa5eb 100644 --- a/drivers/staging/sm750fb/sm750_hw.c +++ b/drivers/staging/sm750fb/sm750_hw.c @@ -35,17 +35,17 @@ int hw_sm750_map(struct sm750_dev *sm750_dev, struct pci_dev *pdev) pr_info("mmio phyAddr = %lx\n", sm750_dev->vidreg_start); /* reserve the vidreg space of smi adaptor - * if you do this, u need to add release region code + * if you do this, you need to add release region code * in lynxfb_remove, or memory will not be mapped again * successfully - * */ + */ ret = pci_request_region(pdev, 1, "sm750fb"); if (ret) { pr_err("Can not request PCI regions.\n"); goto exit; } - /* now map mmio and vidmem*/ + /* now map mmio and vidmem */ sm750_dev->pvReg = ioremap_nocache(sm750_dev->vidreg_start, sm750_dev->vidreg_size); if (!sm750_dev->pvReg) { @@ -56,7 +56,6 @@ int hw_sm750_map(struct sm750_dev *sm750_dev, struct pci_dev *pdev) pr_info("mmio virtual addr = %p\n", sm750_dev->pvReg); } - sm750_dev->accel.dprBase = sm750_dev->pvReg + DE_BASE_ADDR_TYPE1; sm750_dev->accel.dpPortBase = sm750_dev->pvReg + DE_PORT_ADDR_TYPE1; @@ -64,10 +63,10 @@ int hw_sm750_map(struct sm750_dev *sm750_dev, struct pci_dev *pdev) sm750_dev->vidmem_start = pci_resource_start(pdev, 0); /* don't use pdev_resource[x].end - resource[x].start to - * calculate the resource size,its only the maximum available - * size but not the actual size,use + * calculate the resource size, it's only the maximum available + * size but not the actual size, using * @ddk750_getVMSize function can be safe. - * */ + */ sm750_dev->vidmem_size = ddk750_getVMSize(); pr_info("video memory phyAddr = %lx, size = %u bytes\n", sm750_dev->vidmem_start, sm750_dev->vidmem_size); @@ -86,33 +85,31 @@ exit: return ret; } - - int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev) { struct init_status *parm; parm = &sm750_dev->initParm; if (parm->chip_clk == 0) - parm->chip_clk = (getChipType() == SM750LE) ? + parm->chip_clk = (sm750_get_chip_type() == SM750LE) ? DEFAULT_SM750LE_CHIP_CLOCK : DEFAULT_SM750_CHIP_CLOCK; if (parm->mem_clk == 0) parm->mem_clk = parm->chip_clk; if (parm->master_clk == 0) - parm->master_clk = parm->chip_clk/3; + parm->master_clk = parm->chip_clk / 3; ddk750_initHw((initchip_param_t *)&sm750_dev->initParm); - /* for sm718,open pci burst */ + /* for sm718, open pci burst */ if (sm750_dev->devid == 0x718) { POKE32(SYSTEM_CTRL, PEEK32(SYSTEM_CTRL) | SYSTEM_CTRL_PCI_BURST); } - if (getChipType() != SM750LE) { + if (sm750_get_chip_type() != SM750LE) { unsigned int val; - /* does user need CRT ?*/ + /* does user need CRT? */ if (sm750_dev->nocrt) { POKE32(MISC_CTRL, PEEK32(MISC_CTRL) | MISC_CTRL_DAC_POWER_OFF); @@ -144,19 +141,21 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev) } POKE32(PANEL_DISPLAY_CTRL, val); } else { - /* for 750LE ,no DVI chip initialization makes Monitor no signal */ - /* Set up GPIO for software I2C to program DVI chip in the - Xilinx SP605 board, in order to have video signal. + /* for 750LE, no DVI chip initialization + * makes Monitor no signal + * + * Set up GPIO for software I2C to program DVI chip in the + * Xilinx SP605 board, in order to have video signal. */ sm750_sw_i2c_init(0, 1); /* Customer may NOT use CH7301 DVI chip, which has to be - initialized differently. - */ + * initialized differently. + */ if (sm750_sw_i2c_read_reg(0xec, 0x4a) == 0x95) { /* The following register values for CH7301 are from - Chrontel app note and our experiment. - */ + * Chrontel app note and our experiment. + */ pr_info("yes,CH7301 DVI chip found\n"); sm750_sw_i2c_write_reg(0xec, 0x1d, 0x16); sm750_sw_i2c_write_reg(0xec, 0x21, 0x9); @@ -173,7 +172,8 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev) } int hw_sm750_output_setMode(struct lynxfb_output *output, - struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix) + struct fb_var_screeninfo *var, + struct fb_fix_screeninfo *fix) { int ret; disp_output_t dispSet; @@ -183,8 +183,7 @@ int hw_sm750_output_setMode(struct lynxfb_output *output, dispSet = 0; channel = *output->channel; - - if (getChipType() != SM750LE) { + if (sm750_get_chip_type() != SM750LE) { if (channel == sm750_primary) { pr_info("primary channel\n"); if (output->paths & sm750_panel) @@ -198,11 +197,10 @@ int hw_sm750_output_setMode(struct lynxfb_output *output, dispSet |= do_LCD1_SEC; if (output->paths & sm750_crt) dispSet |= do_CRT_SEC; - } ddk750_setLogicalDispOut(dispSet); } else { - /* just open DISPLAY_CONTROL_750LE register bit 3:0*/ + /* just open DISPLAY_CONTROL_750LE register bit 3:0 */ u32 reg; reg = PEEK32(DISPLAY_CONTROL_750LE); @@ -214,7 +212,8 @@ int hw_sm750_output_setMode(struct lynxfb_output *output, return ret; } -int hw_sm750_crtc_checkMode(struct lynxfb_crtc *crtc, struct fb_var_screeninfo *var) +int hw_sm750_crtc_checkMode(struct lynxfb_crtc *crtc, + struct fb_var_screeninfo *var) { struct sm750_dev *sm750_dev; struct lynxfb_par *par = container_of(crtc, struct lynxfb_par, crtc); @@ -233,19 +232,15 @@ int hw_sm750_crtc_checkMode(struct lynxfb_crtc *crtc, struct fb_var_screeninfo * break; default: return -EINVAL; - } return 0; } - -/* - set the controller's mode for @crtc charged with @var and @fix parameters -*/ +/* set the controller's mode for @crtc charged with @var and @fix parameters */ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, - struct fb_var_screeninfo *var, - struct fb_fix_screeninfo *fix) + struct fb_var_screeninfo *var, + struct fb_fix_screeninfo *fix) { int ret, fmt; u32 reg; @@ -254,7 +249,6 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, struct sm750_dev *sm750_dev; struct lynxfb_par *par; - ret = 0; par = container_of(crtc, struct lynxfb_par, crtc); sm750_dev = par->dev; @@ -278,17 +272,22 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, /* set timing */ modparm.pixel_clock = ps_to_hz(var->pixclock); - modparm.vertical_sync_polarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? POS:NEG; - modparm.horizontal_sync_polarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? POS:NEG; - modparm.clock_phase_polarity = (var->sync & FB_SYNC_COMP_HIGH_ACT) ? POS:NEG; + modparm.vertical_sync_polarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) + ? POS : NEG; + modparm.horizontal_sync_polarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) + ? POS : NEG; + modparm.clock_phase_polarity = (var->sync & FB_SYNC_COMP_HIGH_ACT) + ? POS : NEG; modparm.horizontal_display_end = var->xres; modparm.horizontal_sync_width = var->hsync_len; modparm.horizontal_sync_start = var->xres + var->right_margin; - modparm.horizontal_total = var->xres + var->left_margin + var->right_margin + var->hsync_len; + modparm.horizontal_total = var->xres + var->left_margin + + var->right_margin + var->hsync_len; modparm.vertical_display_end = var->yres; modparm.vertical_sync_height = var->vsync_len; modparm.vertical_sync_start = var->yres + var->lower_margin; - modparm.vertical_total = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; + modparm.vertical_total = var->yres + var->upper_margin + + var->lower_margin + var->vsync_len; /* choose pll */ if (crtc->channel != sm750_secondary) @@ -304,12 +303,14 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, } if (crtc->channel != sm750_secondary) { - /* set pitch, offset ,width,start address ,etc... */ + /* set pitch, offset, width, start address, etc... */ POKE32(PANEL_FB_ADDRESS, crtc->oScreen & PANEL_FB_ADDRESS_ADDRESS_MASK); reg = var->xres * (var->bits_per_pixel >> 3); - /* crtc->channel is not equal to par->index on numeric,be aware of that */ + /* crtc->channel is not equal to par->index on numeric, + * be aware of that + */ reg = ALIGN(reg, crtc->line_pad); reg = (reg << PANEL_FB_WIDTH_WIDTH_SHIFT) & PANEL_FB_WIDTH_WIDTH_MASK; @@ -321,8 +322,8 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, reg |= (var->xoffset & PANEL_WINDOW_WIDTH_X_MASK); POKE32(PANEL_WINDOW_WIDTH, reg); - reg = ((var->yres_virtual - 1) << - PANEL_WINDOW_HEIGHT_HEIGHT_SHIFT); + reg = (var->yres_virtual - 1) << + PANEL_WINDOW_HEIGHT_HEIGHT_SHIFT; reg &= PANEL_WINDOW_HEIGHT_HEIGHT_MASK; reg |= (var->yoffset & PANEL_WINDOW_HEIGHT_Y_MASK); POKE32(PANEL_WINDOW_HEIGHT, reg); @@ -341,7 +342,9 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, /* not implemented now */ POKE32(CRT_FB_ADDRESS, crtc->oScreen); reg = var->xres * (var->bits_per_pixel >> 3); - /* crtc->channel is not equal to par->index on numeric,be aware of that */ + /* crtc->channel is not equal to par->index on numeric, + * be aware of that + */ reg = ALIGN(reg, crtc->line_pad) << CRT_FB_WIDTH_WIDTH_SHIFT; reg &= CRT_FB_WIDTH_WIDTH_MASK; reg |= (fix->line_length & CRT_FB_WIDTH_OFFSET_MASK); @@ -352,20 +355,19 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, reg |= ((var->bits_per_pixel >> 4) & CRT_DISPLAY_CTRL_FORMAT_MASK); POKE32(CRT_DISPLAY_CTRL, reg); - } - exit: return ret; } int hw_sm750_setColReg(struct lynxfb_crtc *crtc, ushort index, - ushort red, ushort green, ushort blue) + ushort red, ushort green, ushort blue) { static unsigned int add[] = {PANEL_PALETTE_RAM, CRT_PALETTE_RAM}; - POKE32(add[crtc->channel] + index*4, (red<<16)|(green<<8)|blue); + POKE32(add[crtc->channel] + index * 4, + (red << 16) | (green << 8) | blue); return 0; } @@ -414,7 +416,9 @@ int hw_sm750_setBLANK(struct lynxfb_output *output, int blank) { unsigned int dpms, pps, crtdb; - dpms = pps = crtdb = 0; + dpms = 0; + pps = 0; + crtdb = 0; switch (blank) { case FB_BLANK_UNBLANK: @@ -461,14 +465,13 @@ int hw_sm750_setBLANK(struct lynxfb_output *output, int blank) return 0; } - void hw_sm750_initAccel(struct sm750_dev *sm750_dev) { u32 reg; enable2DEngine(1); - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { reg = PEEK32(DE_STATE1); reg |= DE_STATE1_DE_ABORT; POKE32(DE_STATE1, reg); @@ -509,7 +512,6 @@ int hw_sm750le_deWait(void) return -1; } - int hw_sm750_deWait(void) { int i = 0x10000000; @@ -529,10 +531,10 @@ int hw_sm750_deWait(void) } int hw_sm750_pan_display(struct lynxfb_crtc *crtc, - const struct fb_var_screeninfo *var, - const struct fb_info *info) + const struct fb_var_screeninfo *var, + const struct fb_info *info) { - uint32_t total; + u32 total; /* check params */ if ((var->xoffset + var->xres > var->xres_virtual) || (var->yoffset + var->yres > var->yres_virtual)) { |