diff options
Diffstat (limited to 'drivers/staging/xgifb/vb_init.c')
| -rw-r--r-- | drivers/staging/xgifb/vb_init.c | 473 |
1 files changed, 106 insertions, 367 deletions
diff --git a/drivers/staging/xgifb/vb_init.c b/drivers/staging/xgifb/vb_init.c index c222d611431d..80dba6a425ba 100644 --- a/drivers/staging/xgifb/vb_init.c +++ b/drivers/staging/xgifb/vb_init.c @@ -1,39 +1,30 @@ -#include <linux/types.h> -#include <linux/delay.h> /* udelay */ -#include <linux/pci.h> +#include <linux/delay.h> #include <linux/vmalloc.h> #include "XGIfb.h" -#include "vgatypes.h" - #include "vb_def.h" -#include "vb_struct.h" #include "vb_util.h" #include "vb_setmode.h" #include "vb_init.h" - - -#include <linux/io.h> - -static const unsigned short XGINew_DDRDRAM_TYPE340[4][5] = { - { 2, 13, 9, 64, 0x45}, - { 2, 12, 9, 32, 0x35}, - { 2, 12, 8, 16, 0x31}, - { 2, 11, 8, 8, 0x21} }; - -static const unsigned short XGINew_DDRDRAM_TYPE20[12][5] = { - { 2, 14, 11, 128, 0x5D}, - { 2, 14, 10, 64, 0x59}, - { 2, 13, 11, 64, 0x4D}, - { 2, 14, 9, 32, 0x55}, - { 2, 13, 10, 32, 0x49}, - { 2, 12, 11, 32, 0x3D}, - { 2, 14, 8, 16, 0x51}, - { 2, 13, 9, 16, 0x45}, - { 2, 12, 10, 16, 0x39}, - { 2, 13, 8, 8, 0x41}, - { 2, 12, 9, 8, 0x35}, - { 2, 12, 8, 4, 0x31} }; +static const unsigned short XGINew_DDRDRAM_TYPE340[4][2] = { + { 16, 0x45}, + { 8, 0x35}, + { 4, 0x31}, + { 2, 0x21} }; + +static const unsigned short XGINew_DDRDRAM_TYPE20[12][2] = { + { 128, 0x5D}, + { 64, 0x59}, + { 64, 0x4D}, + { 32, 0x55}, + { 32, 0x49}, + { 32, 0x3D}, + { 16, 0x51}, + { 16, 0x45}, + { 16, 0x39}, + { 8, 0x41}, + { 8, 0x35}, + { 4, 0x31} }; #define XGIFB_ROM_SIZE 65536 @@ -44,21 +35,12 @@ XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension, unsigned char data, temp; if (HwDeviceExtension->jChipType < XG20) { - if (*pVBInfo->pSoftSetting & SoftDRAMType) { - data = *pVBInfo->pSoftSetting & 0x07; - return data; - } else { - data = xgifb_reg_get(pVBInfo->P3c4, 0x39) & 0x02; - if (data == 0) - data = (xgifb_reg_get(pVBInfo->P3c4, 0x3A) & - 0x02) >> 1; - return data; - } + data = xgifb_reg_get(pVBInfo->P3c4, 0x39) & 0x02; + if (data == 0) + data = (xgifb_reg_get(pVBInfo->P3c4, 0x3A) & + 0x02) >> 1; + return data; } else if (HwDeviceExtension->jChipType == XG27) { - if (*pVBInfo->pSoftSetting & SoftDRAMType) { - data = *pVBInfo->pSoftSetting & 0x07; - return data; - } temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B); /* SR3B[7][3]MAA15 MAA11 (Power on Trapping) */ if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08)) @@ -101,13 +83,11 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4, xgifb_reg_set(P3c4, 0x16, 0x00); xgifb_reg_set(P3c4, 0x16, 0x80); - if (*pVBInfo->pXGINew_DRAMTypeDefinition != 0x0C) { /* Samsung F Die */ - mdelay(3); - xgifb_reg_set(P3c4, 0x18, 0x00); - xgifb_reg_set(P3c4, 0x19, 0x20); - xgifb_reg_set(P3c4, 0x16, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x80); - } + mdelay(3); + xgifb_reg_set(P3c4, 0x18, 0x00); + xgifb_reg_set(P3c4, 0x19, 0x20); + xgifb_reg_set(P3c4, 0x16, 0x00); + xgifb_reg_set(P3c4, 0x16, 0x80); udelay(60); xgifb_reg_set(P3c4, @@ -152,10 +132,8 @@ static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension, 0x30, pVBInfo->ECLKData[pVBInfo->ram_type].SR30); - /* [Vicent] 2004/07/07, - * When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */ - /* [Hsuan] 2004/08/20, - * Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz, + /* When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */ + /* Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz, * Set SR32 D[1:0] = 10b */ if (HwDeviceExtension->jChipType == XG42) { if ((pVBInfo->MCLKData[pVBInfo->ram_type].SR28 == 0x1C) && @@ -180,8 +158,7 @@ static void XGINew_DDRII_Bootup_XG27( XGINew_SetMemoryClock(HwDeviceExtension, pVBInfo); /* Set Double Frequency */ - /* xgifb_reg_set(P3d4, 0x97, 0x11); *//* CR97 */ - xgifb_reg_set(P3d4, 0x97, *pVBInfo->pXGINew_CR97); /* CR97 */ + xgifb_reg_set(P3d4, 0x97, pVBInfo->XGINew_CR97); /* CR97 */ udelay(200); @@ -212,7 +189,6 @@ static void XGINew_DDRII_Bootup_XG27( udelay(30); xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */ xgifb_reg_set(P3c4, 0x16, 0x80); /* Set SR16 */ - /* udelay(15); */ xgifb_reg_set(P3c4, 0x1B, 0x04); /* Set SR1B */ udelay(60); @@ -272,7 +248,6 @@ static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension, xgifb_reg_set(P3c4, 0x16, 0x05); xgifb_reg_set(P3c4, 0x16, 0x85); - /* xgifb_reg_set(P3c4, 0x18, 0x52); */ /* MRS1 */ xgifb_reg_set(P3c4, 0x18, 0x42); /* MRS1 */ xgifb_reg_set(P3c4, 0x19, 0x02); xgifb_reg_set(P3c4, 0x16, 0x05); @@ -284,7 +259,6 @@ static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension, xgifb_reg_set(P3c4, 0x1B, 0x00); /* SR1B */ udelay(100); - /* xgifb_reg_set(P3c4 ,0x18, 0x52); */ /* MRS2 */ xgifb_reg_set(P3c4, 0x18, 0x42); /* MRS1 */ xgifb_reg_set(P3c4, 0x19, 0x00); xgifb_reg_set(P3c4, 0x16, 0x05); @@ -310,14 +284,12 @@ static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4, xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[2][pVBInfo->ram_type]); /* SR18 */ - /* xgifb_reg_set(P3c4, 0x18, 0x31); */ xgifb_reg_set(P3c4, 0x19, 0x01); xgifb_reg_set(P3c4, 0x16, 0x03); xgifb_reg_set(P3c4, 0x16, 0x83); mdelay(1); xgifb_reg_set(P3c4, 0x1B, 0x03); udelay(500); - /* xgifb_reg_set(P3c4, 0x18, 0x31); */ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[2][pVBInfo->ram_type]); /* SR18 */ @@ -541,7 +513,7 @@ static void XGINew_SetDRAMDefaultRegister340( pVBInfo->CR40[0][pVBInfo->ram_type]); /* CR41 */ if (HwDeviceExtension->jChipType == XG27) - xgifb_reg_set(P3d4, 0x8F, *pVBInfo->pCR8F); /* CR8F */ + xgifb_reg_set(P3d4, 0x8F, XG27_CR8F); /* CR8F */ for (j = 0; j <= 6; j++) /* CR90 - CR96 */ xgifb_reg_set(P3d4, (0x90 + j), @@ -564,9 +536,8 @@ static void XGINew_SetDRAMDefaultRegister340( xgifb_reg_set(P3d4, 0x83, 0x09); /* CR83 */ xgifb_reg_set(P3d4, 0x87, 0x00); /* CR87 */ - xgifb_reg_set(P3d4, 0xCF, *pVBInfo->pCRCF); /* CRCF */ + xgifb_reg_set(P3d4, 0xCF, XG40_CRCF); /* CRCF */ if (pVBInfo->ram_type) { - /* xgifb_reg_set(P3c4, 0x17, 0xC0); */ /* SR17 DDRII */ xgifb_reg_set(P3c4, 0x17, 0x80); /* SR17 DDRII */ if (HwDeviceExtension->jChipType == XG27) xgifb_reg_set(P3c4, 0x17, 0x02); /* SR17 DDRII */ @@ -588,71 +559,16 @@ static void XGINew_SetDRAMDefaultRegister340( pVBInfo->SR15[3][pVBInfo->ram_type]); /* SR1B */ } -static void XGINew_SetDRAMSizingType(int index, - const unsigned short DRAMTYPE_TABLE[][5], - struct vb_device_info *pVBInfo) -{ - unsigned short data; - - data = DRAMTYPE_TABLE[index][4]; - xgifb_reg_and_or(pVBInfo->P3c4, 0x13, 0x80, data); - udelay(15); - /* should delay 50 ns */ -} - -static unsigned short XGINew_SetDRAMSizeReg(int index, - const unsigned short DRAMTYPE_TABLE[][5], - struct vb_device_info *pVBInfo) -{ - unsigned short data = 0, memsize = 0; - int RankSize; - unsigned char ChannelNo; - - RankSize = DRAMTYPE_TABLE[index][3] * pVBInfo->ram_bus / 32; - data = xgifb_reg_get(pVBInfo->P3c4, 0x13); - data &= 0x80; - - if (data == 0x80) - RankSize *= 2; - - data = 0; - - if (pVBInfo->ram_channel == 3) - ChannelNo = 4; - else - ChannelNo = pVBInfo->ram_channel; - - if (ChannelNo * RankSize <= 256) { - while ((RankSize >>= 1) > 0) - data += 0x10; - - memsize = data >> 4; - - /* [2004/03/25] Vicent, Fix DRAM Sizing Error */ - xgifb_reg_set(pVBInfo->P3c4, - 0x14, - (xgifb_reg_get(pVBInfo->P3c4, 0x14) & 0x0F) | - (data & 0xF0)); - - /* data |= pVBInfo->ram_channel << 2; */ - /* data |= (pVBInfo->ram_bus / 64) << 1; */ - /* xgifb_reg_set(pVBInfo->P3c4, 0x14, data); */ - - /* should delay */ - /* XGINew_SetDRAMModeRegister340(pVBInfo); */ - } - return memsize; -} -static unsigned short XGINew_SetDRAMSize20Reg(int index, - const unsigned short DRAMTYPE_TABLE[][5], +static unsigned short XGINew_SetDRAMSize20Reg( + unsigned short dram_size, struct vb_device_info *pVBInfo) { unsigned short data = 0, memsize = 0; int RankSize; unsigned char ChannelNo; - RankSize = DRAMTYPE_TABLE[index][3] * pVBInfo->ram_bus / 8; + RankSize = dram_size * pVBInfo->ram_bus / 8; data = xgifb_reg_get(pVBInfo->P3c4, 0x13); data &= 0x80; @@ -672,19 +588,12 @@ static unsigned short XGINew_SetDRAMSize20Reg(int index, memsize = data >> 4; - /* [2004/03/25] Vicent, Fix DRAM Sizing Error */ + /* Fix DRAM Sizing Error */ xgifb_reg_set(pVBInfo->P3c4, 0x14, (xgifb_reg_get(pVBInfo->P3c4, 0x14) & 0x0F) | (data & 0xF0)); udelay(15); - - /* data |= pVBInfo->ram_channel << 2; */ - /* data |= (pVBInfo->ram_bus / 64) << 1; */ - /* xgifb_reg_set(pVBInfo->P3c4, 0x14, data); */ - - /* should delay */ - /* XGINew_SetDRAMModeRegister340(pVBInfo); */ } return memsize; } @@ -703,8 +612,7 @@ static int XGINew_ReadWriteRest(unsigned short StopAddr, writel(Position, fbaddr + Position); } - udelay(500); /* [Vicent] 2004/04/16. - Fix #1759 Memory Size error in Multi-Adapter. */ + udelay(500); /* Fix #1759 Memory Size error in Multi-Adapter. */ Position = 0; @@ -946,52 +854,41 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, static int XGINew_DDRSizing340(struct xgi_hw_device_info *HwDeviceExtension, struct vb_device_info *pVBInfo) { - int i; - unsigned short memsize, addr; + u8 i, size; + unsigned short memsize, start_addr; + const unsigned short (*dram_table)[2]; xgifb_reg_set(pVBInfo->P3c4, 0x15, 0x00); /* noninterleaving */ xgifb_reg_set(pVBInfo->P3c4, 0x1C, 0x00); /* nontiling */ XGINew_CheckChannel(HwDeviceExtension, pVBInfo); if (HwDeviceExtension->jChipType >= XG20) { - for (i = 0; i < 12; i++) { - XGINew_SetDRAMSizingType(i, - XGINew_DDRDRAM_TYPE20, - pVBInfo); - memsize = XGINew_SetDRAMSize20Reg(i, - XGINew_DDRDRAM_TYPE20, - pVBInfo); - if (memsize == 0) - continue; - - addr = memsize + (pVBInfo->ram_channel - 2) + 20; - if ((HwDeviceExtension->ulVideoMemorySize - 1) < - (unsigned long) (1 << addr)) - continue; - - if (XGINew_ReadWriteRest(addr, 5, pVBInfo) == 1) - return 1; - } + dram_table = XGINew_DDRDRAM_TYPE20; + size = ARRAY_SIZE(XGINew_DDRDRAM_TYPE20); + start_addr = 5; } else { - for (i = 0; i < 4; i++) { - XGINew_SetDRAMSizingType(i, - XGINew_DDRDRAM_TYPE340, - pVBInfo); - memsize = XGINew_SetDRAMSizeReg(i, - XGINew_DDRDRAM_TYPE340, - pVBInfo); - - if (memsize == 0) - continue; - - addr = memsize + (pVBInfo->ram_channel - 2) + 20; - if ((HwDeviceExtension->ulVideoMemorySize - 1) < - (unsigned long) (1 << addr)) - continue; - - if (XGINew_ReadWriteRest(addr, 9, pVBInfo) == 1) - return 1; - } + dram_table = XGINew_DDRDRAM_TYPE340; + size = ARRAY_SIZE(XGINew_DDRDRAM_TYPE340); + start_addr = 9; + } + + for (i = 0; i < size; i++) { + /* SetDRAMSizingType */ + xgifb_reg_and_or(pVBInfo->P3c4, 0x13, 0x80, dram_table[i][1]); + udelay(15); /* should delay 50 ns */ + + memsize = XGINew_SetDRAMSize20Reg(dram_table[i][0], pVBInfo); + + if (memsize == 0) + continue; + + memsize += (pVBInfo->ram_channel - 2) + 20; + if ((HwDeviceExtension->ulVideoMemorySize - 1) < + (unsigned long) (1 << memsize)) + continue; + + if (XGINew_ReadWriteRest(memsize, start_addr, pVBInfo) == 1) + return 1; } return 0; } @@ -1011,9 +908,6 @@ static void XGINew_SetDRAMSize_340(struct xgifb_video_info *xgifb_info, xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data & 0xDF)); XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo); - /* data = xgifb_reg_get(pVBInfo->P3c4, 0x1); */ - /* data |= 0x20 ; */ - /* xgifb_reg_set(pVBInfo->P3c4, 0x01, data); *//* Turn OFF Display */ XGINew_DDRSizing340(HwDeviceExtension, pVBInfo); data = xgifb_reg_get(pVBInfo->P3c4, 0x21); /* enable read cache */ @@ -1057,7 +951,7 @@ static void xgifb_read_vbios(struct pci_dev *pdev, pVBInfo->IF_DEF_LVDS = 0; vbios = xgifb_copy_rom(pdev, &vbios_size); if (vbios == NULL) { - dev_err(&pdev->dev, "video BIOS not available\n"); + dev_err(&pdev->dev, "Video BIOS not available\n"); return; } if (vbios_size <= 0x65) @@ -1112,7 +1006,7 @@ static void xgifb_read_vbios(struct pci_dev *pdev, pVBInfo->IF_DEF_LVDS = 1; return; error: - dev_err(&pdev->dev, "video BIOS corrupted\n"); + dev_err(&pdev->dev, "Video BIOS corrupted\n"); vfree(vbios); } @@ -1148,15 +1042,10 @@ static void XGINew_ChkSenseStatus(struct xgi_hw_device_info *HwDeviceExtension, if (tempbx & tempcx) { CR3CData = xgifb_reg_get(pVBInfo->P3d4, 0x3c); - if (!(CR3CData & DisplayDeviceFromCMOS)) { + if (!(CR3CData & DisplayDeviceFromCMOS)) tempcx = 0x1FF0; - if (*pVBInfo->pSoftSetting & ModeSoftSetting) - tempbx = 0x1FF0; - } } else { tempcx = 0x1FF0; - if (*pVBInfo->pSoftSetting & ModeSoftSetting) - tempbx = 0x1FF0; } tempbx &= tempcx; @@ -1295,13 +1184,11 @@ static void XGINew_GetXG21Sense(struct xgi_hw_device_info *HwDeviceExtension, { unsigned char Temp; -#if 1 if (pVBInfo->IF_DEF_LVDS) { /* For XG21 LVDS */ xgifb_reg_or(pVBInfo->P3d4, 0x32, LCDSense); /* LVDS on chip */ xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0); } else { -#endif /* Enable GPIOA/B read */ xgifb_reg_and_or(pVBInfo->P3d4, 0x4A, ~0x03, 0x03); Temp = xgifb_reg_get(pVBInfo->P3d4, 0x48) & 0xC0; @@ -1324,9 +1211,7 @@ static void XGINew_GetXG21Sense(struct xgi_hw_device_info *HwDeviceExtension, /* Disable read GPIOF */ xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~0x20); } -#if 1 } -#endif } static void XGINew_GetXG27Sense(struct xgi_hw_device_info *HwDeviceExtension, @@ -1398,37 +1283,23 @@ unsigned char XGIInitNew(struct pci_dev *pdev) struct vb_device_info VBINF; struct vb_device_info *pVBInfo = &VBINF; unsigned char i, temp = 0, temp1; - /* VBIOSVersion[5]; */ - - /* unsigned long j, k; */ pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress; pVBInfo->BaseAddr = xgifb_info->vga_base; - /* Newdebugcode(0x99); */ - if (pVBInfo->FBAddr == NULL) { - printk("\n pVBInfo->FBAddr == 0 "); + dev_dbg(&pdev->dev, "pVBInfo->FBAddr == 0\n"); return 0; } - printk("1"); if (pVBInfo->BaseAddr == 0) { - printk("\npVBInfo->BaseAddr == 0 "); + dev_dbg(&pdev->dev, "pVBInfo->BaseAddr == 0\n"); return 0; } - printk("2"); outb(0x67, (pVBInfo->BaseAddr + 0x12)); /* 3c2 <- 67 ,ynlai */ pVBInfo->ISXPDOS = 0; - printk("3"); - - printk("4"); - - /* VBIOSVersion[4] = 0x0; */ - - /* 09/07/99 modify by domao */ pVBInfo->P3c4 = pVBInfo->BaseAddr + 0x14; pVBInfo->P3d4 = pVBInfo->BaseAddr + 0x24; @@ -1447,9 +1318,8 @@ unsigned char XGIInitNew(struct pci_dev *pdev) pVBInfo->Part3Port = pVBInfo->BaseAddr + SIS_CRT2_PORT_12; pVBInfo->Part4Port = pVBInfo->BaseAddr + SIS_CRT2_PORT_14; pVBInfo->Part5Port = pVBInfo->BaseAddr + SIS_CRT2_PORT_14 + 2; - printk("5"); - if (HwDeviceExtension->jChipType < XG20) /* kuku 2004/06/25 */ + if (HwDeviceExtension->jChipType < XG20) /* Run XGI_GetVBType before InitTo330Pointer */ XGI_GetVBType(pVBInfo); @@ -1457,9 +1327,8 @@ unsigned char XGIInitNew(struct pci_dev *pdev) xgifb_read_vbios(pdev, pVBInfo); - /* 1.Openkey */ + /* Openkey */ xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86); - printk("6"); /* GetXG21Sense (GPIO) */ if (HwDeviceExtension->jChipType == XG21) @@ -1468,9 +1337,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev) if (HwDeviceExtension->jChipType == XG27) XGINew_GetXG27Sense(HwDeviceExtension, pVBInfo); - printk("7"); - - /* 2.Reset Extended register */ + /* Reset Extended register */ for (i = 0x06; i < 0x20; i++) xgifb_reg_set(pVBInfo->P3c4, i, 0); @@ -1478,105 +1345,37 @@ unsigned char XGIInitNew(struct pci_dev *pdev) for (i = 0x21; i <= 0x27; i++) xgifb_reg_set(pVBInfo->P3c4, i, 0); - /* for(i = 0x06; i <= 0x27; i++) */ - /* xgifb_reg_set(pVBInfo->P3c4, i, 0); */ - - printk("8"); - for (i = 0x31; i <= 0x3B; i++) xgifb_reg_set(pVBInfo->P3c4, i, 0); - printk("9"); - /* [Hsuan] 2004/08/20 Auto over driver for XG42 */ + /* Auto over driver for XG42 */ if (HwDeviceExtension->jChipType == XG42) xgifb_reg_set(pVBInfo->P3c4, 0x3B, 0xC0); - /* for (i = 0x30; i <= 0x3F; i++) */ - /* xgifb_reg_set(pVBInfo->P3d4, i, 0); */ - for (i = 0x79; i <= 0x7C; i++) - xgifb_reg_set(pVBInfo->P3d4, i, 0); /* shampoo 0208 */ - - printk("10"); + xgifb_reg_set(pVBInfo->P3d4, i, 0); if (HwDeviceExtension->jChipType >= XG20) - xgifb_reg_set(pVBInfo->P3d4, 0x97, *pVBInfo->pXGINew_CR97); - - /* 3.SetMemoryClock + xgifb_reg_set(pVBInfo->P3d4, 0x97, pVBInfo->XGINew_CR97); - pVBInfo->ram_type = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); - */ - - printk("11"); - - /* 4.SetDefExt1Regs begin */ - xgifb_reg_set(pVBInfo->P3c4, 0x07, *pVBInfo->pSR07); + /* SetDefExt1Regs begin */ + xgifb_reg_set(pVBInfo->P3c4, 0x07, XGI330_SR07); if (HwDeviceExtension->jChipType == XG27) { - xgifb_reg_set(pVBInfo->P3c4, 0x40, *pVBInfo->pSR40); - xgifb_reg_set(pVBInfo->P3c4, 0x41, *pVBInfo->pSR41); + xgifb_reg_set(pVBInfo->P3c4, 0x40, XG27_SR40); + xgifb_reg_set(pVBInfo->P3c4, 0x41, XG27_SR41); } xgifb_reg_set(pVBInfo->P3c4, 0x11, 0x0F); - xgifb_reg_set(pVBInfo->P3c4, 0x1F, *pVBInfo->pSR1F); - /* xgifb_reg_set(pVBInfo->P3c4, 0x20, 0x20); */ - /* alan, 2001/6/26 Frame buffer can read/write SR20 */ + xgifb_reg_set(pVBInfo->P3c4, 0x1F, XGI330_SR1F); + /* Frame buffer can read/write SR20 */ xgifb_reg_set(pVBInfo->P3c4, 0x20, 0xA0); - /* Hsuan, 2006/01/01 H/W request for slow corner chip */ + /* H/W request for slow corner chip */ xgifb_reg_set(pVBInfo->P3c4, 0x36, 0x70); - if (HwDeviceExtension->jChipType == XG27) /* Alan 12/07/2006 */ - xgifb_reg_set(pVBInfo->P3c4, 0x36, *pVBInfo->pSR36); - - /* SR11 = 0x0F; */ - /* xgifb_reg_set(pVBInfo->P3c4, 0x11, SR11); */ - - printk("12"); + if (HwDeviceExtension->jChipType == XG27) + xgifb_reg_set(pVBInfo->P3c4, 0x36, XG27_SR36); - if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */ + if (HwDeviceExtension->jChipType < XG20) { u32 Temp; - /* Set AGP Rate */ - /* - temp1 = xgifb_reg_get(pVBInfo->P3c4, 0x3B); - temp1 &= 0x02; - if (temp1 == 0x02) { - outl(0x80000000, 0xcf8); - ChipsetID = inl(0x0cfc); - outl(0x8000002C, 0xcf8); - VendorID = inl(0x0cfc); - VendorID &= 0x0000FFFF; - outl(0x8001002C, 0xcf8); - GraphicVendorID = inl(0x0cfc); - GraphicVendorID &= 0x0000FFFF; - - if (ChipsetID == 0x7301039) - xgifb_reg_set(pVBInfo->P3d4, 0x5F, 0x09); - - ChipsetID &= 0x0000FFFF; - - if ((ChipsetID == 0x700E) || - (ChipsetID == 0x1022) || - (ChipsetID == 0x1106) || - (ChipsetID == 0x10DE)) { - if (ChipsetID == 0x1106) { - if ((VendorID == 0x1019) && - (GraphicVendorID == 0x1019)) - xgifb_reg_set(pVBInfo->P3d4, - 0x5F, - 0x0D); - else - xgifb_reg_set(pVBInfo->P3d4, - 0x5F, - 0x0B); - } else { - xgifb_reg_set(pVBInfo->P3d4, - 0x5F, - 0x0B); - } - } - } - */ - - printk("13"); - /* Set AGP customize registers (in SetDefAGPRegs) Start */ for (i = 0x47; i <= 0x4C; i++) xgifb_reg_set(pVBInfo->P3d4, @@ -1592,12 +1391,6 @@ unsigned char XGIInitNew(struct pci_dev *pdev) xgifb_reg_set(pVBInfo->P3d4, i, pVBInfo->AGPReg[8 + i - 0x74]); - /* Set AGP customize registers (in SetDefAGPRegs) End */ - /* [Hsuan]2004/12/14 AGP Input Delay Adjustment on 850 */ - /* outl(0x80000000, 0xcf8); */ - /* ChipsetID = inl(0x0cfc); */ - /* if (ChipsetID == 0x25308086) */ - /* xgifb_reg_set(pVBInfo->P3d4, 0x77, 0xF0); */ pci_read_config_dword(pdev, 0x50, &Temp); Temp >>= 20; @@ -1605,19 +1398,17 @@ unsigned char XGIInitNew(struct pci_dev *pdev) if (Temp == 1) xgifb_reg_set(pVBInfo->P3d4, 0x48, 0x20); /* CR48 */ - printk("14"); } /* != XG20 */ /* Set PCI */ - xgifb_reg_set(pVBInfo->P3c4, 0x23, *pVBInfo->pSR23); - xgifb_reg_set(pVBInfo->P3c4, 0x24, *pVBInfo->pSR24); - xgifb_reg_set(pVBInfo->P3c4, 0x25, pVBInfo->SR25[0]); - printk("15"); + xgifb_reg_set(pVBInfo->P3c4, 0x23, XGI330_SR23); + xgifb_reg_set(pVBInfo->P3c4, 0x24, XGI330_SR24); + xgifb_reg_set(pVBInfo->P3c4, 0x25, XGI330_SR25); - if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */ + if (HwDeviceExtension->jChipType < XG20) { /* Set VB */ XGI_UnLockCRT2(HwDeviceExtension, pVBInfo); - /* alan, disable VideoCapture */ + /* disable VideoCapture */ xgifb_reg_and_or(pVBInfo->Part0Port, 0x3F, 0xEF, 0x00); xgifb_reg_set(pVBInfo->Part1Port, 0x00, 0x00); /* chk if BCLK>=100MHz */ @@ -1625,10 +1416,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev) temp = (unsigned char) ((temp1 >> 4) & 0x0F); xgifb_reg_set(pVBInfo->Part1Port, - 0x02, - (*pVBInfo->pCRT2Data_1_2)); - - printk("16"); + 0x02, XGI330_CRT2Data_1_2); xgifb_reg_set(pVBInfo->Part1Port, 0x2E, 0x08); /* use VB */ } /* != XG20 */ @@ -1640,51 +1428,36 @@ unsigned char XGIInitNew(struct pci_dev *pdev) /* Not DDR */ xgifb_reg_set(pVBInfo->P3c4, 0x31, - (*pVBInfo->pSR31 & 0x3F) | 0x40); + (XGI330_SR31 & 0x3F) | 0x40); xgifb_reg_set(pVBInfo->P3c4, 0x32, - (*pVBInfo->pSR32 & 0xFC) | 0x01); + (XGI330_SR32 & 0xFC) | 0x01); } else { - xgifb_reg_set(pVBInfo->P3c4, 0x31, *pVBInfo->pSR31); - xgifb_reg_set(pVBInfo->P3c4, 0x32, *pVBInfo->pSR32); + xgifb_reg_set(pVBInfo->P3c4, 0x31, XGI330_SR31); + xgifb_reg_set(pVBInfo->P3c4, 0x32, XGI330_SR32); } - xgifb_reg_set(pVBInfo->P3c4, 0x33, *pVBInfo->pSR33); - printk("17"); + xgifb_reg_set(pVBInfo->P3c4, 0x33, XGI330_SR33); - /* - SetPowerConsume (HwDeviceExtension, pVBInfo->P3c4); */ - - if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */ + if (HwDeviceExtension->jChipType < XG20) { if (XGI_BridgeIsOn(pVBInfo) == 1) { if (pVBInfo->IF_DEF_LVDS == 0) { xgifb_reg_set(pVBInfo->Part2Port, 0x00, 0x1C); xgifb_reg_set(pVBInfo->Part4Port, - 0x0D, - *pVBInfo->pCRT2Data_4_D); + 0x0D, XGI330_CRT2Data_4_D); xgifb_reg_set(pVBInfo->Part4Port, - 0x0E, - *pVBInfo->pCRT2Data_4_E); + 0x0E, XGI330_CRT2Data_4_E); xgifb_reg_set(pVBInfo->Part4Port, - 0x10, - *pVBInfo->pCRT2Data_4_10); + 0x10, XGI330_CRT2Data_4_10); xgifb_reg_set(pVBInfo->Part4Port, 0x0F, 0x3F); } XGI_LockCRT2(HwDeviceExtension, pVBInfo); } } /* != XG20 */ - printk("18"); - - printk("181"); - - printk("182"); XGI_SenseCRT1(pVBInfo); - printk("183"); - /* XGINew_DetectMonitor(HwDeviceExtension); */ if (HwDeviceExtension->jChipType == XG21) { - printk("186"); xgifb_reg_and_or(pVBInfo->P3d4, 0x32, @@ -1692,7 +1465,6 @@ unsigned char XGIInitNew(struct pci_dev *pdev) Monitor1Sense); /* Z9 default has CRT */ temp = GetXG21FPBits(pVBInfo); xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~0x01, temp); - printk("187"); } if (HwDeviceExtension->jChipType == XG27) { @@ -1703,7 +1475,6 @@ unsigned char XGIInitNew(struct pci_dev *pdev) temp = GetXG27FPBits(pVBInfo); xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~0x03, temp); } - printk("19"); pVBInfo->ram_type = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); @@ -1711,51 +1482,19 @@ unsigned char XGIInitNew(struct pci_dev *pdev) pVBInfo->P3d4, pVBInfo); - printk("20"); XGINew_SetDRAMSize_340(xgifb_info, HwDeviceExtension, pVBInfo); - printk("21"); - - printk("22"); - /* SetDefExt2Regs begin */ - /* - AGP = 1; - temp = (unsigned char) xgifb_reg_get(pVBInfo->P3c4, 0x3A); - temp &= 0x30; - if (temp == 0x30) - AGP = 0; - - if (AGP == 0) - *pVBInfo->pSR21 &= 0xEF; - - xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21); - if (AGP == 1) - *pVBInfo->pSR22 &= 0x20; - xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); - */ - /* base = 0x80000000; */ - /* OutPortLong(0xcf8, base); */ - /* Temp = (InPortLong(0xcfc) & 0xFFFF); */ - /* if (Temp == 0x1039) { */ xgifb_reg_set(pVBInfo->P3c4, 0x22, - (unsigned char) ((*pVBInfo->pSR22) & 0xFE)); - /* } else { */ - /* xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); */ - /* } */ - - xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21); + (unsigned char) ((pVBInfo->SR22) & 0xFE)); - printk("23"); + xgifb_reg_set(pVBInfo->P3c4, 0x21, pVBInfo->SR21); XGINew_ChkSenseStatus(HwDeviceExtension, pVBInfo); XGINew_SetModeScratch(HwDeviceExtension, pVBInfo); - printk("24"); - xgifb_reg_set(pVBInfo->P3d4, 0x8c, 0x87); xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x31); - printk("25"); return 1; } /* end of init */ |