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2014-08-01nvmap: fix test condition to avoid infinite looptegra-l4t-r16-er-2014-08-01daily-2014.08.04.3_l4t/l4t-r16Bibek Basu
Make sure that we dont enter infinite loop due to negative value of pins in some cases. Also remove debugging check for refcount. Bug 1478467 Change-Id: I7df8efa5b3cf8927a0c18363add4f031aca48e48 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/450209 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-31media: tegra_v4l2_camera: use FRAME_START syncptBryan Wu
Also use nvhost_syncpt_incr_max_ext(). Bug 1478352 Change-Id: Ib868bd2bd7a070e4c410e48bd51977ac45b7d477 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/439471 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-07-31video: tegra: host: power module before accessBibek Basu
There could be race in refcount update leading to access of module registers without enabling the clock and power.This patch tries to catch such instances and enables power. Bug 1478467 Change-Id: Ia32da44bfcd7838e312815b6261ccadf4470a761 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/448701 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-31video: tegra: nvhost: validate nvmap_handle_refBibek Basu
nvhost_job_unpin should always get the nvmap_handle_ref from rb_entry after validating handle and presence in the tree. Bug 1478467 Change-Id: Ibf5f64a1a82fea8adbf7500bdb36b76357776448 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/436076 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-06-04media: video: fix clock settings for Tegra VI driverBryan Wu
- remove reduntant emc clock rate set which is controlled by DVFS - VI's maxim working clock freq is 300MHz - Change VI clock divider from an integer to a decimal, so the maxim VI clock on Cardhu should be 272MHz (PLL_P is 408MHz and divider is 1.5) Bug 1478352 Change-Id: I4028ed8531d92300d131befb53a4c9dc9f90930d Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/419071 Reviewed-by: Winnie Hsu <whsu@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-06-04Added continuous mode capture supportAlex Feinman
Signed-off-by: Bryan Wu <pengw@nvidia.com> Change-Id: I67c50ff86b53a6c1001d2b688251dc55bd2eff55 Reviewed-on: http://git-master/r/419070 Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-05-28mmc: Prevent 1.8V switch for SD hosts that don't support UHS modes.Al Cooper
The driver should not try to switch to 1.8V when the SD 3.0 host controller does not have any UHS capabilities bits set (SDR50, DDR50 or SDR104). See page 72 of "SD Specifications Part A2 SD Host Controller Simplified Specification Version 3.00" under "1.8V Signaling Enable". Instead of setting SDR12 and SDR25 in the host capabilities data structure for all V3.0 host controllers, only set them if SDR104, SDR50 or DDR50 is set in the host capabilities register. This will prevent the switch to 1.8V later. Bug 1402031 Acked-by: Arindam Nath <arindam.nath@amd.com> Acked-by: Philip Rakity <prakity@marvell.com> Acked-by: Girish K S <girish.shivananjappa@linaro.org> Signed-off-by: Al Cooper <acooper@gmail.com> Signed-off-by: Jeetesh Burman <jburman@nvidia.com> Signed-off-by: Chris Ball <cjb@laptop.org> Change-Id: I61d3fdb96fce223649075b6c063a3dd227aef062 Reviewed-on: http://git-master/r/365451 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2014-05-28mmc: sdhci: add quirk for lack of 1.8v supportJeetesh Burman
The OLPC XO-1.75 laptop includes a SDHCI controller which is 1.8v capable, and it truthfully reports so in its capabilities. This alternate voltage is used for driving new "UHS-I" SD cards at their full speed. However, what the controller doesn't know is that the motherboard physically doesn't have a 1.8v supply available. Add a quirk so that systems such as this one can override disable 1.8v support, adding support for UHS-I cards (by running them at 3.3v). This avoids a problem where the system would first try to run the card at 1.8v, fail, and then not be able to fully reset the card to retry at the normal 3.3v voltage. This is more appropriate than using the MISSING_CAPS quirk, which is intended for cases where the SDHCI controller is actually lying about its capabilities, and would force us to somehow override both caps words from another source. Bug 1402031 Change-Id: I7ca070a13241e6403eb2e243ebbc441a311110bc Signed-off-by: Daniel Drake <dsd@laptop.org> Reviewed-by: Philip Rakity <prakity@nvidia.com> Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Jeetesh Burman <jburman@nvidia.com> Reviewed-on: http://git-master/r/346323 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2014-05-05tegra_wdt: support default watchdog apiJeetesh Burman
Reworked driver in order to properly support default watchdog api such as triggering by writing a character and disable by sending a magic character. Renamed ENABLE_ON_PROBE to ENABLE_HEARTBEAT which triggers the watchdog using the interrupt service routine. Original patch: http://git.toradex.com/gitweb/linux-toradex.git/commitdiff/5da592b805718b4f33897d642f577b1e6511bc2b Bug 1402031 Change-Id: I33ef556dac6d6717cadc00f8937437b925dc2ca3 Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Jeetesh Burman <jburman@nvidia.com> Reviewed-on: http://git-master/r/346477 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-03-05ARM: tegra: pcie: Disable PCIe GEN2 capabilityEric Brower
Disable PCIe Gen2 capability. This is not supported on Tegra 20/30 SOCs. Bug 1399592 Change-Id: I696a982b93d2e56a3b24379d38e51a5e93e4b7a1 Signed-off-by: Eric Brower <ebrower@nvidia.com> Reviewed-on: http://git-master/r/326195 Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-01-24media: nvmap: Allow access to videobuf2-dma-nvmapRahool Paliwal
Allow the "user" nvmap client to access the nvmap memory handle of "videobuf2-dma-nvmap" client. Bug 1421388 Change-Id: Id7a28c06214508d807098a6b258345023192a601 Signed-off-by: Rahool Paliwal <rpaliwal@nvidia.com> Reviewed-on: http://git-master/r/344620 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-01-24video: tegra: hdmi: validate variable screeninfopdabade
verify variable screeninfo by checking xres and yres before validating aspect ratio. bug 1417318 Change-Id: I473f3e2f30888c053ca53559e33355f216d2a8d3 Signed-off-by: Pankaj Dabade <pdabade@nvidia.com> Reviewed-on: http://git-master/r/340236 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-01-23video: tegra: fb: Update and synchronize dc windowpdabade
Update and synchronize DC window after enabling DC while unblanking. bug 1416339 Change-Id: I404004e1cbb3908cceade8aa033a660dc488d400 Signed-off-by: Pankaj Dabade <pdabade@nvidia.com> Reviewed-on: http://git-master/r/344778 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2014-01-20arch: arm: mach-tegra: Make benign warning as infopdabade
A request to set brightness to zero is valid irrespective of what previous brightness of backlight was. A request of zero brightness disables PWM; so a re-request can be made to disable a already disabled PWM. bug 1416333 Change-Id: Ia5f29911456eb5d76fa303bb9070a6f04ec97002 Signed-off-by: Pankaj Dabade <pdabade@nvidia.com> Reviewed-on: http://git-master/r/348366 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-11-22ARM: tegra: make SKU 0x81 same as 0xB1 for tegra3tegra-l4t-r16-16.4Shreshtha Sahu
SKU 0x81 is identical to 0xB1 so same can be used for sku to speedo ID conversion. Bug 1313434 Change-Id: I63f08522878524a05c2a6fb0a82fee90a59a99bd Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com> Reviewed-on: http://git-master/r/334396 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-11-18media: ov5640: change 1080p resolution to 1088pBryan Wu
Setting the resolution to 1088p (as of now), since there are flickers observed for 1080p and also the encoder is not compatible with alignement of the RM surfaces of 1080p. 1088p is a stop-gap solution until the issues with 1080p are resolved. Bug 1369083 Change-Id: I3e73076451e7671d90603c6496ad14733591edeb Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/309543 Tested-by: Vikram Fugro <vfugro@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kaustubh Purandare <kpurandare@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-11-18media: tegra_v4l2: add CSI pad calibrationBryan Wu
Bug 1369083 Change-Id: I1a81bcb62e8f6bb654ffbebba09661187ab4b512 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/309536 Tested-by: Vikram Fugro <vfugro@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kaustubh Purandare <kpurandare@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-11-18media: nvmap: Few tweaks in nvmapVikram Fugro
The tweaks are only specific to r16-r2 branch and will not go into mainline. - Pass nvmap memory handle to the user through the mmap'd buffer allocated by videobuf2 client. - Allow the "user" nvmap client to access the nvmap memory handle of "videobuf2-dma-nvmap" client. Re-arranging the copyright message in nvmap_dev.c for Automatic validation to pass. Bug 1369083 Change-Id: Ia27d172253860e79557911c2e848bc9084d662d4 Signed-off-by: Vikram Fugro <vfugro@nvidia.com> Reviewed-on: http://git-master/r/309494 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Kaustubh Purandare <kpurandare@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-11-18Revert "media: camera config changes"Vikram Fugro
This reverts commit dd9a841da571a41d43f1eeaac1785b2adb1d80f3. The config changes (for V4L2) can be done manually as per need basis for V4L2, followed by compiling the kernel. Change-Id: I9174bce0f3da2974ab703b238dfb8fb3bbf607c5 Signed-off-by: Vikram Fugro <vfugro@nvidia.com> Reviewed-on: http://git-master/r/327607 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kaustubh Purandare <kpurandare@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-30media: camera config changesVikram Fugro
- Disables TEGRA_CAMERA - Enables SOC_CAMERA and OV5640 sensor support Bug 1369083 Change-Id: I073c226e9f04a6f4f4699051f624a755dceb36cb Signed-off-by: Vikram Fugro <vfugro@nvidia.com> Reviewed-on: http://git-master/r/309491 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-16media: ov5640: update OV5640 sensor driverBryan Wu
Bug 1369083 Change-Id: I1522b688e0681e52592c0f26a8e335937372836a Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/279989 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-16ARM: tegra: cardhu: enable OV5650/OV5640 sensorBryan Wu
Enable OV5650 and OV5640 sensor in Cardhu board file with the help of Tegra V4L2 SoC camera interface. To use V4L2 driver, we need to disable old camera HAL driver. Bug 1240806 Bug 1369083 Change-Id: I0dc529d44fba4d80b45690e384e8bf81b29f69e5 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/246266 (cherry picked from commit 6b2f7cc4117208dc992478f27d5873ea38071fdc) Reviewed-on: http://git-master/r/279988 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-16media: tegra_v4l2: add dual camera supportBryan Wu
Add support for dual cameras from both CSI-A and CSI-B: - move all the CSI settings into video buffer struct - queue the video buffer struct to a dedicated queue - process one video buffer struct from the queue at one time Bug 1369083 Change-Id: Ie64d69282ab991b66e97327e288a2bacde088bd6 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/246269 (cherry picked from commit 228b0c2d9ae3fa1121f88836626d654ae0fc4ff0) Reviewed-on: http://git-master/r/279987 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-16media: tegra_v4l2: pass platform_data via soc_camera_linkBryan Wu
soc_camera_link supports passing power on/off control callback to soc_camera stack. So the power control can be handled by soc_camera stack instead of our Tegra V4L2 host driver. Also pass other platform_data fields via soc_camera_link instead of a hacking nvhost_device_data struct. Bug 1240806 Bug 1369083 Change-Id: I443a7d28196cc8292805da70d2d5ff1c3cd50a5d Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/246267 (cherry picked from commit 9083d270bf93b583cd5bf5151a52ea250f8541a3) Reviewed-on: http://git-master/r/279986 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-16media: tegra: use BGGR raw ouput formatBryan Wu
Bug 1369083 Change-Id: I43acb0d1dd6ca182291895d294a8458bfc99da05 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/279985 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-16media: videobuf2: fix buffer management issuesBryan Wu
Use right buffer flag NVMAP_HANDLE_WRITE_COMBINE to allocate buffer, which can be shared by VI/CSI and CPU. Don't use NVMAP_HEAP_SYSMEM. It is validated to old T20 silicon and can't support big buffers. By default, our nvmap_alloc() will use IOVMM to allocate buffers. nvmap_pin() gives us IOVA for hardware engines like VI/CSI module with IOMMU enabled in kernel. nvmap_mmap() gives us VA for CPU read/write operations. So we need to convert VA address to physical address of the buffer and map that buffer to user space processor's memory space "page by page". Bug 1369083 Change-Id: I4629eebe206c7640adf63551968fd89260dd0082 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/279984 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-10-16media: OV5650: tweak registers and add test modeBryan Wu
- tweak offset registers - add test mode to output color bars - use BGGR RAW format Bug 1369083 Change-Id: I61352c018f8ca099ff3d39158a67052a1e185eec Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/279983 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-09-16ARM: tegra3: initialize pll_a during bootBibek Basu
Configure pll_a during boot so that locking to pll_a does not fail Bug 1330751 Change-Id: I188f0be211379f43770b24c5b382dec2788aefda Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/269469 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kiran Adduri <kadduri@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2013-09-12ARM: tegra: beaver: updated DVFS tableBibek Basu
DVFS entry is fixed for Hynix_2GB_H5TC4G83MFR-PBA to support all emc frequencies. Bug 1218885 Change-Id: Id9d578499e495f43db1a072cbcee25a353fa78f5 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/210653 (cherry picked from commit 688bf04ff67e2c1ff22762f4f578b925ff3b9f3c) Reviewed-on: http://git-master/r/273530 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kiran Adduri <kadduri@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-08-19media: video: tegra: sh532u: fix out-of-bounds readDeepak Nibade
fix Coverity issue Coverity id : 13692 Bug 1046331 Bug 1049868 Change-Id: Iefa6d076d4622368534710630b89b9a15d166378 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/165864 (cherry picked from commit db33c3f3f2447a52a40f4fd001fec9a2932ee4c8) Reviewed-on: http://git-master/r/244637 Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com> Tested-by: Shreshtha Sahu <ssahu@nvidia.com> Reviewed-by: Kiran Adduri <kadduri@nvidia.com> Reviewed-by: Erik Lilliebjerg <elilliebjerg@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2013-08-06config: tegra3: Turn off R8169 firmware loadingMursalin Akon
The firmware is not being in use currently. So, turn the loading code off. Bug 1236060 Bug 991551 Change-Id: Id41cf762b59502d0ece470e315ac75d93e3b6b39 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/218613 (cherry picked from commit f15976bdfb32d6c5e20057f6d4d57646c15a5591) Reviewed-on: http://git-master/r/258354 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-08-06Make firmware loading of R8169 optionalMursalin Akon
According to Realtek, the firmware provides power optimizations. The driver works without the firmware. Plus, there are scenarios where the firmware is not available, which makes the driver wait at request_firmware call (i.e., 60 sec wait). Bug 1236060 Bug 991551 Change-Id: Ifcaa4b2dd48c4111ded33cf2bade7dc1f6422821 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/258353 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-05-22perf: Treat attr.config as u64 in perf_swevent_init()Preetham Chandru R
Trinity discovered that we fail to check all 64 bits of attr.config passed by user space, resulting to out-of-bounds access of the perf_swevent_enabled array in sw_perf_event_destroy(). Introduced in commit b0a873ebb ("perf: Register PMU implementations"). Bug 1289245 Signed-off-by: Tommi Rantala <tt.rantala@gmail.com> Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> (cherry picked from commit 8176cced706b5e5d15887584150764894e94e02f) Change-Id: Idde0330d7430f2ba1645f4dfed063c5df9bbb44a Reviewed-on: http://git-master/r/228851 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Kiran Adduri <kadduri@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
2013-04-04arm: tegra: cardhu: modify cardhu board filesDarbha Sriharsha
This change is intended to add a few modifications to cardhu board file (which is also used for beaver) to get rid of NACK errors occuring due to the absence of certain hardware components on beaver Bug 1217572 Change-Id: I1df7b7f777014610e4d64695d89324808ea4f266 Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com> Reviewed-on: http://git-master/r/215983 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2013-03-18arch: tegra: Ventana: vdd_ldo4 regulator handlingRamalingam C
Cleaning up of the vdd_ldo4 regulator handling and also control the multiple calls for regulator_get call for vdd_ldo4 Bug 1241274 Change-Id: I0f62d5059212302956bfe7e48d24eb7f45ff2dda Signed-off-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-on: http://git-master/r/207516 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-14arm: tegra: cardhu: additions to cardhu board fileDarbha Sriharsha
This change is intended to add modifications to cardhu board file (which is also used for beaver) to get rid of NACK errors occuring due to the absence of certain hardware components on beaver Bug 1217572 Change-Id: I36dfcda1b133c983ce25d56729505bce8b99fdf1 Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com> Reviewed-on: http://git-master/r/193667 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-07ARM: Config: Tegra3:Disabled CONFIG_INPUT_MOUSEDEVNaveen Kumar S
Disabled CONFIG_INPUT_MOUSEDEV to avoid kernel registering PS/2 mouse devices, which are mostly not in use now. Bug 1162832 Change-Id: I0b44af668fa94ffc589e646a842259afa837731e Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/187807 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-06ARM: Config: Tegra2: Disabled CONFIG_INPUT_MOUSEDEVNaveen Kumar S
Disabled CONFIG_INPUT_MOUSEDEV to avoid kernel registering PS/2 mouse devices, which are mostly not in use now. Bug 1162832 Change-Id: If47e654063934d3b60d033a0d2523b8caf97825b Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/187808 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-05ARM: tegra: cardhu: enable OV5650 sensorBryan Wu
Enable OV5650 sensor in Cardhu board file with the help of Tegra V4L2 SoC camera interface. Change-Id: I6ff8456941267c05986760f46f658962a940d07e Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/200226 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-05media: tegra: add supporting for RAW8/RAW10 input and outputBryan Wu
CSI host controller of Tegra can support Bayer Raw8 and Raw 10 data input, it also output data as extended 16-bit data format in memory directly. Raw data output should be handled by the second output channel. This patch add supporting for Raw data input/output and the second output channel. All were tested on Cardhu board. Change-Id: Ifd1d8c94671a1d4571dcf176774e2d3cffafc399 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/200225 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-05media: soc_camera: tegra: fix one building warningBryan Wu
Change-Id: Ie685ad11a0847be5b51c752ec593aec857e2f0e2 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/200224 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-05media: soc_camera: add OV5650 SoC camera I2C device driverBryan Wu
OV5650 is a RAW sensor outputing Bayer RAW 8 or RAW 10 data. This driver uses SoC camera interface and supports several different resolution. Change-Id: I8075b63b42f7949a264bdef446f5ed8bdc0a9eee Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/200223 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-05tegra: When using V4L2, don't use vi client.Andrew Chew
The VI client within drivers/video/tegra is mutually exclusive with the Tegra V4L2 framework, since they both want to own the camera hardware. Change-Id: Idebd0f619f5fc7eb6323b2e08c29c9692c8887a0 Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/200221 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-03-05tegra: Make tegra_vi01_device accessibleAndrew Chew
Make it accessible outside of drivers/video/tegra. V4L2 driver needs to set some platform_data. Add suport for T20. Change-Id: I98353c2874ea28cfa0a7a5dd8a1dc4c586af4dd7 Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/200220 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-02-01ARM: tegra: cardhu: Add battery regulatortegra-l4t-r16r3-rctegra-l4t-r16-er-2013-02-13Laxman Dewangan
Add battery regulator which is always-on. The rail which is powered from battery can be added on this rail as consumer. bug 1218527 Change-Id: I2394e1894649cd4fa736646981374681f603c832 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/#change,193052 (cherry picked from commit 4b9cabe87060bf5f252206aba5b62ea1ccb2ff83) Reviewed-on: http://git-master/r/193777 Tested-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-02-01config: tegra3: enable /dev mount with ACLMursalin Akon
enable /dev mount with ACL Bug 1225372 Bug 1219372 Change-Id: I3b80012e97c3a5ec8358285f81c5111a30ed19f8 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/196206 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-01-31staging: iio: light: isl29028: appropriately set interrupt flagPreetham Chandru R
set is_int_enable to true only if we register for a irq. Bug 1211260 Change-Id: I603efe721796db70d504da7999e5d7939d45d13a Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Reviewed-on: http://git-master/r/193047 (cherry picked from commit 8b89b2b64c67d80fcfc29cd4f6a92d4527e70df9) Reviewed-on: http://git-master/r/195844 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-01-31arm: tegra: cardhu: no gyro in beaverBibek Basu
Add support for PM315 Bug 1217569 Change-Id: I230fcec04eb5a96441e2c19b304d608d86eaf996 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/191555 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2013-01-16arm: Tegra: Beaver: PWRON key registrationRamalingam C
Registration of PWRON key through PMU interrupt Bug 1218247 Change-Id: I4d5d4a404fff28f2e34b1fd4af5712796eb8806c Signed-off-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-on: http://git-master/r/191574 Reviewed-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Peer Chen <pchen@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-01-14usb: gadget: tegra:change condition for vbus checkRakesh Bodla
Changing the condition for vbus check. VBUS will be present when OTG cable is connected, hence vbus status will be reflected wrong. Correct status is tracked through vbus_active variable. Bug 1158853 Bug 1214802 Change-Id: Ic904beb5919ddafef5becf39ddac1767cdda79cd Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/145148 (cherry picked from commit 00777683b05af76f15daa0152fb014183a32fa28) Reviewed-on: http://git-master/r/190673 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Preetham Chandru <pchandru@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-04-27 03:09:28 +0000