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First, retore the ocram bit, pl301 bits to previous value 3,
so most functions like fec, audio and video would not be blocked.
Add clock dependency in the coming commits .
Signed-off-by: Shen Yong <b00984@freescale.com>
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jiffies_to_msecs used instead of msecs_to_jiffies. This mistake has been fixed.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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There's a little issue in the original esdhc clock setting
that we used the wrong predefined microes for clock setting.
That will cause such an issue that if we want to select PPL2
as the clock source of esdhc1, but actually we get a PLL1 as
the clock source of esdhc2.
That will cause the final clock frequency of esdhc1 to be
a double of the expected frequency,(PLL1 800Mhz, PLL2 400Mhz)
and then some cards may be unable to work on sd1.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Running interrupt handlers with interrupts enabled can cause stack
overflows. That has been observed with multiqueue NICs delivering all
their interrupts to a single core. We might band aid that somehow by
checking the interrupt stacks, but the real safe fix is to run the irq
handlers with interrupts disabled.
Drivers for whacky hardware still can reenable them in the handler
itself, if the need arises. (They do already due to lockdep)
The risk of doing this is rather low:
- lockdep already enforces this
- CONFIG_NOHZ has shaken out the drivers which relied on jiffies updates
- time keeping is not longer sensitive to the timer interrupt being delayed
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: David Miller <davem@davemloft.net>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Linus Torvalds <torvalds@osdl.org>
LKML-Reference: <20100326000405.758579387@linutronix.de>
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These two functions can be called in IRQ context, but mutex may
cause the schedule. So remove the mutex lock, the spinlock of each
channel is enough.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Support the eMMC44 cards, and enable ddr mode
on MX28 EVK board.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add a new member xfer_count to struct mxs_dma_info, which will
be used later.
Signed-off-by: Lionel Xu <r63889@freescale.com>
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Configure the Databahn so that the DDR automatically enters Low Power Mode 4.
This will allow DDR to enter into self-refresh after an idle timeout.
Also added code to disable DDR_CLKGAT bits in the CCM when no bus masters
are accessing the DDR and ARM is in WFI.
Removed calls to change DDR frequency to 24MHz in LPAPM mode as this is
causing some random lockups. DDR is left at 266MHz in LPAPM mode currently.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Added "x_mem=" option (e.g. video=mxcepdcfb:E60,bpp=16,x_mem=10000)
to configure extra FB memory for X-accel.
Signed-off-by: r80085 <thomas.peng@freescale.com>
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Add support for Low Power Audio Playback Mode. System will enter this mode
whenever no modules that need high bus frequencies are active. The LP domain
and DDR will run at 24Mhz and CPU is at 160MHz in LPAPM mode.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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When update X coordinate is an odd number and the update region width
is a multiple of 8, the screen shows garbage due to a bug in how the
driver handles this corner case. The fix is to identify and handle
this case in the driver.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Remove the dependency of SPDIF_BASE_ADDR. Get the base address from
the device structure.
Acked-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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vpu: free the IRQ in the remove function and remove the MXC_INT_VPU
define dependency.
kpp: remove MXC_INT_KPP define dependency
nand: remove the MXC_INT_NANDFC define dependency
Acked-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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ipu: pass csi clock in platform data
ipu: use ipu hw rev instead of chip version
Acked-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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ipu: pass csi clock in platform data
Acked-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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In rotation case, we need to swap width and height in HW_PXP_OUTSIZE.
It can be done in PxP driver. However, since EPDC driver did this swap itself.
Here, just do so for V4L2 to make things easy to go.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add ePxP V4L2 output driver, which calls ePxP DMAEngine internally.
Support rotation, overlay, alpha-blending, colorkey, etc.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add MSL codes for PxP v4l2 device
Signed-off-by: Robby Cai <R63905@freescale.com>
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I2C transfer will be always fail if miss ack happen.
i2cdump will be fail after i2cdetect.
Reset i2c module when MISS ACK irq issue.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Add appropriate secondary clocks to the various clocks defined in mx50_clock.c.
This will enable correct clock management of many system level clocks.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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increase suspend vddio voltage to make suspend/resume more stable
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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add usb host1 clock gate for usb host1's phy clock
Signed-off-by: Huhui <b29976@freescale.com>
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turn off PxP clock when PxP is inactive for about 4s.
turn on PxP clock when a new PxP task is submitted.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Update cpufreq table according to CZ data
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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In order to provide more flexibility to the user, the pan API should not
automatically trigger a full-screen panel update. No update will
be performed, and the user will have to submit a SEND_UPDATE to update
the screen after panning.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Network failure due to CSPI common code change, so needs to change
cpld_cspi mode, too.
Signed-off-by: Sammy He <r62914@freescale.com>
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The driver can not dump registers during probe time because
some clocks needed for register read/write are still not enabled
or the system may hang.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Due to the SDIO interrupt of esdhc is implemented in edge trigger
mode, the interrupt may be lost in some critical cases.
This may cause SDIO cards such as WiFi has the possiblity to hang
during a long-term transferring.
Using D3CD to manually driver the HW to re-sample the SDIO interrupt
on bus one more time to guarantee the SDIO interrupt signal sent
from card during the interrupt signal disabled period will not
be lost.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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add the ocotp module for Kconfig and Makefile.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Turn on the OCOTP driver for the update def_config(imx23/28/50).
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Add the ocotp device and ocotp clock for the ocotp controller.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Add a new driver for On-Chip OTP controller. The driver
will register all the register names of all the banks to /sys/.
You can use the following commands to manipulate the OTP banks:
read:
#cat HW_OCOTP_MAC0
write:
#echo 0x11223344 > HW_OCOTP_MAC0
Signed-off-by: Huang Shijie <b32955@freescale.com>
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implement low bus frequency mode in busfreq driver, and also
adjust setting of ccm register to achieve more power efficience
Signed-off-by: Shen Yong <b00984@freescale.com>
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fix suspend/wakeup warning message
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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The OTG driver will be loaded before usb host driver, at OTG driver
the usb host data structure can only be used after usb host driver
finishes initialization.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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If IPU clock is disabled, enable it when configuring the CSI module.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Crash averted by preventing the case where a NULL string (representing
the panel selected via command line) is passed through strcmp().
If no command line panel selected, the default will be the first panel
defined in the platform data (the 6.0" E Ink panel for MX50 ARM2).
Signed-off-by: Danny Nold <dannynold@freescale.com>
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This patch fixes the malfunction of WVGA LCD panel.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Fix the compile error
Signed-off-by: William Lai <b04597@freescale.com>
(cherry picked from commit 94fb7d07d6f3f23a697cb86f4446c84e354ca51e)
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Add support for 9.7" E Ink panel by adding default waveform
for the 9.7" panel.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Add support for 9.7" E Ink panel.
Expand driver support for multiple panels by storing platform data
containing all variable panel parameters. Removed hard-coded reg values
for 6" panel.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Shift panel definitions to platform code, and expand panel structure
to encapsulate all variable parameters for configuring the EPDC to drive
the panel.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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The usb system error can't be recoveried, So it is better having an
error message notice when this error occurs. For mx508, if the dma
buffer is the invalid address(usb subsystem can't visit this address),
There will be a system error interrupt, but the usb still will transfer data
to host, so the software needs to check usb dma buffer address.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Some usb clocks is only existed at mx51/mx53 SoC,
Add SoC judgement for clock use, in that case, it
will not print the warning message for non-exist clock
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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1. When the usb is not in use, the usb can be put into low power mode
(usb related clock are off, and phcd = 1)
2. When the usb is in low power mode, the usb wakeup irq can be triggered,
and let the usb return to normal mode
3. The flag device_can_wakeup(struct device *dev) is standing for the device
has(and will use) the abilities for waking up the whole system, not means
the device has the abilities for waking up itself.
4. During the pm process, wakeup is only needed to enable when the user
needs usb device to wakeup the whole system.
5. The initialization changes a little, for evk board is not connected to pc
as an example:
Loading the driver:
1. Clear phcd and Open clock
2. init usb registers
3. vbus is not valid, and go to low power mode
connect usb line to pc:
1. Wakeup irq happens
2. usb goes to normal mode
3. vbus irq happens(at the same interrupt)
4. set run_stop bit
5. enumeration begins
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Huhui <b29976@freescale.com>
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MX50 Z160 has higher gradient/texture precision than MX51/53.
Signed-off-by: Jie Zhou <b30303@freescale.com>
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MX50 has some RTL fix for Z160
Signed-off-by: Jie Zhou <b30303@freescale.com>
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The L2 Switch can get mac address from platform data.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
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Read mac address from fuse when L2-switch init.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
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add suspend/resume for LED driver
disable debug uart for suspend
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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