Age | Commit message (Collapse) | Author |
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With a valid master clock and power down/reset GPIO correctly
specified the sensor is detectable via I2C. However, the sensor
driver does not work with the i.MX8QM camera stack yet, further
investigations are needed.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Add GPIO fan/backlight for Apalis iMX8. Enable USB camera support.
Also enable configs relevant for MIPI CSI2 camera (OV5640) support,
but this needs further changes to the driver to work with i.MX8QM.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Currently the master clock is missing hence the camera can not
work. Further investigations are needed.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Add support for the on-module USB HSIC hub.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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When using a GPIO which is high by default, and initialize the
driver in USB Hub mode, initialization fails with:
[ 111.757794] usb3503 0-0008: SP_ILOCK failed (-5)
The reason seems to be that the chip is not properly reset.
Probe does initialize reset low, however some lines later the
code already set it back high, which is not long enouth.
Make sure reset is asserted for at least 100us by inserting a
delay after initializing the reset pin during probe.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Use GPIO backlight driver and specify for BKL1_ON and BKL1_PWM
as a GPIO for now. There seem to be no driver for the LVDS PWM
currently.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Initial changes for Apalis iMX8QM. LVDS dual-channel full-HD
panel seems to work, HDMI seems to output signals but display
are not able to sync on the signal (or only after a long time,
displaying everything in a weired binned mode).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Currently a copy of fsl-imx8qm-lpddr4-arm2.dts to set boot
UART to LPUART1 and make Ethernet and SDHC work.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Change the flexspi0 AHB memory size to the correct 256M.
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 28799421c8846002dcb3949ef00038d073c7906b)
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Correct Copyright
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit ee0a9fbdca80b058c00d74c6afa70558f6c1dcc6)
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fix the pin conflict between nand and usdhc1 on imx8qxp validation
board.
BuildInfo:
- SCFW daea284c, IMX-MKIMAGE 90fbac1a, ATF
- U-Boot 2017.03-00713-g345bcc2
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit a966a9c4ceca41e604b7896d1689b2608afe5683)
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Although .startup() alreadly do transmit/receive fifo/buffer flush,
but switch the baud rate may introduce dirty data on fifo, in such
case, user will call tcflush() to clean up buffer and fifo. So driver
also ensure HW fifo is cleaned up.
The patch add hw fifo/buffer flush in .flush_buffer() callback.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Enable CONFIG_CPU_FREQ_STAT.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 36e02813604ceaf741081b3541825534bd5c8862)
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query the caps of dma, then update the hw parameters according
the caps. for EDMA can't support 24bit sample, but we didn't
add any constraint, that cause issues.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 4948f8320687a2c40d60ef51ea7d18d4d90882a2)
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update buswidth that is supported by sdma.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit ebbe845bef6937db4b1e14808dbb2eef664c91f5)
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The driver already supports DMA_DEV_TO_DEV in sdma_config(),
DMA_SLAVE_BUSWIDTH_2_BYTES and DMA_SLAVE_BUSWIDTH_1_BYTE in
sdma_prep_slave_sg(). So this patch adds them to the lists.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry-picked from commit f9d4a398f121b00f581da1428bff9b93d955452d)
(cherry picked from commit fe731cab86a2d3dc90016acc617a1b5c6b5eca23)
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Move AMIX SAIs MCLKs to AUD_PLL1 and double the frequency
in order to support 64k rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
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Move AMIX SAIs MCLKs to AUD_PLL1 and double the frequency
in order to support 64k rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
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CM4_1 core will use the UART2 on QM MEK base board as its console. Since this port currently
is a backup debug port on A core side, not really used. We disable it in dts to yield the port
for CM4_1.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
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Once irqsteer controller is power off during suspend, the registers
are lost, it should restore the registers after resume back.
BuildInfo:
- SCFW a479ff78, IMX-MKIMAGE ff9860c5, ATF 923651a
- U-Boot 2017.03-00691-g96cf020
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Pandy.gao <pandy.gao@nxp.com>
Acked-by: Pandy.gao <pandy.gao@nxp.com>
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enet pins dual voltage pads, bit[0] define the drive strength slection,
bit[4:1] are reserved, and bit[6:5] define the pull down and pull up.
The patch remove the reserved bits setting and pull up the pin.
BuildInfo:
- SCFW daf9431c, IMX-MKIMAGE 1c6fc7d8, ATF f2547fb
- U-Boot 2017.03-00097-gd7599cf
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Pandy.gao <pandy.gao@nxp.com>
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add the power domain for flexspi0 for iMX8QM/QXP in device tree.
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit cf058c941bddb7f81655cd069ede458b9b8b61fa)
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In FE-BE case, the constraint in BE cpu dai will propagate to FE.
and the rate constaint is set by .be_hw_params_fixup in dai_link for BE.
So rate constraint in BE cpu dai is not needed in FE-BE case.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 36d27fb19333d0b5e69286f3e85529ef4ee03ab7)
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add IMX8QM_ACM_AUD_CLK0_SEL and IMX8QM_ACM_AUD_CLK1_SEL for
asrc clock source. There is no clock gate for them, only
clock mux.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit f6d3c3ad9f534e1725d1c96b0086beeec44f04c6)
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In internal ratio mode, when the clock rate can't be divided with no
remainder, The final convert ratio is not as expected, there is distortion
in output data.
So need to select a proper clock source for this mode, if can't find a good
clock source, then swith to ideal ratio mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 3be302e598f41e7edfc93b820453cff5fed27b1a)
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When play the mono stream, there is no data in right channel,
but if config the pin IO in pull up or pull down state, the codec
can get no zero data in right channel, then user can hear noise.
config the pin in no pull state to fix the noise issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit ea8e8f3d4d79827fb5fca9053c48a29d0f7acb9d)
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Addresses the PLL lock issue found on many devices.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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Add fsl-imx8qm-lpddr4-arm2-dp.dts for display port only.
Move hdmi sound propriety from fsl-imx8qm-lpddr4-arm2.dts
to fsl-imx8qm-lpddr4-arm2-dp.dts because hdmi sound should
enable with hdmi driver.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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-Add global static variable fw_run to check fw running state.
HDMI FW should init once when system bootup.
-Support hotplug detect thread exit when hdmi unbind.
-Remove unused functions.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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Since we have 64bit processors running imx-drm, we should support
32bit ioctrls for them.
Reported-by: Ivan Liu <xiaowen.liu@nxp.com>
Tested-by: Ivan Liu <xiaowen.liu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 98699db62b211b24f9a5cccc7cefcc54d40249cc)
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i.MX8MQ EVK RevA0/A1 board PCIe M.2 rework for 1CQ WIFI has
pin conflict with usdhc2 node, so disable the node in the extended
dts file. But for EVK RevB1/B2 board, there have no pin conflict
with usdhc1 node.
The change drop RevA0/A1 board PCIe M.2 WIFI support, and only support
RevB1/B2 or later boards. Then usdhc2 can work now.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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need release user memory before close the drmfb handle,
there is no galcore kernel interface for immediate free.
add new interface to release the user memory by force,
[ 112.487090] [<ffff0000081748c0>] free_contig_range+0xa0/0xc0
[ 112.492757] [<ffff0000081d944c>] cma_release+0x94/0xc0
[ 112.497900] [<ffff0000085e344c>]
dma_release_from_contiguous+0x2c/0x38
[ 112.504432] [<ffff000008095ab8>]
__dma_free_coherent.isra.14+0x50/0xb8
[ 112.510962] [<ffff000008095b7c>] __dma_free+0x5c/0x90
[ 112.516022] [<ffff0000085c56b4>] drm_gem_cma_free_object+0xa4/0x130
[ 112.522293] [<ffff0000085a6384>] drm_gem_object_free+0x1c/0x58
[ 112.528130] [<ffff0000085a646c>]
drm_gem_object_unreference_unlocked+0x54/0x130
[ 112.535445] [<ffff0000085a65c0>]
drm_gem_object_handle_unreference_unlocked+0x60/0xb0
[ 112.543281] [<ffff0000085a6664>]
drm_gem_object_release_handle+0x54/0x90
[ 112.549989] [<ffff0000083c085c>] idr_for_each+0xb4/0x118
[ 112.555304] [<ffff0000085a73cc>] drm_gem_release+0x24/0x38
[ 112.560794] [<ffff0000085a62dc>] drm_release+0x28c/0x318
[ 112.566111] [<ffff0000081df344>] __fput+0x8c/0x1d0
[ 112.570906] [<ffff0000081df4ec>] ____fput+0xc/0x18
[ 112.575705] [<ffff0000080d7e84>] task_work_run+0xc4/0xe0
[ 112.581020] [<ffff0000080c0770>] do_exit+0x2d0/0x970
[ 112.585988] [<ffff0000080c0e78>] do_group_exit+0x38/0xa0
[ 112.591306] [<ffff0000080caf8c>] get_signal+0x1f4/0x508
[ 112.596536] [<ffff000008087970>] do_signal+0x70/0x550
[ 112.601591] [<ffff000008088080>] do_notify_resume+0x90/0xb0
[ 112.607168] [<ffff000008082ddc>] work_pending+0x8/0x10
Date: Nov 14, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Reviewed-by: Prabhu Sundararaj <prabhu.sundararaj@nxp.com>
Reviewed-by: Yuchou Gan <yuchou.gan@nxp.com>
(cherry picked from commit 13f3690155c522918c8b4e33339429d15fce30e6)
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need remove IMX8_SCU_CONTROL to include busfreq-imx.h
Date: Nov 15, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 5e6ac748e1b8ef40d189d50b4231fab0da3b816a)
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Since 4.1, linux kernel has dropped CONFIG_PM_RUNTIME macro. And
CONFIG_PM is used instead. GPU driver should be synced with the change.
Date Feb 22, 2016
Signed-off-by: Shawn Xiao <b49994@freescale.com>
(cherry picked from commit 51e52f5fd866cd8957e2ab6a5474bd3c15685f6a)
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We need to set driver data to NULL when we bailout from ->bind(),
otherwise it would be leaked to the system power management operations
and cause invalid driver data being used there.
Reported-by: Anson Huang <Anson.Huang@nxp.com>
Fixes: 54db5decce17 ("drm/imx: drop deprecated load/unload drm_driver ops")
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit a4562fba7d324ae450824fc25e70f11f1133ef66)
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The system power management operations should get correct driver data
before going on to further handling. When the component is unbinded,
driver data should be set to NULL so that the system power management
may be bypassed(return early). This way, we may prevent the system power
management from using any invalid driver data.
Fixes: 915ac0ad7369 ("MLK-16581-7 drm/imx: ldb: Add system power management support")
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit c7aeac017eeffe97df2506314d7647e2364185d1)
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Delete #ifdef CONFIG_PM_SLEEP statement which
lead to build error.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
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Messages in ISI irq handler are for debugging, so
change printk to dev_dbg for this purpose.
The width and height of image information need output
in debug process.
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
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Add power manager suspend and resume support for ISI
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
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Add mipi_csi power manager suspend and resume support.
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
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Add DTS for 4 displays: 2 LVDS with it6263 and 2 MIPI with adv7535.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
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Enable the Raydium RM67171 drm panel driver as built-in in defconfig.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Enable the MIPI-DSI to RM67191 OLED display panel path on the MX8QXP MEK
board.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Enable the MIPI-DSI to RM67191 OLED display panel path on the MX8QXP
LPDDR4 board.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Enable the MIPI-DSI to RM67191 OLED display panel path on the MX8QM
LPDDR4 development board.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Add support for the OLED display based on MIPI-DSI protocol from Raydium:
RM67191.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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