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add optional property devicetree for SPI slave nodes
into devicetree so that LSB mode can be enabled by devicetree.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit cd6339e6ced387ad67b5551dd2931cfd7e8b970b)
(cherry picked from commit 09623c20b3e6b11a914343d4b0f15b63e683f0d8)
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Support for Wake-on-LAN using Magic Packet. ENET IP supports sleep mode
in low power status, when system enter suspend status, Magic packet can
wake up system even if all SOC clocks are gate. The patch doing below things:
- flagging the device as a wakeup source for the system, as well as
its Wake-on-LAN interrupt
- prepare the hardware for entering WoL mode
- add standard ethtool WOL interface
- enable the ENET interrupt to wake us
Tested on i.MX6q/dl sabresd, sabreauto boards, i.MX6SX arm2 boards.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Document the device tree binding for the WM8960 codec, and modify the
driver to extract the platform data from device tree, if present.
Signed-off-by: Zidan Wang <b50113@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit e2280c9040d8bc5039617af35ccf7b8ac4abb428)
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- imx6sx pcie phy has its own power regulator. Add the
pcie phy power suppy into im6sx pcie dts and binding.
- in order to align with imx6qdl's pcie dts, re-format
imx6sx pcie dts.
- in order to align with imx6qdl pcie dts format and
keep clean of imx6 pcie driver, keep the pcie phy clock
in imx6sx pcie dts, although it's the parent clk of the
pcie bus clock now, and would be enabled automatically
when pcie bus clock is enabled. secondly, it's
possible that the external osc maybe used as source
of the pcie_bus clk in board design in future.
- disp_axi clock is required by pcie inbound axi port.
Add one more clock named pcie_inbound_axi for imx6sx pcie.
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
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This allows to explicitly specify the covered bus numbers in the
devicetree, which will come in handy once we see a SoC with more than one
PCIe host controller instance.
Previously the driver relied on the behavior of pci_scan_root_bus() to fill
in a range of 0x00-0xff if no valid range was found. We fall back to the
same range if no valid DT entry was found to keep backwards compatibility,
but now do it explicitly.
[bhelgaas: use %pR in error message to avoid duplication]
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Pratyush Anand <pratyush.anand@st.com>
Acked-by: Mohit Kumar <mohit.kumar@st.com>
(cherry picked from commit 4f2ebe00597c44f7dc6f88a052a2981ddcf6a0b6)
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Add support for PCIe controller in DRA7xx. This driver re-uses the
designware core code that is already present in kernel.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Mohit Kumar <mohit.kumar@st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit 47ff3de911a728cdf9ecc6ad777131902cff62b4)
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The configuration address space has so far been specified in *ranges*,
however it should be specified in *reg* making it a platform MEM resource.
Hence used 'platform_get_resource_*' API to get configuration address space
in the designware driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Mohit Kumar <mohit.kumar@st.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit 4dd964df36d0e548e1806ec2ec275b62d4dc46e8)
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The glue around the core designware IP is significantly different between
the Exynos and i.MX implementation, which is reflected in the DT bindings.
This changes the i.MX6 binding to reuse as much as possible from the common
designware binding and removes old cruft.
I removed the optional GPIOs with the following reasoning:
- disable-gpio: endpoint specific GPIO, not currently wired up in any code.
Should be handled by the PCI device driver, not the host controller
driver.
- wake-up-gpio: same as above.
- power-on-gpio: No user in any upstream DT. This should be handled by a
regulator which shouldn't be controlled by the host driver, but rather by
the PCI device driver.
[bhelgaas: whitespace fixes]
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit 1db823ee9f677e1a863cd04fda391a7520fcd0e8)
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ARM based ST Microelectronics's SPEAr1310 and SPEAr1340 SOCs have onchip
designware PCIe controller. To make that usable, this patch adds a wrapper
driver based on existing designware driver.
Adds bindings for this new driver and update MAINTAINERS as well.
Cc: linux-pci@vger.kernel.org
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Mohit Kumar <mohit.kumar@st.com>
[viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
(cherry picked from commit 51b66a6ce12570e5ee1a249c811f7f2d74814a43)
Conflicts:
MAINTAINERS
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Add support for a generic PCI host controller, such as a
firmware-initialised device with static windows or an emulation by
something such as kvmtool.
The controller itself has no configuration registers and has its address
spaces described entirely by the device-tree (using the bindings from
ePAPR). Both CAM and ECAM are supported for Config Space accesses.
Add corresponding documentation for the DT binding.
[bhelgaas: currently uses the ARM-specific pci_common_init_dev() interface]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
(cherry picked from commit ce292991d88b77160f348fb8a3a2cf6e78f4b456)
Conflicts:
drivers/pci/host/Kconfig
drivers/pci/host/Makefile
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Implement machine driver for mqs, which use the sai as cpu dai.
sai work on master mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit cac9eb41debc6444d753dc936cdf76874260b9e4)
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Implement codec driver for mqs. mqs is a very simple IP. which support:
Word length: 16bit.
DAI format: Left-Justified, slave mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 9da6bdd2072b850e9bb910512123eff7d80a0e2f)
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The previous patch (ASoC: fsl_sai: Add asynchronous mode support) added
new Device Tree bindings for Asynchronous and Synchronous modes support.
However, these two shall not be present at the same time.
So this patch just simply makes them exclusive so as to avoid incorrect
Device Tree binding usage.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit ce7344a4ebabe90e064d3e087727f45624cdc942)
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SAI supports these operation modes:
1) asynchronous mode
Both Tx and Rx are set to be asynchronous.
2) synchronous mode (Rx sync with Tx)
Tx is set to be asynchronous, Rx is set to be synchronous.
3) synchronous mode (Tx sync with Rx)
Rx is set to be asynchronous, Tx is set to be synchronous.
4) synchronous mode (Tx/Rx sync with another SAI's Tx)
5) synchronous mode (Tx/Rx sync with another SAI's Rx)
* 4) and 5) are beyond this patch because they are related with another SAI.
As the initial version of this SAI driver, it supported 2) as default while
the others were totally missing.
So this patch just adds supports for 1) and 3).
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 08fdf65e37d560581233e06a659f73deeb3766f9)
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add snvs power key driver since ic team has fix some issues of SNVS on i.mx6sx
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 3d259d1673fe9d14251f65871b77f80b0d779a22)
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Adds chipidea to the list of DT vendor prefixes.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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TPL (Targeted Peripheral List) is needed for targets host
(OTG and Embedded Hosts) for usb certification and other
vendor specific requirements.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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fsl,usbphy is no optional property. This patch moves it to the list of
required properties.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This adds Vybrid VF610 SoC support. The IP is very similar to i.MX6,
however, the non-core registers are spread in two different register
areas. Hence we support multiple instances of the USB misc driver
and add the driver instance to the imx_usbmisc_data structure.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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When tried to enable OTG FSM, we need to rebuild both kernel Image
and modules, since there are some codes at gadget modules which are
controlled by related configurations.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This patch adds a file chipidea.txt for how to demo chipidea usb OTG HNP and SRP
functions via sysfs input files, any other possible information should be
documented for chipidea usb driver in future can be added into this file.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This patch adds sysfs interface description for chipidea USB OTG HNP and SRP.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This patch makes it possible to set the chipidea udc into full-speed only mode.
It is set by the oftree property "maximum-speed = full-speed".
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add compatible string for imx6sx-usbphy.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Conflicts:
Documentation/devicetree/bindings/usb/mxs-phy.txt
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This adds support for the USB PHY in Vybrid VF610. We assume that
the disconnection without VBUS is also needed for Vybrid.
Tests showed, without MXS_PHY_NEED_IP_FIX, enumeration of devices
behind a USB Hub fails with errors:
[ 215.163507] usb usb1-port1: cannot reset (err = -32)
[ 215.170498] usb usb1-port1: cannot reset (err = -32)
[ 215.185120] usb usb1-port1: cannot reset (err = -32)
[ 215.191345] usb usb1-port1: cannot reset (err = -32)
[ 215.202487] usb usb1-port1: cannot reset (err = -32)
[ 215.207718] usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
[ 215.219317] usb usb1-port1: unable to enumerate USB device
Hence we also enable the MXS_PHY_NEED_IP_FIX flag.
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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The current imx-sgtl5000 driver always attaches the cpu-dai to ssi while
in fact it could be attached to other cpu-dais like SAI. Thus this patch
use a general code to support another cpu-dai. And meanwhile update the
devicetree for i.MX6 Series.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit cb5dfaf44d2fdbce4329c2e4762e8450c8cd3b3c)
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The current imx-wm8962 machine driver is designed for SSI as CPU DAI only
while as its name we should make the driver more generic to any other CPU
DAI on i.MX serires -- ESAI, SAI for example.
So this patch makes the driver more general so as to support those non-SSI
cases.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit b6fca438dde1b4c0bbdee31729871d601f287dc9)
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There're two GPIOs connected to the headphone jack and microphone jack,
thus add the states detection.
Reviewed-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit f85ca1dd664178328bd813651e91d612787b6926)
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This patch adds SAI script support to imx-sdma.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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The new Solo X has more requirements for SDMA events. So it creates a event mux
to remap most of event numbers in GPR (General Purpose Register). If we want to
use SDMA support for those module who do not get the even number as default, we
need to configure GPR first.
Thus this patch adds this support of GPR event remapping configuration to the
SDMA driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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This patch update fec devicetree binding doc that add Optional
properties "fsl,num-tx-queues" and "fsl,num-rx-queues".
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This adds support for specifying the phy to be used with the fec in the
devicetree using the standard phy-handle property and also supports
fixed-link.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Some Ethernet MACs have a "fixed link", and are not connected to a
normal MDIO-managed PHY device. For those situations, a Device Tree
binding allows to describe a "fixed link" using a special PHY node.
This patch adds:
* A documentation for the fixed PHY Device Tree binding.
* An of_phy_is_fixed_link() function that an Ethernet driver can call
on its PHY phandle to find out whether it's a fixed link PHY or
not. It should typically be used to know if
of_phy_register_fixed_link() should be called.
* An of_phy_register_fixed_link() function that instantiates the
fixed PHY into the PHY subsystem, so that when the driver calls
of_phy_connect(), the PHY device associated to the OF node will be
found.
These two additional functions also support the old fixed-link Device
Tree binding used on PowerPC platforms, so that ultimately, the
network device drivers for those platforms could be converted to use
of_phy_is_fixed_link() and of_phy_register_fixed_link() instead of
of_phy_connect_fixed_link(), while keeping compatibility with their
respective Device Tree bindings.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The patch adds the basic CAN TX/RX function support for Bosch M_CAN controller.
For TX, only one dedicated tx buffer is used for sending data.
For RX, RXFIFO 0 is used for receiving data to avoid overflow.
Rx FIFO 1 and Rx Buffers are not used currently, as well as Tx Event FIFO.
Due to the message ram can be shared by multi m_can instances
and the fifo element is configurable which is SoC dependant,
the design is to parse the message ram related configuration data from device
tree rather than hardcode define it in driver which can make the message
ram using fully transparently to M_CAN controller driver,
then we can gain better driver maintainability and future features upgrade.
M_CAN also supports CANFD protocol features like data payload up to 64 bytes
and bitrate switch at runtime, however, this patch still does not add the
support for these features.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit a0dd1cb47d5792902eb380b70af292b4ba64d4b0)
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Starting from IMX6, the flexcan stop mode control bits is SoC specific,
move it out of IP driver and parse it from devicetree.
It's good from maintain perspective and can avoid adding too many SoC
specifi bits in driver but with no IP changes when the IMX SoC series
keep growing.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 97b99b59c9f09d58ea35f3c0cf58665c20f2e292)
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If wakeup is enabled, enter stop mode, else enter disabled mode.
Self wake can only work on stop mode.
For imx6q, the stop request has to be mannually assert on
IOMUX GPR13[28:29] register, we use syscon to control that bit.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 7f8ef8eeb2bd93d75eb4c970bcaabcfd499d348d)
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Add gpios for tranceiver control.
Before we have a common tranceiver binding, we use this way first.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit f50c22920fc26c6895afd3795dc1200235ca8cfd)
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The hip04 SoC of hisilicon has an AHCI compliant SATA controller,
and it is compliant with the ahci 1.3 and sata 3.0 specification.
There is a wrong bit in HOST_CAP of hip04 sata controller, which
enable unsupported feature of FBS, use AHCI_HFLAG_NO_FBS hflag to
disable it.
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Kefeng Wang <kefeng.wang@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit a1a205df6ee224f62c6d21cedebcb723db17fe0d)
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The Marvell Armada 380 SoC includes two AHCI compatible
interfaces. However, like all DMA-capable Marvell interface, they
require special handling to configure MBus windows. Therefore, this
commit adds a new ahci_mvebu driver, which relies on the
libahci_platform.c code recently introduced.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit a3464ed2f14d19ba923930f7c0c284499d64eb5b)
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The ahci-platform.txt Device Tree binding documentation is gaining a
growing number of compatible strings, and it will gain one more with
the addition of the Marvell Armada 380 AHCI support. It is therefore
time to reformat this list into a proper bullet list, and more
importantly order it alphabetically;
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 5799d6d4cf86c11503aee909a1ec555453c7f22a)
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The ahci_platform driver supports "snps,dwc-ahci".
Add this to the DT binding information.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 42a7f53ba0f2baa2ea23cd830511cea7f8612dd2)
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This avoids the ugliness of creating a nested platform device from probe.
While moving it around anyways, move the mk6q phy init code from probe
to imx_sata_enable, as the phy needs to be re-initialized on resume too,
otherwise the drive won't be recognized after resume.
Tested on a wandboard i.mx6 quad.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 90870d79d4f28711610dd2e72d8fa616c922d110)
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This patch adds support for the ahci sata controler found on Allwinner A10
and A20 SoCs to the ahci_platform driver.
Orignally written by Olliver Schinagl using the approach of having a platform
device which probe method creates a new child platform device which gets
driven by ahci_platform.c, as done by ahci_imx.c .
Refactored by Hans de Goede to add most of the non sunxi specific functionality
to ahci_platform.c and use a platform_data pointer from of_device_id for the
sunxi specific bits.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit c5754b5220f01e8722799d35c04a76e82c62d7d8)
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 4b3e603a298db26c6c37e8b08adcce24d014df13)
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The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the
imx AHCI controller needs 3 clocks to be enabled.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 156c5887948cd191417f18026aab9ce26e5a95da)
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support pfuze200 chip which remove SW1C and SW4 based on pfuze100.
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f2518480c7b744296a5587990a54e3a284d932b8)
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Add EETI egalax touch screen for i.MX6sx-sdb board in the
new branch 3.14.y.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Some gpio-leds need retain the state even in suspend, such as charger led.
But this property missed in devicetree, add it.
(cooloney@gmail.com: fold DT binding updates into this patch)
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
(cherry picked from commit 4270a78d23eece0b25a13bff1e71d114ec547de4)
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Port si476x machine dirver for i.MX series SoC and binding doc from imx_3.10.y
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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Port the cs42888 machine driver from imx_3.10.y and do update according to
new esai driver and asrc driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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