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2013-04-15ARM: dts: mvebu: introduce internal-regs nodeGregory CLEMENT
Introduce a 'internal-regs' subnode, under which all devices are moved. This is not really needed for now, but will be for the mvebu-mbus driver. This generates a lot of code movement since it's indenting by one more tab all the devices. So it was a good opportunity to fix all the bad indentation. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15ARM: dts: mvebu: Convert all the mvebu files to use the range propertyGregory CLEMENT
This conversion will allow to keep 32 bits addresses for the internal registers whereas the memory of the system will be 64 bits. Later it will also ease the move of the mvebu-mbus driver to the device tree support. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15ARM: dts: mvebu: move all peripherals inside socThomas Petazzoni
reorganize the .dts and .dtsi files so that all devices are under the soc { } node (currently some devices such as the interrupt controller, the L2 cache and a few others are outside). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15Merge tag 'tags/soc_for_v3.10' into mvebu/dtJason Cooper
Pulling in mvebu branches which contain changes to armada*.dts? files for LPAE conversion. mvebu soc changes for v3.10 - use the mvebu-mbus driver - prep for LPAE support Depends: - mvebu/cleanup (tags/cleanup_for_v3.10) - mvebu/drivers (tags/drivers_for_v3.10)
2013-04-15Merge tag 'tags/mvebu_fixes_for_v3.9_round3' into mvebu/dtJason Cooper
pulling in mvebu branches which changes armada*.dts? files for LPAE changes mvebu fixes for v3.9 round 3 - Kirkwood - a couple of small fixes for the Iomega ix2-200 board (ether and led) - mvebu - allow GPIO button to work on Mirabox when running SMP
2013-04-15arm: mach-mvebu: convert to use mvebu-mbus driverThomas Petazzoni
The changes needed to migrate the mach-mvebu (Armada 370 and Armada XP) to the mvebu-mbus driver are fairly minimal, since not many devices currently supported on those SoCs use address decoding windows. The only one being the BootROM window, used to bring up secondary CPUs. However, this BootROM window needed for SMP brings an important requirement: the mvebu-mbus driver must be initialized at the ->early_init() time, otherwise the BootROM window cannot be setup early enough to be ready before the secondary CPUs are started. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-11ARM: mvebu: Add Device Bus support for Armada 370/XP SoCEzequiel Garcia
Armada 370 and Armada XP SoC have a Device Bus controller to handle NOR, NAND, SRAM and FPGA devices. This patch adds the device tree node to enable the controller. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-08arm: mvebu: fix address-cells in mpic DT nodeThomas Petazzoni
There is no need to have a #address-cells property in the MPIC Device Tree node, and more than that, having it confuses the of_irq_map_raw() logic, which will be used by the Marvell PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-08arm: mvebu: Reduce reg-io-width with UARTsHeikki Krogerus
Setting the reg-io-width to 1 byte represents more accurate description of the HW. This will fix an issue where UART driver causes kernel panic during bootup. Gregory CLEMENT traced the issue to autoconfig() in 8250.c, where the existence of FIFO is checked from UART_IIR register. The register is now read as 32-bit value as the reg-io-width is set to 4-bytes. The retuned value seems to contain bogus data for bits 31:8, causing the issue. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28arm: mvebu: Add support for SPI controller in Armada 370/XPEzequiel Garcia
The Armada 370 and Armada XP SoC has an SPI controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Note that the Armada XP SPI register length is 0x50 bytes, while Armada 370 SPI register length is 0x28 bytes, so we choose the smaller of the two. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28arm: mvebu: update DT to support local timersGregory CLEMENT
Now that the time-armada-370-xp support local timers, updated the device tree to take it into account. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28arm: mvebu: Add support for USB host controllers in Armada 370/XPEzequiel Garcia
The Armada 370 and Armada XP SoC has an Orion EHCI USB controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28arm: mvebu: add DT information for the SDIO interface of Armada 370/XPThomas Petazzoni
Now that the mvsdio MMC driver has a Device Tree binding, we add the Device Tree informations to describe the SDIO interface available in the Armada 370/XP SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28arm: mvebu: Add RTC support for Armada 370 and Armada XPGregory CLEMENT
The Armada 370 and Armada XP Socs have the same controller that the one used in the orion platforms. This patch updates the device tree for these SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <florian@openwrt.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driverGregory CLEMENT
The UART controller used in the Armada 370 and Armada XP SoCs is the Synopsys DesignWare 8250 (aka Synopsys DesignWare ABP UART). The improper use of the ns16550 can lead to a kernel oops during boot if a character is sent to the UART before the initialization of the driver. The DW APB has an extra interrupt that gets raised when writing to the LCR when busy. This explains why we need to use dw-apb-uart driver to handle this. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-11-24Merge branch 'mvebu-misc-fixes' of ↵Jason Cooper
git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything
2012-11-22Merge tag 'marvell-armadaxp-smp-for-3.8' of ↵Thomas Petazzoni
github.com:MISL-EBU-System-SW/mainline-public into mevbu-dt-additions SMP support for Armada XP The purpose of this series is to add the SMP support for the Armada XP SoCs. Beside the SMP support itself brought by the last 3 commits, this series also adds the support for the coherency fabric unit and the power management service unit. The coherency fabric is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This unit is also available for Armada 370 and will be used in an incoming patch set for hardware I/O cache coherency. The power management service unit is responsible for powering down and waking up CPUs and other SOC units. Conflicts: arch/arm/mach-mvebu/armada-370-xp.c
2012-11-22Merge branch 'for-jason-1/cleanup' into mevbu-dt-additionsThomas Petazzoni
2012-11-22Merge tag 'marvell-openblocks-i2c-sata-for-3.8' of ↵Jason Cooper
git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything Marvell SATA and I2C enabling for OpenBlocks AX3-4
2012-11-21ARM: mvebu: Add support for I2C controllers in Armada 370/XPNobuhiro Iwamatsu
The Armada 370 and Armada XP have the same I2C controllers as previous Marvell SoCs, so the existing mv64xxx-i2c driver works fine. [Thomas Petazzoni: updated on top of other Armada 370/XP changes, rephrased the commit log]. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-21Merge tag 'marvell-hwiocc-for-3.8' of ↵Jason Cooper
git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything Add hardware I/O coherency support for Armada 370/XP The purpose of this patch set is to add hardware I/O Coherency support for Armada 370 and Armada XP. Theses SoCs come with an unit called coherency fabric. A beginning of the support for this unit have been introduced with the SMP patch set. This series extend this support: the coherency fabric unit allows to use the Armada XP and the Armada 370 as nearly coherent architectures. The third patches enables this new feature and register our own set of DMA ops, to benefit this hardware enhancement. The first patches exports a dma operation function needed to register our own set of dma ops. The second patch introduces a new flag for the address decoding configuration in order to be able to set the memory windows as shared memory.
2012-11-21Merge tag 'marvell-armadaxp-smp-for-3.8' of ↵Jason Cooper
git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything SMP support for Armada XP The purpose of this series is to add the SMP support for the Armada XP SoCs. Beside the SMP support itself brought by the last 3 commits, this series also adds the support for the coherency fabric unit and the power management service unit. The coherency fabric is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This unit is also available for Armada 370 and will be used in an incoming patch set for hardware I/O cache coherency. The power management service unit is responsible for powering down and waking up CPUs and other SOC units.
2012-11-21arm: mvebu: Add hardware I/O Coherency supportGregory CLEMENT
Armada 370 and XP come with an unit called coherency fabric. This unit allows to use the Armada 370/XP as a nearly coherent architecture. The coherency mechanism uses snoop filters to ensure the coherency between caches, DRAM and devices. This mechanism needs a synchronization barrier which guarantees that all the memory writes initiated by the devices have reached their target and do not reside in intermediate write buffers. That's why the architecture is not totally coherent and we need to provide our own functions for some DMA operations. Beside the use of the coherency fabric, the device units will have to set the attribute flag of the decoding address window to select the accurate coherency process for the memory transaction. This is done each device driver programs the DRAM address windows. The value of the attribute set by the driver is retrieved through the orion_addr_map_cfg struct filled during the early initialization of the platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Yehuda Yitschak <yehuday@marvell.com> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-11-21arm: mvebu: Add support for coherency fabric in mach-mvebuGregory CLEMENT
The Armada 370 and Armada XP SOCs have a coherency fabric unit which is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This patch provides the basic support needed for SMP. Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
2012-11-20arm: mvebu: add 'clocks' property to Ethernet nodes for Armada 370/XP SoCsThomas Petazzoni
The mvneta driver now understands a standard 'clocks' clock pointer property in the Device Tree nodes for the Ethernet devices, so we add the right clock reference for the different Ethernet ports of the Armada 370/XP SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20Merge tag 'marvell-boards-net-for-3.8' of ↵Thomas Petazzoni
github.com:MISL-EBU-System-SW/mainline-public into test-the-merge Marvell boards changes related to Ethernet, for 3.8 Conflicts: arch/arm/boot/dts/armada-370-xp.dtsi arch/arm/boot/dts/armada-xp-db.dts
2012-11-20arm: mvebu: SATA support: SoC-level DT data for Armada 370/XPGregory CLEMENT
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20clocksource: convert time-armada-370-xp to clk frameworkGregory CLEMENT
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-16arm: mvebu: add Ethernet controllers using mvneta driver for Armada 370/XPThomas Petazzoni
The Armada 370 SoC has two network units, while the Armada XP has four network units. The first two network units are common to both the Armada XP and Armada 370, so they are added to armada-370-xp.dtsi, while the other two network units are specific to the Armada XP and therefore added to armada-xp.dtsi. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-14arm: mvebu: fix compatible string in armada-370-xp.dtsiThomas Petazzoni
All the Device Tree files for Armada 370 and XP SoCs and boards use the "armada-370-xp" common compatible string, except armada-370-xp.dtsi which was specifying "armada_370_xp". Fix this inconsistency by making armada-370-xp.dtsi declare a compatible string of "armada-370-xp" like everyone else. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-09-21arm: mvebu: add address decoding controller to the DTThomas Petazzoni
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-07-10arm: mach-mvebu: add support for Armada 370 and Armada XP with DTThomas Petazzoni
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32] [ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ] [ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic] [ben.dooks@codethink.co.uk: move mpic per-cpu register base ] [ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()] Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Yehuda Yitschak <yehuday@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com>
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