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This uses trigger-sources documented in commit 80dc6e1cd85fc ("dt-bindings:
leds: document new trigger-sources property") to specify USB ports. Such an
information can be used by operating system to setup LEDs behavior.
I updated dts files for 7 devices I own and I was able to test.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Such a trigger doesn't exist in Linux and is not needed as LED is being
turned off by default. This could cause errors in LEDs core code when
trying to set default trigger.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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It's preferred to have DT source files licensed under BSD compatible
license. All new BCM5301X DTS files use ISC so let's also relicense old
ones to it.
Except for me only Hauke was ever touched these files in his commit
9faa5960eef3 ("ARM: BCM5301X: add NAND flash chip description") and
commit bb1d8fba1965 ("ARM: BCM5301X: add NAND flash chip description for
Asus RT-AC87U").
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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The first 128 MiB of RAM can be accessed using an alias at address 0x0.
In theory we could access whole RAM using 0x80000000 - 0xbfffffff range
(up to 1 GiB) but it doesn't seem to work on Northstar. For some reason
(hardware setup left by the bootloader maybe?) 0x80000000 - 0x87ffffff
range can't be used. I reproduced this problem on:
1) Buffalo WZR-600DHP2 (BCM47081)
2) Netgear R6250 (BCM4708)
3) D-Link DIR-885L (BCM47094)
So it seems we're forced to access first 128 MiB using alias at 0x0 and
the rest using real base address + 128 MiB offset which is 0x88000000.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Every device tested so far got UART0 (at 0x18000300) working as serial
console. It's most likely part of reference design and all vendors use
it that way.
It seems to be easier to enable it by default and just disable it if we
ever see a device with different hardware design.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Use it to store BCM47094 specific properties/values and avoid repeating
them in device DTS files.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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This device uses BCH-1 instead of BCH-8. This fixes ECC errors and makes
NAND usable with brcmnand.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Commit 1b47b98acce2 ("ARM: BCM5301X: Add DT entry for SPI controller and
NOR flash") enabled SPI-NOR device on routers using serial flash only.
However there are also devices with two flash memories:
1) Small SPI attached flash used mostly for booting
2) Bigger NAND used mostly for storing firmware
On such devices we still need SPI-NOR e.g. to access NVRAM data.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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This allows reporting & debugging problems occurring early in the boot
process.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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There are few devices that have USB power controlled using GPIO. Linux
USB host driver (bcma-hcd) already supports this by reading vcc-gpio
from DT. Set it properly for all known devices.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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It's device based on BCM47094 which is quite similar to BCM4709 except
for higher CPU frequency. This device has 2 flash memories, it boots
from serial one and stores firmware on NAND. Other than that we define
standard stuff like LEDs, buttons and UART.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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