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- replace legacy wakeup property with 'wakeup-source'
- add "jedec,spi-nor" flash compatible binding
- fix lcd display id
- fixig typo for gpios
- use external wdog_b reset instead of issuing a sw reset
- add off-on-delay for usdhc vmmc-supply regulator on mx6sxscm
- add missing sai1 and wdog1 configs for mx6sxscm
- fix vgen6 regulator maximum microvolt for mx6dqscm
- disable CAAM since cannot coexist with LCDIF for mx6sxscm
- add the reg into the rpmsg node for mx6sxscm
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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From testing the performance is better when the voltage
for lpddr2 is set to 1.25V instead of 1.2V.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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The mmdc clk rate needs to be explicitly updated when moving to
high audio rate by the busfreq module for the i.mx6q lpddr2 systems.
In order to make the mmdc_ch0_axi clk visible by this driver, it
needs to be included on the clocks/clock-names list.
For the imx6dqscm-1gb-evb systems the clocks list for the busfreq
module is originally inherited from imx6q.dtsi. To include the mmdc
clk, the full clocks list plus the mmdc clk needs to be overwriten
on the individual dts files.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Signed-off-by: Leonard Crestez <dan-leonard.crestez@nxp.com>
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For some SD Ultra (40MB/s) the drive strength/speed settings
on the iomux ctrl pads for SD3 is not enougn causing some
error by transfering data as below:
mmcblk2: error -84 transferring data, sector 2250553, nr 151,
cmd response 0x900, card status 0x0
Updating the DSE and Speed on the pad ctrl fixes the issue.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Add support for SCM i.MX6DQ 1Gb Evaluation Board (EVB).
Support the next features for 1Gb EVB boards:
- Support for fix and interleave mode
- For fix mode additional dts are provided for:
- hdcp
- enetirq
- bluetooth and wifi for Murata ZP SDIO dongle
Signed-off-by: Alejandro Sierra <alejandro.sierra@nxp.com>
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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