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Set the max link capability of the imx pcie to gen2
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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On imx_4.9.y we no longer override the cpu arm/soc/pu-supply properties
to link to pmic directly but rather rely on the regulator core
propagating a set_voltage on a bypassed regulator upwards.
This change was already performance for imx6qdl, now do it for all the
boards using ldo-bypass.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
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Also, enable the mxcfb* entries.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
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On imx6qp sabresd rev b board, there is a standalone
external oscilator, used to provided the clks for
imx6qp pcie.
Add one regulator into pcie node, let the ext osc work.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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On i.MX6QP SabreSD board, AVDD supply is changed to VGEN6.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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In regulator implementation, the gpio power on is used
as the fixed regulator, it is already manipulated by
the regulator driver, and always enabled.
Remove the power on gpio in pcie dts
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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enable sata support on imx6qp sdb board.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit 8b08d0e657a121136eebe5bb6a998b7c9a6bff25)
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On i.MX6QP SabreSD board, VDDCORE is from PFuze's SW2, this
is different from i.MX6QDL SabreSD board, which is from SW1A/B.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
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The old driver strength of uSDHC clk pad of two slot can not work well
on the new imx6qp sabresd board because we can easily meet CRC errors
due to signal quality issue, especially with a SDIO card.
Enhance the driver strength of the CLK pad from 0x10059 to 0x10071
to avoid such issue
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
(cherry picked from commit 59a54039528cc2a7df30ee62e37bc47487c163e4)
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DOVDD ( GEN_1V8 ) is supplied by SW4 on i.MX6dqp-sabresd board
This patch corrects it.
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit 50f1b6782d3ee8644129f98caff12c183411230c)
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DOVDD ( GEN_1V8 ) is supplied by SW4 on i.MX6dqp-sabresd board
This patch corrects it.
Signed-off-by: Robby Cai <r63905@freescale.com>
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enable pcie support on imx6qp sd board
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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This patch enables the prefetch feature for the four mxcfbs.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch enables the two prefetch resolve gasket(PRG) engines on the
imx6qp-sabresd platform.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch enables the four prefetch engines on the imx6qp-sabresd platform.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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On imx6qp-sabresd LDO_ARM is connected to a different PMIC output than
the other imx6qdl-sabresd boards.
Setting cpu0 arm-supply to sw2_reg is wrong, this must have mistakenly
slipped out of the vendor tree where this is are used for LDO bypass.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This patch adds dts file for imx6qp-sabresd board.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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