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After MX6ULL DCP issue is fixed in commit 7a1cc1f, it introduces a new issue,
MX6SL will meet issue as no dcp clock is defined when initializing:
[ 3.061344] mxs-dcp 20fc000.dcp: can't identify DCP clk: -2
On mx6sl, dcp clock is always on, so the patch use dummy as dcp clock directly.
Signed-off-by: Quan Zhang <spring.zhang@nxp.com>
(cherry picked from commit 17717049a2a0a2248e30c421a0e0559a45ca59f3)
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SRTC needs to be kept enabled during system poweroff,
SNVS_LP control register bit 0 SRTC_ENV must be set
to enable RTC, for software poweroff, kernel just
read the register offset and value from dtb and write
to SNVS_LP control register to poweroff system, need
to make sure bit 0 SRTC_ENV is set to enable RTC during
system poweroff.
Previous setting did NOT enable it which will cause
RTC stop running if using software poweroff.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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This reverts commit ae6ff9c3bed3ee7285425d6d1a65eddad4fbc25f.
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
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This reverts commit b9701661db0cd332f98706182fe0f6ee07b17c31.
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PU can be dynamically turned off or on, so we need remove
"regulator-always-on" property.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit f3c0df15fbecce36cae531a4a919d544f9ea8e2a)
(cherry picked from commit ec113127f090c225dd731383b6fb950c02ae1f0b)
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The cause is EPDC works not stable if DISP mix is enabled.
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit db5b89bd35d259504da1c15d62f898f1291541e2)
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Add power-domains for display domain for imx6sl.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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ENGR00292341 imx6sl hwrng
Add hwrng support for i.MX6SL.
1. Add RNG driver. This driver originated as fsl-rngc.c. It
has been modified to support device tree. The name has been
changed since it supports both b and c variants of RNG.
2. Added clock and compatible info to the device tree data.
3. Added the entry in the options in the Kconfig for hwrng.
(cherry picked from commit 1f3f2c0647b7319c4e23293a61512e4191593513)
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14]
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
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- Delete regulator-always-on for 3p0 since it needs to enable/disable
on the fly.
- Add "anatop-enable-bit" property as the offset of enable bit for
3p0, 1p1, and 2p5.
- USB PHY refers "reg_3p0" phandle at its node.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit c2c2cbc46fda3e8ea798d270a3410f351af9d1ca)
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This patch cherry-pick from the below commit, but make little change:
align i.mx6dl with i.mx6q, since TKT238285 should be exit on other chips
although it can't reproduced by SPI-NOR, now there is official workaround
for this bug(a619a00e11a67b00805b9148f004a3c94d54f863). So this patch just
enable dma support on i.mx6sl and i.mx6sx.
*****************
There is one BUG(TKT238285) in ecspi module in DMA mode,but
it only found on i.mx6dl now, so enable dma support on all
i.mx6 chips except i.mx6dl
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit fa9ef1796819aadbb1ea184613d4fdd3de1b46c6)
(cherry picked from commit cfedad0e853fbcd5e57591b559734d54cdb782c8)
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This patch add mmc aliase support, to make every sd slot index
fixed.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Add the GPU configuration in the dtsi files for the above three SOCs.
date Oct 28, 2015
Signed-off-by: Shawn Xiao <b49994@freescale.com>
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Add epdc support on i.MX6SoloLite EVK board.
Add 'compatible', 'clocks' property in common imx6sl.dtsi
enable pxp, pmic, epdc in imx6sl-evk.dts
Signed-off-by: Robby Cai <r63905@freescale.com>
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Fix imx6/7 ocotp dts node.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add imx v4l2 capture driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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add ldo bypass support on i.mx6q/dl and i.mx6sl.
Signed-off-by: Robin Gong <b38343@freescale.com>
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add spdif sound card support for imx6sl-evk board
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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add ssi<->wm8962 sound card support for imx6sl-evk board
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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LDO2p5 cannot be disabled in low power idle mode when the USB driver
enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy
regulator that the USB driver will enable when VBUS wakeup is required.
This patch is copied from commit 7d849e4d9ebca3c as code the structure has
changed too many. directly cherry-pick has too many conflicts to resolve
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 25a42aeb8eeb0b894a70e1a0f6750ced39830a46)
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Add busfreq device node for imx6sl.
Signed-off-by: Bai Ping <b51503@freescale.com>
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There is a specific DMATYPE (IMX_DMATYPE_SSI_DUAL) for ssi
dual fifo mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 26fbde0839ec018d02fdb9c5b7c10808a583596a)
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit c3cd6268d80b4ea6a5ab88642e92f51f6ac56e51)
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Add pll1, pll1_bypass and pll1_bypass_src clock
reference define in dts file.
Signed-off-by: Bai Ping <b51503@freescale.com>
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- Add usbphy_nop, hsic uses nop phy driver
- Add anatop phandle, hsic needs to access anatop register to
change osc clock for different boards
- Add phy_type, hsic needs to config PHY parameters at portsc
- For imx6q-arm2 board, hsic has pin conflict with ethernet, we create a
dedicated dts(imx6q-arm2-hsic.dts) for it with ethernet disabled, besides
please make sure keep the line of data and strobe unchanged between board
boots up and enable hsic controller.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 2f8a266d271874cd398d14556752ab4ab0be27ba)
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Add anatop phandle at usbotg node to access anatop register.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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It can improve the USB performance when choosing larger
burst size at some systems (bus size is larger), there is
no side effect if this burst size is larger than bus size.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit b4a7b731d58708f71bf9c81d9274bf8527a47346)
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After setting ahb burst configuration as 0, we can increase tx/rx
burst size, it will improve the USB performance
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 6de7bfd9328d49f36d2876c80ea334c76848a112)
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Reserve iram space for low power code. The first 16KB space
is used for suspend/resume and cpuidle. Another 4KB space is
for busfreq code.
for i.MX6SX, it has a dedicated ocram space start at 0x8f8000
for low power code.
Signed-off-by: Bai Ping <b51503@freescale.com>
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snvs is MFP device. Change dts to use syscon to allocate register resource.
snvs power off also switch to common syscon-poweroff
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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It may be useful to disable the internal snvs-rtc when an external rtc is
available. This patch adds a label so that dts files can disable it.
Based on a patch from Markus Pargmann for imx6qdl.dtsi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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The PGC that is part of GPC controls isolation and power sequencing of the
power domains. The PU power domain will be handled by the generic pm domain
framework. It needs a phandle to the PU regulator to turn off power when
the domain is disabled and a list of clocks to be enabled during powerup
for reset propagation.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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The chipidea driver adds an extra line of spam to the log when a
host-only chipidea instance is left set to the default of a dual role
controller.
[ 2.010873] ci_hdrc ci_hdrc.1: doesn't support gadget
Set the dr_mode property to host on all the host-only nodes
to avoid this warning.
Signed-off-by: Matt Porter <mporter@konsulko.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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IMX6 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
BIG FAT WARNING: because the DTs were so far lying by not
exposing the fact that the GPC block is actually the first
interrupt controller in the chain, kernels with this patch
applied wont have any suspend-resume facility when booted
with old DTs, and old kernels with updated DTs won't even boot.
Tested-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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All chips of i.mx6 can be powered off by programming SNVS.
For example :
On i.mx6q-sabresd board, PMIC_ON_REQ connect with external
pmic ON/OFF pin, that will cause the whole PMIC powered off
except VSNVS. And system can restart once PMIC_ON_REQ goes
high by push POWRER key.
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Baud clock is used for bit clock generation in master mode. Ipg clock
is peripheral clock and peripheral access clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Add support for the "MX28LCD Seiko 4.3' WVGA" panel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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This patch adds simple-card support to the i.MX SoCs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Add thermal sensor support for i.MX6SL.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Since commit 98ea6ad2edd2 (ARM: dts: imx6: use imx51-ssi) the mx6 ssi is
compatible with imx51, so align all the mx6 variant ssi compatible strings as:
compatible = "fsl,<imx6-soc>-ssi", "fsl,imx51-ssi";
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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The SDMA on imx6sl and imx6sx is more compatible with imx6q one than
imx35. Let's use "fsl,imx6q-sdma" instead of "fsl,imx35-sdma", so that
SDMA ROM script on imx6sl and imx6sx can work for audio driver just like
the case of imx6q.
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Robin Gong <yibin.gong@freescale.com>
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When booting a board that does not have a keypad (such as imx6q-sabresd) the
following error is seen on boot:
imx-keypad 20b8000.kpp: OF: linux,keymap property not defined in /soc/aips-bus@02000000/kpp@020b8000
imx-keypad 20b8000.kpp: failed to build keymap
imx-keypad: probe of 20b8000.kpp failed with error -2
Let's disable the keypad functionality in the dtsi files and let each board dts
enable it when needed.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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imx6sl fec MDIO clock source is from ipg 66Mhz, but the currect imx6sl
device tree define it as "enet_ref" clock (50Mhz), so the patch just
corrects imx6sl dtsi fec "ipg" clock.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Add alias for FEC ethernet on i.MX to allow bootloaders (like U-Boot)
patch-in the MAC address for FEC using this alias.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Per bindings of fixed-clock, #clock-cells is a required property. Let's
add it for those fixed rate clocks.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Those two properties should have been set to zero, which
is the same as not specifying them.
Having address-cells set to 1 causes OF interrupt
mapping routines to add 1 to the interrupt-cells
property and as result fail because all calculations
are off by one.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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imx51-ssi and imx21-ssi are different IPs. imx51-ssi supports online
reconfiguration and needs this for correct interaction with SDMA. This
patch adds imx51-ssi before each imx21-ssi for all imx6 SoCs.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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i.MX6SL EVK board has a 3*3 keypad matrix to support 8 keypads,
enable them, the keymap is as below:
SW6: MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
SW7: MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
SW8: MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
SW9: MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
SW10: MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
SW11: MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
SW12: MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
SW13: MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add ocram device support on i.MX6SL.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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We need to use controller id to access different register regions
for mxs phy.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add anatop phandle for usbphy
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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