Age | Commit message (Collapse) | Author |
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This node will be used by the OCRAM driver in optee to:
* Get the OCRAM start address for power management in optee.
* Add an entry that will overwrite ocrams nodes and dynamically reduce
the OCRAM available for mmio-sram in Linux.
That way we do not touch the legacy Linux boot and remove the dedicated
optee device tree.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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According to the latest datasheet(Rev. 0.2, 11/2017), the
VDD_SOC_IN voltage can be set to 1.15V always, no constrain
between VDD_SOC_IN and VDD_ARM_IN, so change the voltage
of VDD_SOC_IN for 996MHz setpoint to 1.175V as other setpoints.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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According to the latest datasheet(Rev.0 4/2017), The voltage of
996MHz should be updated to 1.23V. For NXP's Pfuze PMIC chip, the
minimum voltage step is 25mV, we need to set the voltage of 996MHz
to 1.25V. In order to cover board tolerance and IR drop, we add
25mV margin. Then the 996MHz setpoint voltage is 1.275V.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 4d40b3a6149e53f60f3cc6a14da1f2ffc55efb8e)
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The GPT timer counter clock should be sourced from GPT_3M clock to avoid
counter clock frequency changed due to system bus clock changes.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Because i.mx6sll support mega_fast power off, sdma driver can sync
with i.mx6ul which support this feature. Modify compatible name
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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The imx6sll support eMMC HS400 mode, this patch default add HS400
mode support.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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In commit: b1a04e6ed63,(MLK-13413), the tempmon node is
wrongly disabled. so fix it in this patch.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Fix typo in compatible string.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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For imx6sll-evk board, if eMMC connected, all the pad of
eMMC should be fixed to 1.8v. Otherwise the current leakage
will pull up the VCCQ to 2.6v, which will impatch usdhc1
and usdhc3 SD3.0 voltage switch.
This patch set the LVE of pad SD2_RST and SD2_STROBE, and
config the vqmmc to fixed 1.8v, make sure the driver set
pad I/O voltage of usdhc2 fixed to 1.8v, not impact the
VCCQ which support usdhc1 and usdhc3 SD3.0 1.8v voltage.
And accord to IC suggestion, clock and strobe pad need to
config as pull-down. So change all the clock/strobe pad's
PUS to 0.
eMMC data4/5 has branch on evk board, which make the data
signal quality very bad, need to cut off these branch of
data4/5, this hardware rework is hard to do on all the evk
board. So currently HS400 do not enable, just support eMMC
HS200 mode.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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PWM driver expects two clocks, so correct it to meet this requirement.
Otherwise pwm can not work properly, neither does the backlight (using pwm1).
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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The initial version is wrong, fix it.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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Add Murata Type ZP (BCM4339) module support on i.MX6SLL platforms:
- i.MX6SLL EVK (SD3 slot + BT connector) + Murata adapter V2.0
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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Add busfreq device node for i.MX6SLL.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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According to datasheet Rev.B,06/2016 of i.MX6SLL. It has below
setpoints support:
996MHz 1.2V
792MHz 1.15V
396MHz 1.05V
198MHz 0.95V
We add a 25mV margin to cover the IR drop and board tolerance.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Add DCP and RNG node in imx6sll.dtsi to enable them.
Signed-off-by: ye li <ye.li@nxp.com>
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correct the base address for imx6sll CSI
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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enabled the wm8962 and spdif out.
There is pin conflict between spdif and usdhc2. So add
dedicate spdif dts.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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correct the clock name for pxp and enable pxp
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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The imx6sll is much like imx6ul, so add imx6ul compatible string for it.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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Add "fsl,imx6q-iomuxc-gpr" compatible string for i.MX6SLL.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add SD3 support, now can support SD3.0 card. Due to the WP pin
DNP, so SD3 slot do not support write protect feature.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Add SD1 slot support for SD3.0 card.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Add more properties to the clock node.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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On i.MX6SLL, there're no LDO_ARM, LDO_SOC and LOD_PU regulator,
so remove these device node.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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fix a typo of L2 cache device node.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Add i.MX6SLL dtsi file.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
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