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This reverts commit 511eacb77e74e9a23546b3afb0d2b2208eb4621c.
(cherry picked from commit ae8f31f4a7d78c8ff792cf2cf549b540f19488dc)
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Merge changes from Toradex Linux 4.9 BSP.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
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Add QoS node, which is needed to be set for EPDC.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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The resources retrieved by CAAM driver was wrong as the size
was not correct hence future uses might have issues.
before:
[ 3.010744] caam 30900000.caam:
sm res: [start: 0000000000100000,
end: 0000000000107ffe,
name: /caam-sm@00100000,
flags:0x200 desc:0x0] -> size: 0x7fff
modif to actual size:
[ 3.012495] caam 30900000.caam:
sm res: [start: 0000000000100000,
end: 0000000000107fff,
name: /caam-sm@00100000,
flags:0x200 desc:0x0] -> size: 0x8000
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Change the pcie phy region in dts accordingly.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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This node will be used by the OCRAM driver in optee to:
* Get the OCRAM start address for power management in optee.
* Add an entry that will overwrite ocrams nodes and dynamically reduce
the OCRAM available for mmio-sram in Linux.
That way we do not touch the legacy Linux boot and remove the dedicated
optee device tree.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Add the dma int for the the imx pcie ep mode for
the controllers that has the dma capability.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Add definition of CAAM page 0 in the device tree.
This page is only accessible by the CPU in secure world.
this is defined by the secure-status.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
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The octop node was defined in imx7s.dtsi but disabled. It is needed by
the fsl_otp driver.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
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Correct enet clock CCGR register offset.
CCGR6: IMX7D_ENET_AXI_ROOT_CLK (enet1 enet2 bus clocks)
CCGR112: IMX7D_ENET1_TIME_ROOT_CLK, IMX7D_ENET1_IPG_ROOT_CLK
CCGR113: IMX7D_ENET2_TIME_ROOT_CLK, IMX7D_ENET2_IPG_ROOT_CLK
IMX7D_ENET_PHY_REF_ROOT_DIV supply clock for PHY, no gate after the clock, its parent
clcok root has gate.
IMX7D_ENET1_REF_ROOT_DIV/IMX7D_ENET2_REF_ROOT_DIV supply clocks for enet IPG_CLK_RMII,
no gate after the clock, its parent clock root has gate.
IMX7D_PLL_ENET_MAIN_125M_CLK (anatop pll) supply clock for enet RGMII tx_clk.
Update copyright information.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
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add imx7d pcie phy node into 7d dts
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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We need to "logically" route interrupts through GPC instead of directly
through GIC in order to support low power mode with SCU and L2 off.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
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Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
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After testing, it can give the best performance.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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Add 1.2GHz setpoint for i.MX7D.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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It is missing at imx7d.dtsi, but used at source code.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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Add 'ipg' and 'axi' clocks for pxp which should
be used to control runtime power managments.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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JTAG, DS-5 attachment causes exceptions
Added properties to device tree, in order to enable and disable
alarms. The following are the available alarms:
-JTAG active
-WatchDOG 2 reset
-Internal Boot
-External Tamper Detection pad
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Since the cma setting has been moved to dts file. Add this partation to
7d dtsi to make cma pool building successful on 7d soc.
Signed-off-by: Shawn Xiao <b49994@freescale.com>
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There is a error in i.MX7D RM RevB.
Actually the register of SRC_MIPIPHY_RCR(src offset 0x28)
bit 1 for MIPI PHY Master Reset
bit 2 for MIPI PHY Slave Reset.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit 4f3128a79c023319c9e21690be866dc46a9d6816)
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Add LPSR GPR node to support LPSR mode on i.MX7D.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Fix imx6/7 ocotp dts node.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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enable pcie support on imx7d platforms.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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Add mipi phy regulator notify callback to power on or power off this
phy along with the regulator enable/disable called. This will be used
by mipi dsi/csi later.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
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- enable rpmsg on imx7d platforms
- since there are some modules conflictions between A# and m4,
add new *-m4.dts files, that used when m4 core is kicked off.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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Add new SoC i.MX7D dtsi and pinfunc head file.
Signed-off-by: Anson Huang <b20788@freescale.com>
[Leonard: Remove dma-apbh node, upstream has a better option]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
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[ Upstream commit 538d6e9d597584e80514698e24321645debde78f ]
This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
That commit followed the reference manual but unfortunately the imx7d
manual is incorrect.
Tested with ath9k pcie card and confirmed internally.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Fixes: 1c86c9dd82f8 ("ARM: dts: imx7d: Invert legacy PCI irq mapping")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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According to i.MX7D reference manual (Rev. 0.1, table 7-1, page 1221)
legacy PCI interrupt mapping is as follows:
- PCIE INT A is IRQ 122
- PCIE INT B is IRQ 123
- PCIE INT C is IRQ 124
- PCIE INT D is IRQ 125
Invert the mapping information in corresponding DT node to reflect
that.
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Fixes: a816d5750edf ("ARM: dts: imx7d: Add node for PCIe controller")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add clock-frequency property to CPU nodes. Avoids warnings like
"/cpus/cpu@0 missing clock-frequency property".
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Only i.MX 7Dual SoC supports CPU frequencies of up to 1GHz. The i.MX
7Solo can run with up to 800MHz and does so without making use of DVFS
usually. While the device tree clearly specified a too fast operating
point for i.MX 7Solo, the kernel did not used it in practise so far
because the CPUfreq driver does not get loaded on i.MX 7Solo devices
(since the fsl,imx7s compatible string is not in the list of devices
making use of the cpufreq-dt driver...).
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Since we have a SoC level node we should make use of it and have
all nodes which are within the SoC, inside that node. This also
saves an extra interrupt-parent properties. While at it, also
order the Coresight nodes according to register addresses.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The i.MX 7Solo implements a subset of features available on
i.MX 7Dual. Recreate imx7s.dtsi as the base device tree for
i.MX 7Dual boards. The i.MX 7Dual's additional features over
i.MX 7Solo are:
- Second Cortex-A7 core
- Second Gigabit Ethernet controller
- EPD (Electronc Paper Display, not yet part of the device tree)
- PCIe (not yet part of the device tree)
- Additional USB2.0 OTG controller
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The i.MX 7 series currently consists of two SoCs: i.MX 7Solo and
7Dual. The former has a subset of features of the latter, hence
use imx7s.dtsi as the new base device tree. To keep diffstat nice,
just move imx7d.dtsi to imx7s.dtsi temporarily and recreate
imx7d.dtsi in a second commit.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add ecspi nodes and aliases.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Building with W=1 option leads to several warnings like:
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-1p1@110 has a unit name, but no reg property
Fix them by removing the unneeded unit-addresses.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add the device nodes for the i.MX7 FlexCAN buses.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add the device node for the i.MX7 eLCDIF interface.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Since uboot v2016.01-rc2, which supported basic psci for i.mx7d.
So imx7d's second core can be enabled by psci.
Without arch timer, every timer event will be boardcasted to each core.
arch timer has local timer irq for each core.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add imx7d ADC support.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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As on i.MX7D, we using a virtual arm clk for CPU frequency
scaling, so correct the clocks info used by the cpufreq driver.
Signed-off-by: Bai Ping <b51503@freescale.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, this is the massive branch we have for each release. Lots
of various updates and additions of hardware descriptions on existing
hardware, as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and
32-bit DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to
tell from the diffstat, so there's little point in duplicating listing
it here)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
ARM: dts: uniphier: add system-bus-controller nodes
ARM64: juno: disable NOR flash node by default
ARM: dts: uniphier: add outer cache controller nodes
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
dts/ls2080a: Update Simulator DTS to add support of various peripherals
dts/ls2080a: Remove text about writing to Free Software Foundation
dts/ls2080a: Update DTSI to add support of various peripherals
doc: DTS: Update DWC3 binding to provide reference to generic bindings
doc/bindings: Update GPIO devicetree binding documentation for LS2080A
Documentation/dts: Move FSL board-specific bindings out of /powerpc
Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
arm64: Rename FSL LS2085A SoC support code to LS2080A
arm64: Use generic Layerscape SoC family naming
ARM: dts: uniphier: add ProXstream2 Vodka board support
ARM: dts: uniphier: add ProXstream2 Gentil board support
...
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Add device tree node to support iomuxc-lpsr controller, fsl,input-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add USB OTG and Host support.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add fec1 and fec2 nodes for i.MX7d soc.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add the PWM1-4 nodes.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The UART2 memory space starts at address 0x30890000 (UART2_URXD).
Fix it so that UART2 can be used.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fixes: 949673450291 ("ARM: dts: add imx7d soc dtsi file")
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Change SNVS rtc to syscon interface.
Enable onoff key and power off function.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Added etm, etb, funnel and replicator
usage example:
echo 1 >/sys/bus/coresight/devices/30086000.etr/enable_sink
echo 1 >/sys/bus/coresight/devices/3007c000.etm/enable_source
coresight-tmc 30086000.etr: TMC enabled
coresight-replicator replicator.1: REPLICATOR enabled
coresight-tmc 30084000.tmc: TMC enabled
coresight-funnel 30083000.funnel: FUNNEL inport 0 enabled
coresight-funnel 30041000.funnel: FUNNEL inport 0 enabled
coresight-etm3x 3007c000.etm: ETM tracing enabled
etm enable here.
trace data save at /dev/30086000.etr
cat /dev/30086000.etr > trace.data
coresight-tmc 30086000.etr: TMC read start
coresight-tmc 30086000.etr: TMC read end
use ptm2human(https://github.com/hwangcc23/ptm2human) to show trace data
ptm2human -i trace.data
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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