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- Update iomux header for i.MX7ULP B0 silicon.
- Align the pin func name with header file for all dts files.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Shenwei Wang <shenwei.wang@nxp.com>
During the 4.14 rebase all intermediate commits were adjusted for
upstream prefix so this has many fewer dts changes.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
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Add imx7ulp header file.
Two changes base on original header file from iomux tool team:
- Remove the mux register column since mux and conf is shared in
one register.
- IOMUX_0 part:
The register address: 0x4103_d000 ~ 0x4103_d0cc, the header file
offset is 0xdxxx, now change it to 0x0xxx. The common base address
0x4103_d000 is defined by dts file.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Renamed to same convention as upstream
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
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i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports,
IOMUXC1 for A7 ports and IOMUXC DDR for DDR interface.
This patch adds the IOMUXC1 support for A7.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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