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path: root/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
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2017-08-15ARM: dts: sk-rzg1e: add Ether pinsSergei Shtylyov
Add the (previously omitted) Ether/PHY pin data to the SK-RZG1E board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-08-15ARM: dts: sk-rzg1e: add SCIF2 pinsSergei Shtylyov
Add the (previously omitted) SCIF2 pin data to the SK-RZG1E board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23ARM: dts: sk-rzg1e: add Ether supportSergei Shtylyov
Define the SK-RZG1E board dependent part of the Ether device node. Enable DHCP and NFS root for the kernel booting. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23ARM: dts: sk-rzg1e: initial device treeSergei Shtylyov
Add the initial device tree for the R8A7745 SoC based SK-RZG1E board. The board has 1 debug serial port (SCIF2); include support for it, so that the serial console can work. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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