| Age | Commit message (Collapse) | Author |
|---|
|
Most of the display engine is shared between the R8 and the A13. Move the
common parts to the Á13 DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
|
|
The TCON, tv-encoder and display engine backends and frontends are combined
to create our display pipeline.
Add them to the R8 DTSI. It's supposed to be perfectly compatible with the
A10s and A13, but since we haven't tested it on them yet, it's safer to
just enable it on the R8. Eventually, it should be moved to sun5i.dtsi
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
|
|
Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
|
|
The DRAM gates control whether the image / display devices on the SoC have
access to the DRAM clock or not.
Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
|
|
The R8 is very close to the A13, but it still has a few differences,
notably a composite output, which the A13 lacks.
Add a DTSI based on the A13's to hold those differences.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
|
