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path: root/arch/arm/mach-imx/ddr3_freq_imx6.S
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2016-03-07MLK-12415: ARM: imx: imx6q: ddr3 adjust read/write latency from DCDAdrian Alonso
Adjust high frequence (528M) read/write additional latency settings from target board initial configuration; Save/restore MMDC_MDMISC from DCD settings. Remove hardcodded value to issue a ZQ calibration command. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> (Cherry picked from commit 1036293d72173ef9051ec23babfd4d7f13db4f58)
2016-02-03MLK-12023-2: arm: imx6: refactor wfe ddr3 freq change low power modeAdrian Alonso
Refactor wfe_ddr3_freq_change to wfe_smp_freq_change in order to reuse enter/exit wfe standby low power mode. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit 4d92e1f5bab3480cb145821dce27960887e7a3ea)
2016-01-14MLK-11497-2 ARM: imx: add busfreq support for imx6q/dlAnson Huang
Add busfreq support for i.MX6Q/DL, 3 setpoints supported: HIGH: MMDC = 528MHz on i.MX6Q, = 396MHz on i.MX6DL; AHB = AXI = 24MHz; AUDIO: MMDC = 50MHz, AXI = 50MHz, AHB = 25MHz; LOW: MMDC = AXI = AHB = 24MHz. Signed-off-by: Anson Huang <b20788@freescale.com>