linux-toradex.git - Linux kernel for Apalis, Colibri and Verdin modules

Age	Commit message (Collapse)	Author
2019-02-12	MLK-11491 ARM: imx: dis-connect vddhigh_in and vddsnvs_in for imx6ul	Anson Huang
	To achieve lower power number in low power idle, on the boards which has higher vddhigh_in than vddsnvs_in, need to dis-connect vddhigh_in and vddsnvs_in internally to make vddhigh_in's power low enough to meet the design target. Signed-off-by: Anson Huang <b20788@freescale.com>
2019-02-12	MLK-11249-3 ARM: imx: improve i.mx6ul's low power idle setting	Anson Huang
	For low power idle with ARM power gated, per hardware requirement, there must be no interrupt coming during the power down process of ARM core, so RBC counter is enabled to hold interrupts. However, the previous setting of RBC counter is 1, which is ~30us, but the hardware design recommend a ~90us is required during ARM core power down, so we update the RBC counter value to 4(~120us) here. Previous delay loop to make sure RBC is actually enabled, 3us is needed, but the loop value assume ARM is running @1GHz, but actually ARM is running @24MHz now, so we need to update the loop value according to ARM speed. The ARM power up timing is based on IPG / 2048, IPG is 1.5MHz during low power idle, so the total latency of cpuidle exit should be updated accordingly. Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit 4e1fd49da5e87c5cc23f053692e8d7648a4d4b21)
2019-02-12	MLK-11021-03 ARM: imx6: add low power idle support on imx6ul	Bai Ping
	Add the low power idle support on i.MX6UL. The ANATOP can enter low power when all PLLs are powered down. If need entering low power idle with LDO_2P5 and LDO_1P1 power down and other anatop module in low power mode, add "uart_from_osc' on command line to make sure the UART clk is from osc to let the PLL3 power down when entering low power idle. Signed-off-by: Bai Ping <b51503@freescale.com> (cherry picked from commit 5215cba66938fd09f44e61b2c7b7ae0ef0629c2f)