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path: root/arch/arm/mach-mx6/board-mx6q_sabrelite.c
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2013-11-14i.MX6: explicitly disable SATA PHYEric Nelson
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-10-03Revert "ENGR00243339 imx: sata: disable sata phy when sata is not enabled"Eric Nelson
This reverts commit 3470c22143fa8a8ed4b9a6d0d5b02cdad36f782d.
2013-07-12ENGR00262502-1 [MX6Q/MX6DLS]Add commandline option to route enet irq to gpioRanjani Vaidyanathan
Add a command line option to route the ENET interrupts to the GPIO_1_6. To route the ENET interrupts to GPIO_6 add "enet_gpio_6" to the kernel command line. Also remove the CONFIG option (MX6_ENET_IRQ_TO_GPIO). This commit should be applied on top of following commits: 72c86f0b9a953e91bb1ed31021b71f337050bc28 808863866d2c17aeb3e70a7fcd094bd96db4b601 bae4d40849f3acdd9663f5a0857c9415ed7e6d5d Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2013-06-27ENGR00268864 Fix build breakJay Monkman
Minor correction that broke build. Signed-off-by: Jay Monkman <jay.monkman@freescale.com>
2013-06-14ENGR00267024 mx6q: Stop DMA memory fragmentationJay Monkman
Applied patch from customer to prevent DMA memory fragmentation. Customer reported system crashes due to running out of DMA-able memory while playing videos. Reported in CT42391649. Signed-off-by: Jay Monkman <jay.monkman@freescale.com>
2013-04-15ENGR00257847-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is activeRanjani Vaidyanathan
All of the interrupts from the ENET block are not routed to the GPC block. Hence ENET interrupts are not able to wake up the SOC when the system is in WAIT mode. And the ENET interrupt gets serviced only when another interrupt causes the SOC to exit WAIT mode. This impacts the ENET performance. To fix the issue two options: 1. Route the ENET interrupt to a GPIO. Need to enable the CONFIG_MX6_ENET_IRQ_TO_GPIO in the config. This patch provides support for routing the ENET interrupt to GPIO_1_6. Routing to this GPIO requires no HW board mods. If the GPIO_1_6 is being used for some other peripheral, this patch can be followed to route the ENET interrupt to any other GPIO though a HW mode maybe required. 2. If the GPIO mechanism cannot be used and is not enabled by the above mentioned config, the patch will disable entry to WAIT mode until ENET clock is active. When the ENET clock is disabled, WAIT mode will be automatically enetered. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2013-04-09ENGR00257658 Revert "ENGR00256893-1 MX6Q/DL-Fix Ethernet performance issueJason Liu
This reverts commit 067c8dcfa79a169d86809272569fe734c4222c79. i.mx6dl/dq sabreauto/sabresd board will boot up failed randomly with this patch-set, thus revert it. [Jason] Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-03ENGR00256893-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is activeRanjani Vaidyanathan
All of the interrupts from the ENET block are not routed to the GPC block. Hence ENET interrupts are not able to wake up the SOC when the system is in WAIT mode. And the ENET interrupt gets serviced only when another interrupt causes the SOC to exit WAIT mode. This impacts the ENET performance. To fix the issue two options: 1. Route the ENET interrupt to a GPIO. Need to enable the CONFIG_MX6_ENET_IRQ_TO_GPIO in the config. This patch provides support for routing the ENET interrupt to GPIO_1_6. Routing to this GPIO requires no HW board mods. If the GPIO_1_6 is being used for some other peripheral, this patch can be followed to route the ENET interrupt to any other GPIO though a HW mode maybe required. 2. If the GPIO mechanism cannot be used and is not enabled by the above mentioned config, the patch will disable entry to WAIT mode until ENET clock is active. When the ENET clock is disabled, WAIT mode will be automatically enetered. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2013-03-01ENGR00252071-4: mxc_v4l2_capture: enable auto detect of ov5642/5640 in sabreliteSheng Nan
- enable the auto detect for parallel ov5642 and ov5640 in sabrelite board. Signed-off-by: Sheng Nan <b38800@freescale.com>
2013-02-05ENGR00243339 imx: sata: disable sata phy when sata is not enabledRichard Zhu
In order to save power consumption, disable sata phy (enable PDDQ mode) in kernel level, if the sata module is not enabled in kernel configuration. Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-11-22ENGR00234411-1 Sabreauto: fix error print COULD NOT SET GP VOLTAGE.Robin Gong
Didn't take more care about non-pfuze board, and there is two place in BSP will call "mx6_cpu_regulator_init". It means regulator_get will be called twice on every vddcore/vddsoc regulator. Then one value need set twice ,because from regulator core view, there is two regulators share the same regulator. The non- validate one will return error and print "COULD NOT SET GP VOLTAGE!!!!." on Sabreauto board. The same as Sabrelite and ARM2 board. Meanwhile, Sabreauto need be configured LDO bypass default. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-11-16ENGR00233929: add kernel command line to enable snvsTerry Lv
In MX6Q/DL, originally GPIO_0 is used as CKO pin function. when SNVS module is enabled, CKO output stops suddenly. Both CKO clock config register CCOSR and GPIO_0 IOMUX register value are not changed. But because ALT7 of GPIO_0 pad is SNVS_VIO_5 function. I doubt that when SNVS module is enabled, GPIO_0 pad is automatically changed to SNVS instance by SoC. Thus we add option for snvs enable/disable. Signed-off-by: Terry Lv <r65388@freescale.com>
2012-11-14ENGR00233051-03 Mx6 USB: msl implementation for USB OTG modulizationmake shi
- remove mx6_usb_dr_init() in board specific initialization files - Add module_init(mx6_usb_dr_init) and module_exit(mx6_usb_dr_exit) in usb_dr.c to support the usb_dr modulization - Export necessary function which is used in usb_dr.c Signed-off-by: make shi <b15407@freescale.com>
2012-08-20ENGR00220567 [MX6 SABRELite] No mxs-perfmon.0 directoryEric Sun
The problem is caused because "mx6_sabrelite_board_init" don't add the corresponding device node. Problem resolved after add them. Signed-off-by: Eric Sun <jian.sun@freescale.com>
2012-08-15ENGR00220176 sabrelite ov5642: Fix ov5642 probe failYuxi Sun
Add ov5642 power down function in the board initial file Signed-off-by: Yuxi Sun <b36102@freescale.com>
2012-08-13ENGR00220153 cpufreq mx6: new cpu set point and add VDDSOC/PU adjustRobin Gong
1.add new cpu setpoint: replace 498Mhz with 672Mhz,and remove 198Mhz. but now 498Mhz seems not stable enough, comment now, test enough to add it. Rigel kept unchange now. 2.support adjusting VDDSOC/VDDPU when cpu frequency change. Signed-off-by: Robin Gong <b38343@freescale.com>
2012-08-01ENGR00219016-4 MX6Q SabreLite: Set HDMI event as event 2 of SDMA eventChen Liangjun
If MX6q chip version is bigger than TO1.2, Select HDMI SDMA request as SDMA event 2 for MX6Q ARM2 board. SDMA event 2 can be configured HDMI or IPU. Signed-off-by: Chen Liangjun <b36089@freescale.com>
2012-07-30ENGR00218754: mx6: fix build warning for sd pad configurationRyan QIAN
- fix build warning about uninitialization of sd_pads_50mhz, sd_pads_100mhz, and sd_pads_200mhz. affected soc: - mx6q arm2/sabreauto/sabrelite - mx6sl arm2 Signed-off-by: Ryan QIAN <b32804@freescale.com>
2012-07-26ENGR00172083 SPI-NOR mx6: fix failed erase uboot ENV on SPI-NOR by MFG toolRobin Gong
In MFG tool will use "flash_eraseall /dev/mtd0" command to erase whole mtd0 partition, but u-boot environment params are stored in offset 0xc0000 which exceed the u-boot patition 0x40000, it means the "flash_eraseall" command only erase u-boot partition, but not environment area. So we need increase the size of u-boot partition to 0x100000 as what we remain 1MB for u-boot. Signed-off-by: Robin Gong <B38343@freescale.com>
2012-07-26ENGR00215520-03 Mx6:USB host: USB Host1 modulizationmake shi
- remove mx6_usb_h1_init() in board specific initialization files - Add module_init(mx6_usb_h1_init) and module_exit(mx6_usb_h1_exit) in usb_h1.c to support the usb_h1 modulization - Export necessary function which is used in usb_h1.c Signed-off-by: make shi <b15407@freescale.com>
2012-07-25ENGR00216013-2 mx6: not call memblock_free after reserve memory.Zhang Jiejing
Remove call memblock_free after reserve memory with memblock_allocate(). The function of memblock_free is to remove the memory block from reserve list of memblock, it will totally lost the info about how much phy memory we have. Skipping call this can make the reserved memory be accountable in memblock With no side-effect. After doing this, we can know how much our phy memory is, then can add check in our driver like(vpu) to check the phy memory valid or not before vpu start use the address. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2012-07-20ENGR00213014-1 MX6x Sabrelite: IOMUX setting for HDMI HDCPSandor Yu
Added enable_pins/disable_pins functions for Mx6q sabrelite HDMI. Added HDMI DDC IOMUX setting. Signed-off-by: Sandor Yu <R01008@freescale.com>
2012-07-20ENGR00215492-4: Enable caam ahash feature in config.Terry Lv
Enable caam ahash feature in config. Add caam init to other 6q platforms. Signed-off-by: Terry Lv <r65388@freescale.com>
2012-07-20ENGR00213944-02: mmc: sdhci: [MX6] support SD v3.0 memory cards.Ryan QIAN
- Add variable pad speed setting per SD clk freq. - Add SD3.0 support on SD1, SD2, and SD3. - Enhance drive strength on SD pad to improve its compatibility. - change the definition of pad speed changing interface - combine pad speed setting for different SD host controllers into one function. Signed-off-by: Ryan QIAN <b32804@freescale.com> Acked-by: Lily Zhang
2012-07-20ENGR00212492 GPU: fix a macro errorHuang Shijie
The default .config defines the GPU as a module: "CONFIG_MXC_GPU_VIV=m" In this case, we actually can not find the CONFIG_MXC_GPU_VIV. We should find CONFIG_MXC_GPU_VIV_MODULE instead. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-20ENGR00209062-1: mx6dq and mx6dl dual camera supportWu Guoxing
dual camera support for mx6q and mx6dl: 1. let mipi and parallel camera working on different csi 2. the two camera can work independently and synchronously 3. the two camera will be registered and different video device(/dev/video0, /dev/video1) 4. when both camera are working, the can not use the same ipu channel, that is, when camera one using PRP_ENC_MEM or PRP_VF_MEM channel, the other one can only use CSI_MEM this is the arch part changes. Signed-off-by: Wu Guoxing <b39297@freescale.com>
2012-07-20ENGR00209557 IMX6: GPU: do not reserve memory when GPU is not enabledHuang Shijie
The current code will reserve 128M for GPU even when it is not enabled. It is not needed. So do not reserve the memory when the GPU is not enabled. (this can save 128M for Mfgtool.) Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-20ENGR00179574: MX6- Add bus frequency scaling supportRanjani Vaidyanathan
Add support for scaling the bus frequency (both DDR and ahb_clk). The DDR and AHB_CLK are dropped to 24MHz when all devices that need high AHB frequency are disabled and the CORE frequency is at the lowest setpoint. The DDR is dropped to 400MHz for the video playback usecase. In this mode the GPU, FEC, SATA etc are disabled. To scale the bus frequency, its necessary that all cores except the core that is executing the DDR frequency change are in WFE. This is achieved by generating interrupts on un-used interrupts (Int no 139, 144, 145 and 146). Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-07-20ENGR00178875-1 VDOA: Add vdoa support on i.MX6 SOC platformWayne Zou
Add vdoa support on i.MX6 SOC platform Signed-off-by: Wayne Zou <b36644@freescale.com>
2012-07-20ENGR00172274-02 - [MX6]: rework IEEE-1588 in MX6Q Sabre-lite/sd board.Fugang Duan
- Config GPIO_16 pad to ENET_ANATOP_ETHERNET_REF_OUT. - IEEE-1588 ts_clk and i2c3 are mutually exclusive, because all of them use GPIO_16, so it only for one function work at a moment. - Test result: TO1.1 IEEE 1588 is convergent in Sabrelite board. Signed-off-by: Fugang Duan <B38611@freescale.com>
2012-07-20ENGR00171622 - FEC : workaround for Gb enet in sabrelite board.Fugang Duan
Micrel phy KSZ9021 Gb speed cannot work well in i.MX6 sabrelite board. Advertise PHY is not 1000Base-T capable. If nfs boot kernel, phy will work at 100Mbps, or else phy will work at Gbps mode. And if hot-plugin cable, phy will work at Gbps mode. Enet can work well in all of them. But in Gbps mode, uDMA sometime cannot write frame "L" bit in exuberate transfer, so driver will print some warning message: "FEC ENET: rcv is not +last" Signed-off-by: Fugang Duan <B38611@freescale.com>
2012-07-20ENGR00169489-1 Add OV5642 csi camera support for i.mx6 sabre-lite board.Yi Li
Add OV5642 csi camera support for i.mx6 sabre-lite board Signed-off-by: Yi Li <R80015@freescale.com>
2012-07-20ENGR00171452 [MX6Qsabrelite]:wifi failed to work after system resume.Ryan QIAN
Set keep power on suspend flag for sd3 & sd4 Signed-off-by: Ryan QIAN <b32804@freescale.com>
2012-07-20ENGR00169681 MX6: Add GPIO keys for sabrreliteLin Fuzhen
Add gpio keys for sabrelite Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
2012-07-20ENGR00170482 ARM: mx6qsabrelite: Fix the total RAM sizeFabio Estevam
On mx6qsabrelite there is a total of 1GB of RAM. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-20ENGR00170244-4 ARM: AHCI: Enable PDDQ mode on mx6 sabrelite boardRichard Zhu
In order to save the power consumption, enable the PDDQ mode of AHCI PHY when there is no sata disk on the port Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-07-20ENGR00161124 [dvfs, cpufreq] Use regulator API to set cpu voltageNancy Chen
Change dvfs driver and cpufreq driver to use regulator API to set cpu voltage. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2012-07-20ENGR00162655 MX6 Sabre-lite SATA supportMahesh Mahadevan
Add support for MX6 Sabre-lite board Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-07-20ENGR00163615 mx6q: sabrelite RevC: change GPIO for flexcanDong Aisheng
GPIOs used by flexcan are changed on RevC board. Updating the code for RevC board. Signed-off-by: Dong Aisheng <b29396@freescale.com>
2012-07-20ENGR00162676 Fix for DVFS on MX6 Sabre-liteMahesh Mahadevan
Fix ensures the regulator API works correctly when adjusting core voltages during DVFS on MX6 Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-07-20ENGR00162885 mx6q: sabrelite: add flexcan supportDong Aisheng
Add flexcan support. Signed-off-by: Dong Aisheng <b29396@freescale.com>
2012-07-20ENGR00162478 MX6 Sabre-lite, add ASRC supportMahesh Mahadevan
Add support for ASRC driver in MX6 sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-07-20ENGR00162048 Align the MX6 Sabrelite set_cpu_voltage() with ARM2Mahesh Mahadevan
Align the implementation, eventually this should go to a common place across MX6 platforms Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-07-20ENGR00161926 Change the PAD settings on SD3 Write ProtectMahesh Mahadevan
Update the PAD settings to lower pull-up resistor as this was causing WP to not be detected. Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-07-20ENGR00161518 [MX6] USB: Add USB OC(Over Current) codemake shi
Add config USB OC setting code for mx6q, and make the OC default off. After adding it, fixing the loop less code during kernel boot in mx6qLite. Signed-off-by: make shi <b15407@freescale.com>
2012-07-20ENGR00161617 - [MX6] : FEC get MAC address from OCOTP.Fugang Duan
- FEC get the default MAC address from OCOTP. - If the MAC address is all zero, get the random address. - But, if add para "fec_mac=xx:xx:xx:xx:xx:xx" in uboot, FEC will get the last MAC address from uboot para. Signed-off-by: Fugang Duan <B38611@freescale.com>
2012-07-20ENGR00161643-2 MX6Q-lite : enlarge the mtd partition of NORHuang Shijie
64k is too small for uboot. So enlarge the partition to 256K. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-20ENGR00161483 Add SPI-NOR support on MX6 Sabre-liteMahesh Mahadevan
Add support to access SST SPI-NOR on MX6 Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-07-20ENGR00161484 Add HDMI audio support on MX6 Sabre-liteMahesh Mahadevan
Add support for HDMI audio on MX6 Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-07-20ENGR00161192 [MX6 Sabre-lite] Add dummy regulators for MMC and SD driversNancy Chen
Add dummy regulators for MMC and SD drivers. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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