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path: root/arch/arm/mach-tegra/board-cardhu-power.c
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2011-11-30arm: tegra: cardhu: pm269: Remove SDMMC1_VDD controlLaxman Dewangan
The SDMMC_VDD control is generated from the cpld programming for pm269 and so it is not require to have gpio control for this. bug 880984 Reviewed-on: http://git-master/r/56627 (cherry picked from commit 38ad9be02578b64d3f5eab8c6146abfc6c842d35) Change-Id: Id7cae7a724c02754b3abbc937a7e80b9a51d7977 Reviewed-on: http://git-master/r/57254 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R34a8cb39a5c557461ebbb540692487d357798eca
2011-11-30arm: tegra: cardhu: Support for PM311Laxman Dewangan
Adding support for PM311 based system. bug 870139 Reviewed-on: http://git-master/r/50012 (cherry picked from commit d319d9980b6b225735ac97160fdee18fbabba2f0) Change-Id: Iaa28921761e035e8fa29956b776f9379ae326b42 Reviewed-on: http://git-master/r/57251 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R50fc9a079bd46a050084afed2b0f460e2916ebc9
2011-11-30arm: tegra: Specify dev name for audio regulatorsSumit Bhattacharya
Specify device names for ventana and cardhu speaker and digital mic regulators. Also use same regulator name for ventana and cardhu speaker supply. Bug 872652 Change-Id: I5a254eee2037c86e208818f34cdff24aee0edad9 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-on: http://git-master/r/55668 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R81411e5e595ec1d9e700d08410a9d3e49f24cbee
2011-11-30arm: tegra: cardhu: add gpio charger supportPritesh Raithatha
Bug 872590 Change-Id: I7e5bfe68a4f299f771b4af7094754e4167a44f29 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-on: http://git-master/r/54663 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R9dce2ca60c88531d5b16ed669404b3f1a25a9e81
2011-11-30arm: tegra: Add regulator entry for NCT1008venu byravarasu
bug 869217 Reviewed-on: http://git-master/r/51291 (cherry picked from commit bdf107203561935aa8d1eb1be36cfbbd36adfbe4) Change-Id: I3a342c87c65e586942396f12193726f0d60d17f1 Reviewed-on: http://git-master/r/54225 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Rebase-Id: R3bafcc8fc90f59d4559f33c526f8b914f1550c77
2011-11-30ARM: tegra: cardhu: Fix SDMMC regulator registrationDan Willemsen
Use the device driver name instead of encoding the SDMMC controller in the regulator supply name. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Change-Id: I08fb807c5a13eedd70bb9a5d47633334d51133d6 Reviewed-on: http://git-master/r/52502 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R2966fc597604a2c8a0e5b2c9f507a4566e3400f9
2011-11-30ARM: tegra: power: set cardhu suspend mode to LP1Jin Qian
http://nvbugs/876007 Change-Id: Id060bcc5ef20c0bc553bc171a3b96699140b2161 Reviewed-on: http://git-master/r/52136 Reviewed-by: Jin Qian <jqian@nvidia.com> Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R6496b91629af42d4b6ac9a623cd63d03c14abab2
2011-11-30arm: tegra: cardhu: Support for PM305Laxman Dewangan
Adding support for PM305. bug 846246 Original-Change-Id: Ib036c67c12984668e0b7153f76a1a1d44c5be14f Reviewed-on: http://git-master/r/49820 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: R9e9eb93ddcea487159854533eead3fe8eb74e42b
2011-11-30arm: tegra: PM269: Fix focuser I2C timeout issue.Frank Chen
Fix regulator_get error and reset the sensor/focuser properly in the camera power on routine for PM269. Bug 842713 Original-Change-Id: Ia3820ec9e7bcca850b090a48963606af855f5ad2 Reviewed-on: http://git-master/r/49101 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: R5623445c753a3e8ffaaef38a5b105c8330e21b49
2011-11-30arm: tegra: cardhu: Set dsi_csi rail to 1200mVLaxman Dewangan
Setting the dsi_csi rails to 1200mV. bug 869063 Original-Change-Id: If1bd3d804b5f3888e4bbd377ab2105c4ca7a2dda Reviewed-on: http://git-master/r/49175 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Re9e8cebb8e9db0a6f499514895bf3228eddbd479
2011-11-30arm: tegra: cardhu: Correct supply name of hvdd_pex.Laxman Dewangan
Correcting the supply name for hvdd_pex voltage rail. bug 868452 Original-Change-Id: I238051360baca044ea547ed0fed6cf7e4a663012 Reviewed-on: http://git-master/r/49174 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Krishna Thota <kthota@nvidia.com> Tested-by: Krishna Thota <kthota@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R425970ed9eba558db187b9123241c433bf6addba
2011-11-30arm: tegra: cardhu: Suport for E1198-A02Laxman Dewangan
Adding support for the gpio changes for E1198-A02. bug 864282 Change-Id: I96e985882a3f2d00a66b300e85cb24661f884746 Reviewed-on: http://git-master/r/48483 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R07d861bb8832972e46a713d9ff195fef2cf6d1d2
2011-11-30arm: tegra: cardhu: Set LDO2 to 1200mV for E1208-A03Laxman Dewangan
The ldo2 power rail should be set to 1200mV on E1208-A03 based pmu. bug 863728 Original-Change-Id: I7730443bc052348a082d52a73e4f521ec34202f7 Reviewed-on: http://git-master/r/47491 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Vivek Aseeja <vaseeja@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: Rfc2975d5b80492523a4a767c001a8e22c9decaa7
2011-11-30ARM: tegra: cardhu: switch off PMU at high temperaturevenu byravarasu
Add board support needed for PMU switch off when tsensor detects temperature > TH3 threshold set. bug 850047 Original-Change-Id: I7a283cedc735264dd8ea52801f7f1a103e9293cb Reviewed-on: http://git-master/r/41531 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rc4bf2206a7207e28434b46baed442cd6f2797fbc
2011-11-30ARM: tegra: cardhu: Add IO power detection consumersAlex Frid
Bug 853132 Original-Change-Id: I59cc6b2025926695ebee12d808fb49f556ffaa6d Reviewed-on: http://git-master/r/42264 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rbd0d325e54141db2187dff6b11d5c0b20ff046d9
2011-11-30ARM: tegra: power: Added global EDP Capping tablePeter Boonstoppel
- Added table with EDP Capping values for different SKUs/regulator currents in new file edp.c - New entry point tegra_init_cpu_edp_limits() - Added DebugFS entry under debug/edp to list the currently selected EDP table - Populated EDP table in edp.c with data from Bug 844268 - edp.c keeps main EDP table; cpu-tegra.c and board-cardhu-power.c both read from there Bug 840255 Original-Change-Id: I55c2ee16278be8cd3005218bedebe76846d137d8 Reviewed-on: http://git-master/r/40938 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9a5f2bcfc1e6e0b5aee37cd700d75f9ef5cea30b
2011-11-30arm: tegra: cardhu: Set AVDD_PLL and AVDD_PLL_SATA to proper voltageLaxman Dewangan
Setting the rail voltage of the AVDD_PLLs to 1.2V and rail voltage of PLL_SATA to 1.05V. Original-Change-Id: Ibf5bb1d11b7b15cabb68f90da7e24dd999915c55 Reviewed-on: http://git-master/r/41179 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rc7f949b56c0d12d63f313aa005c4e71cbd0a3215
2011-11-30arm: tegra: Console suspend for all boardsLaxman Dewangan
Added the board level suspend/resume and call the console suspend from board level suspend/resume. bug 820536 Original-Change-Id: I246265241246dc0682870571c927bd23023e5aca Reviewed-on: http://git-master/r/41448 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Rebase-Id: Re1f3dd4f75ee05456899d9a67f74ae84f9572654
2011-11-30arm: tegra: cardhu: Add board level suspend/resumeLaxman Dewangan
Adding board level suspend/resume for cardhu. Disabling the clock for console uart port if console_suspend is enabled. bug 820536 Original-Change-Id: Iecb78708ff7784dd131ffa83692b2419dba44e88 Reviewed-on: http://git-master/r/41147 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R14dcb8c7822b2bdc7e66807e292776b68d08d12d
2011-11-30mfd: tps6591x: Reorganise GPIO definitionLaxman Dewangan
Adding the TPS6591x gpio definition in tps6591x core header files. bug 849976 Original-Change-Id: I1f7a7cc38e220c091ccf44db5af6e43c34daa1cd Reviewed-on: http://git-master/r/41040 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rcaf75875841aab0b12f3876086245701eb754669
2011-11-30arm: tegra: cardhu: board SKU and fab cleanupLaxman Dewangan
Remove the hardcoding of the numerical value for different sku bit and fab definition and using macro for better readability. Original-Change-Id: Idf70c7a063b5416e170b3b7e61e896250c9ad70c Reviewed-on: http://git-master/r/37644 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rd7e2bfcf6780b6b73a8438b904b8a13b0297b59d
2011-11-30arm: cardhu: Remove always_on from backlight rails.Laxman Dewangan
Removing the always on in constraints of the power rail of backlights. bug 850674 Original-Change-Id: I15b835012db75fdf74dc1d7a742da0573c5af06d Reviewed-on: http://git-master/r/40798 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9ca33b8b4b489590f649160ae9e6df627391cbf0
2011-11-30arm: tegra: cardhu: Add support for the E1256Laxman Dewangan
Adding support for the E1256. The configuration is same as the E1186 board. bug 849990 Original-Change-Id: Idd89e282627b2f0924fc313a5ba28f9e9a6032be Reviewed-on: http://git-master/r/40367 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R3b1f22dc222f4ce000d2e84a48b7e2f379159750
2011-11-30arm: tegra: pm269: remove power on/off delaysRay Poudrier
The problem with slow PMU was fixed with a hardware change to reduce capacitance on the power rail, so delays are no longer needed Original-Change-Id: Ib66378ca6bf18c112e90d44d3213dd5f6c870c92 Reviewed-on: http://git-master/r/37127 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R41f0ab153ba153f896390874b41893ee6e11dce5
2011-11-30arm: tegra: cardhu: rename vpp_fuse_pg to vdd_fuseVarun Wadekar
Bug 796825 Original-Change-Id: I91be0bca739a2daf32807306a611671f387a8988 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/36096 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R5d303050d04b8e2ec2d9724a60bec9b0cbef6f02
2011-11-30arm: tegra: cardhu: Add full constraints of regulatorLaxman Dewangan
Adding complete constraints of the regulators. bug 843566 Original-Change-Id: Ifd07d15d257ff8c89c4a3cc31c9e72d886e6b431 Reviewed-on: http://git-master/r/39633 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: Rf443864c31cc255e428d6f0de51add028d85db78
2011-11-30ARM: tegra: cardhu: Update vid_oc pin for pm269Ray Poudrier
Correct pingroup is DAP3_DOUT Bug 825778 Original-Change-Id: I252398c4f1d653c73c5fd26a7b5c12410a962ade Reviewed-on: http://git-master/r/39822 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rb3bb758d23520c165fa6369bcb16979ec1824b5b
2011-11-30arm: tegra: pm269: Low power mode to unused vddio-gmi pinsLaxman Dewangan
Putting the unused vddio_gmi pins into the low power mode. bug 833087 Original-Change-Id: I7595d011a61d5993fee167e89ed7eb204d5cb6b6 Reviewed-on: http://git-master/r/37877 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: R3fa74a5ebc7720b95f91f8da7b665e634522f210
2011-11-30arm: tegra: cardhu: enable PMU features for lp0Luke Huang
Enable PMU only features for LP0. System-wise LP0 is not enable by default yet. 1. Allow pmu SLEEP state 2. Keep 32KHz clk out from PMU enabled on LP0 3. Set core_power_req to be high enable 4. Turn off VDD1 (power for Vcore) on LP0 Original-Change-Id: Id6babdfc36de1a597f8df5d2943ef048699013d4 Reviewed-on: http://git-master/r/32853 Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Tested-by: Chih-Lung Huang <lhuang@nvidia.com> Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R1be5db70870d950a7ffe1361e60aad4156398172
2011-11-30arm: tegra: pm269: Correct the input supply for HDMIAlok Chauhan
change the input supply to master 5v to enable VDDIO_HDMI signal for HDMI. Bug 825778 Bug 823160 Original-Change-Id: I2d6360ab3769ff876bdb7d0e0b34d9298aa780d0 Reviewed-on: http://git-master/r/35904 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R0ad5c2ba75a7fd6c5ab26f27e6aa987681a6b014
2011-11-30ARM: tegra: power: Enable LP2 mode on Cardhu platformScott Williams
Change-Id: If47d86312afd02fb8e193631b7baec66c3232864 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/47163 Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Rebase-Id: Rfadb990de8dc73fd53392029cc622629c8b986bd
2011-11-30ARM: tegra: cardhu: Disable power management featuresScott Williams
Tegra3 power management features have not been fully ported to Linux 2.6.39 yet. Disable them temporarily. Change-Id: Id9e1ebcab5f665845e6d1b685364f9cea9fe7329 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Rebase-Id: Rd813fa7d2be0ae8eec44c02834e21c2a47b5a846
2011-11-30ARM: tegra: Update cardhu boardfiles for K39Dan Willemsen
Rebase-Id: R53c264de0e30d06937fd88d97b9709b35c069f6d
2011-11-30arm: tegra: cardhu: support for PMUA03/A04Laxman Dewangan
The core_pwr_req signal need to be make high for the PMU A03 and A04. bug 829846 Change-Id: Ie568a29e76823e86743893ea59953b0429cc027a Reviewed-on: http://git-master/r/36544 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Ra97979df79f413641d2d862f982e6a7a114c2387
2011-11-30arm: tegra: cardhu: Changes for E1291-A04 power railsLaxman Dewangan
The E1291-A04 power rails are different then the A02/A03 version of E1291. Supporting the A04 power rails properly. Change-Id: I4c7dc0afa5b6bb1a7350418ef07f4ee7192cff30 Reviewed-on: http://git-master/r/35722 Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: Rafba9f71503029ac561c01ad7c97595926854917
2011-11-30arm: tegra: cardhu: Configuring DEV_SLP and gpio2 for A04Laxman Dewangan
Configuring the tps6591x into DEV_SLP mode and gpio2 of tps6591x into sleep mode for E1291-A04 board. This is required in order to have the gpio2 follow the 'CORE_PWR_REQ' pin in E1291-A04. GPIO2 of tps6591x is connected to the EN of the DC-DC converter which supply core voltage. bug 821295 Original-Change-Id: I01a8fa6c056872cff84dd0f2ae7601cee298ebcf Reviewed-on: http://git-master/r/32614 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R7eb913eabd4b8a51a688eb3bd09dff1ffc5c9545
2011-11-30Revert "arm: tegra: cardhu: core related fixes for lp0"Niket Sirsi
This reverts commit 0885c8037152e4b11d669c845ddf09ba49e5c8b6. Original-Change-Id: I254ca2966cdf28d548368340efb64617ce274a74 Reviewed-on: http://git-master/r/32698 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R018aa71bbf41b0d3586002fe7226ff3573388407
2011-11-30ARM: Tegra: Cardhu: Enable CPU EDP limits tableDiwakar Tundlam
Original-Change-Id: I57f033f44cfdf19d61bc5bab41cec23e51b40c11 Reviewed-on: http://git-master/r/32089 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: Re8f7d38f87635a3e709e83c8af6a81c67095210d
2011-11-30arm: tegra: cardhu: core related fixes for lp0Luke Huang
1. Set core_power_req to be high enable 2. Turn off VDD1 (power for Vcore) on LP0 Original-Change-Id: I81aedb4332c9e7ccd97def546a9a0611253f744a Reviewed-on: http://git-master/r/32277 Tested-by: Chih-Lung Huang <lhuang@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R4886f57403bc6148a6641ed8abe875da037cd4cb
2011-11-30arm: tegra: cardhu: set CPU EDP limitsVarun Wadekar
Original-Change-Id: I6282bbb63c34b8cc0d503cdd6eafe575fb78ef5f Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/31342 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R71a8023042831f208803dd7d7cad84912db9d3c1
2011-11-30arm: tegra: cardhu: Adding board entry for tps6236xLaxman Dewangan
Adding platform data entry for the tps6236x device and registering this device if board info has sku with bit0 as 1. bug 821295 Original-Change-Id: I18618ef75eca66a1f699c003c787dcb1f06e7659 Reviewed-on: http://git-master/r/31388 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Rb0d48c28c7460bd00874bd4cf972427e6939ba40
2011-11-30ARM: tegra: power: PM269: Add GPIO_REGPradeep Goudagunta
Adding GPIO_REG for power rails of PM269 board. Bug 823160 Original-Change-Id: Idbb889420e033780900b1b1b700637017640414e Reviewed-on: http://git-master/r/30366 Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R2f23a797a5e751bb6fc781a4aa7ed0c1a9ea1805
2011-11-30ARM: tegra : power: Set power rails SATA & PCIE off by defaultKaran Jhavar
Setting SATA & PCIE power rails (ldo1 & ldo2) off by default since they are not enabled on Cardhu. Bug 793780, 790141 Original-Change-Id: If905f156b99314271874536d61fe384715f2412a Reviewed-on: http://git-master/r/31292 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R73fb44a458b8ce548ca6e8ad4af12b2e626638c7
2011-11-30arm: tegra: cardhu: Adding cam-AF power railsLaxman Dewangan
Adding the camera autofocus power rail infomration. Removing non-existant peripheral entry from i2c4 bus. Adding deselect mux option after each i2c transfer through mux i2c. bug 802264 Original-Change-Id: Id87178666e4d8c4c5db3f8be708fc5fc85b3e2e4 Reviewed-on: http://git-master/r/29998 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rd791771ddf72c52686de86ce1f1aa99cf03ab877
2011-11-30ARM: tegra: power: Set cpu_pwr_off timer to 200us for PMICDiwakar Tundlam
Original-Change-Id: Ic30a091dd634b1857cdbfc5a0c47d34bc496b04f Reviewed-on: http://git-master/r/29884 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9c24f87480bddc1e35ad43d8f1a23332d2001e24
2011-11-30arm: tegra: cardhu: Setting CORE_PWR_REQ to output highLaxman Dewangan
Setting CORE_PWR_REQ to high. This is require to enable tracking regulator to supply more than 2A current for cardhu A03 board. bug 805454 Original-Change-Id: I4ff9d4d2bf106dc0d3d708fe9e1a7f7158dce27e Reviewed-on: http://git-master/r/29623 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rd688aca0b100371f31b3eeba280d744b314c0d8d
2011-11-30arm: tegra: Enabling RTC data based on defconfigvenu byravarasu
Internal and PMU RTC data are enabled only when respective macros are defined in the Cardhu defconfig file. bug 793949 Original-Change-Id: Iefc074877b263f3620c5ad08026435b3232ae3aa Reviewed-on: http://git-master/r/29637 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rbd711afd026a86e49fd967f549844231ee635de0
2011-11-30ARM:tegra:cardhu: Adding Vibrator power rail infovenu byravarasu
Adding power rail details for Vibrator on E118x board. bug 810072 Original-Change-Id: Ibf50c986b843fb36515f36493b5a07323ac940ab Reviewed-on: http://git-master/r/29631 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R5967097f65d09785f4ffef5c6418be50b496af0a
2011-11-30ARM: tegra: power: Set minimum LP2 target residencyAlex Frid
Added board level tuning parameter to specify minimum LP2 residency time (previous policy allows down to zero residency targets limited only by LP2 exit latency). Original-Change-Id: I4ae7d458fba78f35a40f138cf9489bf938715b22 Reviewed-on: http://git-master/r/28162 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Original-Change-Id: I38e798ca6d242d136ea2353d90cc961de14f25b6 Rebase-Id: R30db6faf081e44b5d1914ec213dd43a8c9abf3ef
2011-11-30arm: tegra: cardhu: setting default date on RTCvenu byravarasu
With this change, Jan 1, 2000 is being set as default date on PMU RTC Original-Change-Id: Ib1930970c6b58d5fa820a77eedd7b61dab731ee7 Reviewed-on: http://git-master/r/28029 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Original-Change-Id: Iddfaea12cf2329238c48939d7686c98694703e64 Rebase-Id: Rc330a58733f31055c21476b5a8b76fa34bc88167
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-19 10:21:00 +0000