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Modifies the bluesleep and rfkill platform driver registration to be more concise
and mirror the style of other similar code.
Change-Id: If5100248d0fe9cf00c1b78acbc72e3f45d173fa9
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/64601
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R0ec1bc987d0286bfdff3a5db5ccd142050a38872
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XMM modem requires GPIO power on sequence before modem
software can be downloaded to it.
BUG 828389
Change-Id: Ib8cf2a16a8b05a586d2f0b3bb57bad106a889cd1
Reviewed-on: http://git-master/r/46801
(cherry picked from commit 675f98979d6c6a281631d6590be5c7b6e5352b6f)
Reviewed-on: http://git-master/r/65958
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Red280cdd7669487e2368b75d4e1cd1c2130b3829
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sdmmc3 and sdmmc4 clocks need not be enabled by default.
Change-Id: I8b691ae6d906fd487e31e1fe5b764a37546e1eb5
Reviewed-on: http://git-master/r/62972
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R116ae11bba8880444eaf0b104f5ad84c66fb54d0
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Implemented HSIC phy ready and phy off callabacks for
cardhu board.
BUG 828389
Reviewed-on: http://git-master/r/52883
(cherry picked from commit 9d2e1e07c00d1f84dc24ccb861c5fb9ca751cb9c)
Change-Id: I56e0fb118efb7670080355760eb05108b7d1f45a
Reviewed-on: http://git-master/r/58564
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
Rebase-Id: Rba43e610309a58a96c9fcb208338a7124f4310b9
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Various cleanup including removing two unneeded static variables and
an unneeded function, as well as reserving the ram console after the
carveout and framebuffer.
Reviewed-on: http://git-master/r/51214
(cherry-picked from commit cb64054a12aca84b097556c7c4f4e7c67916fd93)
Change-Id: I2b950a6a8637beed3910cc59f1e8028dc3c10562
Reviewed-on: http://git-master/r/55086
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rf58d7de18ab7714a58d3acb79e5cbec60e4294f9
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fix for Bug 867991
Change-Id: I6213bbc53493179a177b65ab597f196653df712a
Reviewed-on: http://git-master/r/50483
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R8975279ac5d0d21cdcbf2a54e32a64e59797307e
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Avoid power down HSIC phy during L2 suspend state.
Triggered postsuspend and preresume actions for xmm modem.
BUG 828389
Original-Change-Id: I2cd862361d5ba0fedf7e7bffac02c0dfbf5cf0c8
Reviewed-on: http://git-master/r/46654
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R07b042064157d92b288da906c040b083d62df743
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ram console will buffer kmsg in reserved memory block, which
will be written to file /proc/last_ksmg on bootup.
Original-Change-Id: I6be8b9d22ce08040bbd95bf740a84b565e2300cf
Reviewed-on: http://git-master/r/37104
Tested-by: Alon Farchy <afarchy@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R367cb265f487736c91fdcb0548d10a4b13f2f293
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Added configuration option TEGRA_PLLM_RESTRICTED - when enabled,
PLLM - memory PLL - usage may be restricted to modules with dividers
capable of dividing maximum PLLM frequency at minimum voltage. When
disabled, PLLM is available as a clock source with no restrictions
(current configuration), which may effectively increase lower limit
for core voltage if high grade SDRAM is used.
Implemented PLLM restrictions in Tegra3 clock framework and DVFS, but
keep them disabled by default.
Bug 884419
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 5313ebcae92839146870d5865bc0f4cd08b35c61)
(cherry picked from commit 634647a9d2a8c1e03c8d98d0b2199950c947acc3)
Change-Id: I012452d92830ad6b63ec407350568b8c316b3caa
Reviewed-on: http://git-master/r/66512
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R22de0f09e7af2640499ec8cd96e974328d78bace
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Bug 872652
Change-Id: I89e505f6dedbb9de1a457f797362265cf06e76bb
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/59631
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Rebase-Id: R32ad00191e44737732e40c3710077069dee7946c
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1) configuring pinmux
2) create pn544_i2c_platform_data
3) register i2c device info using i2c_register_board_info
Bug 846684
Bug 873017
Change-Id: I6cc370d3ee6cc5df6b75db19bb719275e465f344
Reviewed-on: http://git-master/r/62746
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R334a9cc8f86c90214b2415b3b855d5f234ad7a11
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OTG host register/unregister functions were duplicated identically
across all board files, making the code difficult to maintain (and
actually some boards did not get all some code fixes leading to the same
bug being met again and again). This patch moves this common code into
tegra-otg.c.
Bug 884315
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Change-Id: I99b118664f0481f6c5470411b43f36609e0feb52
Reviewed-on: http://git-master/r/61763
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R0f6060514c017946cc9ae2ba2f04a1c134d14d9b
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Enable i2s3 and bluetooth dit device for cardhu. Also add i2s2 clock in
clock table. It is needed to support BT SCO playback/record.
Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: I3b702bbbd360db966447b099e982891383db27cd
Reviewed-on: http://git-master/r/62049
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R035bff07f147e9100956df6c238bf7df60d89e93
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Selecting debug console from linux command line.
bug 795847
Reviewed-on: http://git-master/r/51723
(cherry picked from commit ce5675f5a7607f9e549f84c42bea3df6f14c9008)
Change-Id: Ia242b6b0fed0b9d2fad6c66a14895e5574f6f5b9
Reviewed-on: http://git-master/r/61422
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Rebase-Id: R3fd2b06fefa1b153d2c739c5d7c55b2265659225
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Bug: 862023
Change-Id: I62a66cdf12fb78132d78b2e6853d32c3f8a8d68a
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/58675
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Rebase-Id: Rfa42d87cff0a75794fe69ffbecba6e501448509e
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Bug: 862023
Change-Id: Ibdb12ce9ae50b30e4c25ea43adc4c8c7e6516858
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/59863
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Rebase-Id: R780104b6f8c11bc22c95245989ff517977244267
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Set GPIO direction to high on main k39 branch.
bug 817238
Change-Id: I2960b4a325d8013295528790a28daea4a58e10cd
Reviewed-on: http://git-master/r/58020
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R3a80bfd11cd3959fd2c760eda277f6db42ecb333
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Removed Tegra3 pll_m refcount from common and board initialization.
As a result pll_m is turned off when all client clocks are disabled.
Added pll_m disable/enable control via PMC registers - this one
actually works on Tegra3; kept clock register control in place, just
in case.
Originally implemented in dee91eaf47a7e6b392e9663170dcfdcdde73446c.
Bug 888476
Change-Id: Ifa70d25ce8d93abc12c741d3a51b32110db3f7dd
Reviewed-on: http://git-master/r/60129
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rf4201b6244e1dc202793730afa900a6b15b658b9
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This change supports PM313 with 19X12 panel.
The change uses PM313 in "Single input to Dual output" mode
Bug ID : 822980
Reviewed-on: http://git-master/r/50215
(cherry picked from commit b83e795747fa860b5b7fb66b2067ebe4f15bcfd0)
Change-Id: Iabf707ded2976e9877481c215d0b1f1940781f14
Reviewed-on: http://git-master/r/60085
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re8eadc35c75fa21b0a5f3cb3bee0e8cb77dc3238
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Change the pll source of i2c from CLK_M to PLL_P_OUT0.
Bug 856468
Change-Id: I0865d0679fcc7ae2b862b9f68900275ab05da5ec
Reviewed-on: http://git-master/r/57505
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R04fd8dd082ad497a7ca7673f593fb4e309b3a2da
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Adding support for E1257 platform.
bug 864294
Reviewed-on: http://git-master/r/50662
(cherry picked from commit 8217615021a6ffeb992327f6b010ea9deebc34e7)
Change-Id: I3429da1bca38e1ddc5b3c2156a0db6b23aeb5555
Reviewed-on: http://git-master/r/57806
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R7fadbdc30bdca30e41e0b7fdb88628dbc8c32e82
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The w_disable pin is connected to different gpio in
E1198-A02 compare to E1198-A01. Making related changes
to support E1198-A02.
bug 864282
Reviewed-on: http://git-master/r/48877
(cherry picked from commit 009e0b9ccf776e658c27df59716cc1cce075ad31)
Change-Id: I85b7f0b10dd3549f07c48e71ffca1a304afc753d
Reviewed-on: http://git-master/r/57790
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rbf1f0f4775d536ba198f3c5a3ff3088c75d988fb
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Hotplug on usb is supported when hotplug flag is set in platform data
Bug 869745
(cherry picked from commit I57ba0b18a2d4232b2df2074c91aff97c6e639e7d)
Reviewed-on: http://git-master/r/54588
Change-Id: I24e5ddf49cead14d3eebe30da0f92402015c95c7
Reviewed-on: http://git-master/r/57725
Tested-by: Artiste Hsu <chhsu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Rdf4296a0b0e04733832b8b60b347a3da9cc67413
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On cardhu and ventana WM8903 GPIO1 is used for digital mic lrclk
output and GPIO2 is used for digital mic data input. Pass corresponding
WM8903 gpio configuration through platform data to enable cardhu and
ventana digital mic support.
Bug 872652
Change-Id: I410265f1b4f9a8c5e43e5437ed6bac4122709178
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/55654
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rb47b7afe17013d4a0d5d73a15ba19c12dab0efbf
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Bug 872652
Change-Id: Ic170dc2fc86f74d9e67d3b73a6f83368597dafcb
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/54975
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R96e76083f2cf154be6c450aff9005a0057bf5cb4
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bug 870689
Reviewed-on: http://git-master/r/51292
(cherry picked from commit f66aaace70f4327a8612913a8d5e2cb967dcdad6)
Change-Id: I1f8ac2b323b9bb135312dba2f333fb9d5ce3d44b
Reviewed-on: http://git-master/r/57026
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: Rac27549cbe8fcca75cb1734de24d066ae787c835
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With this change, ported board changes needed for
supporting tegra internal RTC on cardhu from 2.6.36.
Change-Id: Ic3f0dc152dfe7d3a51228f70ebafbc640b631172
Reviewed-on: http://git-master/r/54466
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R95e169ae8c7a4f2a73cc0f202c72469a614a657a
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Enabling the XCVR setup for USB using USB calibration
fuses.
Bug 867817
Reviewed-on: http://git-master/r/51575
(cherry picked from commit 5c9d3b4c06bd22e1d6aae31c0fbe67fc5f7e1902)
Change-Id: If74435b8d9db7eb7a60d5c27f6b6e23cae890fb6
Reviewed-on: http://git-master/r/54652
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R640f690ad3a38c20888c34009bda495fbb5ba755
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Change the pll source of vi_sensor from PLL_M to PLL_P since PLL_M is
more variable. Also we can get exactly 24MHz mclk rather than 24.24MHz.
Bug 870687
Bug 879875
Reviewed-on: http://git-master/r/50382
(cherry picked from commit a994fae2c18aee4d1df1b1d3d11c1259fdf3264e)
Change-Id: I8c9196e47d9e995089d7b073c17a2f67fbac3995
Reviewed-on: http://git-master/r/53905
Reviewed-by: Zhijun He <zhhe@nvidia.com>
Tested-by: Zhijun He <zhhe@nvidia.com>
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Rebase-Id: R479eafb8e00602383060e93cbb28bc00d686c0e8
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Adding spi2 master device to enable the SPI2 master
interface.
bug 871218
bug 869972
Original-Change-Id: I1d70f5c07242c98565eae84777917292f280e6cc
Reviewed-on: http://git-master/r/50513
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Ref0db7f6cba6fc5777c2caf079beee942302c94c
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Setting debug console to be UARTB for E1256
bug 871620
Original-Change-Id: Ie1e97997d0b47a3b3eff2ba4ecfb0af5dc920d41
Reviewed-on: http://git-master/r/50498
Tested-by: Kuan Luo <kluo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R1d89f6c474d91fc8b3c8a1529638813f25bd3450
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Providing the clock source based on preference.
bug 870388
Original-Change-Id: I1d5cda35a4d0d70082bf03d7ee02c8322920691a
Reviewed-on: http://git-master/r/50256
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: Ra743104afc3a5389e2bb2f4f3dc6b29a121326ee
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Change-Id: Ie1ec67106ffb4cf38415095a8db31d01fe1d5e10
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/49274
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Tested-by: Daniel Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R23e65a63d3f2869217af5cc7952ea64931ba4924
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Original-Change-Id: Ic3986547d1a022d54ce21b84a451cbfe6d827f46
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/47722
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rb9d894df122d0b89284cab827f74088e0b1207d0
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Resetting the modem during the kernel boot for E1291-A04.
bug 817238
Original-Change-Id: Id0862d39306b87a04a28abd205455d97dd05109e
Reviewed-on: http://git-master/r/38693
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: Rf42e80598a66f46cd0ef0e2bfacca3917eb86c45
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Increase touchscreen performance for Cardhu SKU-2000 with touch
panel air gap gasket changes.
Bug 864735
Original-Change-Id: I01137e8d31230cd1d1f5a7d25d82259cc732b1e5
Reviewed-on: http://git-master/r/47197
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Ali Ekici <aekici@nvidia.com>
Tested-by: Ali Ekici <aekici@nvidia.com>
Reviewed-by: Jonathan Mccaffrey <jmccaffrey@nvidia.com>
Tested-by: Jonathan Mccaffrey <jmccaffrey@nvidia.com>
Rebase-Id: Rede07c6cc06387a4ccb31eaa2b7bd2e4603c3768
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PM269 has no hsic device connection and because of this
enumeration of hsic device is failing and error logs
are seen. This is creating issue for WAT system testing.
To avoid this for USB2, UTMI is selected instead of HSIC.
BUG 863313
Original-Change-Id: I6f3aa04f8db776e11dfbe8997dace5896e24a84e
Reviewed-on: http://git-master/r/47554
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R94dcdf70eb0a88719a70da277d2d03236a8e6002
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Updated i2c platform data to add scl_gpio and sda_gpio as
a array so it will take care of multiplexing also.
Bug 854305
Original-Change-Id: I671a3b54ea12c53ef873f5766cf393b23c0df34e
Reviewed-on: http://git-master/r/46628
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rc955615a3903d724a5cd32c2a34a341208a506a9
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Change clock source for pwm modules and increase backlight pwm frequency
to 1kHz.
Bug 858358
Original-Change-Id: I8e69de79e77e1c88aec8913d304b40013113fc22
Reviewed-on: http://git-master/r/46854
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R867c966b3aa005501ee3678f257e243a5632e9c5
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Add baseband power drivers to manage gpio for turning on modem,
and re-enumerating modem after modem's boot rom has transferred
control to downloaded modem software.
BUG 828389
Original-Change-Id: Ide96a28b8f0183d8328751d3b3dec92b8068a3c8
Reviewed-on: http://git-master/r/39435
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rb3d170a5460bff29550d664c3f783134d2a3a41f
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Added the code for arbitration lost recovery mechanism for i2c
driver and Initialize gpio number for i2c clock and data as
part of platform data.
bug 854305
Original-Change-Id: Icdc243a5025c766d65816542a6d5aabd61e6eee1
Reviewed-on: http://git-master/r/43200
Reviewed-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R11e00587725418e6e6ef5d0fa2f718424cc0635e
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Add board support needed for PMU switch off when tsensor
detects temperature > TH3 threshold set.
bug 850047
Original-Change-Id: I7a283cedc735264dd8ea52801f7f1a103e9293cb
Reviewed-on: http://git-master/r/41531
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rc4bf2206a7207e28434b46baed442cd6f2797fbc
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Corrected the pinmux group for hsic power management gpios.
Also removed E1197 references from cardhu board files.
BUG 828389
Original-Change-Id: I0488d7d6ea2fb102a5c55eb32813776e298f9b46
Reviewed-on: http://git-master/r/43451
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd551075e1633406de4cdfbf3a05b1d6bff017666
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Added required Cardu specific changes for hsic baseband
xmm modem power management.
BUG 828389
Original-Change-Id: I119f541544cd34e1584608826714d2bfd9cbfe34
Reviewed-on: http://git-master/r/40789
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R1a257f5c0a78f8936de4c740026c60378e12fcf2
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Providing list of clock source to the spi driver so that driver can
select best clock source which gives minimum error for desired speed.
bug 851642
Original-Change-Id: Id7e4b332f57b209f0ebd3f03cc8190b4c8d7ab6a
Reviewed-on: http://git-master/r/41241
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R534fda0233310be9cb61ae63a02acad4cbe13f12
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Enable RPC based AVP driver or channel based AVP
driver based on kernel config setting.
Original-Change-Id: I64c21724b55004fa4d7aaf801b47e57b6587b91e
Reviewed-on: http://git-master/r/37769
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd00f3fb6f0d75dd2b279b203cb25bee3dfdae112
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Added the board level suspend/resume and call the console
suspend from board level suspend/resume.
bug 820536
Original-Change-Id: I246265241246dc0682870571c927bd23023e5aca
Reviewed-on: http://git-master/r/41448
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Rebase-Id: Re1f3dd4f75ee05456899d9a67f74ae84f9572654
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Adding board level suspend/resume for cardhu.
Disabling the clock for console uart port if console_suspend
is enabled.
bug 820536
Original-Change-Id: Iecb78708ff7784dd131ffa83692b2419dba44e88
Reviewed-on: http://git-master/r/41147
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R14dcb8c7822b2bdc7e66807e292776b68d08d12d
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Adding board specific suspend and resume call apis through platform
data.
Added call of these function at appropriate stage of suspend/resume.
Added mechanism to select the uart debug channel base address through
variable so that board file can directly change this.
bug 820536
bug 832273
Original-Change-Id: Ia9ff3b8a8d2faa1071a8ff634960e6a6c8a43d40
Reviewed-on: http://git-master/r/34494
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6d7bfb3f8f9152779f5138cbcd1b7a9e9a9545df
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Adding support for the E1256. The configuration is
same as the E1186 board.
bug 849990
Original-Change-Id: Idd89e282627b2f0924fc313a5ba28f9e9a6032be
Reviewed-on: http://git-master/r/40367
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R3b1f22dc222f4ce000d2e84a48b7e2f379159750
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